Re: [U-Boot] [PATCH] power: regulator: Return success on attempt to disable an always-on regulator

2018-12-30 Thread Lokesh Vutla

Hi Simon,

On 29/12/18 6:58 PM, Simon Glass wrote:

Hi Lokesh,

On Thu, 27 Dec 2018 at 22:33, Lokesh Vutla  wrote:


Hi Simon,

On 28/12/18 3:57 AM, Simon Glass wrote:

Hi Lokesh,

On Mon, 24 Dec 2018 at 04:08, Lokesh Vutla  wrote:


commit 4f86a724e82c0 ("power: regulator: denied disable on always-on
regulator") throws an error when requested to disable an always-on
regulator. It is right that an always-on regulator should not be
attempted to be disabled. But at the same time regulator framework
should not return an error when such request is received. Instead
it should just return success without attempting to disable the
specified regulator. This is because the requesting driver will
not have the idea if the regulator is always-on or not. The
requesting driver will always try to enable/disable regulator as
per the required flow. So it is upto regulator framework to not
break such scenarios.


Can the caller not check the error code? It is -EACCES in this case.


We considered this an one of the option but I ended up fixing regulator
framework due to the following reasons:
- If regulator framework returns -EACCES on this scenario then:
 - -EACCES should be checked in all the existing usage of the api[1] or 
else
someone else might encounter the same problem.


Yes. Some already check for -ENOSYS, e.g. omap_hsmmc.c


 - Any future usage of the api should take of handling this error.


Yes, and it should be commented too.


 - From a client driver perspective it is not really an error. It is 
doing the
right thing and receiving an error might be confusing.


The error means that the request was not handled. There is no way to
find out that requesting this was actually wrong.



Hope this is clear. Also just to add one more point, I adapted this error
handling from Linux kernel[2].


The only question for me whether anything would need to detect that
the request to disable a regulator is not supported.

Your linux link appears to lead me to regulator_ena_gpio_ctrl(),
related to regulator GPIOs. Is that right? It's hard for me to
understand what the code there is doing.


Looks like functions are moving around too fast. I am referring to the function 
_regulator_disable() in the same file[1]. So logic of _regulator_disable() looks 
something like below:


_regulator_disable()
{
if (use_count == 1 && !always_on_regulator)
.
ret = _regulator_do_disable()
.
use_count = 0;
else
use_count--;

return ret;
}

Obviously there are more things happening in the function but I just mentioned 
the details what we require.




Once we make this change we will not be able to go back without breaking things.

I am not really convinced that this patch is the best approach. I do
understand your point though. It just worries me that we are hiding
something and it will be hard to unhide it later.

What do you think about adding something like
regulator_disable_if_allowed() which silently ignored -ENOSYS and
-EACCES?


hmm...not sure if this is necessary. But if you feel "detecting the request to 
disable is not supported" might be needed in future, I can make something 
regulator_set_enable_if_allowed() and discard -ENOSYS and -EACCESS as you suggested.


[1] 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/regulator/core.c#n2627


Thanks and regards,
Lokesh
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Re: [U-Boot] [PATCH 3/6] riscv: remove RISC-V standalone linker script

2018-12-30 Thread Bin Meng
On Mon, Dec 31, 2018 at 2:31 AM Lukas Auer
 wrote:
>
> Standalone applications do not require a separate linker script and can
> use the default linker script of the compiler instead. Remove the RISC-V
> standalone linker script.
>
> Signed-off-by: Lukas Auer 
> ---
>
>  arch/riscv/config.mk  |  1 -
>  examples/standalone/riscv.lds | 40 ---
>  2 files changed, 41 deletions(-)
>  delete mode 100644 examples/standalone/riscv.lds
>

Reviewed-by: Bin Meng 
Tested-by: Bin Meng 
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Re: [U-Boot] [PATCH 5/6] riscv: support standalone applications on RV64I systems

2018-12-30 Thread Bin Meng
On Mon, Dec 31, 2018 at 2:30 AM Lukas Auer
 wrote:
>
> Add an implementation of EXPORT_FUNC() for RV64I systems to support them
> in standalone applications.
>
> Signed-off-by: Lukas Auer 
> ---
>
>  examples/standalone/stubs.c | 11 +++
>  1 file changed, 11 insertions(+)
>

Reviewed-by: Bin Meng 
Tested-by: Bin Meng 
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Re: [U-Boot] [PATCH 2/6] riscv: remove invalid dcache flush implementation

2018-12-30 Thread Bin Meng
On Mon, Dec 31, 2018 at 2:28 AM Lukas Auer
 wrote:
>
> The fence instruction is used to enforce device I/O and memory ordering
> constraints in RISC-V. It does not directly affect the data cache and
> particular cannot be used to flush or invalidate it. RISC-V does not
> have instructions for explicit cache control. Remove the
> flush_dcache_all implementation and its use in all dcache-specific
> functions in lib/cache.c.
>
> This also adds a missing new line between flush_dcache_all and
> flush_dcache_range in lib/cache.c.
>
> Signed-off-by: Lukas Auer 
> ---
> This patch only removes the implementation itself and its use in
> dcache-specific functions in lib/cache.c. There are more uses of it in
> arch/riscv/, which this patch does not remove.
>
>  arch/riscv/lib/cache.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
>

Reviewed-by: Bin Meng 
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Re: [U-Boot] [PATCH 4/6] riscv: replace use of callee-saved register in standalone

2018-12-30 Thread Bin Meng
On Mon, Dec 31, 2018 at 2:30 AM Lukas Auer
 wrote:
>
> Register x19 (s3) is a callee-saved register. It must not be used to
> load and jump to exported functions without saving it beforehand.
> Replace it with t0, a temporary and caller-saved register.
>
> Change the code comment to reflect this and fix it to correctly list gp
> as the register with the pointer to global data.
>
> Signed-off-by: Lukas Auer 
> ---
>
>  examples/standalone/stubs.c | 10 +-
>  1 file changed, 5 insertions(+), 5 deletions(-)
>

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Re: [U-Boot] [PATCH 6/6] riscv: qemu: define standalone load address

2018-12-30 Thread Bin Meng
On Mon, Dec 31, 2018 at 2:28 AM Lukas Auer
 wrote:
>
> We need to define the standalone load address to use standalone
> application on qemu-riscv. Define it and set it equal to
> CONFIG_SYS_LOAD_ADDR.
>
> To not overwrite it, change the assigned of CONFIG_STANDALONE_LOAD_ADDR
> in arch/riscv/config.mk to a conditional one.
>
> Signed-off-by: Lukas Auer 
> ---
>
>  arch/riscv/config.mk | 2 +-
>  include/configs/qemu-riscv.h | 2 ++
>  2 files changed, 3 insertions(+), 1 deletion(-)
>

Reviewed-by: Bin Meng 
Tested-by: Bin Meng 
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Re: [U-Boot] [PATCH 1/6] riscv: clarify error message on undefined exceptions

2018-12-30 Thread Bin Meng
On Mon, Dec 31, 2018 at 2:28 AM Lukas Auer
 wrote:
>
> Undefined exceptions are treated as reserved. This is not clearly
> communicated to the user. Adjust the error message to clarify that a
> reserved exception has occurred and add additional details.
>
> Fixes: e8b522b ("riscv: treat undefined exception codes as reserved")
> Signed-off-by: Lukas Auer 
> ---
>
>  arch/riscv/lib/interrupts.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>

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Re: [U-Boot] [PATCH 1/3] bootm: vxworks: Make do_bootvx_fdt() static

2018-12-30 Thread Bin Meng
Hi Tom,

On Fri, Dec 21, 2018 at 11:08 PM Bin Meng  wrote:
>
> Change the scope of do_bootvx_fdt() to static since it is only
> used in common/bootm_os.c.
>
> Signed-off-by: Bin Meng 
> ---
>
>  common/bootm_os.c | 2 +-
>  include/vxworks.h | 1 -
>  2 files changed, 1 insertion(+), 2 deletions(-)
>

I hope this series can get into v2019.01.

Regards,
Bin
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[U-Boot] Please pull u-boot-x86

2018-12-30 Thread Bin Meng
Hi Tom,

This includes x86 edison defconfig file clean up, and coreboot file
system (cbfs) fixes.

The following changes since commit bea3d826203f90507ff32ed24bd0a3c53479e55c:

  Merge tag 'signed-efi-2019.01' of git://github.com/agraf/u-boot
(2018-12-27 12:59:01 -0500)

are available in the git repository at:

  git://git.denx.de/u-boot-x86.git

for you to fetch changes up to 881bb9ab398419c33c9021ee8b2bbd8412882230:

  fs: cbfs: Add missing standard CBFS component types (2018-12-31
09:42:41 +0800)


Andy Shevchenko (3):
  x86: edison: move CONFIG_CMD_PCI from header file to defconfig
  x86: edison: move CONFIG_BOOTCOMMAND from header file to defconfig
  x86: edison: Remove staled comments from configuration header

Bin Meng (3):
  fs: cbfs: Fix out of bound access during CBFS walking through
  fs: cbfs: Make all CBFS_TYPE_xxx macros consistent
  fs: cbfs: Add missing standard CBFS component types

Christian Gmeiner (1):
  fs: cbfs: remove wrong header validation

 cmd/cbfs.c   | 34 --
 configs/edison_defconfig |  1 -
 fs/cbfs/cbfs.c   |  7 +++
 include/cbfs.h   | 14 --
 include/configs/edison.h | 10 --
 5 files changed, 47 insertions(+), 19 deletions(-)

Regards,
Bin
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Re: [U-Boot] [GIT PULL] UniPhier updates for v2019.01

2018-12-30 Thread Tom Rini
On Sat, Dec 29, 2018 at 11:58:59AM +0900, Masahiro Yamada wrote:

> Hi Tom,
> 
> 
> Please pull UniPhier updates v2019.01
> 
> - import DIV_ROUND_CLOSEST_ULL macro from Linux
> - import improvement and fix of Denali NAND driver from Linux
> - add NAND 200MHz clock to clk driver
> - allow CONFIG_BOOTCOMMAND to run custom boot command/script
> - sync DT with Linux 4.20
> 
> 
> 
> 
> 
> 
> The following changes since commit bea3d826203f90507ff32ed24bd0a3c53479e55c:
> 
>   Merge tag 'signed-efi-2019.01' of git://github.com/agraf/u-boot
> (2018-12-27 12:59:01 -0500)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-uniphier.git master
> 
> for you to fetch changes up to 2001a81cba9554ee8b7f6d2ecd53510640ce4f35:
> 
>   ARM: uniphier: dts: sync with Linux 4.20 (2018-12-29 11:50:30 +0900)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH 4/4] fs: cbfs: Add missing standard CBFS component types

2018-12-30 Thread Bin Meng
On Sat, Dec 29, 2018 at 9:40 PM Simon Glass  wrote:
>
> On Sat, 22 Dec 2018 at 02:50, Bin Meng  wrote:
> >
> > Current CBFS component type list is incomplete. Add missing ones.
> >
> > Signed-off-by: Bin Meng 
> > ---
> >
> >  cmd/cbfs.c | 30 ++
> >  include/cbfs.h | 10 ++
> >  2 files changed, 40 insertions(+)
>
> Reviewed-by: Simon Glass 

applied to u-boot-x86, thanks!
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Re: [U-Boot] [PATCH 1/4] fs: cbfs: remove wrong header validation

2018-12-30 Thread Bin Meng
On Sat, Dec 29, 2018 at 9:40 PM Simon Glass  wrote:
>
> On Sat, 22 Dec 2018 at 02:50, Bin Meng  wrote:
> >
> > From: Christian Gmeiner 
> >
> > cbfs_fileheader.len indicates the content size of the file in the
> > cbfs, and it has nothing to do with cbfs_fileheader.offset which
> > is the starting address of the file in the cbfs.
> >
> > Remove such check in file_cbfs_next_file(). Before this change
> > 'cbfsinit' failed with 'Bad CBFS file'. After this change all cbfs
> > commands are working as expected.
> >
> > Signed-off-by: Christian Gmeiner 
> > [bmeng: keep the necessary header sanity check]
> > Signed-off-by: Bin Meng 
> >
> > ---
> >
> >  fs/cbfs/cbfs.c | 3 +--
> >  1 file changed, 1 insertion(+), 2 deletions(-)
>
> Reviewed-by: Simon Glass 

applied to u-boot-x86, thanks!
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Re: [U-Boot] [PATCH 3/4] fs: cbfs: Make all CBFS_TYPE_xxx macros consistent

2018-12-30 Thread Bin Meng
On Sat, Dec 29, 2018 at 9:40 PM Simon Glass  wrote:
>
> On Sat, 22 Dec 2018 at 02:50, Bin Meng  wrote:
> >
> > At present there are 2 macros that are named as CBFS_COMPONENT_xxx.
> > Change them to CBFS_TYPE_xxx for consistency.
> >
> > Signed-off-by: Bin Meng 
> > ---
> >
> >  cmd/cbfs.c | 4 ++--
> >  include/cbfs.h | 4 ++--
> >  2 files changed, 4 insertions(+), 4 deletions(-)
> >
>
> Reviewed-by: Simon Glass 

applied to u-boot-x86, thanks!
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Re: [U-Boot] [PATCH v1 3/3] x86: edison: Remove staled comments from configuration header

2018-12-30 Thread Bin Meng
On Mon, Dec 31, 2018 at 8:40 AM Bin Meng  wrote:
>
> On Wed, Dec 12, 2018 at 1:12 AM Andy Shevchenko
>  wrote:
> >
> > Since some options had been moved to defconfig from header,
> > the leftover comments are not needed anymore. Remove them.
> >
> > Signed-off-by: Andy Shevchenko 
> > ---
> >  include/configs/edison.h | 4 
> >  1 file changed, 4 deletions(-)
> >
>
> Reviewed-by: Bin Meng 

applied to u-boot-x86, thanks!
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Re: [U-Boot] [PATCH 2/4] fs: cbfs: Fix out of bound access during CBFS walking through

2018-12-30 Thread Bin Meng
On Sat, Dec 29, 2018 at 9:40 PM Simon Glass  wrote:
>
> On Sat, 22 Dec 2018 at 02:50, Bin Meng  wrote:
> >
> > The call to file_cbfs_fill_cache() is given with the parameter
> > 'start' pointing to the offset by the CBFS base address, but
> > with the parameter 'size' that equals to the whole CBFS size.
> > During CBFS walking through, it checks files one by one and
> > after it pass over the end of the CBFS which is 4GiB boundary
> > it tries to check files from address 0 and so on, until the
> > overall size the codes checked hits to the given 'size'.
> >
> > Fix this by passing 'start' pointing to the CBFS base address.
> >
> > Signed-off-by: Bin Meng 
> > ---
> >
> >  fs/cbfs/cbfs.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
>
> Reviewed-by: Simon Glass 

applied to u-boot-x86, thanks!
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Re: [U-Boot] [PATCH v1 2/3] x86: edison: move CONFIG_BOOTCOMMAND from header file to defconfig

2018-12-30 Thread Bin Meng
On Mon, Dec 31, 2018 at 8:40 AM Bin Meng  wrote:
>
> On Wed, Dec 12, 2018 at 1:12 AM Andy Shevchenko
>  wrote:
> >
> > Use defconfig instead of header file for CONFIG_BOOTCOMMAND.
> >
> > Signed-off-by: Andy Shevchenko 
> > ---
> >  include/configs/edison.h | 3 ---
> >  1 file changed, 3 deletions(-)
> >
>
> Reviewed-by: Bin Meng 

applied to u-boot-x86, thanks!
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Re: [U-Boot] [PATCH v1 1/3] x86: edison: move CONFIG_CMD_PCI from header file to defconfig

2018-12-30 Thread Bin Meng
On Mon, Dec 31, 2018 at 8:40 AM Bin Meng  wrote:
>
> On Wed, Dec 12, 2018 at 1:12 AM Andy Shevchenko
>  wrote:
> >
> > Use defconfig instead of header file for CONFIG_CMD_PCI.
> >
> > Signed-off-by: Andy Shevchenko 
> > ---
> >  configs/edison_defconfig | 1 -
> >  include/configs/edison.h | 3 ---
> >  2 files changed, 4 deletions(-)
> >
>
> Reviewed-by: Bin Meng 

applied to u-boot-x86, thanks!
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Re: [U-Boot] [PATCH v1 3/3] x86: edison: Remove staled comments from configuration header

2018-12-30 Thread Bin Meng
On Wed, Dec 12, 2018 at 1:12 AM Andy Shevchenko
 wrote:
>
> Since some options had been moved to defconfig from header,
> the leftover comments are not needed anymore. Remove them.
>
> Signed-off-by: Andy Shevchenko 
> ---
>  include/configs/edison.h | 4 
>  1 file changed, 4 deletions(-)
>

Reviewed-by: Bin Meng 
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Re: [U-Boot] [PATCH v1 2/3] x86: edison: move CONFIG_BOOTCOMMAND from header file to defconfig

2018-12-30 Thread Bin Meng
On Wed, Dec 12, 2018 at 1:12 AM Andy Shevchenko
 wrote:
>
> Use defconfig instead of header file for CONFIG_BOOTCOMMAND.
>
> Signed-off-by: Andy Shevchenko 
> ---
>  include/configs/edison.h | 3 ---
>  1 file changed, 3 deletions(-)
>

Reviewed-by: Bin Meng 
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Re: [U-Boot] [PATCH v1 1/3] x86: edison: move CONFIG_CMD_PCI from header file to defconfig

2018-12-30 Thread Bin Meng
On Wed, Dec 12, 2018 at 1:12 AM Andy Shevchenko
 wrote:
>
> Use defconfig instead of header file for CONFIG_CMD_PCI.
>
> Signed-off-by: Andy Shevchenko 
> ---
>  configs/edison_defconfig | 1 -
>  include/configs/edison.h | 3 ---
>  2 files changed, 4 deletions(-)
>

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Re: [U-Boot] [PATCH v3 1/8] cmd: add efishell command

2018-12-30 Thread Heinrich Schuchardt
On 12/18/18 6:05 AM, AKASHI Takahiro wrote:
> Currently, there is no easy way to add or modify UEFI variables.
> In particular, bootmgr supports BootOrder/Boot variables, it is
> quite hard to define them as u-boot variables because they are represented
> in a complicated and encoded format.
> 
> The new command, efishell, helps address these issues and give us
> more friendly interfaces:
>  * efishell boot add: add Boot variable
>  * efishell boot rm: remove Boot variable
>  * efishell boot dump: display all Boot variables
>  * efishell boot order: set/display a boot order (BootOrder)
>  * efishell setvar: set an UEFI variable (with limited functionality)
>  * efishell dumpvar: display all UEFI variables
> 
> As the name suggests, this command basically provides a subset fo UEFI
> shell commands with simplified functionality.
> 
> Signed-off-by: AKASHI Takahiro 
> ---
>  cmd/Kconfig|  10 +
>  cmd/Makefile   |   1 +
>  cmd/efishell.c | 673 +
>  3 files changed, 684 insertions(+)
>  create mode 100644 cmd/efishell.c
> 
> diff --git a/cmd/Kconfig b/cmd/Kconfig
> index f2f3b5e2b76b..a8a4bf7db45e 100644
> --- a/cmd/Kconfig
> +++ b/cmd/Kconfig
> @@ -1390,6 +1390,16 @@ config CMD_DISPLAY
> displayed on a simple board-specific display. Implement
> display_putc() to use it.
>  



> +static int do_efi_boot_add(int argc, char * const argv[])
> +{
> + int id;
> + char *endp;
> + char var_name[9];
> + u16 var_name16[9], *p;
> + efi_guid_t guid;
> + size_t label_len, label_len16;
> + u16 *label;
> + struct efi_device_path *device_path = NULL, *file_path = NULL;
> + struct efi_load_option lo;
> + void *data = NULL;
> + unsigned long size;
> + int ret;
> +
> + if (argc < 6 || argc > 7)
> + return CMD_RET_USAGE;
> +
> + id = (int)simple_strtoul(argv[1], &endp, 0);
> + if (*endp != '\0' || id > 0x)
> + return CMD_RET_FAILURE;
> +
> + sprintf(var_name, "Boot%04X", id);
> + p = var_name16;
> + utf8_utf16_strncpy(&p, var_name, 9);
> +
> + guid = efi_global_variable_guid;
> +
> + /* attributes */
> + lo.attributes = 0x1; /* always ACTIVE */
> +
> + /* label */
> + label_len = strlen(argv[2]);
> + label_len16 = utf8_utf16_strnlen(argv[2], label_len);
> + label = malloc((label_len16 + 1) * sizeof(u16));
> + if (!label)
> + return CMD_RET_FAILURE;
> + lo.label = label; /* label will be changed below */
> + utf8_utf16_strncpy(&label, argv[2], label_len);
> +
> + /* file path */
> + ret = efi_dp_from_name(argv[3], argv[4], argv[5], &device_path,
> +&file_path);

This will create a full device path like

/VenHw(dbca4c98-6cb0-694d-0872-819c650cb7b8)/HD(1,MBR,0xd1535d21,0x1,0x7f)/\

This is unlike what the Linux program efibootmgr would do. Efibootmgr
will create a shortened device path where the first node is the
partition, e.g.

HD(1,MBR,0xd1535d21,0x1,0x7f)/\

The advantage of this shortened device path is that it only depends on
the disk content and not on the firmware. With a full device path
approach adding a node (e.g. the disk controller) in front of the
partition would invalidate the boot entry. Furthermore the operating
system will not be aware of the full device path.

EDK2 uses the following logic in the boot manager to expand the device
path (BmGetNextLoadOptionDevicePath()):

Check if the file path is a full device path.
Check if the device path matches a partition on any drive.
Check if the file path matches a file on any partition.

I think in U-Boot we will have to support shortened device paths to
collaborate with operating systems.

Best regards

Heinrich
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Re: [U-Boot] [linux-sunxi] [PATCH] Revert "sunxi: board: Print error after power initialization fails"

2018-12-30 Thread André Przywara
On 29/12/2018 22:10, Olliver Schinagl wrote:

Hi Olliver,

> Luckily we have had no problem with this on our boards, but its sad to
> see this patch reverted due to the buggy ddr implementation ...

This whole SPL is quite a sensitive construct, so moving things around
can have interesting effects. For instance try to use any .bss variables
(global variables initialised to 0) before the DRAM init.
Also especially the DRAM controller driver was written basically without
any single line of documentation. So bear with us if we didn't get
everything 100% correct.

I actually wanted to ask you: what was your patch meaning to fix in the
first place? All the patch did was to move the DRAM init after the CPU
clock setting, which was the exact reason for the breakage.
What that power_failed check does is to avoid increasing the CPU
frequency, before and after that patch. There are no other consequences.
So the effect would be just a mere change in the order of reporting,
since we continue execution in any case.

So was that the only purpose of the patch? I believe that could be
better done this way, without any side effects:

#endif
#endif

if (power_failed)
printf("Error setting up the power controller.\n"
   "CPU frequency not set.\n");
 <... DRAM init ...>

if (!power_failed)
clock_set_pll1(CONFIG_SYS_CLK_FREQ);



> 
> Curiosity is getting the better of me and I cant seem to be able to
> reproduce the problem. So could you be a little bit more specific on the
> bug please?

As I wrote in the commit message, the OrangePi Zero breaks straight away
with this patch, all of the time: 0 MB DRAM. I don't have any other
affected board to test on, but there were reports of more boards not
working as well.

Since we shouldn't allow such drastic regressions, I believe it's best
to just revert the patch, given the short time to the release. Since I
consider the original patch more cosmetic than anything else, I believe
this is justified.

Cheers,
Andre

> On December 29, 2018 7:53:49 PM GMT+01:00, Jagan Teki
>  wrote:
> 
> On Wed, Dec 19, 2018 at 6:32 PM Andre Przywara  
> wrote:
> 
> 
> From: "From: Karl Palsson" 
> 
> Commit a8011eb84dfa("sunxi: board: Print error after power
> initialization
> fails") moved the DRAM init after the increase of the CPU clock
> frequency. This lead to various DRAM initialisation failures on some
> boards (hangs or wrong size reported, on a NanoPi Duo2 and OrangePi
> Zero, for instance). Lowering the CPU frequency significantly
> (for instance
> to 408 MHz) seems to work around the problem, so this points to
> some timing
> issues in the DRAM code.
> 
> Debugging this sounds like a larger job, so let's just revert
> this patch
> to bring back those boards.
> Beside this probably unintended change the patch just moved the
> error
> message around, so reverting this is not a real loss.
> 
> 
> Better mark this as TODO somewhere, may be some one look it later.
> 
> 
> This reverts commit a8011eb84dfac5187cebf00ed8bc981bdb5c1fa1.
> 
> Tested-By: Priit Laes 
> Signed-off-by: Karl Palsson 
> Signed-off-by: Andre Przywara 
> 
> 
> Applied to u-boot-sunxi/master
> 
> 
> -- 
> Sent from my Android device with K-9 Mail. Please excuse my brevity.

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[U-Boot] [PATCH 1/1] efi_loader: efi_set_variable use const void *

2018-12-30 Thread Heinrich Schuchardt
The SetVariable() runtime service does not change the data passed to it.
So mark the parameter as constant.

Signed-off-by: Heinrich Schuchardt 
---
 include/efi_api.h | 3 ++-
 include/efi_loader.h  | 2 +-
 lib/efi_loader/efi_variable.c | 2 +-
 3 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/include/efi_api.h b/include/efi_api.h
index 323797565e..9b6b97457b 100644
--- a/include/efi_api.h
+++ b/include/efi_api.h
@@ -231,7 +231,8 @@ struct efi_runtime_services {
efi_status_t (EFIAPI *set_variable)(u16 *variable_name,
const efi_guid_t *vendor,
u32 attributes,
-   efi_uintn_t data_size, void *data);
+   efi_uintn_t data_size,
+   const void *data);
efi_status_t (EFIAPI *get_next_high_mono_count)(
uint32_t *high_count);
void (EFIAPI *reset_system)(enum efi_reset_type reset_type,
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 907fb2b8c1..01092651fb 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -526,7 +526,7 @@ efi_status_t EFIAPI efi_get_next_variable_name(efi_uintn_t 
*variable_name_size,
   const efi_guid_t *vendor);
 efi_status_t EFIAPI efi_set_variable(u16 *variable_name,
 const efi_guid_t *vendor, u32 attributes,
-efi_uintn_t data_size, void *data);
+efi_uintn_t data_size, const void *data);
 
 /**
  * struct efi_load_option - EFI load option
diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c
index 4e6a04e614..c302dbd2fe 100644
--- a/lib/efi_loader/efi_variable.c
+++ b/lib/efi_loader/efi_variable.c
@@ -254,7 +254,7 @@ efi_status_t EFIAPI efi_get_next_variable_name(efi_uintn_t 
*variable_name_size,
 /* 
http://wiki.phoenix.com/wiki/index.php/EFI_RUNTIME_SERVICES#SetVariable.28.29 */
 efi_status_t EFIAPI efi_set_variable(u16 *variable_name,
 const efi_guid_t *vendor, u32 attributes,
-efi_uintn_t data_size, void *data)
+efi_uintn_t data_size, const void *data)
 {
char *native_name = NULL, *val = NULL, *s;
efi_status_t ret = EFI_SUCCESS;
-- 
2.19.2

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[U-Boot] [PATCH 1/1] efi_loader: use const efi_guid_t * for variable services

2018-12-30 Thread Heinrich Schuchardt
The runtime variable services never change GUIDs. So we should declare
the GUID parameters as constant.

Signed-off-by: Heinrich Schuchardt 
---
 include/efi_api.h |  8 +---
 include/efi_loader.h  | 14 +++---
 lib/efi_loader/efi_variable.c | 16 
 lib/efi_selftest/efi_selftest_variables.c |  4 ++--
 4 files changed, 22 insertions(+), 20 deletions(-)

diff --git a/include/efi_api.h b/include/efi_api.h
index 0e5c6e92d0..30deafcbac 100644
--- a/include/efi_api.h
+++ b/include/efi_api.h
@@ -221,13 +221,15 @@ struct efi_runtime_services {
struct efi_mem_desc *virtmap);
efi_status_t (*convert_pointer)(unsigned long dbg, void **address);
efi_status_t (EFIAPI *get_variable)(u16 *variable_name,
-   efi_guid_t *vendor, u32 *attributes,
+   const efi_guid_t *vendor,
+   u32 *attributes,
efi_uintn_t *data_size, void *data);
efi_status_t (EFIAPI *get_next_variable_name)(
efi_uintn_t *variable_name_size,
-   u16 *variable_name, efi_guid_t *vendor);
+   u16 *variable_name, const efi_guid_t *vendor);
efi_status_t (EFIAPI *set_variable)(u16 *variable_name,
-   efi_guid_t *vendor, u32 attributes,
+   const efi_guid_t *vendor,
+   u32 attributes,
efi_uintn_t data_size, void *data);
efi_status_t (EFIAPI *get_next_high_mono_count)(
uint32_t *high_count);
diff --git a/include/efi_loader.h b/include/efi_loader.h
index bd76078e94..84c8ce15d4 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -510,15 +510,15 @@ efi_status_t EFIAPI efi_selftest(efi_handle_t 
image_handle,
 struct efi_system_table *systab);
 #endif
 
-efi_status_t EFIAPI efi_get_variable(u16 *variable_name, efi_guid_t *vendor,
-u32 *attributes, efi_uintn_t *data_size,
-void *data);
+efi_status_t EFIAPI efi_get_variable(u16 *variable_name,
+const efi_guid_t *vendor, u32 *attributes,
+efi_uintn_t *data_size, void *data);
 efi_status_t EFIAPI efi_get_next_variable_name(efi_uintn_t *variable_name_size,
   u16 *variable_name,
-  efi_guid_t *vendor);
-efi_status_t EFIAPI efi_set_variable(u16 *variable_name, efi_guid_t *vendor,
-u32 attributes, efi_uintn_t data_size,
-void *data);
+  const efi_guid_t *vendor);
+efi_status_t EFIAPI efi_set_variable(u16 *variable_name,
+const efi_guid_t *vendor, u32 attributes,
+efi_uintn_t data_size, void *data);
 
 /**
  * struct efi_load_option - EFI load option
diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c
index 19d9cb865f..4e6a04e614 100644
--- a/lib/efi_loader/efi_variable.c
+++ b/lib/efi_loader/efi_variable.c
@@ -99,7 +99,7 @@ static char *mem2hex(char *hexstr, const u8 *mem, int count)
 }
 
 static efi_status_t efi_to_native(char **native, const u16 *variable_name,
- efi_guid_t *vendor)
+ const efi_guid_t *vendor)
 {
size_t len;
char *pos;
@@ -163,9 +163,9 @@ static const char *parse_attr(const char *str, u32 *attrp)
 }
 
 /* 
http://wiki.phoenix.com/wiki/index.php/EFI_RUNTIME_SERVICES#GetVariable.28.29 */
-efi_status_t EFIAPI efi_get_variable(u16 *variable_name, efi_guid_t *vendor,
-u32 *attributes, efi_uintn_t *data_size,
-void *data)
+efi_status_t EFIAPI efi_get_variable(u16 *variable_name,
+const efi_guid_t *vendor, u32 *attributes,
+efi_uintn_t *data_size, void *data)
 {
char *native_name;
efi_status_t ret;
@@ -244,7 +244,7 @@ efi_status_t EFIAPI efi_get_variable(u16 *variable_name, 
efi_guid_t *vendor,
 /* 
http://wiki.phoenix.com/wiki/index.php/EFI_RUNTIME_SERVICES#GetNextVariableName.28.29
 */
 efi_status_t EFIAPI efi_get_next_variable_name(efi_uintn_t *variable_name_size,
   u16 *variable_name,
-  efi_guid_t *vendor)
+  const efi_guid_t *vendor)
 {
EFI_ENTRY("%p \"%ls\" %pUl", variable_name_size, variable_name, vend

[U-Boot] [PATCH 5/6] riscv: support standalone applications on RV64I systems

2018-12-30 Thread Lukas Auer
Add an implementation of EXPORT_FUNC() for RV64I systems to support them
in standalone applications.

Signed-off-by: Lukas Auer 
---

 examples/standalone/stubs.c | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/examples/standalone/stubs.c b/examples/standalone/stubs.c
index f37d209da6..0827bde35e 100644
--- a/examples/standalone/stubs.c
+++ b/examples/standalone/stubs.c
@@ -176,6 +176,16 @@ gd_t *global_data;
 /*
  * gp holds the pointer to the global_data. t0 is call clobbered.
  */
+#ifdef CONFIG_ARCH_RV64I
+#define EXPORT_FUNC(f, a, x, ...)  \
+   asm volatile (  \
+"  .globl " #x "\n"\
+#x ":\n"   \
+"  ld  t0, %0(gp)\n"   \
+"  ld  t0, %1(t0)\n"   \
+"  jr  t0\n"   \
+   : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "t0");
+#else
 #define EXPORT_FUNC(f, a, x, ...)  \
asm volatile (  \
 "  .globl " #x "\n"\
@@ -184,6 +194,7 @@ gd_t *global_data;
 "  lw  t0, %1(t0)\n"   \
 "  jr  t0\n"   \
: : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "t0");
+#endif
 #elif defined(CONFIG_ARC)
 /*
  * r25 holds the pointer to the global_data. r10 is call clobbered.
-- 
2.20.1

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[U-Boot] [PATCH 3/6] riscv: remove RISC-V standalone linker script

2018-12-30 Thread Lukas Auer
Standalone applications do not require a separate linker script and can
use the default linker script of the compiler instead. Remove the RISC-V
standalone linker script.

Signed-off-by: Lukas Auer 
---

 arch/riscv/config.mk  |  1 -
 examples/standalone/riscv.lds | 40 ---
 2 files changed, 41 deletions(-)
 delete mode 100644 examples/standalone/riscv.lds

diff --git a/arch/riscv/config.mk b/arch/riscv/config.mk
index ff4fe64001..e484a3f0ef 100644
--- a/arch/riscv/config.mk
+++ b/arch/riscv/config.mk
@@ -24,7 +24,6 @@ EFI_LDS   := elf_riscv64_efi.lds
 endif
 
 CONFIG_STANDALONE_LOAD_ADDR = 0x
-LDFLAGS_STANDALONE += -T $(srctree)/examples/standalone/riscv.lds
 
 PLATFORM_CPPFLAGS  += -ffixed-gp -fpic
 PLATFORM_RELFLAGS  += -fno-common -gdwarf-2 -ffunction-sections \
diff --git a/examples/standalone/riscv.lds b/examples/standalone/riscv.lds
deleted file mode 100644
index 9a25861052..00
--- a/examples/standalone/riscv.lds
+++ /dev/null
@@ -1,40 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2017 Andes Technology Corporation
- * Rick Chen, Andes Technology Corporation 
- */
-
-OUTPUT_ARCH(riscv)
-ENTRY(_start)
-SECTIONS
-{
-. = ALIGN(4);
-.text :
-{
-*(.text)
-}
-
-. = ALIGN(4);
-.data : {
-   __global_pointer$ = . + 0x800;
-   *(.data)
-   }
-
-. = ALIGN(4);
-
-.got : {
-__got_start = .;
-*(.got)
-__got_end = .;
-}
-
- . = ALIGN(4);
-__bss_start = .;
-.bss : { *(.bss) }
-__bss_end = .;
-
-. = ALIGN(4);
-.rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) }
-
-_end = .;
-}
-- 
2.20.1

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[U-Boot] [PATCH 6/6] riscv: qemu: define standalone load address

2018-12-30 Thread Lukas Auer
We need to define the standalone load address to use standalone
application on qemu-riscv. Define it and set it equal to
CONFIG_SYS_LOAD_ADDR.

To not overwrite it, change the assigned of CONFIG_STANDALONE_LOAD_ADDR
in arch/riscv/config.mk to a conditional one.

Signed-off-by: Lukas Auer 
---

 arch/riscv/config.mk | 2 +-
 include/configs/qemu-riscv.h | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/config.mk b/arch/riscv/config.mk
index e484a3f0ef..84654eb3ed 100644
--- a/arch/riscv/config.mk
+++ b/arch/riscv/config.mk
@@ -23,7 +23,7 @@ PLATFORM_LDFLAGS  += -m $(64bit-emul)
 EFI_LDS:= elf_riscv64_efi.lds
 endif
 
-CONFIG_STANDALONE_LOAD_ADDR = 0x
+CONFIG_STANDALONE_LOAD_ADDR ?= 0x
 
 PLATFORM_CPPFLAGS  += -ffixed-gp -fpic
 PLATFORM_RELFLAGS  += -fno-common -gdwarf-2 -ffunction-sections \
diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h
index b29d155d09..2588c5a0b2 100644
--- a/include/configs/qemu-riscv.h
+++ b/include/configs/qemu-riscv.h
@@ -17,6 +17,8 @@
 
 #define CONFIG_SYS_BOOTM_LEN   SZ_16M
 
+#define CONFIG_STANDALONE_LOAD_ADDR0x8020
+
 /* Environment options */
 #define CONFIG_ENV_SIZESZ_4K
 
-- 
2.20.1

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[U-Boot] [PATCH 4/6] riscv: replace use of callee-saved register in standalone

2018-12-30 Thread Lukas Auer
Register x19 (s3) is a callee-saved register. It must not be used to
load and jump to exported functions without saving it beforehand.
Replace it with t0, a temporary and caller-saved register.

Change the code comment to reflect this and fix it to correctly list gp
as the register with the pointer to global data.

Signed-off-by: Lukas Auer 
---

 examples/standalone/stubs.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/examples/standalone/stubs.c b/examples/standalone/stubs.c
index fadde669fa..f37d209da6 100644
--- a/examples/standalone/stubs.c
+++ b/examples/standalone/stubs.c
@@ -174,16 +174,16 @@ gd_t *global_data;
: : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "$r16");
 #elif defined(CONFIG_RISCV)
 /*
- * t7 holds the pointer to the global_data. gp is call clobbered.
+ * gp holds the pointer to the global_data. t0 is call clobbered.
  */
 #define EXPORT_FUNC(f, a, x, ...)  \
asm volatile (  \
 "  .globl " #x "\n"\
 #x ":\n"   \
-"  lw  x19, %0(gp)\n"  \
-"  lw  x19, %1(x19)\n" \
-"  jr  x19\n"  \
-   : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "x19");
+"  lw  t0, %0(gp)\n"   \
+"  lw  t0, %1(t0)\n"   \
+"  jr  t0\n"   \
+   : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "t0");
 #elif defined(CONFIG_ARC)
 /*
  * r25 holds the pointer to the global_data. r10 is call clobbered.
-- 
2.20.1

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[U-Boot] [PATCH 1/6] riscv: clarify error message on undefined exceptions

2018-12-30 Thread Lukas Auer
Undefined exceptions are treated as reserved. This is not clearly
communicated to the user. Adjust the error message to clarify that a
reserved exception has occurred and add additional details.

Fixes: e8b522b ("riscv: treat undefined exception codes as reserved")
Signed-off-by: Lukas Auer 
---

 arch/riscv/lib/interrupts.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c
index e185933b01..74c1e561c7 100644
--- a/arch/riscv/lib/interrupts.c
+++ b/arch/riscv/lib/interrupts.c
@@ -37,7 +37,8 @@ static void _exit_trap(ulong code, ulong epc, struct pt_regs 
*regs)
printf("exception code: %ld , %s , epc %lx , ra %lx\n",
   code, exception_code[code], epc, regs->ra);
} else {
-   printf("Reserved\n");
+   printf("reserved exception code: %ld , epc %lx , ra %lx\n",
+  code, epc, regs->ra);
}
 
hang();
-- 
2.20.1

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[U-Boot] [PATCH 0/6] Small fixes for RISC-V

2018-12-30 Thread Lukas Auer

This patch series contains small fixes for RISC-V. It touches three
areas.

- Patch 1 clarifies the error message on undefined exceptions.
- Patch 2 removes the current dcache flush implementation. It uses the
fence instruction, which does not directly affect the data cache and can
therefore not be used to implement dcache flush and invalidation.
- Patches 3-6 improve support for standalone applications. They add
support for RV64I systems and fix a problem, where a callee-saved
register is used without saving it beforehand. Patch 6 defines the
standalone load address for qemu-riscv to allow it to run standalone
applications.


Lukas Auer (6):
  riscv: clarify error message on undefined exceptions
  riscv: remove invalid dcache flush implementation
  riscv: remove RISC-V standalone linker script
  riscv: replace use of callee-saved register in standalone
  riscv: support standalone applications on RV64I systems
  riscv: qemu: define standalone load address

 arch/riscv/config.mk  |  3 +--
 arch/riscv/lib/cache.c|  4 +---
 arch/riscv/lib/interrupts.c   |  3 ++-
 examples/standalone/riscv.lds | 40 ---
 examples/standalone/stubs.c   | 21 +-
 include/configs/qemu-riscv.h  |  2 ++
 6 files changed, 22 insertions(+), 51 deletions(-)
 delete mode 100644 examples/standalone/riscv.lds

-- 
2.20.1

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[U-Boot] [PATCH 2/6] riscv: remove invalid dcache flush implementation

2018-12-30 Thread Lukas Auer
The fence instruction is used to enforce device I/O and memory ordering
constraints in RISC-V. It does not directly affect the data cache and
particular cannot be used to flush or invalidate it. RISC-V does not
have instructions for explicit cache control. Remove the
flush_dcache_all implementation and its use in all dcache-specific
functions in lib/cache.c.

This also adds a missing new line between flush_dcache_all and
flush_dcache_range in lib/cache.c.

Signed-off-by: Lukas Auer 
---
This patch only removes the implementation itself and its use in
dcache-specific functions in lib/cache.c. There are more uses of it in
arch/riscv/, which this patch does not remove.

 arch/riscv/lib/cache.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/riscv/lib/cache.c b/arch/riscv/lib/cache.c
index ae5c60716f..203e287612 100644
--- a/arch/riscv/lib/cache.c
+++ b/arch/riscv/lib/cache.c
@@ -13,11 +13,10 @@ void invalidate_icache_all(void)
 
 void flush_dcache_all(void)
 {
-   asm volatile ("fence" :::"memory");
 }
+
 void flush_dcache_range(unsigned long start, unsigned long end)
 {
-   flush_dcache_all();
 }
 
 void invalidate_icache_range(unsigned long start, unsigned long end)
@@ -31,7 +30,6 @@ void invalidate_icache_range(unsigned long start, unsigned 
long end)
 
 void invalidate_dcache_range(unsigned long start, unsigned long end)
 {
-   flush_dcache_all();
 }
 
 void cache_flush(void)
-- 
2.20.1

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Re: [U-Boot] [PATCH v3 1/8] cmd: add efishell command

2018-12-30 Thread Heinrich Schuchardt
On 12/30/18 4:44 PM, Heinrich Schuchardt wrote:
> On 12/18/18 6:05 AM, AKASHI Takahiro wrote:
>> Currently, there is no easy way to add or modify UEFI variables.
>> In particular, bootmgr supports BootOrder/Boot variables, it is
>> quite hard to define them as u-boot variables because they are represented
>> in a complicated and encoded format.
>>
>> The new command, efishell, helps address these issues and give us
>> more friendly interfaces:
>>  * efishell boot add: add Boot variable
>>  * efishell boot rm: remove Boot variable
>>  * efishell boot dump: display all Boot variables
>>  * efishell boot order: set/display a boot order (BootOrder)
>>  * efishell setvar: set an UEFI variable (with limited functionality)
>>  * efishell dumpvar: display all UEFI variables
>>
>> As the name suggests, this command basically provides a subset fo UEFI
>> shell commands with simplified functionality.
>>
>> Signed-off-by: AKASHI Takahiro 

The behavior is a bit unexpected:

=> efishell boot order 200
=> efishell boot order
 1: Boot00C8: (not defined)
exit not allowed from main input shell.

I would expect 'efishell boot order' to take a 4 digit hexadecimal
number and to do no conversion from decimal to hexadecimal.

I was also surprised to see 'exit not allowed from main input shell.'

Best regards

Heinrich
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Re: [U-Boot] [PATCH 4/6] ARM: dts: socfpga: Add missing SDMMC reset

2018-12-30 Thread Marek Vasut
On 12/30/18 9:13 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee 
> 
> The SDMMC reset is missing from DT, so the reset manager cannot unreset
> the SDMMC. Add the missing DT reset entry.
> 
> Signed-off-by: Tien Fong Chee 
> ---
>  arch/arm/dts/socfpga_arria10.dtsi |1 +
>  1 files changed, 1 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/dts/socfpga_arria10.dtsi 
> b/arch/arm/dts/socfpga_arria10.dtsi
> index 2c5249c..c11a5c0 100644
> --- a/arch/arm/dts/socfpga_arria10.dtsi
> +++ b/arch/arm/dts/socfpga_arria10.dtsi
> @@ -660,6 +660,7 @@
>   fifo-depth = <0x400>;
>   clocks = <&l4_mp_clk>, <&sdmmc_clk>;
>   clock-names = "biu", "ciu";
> + resets = <&rst SDMMC_RESET>;
>   status = "disabled";
>   };
>  
> 
Applied, thanks

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Re: [U-Boot] [PATCH] dm: usb: gadget: Fix boot breakage on sunxi platforms

2018-12-30 Thread Marek Vasut
On 12/29/18 7:49 PM, Jagan Teki wrote:
> On Mon, Dec 24, 2018 at 3:44 AM Jagan Teki  wrote:
>>
>> On Fri, Dec 21, 2018 at 2:20 PM Jean-Jacques Hiblot  wrote:
>>>
>>
>> Better to have proper commit head that tells the real issue.
>>
>>> Fixes commit 013116243950 ("dm: usb: create a new UCLASS ID for USB gadget
>>> devices")
>>>
>>> The UCLASS_DRIVER for id UCLASS_USB_GADGET_GENERIC needs to be declared
>>> even for platforms that do not enable DM_USB_GADGET. Otherwise the driver
>>> for their usb peripheral controller fails to bind.
>>
>> Sorry this is unclear, you are trying to skip DM_USB_GADGET code even
>> though UCLASS_USB_GADGET_GENERIC id used. does it make sense?
> 
> Any response on this?
> 
> We need the fix asap since the release is about a week.

I suspect most people are having xmas vacation, so pushing hard won't
help. It seems you had some comment on the patch, so I expect a reply
from Jean and possibly a V2.

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Re: [U-Boot] [PATCH 6/6] ARM: socfpga: Synchronize the configuration for A10 SoCDK

2018-12-30 Thread Marek Vasut
On 12/30/18 9:13 AM, tien.fong.c...@intel.com wrote:
> From: Marek Vasut 
> 
> Update the default configuration file to enable the necessary functionality
> the get the kit working. That includes SPL SD/MMC support, USB, and I2C.
> 
> Signed-off-by: Marek Vasut 
> Signed-off-by: Tien Fong Chee 

Is this patch needed ? Why ? This enables a whole lot of stuff 

> ---
>  configs/socfpga_arria10_defconfig |   38 +++-
>  1 files changed, 32 insertions(+), 6 deletions(-)
> 
> diff --git a/configs/socfpga_arria10_defconfig 
> b/configs/socfpga_arria10_defconfig
> index 8158dbb..4b93321 100644
> --- a/configs/socfpga_arria10_defconfig
> +++ b/configs/socfpga_arria10_defconfig
> @@ -1,7 +1,7 @@
>  CONFIG_ARM=y
>  CONFIG_ARCH_SOCFPGA=y
>  CONFIG_SYS_TEXT_BASE=0x0140
> -CONFIG_SYS_MALLOC_F_LEN=0x2000
> +CONFIG_SYS_MALLOC_F_LEN=0x8000
>  CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
>  CONFIG_SPL=y
>  CONFIG_IDENT_STRING="socfpga_arria10"
> @@ -10,26 +10,35 @@ CONFIG_NR_DRAM_BANKS=1
>  CONFIG_USE_BOOTARGS=y
>  CONFIG_BOOTARGS="console=ttyS0,115200"
>  # CONFIG_USE_BOOTCOMMAND is not set
> +CONFIG_SYS_CONSOLE_IS_IN_ENV=y
> +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
> +CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
>  CONFIG_DEFAULT_FDT_FILE="socfpga_arria10_socdk_sdmmc.dtb"
> +CONFIG_VERSION_VARIABLE=y
>  CONFIG_DISPLAY_BOARDINFO_LATE=y
> +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800
>  CONFIG_SPL_FPGA_SUPPORT=y
> -CONFIG_SPL_SPI_LOAD=y
>  CONFIG_CMD_ASKENV=y
>  CONFIG_CMD_GREPENV=y
> +CONFIG_CMD_DFU=y
>  # CONFIG_CMD_FLASH is not set
>  CONFIG_CMD_GPIO=y
> +CONFIG_CMD_I2C=y
>  CONFIG_CMD_MMC=y
> +CONFIG_CMD_SF=y
> +CONFIG_CMD_SPI=y
> +CONFIG_CMD_USB=y
> +CONFIG_CMD_USB_MASS_STORAGE=y
>  CONFIG_CMD_CACHE=y
>  CONFIG_CMD_EXT4_WRITE=y
>  CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
> -# CONFIG_SPL_DOS_PARTITION is not set
> -# CONFIG_ISO_PARTITION is not set
> -# CONFIG_EFI_PARTITION is not set
> +CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
>  CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc"
>  CONFIG_ENV_IS_IN_MMC=y
>  CONFIG_SPL_ENV_SUPPORT=y
>  CONFIG_SPL_DM=y
>  CONFIG_SPL_DM_SEQ_ALIAS=y
> +CONFIG_DFU_MMC=y
>  CONFIG_SPL_DM_MMC=y
>  CONFIG_SPL_MMC_SUPPORT=y
>  CONFIG_SPL_EXT_SUPPORT=y
> @@ -40,13 +49,30 @@ CONFIG_FS_LOADER=y
>  CONFIG_FPGA_SOCFPGA=y
>  CONFIG_DM_GPIO=y
>  CONFIG_DWAPB_GPIO=y
> +CONFIG_SYS_I2C_DW=y
>  CONFIG_DM_MMC=y
>  CONFIG_MTD_DEVICE=y
> +CONFIG_MTD_PARTITIONS=y
> +CONFIG_MMC_DW=y
> +CONFIG_SPI_FLASH=y
> +CONFIG_SPI_FLASH_BAR=y
> +CONFIG_SPI_FLASH_SPANSION=y
> +CONFIG_SPI_FLASH_STMICRO=y
> +CONFIG_PHY_MICREL=y
> +CONFIG_PHY_MICREL_KSZ90X1=y
>  CONFIG_DM_ETH=y
>  CONFIG_ETH_DESIGNWARE=y
>  CONFIG_MII=y
> +CONFIG_SYS_NS16550=y
>  CONFIG_SPI=y
>  CONFIG_TIMER=y
>  CONFIG_SPL_TIMER=y
>  CONFIG_DESIGNWARE_APB_TIMER=y
> -CONFIG_USE_TINY_PRINTF=y
> +CONFIG_DESIGNWARE_SPI=y
> +CONFIG_USB=y
> +CONFIG_DM_USB=y
> +CONFIG_USB_DWC2=y
> +CONFIG_USB_STORAGE=y
> +CONFIG_USB_GADGET=y
> +CONFIG_USB_GADGET_DWC2_OTG=y
> +CONFIG_USB_GADGET_DOWNLOAD=y
> 


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Re: [U-Boot] [PATCH 5/6] spl : socfpga: Implement fpga bitstream loading with socfpga loadfs

2018-12-30 Thread Marek Vasut
On 12/30/18 9:13 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee 
> 
> Add support for loading FPGA bitstream to get DDR up running before
> U-Boot is loaded into DDR. Boot device initialization, generic firmware
> loader and SPL FAT support are required for this whole mechanism to work.
> 
> Signed-off-by: Tien Fong Chee 
> ---
>  arch/arm/mach-socfpga/spl_a10.c |   46 
> ++-
>  1 files changed, 45 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c
> index 3ea64f7..93f5f46 100644
> --- a/arch/arm/mach-socfpga/spl_a10.c
> +++ b/arch/arm/mach-socfpga/spl_a10.c
> @@ -1,6 +1,6 @@
>  // SPDX-License-Identifier: GPL-2.0+
>  /*
> - *  Copyright (C) 2012 Altera Corporation 
> + *  Copyright (C) 2012-2018 Altera Corporation 
>   */
>  
>  #include 
> @@ -23,9 +23,14 @@
>  #include 
>  #include 
>  #include 
> +#include 
> +#include 
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> +#define FPGA_SOCFGA_A10_RBF_CORE_LOAD_DDR(1 * 1024)
> +#define FPGA_SOCFGA_A10_RBF_CORE_BUFFER_SIZE (40 * 1024 * 1024)
> +
>  static const struct socfpga_system_manager *sysmgr_regs =
>   (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
>  
> @@ -73,6 +78,45 @@ void spl_board_init(void)
>   WATCHDOG_RESET();
>  
>   arch_early_init_r();
> +
> + /* If the full FPGA is already loaded, ie.from EPCQ, config fpga pins */
> + if (is_fpgamgr_user_mode()) {
> + config_pins(gd->fdt_blob, "shared");
> + config_pins(gd->fdt_blob, "fpga");

What happens if config_pins() fails ? The function returns some return
value.

> + } else if (!is_fpgamgr_early_user_mode()) {
> + /* Program IOSSM(early IO release) or full FPGA */
> + fpga_fs_info fpga_fsinfo;
> + int len;
> + char buf[16 * 1024] __aligned(ARCH_DMA_MINALIGN);
> +
> + fpga_fsinfo.filename = (char *)get_fpga_filename(

Is the cast needed ?

> + gd->fdt_blob,
> + &len,
> + FPGA_SOCFPGA_A10_RBF_PERIPH);
> +
> + if (fpga_fsinfo.filename)
> + socfpga_loadfs(&fpga_fsinfo, buf, sizeof(buf), 0);
> + }
> +
> + /* If the IOSSM/full FPGA is already loaded, start DDR */
> + if (is_fpgamgr_early_user_mode() || is_fpgamgr_user_mode())
> + ddr_calibration_sequence();
> +
> + if (!is_fpgamgr_user_mode()) {
> + fpga_fs_info fpga_fsinfo;
> + int len;
> +
> + fpga_fsinfo.filename = (char *)get_fpga_filename(
> + gd->fdt_blob,
> + &len,
> + FPGA_SOCFPGA_A10_RBF_CORE);
> +
> + if (fpga_fsinfo.filename)
> + socfpga_loadfs(&fpga_fsinfo,
> + (const void *)FPGA_SOCFGA_A10_RBF_CORE_LOAD_DDR,
> + (size_t)FPGA_SOCFGA_A10_RBF_CORE_BUFFER_SIZE,
> + 0);
> + }
>  }
>  
>  void board_init_f(ulong dummy)
> 


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Re: [U-Boot] [PATCH 3/6] ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDK

2018-12-30 Thread Marek Vasut
On 12/30/18 9:13 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee 
> 
> Update the default configuration file to enable the necessary functionality
> to get the SoCFPGA loadfs driver support. This would enable the
> implementation of programming bitstream into FPGA from MMC.
> 
> Signed-off-by: Tien Fong Chee 
> ---
>  configs/socfpga_arria10_defconfig |8 
>  1 files changed, 8 insertions(+), 0 deletions(-)
> 
> diff --git a/configs/socfpga_arria10_defconfig 
> b/configs/socfpga_arria10_defconfig
> index 6ebda81..8158dbb 100644
> --- a/configs/socfpga_arria10_defconfig
> +++ b/configs/socfpga_arria10_defconfig
> @@ -27,8 +27,16 @@ CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
>  # CONFIG_EFI_PARTITION is not set
>  CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc"
>  CONFIG_ENV_IS_IN_MMC=y
> +CONFIG_SPL_ENV_SUPPORT=y
>  CONFIG_SPL_DM=y
>  CONFIG_SPL_DM_SEQ_ALIAS=y
> +CONFIG_SPL_DM_MMC=y
> +CONFIG_SPL_MMC_SUPPORT=y
> +CONFIG_SPL_EXT_SUPPORT=y
> +CONFIG_SPL_FAT_SUPPORT=y
> +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
> +CONFIG_FS_FAT_MAX_CLUSTSIZE=16384

This breaks systems with large FAT clusters. Why is this needed for
programming the FPGA from MMC ?

> +CONFIG_FS_LOADER=y
>  CONFIG_FPGA_SOCFPGA=y
>  CONFIG_DM_GPIO=y
>  CONFIG_DWAPB_GPIO=y
> 


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Re: [U-Boot] [PATCH 1/6] ARM: socfpga: Description on FPGA bitstream type and file name for Arria 10

2018-12-30 Thread Marek Vasut
On 12/30/18 9:13 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee 
> 
> This patch adds description on properties about file name used for both
> peripheral bitstream and core bitstream.
> 
> Signed-off-by: Tien Fong Chee 
> ---
>  .../fpga/altera-socfpga-a10-fpga-mgr.txt   |   21 
> 
>  1 files changed, 21 insertions(+), 0 deletions(-)
> 
> diff --git a/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt 
> b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt
> index 2fd8e7a..4552edc 100644
> --- a/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt
> +++ b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt
> @@ -7,13 +7,34 @@ Required properties:
> - The second index is for writing FPGA configuration data.
>  - resets : Phandle and reset specifier for the device's reset.
>  - clocks : Clocks used by the device.
> +- altr,bitstream : File name for FPGA peripheral raw binary which is used
> +to initialize FPGA IOs, PLL, IO48 and DDR.
> +or
> +File name for full RBF, consist of periph RBF and core RBF
> +- altr,bitstream-core : File name for core RBF which contains FPGA design
> + which is used to program FPGA CRAM and ERAM.
>  
>  Example:
>  
> +- Examples for booting with early IO release, enter early user mode(periph 
> RBF):
> +
> + fpga_mgr: fpga-mgr@ffd03000 {
> + compatible = "altr,socfpga-a10-fpga-mgr";
> + reg = <0xffd03000 0x100
> +0xffcfe400 0x20>;
> + clocks = <&l4_mp_clk>;
> + resets = <&rst FPGAMGR_RESET>;
> + altr,bitstream = "ghrd_10as066n2.periph.rbf.mkimage";
> + altr,bitstream-core = "ghrd_10as066n2.core.rbf.mkimage";

What is this .mkimage format about ? Is that uImage ? Since it's two
files, it could probably be bundled into fitImage instead ?

> + };
> +
> +- Examples for booting with full release, enter user mode with full RBF:
> +
>   fpga_mgr: fpga-mgr@ffd03000 {
>   compatible = "altr,socfpga-a10-fpga-mgr";
>   reg = <0xffd03000 0x100
>  0xffcfe400 0x20>;
>   clocks = <&l4_mp_clk>;
>   resets = <&rst FPGAMGR_RESET>;
> + altr,bitstream = "ghrd_10as066n2.rbf.mkimage";
>   };
> 


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Re: [U-Boot] [PATCH 2/6] ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading

2018-12-30 Thread Marek Vasut
On 12/30/18 9:13 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee 
> 
> Add FPGA driver to support program FPGA with FPGA bitstream loading from
> filesystem. The driver are designed based on generic firmware loader
> framework. The driver can handle FPGA program operation from loading FPGA
> bitstream in flash to memory and then to program FPGA.
> 
> Signed-off-by: Tien Fong Chee 

What changed from V5 in each of those patches ?

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Re: [U-Boot] [PATCH 0/6] Add support for loading FPGA bitstream

2018-12-30 Thread Marek Vasut
On 12/30/18 9:13 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee 
> 
> These series of patches enable peripheral bitstream being programmed into FPGA
> to get the DDR up running. This's also called early IO release, because the
> peripheral bitstream is only initializing FPGA IOs, PLL, IO48 and DDR.
> 
> Once DDR is up running, core bitstream from MMC which contains user FPGA
> design would be loaded into DDR location. socfpga loadfs would be called to
> program core bitstream into FPGA and entering user mode.
> 
> Lastly, u-boot-dtb.img from MMC FAT partition would be loaded to DDR, and up
> running from there.
> 
> For this whole mechanism to work, the SDMMC flash layout would be designed as
> shown in below:
> 
> RAW partition:
> 1. spl_w_dtb-mkpimage.bin
> mkpimage -hv 1 -o spl/spl_w_dtb-mkpimage.bin spl/u-boot-spl-dtb.bin
>  spl/u-boot-spl-dtb.bin spl/u-boot-spl-dtb.bin spl/u-boot-spl-dtb.bin
> 
> FAT partition contains:
> Bitstreams
> --
> Early IO release method is recommended for the sake of performance, improve
> up to 86% compare to full RBF.
> 
> 1. ghrd_10as066n2.periph.rbf.mkimage
> mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\" -d
>  ghrd_10as066n2.periph.rbf ghrd_10as066n2.periph.rbf.mkimage
> 
> 2. ghrd_10as066n2.core.rbf.mkimage
> mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\" -d
>  ghrd_10as066n2.core.rbf ghrd_10as066n2.core.rbf.mkimage
> 
> OR
> 
> 1. ghrd_10as066n2.rbf.mkimage (full RBF)
> mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\" -d
>  ghrd_10as066n2.rbf ghrd_10as066n2.rbf.mkimage
> 
> U-Boot image
> 
> 3. u-boot-dtb.img
> 
> For the testing purpose, these two patches are required to apply 1st before
> applying this series of patches.
> 1. [U-Boot] [PATCH] misc: fs_loader: Switching private data allocation to DM
>auto allocation
>https://www.mail-archive.com/u-boot@lists.denx.de/msg308954.html
>Reviewed-by: Simon Glass 
> 
> 2. [U-Boot] [PATCH v2] Add support for initializing MMC
>https://www.mail-archive.com/u-boot@lists.denx.de/msg310532.html
>Version 2 under review.

The above should be made into documentation, since cover letters are
dropped.

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[U-Boot] [PATCH] MTD: nand: mxs_nand_spl: Fix empty function pointer for BBT

2018-12-30 Thread Adam Ford
The initialization function calls a nand_chip.scan_bbt(mtd) but
scan_bbt is never initialized resulting in an undefined function
pointer.  This will direct the function pointer to nand_default_bbt
defined in the same file.

Signed-off-by: Adam Ford 

diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c 
b/drivers/mtd/nand/raw/mxs_nand_spl.c
index 2d7bbe83cc..c628f3adec 100644
--- a/drivers/mtd/nand/raw/mxs_nand_spl.c
+++ b/drivers/mtd/nand/raw/mxs_nand_spl.c
@@ -185,6 +185,7 @@ static int mxs_nand_init(void)
mtd = nand_to_mtd(&nand_chip);
/* set mtd functions */
nand_chip.cmdfunc = mxs_nand_command;
+   nand_chip.scan_bbt = nand_default_bbt;
nand_chip.numchips = 1;
 
/* identify flash device */
-- 
2.17.1

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Re: [U-Boot] [PATCH v3 1/8] cmd: add efishell command

2018-12-30 Thread Heinrich Schuchardt
On 12/18/18 6:05 AM, AKASHI Takahiro wrote:
> Currently, there is no easy way to add or modify UEFI variables.
> In particular, bootmgr supports BootOrder/Boot variables, it is
> quite hard to define them as u-boot variables because they are represented
> in a complicated and encoded format.
> 
> The new command, efishell, helps address these issues and give us
> more friendly interfaces:
>  * efishell boot add: add Boot variable
>  * efishell boot rm: remove Boot variable
>  * efishell boot dump: display all Boot variables
>  * efishell boot order: set/display a boot order (BootOrder)
>  * efishell setvar: set an UEFI variable (with limited functionality)
>  * efishell dumpvar: display all UEFI variables
> 
> As the name suggests, this command basically provides a subset fo UEFI
> shell commands with simplified functionality.
> 
> Signed-off-by: AKASHI Takahiro 
> ---
>  cmd/Kconfig|  10 +
>  cmd/Makefile   |   1 +
>  cmd/efishell.c | 673 +
>  3 files changed, 684 insertions(+)
>  create mode 100644 cmd/efishell.c
> 
> diff --git a/cmd/Kconfig b/cmd/Kconfig
> index f2f3b5e2b76b..a8a4bf7db45e 100644
> --- a/cmd/Kconfig
> +++ b/cmd/Kconfig
> @@ -1390,6 +1390,16 @@ config CMD_DISPLAY
> displayed on a simple board-specific display. Implement
> display_putc() to use it.
>  
> +config CMD_EFISHELL
> + bool "Enable the 'efishell' command for EFI environment"
> + depends on EFI_LOADER
> + default n
> + help
> +   Enable the 'efishell' command which provides a subset of UEFI
> +   shell utility with simplified functionality. It will be useful
> +   particularly for managing boot parameters as  well as examining
> +   various EFI status for debugging.
> +
>  config CMD_LED
>   bool "led"
>   default y if LED
> diff --git a/cmd/Makefile b/cmd/Makefile
> index 5ec2f9e8ebfd..0258d8a373b1 100644
> --- a/cmd/Makefile
> +++ b/cmd/Makefile
> @@ -49,6 +49,7 @@ obj-$(CONFIG_CMD_ECHO) += echo.o
>  obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o
>  obj-$(CONFIG_CMD_EEPROM) += eeprom.o
>  obj-$(CONFIG_EFI_STUB) += efi.o
> +obj-$(CONFIG_CMD_EFISHELL) += efishell.o
>  obj-$(CONFIG_CMD_ELF) += elf.o
>  obj-$(CONFIG_HUSH_PARSER) += exit.o
>  obj-$(CONFIG_CMD_EXT4) += ext4.o
> diff --git a/cmd/efishell.c b/cmd/efishell.c
> new file mode 100644
> index ..5819e52cf575
> --- /dev/null
> +++ b/cmd/efishell.c
> @@ -0,0 +1,673 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + *  EFI Shell-like command
> + *
> + *  Copyright (c) 2018 AKASHI Takahiro, Linaro Limited
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +static void dump_var_data(char *data, unsigned long len)
> +{
> + char *start, *end, *p;
> + unsigned long pos, count;
> + char hex[3], line[9];
> + int i;
> +
> + end = data + len;
> + for (start = data, pos = 0; start < end; start += count, pos += count) {
> + count = end - start;
> + if (count > 16)
> + count = 16;
> +
> + /* count should be multiple of two */
> + printf("%08lx: ", pos);
> +
> + /* in hex format */
> + p = start;
> + for (i = 0; i < count / 2; p += 2, i++)
> + printf(" %c%c", *p, *(p + 1));
> + for (; i < 8; i++)
> + printf("   ");
> +
> + /* in character format */
> + p = start;
> + hex[2] = '\0';
> + for (i = 0; i < count / 2; i++) {
> + hex[0] = *p++;
> + hex[1] = *p++;
> + line[i] = simple_strtoul(hex, 0, 16);
> + if (line[i] < 0x20 || line[i] > 0x7f)
> + line[i] = '.';
> + }
> + line[i] = '\0';
> + printf("  %s\n", line);
> + }
> +}
> +
> +/*
> + * From efi_variable.c,
> + *
> + * Mapping between EFI variables and u-boot variables:
> + *
> + *   efi_$guid_$varname = {attributes}(type)value
> + */
> +static int do_efi_dump_var(int argc, char * const argv[])
> +{
> + char regex[256];
> + char * const regexlist[] = {regex};
> + char *res = NULL, *start, *end;
> + int len;
> +
> + if (argc > 2)
> + return CMD_RET_USAGE;
> +
> + if (argc == 2)
> + snprintf(regex, 256, "efi_.*-.*-.*-.*-.*_%s", argv[1]);
> + else
> + snprintf(regex, 256, "efi_.*-.*-.*-.*-.*_.*");
> + debug("%s:%d grep uefi var %s\n", __func__, __LINE__, regex);
> +
> + len = hexport_r(&env_htab, '\n', H_MATCH_REGEX | H_MATCH_KEY,
> + &res, 0, 1, regexlist);
> +
> + if (len < 0)
> + return CMD_RET_FAILURE;
> +
> + if (len > 0) {
> + end = res;
> + while (true) {
> + /* v

[U-Boot] [PATCH 1/1] efi_loader: refactor switch to non-secure mode

2018-12-30 Thread Heinrich Schuchardt
Refactor the switch from supervisor to hypervisor to a new function called
at the beginning of do_bootefi().

Signed-off-by: Heinrich Schuchardt 
---
v3
Move weak function to common/bootm.c.
Rename functions.
Add more comments.
Avoid static variable for jump buffer.
v2
Use weak function with implementation in arch directories
---
 arch/arm/cpu/armv7/Makefile  |  1 +
 arch/arm/cpu/armv7/exception_level.c | 56 ++
 arch/arm/cpu/armv8/Makefile  |  1 +
 arch/arm/cpu/armv8/exception_level.c | 55 +
 cmd/bootefi.c| 72 ++--
 common/bootm.c   | 10 
 include/bootm.h  |  5 ++
 7 files changed, 132 insertions(+), 68 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/exception_level.c
 create mode 100644 arch/arm/cpu/armv8/exception_level.c

diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 4f4647c90ac..8c955d0d528 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_SYS_ARM_MPU) += mpu_v7r.o
 
 ifneq ($(CONFIG_SPL_BUILD),y)
 obj-$(CONFIG_EFI_LOADER) += sctlr.o
+obj-$(CONFIG_ARMV7_NONSEC) += exception_level.o
 endif
 
 ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
diff --git a/arch/arm/cpu/armv7/exception_level.c 
b/arch/arm/cpu/armv7/exception_level.c
new file mode 100644
index 000..e116435623f
--- /dev/null
+++ b/arch/arm/cpu/armv7/exception_level.c
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Switch to non-secure mode
+ *
+ * Copyright (c) 2018 Heinrich Schuchardt
+ *
+ * This module contains the ARMv7 specific code required for leaving the
+ * secure mode before booting an operating system.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+ * entry_non_secure() - entry point when switching to non-secure mode
+ *
+ * When switching to non-secure mode switch_to_non_secure_mode() calls this
+ * function passing a jump buffer. We use this jump buffer to restoring the
+ * original stack and register state.
+ *
+ * @non_secure_jmp:jump buffer for restoring stack and registers
+ */
+static void entry_non_secure(struct jmp_buf_data *non_secure_jmp)
+{
+   dcache_enable();
+   debug("Reached non-secure mode\n");
+
+   /* Restore stack and registers saved in switch_to_non_secure_mode() */
+   longjmp(non_secure_jmp, 1);
+}
+
+/**
+ * switch_to_non_secure_mode() - switch to non-secure mode
+ *
+ * Operating systems are expected to run in non-secure mode. Here we check if
+ * we are running in secure mode and switch to non-secure mode if necessary.
+ */
+void switch_to_non_secure_mode(void)
+{
+   static bool is_nonsec;
+   struct jmp_buf_data non_secure_jmp;
+
+   if (armv7_boot_nonsec() && !is_nonsec) {
+   if (setjmp(&non_secure_jmp))
+   return;
+   dcache_disable();   /* flush cache before switch to HYP */
+   armv7_init_nonsec();
+   is_nonsec = true;
+   secure_ram_addr(_do_nonsec_entry)(entry_non_secure,
+ (uintptr_t)&non_secure_jmp,
+ 0, 0);
+   }
+}
diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
index 52c8daa0496..8b0b887a696 100644
--- a/arch/arm/cpu/armv8/Makefile
+++ b/arch/arm/cpu/armv8/Makefile
@@ -14,6 +14,7 @@ ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_ARMV8_SPL_EXCEPTION_VECTORS) += exceptions.o
 else
 obj-y  += exceptions.o
+obj-y   += exception_level.o
 endif
 obj-y  += cache.o
 obj-y  += tlb.o
diff --git a/arch/arm/cpu/armv8/exception_level.c 
b/arch/arm/cpu/armv8/exception_level.c
new file mode 100644
index 000..245af3f1d4e
--- /dev/null
+++ b/arch/arm/cpu/armv8/exception_level.c
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Switch to non-secure mode
+ *
+ * Copyright (c) 2018 Heinrich Schuchardt
+ *
+ * This module contains the ARMv8 specific code required to adjust the 
exception
+ * level before booting an operating system.
+ */
+
+#include 
+#include 
+#include 
+
+/**
+ * entry_non_secure() - entry point when switching to non-secure mode
+ *
+ * When switching to non-secure mode switch_to_non_secure_mode() calls this
+ * function passing a jump buffer. We use this jump buffer to restoring the
+ * original stack and register state.
+ *
+ * @non_secure_jmp:jump buffer for restoring stack and registers
+ */
+static void entry_non_secure(struct jmp_buf_data *non_secure_jmp)
+{
+   dcache_enable();
+   debug("Reached non-secure mode\n");
+
+   /* Restore stack and registers saved in switch_to_non_secure_mode() */
+   longjmp(non_secure_jmp, 1);
+}
+
+/**
+ * switch_to_non_secure_mode() - switch to non-secure mode
+ *
+ * Exception level EL3 is meant to be used by the secure monitor only (ARM
+ * trusted firmware being one embodime

[U-Boot] [PATCH v2 1/1] efi_loader: move efi_init_obj_list() to a new efi_setup.c

2018-12-30 Thread Heinrich Schuchardt
From: AKASHI Takahiro 

The function, efi_init_obj_list(), can be shared in different pseudo efi
applications, like bootefi/bootmgr as well as my efishell. Moreover, it
will be utilized to extend efi initialization, for example, my "removable
disk support" patch and "capsule-on-disk support" patch in the future.

So with this patch, it will be moved to a new file, efi_setup.c, under
lib/efi_loader and exported, making no changes in functionality.

Signed-off-by: AKASHI Takahiro 
Remove lines deactivated by #if 1 #else
Reviewed-by: Heinrich Schuchardt 
---
v2
Remove lines deactivated by #if 1 #else
Remove unused #define OBJ_LIST_NOT_INITIALIZED from cmd/bootefi.c
Correct copyright lines (moving lines to another file does not
establish any new copyright)
---
 cmd/bootefi.c  | 77 --
 include/efi_loader.h   |  2 +
 lib/efi_loader/Makefile|  1 +
 lib/efi_loader/efi_setup.c | 86 ++
 4 files changed, 89 insertions(+), 77 deletions(-)
 create mode 100644 lib/efi_loader/efi_setup.c

diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index cc0f2923dc..356849dca3 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -28,86 +28,9 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define OBJ_LIST_NOT_INITIALIZED 1
-
-static efi_status_t efi_obj_list_initialized = OBJ_LIST_NOT_INITIALIZED;
-
 static struct efi_device_path *bootefi_image_path;
 static struct efi_device_path *bootefi_device_path;
 
-/* Initialize and populate EFI object list */
-efi_status_t efi_init_obj_list(void)
-{
-   efi_status_t ret = EFI_SUCCESS;
-
-   /*
-* On the ARM architecture gd is mapped to a fixed register (r9 or x18).
-* As this register may be overwritten by an EFI payload we save it here
-* and restore it on every callback entered.
-*/
-   efi_save_gd();
-
-   /* Initialize once only */
-   if (efi_obj_list_initialized != OBJ_LIST_NOT_INITIALIZED)
-   return efi_obj_list_initialized;
-
-   /* Initialize system table */
-   ret = efi_initialize_system_table();
-   if (ret != EFI_SUCCESS)
-   goto out;
-
-   /* Initialize root node */
-   ret = efi_root_node_register();
-   if (ret != EFI_SUCCESS)
-   goto out;
-
-   /* Initialize EFI driver uclass */
-   ret = efi_driver_init();
-   if (ret != EFI_SUCCESS)
-   goto out;
-
-   ret = efi_console_register();
-   if (ret != EFI_SUCCESS)
-   goto out;
-#ifdef CONFIG_PARTITIONS
-   ret = efi_disk_register();
-   if (ret != EFI_SUCCESS)
-   goto out;
-#endif
-#if defined(CONFIG_LCD) || defined(CONFIG_DM_VIDEO)
-   ret = efi_gop_register();
-   if (ret != EFI_SUCCESS)
-   goto out;
-#endif
-#ifdef CONFIG_NET
-   ret = efi_net_register();
-   if (ret != EFI_SUCCESS)
-   goto out;
-#endif
-#ifdef CONFIG_GENERATE_ACPI_TABLE
-   ret = efi_acpi_register();
-   if (ret != EFI_SUCCESS)
-   goto out;
-#endif
-#ifdef CONFIG_GENERATE_SMBIOS_TABLE
-   ret = efi_smbios_register();
-   if (ret != EFI_SUCCESS)
-   goto out;
-#endif
-   ret = efi_watchdog_register();
-   if (ret != EFI_SUCCESS)
-   goto out;
-
-   /* Initialize EFI runtime services */
-   ret = efi_reset_system_init();
-   if (ret != EFI_SUCCESS)
-   goto out;
-
-out:
-   efi_obj_list_initialized = ret;
-   return ret;
-}
-
 /*
  * Allow unaligned memory access.
  *
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 53f08161ab..6323686f9d 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -244,6 +244,8 @@ extern struct list_head efi_obj_list;
 /* List of all events */
 extern struct list_head efi_events;
 
+/* Initialize efi execution environment */
+efi_status_t efi_init_obj_list(void);
 /* Called by bootefi to initialize root node */
 efi_status_t efi_root_node_register(void);
 /* Called by bootefi to initialize runtime */
diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile
index 6703435947..a7bba58d41 100644
--- a/lib/efi_loader/Makefile
+++ b/lib/efi_loader/Makefile
@@ -28,6 +28,7 @@ obj-y += efi_image_loader.o
 obj-y += efi_memory.o
 obj-y += efi_root_node.o
 obj-y += efi_runtime.o
+obj-y += efi_setup.o
 obj-y += efi_unicode_collation.o
 obj-y += efi_variable.o
 obj-y += efi_watchdog.o
diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c
new file mode 100644
index 00..8266d06c2e
--- /dev/null
+++ b/lib/efi_loader/efi_setup.c
@@ -0,0 +1,86 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ *  EFI setup code
+ *
+ *  Copyright (c) 2016-2018 Alexander Graf et al.
+ */
+
+#include 
+#include 
+
+#define OBJ_LIST_NOT_INITIALIZED 1
+
+static efi_status_t efi_obj_list_initialized = OBJ_LIST_NOT_INITIALIZED;
+
+/* Initialize and populate EFI object list */
+efi_status_t efi_init_obj_list(void)
+{
+  

[U-Boot] [PATCH 1/1] doc: README.commands: fix type

2018-12-30 Thread Heinrich Schuchardt
%s/commmand/command/

Signed-off-by: Heinrich Schuchardt 
---
 doc/README.commands | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/doc/README.commands b/doc/README.commands
index 0ccadae0b7..e03eb44187 100644
--- a/doc/README.commands
+++ b/doc/README.commands
@@ -67,7 +67,7 @@ This table has to be evaluated in the command function of the 
main command, e.g.
 Command function
 
 
-The commmand function pointer has to be of type
+The command function pointer has to be of type
 int (*cmd)(struct cmd_tbl_s *cmdtp, int flag, int argc, const char *argv[]);
 
 cmdtp: Table entry describing the command (see above).
-- 
2.19.2

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[U-Boot] [PATCH 1/1] doc: README.uefi: fix typos

2018-12-30 Thread Heinrich Schuchardt
%s/specfication/specification/
%s/selftest/self-test/
%s/little endian/little-endian/

Signed-off-by: Heinrich Schuchardt 
---
 doc/README.uefi | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/doc/README.uefi b/doc/README.uefi
index 6b9759cfed..0982fad92e 100644
--- a/doc/README.uefi
+++ b/doc/README.uefi
@@ -14,7 +14,7 @@ and boot loaders like GRUB or the FreeBSD loader can be 
executed.
 
 ## Building for UEFI
 
-The UEFI standard supports only little endian systems. The UEFI support can be
+The UEFI standard supports only little-endian systems. The UEFI support can be
 activated for ARM and x86 by specifying
 
 CONFIG_CMD_BOOTEFI=y
@@ -53,7 +53,7 @@ arguments.
 
 ### Executing the boot manager
 
-The UEFI specfication foresees to define boot entries and boot sequence via 
UEFI
+The UEFI specification foresees to define boot entries and boot sequence via 
UEFI
 variables. Booting according to these variables is possible via
 
 bootefi bootmgr [fdt address]
@@ -90,14 +90,14 @@ Below you find the output of an example session.
 The environment variable fdtcontroladdr points to U-Boot's internal device tree
 (if available).
 
-### Executing the built-in selftest
+### Executing the built-in self-test
 
-An UEFI selftest suite can be embedded in U-Boot by building with
+An UEFI self-test suite can be embedded in U-Boot by building with
 
 CONFIG_CMD_BOOTEFI_SELFTEST=y
 
 For testing the UEFI implementation the bootefi command can be used to start 
the
-selftest.
+self-test.
 
 bootefi selftest [fdt address]
 
-- 
2.19.2

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[U-Boot] [PATCH 1/1] efi_selftest: allow building on ARMv7-M

2018-12-30 Thread Heinrich Schuchardt
ARMv7-M only supports the Thumb instruction set. Our current crt0 code does
not support it. With the patch we can build all unit tests of the EFI
subsystem that do not require crt0.

Signed-off-by: Heinrich Schuchardt 
---
 arch/arm/lib/Makefile | 6 +-
 lib/efi_selftest/Makefile | 6 +++---
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 655727f431..48ee6c3c60 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -106,5 +106,9 @@ CFLAGS_$(EFI_RELOC) := $(CFLAGS_EFI)
 CFLAGS_REMOVE_$(EFI_RELOC) := $(CFLAGS_NON_EFI)
 
 extra-$(CONFIG_CMD_BOOTEFI_HELLO_COMPILE) += $(EFI_CRT0) $(EFI_RELOC)
-extra-$(CONFIG_CMD_BOOTEFI_SELFTEST) += $(EFI_CRT0) $(EFI_RELOC)
+# TODO: As of v2019.01 the relocation code for the EFI application cannot
+# be built on ARMv7-M.
+ifndef CONFIG_CPU_V7M
+#extra-$(CONFIG_CMD_BOOTEFI_SELFTEST) += $(EFI_CRT0) $(EFI_RELOC)
+endif
 extra-$(CONFIG_EFI) += $(EFI_CRT0) $(EFI_RELOC)
diff --git a/lib/efi_selftest/Makefile b/lib/efi_selftest/Makefile
index 743b482044..5b804692aa 100644
--- a/lib/efi_selftest/Makefile
+++ b/lib/efi_selftest/Makefile
@@ -45,9 +45,9 @@ ifeq ($(CONFIG_BLK)$(CONFIG_PARTITIONS),yy)
 obj-y += efi_selftest_block_device.o
 endif
 
-# TODO: As of v2018.01 the relocation code for the EFI application cannot
-# be built on x86_64.
-ifeq ($(CONFIG_X86_64)$(CONFIG_SANDBOX),)
+# TODO: As of v2019.01 the relocation code for the EFI application cannot
+# be built on ARMv7-M, Sandbox, and x86_64.
+ifeq ($(CONFIG_SANDBOX)$(CONFIG_CPU_V7M)$(CONFIG_X86_64),)
 
 obj-y += \
 efi_selftest_startimage_exit.o \
-- 
2.19.2

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[U-Boot] [PATCH 1/1] efi_loader: CMD_BOOTEFI_HELLO_COMPILE in configs

2018-12-30 Thread Heinrich Schuchardt
It should not be necessary to adjust CMD_BOOTEFI_HELLO_COMPILE in config
files.

arch/arm/lib/crt0_arm_efi.S cannot be compiled in thumbs mode. We can
disable CMD_BOOTEFI_HELLO_COMPILE for CONFIG_CPU_V7M. So there is no longer
a need to disable it in stm32 configs.

helloworld.efi can be built without problems on x86_64. So there is no need
to disable it in chromebook_link64_defconfig and qemu-x86_64_defconfig.

Same is true for ARM V7A. So do not disable CMD_BOOTEFI_HELLO_COMPILE in
kp_imx6q_tpc_defconfig.

Some architecture checks are already make for EFI_LOADER. There is no need
to repeat them for CMD_BOOTEFI_HELLO_COMPILE

Signed-off-by: Heinrich Schuchardt 
---
 cmd/Kconfig| 2 +-
 configs/chromebook_link64_defconfig| 1 -
 configs/kp_imx6q_tpc_defconfig | 1 -
 configs/qemu-x86_64_defconfig  | 1 -
 configs/stm32f429-discovery_defconfig  | 1 -
 configs/stm32f429-evaluation_defconfig | 1 -
 configs/stm32f469-discovery_defconfig  | 1 -
 7 files changed, 1 insertion(+), 7 deletions(-)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index ea1a325eb3..3ea42e4256 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -226,7 +226,7 @@ config CMD_BOOTEFI
 
 config CMD_BOOTEFI_HELLO_COMPILE
bool "Compile a standard EFI hello world binary for testing"
-   depends on CMD_BOOTEFI && (ARM || X86 || RISCV)
+   depends on CMD_BOOTEFI && !CPU_V7M && !SANDBOX
default y
help
  This compiles a standard EFI hello world application with U-Boot so
diff --git a/configs/chromebook_link64_defconfig 
b/configs/chromebook_link64_defconfig
index 074d333dd4..12f26570af 100644
--- a/configs/chromebook_link64_defconfig
+++ b/configs/chromebook_link64_defconfig
@@ -38,7 +38,6 @@ CONFIG_SPL_PCH_SUPPORT=y
 CONFIG_SPL_RTC_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_CPU=y
-# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_SF=y
diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig
index 5ebbe1dc7c..7689f71101 100644
--- a/configs/kp_imx6q_tpc_defconfig
+++ b/configs/kp_imx6q_tpc_defconfig
@@ -20,7 +20,6 @@ CONFIG_SPL_RAW_IMAGE_SUPPORT=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_STOP_STR="."
-# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig
index 8d43acd480..34acc09317 100644
--- a/configs/qemu-x86_64_defconfig
+++ b/configs/qemu-x86_64_defconfig
@@ -36,7 +36,6 @@ CONFIG_SPL_PCH_SUPPORT=y
 CONFIG_SPL_RTC_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_CPU=y
-# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
 CONFIG_CMD_BOOTEFI_SELFTEST=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_IDE=y
diff --git a/configs/stm32f429-discovery_defconfig 
b/configs/stm32f429-discovery_defconfig
index ef0f6f7373..52fa31ffe5 100644
--- a/configs/stm32f429-discovery_defconfig
+++ b/configs/stm32f429-discovery_defconfig
@@ -15,7 +15,6 @@ CONFIG_MISC_INIT_R=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot > "
-# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
 CONFIG_CMD_IMLS=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIMER=y
diff --git a/configs/stm32f429-evaluation_defconfig 
b/configs/stm32f429-evaluation_defconfig
index 6a2ed2a9b0..cb11b5230d 100644
--- a/configs/stm32f429-evaluation_defconfig
+++ b/configs/stm32f429-evaluation_defconfig
@@ -12,7 +12,6 @@ CONFIG_MISC_INIT_R=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SYS_PROMPT="U-Boot > "
-# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_GPT=y
 # CONFIG_RANDOM_UUID is not set
diff --git a/configs/stm32f469-discovery_defconfig 
b/configs/stm32f469-discovery_defconfig
index 0b36c0fc58..5e40df225b 100644
--- a/configs/stm32f469-discovery_defconfig
+++ b/configs/stm32f469-discovery_defconfig
@@ -12,7 +12,6 @@ CONFIG_MISC_INIT_R=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SYS_PROMPT="U-Boot > "
-# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_GPT=y
 # CONFIG_RANDOM_UUID is not set
-- 
2.19.2

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Re: [U-Boot] [PATCH 1/1] cmd: add exception command

2018-12-30 Thread Heinrich Schuchardt
On 12/29/18 2:39 PM, Simon Glass wrote:
> Hi Heinrich,
> 
> On Wed, 26 Dec 2018 at 09:20, Heinrich Schuchardt  wrote:
>>
>> The 'exception' command allows to test exception handling.
>>
>> This implementation supports ARM, x86, RISC-V and the following exceptions:
>> * 'breakpoint' - prefetch abort exception (ARM 32bit only)
>> * 'unaligned'  - data abort exception (ARM only)
>> * 'undefined'  - undefined instruction exception
>>
>> Signed-off-by: Heinrich Schuchardt 
>> ---
>> v2:
>> Split architecture specific code into separate files.
>> Provide include for common code.
>> Update MAINTAINERS file.
>> ---
>>  MAINTAINERS   |  3 +++
>>  cmd/Kconfig   |  6 +
>>  cmd/Makefile  |  2 ++
>>  cmd/arm/Makefile  |  7 +
>>  cmd/arm/exception.c   | 61 +++
>>  cmd/arm/exception64.c | 33 +++
>>  cmd/riscv/Makefile|  3 +++
>>  cmd/riscv/exception.c | 29 
>>  cmd/x86/Makefile  |  1 +
>>  cmd/x86/exception.c   | 29 
>>  include/exception.h   | 58 
>>  11 files changed, 232 insertions(+)
>>  create mode 100644 cmd/arm/Makefile
>>  create mode 100644 cmd/arm/exception.c
>>  create mode 100644 cmd/arm/exception64.c
>>  create mode 100644 cmd/riscv/Makefile
>>  create mode 100644 cmd/riscv/exception.c
>>  create mode 100644 cmd/x86/exception.c
>>  create mode 100644 include/exception.h
> 
> This needs something like Series-version: 2 (if you use patman) to set
> the version number in the header.

Sorry for the mishap.

> 
> Did you look at using a uclass and driver, like sysreset?

Yes I have considered using a u-class. But I could not see how adding a
separate u-class file would save lines, make the coding less complex, or
make the coding easier to maintain. A u-class would make sense if there
were other consumers for exceptions but the exception command. But I
cannot imagine any.

There are better places to apply u-classes, e.g. I am really missing a
u-class for file systems.

Best regards

Heinrich

> 
> Regards,
> Simon
> 
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[U-Boot] [PATCH 6/6] ARM: socfpga: Synchronize the configuration for A10 SoCDK

2018-12-30 Thread tien . fong . chee
From: Marek Vasut 

Update the default configuration file to enable the necessary functionality
the get the kit working. That includes SPL SD/MMC support, USB, and I2C.

Signed-off-by: Marek Vasut 
Signed-off-by: Tien Fong Chee 
---
 configs/socfpga_arria10_defconfig |   38 +++-
 1 files changed, 32 insertions(+), 6 deletions(-)

diff --git a/configs/socfpga_arria10_defconfig 
b/configs/socfpga_arria10_defconfig
index 8158dbb..4b93321 100644
--- a/configs/socfpga_arria10_defconfig
+++ b/configs/socfpga_arria10_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_TEXT_BASE=0x0140
-CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
 CONFIG_SPL=y
 CONFIG_IDENT_STRING="socfpga_arria10"
@@ -10,26 +10,35 @@ CONFIG_NR_DRAM_BANKS=1
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200"
 # CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
 CONFIG_DEFAULT_FDT_FILE="socfpga_arria10_socdk_sdmmc.dtb"
+CONFIG_VERSION_VARIABLE=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800
 CONFIG_SPL_FPGA_SUPPORT=y
-CONFIG_SPL_SPI_LOAD=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DFU=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
-# CONFIG_SPL_DOS_PARTITION is not set
-# CONFIG_ISO_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
+CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_DFU_MMC=y
 CONFIG_SPL_DM_MMC=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_EXT_SUPPORT=y
@@ -40,13 +49,30 @@ CONFIG_FS_LOADER=y
 CONFIG_FPGA_SOCFPGA=y
 CONFIG_DM_GPIO=y
 CONFIG_DWAPB_GPIO=y
+CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
 CONFIG_MTD_DEVICE=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MMC_DW=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
+CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
 CONFIG_DESIGNWARE_APB_TIMER=y
-CONFIG_USE_TINY_PRINTF=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
-- 
1.7.7.4

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[U-Boot] [PATCH 3/6] ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDK

2018-12-30 Thread tien . fong . chee
From: Tien Fong Chee 

Update the default configuration file to enable the necessary functionality
to get the SoCFPGA loadfs driver support. This would enable the
implementation of programming bitstream into FPGA from MMC.

Signed-off-by: Tien Fong Chee 
---
 configs/socfpga_arria10_defconfig |8 
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/configs/socfpga_arria10_defconfig 
b/configs/socfpga_arria10_defconfig
index 6ebda81..8158dbb 100644
--- a/configs/socfpga_arria10_defconfig
+++ b/configs/socfpga_arria10_defconfig
@@ -27,8 +27,16 @@ CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
 # CONFIG_EFI_PARTITION is not set
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc"
 CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SPL_DM_MMC=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_FAT_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
+CONFIG_FS_LOADER=y
 CONFIG_FPGA_SOCFPGA=y
 CONFIG_DM_GPIO=y
 CONFIG_DWAPB_GPIO=y
-- 
1.7.7.4

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[U-Boot] [PATCH 5/6] spl : socfpga: Implement fpga bitstream loading with socfpga loadfs

2018-12-30 Thread tien . fong . chee
From: Tien Fong Chee 

Add support for loading FPGA bitstream to get DDR up running before
U-Boot is loaded into DDR. Boot device initialization, generic firmware
loader and SPL FAT support are required for this whole mechanism to work.

Signed-off-by: Tien Fong Chee 
---
 arch/arm/mach-socfpga/spl_a10.c |   46 ++-
 1 files changed, 45 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c
index 3ea64f7..93f5f46 100644
--- a/arch/arm/mach-socfpga/spl_a10.c
+++ b/arch/arm/mach-socfpga/spl_a10.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- *  Copyright (C) 2012 Altera Corporation 
+ *  Copyright (C) 2012-2018 Altera Corporation 
  */
 
 #include 
@@ -23,9 +23,14 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define FPGA_SOCFGA_A10_RBF_CORE_LOAD_DDR  (1 * 1024)
+#define FPGA_SOCFGA_A10_RBF_CORE_BUFFER_SIZE   (40 * 1024 * 1024)
+
 static const struct socfpga_system_manager *sysmgr_regs =
(struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
 
@@ -73,6 +78,45 @@ void spl_board_init(void)
WATCHDOG_RESET();
 
arch_early_init_r();
+
+   /* If the full FPGA is already loaded, ie.from EPCQ, config fpga pins */
+   if (is_fpgamgr_user_mode()) {
+   config_pins(gd->fdt_blob, "shared");
+   config_pins(gd->fdt_blob, "fpga");
+   } else if (!is_fpgamgr_early_user_mode()) {
+   /* Program IOSSM(early IO release) or full FPGA */
+   fpga_fs_info fpga_fsinfo;
+   int len;
+   char buf[16 * 1024] __aligned(ARCH_DMA_MINALIGN);
+
+   fpga_fsinfo.filename = (char *)get_fpga_filename(
+   gd->fdt_blob,
+   &len,
+   FPGA_SOCFPGA_A10_RBF_PERIPH);
+
+   if (fpga_fsinfo.filename)
+   socfpga_loadfs(&fpga_fsinfo, buf, sizeof(buf), 0);
+   }
+
+   /* If the IOSSM/full FPGA is already loaded, start DDR */
+   if (is_fpgamgr_early_user_mode() || is_fpgamgr_user_mode())
+   ddr_calibration_sequence();
+
+   if (!is_fpgamgr_user_mode()) {
+   fpga_fs_info fpga_fsinfo;
+   int len;
+
+   fpga_fsinfo.filename = (char *)get_fpga_filename(
+   gd->fdt_blob,
+   &len,
+   FPGA_SOCFPGA_A10_RBF_CORE);
+
+   if (fpga_fsinfo.filename)
+   socfpga_loadfs(&fpga_fsinfo,
+   (const void *)FPGA_SOCFGA_A10_RBF_CORE_LOAD_DDR,
+   (size_t)FPGA_SOCFGA_A10_RBF_CORE_BUFFER_SIZE,
+   0);
+   }
 }
 
 void board_init_f(ulong dummy)
-- 
1.7.7.4

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[U-Boot] [PATCH 4/6] ARM: dts: socfpga: Add missing SDMMC reset

2018-12-30 Thread tien . fong . chee
From: Tien Fong Chee 

The SDMMC reset is missing from DT, so the reset manager cannot unreset
the SDMMC. Add the missing DT reset entry.

Signed-off-by: Tien Fong Chee 
---
 arch/arm/dts/socfpga_arria10.dtsi |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/arm/dts/socfpga_arria10.dtsi 
b/arch/arm/dts/socfpga_arria10.dtsi
index 2c5249c..c11a5c0 100644
--- a/arch/arm/dts/socfpga_arria10.dtsi
+++ b/arch/arm/dts/socfpga_arria10.dtsi
@@ -660,6 +660,7 @@
fifo-depth = <0x400>;
clocks = <&l4_mp_clk>, <&sdmmc_clk>;
clock-names = "biu", "ciu";
+   resets = <&rst SDMMC_RESET>;
status = "disabled";
};
 
-- 
1.7.7.4

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[U-Boot] [PATCH 2/6] ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading

2018-12-30 Thread tien . fong . chee
From: Tien Fong Chee 

Add FPGA driver to support program FPGA with FPGA bitstream loading from
filesystem. The driver are designed based on generic firmware loader
framework. The driver can handle FPGA program operation from loading FPGA
bitstream in flash to memory and then to program FPGA.

Signed-off-by: Tien Fong Chee 
---
 arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts   |   18 +
 .../include/mach/fpga_manager_arria10.h|   40 ++-
 drivers/fpga/Kconfig   |9 +
 drivers/fpga/socfpga_arria10.c |  396 +++-
 4 files changed, 451 insertions(+), 12 deletions(-)

diff --git a/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts 
b/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
index 998d811..ff9835d 100644
--- a/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
+++ b/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
@@ -18,6 +18,24 @@
 /dts-v1/;
 #include "socfpga_arria10_socdk.dtsi"
 
+/ {
+   chosen {
+   firmware-loader = &fs_loader0;
+   };
+
+   fs_loader0: fs-loader@0 {
+   u-boot,dm-pre-reloc;
+   compatible = "u-boot,fs-loader";
+   phandlepart = <&mmc 1>;
+   };
+};
+
+&fpga_mgr {
+   u-boot,dm-pre-reloc;
+   altr,bitstream = "ghrd_10as066n2.periph.rbf.mkimage";
+   altr,bitstream-core = "ghrd_10as066n2.core.rbf.mkimage";
+};
+
 &mmc {
u-boot,dm-pre-reloc;
status = "okay";
diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h 
b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
index 09d13f6..4acfa7d 100644
--- a/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
@@ -1,9 +1,12 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 /*
- * Copyright (C) 2017 Intel Corporation 
+ * Copyright (C) 2017-2018 Intel Corporation 
  * All rights reserved.
  */
 
+#include 
+#include 
+
 #ifndef _FPGA_MANAGER_ARRIA10_H_
 #define _FPGA_MANAGER_ARRIA10_H_
 
@@ -51,6 +54,10 @@
 #define ALT_FPGAMGR_IMGCFG_CTL_02_CFGWIDTH_SET_MSK BIT(24)
 #define ALT_FPGAMGR_IMGCFG_CTL_02_CDRATIO_LSB  16
 
+#define FPGA_SOCFPGA_A10_RBF_UNENCRYPTED   0xa65c
+#define FPGA_SOCFPGA_A10_RBF_ENCRYPTED 0xa65d
+#define FPGA_SOCFPGA_A10_RBF_PERIPH0x0001
+#define FPGA_SOCFPGA_A10_RBF_CORE  0x8001
 #ifndef __ASSEMBLY__
 
 struct socfpga_fpga_manager {
@@ -88,12 +95,41 @@ struct socfpga_fpga_manager {
u32  imgcfg_fifo_status;
 };
 
+enum rbf_type {
+   unknown,
+   periph_section,
+   core_section
+};
+
+enum rbf_security {
+   invalid,
+   unencrypted,
+   encrypted
+};
+
+struct rbf_info {
+   enum rbf_type section;
+   enum rbf_security security;
+};
+
+struct fpga_loadfs_info {
+   fpga_fs_info *fpga_fsinfo;
+   u32 remaining;
+   u32 offset;
+   u32 datacrc;
+   struct rbf_info rbfinfo;
+   struct image_header header;
+};
+
 /* Functions */
 int fpgamgr_program_init(u32 * rbf_data, size_t rbf_size);
 int fpgamgr_program_finish(void);
 int is_fpgamgr_user_mode(void);
 int fpgamgr_wait_early_user_mode(void);
-
+int is_fpgamgr_early_user_mode(void);
+const char *get_fpga_filename(const void *fdt, int *len, u32 rbf_type);
+int socfpga_loadfs(fpga_fs_info *fpga_fsinfo, const void *buf, size_t bsize,
+   u32 offset);
 #endif /* __ASSEMBLY__ */
 
 #endif /* _FPGA_MANAGER_ARRIA10_H_ */
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index 50e9019..c9dcf7b 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -21,6 +21,15 @@ config FPGA_SOCFPGA
 
  This provides common functionality for Gen5 and Arria10 devices.
 
+config FPGA_SOCFPGA_A10_CRC_CHECK
+   bool "Enable CRC cheking on Arria10 FPGA bistream"
+   default y if FPGA_SOCFPGA
+   help
+Enable the CRC checking on Arria 10 FPGA bitstream
+
+This provides CRC checking to ensure integrated of Arria 10 FPGA
+bitstream is programmed into FPGA.
+
 config FPGA_CYCLON2
bool "Enable Altera FPGA driver for Cyclone II"
depends on FPGA_ALTERA
diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c
index 114dd91..570bd99 100644
--- a/drivers/fpga/socfpga_arria10.c
+++ b/drivers/fpga/socfpga_arria10.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Copyright (C) 2017 Intel Corporation 
+ * Copyright (C) 2017-2018 Intel Corporation 
  */
 
 #include 
@@ -10,8 +10,11 @@
 #include 
 #include 
 #include 
+#include 
 #include 
+#include 
 #include 
+#include 
 #include 
 #include 
 
@@ -64,7 +67,7 @@ static int wait_for_user_mode(void)
1, FPGA_TIMEOUT_MSEC, false);
 }
 
-static int is_fpgamgr_early_user_mode(void)
+int is_fpgamgr_early_user_mode(void)
 {
return (readl(&fpga_manager_base->imgcfg_stat) &
ALT_FPGAMGR_IMGCFG_STAT_F2S_EARLY_USERMODE_SET_MSK) != 0;
@@ -447,13 +450,368 @@ 

[U-Boot] [PATCH 1/6] ARM: socfpga: Description on FPGA bitstream type and file name for Arria 10

2018-12-30 Thread tien . fong . chee
From: Tien Fong Chee 

This patch adds description on properties about file name used for both
peripheral bitstream and core bitstream.

Signed-off-by: Tien Fong Chee 
---
 .../fpga/altera-socfpga-a10-fpga-mgr.txt   |   21 
 1 files changed, 21 insertions(+), 0 deletions(-)

diff --git a/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt 
b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt
index 2fd8e7a..4552edc 100644
--- a/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt
+++ b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt
@@ -7,13 +7,34 @@ Required properties:
- The second index is for writing FPGA configuration data.
 - resets : Phandle and reset specifier for the device's reset.
 - clocks : Clocks used by the device.
+- altr,bitstream : File name for FPGA peripheral raw binary which is used
+  to initialize FPGA IOs, PLL, IO48 and DDR.
+  or
+  File name for full RBF, consist of periph RBF and core RBF
+- altr,bitstream-core : File name for core RBF which contains FPGA design
+   which is used to program FPGA CRAM and ERAM.
 
 Example:
 
+- Examples for booting with early IO release, enter early user mode(periph 
RBF):
+
+   fpga_mgr: fpga-mgr@ffd03000 {
+   compatible = "altr,socfpga-a10-fpga-mgr";
+   reg = <0xffd03000 0x100
+  0xffcfe400 0x20>;
+   clocks = <&l4_mp_clk>;
+   resets = <&rst FPGAMGR_RESET>;
+   altr,bitstream = "ghrd_10as066n2.periph.rbf.mkimage";
+   altr,bitstream-core = "ghrd_10as066n2.core.rbf.mkimage";
+   };
+
+- Examples for booting with full release, enter user mode with full RBF:
+
fpga_mgr: fpga-mgr@ffd03000 {
compatible = "altr,socfpga-a10-fpga-mgr";
reg = <0xffd03000 0x100
   0xffcfe400 0x20>;
clocks = <&l4_mp_clk>;
resets = <&rst FPGAMGR_RESET>;
+   altr,bitstream = "ghrd_10as066n2.rbf.mkimage";
};
-- 
1.7.7.4

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[U-Boot] [PATCH 0/6] Add support for loading FPGA bitstream

2018-12-30 Thread tien . fong . chee
From: Tien Fong Chee 

These series of patches enable peripheral bitstream being programmed into FPGA
to get the DDR up running. This's also called early IO release, because the
peripheral bitstream is only initializing FPGA IOs, PLL, IO48 and DDR.

Once DDR is up running, core bitstream from MMC which contains user FPGA
design would be loaded into DDR location. socfpga loadfs would be called to
program core bitstream into FPGA and entering user mode.

Lastly, u-boot-dtb.img from MMC FAT partition would be loaded to DDR, and up
running from there.

For this whole mechanism to work, the SDMMC flash layout would be designed as
shown in below:

RAW partition:
1. spl_w_dtb-mkpimage.bin
mkpimage -hv 1 -o spl/spl_w_dtb-mkpimage.bin spl/u-boot-spl-dtb.bin
 spl/u-boot-spl-dtb.bin spl/u-boot-spl-dtb.bin spl/u-boot-spl-dtb.bin

FAT partition contains:
Bitstreams
--
Early IO release method is recommended for the sake of performance, improve
up to 86% compare to full RBF.

1. ghrd_10as066n2.periph.rbf.mkimage
mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\" -d
 ghrd_10as066n2.periph.rbf ghrd_10as066n2.periph.rbf.mkimage

2. ghrd_10as066n2.core.rbf.mkimage
mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\" -d
 ghrd_10as066n2.core.rbf ghrd_10as066n2.core.rbf.mkimage

OR

1. ghrd_10as066n2.rbf.mkimage (full RBF)
mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\" -d
 ghrd_10as066n2.rbf ghrd_10as066n2.rbf.mkimage

U-Boot image

3. u-boot-dtb.img

For the testing purpose, these two patches are required to apply 1st before
applying this series of patches.
1. [U-Boot] [PATCH] misc: fs_loader: Switching private data allocation to DM
   auto allocation
   https://www.mail-archive.com/u-boot@lists.denx.de/msg308954.html
   Reviewed-by: Simon Glass 

2. [U-Boot] [PATCH v2] Add support for initializing MMC
   https://www.mail-archive.com/u-boot@lists.denx.de/msg310532.html
   Version 2 under review.

This series is working on top of u-boot.git -
 http://git.denx.de/u-boot.git .

Marek Vasut (1):
  ARM: socfpga: Synchronize the configuration for A10 SoCDK

Tien Fong Chee (5):
  ARM: socfpga: Description on FPGA bitstream type and file name for
Arria 10
  ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading
  ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDK
  ARM: dts: socfpga: Add missing SDMMC reset
  spl : socfpga: Implement fpga bitstream loading with socfpga loadfs

 arch/arm/dts/socfpga_arria10.dtsi  |1 +
 arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts   |   18 +
 .../include/mach/fpga_manager_arria10.h|   40 ++-
 arch/arm/mach-socfpga/spl_a10.c|   46 +++-
 configs/socfpga_arria10_defconfig  |   46 ++-
 .../fpga/altera-socfpga-a10-fpga-mgr.txt   |   21 +
 drivers/fpga/Kconfig   |9 +
 drivers/fpga/socfpga_arria10.c |  396 +++-
 8 files changed, 558 insertions(+), 19 deletions(-)

-- 
1.7.7.4

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