Re: [PATCH v11 8/9] doc:eficonfig: add documentation for eficonfig command
On Wed, Aug 17, 2022 at 06:36:13PM +0900, Masahisa Kojima wrote: > Add documentation for eficonfig command. > > Signed-off-by: Masahisa Kojima > --- > No update since v10 > > Changes in v10: > - describe how to boot system after editting by eficonfig > > Changes in v8: > - command name is changed from "efimenu" to "eficonfig" > > Newly created in v7 > > doc/usage/cmd/eficonfig.rst | 63 + > doc/usage/index.rst | 1 + > 2 files changed, 64 insertions(+) > create mode 100644 doc/usage/cmd/eficonfig.rst > > diff --git a/doc/usage/cmd/eficonfig.rst b/doc/usage/cmd/eficonfig.rst > new file mode 100644 > index 00..958e96992c > --- /dev/null > +++ b/doc/usage/cmd/eficonfig.rst > @@ -0,0 +1,63 @@ > +.. SPDX-License-Identifier: GPL-2.0+ > +.. (C) Copyright 2022, Masahisa Kojima > + > +eficonfig command > += > + > +Synopsis > + > +:: > + > +eficonfig > + > +Description > +--- > + > +The "eficonfig" command uses U-Boot menu interface and privides > +a menu-driven UEFI variable maintenance feature. > +The "eficonfig" has the following menu entries. > + > +Add Boot Option > +Add new UEFI Boot Option. > +User can edit description, file path, and optional_data. > + > +Edit Boot Option > +Edit the existing UEFI Boot Option > +User can edit description, file path, and optional_data. > + > +Change Boot Order > +Change the order of UEFI BootOrder variable. > + > +Delete Boot Option > +Delete the UEFI Boot Option > + > +Configuration > +- > + > +The "eficonfig" command is enabled by:: > + > +CONFIG_CMD_EFICONFIG=y > + > +If CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE is enabled, user can not enter > +U-Boot console. In this case, bootmenu can be used to invoke "eficonfig":: > + > +CONFIG_USE_PREBOOT=y > +CONFIG_PREBOOT="setenv bootmenu_0 UEFI Maintenance Menu=eficonfig" > + > +How to boot the system with newly added UEFI Boot Option > + > + > +"eficonfig" command is responsible to configure the UEFI variables, > +not directly handle the system boot. > +The new Boot Option added by "eficonfig" is appended at the last entry > +of UEFI BootOrder variable, user may want to change the boot order > +through "Change Boot Order". > +If the bootmenu is enabled and "eficonfig" is configured as preboot command, > +the newly added Boot Options are enumerated in the bootmenu when user exits > +from the eficonfig menu. Right, and when user quits from eficonfig, bootmenu also quits. *If possible*, I expect that we return to bootmenu's screen directly for better user-experience :) Otherwise, we have to enable U-Boot console to re-invoke bootmenu. (we can instead reboot U-Boot, though.) -Takahiro Akashi > +User may select the entry in the bootmenu to boot the system, or follow > +the U-Boot configuration the system already has. > + > +See also > + > +* :doc:`bootmenu` provides a simple mechanism for creating menus > with different boot items > diff --git a/doc/usage/index.rst b/doc/usage/index.rst > index 28f9683a3e..09f2928970 100644 > --- a/doc/usage/index.rst > +++ b/doc/usage/index.rst > @@ -35,6 +35,7 @@ Shell commands > cmd/conitrace > cmd/dm > cmd/echo > + cmd/eficonfig > cmd/env > cmd/event > cmd/exception > -- > 2.17.1 >
[PATCH v1 5/5] verdin-imx8mp: various config additions and improvements
From: Marcel Ziswiler - integrate bootcount using SNVS_LP general purpose register LPGPR0 - enable CRC32 and MD5 - enable time commands - enable GPIO LED support - enable further eMMC HS400 functionality - enable fixed PHY and MDIO driver model - enable USB host functionality - enable thermal management unit driver - enable hexdump Signed-off-by: Marcel Ziswiler --- configs/verdin-imx8mp_defconfig | 33 + 1 file changed, 29 insertions(+), 4 deletions(-) diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig index 8a6765fbf9d..2e213d41860 100644 --- a/configs/verdin-imx8mp_defconfig +++ b/configs/verdin-imx8mp_defconfig @@ -18,7 +18,10 @@ CONFIG_TARGET_VERDIN_IMX8MP=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 +CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090 CONFIG_SPL=y +CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_IMX_BOOTAUX=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x4800 CONFIG_SYS_LOAD_ADDR=0x4820 @@ -65,7 +68,9 @@ CONFIG_SYS_PBSIZE=2081 # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_EXPORTENV is not set -# CONFIG_CMD_CRC32 is not set +CONFIG_CRC32_VERIFY=y +CONFIG_CMD_MD5SUM=y +CONFIG_MD5SUM_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_CLK=y CONFIG_CMD_FUSE=y @@ -74,12 +79,14 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_READ=y CONFIG_CMD_USB=y +CONFIG_CMD_BOOTCOUNT=y CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y CONFIG_CMD_UUID=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set -# CONFIG_EFI_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y @@ -97,7 +104,7 @@ CONFIG_SPL_DM=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_BOOTCOUNT_LIMIT=y -CONFIG_BOOTCOUNT_ENV=y +CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C4 CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MP=y CONFIG_GPIO_HOG=y @@ -106,30 +113,39 @@ CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y # CONFIG_SPL_DM_I2C is not set CONFIG_SPL_SYS_I2C_LEGACY=y +CONFIG_LED=y +CONFIG_LED_GPIO=y CONFIG_MISC=y CONFIG_I2C_EEPROM=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y +CONFIG_SPL_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y +CONFIG_SPL_MMC_UHS_SUPPORT=y CONFIG_MMC_HS400_ES_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y +CONFIG_SPL_MMC_HS400_SUPPORT=y CONFIG_FSL_USDHC=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_DM_ETH_PHY=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_IMX=y CONFIG_FEC_MXC=y CONFIG_RGMII=y CONFIG_MII=y +CONFIG_PHY_IMX8MQ_USB=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y CONFIG_SPL_POWER_LEGACY=y CONFIG_POWER_DOMAIN=y CONFIG_IMX8M_POWER_DOMAIN=y +CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y @@ -141,8 +157,17 @@ CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_THERMAL=y +CONFIG_IMX_TMU=y CONFIG_USB=y -# CONFIG_SPL_DM_USB is not set +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_HOST_ETHER=y CONFIG_IMX_WATCHDOG=y +CONFIG_HEXDUMP=y CONFIG_OF_LIBFDT_OVERLAY=y -- 2.35.1
[PATCH v1 4/5] verdin-imx8mm: various config additions and improvements
From: Marcel Ziswiler
- integrate bootcount using SNVS_LP general purpose register LPGPR0
- enable link-time optimisation
- explicitly set a boot delay of one second
- enable CRC32 and MD5
- enable command for low-level access to data in a partition
- enable time commands
- enable PMIC commands
- improve ETHPRIME configuration
- enable eMMC HS400 functionality
- enable fixed PHY and MDIO driver model
- remove stale PFUZE100 PMIC driver
- enable thermal management unit driver
- enable more USB host functionality
- enable hexdump
Signed-off-by: Marcel Ziswiler
---
configs/verdin-imx8mm_defconfig | 35 +++--
1 file changed, 29 insertions(+), 6 deletions(-)
diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig
index d1029371b6d..e256e19f3a8 100644
--- a/configs/verdin-imx8mm_defconfig
+++ b/configs/verdin-imx8mm_defconfig
@@ -14,10 +14,14 @@ CONFIG_TARGET_VERDIN_IMX8MM=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_BOOTCOUNT_BOOTLIMIT=3
+CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090
CONFIG_SPL=y
+CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
CONFIG_SYS_LOAD_ADDR=0x4820
CONFIG_SYS_MEMTEST_START=0x4000
CONFIG_SYS_MEMTEST_END=0x8000
+CONFIG_LTO=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
@@ -25,7 +29,7 @@ CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_OF_SYSTEM_SETUP=y
-# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_BOOTDELAY=1
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile
imx8mm-verdin-${variant}-${fdt_board}.dtb"
CONFIG_LOG=y
@@ -54,20 +58,26 @@ CONFIG_SYS_PBSIZE=2081
# CONFIG_BOOTM_NETBSD is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_EXPORTENV is not set
-# CONFIG_CMD_CRC32 is not set
+CONFIG_CRC32_VERIFY=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_MD5SUM_VERIFY=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_READ=y
CONFIG_CMD_USB=y
+CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
CONFIG_CMD_UUID=y
+CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_ISO_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
@@ -76,11 +86,13 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_USE_ETHPRIME=y
-CONFIG_ETHPRIME="FEC"
+CONFIG_ETHPRIME="eth0"
CONFIG_VERSION_VARIABLE=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_SPL_DM=y
+CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C4
CONFIG_SPL_CLK_COMPOSITE_CCF=y
CONFIG_CLK_COMPOSITE_CCF=y
CONFIG_SPL_CLK_IMX8MM=y
@@ -91,12 +103,21 @@ CONFIG_DM_I2C=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_SPL_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_SPL_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_SPL_MMC_HS400_SUPPORT=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_PHY_FIXED=y
CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y
@@ -106,7 +127,6 @@ CONFIG_POWER_DOMAIN=y
CONFIG_IMX8M_POWER_DOMAIN=y
CONFIG_DM_PMIC=y
CONFIG_SPL_DM_PMIC_PCA9450=y
-CONFIG_DM_PMIC_PFUZE100=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
@@ -117,8 +137,11 @@ CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_PSCI=y
CONFIG_SYSRESET_WATCHDOG=y
CONFIG_DM_THERMAL=y
+CONFIG_IMX_TMU=y
CONFIG_USB=y
-# CONFIG_SPL_DM_USB is not set
CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_HOST_ETHER=y
CONFIG_IMX_WATCHDOG=y
+CONFIG_HEXDUMP=y
CONFIG_OF_LIBFDT_OVERLAY=y
--
2.35.1
[PATCH v1 3/5] verdin-imx8mm: improve and extend boot devices
From: Marcel Ziswiler
- Annotate boot devices available in spl_board_boot_device().
- Drop SD3_BOOT/MMC3_BOOT not available for boot on Verdin iMX8M Mini.
Signed-off-by: Marcel Ziswiler
---
board/toradex/verdin-imx8mm/spl.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/board/toradex/verdin-imx8mm/spl.c
b/board/toradex/verdin-imx8mm/spl.c
index 685ac94f4ca..fb9aae6c9c8 100644
--- a/board/toradex/verdin-imx8mm/spl.c
+++ b/board/toradex/verdin-imx8mm/spl.c
@@ -34,14 +34,11 @@ DECLARE_GLOBAL_DATA_PTR;
int spl_board_boot_device(enum boot_device boot_dev_spl)
{
switch (boot_dev_spl) {
- case MMC1_BOOT:
+ case MMC1_BOOT: /* eMMC */
return BOOT_DEVICE_MMC1;
- case SD2_BOOT:
+ case SD2_BOOT: /* SD card */
case MMC2_BOOT:
return BOOT_DEVICE_MMC2;
- case SD3_BOOT:
- case MMC3_BOOT:
- return BOOT_DEVICE_MMC1;
case USB_BOOT:
return BOOT_DEVICE_BOARD;
default:
@@ -83,7 +80,6 @@ int board_fit_config_name_match(const char *name)
}
#endif
-
__weak void board_early_init(void)
{
init_uart_clk(0);
--
2.35.1
[PATCH v1 2/5] verdin-imx8mm: prepare for optional job ring driver model
From: Marcel Ziswiler
Prepare for optional job ring driver model. Sec may be initialized based
on the job ring information processed from the device tree.
Signed-off-by: Marcel Ziswiler
---
board/toradex/verdin-imx8mm/spl.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/board/toradex/verdin-imx8mm/spl.c
b/board/toradex/verdin-imx8mm/spl.c
index 243c97e0ba0..685ac94f4ca 100644
--- a/board/toradex/verdin-imx8mm/spl.c
+++ b/board/toradex/verdin-imx8mm/spl.c
@@ -56,6 +56,15 @@ void spl_dram_init(void)
void spl_board_init(void)
{
+ if (IS_ENABLED(CONFIG_FSL_CAAM)) {
+ struct udevice *dev;
+ int ret;
+
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(caam_jr), );
+ if (ret)
+ printf("Failed to initialize %s: %d\n", dev->name, ret);
+ }
+
/* Serial download mode */
if (is_usb_boot()) {
puts("Back to ROM, SDP\n");
--
2.35.1
[PATCH v1 1/5] verdin-imx8mm: verdin-imx8mp: update env memory layout
From: Marcel Ziswiler
Update the distro config env memory layout for the Verdin iMX8M Mini and
Verdin iMX8M Plus:
- loadaddr=0x4820 allows for 128MB area for uncompressing (ie FIT
images, kernel_comp_addr_r, kernel_comp_size)
- fdt_addr_r = loadaddr + 128MB - allows for 128MB kernel
- scriptaddr = fdt_addr_r + 512KB - allows for 512KB fdt
- ramdisk_addr_r = scriptaddr + 512KB - allows for 512KB script
Memory layout taken from commit fd5c7173ade4
("imx8m{m,n}_venice: update env memory layout").
Note that for our regular BSP Layers and Reference Images for Yocto
Project an updated distro boot script is required (see
meta-toradex-bsp-common/recipes-bsp/u-boot/u-boot-distro-boot).
Signed-off-by: Marcel Ziswiler
---
configs/verdin-imx8mm_defconfig | 2 +-
configs/verdin-imx8mp_defconfig | 2 +-
include/configs/verdin-imx8mm.h | 10 ++
include/configs/verdin-imx8mp.h | 10 ++
4 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig
index 275a29bf4f9..d1029371b6d 100644
--- a/configs/verdin-imx8mm_defconfig
+++ b/configs/verdin-imx8mm_defconfig
@@ -15,7 +15,7 @@ CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
-CONFIG_SYS_LOAD_ADDR=0x4048
+CONFIG_SYS_LOAD_ADDR=0x4820
CONFIG_SYS_MEMTEST_START=0x4000
CONFIG_SYS_MEMTEST_END=0x8000
CONFIG_DISTRO_DEFAULTS=y
diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig
index 0804fbff915..8a6765fbf9d 100644
--- a/configs/verdin-imx8mp_defconfig
+++ b/configs/verdin-imx8mp_defconfig
@@ -21,7 +21,7 @@ CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x4800
-CONFIG_SYS_LOAD_ADDR=0x4350
+CONFIG_SYS_LOAD_ADDR=0x4820
CONFIG_SYS_MEMTEST_START=0x4000
CONFIG_SYS_MEMTEST_END=0x8000
CONFIG_DISTRO_DEFAULTS=y
diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h
index 5b5fce9bda1..ec893763215 100644
--- a/include/configs/verdin-imx8mm.h
+++ b/include/configs/verdin-imx8mm.h
@@ -20,10 +20,12 @@
#endif
#define MEM_LAYOUT_ENV_SETTINGS \
- "fdt_addr_r=0x4400\0" \
- "kernel_addr_r=0x4200\0" \
- "ramdisk_addr_r=0x4640\0" \
- "scriptaddr=0x4600\0"
+ "fdt_addr_r=0x5020\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "kernel_comp_addr_r=0x4020\0" \
+ "kernel_comp_size=0x0800\0" \
+ "ramdisk_addr_r=0x5030\0" \
+ "scriptaddr=0x5028\0"
/* Enable Distro Boot */
#define BOOT_TARGET_DEVICES(func) \
diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h
index fca40beba18..959c15f598e 100644
--- a/include/configs/verdin-imx8mp.h
+++ b/include/configs/verdin-imx8mp.h
@@ -34,10 +34,12 @@
#endif /* CONFIG_CMD_NET */
#define MEM_LAYOUT_ENV_SETTINGS \
- "fdt_addr_r=0x4300\0" \
- "kernel_addr_r=0x4000\0" \
- "ramdisk_addr_r=0x4640\0" \
- "scriptaddr=0x4600\0"
+ "fdt_addr_r=0x5020\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "kernel_comp_addr_r=0x4020\0" \
+ "kernel_comp_size=0x0800\0" \
+ "ramdisk_addr_r=0x5030\0" \
+ "scriptaddr=0x5028\0"
/* Enable Distro Boot */
#define BOOT_TARGET_DEVICES(func) \
--
2.35.1
[PATCH v1 0/5] verdin-imx8mm: verdin-imx8mp: various additions and improvements
From: Marcel Ziswiler Various additions and improvements for the Verdin iMX8M Mini and Verdin iMX8M Plus: - updated env memory layout - verdin-imx8mm: prepare for optional job ring driver model - verdin-imx8mm: improve and extend boot devices - various config additions and improvements Marcel Ziswiler (5): verdin-imx8mm: verdin-imx8mp: update env memory layout verdin-imx8mm: prepare for optional job ring driver model verdin-imx8mm: improve and extend boot devices verdin-imx8mm: various config additions and improvements verdin-imx8mp: various config additions and improvements board/toradex/verdin-imx8mm/spl.c | 17 +- configs/verdin-imx8mm_defconfig | 37 +-- configs/verdin-imx8mp_defconfig | 35 - include/configs/verdin-imx8mm.h | 10 + include/configs/verdin-imx8mp.h | 10 + 5 files changed, 83 insertions(+), 26 deletions(-) -- 2.35.1
Re: [PATCH v11 6/9] bootmenu: add removable media entries
Hi Akashi-san,
On Fri, 19 Aug 2022 at 10:31, Takahiro Akashi
wrote:
>
> On Wed, Aug 17, 2022 at 06:36:11PM +0900, Masahisa Kojima wrote:
> > UEFI specification requires booting from removal media using
> > a architecture-specific default image name such as BOOTAA64.EFI.
> > This commit adds the removable media entries into bootmenu,
> > so that user can select the removable media and boot with
> > default image.
> >
> > The bootmenu automatically enumerates the possible bootable
> > media devices supporting EFI_SIMPLE_FILE_SYSTEM_PROTOCOL,
> > add it as new UEFI boot option(BOOT) and update BootOrder
> > variable. This automatically generated UEFI boot option
>
> Should this feature belong to bootmenu command?
> Under the current implementation, those boot options are
> generated only by bootmenu, and so if eficonfig is invoked
> prior to bootmenu, we won't see them (under "Change Boot Order").
>
> I expect that the functionality be also provided in eficonfig
> (or even as part of system initialization?).
OK, generating the (removable) media boot options will be added
in "Change Boot Order".
Thanks,
Masahisa Kojima
>
> -Takahiro Akashi
>
>
> > has the dedicated guid in the optional_data to distinguish it from
> > the UEFI boot option user adds manually. This optional_data is
> > removed when the efi bootmgr loads the selected UEFI boot option.
> >
> > This commit also provides the BOOT variable maintenance feature.
> > Depending on the system hardware setup, some devices
> > may not exist at a later system boot, so bootmenu checks the
> > available device in each bootmenu invocation and automatically
> > removes the BOOT variable corrensponding to the non-existent
> > media device.
> >
> > Signed-off-by: Masahisa Kojima
> > ---
> > Changes in v11:
> > - update delete_boot_option() parameter
> >
> > Changes in v10:
> > - add function comment
> > - devname dynamic allocation removes, allocate in stack
> > - delete BOOT when updating BootOrder fails
> >
> > Changes in v9:
> > - update efi_disk_get_device_name() parameter to pass efi_handle_t
> > - add function comment
> >
> > Changes in v8:
> > - function and structure prefix is changed to "eficonfig"
> >
> > Changes in v7:
> > - rename prepare_media_device_entry() to generate_media_device_boot_option()
> >
> > Changes in v6:
> > - optional_data size is changed to 16bytes
> > - check the load option size before comparison
> > - remove guid included in optional_data of auto generated
> > entry when loading
> >
> > Changes in v5:
> > - Return EFI_SUCCESS if there is no BootOrder defined
> > - correctly handle the case if no removable device found
> > - use guid to identify the automatically generated entry by bootmenu
> >
> > cmd/bootmenu.c | 106 +--
> > cmd/eficonfig.c | 135 +++
> > include/efi_loader.h | 20 ++
> > lib/efi_loader/efi_bootmgr.c | 4 ++
> > 4 files changed, 260 insertions(+), 5 deletions(-)
> >
> > diff --git a/cmd/bootmenu.c b/cmd/bootmenu.c
> > index 704d36debe..04df41a0cb 100644
> > --- a/cmd/bootmenu.c
> > +++ b/cmd/bootmenu.c
> > @@ -220,7 +220,93 @@ static int prepare_bootmenu_entry(struct bootmenu_data
> > *menu,
> > return 1;
> > }
> >
> > -#if (CONFIG_IS_ENABLED(CMD_BOOTEFI_BOOTMGR))
> > +#if (CONFIG_IS_ENABLED(CMD_BOOTEFI_BOOTMGR)) &&
> > (CONFIG_IS_ENABLED(CMD_EFICONFIG))
> > +/**
> > + * generate_media_device_boot_option() - generate the media device boot
> > option
> > + *
> > + * This function enumerates all devices supporting
> > EFI_SIMPLE_FILE_SYSTEM_PROTOCOL
> > + * and generate the bootmenu entries.
> > + * This function also provide the BOOT variable maintenance for
> > + * the media device entries.
> > + * - Automatically create the BOOT variable for the newly detected
> > device,
> > + * this BOOT variable is distinguished by the special GUID
> > + * stored in the EFI_LOAD_OPTION.optional_data
> > + * - If the device is not attached to the system, the associated
> > BOOT variable
> > + * is automatically deleted.
> > + *
> > + * Return: status code
> > + */
> > +static efi_status_t generate_media_device_boot_option(void)
> > +{
> > + u32 i;
> > + efi_status_t ret;
> > + efi_uintn_t count;
> > + efi_handle_t *volume_handles = NULL;
> > + struct eficonfig_media_boot_option *opt = NULL;
> > +
> > + ret = efi_locate_handle_buffer_int(BY_PROTOCOL,
> > _simple_file_system_protocol_guid,
> > +NULL, , (efi_handle_t
> > **)_handles);
> > + if (ret != EFI_SUCCESS)
> > + return ret;
> > +
> > + opt = calloc(count, sizeof(struct eficonfig_media_boot_option));
> > + if (!opt)
> > + goto out;
> > +
> > + /* enumerate all devices supporting EFI_SIMPLE_FILE_SYSTEM_PROTOCOL */
> > + ret = eficonfig_enumerate_boot_option(opt, volume_handles, count);
> > + if
Re: [PATCH v11 6/9] bootmenu: add removable media entries
On Wed, Aug 17, 2022 at 06:36:11PM +0900, Masahisa Kojima wrote:
> UEFI specification requires booting from removal media using
> a architecture-specific default image name such as BOOTAA64.EFI.
> This commit adds the removable media entries into bootmenu,
> so that user can select the removable media and boot with
> default image.
>
> The bootmenu automatically enumerates the possible bootable
> media devices supporting EFI_SIMPLE_FILE_SYSTEM_PROTOCOL,
> add it as new UEFI boot option(BOOT) and update BootOrder
> variable. This automatically generated UEFI boot option
Should this feature belong to bootmenu command?
Under the current implementation, those boot options are
generated only by bootmenu, and so if eficonfig is invoked
prior to bootmenu, we won't see them (under "Change Boot Order").
I expect that the functionality be also provided in eficonfig
(or even as part of system initialization?).
-Takahiro Akashi
> has the dedicated guid in the optional_data to distinguish it from
> the UEFI boot option user adds manually. This optional_data is
> removed when the efi bootmgr loads the selected UEFI boot option.
>
> This commit also provides the BOOT variable maintenance feature.
> Depending on the system hardware setup, some devices
> may not exist at a later system boot, so bootmenu checks the
> available device in each bootmenu invocation and automatically
> removes the BOOT variable corrensponding to the non-existent
> media device.
>
> Signed-off-by: Masahisa Kojima
> ---
> Changes in v11:
> - update delete_boot_option() parameter
>
> Changes in v10:
> - add function comment
> - devname dynamic allocation removes, allocate in stack
> - delete BOOT when updating BootOrder fails
>
> Changes in v9:
> - update efi_disk_get_device_name() parameter to pass efi_handle_t
> - add function comment
>
> Changes in v8:
> - function and structure prefix is changed to "eficonfig"
>
> Changes in v7:
> - rename prepare_media_device_entry() to generate_media_device_boot_option()
>
> Changes in v6:
> - optional_data size is changed to 16bytes
> - check the load option size before comparison
> - remove guid included in optional_data of auto generated
> entry when loading
>
> Changes in v5:
> - Return EFI_SUCCESS if there is no BootOrder defined
> - correctly handle the case if no removable device found
> - use guid to identify the automatically generated entry by bootmenu
>
> cmd/bootmenu.c | 106 +--
> cmd/eficonfig.c | 135 +++
> include/efi_loader.h | 20 ++
> lib/efi_loader/efi_bootmgr.c | 4 ++
> 4 files changed, 260 insertions(+), 5 deletions(-)
>
> diff --git a/cmd/bootmenu.c b/cmd/bootmenu.c
> index 704d36debe..04df41a0cb 100644
> --- a/cmd/bootmenu.c
> +++ b/cmd/bootmenu.c
> @@ -220,7 +220,93 @@ static int prepare_bootmenu_entry(struct bootmenu_data
> *menu,
> return 1;
> }
>
> -#if (CONFIG_IS_ENABLED(CMD_BOOTEFI_BOOTMGR))
> +#if (CONFIG_IS_ENABLED(CMD_BOOTEFI_BOOTMGR)) &&
> (CONFIG_IS_ENABLED(CMD_EFICONFIG))
> +/**
> + * generate_media_device_boot_option() - generate the media device boot
> option
> + *
> + * This function enumerates all devices supporting
> EFI_SIMPLE_FILE_SYSTEM_PROTOCOL
> + * and generate the bootmenu entries.
> + * This function also provide the BOOT variable maintenance for
> + * the media device entries.
> + * - Automatically create the BOOT variable for the newly detected
> device,
> + * this BOOT variable is distinguished by the special GUID
> + * stored in the EFI_LOAD_OPTION.optional_data
> + * - If the device is not attached to the system, the associated BOOT
> variable
> + * is automatically deleted.
> + *
> + * Return: status code
> + */
> +static efi_status_t generate_media_device_boot_option(void)
> +{
> + u32 i;
> + efi_status_t ret;
> + efi_uintn_t count;
> + efi_handle_t *volume_handles = NULL;
> + struct eficonfig_media_boot_option *opt = NULL;
> +
> + ret = efi_locate_handle_buffer_int(BY_PROTOCOL,
> _simple_file_system_protocol_guid,
> +NULL, , (efi_handle_t
> **)_handles);
> + if (ret != EFI_SUCCESS)
> + return ret;
> +
> + opt = calloc(count, sizeof(struct eficonfig_media_boot_option));
> + if (!opt)
> + goto out;
> +
> + /* enumerate all devices supporting EFI_SIMPLE_FILE_SYSTEM_PROTOCOL */
> + ret = eficonfig_enumerate_boot_option(opt, volume_handles, count);
> + if (ret != EFI_SUCCESS)
> + goto out;
> +
> + /*
> + * System hardware configuration may vary depending on the user setup.
> + * The boot option is automatically added by the bootmenu.
> + * If the device is not attached to the system, the boot option needs
> + * to be deleted.
> + */
> + ret = eficonfig_delete_invalid_boot_option(opt, count);
> + if (ret !=
[PATCH] efi_loader: disk: remove unused field
The field, ifname, in efi_disk_obj is set but never used anywhere.
Just remove it.
Signed-off-by: AKASHI Takahiro
---
lib/efi_loader/efi_disk.c | 13 ++---
1 file changed, 2 insertions(+), 11 deletions(-)
diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index 1d700b2a6be3..7d9e973e5672 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -29,7 +29,6 @@ const efi_guid_t efi_system_partition_guid =
PARTITION_SYSTEM_GUID;
*
* @header:EFI object header
* @ops: EFI disk I/O protocol interface
- * @ifname:interface name for block device
* @dev_index: device index of block device
* @media: block I/O media information
* @dp:device path to the block device
@@ -40,7 +39,6 @@ const efi_guid_t efi_system_partition_guid =
PARTITION_SYSTEM_GUID;
struct efi_disk_obj {
struct efi_object header;
struct efi_block_io ops;
- const char *ifname;
int dev_index;
struct efi_block_io_media media;
struct efi_device_path *dp;
@@ -380,7 +378,6 @@ static int efi_fs_exists(struct blk_desc *desc, int part)
*
* @parent:parent handle
* @dp_parent: parent device path
- * @if_typename: interface name for block device
* @desc: internal block device
* @dev_index: device index for block device
* @part_info: partition info
@@ -391,7 +388,6 @@ static int efi_fs_exists(struct blk_desc *desc, int part)
static efi_status_t efi_disk_add_dev(
efi_handle_t parent,
struct efi_device_path *dp_parent,
- const char *if_typename,
struct blk_desc *desc,
int dev_index,
struct disk_partition *part_info,
@@ -476,7 +472,6 @@ static efi_status_t efi_disk_add_dev(
return ret;
}
diskobj->ops = block_io_disk_template;
- diskobj->ifname = if_typename;
diskobj->dev_index = dev_index;
/* Fill in EFI IO Media info (for read/write callbacks) */
@@ -534,15 +529,13 @@ static int efi_disk_create_raw(struct udevice *dev)
{
struct efi_disk_obj *disk;
struct blk_desc *desc;
- const char *if_typename;
int diskid;
efi_status_t ret;
desc = dev_get_uclass_plat(dev);
- if_typename = blk_get_if_type_name(desc->if_type);
diskid = desc->devnum;
- ret = efi_disk_add_dev(NULL, NULL, if_typename, desc,
+ ret = efi_disk_add_dev(NULL, NULL, desc,
diskid, NULL, 0, );
if (ret != EFI_SUCCESS) {
if (ret == EFI_NOT_READY)
@@ -577,7 +570,6 @@ static int efi_disk_create_part(struct udevice *dev)
{
efi_handle_t parent;
struct blk_desc *desc;
- const char *if_typename;
struct disk_part *part_data;
struct disk_partition *info;
unsigned int part;
@@ -591,7 +583,6 @@ static int efi_disk_create_part(struct udevice *dev)
return -1;
desc = dev_get_uclass_plat(dev_get_parent(dev));
- if_typename = blk_get_if_type_name(desc->if_type);
diskid = desc->devnum;
part_data = dev_get_uclass_plat(dev);
@@ -603,7 +594,7 @@ static int efi_disk_create_part(struct udevice *dev)
return -1;
dp_parent = (struct efi_device_path *)handler->protocol_interface;
- ret = efi_disk_add_dev(parent, dp_parent, if_typename, desc, diskid,
+ ret = efi_disk_add_dev(parent, dp_parent, desc, diskid,
info, part, );
if (ret != EFI_SUCCESS) {
log_err("Adding partition for %s failed\n", dev->name);
--
2.36.1
Re: [PATCH v2] dm: core: Do not stop uclass iteration on error.
On Thu, Aug 18, 2022 at 11:49:53AM -0600, Simon Glass wrote:
> Hi Michal,
>
> On Wed, 17 Aug 2022 at 02:28, Michal Suchanek wrote:
> >
> > When probing a device fails NULL pointer is returned, and other devices
> > cannot be iterated. Skip to next device on error instead.
> >
> > Fixes: 6494d708bf ("dm: Add base driver model support")
> > Signed-off-by: Michal Suchanek
> > ---
> > v2: Fix up tests
> >
> > Note: there is seemingly bogus repeated device_remove(parent,
> DM_REMOVE_NORMAL);
> > but I have no idea what the intent was, and fixing that is out of the
> > scope of this patch anyway.
>
> This is to remove child devices that have been probed, so that we get back
> to the original state.
Thanks, it makes sense now.
> >
> > drivers/core/uclass.c | 30 +-
> > test/dm/test-fdt.c| 20
> > 2 files changed, 37 insertions(+), 13 deletions(-)
> >
> > diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
> > index 08d9ed82de..ccf7d59141 100644
> > --- a/drivers/core/uclass.c
> > +++ b/drivers/core/uclass.c
> > @@ -574,16 +574,31 @@ int uclass_get_device_by_phandle(enum uclass_id id,
> struct udevice *parent,
> > }
> > #endif
> >
> > +/* Starting from the given device return first device in the uclass that
> probes successfully */
> > +static int __uclass_next_device(struct udevice *dev, int ret, struct
> udevice **devp)
>
> Can you avoid __ as this is reserved for compiler. Perhaps use a single
> underscore?
>
> Please check 80cols
whatever
> > +{
> > + if (!dev) {
> > + *devp = dev;
> > + return 0;
> > + }
>
> Is this for people that call next after they shouldn't?
This is for the case if there is nothing.
> > + while ((ret = uclass_get_device_tail(dev, ret, devp))) {
> > + ret = uclass_find_next_device();
> > + if (!dev) {
> > + *devp = dev;
> > + return 0;
> > + }
> > + }
> > +
> > + return ret;
> > +}
> > +
> > int uclass_first_device(enum uclass_id id, struct udevice **devp)
> > {
> > - struct udevice *dev;
> > + struct udevice *dev = NULL;
>
> Can you drop the NULL assignment? uclass_find_first_device() sets dev to
> NULL anyway, as a first step.
>
> > int ret;
> >
> > - *devp = NULL;
>
> Is this safe to remove? If there is nothing, then
it's the same as uclass_next_device() on the last device.
>
> > ret = uclass_find_first_device(id, );
> > - if (!dev)
> > - return 0;
> > - return uclass_get_device_tail(dev, ret, devp);
> > + return __uclass_next_device(dev, ret, devp);
> > }
> >
> > int uclass_first_device_err(enum uclass_id id, struct udevice **devp)
> > @@ -604,11 +619,8 @@ int uclass_next_device(struct udevice **devp)
> > struct udevice *dev = *devp;
> > int ret;
> >
> > - *devp = NULL;
> > ret = uclass_find_next_device();
> > - if (!dev)
> > - return 0;
> > - return uclass_get_device_tail(dev, ret, devp);
> > + return __uclass_next_device(dev, ret, devp);
> > }
>
> This is a major change in behaviour, so please do update the API docs at
> dm/uclass.h
Yes, those need updating as well.
Thanks
Michal
[PATCH v4] cmd: Add pause command
This command is being introduced with the goal of allowing user-friendly
"generic use case" U-Boot builds to pause until user input under some
situations.
The main use case would be when a boot failure happens, to pause until
the user has had time to acknowledge the current state.
Tested using:
make && ./u-boot -v -T -c 'ut lib lib_test_hush_pause'
Signed-off-by: Samuel Dionne-Riel
Cc: Simon Glass
---
Hi!
I believe everything is addressed. I took the comment about the sort
order being wonky as needing no changes.
Changes for v4
- No functional change in command, mainly code style
- Addressed nits
- Added missing docs
- Wrote test fully in code
Changes for v3
- No functional change in patch
- Sent with lines unwrapped
- Added changelog
Changes for v2
- Added test, as requested by Tom
- Made CMD_PAUSE default n
---
cmd/Kconfig | 6 +
cmd/Makefile| 1 +
cmd/pause.c | 32 ++
configs/sandbox64_defconfig | 1 +
configs/sandbox_defconfig | 1 +
doc/usage/cmd/pause.rst | 53 +
doc/usage/index.rst | 1 +
test/cmd/Makefile | 3 +++
test/cmd/test_pause.c | 45 +++
9 files changed, 143 insertions(+)
create mode 100644 cmd/pause.c
create mode 100644 doc/usage/cmd/pause.rst
create mode 100644 test/cmd/test_pause.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 3625ff2a50b..e8d1f73cd0d 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1961,6 +1961,12 @@ config CMD_GETTIME
milliseconds. See also the 'bootstage' command which provides more
flexibility for boot timing.
+config CMD_PAUSE
+ bool "pause command"
+ help
+ Delay execution waiting for any user input.
+ Useful to allow the user to read a failure log.
+
config CMD_RNG
bool "rng command"
depends on DM_RNG
diff --git a/cmd/Makefile b/cmd/Makefile
index 5e43a1e022e..98a6224bdc1 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -102,6 +102,7 @@ obj-$(CONFIG_CMD_MFSL) += mfsl.o
obj-$(CONFIG_CMD_MII) += mii.o
obj-$(CONFIG_CMD_MISC) += misc.o
obj-$(CONFIG_CMD_MDIO) += mdio.o
+obj-$(CONFIG_CMD_PAUSE) += pause.o
obj-$(CONFIG_CMD_SLEEP) += sleep.o
obj-$(CONFIG_CMD_MMC) += mmc.o
obj-$(CONFIG_CMD_OPTEE_RPMB) += optee_rpmb.o
diff --git a/cmd/pause.c b/cmd/pause.c
new file mode 100644
index 000..c97833c0d70
--- /dev/null
+++ b/cmd/pause.c
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021
+ * Samuel Dionne-Riel
+ */
+
+#include
+#include
+
+static int do_pause(struct cmd_tbl *cmdtp, int flag, int argc, char *const
argv[])
+{
+ char *message = "Press any key to continue...";
+
+ if (argc == 2)
+ message = argv[1];
+
+ /* No newline, so it sticks to the bottom of the screen */
+ printf("%s", message);
+
+ /* Wait on "any" key... */
+ (void) getchar();
+
+ /* Since there was no newline, we need it now */
+ printf("\n");
+
+ return CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD(pause, 2, 1, do_pause,
+ "delay until user input",
+ "[prompt] - Wait until users presses any key. [prompt] can be used to
customize the message.\n"
+);
diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index 6553568e768..0af582d642d 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -67,6 +67,7 @@ CONFIG_CMD_BMP=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_RTC=y
CONFIG_CMD_TIME=y
+CONFIG_CMD_PAUSE=y
CONFIG_CMD_TIMER=y
CONFIG_CMD_SOUND=y
CONFIG_CMD_QFW=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index eba7bcbb483..d856d9b0942 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -96,6 +96,7 @@ CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_RTC=y
CONFIG_CMD_TIME=y
+CONFIG_CMD_PAUSE=y
CONFIG_CMD_TIMER=y
CONFIG_CMD_SOUND=y
CONFIG_CMD_QFW=y
diff --git a/doc/usage/cmd/pause.rst b/doc/usage/cmd/pause.rst
new file mode 100644
index 000..c79e399c020
--- /dev/null
+++ b/doc/usage/cmd/pause.rst
@@ -0,0 +1,53 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later:
+
+pause command
+=
+
+Synopsis
+
+
+::
+
+pause [prompt]
+
+
+Description
+---
+
+The pause command delays execution waiting for any user input.
+
+It can accept a single parameter to change the prompt message.
+
+Examples
+
+
+Using with the default prompt:
+
+::
+
+=> pause
+Press any key to continue...
+
+
+Using with a custom prompt:
+
+::
+
+=> pause 'Prompt for pause...'
+Prompt for pause...
+
+Note that complex prompts require proper quoting:
+
+::
+
+=> pause Prompt for pause...
+pause - delay until user input
+
+Usage:
+pause [prompt] - Wait until users presses any key. [prompt] can be used to
customize the message.
+
+Return value
+
+
+The return value $? is always set to 0
Re: [PATCH v8 06/13] FWU: Add helper functions for accessing FWU metadata
Hi Sughosh,
On Wed, 17 Aug 2022 at 06:44, Sughosh Ganu wrote:
>
> Add weak functions for getting the update index value and dfu
> alternate number needed for FWU Multi Bank update
> functionality.
>
> The current implementation for getting the update index value is for
> platforms with 2 banks. If a platform supports more than 2 banks, it
> can implement it's own function. The function to get the dfu alternate
> number has been added for platforms with GPT partitioned storage
> devices. Platforms with other storage partition scheme need to
> implement their own function.
>
> Signed-off-by: Sughosh Ganu
> Reviewed-by: Patrick Delaunay
> ---
> Changes since V7:
> * Moved the API's fwu_plat_get_update_index() and
> fwu_plat_get_alt_num() as weak functions in common code as suggested
> by Ilias.
>
> include/fwu.h | 1 +
> lib/fwu_updates/Makefile | 7 +++
> lib/fwu_updates/fwu.c | 22
> lib/fwu_updates/fwu_gpt.c | 104 ++
> 4 files changed, 134 insertions(+)
> create mode 100644 lib/fwu_updates/Makefile
> create mode 100644 lib/fwu_updates/fwu.c
> create mode 100644 lib/fwu_updates/fwu_gpt.c
>
> diff --git a/include/fwu.h b/include/fwu.h
> index 8259c75d12..f14175cc9a 100644
> --- a/include/fwu.h
> +++ b/include/fwu.h
> @@ -51,4 +51,5 @@ int fwu_clear_accept_image(efi_guid_t *img_type_id, u32
bank);
>
> int fwu_plat_get_alt_num(struct udevice *dev, efi_guid_t *image_guid,
> int *alt_num);
> +int fwu_plat_get_update_index(u32 *update_idx);
Don't forget to add a proper comment, also this should be uint, not u32
> #endif /* _FWU_H_ */
> diff --git a/lib/fwu_updates/Makefile b/lib/fwu_updates/Makefile
> new file mode 100644
> index 00..1993088e5b
> --- /dev/null
> +++ b/lib/fwu_updates/Makefile
> @@ -0,0 +1,7 @@
> +# SPDX-License-Identifier: GPL-2.0-or-later
> +#
> +# Copyright (c) 2022, Linaro Limited
> +#
> +
> +obj-$(CONFIG_FWU_MULTI_BANK_UPDATE) += fwu.o
> +obj-$(CONFIG_FWU_MDATA_GPT_BLK) += fwu_gpt.o
> diff --git a/lib/fwu_updates/fwu.c b/lib/fwu_updates/fwu.c
> new file mode 100644
> index 00..9808036eec
> --- /dev/null
> +++ b/lib/fwu_updates/fwu.c
> @@ -0,0 +1,22 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright (c) 2022, Linaro Limited
> + */
> +
> +#include
> +#include
> +
> +__weak int fwu_plat_get_update_index(u32 *update_idx)
This should come from the device tree, right?
> +{
> + int ret;
> + u32 active_idx;
> +
> + ret = fwu_get_active_index(_idx);
> +
> + if (ret < 0)
> + return -1;
> +
> + *update_idx = active_idx ^= 0x1;
> +
> + return ret;
> +}
> diff --git a/lib/fwu_updates/fwu_gpt.c b/lib/fwu_updates/fwu_gpt.c
> new file mode 100644
> index 00..b7ccca3645
> --- /dev/null
> +++ b/lib/fwu_updates/fwu_gpt.c
> @@ -0,0 +1,104 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright (c) 2022, Linaro Limited
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include
> +
> +static int get_gpt_dfu_identifier(struct blk_desc *desc, efi_guid_t
*image_guid)
> +{
> + int i;
> + struct disk_partition info;
> + efi_guid_t unique_part_guid;
> +
> + for (i = 1; i < MAX_SEARCH_PARTITIONS; i++) {
> + if (part_get_info(desc, i, ))
> + continue;
> + uuid_str_to_bin(info.uuid, unique_part_guid.b,
> + UUID_STR_FORMAT_GUID);
> +
> + if (!guidcmp(_part_guid, image_guid))
> + return i;
> + }
> +
> + log_err("No partition found with image_guid %pUs\n", image_guid);
> + return -ENOENT;
> +}
> +
> +static int fwu_gpt_get_alt_num(struct blk_desc *desc, efi_guid_t
*image_guid,
> + int *alt_num, unsigned char dfu_dev)
> +{
> + int ret = -1;
> + int i, part, dev_num;
> + int nalt;
> + struct dfu_entity *dfu;
> +
> + dev_num = desc->devnum;
> + part = get_gpt_dfu_identifier(desc, image_guid);
> + if (part < 0)
> + return -ENOENT;
> +
> + dfu_init_env_entities(NULL, NULL);
> +
> + nalt = 0;
> + list_for_each_entry(dfu, _list, list) {
> + nalt++;
> + }
> +
> + if (!nalt) {
> + log_warning("No entities in dfu_alt_info\n");
> + dfu_free_entities();
> + return -ENOENT;
> + }
> +
> + for (i = 0; i < nalt; i++) {
> + dfu = dfu_get_entity(i);
> +
> + if (!dfu)
> + continue;
> +
> + /*
> +* Currently, Multi Bank update
> +* feature is being supported
> +* only on GPT partitioned
> +* MMC/SD devices.
> +*/
> + if (dfu->dev_type != dfu_dev)
> +
Re: [PATCH v8 02/13] FWU: Add FWU metadata structure and driver for accessing metadata
pHi Sughosh,
On Thu, 18 Aug 2022 at 05:03, Sughosh Ganu wrote:
>
> hi Simon,
>
> On Thu, 18 Aug 2022 at 06:43, Simon Glass wrote:
> >
> > Hi Sughosh,
> >
> > On Wed, 17 Aug 2022 at 06:44, Sughosh Ganu
wrote:
> > >
> > > In the FWU Multi Bank Update feature, the information about the
> > > updatable images is stored as part of the metadata, which is stored on
> > > a dedicated partition. Add the metadata structure, and a driver model
> > > uclass which provides functions to access the metadata. These are
> > > generic API's, and implementations can be added based on parameters
> > > like how the metadata partition is accessed and what type of storage
> > > device houses the metadata.
> > >
> > > Signed-off-by: Sughosh Ganu
> > > Reviewed-by: Patrick Delaunay
> > > ---
> > > Changes since V7:
> > > * Rephrased the error message in fwu_update_active_index as per
> > > suggestion from Ilias.
> > > * Reworked the logic in fwu_get_image_alt_num() as per the suggestion
> > > from Ilias.
> > >
> > > drivers/Kconfig | 2 +
> > > drivers/Makefile | 1 +
> > > drivers/fwu-mdata/Kconfig| 7 +
> > > drivers/fwu-mdata/Makefile | 6 +
> > > drivers/fwu-mdata/fwu-mdata-uclass.c | 463
+++
> > > include/dm/uclass-id.h | 1 +
> > > include/fwu.h| 49 +++
> > > include/fwu_mdata.h | 67
> > > 8 files changed, 596 insertions(+)
> > > create mode 100644 drivers/fwu-mdata/Kconfig
> > > create mode 100644 drivers/fwu-mdata/Makefile
> > > create mode 100644 drivers/fwu-mdata/fwu-mdata-uclass.c
> > > create mode 100644 include/fwu.h
> > > create mode 100644 include/fwu_mdata.h
> > >
> > > diff --git a/drivers/Kconfig b/drivers/Kconfig
> > > index 8b6fead351..75ac149d31 100644
> > > --- a/drivers/Kconfig
> > > +++ b/drivers/Kconfig
> > > @@ -44,6 +44,8 @@ source "drivers/fuzz/Kconfig"
> > >
> > > source "drivers/fpga/Kconfig"
> > >
> > > +source "drivers/fwu-mdata/Kconfig"
> > > +
> > > source "drivers/gpio/Kconfig"
> > >
> > > source "drivers/hwspinlock/Kconfig"
[..]
> > > +int fwu_verify_mdata(struct fwu_mdata *mdata, bool pri_part)
> > > +{
> > > + u32 calc_crc32;
> > > + void *buf;
> > > +
> > > + buf = >version;
> > > + calc_crc32 = crc32(0, buf, sizeof(*mdata) - sizeof(u32));
> > > +
> > > + if (calc_crc32 != mdata->crc32) {
> > > + log_err("crc32 check failed for %s FWU metadata
partition\n",
> > > + pri_part ? "primary" : "secondary");
> > > + return -1;
> >
> > Please use an -Exxx value like -EPERM
>
> I don't think there is any value which relates to a crc mismatch. If
> you insist, I can think of -EIO, but I don't think -EPERM is a good
> match in this case.
See my comment in the other patch. You should not be printing messages in a
uclass or driver, except in extreme situations.
Choose a value that is somewhat meaningful so you can report the error
sensibly in top-level command code.
>
> >
> > > + }
> > > +
> > > + return 0;
> > > +}
> > > +
> > > +/**
> > > + * fwu_get_active_index() - Get active_index from the FWU metadata
> > > + * @active_idx: active_index value to be read
> > > + *
> > > + * Read the active_index field from the FWU metadata and place it in
> > > + * the variable pointed to be the function argument.
> > > + *
> > > + * Return: 0 if OK, -ve on error
> > > + *
> > > + */
> > > +int fwu_get_active_index(u32 *active_idx)
> >
> > Return the active index rather than having an arg?
>
> I would prefer to keep it the way it is. That allows returning an
> error value and keep the active_index separate. Moreover it is just a
> single parameter.
OK, then can you use active_idxp for the name, as is generally done in
driver model?
>
> >
> > > +{
> > > + int ret;
> > > + struct fwu_mdata *mdata = NULL;
> > > +
> > > + ret = fwu_get_mdata();
> >
> > Can you use a local var and avoid the malloc() / free() ?
>
> Do you see any disadvantages of using space on the heap? If you don't
> have a strong opinion on this, I would prefer to keep it as is.
Yes, this is not UEFI and we try to avoid allocating memory to no purpose.
It takes time and fragments the heap.
>
> >
> > > + if (ret < 0) {
> > > + log_err("Unable to get valid FWU metadata\n");
> > > + goto out;
> > > + }
> > > +
> > > + /*
> > > +* Found the FWU metadata partition, now read the active_index
> > > +* value
> > > +*/
> > > + *active_idx = mdata->active_index;
> > > + if (*active_idx > CONFIG_FWU_NUM_BANKS - 1) {
> > > + log_err("Active index value read is incorrect\n");
> > > + ret = -EINVAL;
> > > + }
> > > +
> > > +out:
> > > + free(mdata);
> > > +
> > > + return ret;
> > > +}
> > > +
> > > +/**
> > > + * fwu_update_active_index() -
Re: [PATCH v2] dm: core: Do not stop uclass iteration on error.
Hi Michal,
On Wed, 17 Aug 2022 at 02:28, Michal Suchanek wrote:
>
> When probing a device fails NULL pointer is returned, and other devices
> cannot be iterated. Skip to next device on error instead.
>
> Fixes: 6494d708bf ("dm: Add base driver model support")
> Signed-off-by: Michal Suchanek
> ---
> v2: Fix up tests
>
> Note: there is seemingly bogus repeated device_remove(parent,
DM_REMOVE_NORMAL);
> but I have no idea what the intent was, and fixing that is out of the
> scope of this patch anyway.
This is to remove child devices that have been probed, so that we get back
to the original state.
>
> drivers/core/uclass.c | 30 +-
> test/dm/test-fdt.c| 20
> 2 files changed, 37 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
> index 08d9ed82de..ccf7d59141 100644
> --- a/drivers/core/uclass.c
> +++ b/drivers/core/uclass.c
> @@ -574,16 +574,31 @@ int uclass_get_device_by_phandle(enum uclass_id id,
struct udevice *parent,
> }
> #endif
>
> +/* Starting from the given device return first device in the uclass that
probes successfully */
> +static int __uclass_next_device(struct udevice *dev, int ret, struct
udevice **devp)
Can you avoid __ as this is reserved for compiler. Perhaps use a single
underscore?
Please check 80cols
> +{
> + if (!dev) {
> + *devp = dev;
> + return 0;
> + }
Is this for people that call next after they shouldn't?
> + while ((ret = uclass_get_device_tail(dev, ret, devp))) {
> + ret = uclass_find_next_device();
> + if (!dev) {
> + *devp = dev;
> + return 0;
> + }
> + }
> +
> + return ret;
> +}
> +
> int uclass_first_device(enum uclass_id id, struct udevice **devp)
> {
> - struct udevice *dev;
> + struct udevice *dev = NULL;
Can you drop the NULL assignment? uclass_find_first_device() sets dev to
NULL anyway, as a first step.
> int ret;
>
> - *devp = NULL;
Is this safe to remove? If there is nothing, then
> ret = uclass_find_first_device(id, );
> - if (!dev)
> - return 0;
> - return uclass_get_device_tail(dev, ret, devp);
> + return __uclass_next_device(dev, ret, devp);
> }
>
> int uclass_first_device_err(enum uclass_id id, struct udevice **devp)
> @@ -604,11 +619,8 @@ int uclass_next_device(struct udevice **devp)
> struct udevice *dev = *devp;
> int ret;
>
> - *devp = NULL;
> ret = uclass_find_next_device();
> - if (!dev)
> - return 0;
> - return uclass_get_device_tail(dev, ret, devp);
> + return __uclass_next_device(dev, ret, devp);
> }
This is a major change in behaviour, so please do update the API docs at
dm/uclass.h
>
> int uclass_next_device_err(struct udevice **devp)
> diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c
> index 6118ad42ca..165b4f5554 100644
> --- a/test/dm/test-fdt.c
> +++ b/test/dm/test-fdt.c
> @@ -417,16 +417,28 @@ static int dm_test_first_next_device(struct
unit_test_state *uts)
> pdata = dev_get_plat(dev);
> pdata->probe_err = -ENOMEM;
> device_remove(parent, DM_REMOVE_NORMAL);
> - ut_assertok(uclass_first_device(UCLASS_TEST_PROBE, ));
> - ut_asserteq(-ENOMEM, uclass_next_device());
> - ut_asserteq_ptr(dev, NULL);
> + for (ret = uclass_first_device(UCLASS_TEST_PROBE, ), count =
0;
> +dev;
> +ret = uclass_next_device()) {
> + count++;
> + parent = dev_get_parent(dev);
> + }
> + ut_assertok(ret);
> + ut_asserteq(3, count);
>
> /* Now an error on the first one */
> ut_assertok(uclass_get_device(UCLASS_TEST_PROBE, 0, ));
> pdata = dev_get_plat(dev);
> pdata->probe_err = -ENOENT;
> device_remove(parent, DM_REMOVE_NORMAL);
> - ut_asserteq(-ENOENT, uclass_first_device(UCLASS_TEST_PROBE,
));
> + for (ret = uclass_first_device(UCLASS_TEST_PROBE, ), count =
0;
> +dev;
> +ret = uclass_next_device()) {
> + count++;
> + parent = dev_get_parent(dev);
> + }
> + ut_assertok(ret);
> + ut_asserteq(2, count);
>
> return 0;
> }
> --
> 2.37.1
>
Regards,
Simon
Re: [PATCH v3] cmd: Add pause command
Hi Samuel,
On Wed, 17 Aug 2022 at 20:16, Samuel Dionne-Riel
wrote:
>
> This command is being introduced with the goal of allowing user-friendly
> "generic use case" U-Boot builds to pause until user input under some
> situations.
>
> The main use case would be when a boot failure happens, to pause until
> the user has had time to acknowledge the current state.
>
> Tested using:
>
> make && ./u-boot -v -T -c 'ut lib lib_test_hush_pause'
Looks good. I suppose you know that if you leave out the -v you don't see
the output.
>
> Signed-off-by: Samuel Dionne-Riel
> ---
> Hi,
>
> I hit a snag when sending v2, and lines ended-up wrapped. In addition
> I also forgot to include the changelog.
>
> It seems the patch on patchwork was also broken in a way it was not
> on my end. I do not know why the lines ended-up mis-ordered.
>
> Please tell if I should have used RESEND v2, since technically the
> content of the patch are unchanged.
>
> Changes for v3
> - No functional change in patch
> - Sent with lines unwrapped
> - Added changelog
>
> Changes for v2
> - Added test, as requested by Tom
> - Made CMD_PAUSE default n
>
> ---
> cmd/Kconfig | 7 +
> cmd/Makefile| 1 +
> cmd/pause.c | 35 +
> configs/sandbox64_defconfig | 1 +
> configs/sandbox_defconfig | 1 +
> test/cmd/Makefile | 3 ++
> test/cmd/test_pause.c | 62 +
> 7 files changed, 110 insertions(+)
> create mode 100644 cmd/pause.c
> create mode 100644 test/cmd/test_pause.c
Please also add doc/usage/cmd/pause.rst
(check with 'make htmldocs')
>
> diff --git a/cmd/Kconfig b/cmd/Kconfig
> index 3625ff2a50b..e774670a35c 100644
> --- a/cmd/Kconfig
> +++ b/cmd/Kconfig
> @@ -1961,6 +1961,13 @@ config CMD_GETTIME
> milliseconds. See also the 'bootstage' command which provides
more
> flexibility for boot timing.
>
> +config CMD_PAUSE
> + bool "pause command"
> + default n
The default is n so drop this
> + help
> + Delay execution waiting for any user input.
> + Useful to allow the user to read a failure log.
> +
> config CMD_RNG
> bool "rng command"
> depends on DM_RNG
> diff --git a/cmd/Makefile b/cmd/Makefile
> index 5e43a1e022e..98a6224bdc1 100644
> --- a/cmd/Makefile
> +++ b/cmd/Makefile
> @@ -102,6 +102,7 @@ obj-$(CONFIG_CMD_MFSL) += mfsl.o
> obj-$(CONFIG_CMD_MII) += mii.o
> obj-$(CONFIG_CMD_MISC) += misc.o
> obj-$(CONFIG_CMD_MDIO) += mdio.o
> +obj-$(CONFIG_CMD_PAUSE) += pause.o
Hmm the sorting has got a bit wonky here over time!
> obj-$(CONFIG_CMD_SLEEP) += sleep.o
> obj-$(CONFIG_CMD_MMC) += mmc.o
> obj-$(CONFIG_CMD_OPTEE_RPMB) += optee_rpmb.o
> diff --git a/cmd/pause.c b/cmd/pause.c
> new file mode 100644
> index 000..07bf346f3d1
> --- /dev/null
> +++ b/cmd/pause.c
> @@ -0,0 +1,35 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * (C) Copyright 2021
> + * Samuel Dionne-Riel
> + */
> +
> +#include
> +#include
> +
> +static int do_pause(struct cmd_tbl *cmdtp, int flag, int argc, char
*const argv[])
> +{
> + char *message = "Press any key to continue...";
> +
> + if (argc > 2)
> + return CMD_RET_USAGE;
I think this happened automatically since you specify 2 as the max args
below.
> +
> + if (argc == 2)
> + message = argv[1];
> +
> + /* No newline, so it sticks to the bottom of the screen */
> + printf("%s", message);
> +
> + /* Wait on "any" key... */
> + (void) getchar();
> +
> + /* Since there was no newline, we need it now. */
can drop the .
> + printf("\n");
> +
> + return CMD_RET_SUCCESS;
> +}
> +
> +U_BOOT_CMD(pause, 2, 1, do_pause,
> + "delay until user input",
> + "pause [prompt] - Wait until users presses any key. [prompt] can
be used to customize the message.\n"
> +);
> diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
> index 6553568e768..0af582d642d 100644
> --- a/configs/sandbox64_defconfig
> +++ b/configs/sandbox64_defconfig
> @@ -67,6 +67,7 @@ CONFIG_CMD_BMP=y
> CONFIG_CMD_EFIDEBUG=y
> CONFIG_CMD_RTC=y
> CONFIG_CMD_TIME=y
> +CONFIG_CMD_PAUSE=y
> CONFIG_CMD_TIMER=y
> CONFIG_CMD_SOUND=y
> CONFIG_CMD_QFW=y
> diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
> index eba7bcbb483..d856d9b0942 100644
> --- a/configs/sandbox_defconfig
> +++ b/configs/sandbox_defconfig
> @@ -96,6 +96,7 @@ CONFIG_CMD_BOOTCOUNT=y
> CONFIG_CMD_EFIDEBUG=y
> CONFIG_CMD_RTC=y
> CONFIG_CMD_TIME=y
> +CONFIG_CMD_PAUSE=y
> CONFIG_CMD_TIMER=y
> CONFIG_CMD_SOUND=y
> CONFIG_CMD_QFW=y
> diff --git a/test/cmd/Makefile b/test/cmd/Makefile
> index c331757425e..1bb02d93a23 100644
> --- a/test/cmd/Makefile
> +++ b/test/cmd/Makefile
> @@ -5,6 +5,9 @@
> ifdef CONFIG_HUSH_PARSER
> obj-$(CONFIG_CONSOLE_RECORD) += test_echo.o
> endif
> +ifdef CONFIG_CONSOLE_RECORD
> +obj-$(CONFIG_CMD_PAUSE) +=
Re: [PATCH v8 08/13] FWU: Add boot time checks as highlighted by the FWU specification
Hi Sughosh, On Thu, 18 Aug 2022 at 05:42, Sughosh Ganu wrote: > > hi Simon, > > On Thu, 18 Aug 2022 at 08:51, Simon Glass wrote: > > > > Hi Sughosh, > > > > On Wed, 17 Aug 2022 at 06:44, Sughosh Ganu wrote: > > > > > > The FWU Multi Bank Update specification requires the Update Agent to > > > carry out certain checks at the time of platform boot. The Update > > > Agent is the component which is responsible for updating the firmware > > > components and maintaining and keeping the metadata in sync. > > > > > > The spec requires that the Update Agent perform the following checks > > > at the time of boot > > > * Sanity check of both the metadata copies maintained by the platform. > > > * Get the boot index passed to U-Boot by the prior stage bootloader > > > and use this value for metadata bookkeeping. > > > * Check if the system is booting in Trial State. If the system boots > > > in the Trial State for more than a specified number of boot counts, > > > change the Active Bank to be booting the platform from. > > > > > > Add these checks in the board initialisation sequence, invoked after > > > relocation. > > > > > > Signed-off-by: Sughosh Ganu > > > --- > > > Changes since V7: > > > * Introduce trial_counter_update() to increment and delete the > > > TrialStateCtr variable. > > > * Introduce in_trial_state() to check if the platform is booting in > > > Trial State. > > > > > > common/board_r.c | 5 ++ > > > include/fwu.h | 3 + > > > lib/fwu_updates/fwu.c | 175 ++ > > > 3 files changed, 183 insertions(+) > > > > We should use the event system instead of adding another hook. We are > > trying to get rid of them! > > Okay, I will check about this. > > > > > Also, please separate out the fwu change from touching common code > > (although you may not need to touch comment code with events). > > The FWU specification requires certain checks to be run at the > platform boot time. Not sure how else will that be done(although this > might not be relevant if I can use events). > You can have an 'fwu' command to handle this. Regards, Simon > -sughosh
Re: [PATCH v8 10/13] FWU: cmd: Add a command to read FWU metadata
Hi Sughosh, On Thu, 18 Aug 2022 at 05:53, Sughosh Ganu wrote: > > hi Simon, > > On Thu, 18 Aug 2022 at 08:51, Simon Glass wrote: > > > > Hi Sugosh, > > > > On Wed, 17 Aug 2022 at 06:44, Sughosh Ganu wrote: > > > > > > Add a command to read the metadata as specified in the FWU > > > specification and print the fields of the metadata. > > > > > > Signed-off-by: Sughosh Ganu > > > Reviewed-by: Ilias Apalodimas > > > --- > > > Changes since V7: None > > > > > > cmd/Kconfig | 7 + > > > cmd/Makefile| 1 + > > > cmd/fwu_mdata.c | 80 + > > > 3 files changed, 88 insertions(+) > > > create mode 100644 cmd/fwu_mdata.c > > > > This needs docs and a test. > > > > BTW I forgot to mention that the uclass needs a simple test of some sort. > > > > https://u-boot.readthedocs.io/en/latest/develop/tests_writing.html > > Okay. I will check how this can be done. Btw, there are plans to add a > test for the feature once support for the feature has been added on > the Synquacer platform. That test will exercise the above command as > well as the driver code. Do we still need a standalone test for the > uclass? Yes, testing on real hardware has nothing to do with the uclass test, which runs on sandbox. It should be a small unit test like others in test/dm/... Regards, Simon
Re: [PATCH v8 03/13] FWU: Add FWU metadata access driver for GPT partitioned block devices
Hi Sughosh,
On Thu, 18 Aug 2022 at 05:39, Sughosh Ganu wrote:
>
> hi Simon,
>
> On Thu, 18 Aug 2022 at 08:51, Simon Glass wrote:
> >
> > Hi Sughosh,
> >
> > On Wed, 17 Aug 2022 at 06:44, Sughosh Ganu
wrote:
> > >
> > > In the FWU Multi Bank Update feature, the information about the
> > > updatable images is stored as part of the metadata, on a separate
> > > partition. Add a driver for reading from and writing to the metadata
> > > when the updatable images and the metadata are stored on a block
> > > device which is formated with GPT based partition scheme.
> > >
> > > Signed-off-by: Sughosh Ganu
> > > Reviewed-by: Patrick Delaunay
> > > ---
> > > Changes since V7: None
> > >
> > > drivers/fwu-mdata/Kconfig | 9 +
> > > drivers/fwu-mdata/Makefile| 1 +
> > > drivers/fwu-mdata/fwu_mdata_gpt_blk.c | 410
++
> > > include/fwu.h | 5 +
> > > 4 files changed, 425 insertions(+)
> > > create mode 100644 drivers/fwu-mdata/fwu_mdata_gpt_blk.c
> > >
> > > diff --git a/drivers/fwu-mdata/Kconfig b/drivers/fwu-mdata/Kconfig
> > > index d6a21c8e19..d5edef19d6 100644
> > > --- a/drivers/fwu-mdata/Kconfig
> > > +++ b/drivers/fwu-mdata/Kconfig
> > > @@ -5,3 +5,12 @@ config DM_FWU_MDATA
> > > Enable support for accessing FWU Metadata partitions. The
> > > FWU Metadata partitions reside on the same storage device
> > > which contains the other FWU updatable firmware images.
> >
> > Can we link to the docs here, or will it be easy for people to find in
> > the U-Boot docs?
>
> The link to the spec is being provided in the documentation for the
> feature. I guess that should suffice.
Yes it's the U-Boot documentation that I am referring to. I assume people
can type 'FWU metadata' in the docs and it will come up. If so, that seems
OK.
>
> >
> > > +
> > > +config FWU_MDATA_GPT_BLK
> > > + bool "FWU Metadata access for GPT partitioned Block devices"
> > > + select PARTITION_TYPE_GUID
> > > + select PARTITION_UUIDS
> > > + depends on DM && HAVE_BLOCK_DEVICE && EFI_PARTITION
> > > + help
> > > + Enable support for accessing FWU Metadata on GPT partitioned
> > > + block devices.
> >
> > GPT-partitioned (I think)
>
> I see "GPT partition" being used elsewhere. I don't have a strong
> opinion on this though.
>
> >
> > > diff --git a/drivers/fwu-mdata/Makefile b/drivers/fwu-mdata/Makefile
> > > index e53a8c9983..313049f67a 100644
> > > --- a/drivers/fwu-mdata/Makefile
> > > +++ b/drivers/fwu-mdata/Makefile
> > > @@ -4,3 +4,4 @@
> > > #
> > >
> > > obj-$(CONFIG_DM_FWU_MDATA) += fwu-mdata-uclass.o
> > > +obj-$(CONFIG_FWU_MDATA_GPT_BLK) += fwu_mdata_gpt_blk.o
> > > diff --git a/drivers/fwu-mdata/fwu_mdata_gpt_blk.c
b/drivers/fwu-mdata/fwu_mdata_gpt_blk.c
> >
> > Perhaps just call it gpt_blk.c since it is in this directory
>
> Actually, there are both type of examples that can be seen under
> drivers/. For e.g. the drivers/clk/ has all files starting with clk_*.
> Similarly, under drivers/reset/. But there are other examples as well.
> But this is not a big effort. I will change the name as per your
> suggestion.
>
> >
> > > new file mode 100644
> > > index 00..f694c4369b
> > > --- /dev/null
> > > +++ b/drivers/fwu-mdata/fwu_mdata_gpt_blk.c
> > > @@ -0,0 +1,410 @@
> > > +// SPDX-License-Identifier: GPL-2.0-or-later
> > > +/*
> > > + * Copyright (c) 2022, Linaro Limited
> > > + */
> > > +
> > > +#define LOG_CATEGORY UCLASS_FWU_MDATA
> > > +
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +
> > > +#define PRIMARY_PART BIT(0)
> > > +#define SECONDARY_PART BIT(1)
> > > +#define BOTH_PARTS (PRIMARY_PART | SECONDARY_PART)
> > > +
> > > +#define MDATA_READ BIT(0)
> > > +#define MDATA_WRITEBIT(1)
> > > +
> >
> > comment?
>
> Umm, is the macro name not descriptive enough? They are just being
> used to select a read or write operation.
I mean the function below
>
> >
> > > +static int gpt_get_mdata_partitions(struct blk_desc *desc,
> > > + u16 *primary_mpart,
> > > + u16 *secondary_mpart)
> >
> > Should use uint, no need to select a 16-bit var so far as I can get
>
> Okay
>
[..]
> > > +static int gpt_get_mdata(struct blk_desc *desc, struct fwu_mdata
**mdata)
> >
> > mdatap
>
> Okay
>
> >
> > > +{
> > > + int ret;
> > > + u16 primary_mpart = 0, secondary_mpart = 0;
> >
> > uint
>
> Okay
>
> >
> > Also do you need to set them to 0
> >
> > Declare a locate mdata and use that here instead of *mdata, which is a
pain.
>
> This function is copying the metadata into the callers copy. Unless I
> don't understand your comment.
I mean it is easier to
Re: DHCP and TFTP
Hi Jim,
On Thu, 18 Aug 2022 at 06:54, Jim Schaettle
wrote:
>
> Hello! I have U-Boot installed on the SD card of my Orange Pi. It works
great, using SRVLOC to get the address of the server, DHCP to get an IP
address, and TFTP to get the application files.
>
> I also have a rack of 48 Orange Pi devices with the same U-Boot code in
their SD cards. They all have a common power supply. When they boot,
sometimes do_pxe() runs before net_ip is set. (There are many devices
trying to get IP addresses.)
>
> I have my own copy of the U-Boot code. Is there an environment variable
that I can set, or a code change that I can make? For example:
>
> static int do_pxe(struct cmd_tbl *cmdtp, int flag, int argc, char *const
argv[]) {
> struct cmd_tbl *cp;
>
> if (net_ip.s_addr == 0) {
> // now what?
> }
> ...
>
> Do you have any ideas? Thank you!
Do you see an error on the console, such as a failure to obtain an IP
address?
Regards,
Simon
RE: DHCP and TFTP
You should possibly be able to call the DHCP init the same way it is done in
cmd/net.c function netboot_common
size = net_loop(proto);
if (size < 0) {
bootstage_error(BOOTSTAGE_ID_NET_NETLOOP_OK);
return CMD_RET_FAILURE;
}
bootstage_mark(BOOTSTAGE_ID_NET_NETLOOP_OK);
/* net_loop ok, update environment */
netboot_update_env();
net_loop I think will do DHCP init and then netboot_update_env will set the env
vars such as the ip address
-Original Message-
From: Jim Schaettle
Sent: Wednesday, August 17, 2022 9:18 AM
To: u-boot@lists.denx.de
Subject: DHCP and TFTP
Hello! I have U-Boot installed on the SD card of my Orange Pi. It works great,
using SRVLOC to get the address of the server, DHCP to get an IP address, and
TFTP to get the application files.
I also have a rack of 48 Orange Pi devices with the same U-Boot code in their
SD cards. They all have a common power supply. When they boot, sometimes
do_pxe() runs before net_ip is set. (There are many devices trying to get IP
addresses.)
I have my own copy of the U-Boot code. Is there an environment variable that I
can set, or a code change that I can make? For example:
static int do_pxe(struct cmd_tbl *cmdtp, int flag, int argc, char *const
argv[]) {
struct cmd_tbl *cp;
if (net_ip.s_addr == 0) {
// now what?
}
...
Do you have any ideas? Thank you!
Jim Schaettle
[PATCH] Makefile: Use relative paths for debugging symbols.
From: Vagrant Cascadian The KBUILD_CFLAGS and KBUILD_AFLAGS variables are adjusted to use -ffile-prefix-map and --debug-prefix-map, respectively, to use relative paths for occurrences of __FILE__ and debug paths. This enables reproducible builds regardless of the absolute path to the build directory: https://reproducible-builds.org/docs/build-path/ Signed-off-by: Vagrant Cascadian --- Makefile | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 1a66f69a4b..b40b9b2444 100644 --- a/Makefile +++ b/Makefile @@ -751,14 +751,18 @@ KBUILD_CFLAGS += $(call cc-disable-warning, stringop-overflow) # Enabled with W=2, disabled by default as noisy KBUILD_CFLAGS += $(call cc-disable-warning, maybe-uninitialized) -# change __FILE__ to the relative path from the srctree -KBUILD_CFLAGS += $(call cc-option,-fmacro-prefix-map=$(srctree)/=) +# change __FILE__ and debugging symbols to the relative path from the +# srctree +KBUILD_CFLAGS += $(call cc-option,-ffile-prefix-map=$(srctree)/=) KBUILD_CFLAGS += -g # $(KBUILD_AFLAGS) sets -g, which causes gcc to pass a suitable -g # option to the assembler. KBUILD_AFLAGS += -g +# Use relative paths in debugging symbols +KBUILD_AFLAGS += --debug-prefix-map=$(srctree)/= + # Report stack usage if supported # ARC tools based on GCC 7.1 has an issue with stack usage # with naked functions, see commit message for more details -- 2.35.1
Re: [PATCH v3] cmd: cat: add new command
On 8/18/22 18:54, Roger Knecht wrote:
Add cat command to print file content to standard out
Signed-off-by: Roger Knecht
---
v3:
- Disable 'cat' by default (CONFIG_CMD_CAT=n)
- Enable 'cat' in sandbox and sandbox64 defconfig
- Use map_to_sysmem() to fix "phys_to_virt: Cannot map sandbox address"
- Use puts() instead of a loop
- Added python test
- Addd usage documentation
v2:
- Moved cat from boot to shell commands
- Added MAINTAINERS entry
- Added comments
- Improved variable naming
MAINTAINERS| 5 +++
cmd/Kconfig| 6 +++
cmd/Makefile | 1 +
cmd/cat.c | 67 ++
configs/sandbox64_defconfig| 1 +
configs/sandbox_defconfig | 1 +
doc/usage/cmd/cat.rst | 49 ++
test/py/tests/test_cat/conftest.py | 33 +++
test/py/tests/test_cat/test_cat.py | 22 ++
9 files changed, 185 insertions(+)
create mode 100644 cmd/cat.c
create mode 100644 doc/usage/cmd/cat.rst
create mode 100644 test/py/tests/test_cat/conftest.py
create mode 100644 test/py/tests/test_cat/test_cat.py
diff --git a/MAINTAINERS b/MAINTAINERS
index 5857fbf398..2864f84274 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -765,6 +765,11 @@ M: Simon Glass
S:Maintained
F:tools/buildman/
+CAT
+M: Roger Knecht
+S: Maintained
+F: cmd/cat.c
+
CFI FLASH
M:Stefan Roese
S:Maintained
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 211ebe9c87..ce7e876475 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1531,6 +1531,12 @@ endmenu
menu "Shell scripting commands"
+config CMD_CAT
+ bool "cat"
+ default n
+ help
+ Print file to standard output
+
config CMD_ECHO
bool "echo"
default y
diff --git a/cmd/Makefile b/cmd/Makefile
index 6e87522b62..1d2590e958 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_CMD_BOOTZ) += bootz.o
obj-$(CONFIG_CMD_BOOTI) += booti.o
obj-$(CONFIG_CMD_BTRFS) += btrfs.o
obj-$(CONFIG_CMD_BUTTON) += button.o
+obj-$(CONFIG_CMD_CAT) += cat.o
obj-$(CONFIG_CMD_CACHE) += cache.o
obj-$(CONFIG_CMD_CBFS) += cbfs.o
obj-$(CONFIG_CMD_CLK) += clk.o
diff --git a/cmd/cat.c b/cmd/cat.c
new file mode 100644
index 00..c217617cd6
--- /dev/null
+++ b/cmd/cat.c
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022
+ * Roger Knecht
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+static int do_cat(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ char *buffer;
+ phys_addr_t buffer_sysmem_addr;
+ loff_t file_size;
+ int ret;
+
+ if (argc < 4)
+ return CMD_RET_USAGE;
+
+ // get file size
+ ret = fs_set_blk_dev(argv[1], argv[2], FS_TYPE_ANY);
+ if (ret)
+ return ret;
+
+ ret = fs_size(argv[3], _size);
+ if (ret)
+ return ret;
+
+ // allocate memory for file content
+ buffer = malloc(file_size + 1);
+ if (!buffer)
+ return -ENOMEM;
Please, do_cat must only return values from enum command_ret_t.
+
+ memset(buffer, 0, file_size + 1);
Our calloc() implementation already sets the buffer to zero. So you can
save one function call.
+
+ // map pointer to system memory
+ buffer_sysmem_addr = map_to_sysmem(buffer);
+
+ // read file to memory
+ ret = fs_set_blk_dev(argv[1], argv[2], FS_TYPE_ANY);
+ if (ret)
+ return ret;
+
+ ret = fs_read(argv[3], buffer_sysmem_addr, 0, 0, _size);
+ if (ret)
+ return ret;
+
+ // unmap system memory
+ unmap_sysmem(buffer);
+
+ // print file content
+ buffer[file_size] = '\0';
+ puts(buffer);
+
+ free(buffer);
+
+ return 0;
+}
+
+U_BOOT_CMD(cat, 4, 1, do_cat,
+ "print file to standard output",
Please, observe CONFIG_SYS_LONGHELP. Have a look at cmd/bootefi.c or others.
Best regards
Heinrich
+ " \n"
+ " - Print file from 'dev' on 'interface' to standard output");
diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index 6553568e76..b2c9f19f11 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -22,6 +22,7 @@ CONFIG_CONSOLE_RECORD=y
CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000
CONFIG_PRE_CONSOLE_BUFFER=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_CMD_CAT=y
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index eba7bcbb48..2136c76fe3 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -36,6 +36,7 @@ CONFIG_LOG_DEFAULT_LEVEL=6
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_STACKPROTECTOR=y
CONFIG_ANDROID_AB=y
+CONFIG_CMD_CAT=y
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
Re: [PATCH v8 05/13] stm32mp1: dk2: Add image information for capsule updates
On 8/18/22 14:06, Sughosh Ganu wrote:
hi Yann,
On Thu, 18 Aug 2022 at 13:35, Yann Gautier wrote:
On 8/17/22 14:43, Sughosh Ganu wrote:
Enabling capsule update functionality on the platform requires
populating information on the images that are to be updated using the
functionality. Do so for the DK2 board.
Signed-off-by: Sughosh Ganu
Reviewed-by: Patrick Delaunay
Reviewed-by: Ilias Apalodimas
---
Changes since V7: None
board/st/stm32mp1/stm32mp1.c | 23 +++
include/configs/stm32mp15_common.h | 4
2 files changed, 27 insertions(+)
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 9496890d16..0fda8f150d 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -87,6 +88,16 @@
#define USB_START_LOW_THRESHOLD_UV 123
#define USB_START_HIGH_THRESHOLD_UV 215
+#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
+struct efi_fw_image fw_images[1];
+
+struct efi_capsule_update_info update_info = {
+ .images = fw_images,
+};
+
+u8 num_image_type_guids = ARRAY_SIZE(fw_images);
+#endif /* EFI_HAVE_CAPSULE_SUPPORT */
+
int board_early_init_f(void)
{
/* nothing to do, only used in SPL */
@@ -670,6 +681,18 @@ int board_init(void)
setup_led(LEDST_ON);
+#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
+ if (board_is_stm32mp15x_dk2()) {
+ efi_guid_t image_type_guid = STM32MP15_DK2_FIP_IMAGE_GUID;
+ guidcpy(_images[0].image_type_id, _type_guid);
+ fw_images[0].fw_name = u"STM32MP15-DK2-FIP";
+ /*
+ * For FWU multi bank update, the image
+ * index will be computed at runtime
+ */
+ fw_images[0].image_index = 0;
+ }
+#endif
return 0;
}
diff --git a/include/configs/stm32mp15_common.h
b/include/configs/stm32mp15_common.h
index c5412ffeb3..6ab10d8ce5 100644
--- a/include/configs/stm32mp15_common.h
+++ b/include/configs/stm32mp15_common.h
@@ -34,6 +34,10 @@
#define CONFIG_SERVERIP 192.168.1.1
#endif
Hi Sugosh,
Sorry for the late review.
+#define STM32MP15_DK2_FIP_IMAGE_GUID \
Although this is now only supported on this STM32MP15_DK2 board, I don't
think this macro should be tight to the board name, as it may be used
for other STM32MP boards. I'd just use STM32MP_FIP_IMAGE_GUID.
This should be the same for the fw_images[0].fw_name.
The idea of this GUID is to identify or associate an image with a
platform. Will the FIP image be common across multiple STM32MP
platforms? If we use a common GUID that might be shared across
multiple ST boards, it would be possible to flash an image generated
for the ev1 board on the dk2 board. However, you would know better
about ST platforms. So I can change this as per your suggestion.
Thanks.
-sughosh
Hi Sughosh,
This GUID is generic in TF-A for all STM32MP platforms.
Having a per board GUID in U-Boot might then be an issue.
And we'll end up with lots of GUIDs for each new board that will support
FWU.
But maybe I miss something here.
Yann
Best regards,
Yann
+ EFI_GUID(0x19d5df83, 0x11b0, 0x457b, 0xbe, 0x2c, \
+ 0x75, 0x59, 0xc1, 0x31, 0x42, 0xa5)
+
/*/
#ifdef CONFIG_DISTRO_DEFAULTS
/*/
[PATCH v2 14/28] arch: rockchip: Add cru header for rv1126
Add clock and reset unit header include for rv1126.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
.../include/asm/arch-rockchip/cru_rv1126.h| 459 ++
1 file changed, 459 insertions(+)
create mode 100644 arch/arm/include/asm/arch-rockchip/cru_rv1126.h
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
new file mode 100644
index 00..49a1f76379
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1126.h
@@ -0,0 +1,459 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2019 Rockchip Electronics Co. Ltd.
+ * Author: Finley Xiao
+ */
+
+#ifndef _ASM_ARCH_CRU_RV1126_H
+#define _ASM_ARCH_CRU_RV1126_H
+
+#define MHz100
+#define KHz1000
+#define OSC_HZ (24 * MHz)
+
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
+#define APLL_HZ(1008 * MHz)
+#else
+#define APLL_HZ(816 * MHz)
+#endif
+#define GPLL_HZ(1188 * MHz)
+#define CPLL_HZ(500 * MHz)
+#define HPLL_HZ(1400 * MHz)
+#define PCLK_PDPMU_HZ (100 * MHz)
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
+#define ACLK_PDBUS_HZ (396 * MHz)
+#else
+#define ACLK_PDBUS_HZ (500 * MHz)
+#endif
+#define HCLK_PDBUS_HZ (200 * MHz)
+#define PCLK_PDBUS_HZ (100 * MHz)
+#define ACLK_PDPHP_HZ (300 * MHz)
+#define HCLK_PDPHP_HZ (200 * MHz)
+#define HCLK_PDCORE_HZ (200 * MHz)
+#define HCLK_PDAUDIO_HZ(150 * MHz)
+#define CLK_OSC0_DIV_HZ(32768)
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
+#define ACLK_PDVI_HZ (297 * MHz)
+#define CLK_ISP_HZ (297 * MHz)
+#define ACLK_PDISPP_HZ (297 * MHz)
+#define CLK_ISPP_HZ(237 * MHz)
+#define ACLK_VOP_HZ(300 * MHz)
+#define DCLK_VOP_HZ(65 * MHz)
+#endif
+
+/* RV1126 pll id */
+enum rv1126_pll_id {
+ APLL,
+ DPLL,
+ CPLL,
+ HPLL,
+ GPLL,
+ PLL_COUNT,
+};
+
+struct rv1126_clk_info {
+ unsigned long id;
+ char *name;
+ bool is_cru;
+};
+
+/* Private data for the clock driver - used by rockchip_get_cru() */
+struct rv1126_pmuclk_priv {
+ struct rv1126_pmucru *pmucru;
+ ulong gpll_hz;
+};
+
+struct rv1126_clk_priv {
+ struct rv1126_cru *cru;
+ struct rv1126_grf *grf;
+ ulong gpll_hz;
+ ulong cpll_hz;
+ ulong hpll_hz;
+ ulong armclk_hz;
+ ulong armclk_enter_hz;
+ ulong armclk_init_hz;
+ bool sync_kernel;
+ bool set_armclk_rate;
+};
+
+struct rv1126_pll {
+ unsigned int con0;
+ unsigned int con1;
+ unsigned int con2;
+ unsigned int con3;
+ unsigned int con4;
+ unsigned int con5;
+ unsigned int con6;
+ unsigned int reserved0[1];
+};
+
+struct rv1126_pmucru {
+ unsigned int pmu_mode;
+ unsigned int reserved1[3];
+ struct rv1126_pll pll;
+ unsigned int offsetcal_status;
+ unsigned int reserved2[51];
+ unsigned int pmu_clksel_con[14];
+ unsigned int reserved3[18];
+ unsigned int pmu_clkgate_con[3];
+ unsigned int reserved4[29];
+ unsigned int pmu_softrst_con[2];
+ unsigned int reserved5[14];
+ unsigned int pmu_autocs_con[2];
+};
+
+check_member(rv1126_pmucru, pmu_autocs_con[1], 0x244);
+
+struct rv1126_cru {
+ struct rv1126_pll pll[4];
+ unsigned int offsetcal_status[4];
+ unsigned int mode;
+ unsigned int reserved1[27];
+ unsigned int clksel_con[78];
+ unsigned int reserved2[18];
+ unsigned int clkgate_con[25];
+ unsigned int reserved3[7];
+ unsigned int softrst_con[15];
+ unsigned int reserved4[17];
+ unsigned int ssgtbl[32];
+ unsigned int glb_cnt_th;
+ unsigned int glb_rst_st;
+ unsigned int glb_srst_fst;
+ unsigned int glb_srst_snd;
+ unsigned int glb_rst_con;
+ unsigned int reserved5[11];
+ unsigned int sdmmc_con[2];
+ unsigned int sdio_con[2];
+ unsigned int emmc_con[2];
+ unsigned int reserved6[2];
+ unsigned int gmac_con;
+ unsigned int misc[2];
+ unsigned int reserved7[45];
+ unsigned int autocs_con[26];
+};
+
+check_member(rv1126_cru, autocs_con[25], 0x584);
+
+struct pll_rate_table {
+ unsigned long rate;
+ unsigned int fbdiv;
+ unsigned int postdiv1;
+ unsigned int refdiv;
+ unsigned int postdiv2;
+ unsigned int dsmpd;
+ unsigned int frac;
+};
+
+struct cpu_rate_table {
+ unsigned long rate;
+ unsigned int aclk_div;
+ unsigned int pclk_div;
+};
+
+#define RV1126_PMU_MODE0x0
+#define RV1126_PMU_PLL_CON(x) ((x) * 0x4 + 0x10)
+#define RV1126_PLL_CON(x) ((x) * 0x4)
+#define RV1126_MODE_CON0x90
+
+enum {
+ /* CRU_PMU_CLK_SEL0_CON */
+ RTC32K_SEL_SHIFT= 7,
+ RTC32K_SEL_MASK
[PATCH v2 28/28] board: Add Edgeble AI Edge Compute Module 0 Carrier
Edge Compute Module 0 Carrier is an industrial form factor evaluation
board from Edgeble AI.
General features:
- microSD slot
- 2x MIPI CSI2 connectors
- MIPI DSI connector
- 2x USB Host
- 1x USB OTG
- Ethernet
- mini PCIe
- Onboard PoE
- RS485, RS232, CAN
- Micro Phone array
- Speaker
- RTC battery slot
- 40-pin expansion
Edge Compute Module 0 needs to mount on top of this Carrier board for
creating Edge Compute Module 0 Carrier platform.
Add support for it.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
.../rv1126-edgeble-ecm0-carrier-u-boot.dtsi | 10
arch/arm/mach-rockchip/rv1126/Kconfig | 12
board/edgeble/edge-compute-module-0/Kconfig | 16 ++
.../edgeble/edge-compute-module-0/MAINTAINERS | 6 ++
board/edgeble/edge-compute-module-0/Makefile | 7 +++
board/edgeble/edge-compute-module-0/ecm0.c| 4 ++
configs/ecm0-carrier-rv1126_defconfig | 56 +++
include/configs/edge-compute-module-0.h | 21 +++
8 files changed, 132 insertions(+)
create mode 100644 arch/arm/dts/rv1126-edgeble-ecm0-carrier-u-boot.dtsi
create mode 100644 board/edgeble/edge-compute-module-0/Kconfig
create mode 100644 board/edgeble/edge-compute-module-0/MAINTAINERS
create mode 100644 board/edgeble/edge-compute-module-0/Makefile
create mode 100644 board/edgeble/edge-compute-module-0/ecm0.c
create mode 100644 configs/ecm0-carrier-rv1126_defconfig
create mode 100644 include/configs/edge-compute-module-0.h
diff --git a/arch/arm/dts/rv1126-edgeble-ecm0-carrier-u-boot.dtsi
b/arch/arm/dts/rv1126-edgeble-ecm0-carrier-u-boot.dtsi
new file mode 100644
index 00..51a1617708
--- /dev/null
+++ b/arch/arm/dts/rv1126-edgeble-ecm0-carrier-u-boot.dtsi
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ */
+
+#include "rv1126-u-boot.dtsi"
+
+ {
+ status = "disabled";
+};
diff --git a/arch/arm/mach-rockchip/rv1126/Kconfig
b/arch/arm/mach-rockchip/rv1126/Kconfig
index 86abc4e2fa..3078a97f40 100644
--- a/arch/arm/mach-rockchip/rv1126/Kconfig
+++ b/arch/arm/mach-rockchip/rv1126/Kconfig
@@ -1,5 +1,15 @@
if ROCKCHIP_RV1126
+config TARGET_RV1126_ECM0
+ bool "Edgeble AI Edge Compute Module 0 SoM"
+ help
+ Edge Compute Module 0 is a 96boards SoM-CB compute module based
+ on Rockchip RV1126 from Edgeble AI.
+
+ ECM0-Carrier:
+ Edge Compute Module 0 needs to mount on top of this Carrier board
+ for creating Edge Compute Module 0 Carrier platform.
+
config SOC_SPECIFIC_OPTIONS # dummy
def_bool y
select HAS_CUSTOM_SYS_INIT_SP_ADDR
@@ -40,4 +50,6 @@ config SYS_MALLOC_F_LEN
config SYS_TEXT_BASE
default 0x60
+source board/edgeble/edge-compute-module-0/Kconfig
+
endif
diff --git a/board/edgeble/edge-compute-module-0/Kconfig
b/board/edgeble/edge-compute-module-0/Kconfig
new file mode 100644
index 00..65b2faa10b
--- /dev/null
+++ b/board/edgeble/edge-compute-module-0/Kconfig
@@ -0,0 +1,16 @@
+if TARGET_RV1126_ECM0
+
+config SYS_BOARD
+ default "edge-compute-module-0"
+
+config SYS_VENDOR
+ default "edgeble"
+
+config SYS_CONFIG_NAME
+ default "edge-compute-module-0"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+ select RAM_ROCKCHIP_LPDDR4
+
+endif
diff --git a/board/edgeble/edge-compute-module-0/MAINTAINERS
b/board/edgeble/edge-compute-module-0/MAINTAINERS
new file mode 100644
index 00..f21295cc6c
--- /dev/null
+++ b/board/edgeble/edge-compute-module-0/MAINTAINERS
@@ -0,0 +1,6 @@
+RV1126-ECM0
+M: Jagan Teki
+S: Maintained
+F: board/edgeble-ai/edge-compute-module-0
+F: include/configs/edge-compute-module-0.h
+F: configs/ecm0-carrier-rv1126_defconfig
diff --git a/board/edgeble/edge-compute-module-0/Makefile
b/board/edgeble/edge-compute-module-0/Makefile
new file mode 100644
index 00..c42a0b7fba
--- /dev/null
+++ b/board/edgeble/edge-compute-module-0/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += ecm0.o
diff --git a/board/edgeble/edge-compute-module-0/ecm0.c
b/board/edgeble/edge-compute-module-0/ecm0.c
new file mode 100644
index 00..3d2262ce97
--- /dev/null
+++ b/board/edgeble/edge-compute-module-0/ecm0.c
@@ -0,0 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ */
diff --git a/configs/ecm0-carrier-rv1126_defconfig
b/configs/ecm0-carrier-rv1126_defconfig
new file mode 100644
index 00..11cd68fb41
--- /dev/null
+++ b/configs/ecm0-carrier-rv1126_defconfig
@@ -0,0 +1,56 @@
+CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
+CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y
+CONFIG_COUNTER_FREQUENCY=2400
+CONFIG_SYS_ARCH_TIMER=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEFAULT_DEVICE_TREE="rv1126-edgeble-ecm0-carrier"
+CONFIG_ROCKCHIP_RV1126=y
[PATCH v2 27/28] ARM: dts: rockchip: Add rv1126-u-boot.dtsi
Add u-boot,dm-spl and u-boot,dm-pre-reloc related properties
for Rockchip RV1126 SoC.
Both eMMC and SD boot are tested in Edge Compute Module 0.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
arch/arm/dts/rv1126-u-boot.dtsi | 62 +
1 file changed, 62 insertions(+)
create mode 100644 arch/arm/dts/rv1126-u-boot.dtsi
diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
new file mode 100644
index 00..bc77037760
--- /dev/null
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ */
+
+#include "rockchip-u-boot.dtsi"
+
+/ {
+ chosen {
+ u-boot,spl-boot-order = \
+ "same-as-spl", ,
+ };
+
+ dmc {
+ compatible = "rockchip,rv1126-dmc";
+ u-boot,dm-pre-reloc;
+ };
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
--
2.25.1
[PATCH v2 26/28] ARM: dts: rockchip: rv1126: Add Edgeble AI Edge Compute Module 0 Carrier
Edge Compute Module 0 Carrier is an industrial form factor evaluation
board from Edgeble AI.
General features:
- microSD slot
- 2x MIPI CSI2 connectors
- MIPI DSI connector
- 2x USB Host
- 1x USB OTG
- Ethernet
- mini PCIe
- Onboard PoE
- RS485, RS232, CAN
- Micro Phone array
- Speaker
- RTC battery slot
- 40-pin expansion
Edge Compute Module 0 needs to mount on top of this Carrier board for
creating Edge Compute Module 0 Carrier platform.
Add support for it.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
arch/arm/dts/Makefile| 3 ++
arch/arm/dts/rv1126-edgeble-ecm0-carrier.dts | 38
2 files changed, 41 insertions(+)
create mode 100644 arch/arm/dts/rv1126-edgeble-ecm0-carrier.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7fa275ea7c..2070eb1540 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -170,6 +170,9 @@ dtb-$(CONFIG_ROCKCHIP_RV1108) += \
rv1108-elgin-r1.dtb \
rv1108-evb.dtb
+dtb-$(CONFIG_ROCKCHIP_RV1126) += \
+ rv1126-edgeble-ecm0-carrier.dtb
+
dtb-$(CONFIG_ARCH_S5P4418) += \
s5p4418-nanopi2.dtb
diff --git a/arch/arm/dts/rv1126-edgeble-ecm0-carrier.dts
b/arch/arm/dts/rv1126-edgeble-ecm0-carrier.dts
new file mode 100644
index 00..150bfb9bd0
--- /dev/null
+++ b/arch/arm/dts/rv1126-edgeble-ecm0-carrier.dts
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ */
+
+/dts-v1/;
+#include "rv1126.dtsi"
+#include "rv1126-edgeble-edge-compute-module-0.dtsi"
+
+/ {
+ model = "Edgeble AI Edge Compute Module 0 Carrier board";
+ compatible = "edgeble,edge-compute-module-0-carrier",
+"edgeble,edge-compute-module-0", "rockchip,rv1126";
+
+ chosen {
+ stdout-path = "serial2:150n8";
+ };
+};
+
+ {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ card-detect-delay = <200>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_clk _cmd _bus4 _det>;
+ rockchip,default-sample-phase = <90>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr104;
+ vqmmc-supply = <_sd>;
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
--
2.25.1
[PATCH v2 25/28] ARM: dts: rockchip: rv1126: Add Edgeble AI Edge Compute Module 0
Edge Compute Module 0 is a 96boards SoM-CB compute module based
on Rockchip RV1126 from Edgeble AI.
General features:
- Rockchip RV1126
- 2/4GB LPDDR4
- 16GB eMMC
- Fn-link 8223A-SR WiFi/BT
Edge Compute Module 0 needs to mount on top of Edgeble AI Carrier
boards for creating complete platform solutions.
Add support for it.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
.../rv1126-edgeble-edge-compute-module-0.dtsi | 329 ++
1 file changed, 329 insertions(+)
create mode 100644 arch/arm/dts/rv1126-edgeble-edge-compute-module-0.dtsi
diff --git a/arch/arm/dts/rv1126-edgeble-edge-compute-module-0.dtsi
b/arch/arm/dts/rv1126-edgeble-edge-compute-module-0.dtsi
new file mode 100644
index 00..c98232dd25
--- /dev/null
+++ b/arch/arm/dts/rv1126-edgeble-edge-compute-module-0.dtsi
@@ -0,0 +1,329 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ */
+
+/ {
+ compatible = "edgeble,edge-compute-module-0", "rockchip,rv1126";
+
+ aliases {
+ mmc0 =
+ };
+
+ vcc5v0_sys: vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ };
+
+ vccio_flash: vccio-flash {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = < RK_PB3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_vol_sel>;
+ regulator-name = "vccio_flash";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ vin-supply = <_3v3>;
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = < 1>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <_enable_h>;
+ reset-gpios = < RK_PD0 GPIO_ACTIVE_LOW>;
+ };
+};
+
+ {
+ cpu-supply = <_arm>;
+};
+
+ {
+ bus-width = <8>;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <_bus8 _cmd _clk _rstnout>;
+ vmmc-supply = <_3v3>;
+ vqmmc-supply = <_flash>;
+ rockchip,default-sample-phase = <90>;
+ status = "okay";
+};
+
+ {
+ status = "okay";
+ clock-frequency = <40>;
+
+ rk809: pmic@20 {
+ compatible = "rockchip,rk809";
+ reg = <0x20>;
+ interrupt-parent = <>;
+ interrupts = ;
+ #clock-cells = <1>;
+ clock-output-names = "rk808-clkout1", "rk808-clkout2";
+ pinctrl-names = "default";
+ pinctrl-0 = <_int_l>;
+ rockchip,system-power-controller;
+ wakeup-source;
+
+ vcc1-supply = <_sys>;
+ vcc2-supply = <_sys>;
+ vcc3-supply = <_sys>;
+ vcc4-supply = <_sys>;
+ vcc5-supply = <_buck5>;
+ vcc6-supply = <_buck5>;
+ vcc7-supply = <_sys>;
+ vcc8-supply = <_sys>;
+ vcc9-supply = <_sys>;
+
+ regulators {
+ vdd_npu_vepu: DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <65>;
+ regulator-max-microvolt = <95>;
+ regulator-ramp-delay = <6001>;
+ regulator-initial-mode = <0x2>;
+ regulator-name = "vdd_npu_vepu";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_arm: DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <725000>;
+ regulator-max-microvolt = <135>;
+ regulator-ramp-delay = <6001>;
+ regulator-initial-mode = <0x2>;
+ regulator-name = "vdd_arm";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+
[PATCH v2 24/28] rockchip: mkimage: Add rv1126 support
Add support for rv1126 package header in mkimage tool.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
tools/rkcommon.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 1325aa83cb..f18b6fad95 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -133,6 +133,7 @@ static struct spl_info spl_infos[] = {
{ "rk3368", "RK33", 0x8000 - 0x1000, false, RK_HEADER_V1 },
{ "rk3399", "RK33", 0x3 - 0x2000, false, RK_HEADER_V1 },
{ "rv1108", "RK11", 0x1800, false, RK_HEADER_V1 },
+ { "rv1126", "110B", 0x1 - 0x1000, false, RK_HEADER_V1 },
{ "rk3568", "RK35", 0x14000 - 0x1000, false, RK_HEADER_V2 },
};
--
2.25.1
[PATCH v2 23/28] configs: rockchip: Add rv1126 common config
Add common rv1126 include config. Signed-off-by: Jagan Teki --- Changes for v2: - none include/configs/rv1126_common.h | 42 + 1 file changed, 42 insertions(+) create mode 100644 include/configs/rv1126_common.h diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h new file mode 100644 index 00..6ab5b2ce5f --- /dev/null +++ b/include/configs/rv1126_common.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2019 Rockchip Electronics Co., Ltd + * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. + */ + +#ifndef __CONFIG_RV1126_COMMON_H +#define __CONFIG_RV1126_COMMON_H + +#include "rockchip-common.h" + +#define CONFIG_SYS_HZ_CLOCK2400 + +#define CONFIG_IRAM_BASE 0xff70 + +#define GICD_BASE 0xfeff1000 +#define GICC_BASE 0xfeff2000 + +#define CONFIG_SYS_SDRAM_BASE 0 +#define SDRAM_MAX_SIZE 0xfd00 + +#define CONFIG_SYS_MONITOR_LEN (600 * 1024) + +/* memory size > 128MB */ +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x\0" \ + "pxefile_addr_r=0x0010\0" \ + "fdt_addr_r=0x0830\0" \ + "kernel_addr_r=0x02008000\0" \ + "ramdisk_addr_r=0x0a20\0" + +#include +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_high=0x0fff\0" \ + "initrd_high=0x0fff\0" \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "partitions=" PARTS_DEFAULT \ + ENV_MEM_LAYOUT_SETTINGS \ + ROCKCHIP_DEVICE_SETTINGS \ + BOOTENV + +#endif /* __CONFIG_RV1126_COMMON_H */ -- 2.25.1
[PATCH v2 22/28] arm: rockchip: rv1126: Set dram area unsecure for SPL
Unsecure the dram area so that MMC, USB, and SFC controllers
can able to read data from dram.
Signed-off-by: Jason Zhu
Signed-off-by: Jagan Teki
---
Changes for v2:
- use IS_ENABLED
arch/arm/mach-rockchip/rv1126/rv1126.c | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c
b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 91554c98b6..b9b898756f 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -10,6 +10,8 @@
#include
#include
+#define FIREWALL_APB_BASE 0xffa6
+#define FW_DDR_CON_REG 0x80
#define GRF_BASE 0xFE00
const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
@@ -58,6 +60,16 @@ void board_debug_uart_init(void)
#ifndef CONFIG_TPL_BUILD
int arch_cpu_init(void)
{
+ /**
+* Set dram area unsecure in spl
+*
+* usb & mmc & sfc controllers can read data to dram
+* since they are unsecure.
+* (Note: only secure-world can access this register)
+*/
+ if (IS_ENABLED(CONFIG_SPL_BUILD))
+ writel(0, FIREWALL_APB_BASE + FW_DDR_CON_REG);
+
return 0;
}
#endif
--
2.25.1
[PATCH v2 21/28] arm: rockchip: Add RV1126 arch core support
Rockchip RV1126 is a high-performance vision processor SoC for IPC/CVR, especially for AI related application. Add arch core support for it. Signed-off-by: Jagan Teki --- Changes for v2: - none arch/arm/include/asm/arch-rv1126/boot0.h | 11 arch/arm/include/asm/arch-rv1126/gpio.h | 11 arch/arm/mach-rockchip/Kconfig| 46 ++ arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/rv1126/Kconfig | 43 + arch/arm/mach-rockchip/rv1126/Makefile| 13 arch/arm/mach-rockchip/rv1126/clk_rv1126.c| 33 ++ arch/arm/mach-rockchip/rv1126/rv1126.c| 63 +++ arch/arm/mach-rockchip/rv1126/syscon_rv1126.c | 47 ++ common/spl/Kconfig.tpl| 2 +- 10 files changed, 269 insertions(+), 1 deletion(-) create mode 100644 arch/arm/include/asm/arch-rv1126/boot0.h create mode 100644 arch/arm/include/asm/arch-rv1126/gpio.h create mode 100644 arch/arm/mach-rockchip/rv1126/Kconfig create mode 100644 arch/arm/mach-rockchip/rv1126/Makefile create mode 100644 arch/arm/mach-rockchip/rv1126/clk_rv1126.c create mode 100644 arch/arm/mach-rockchip/rv1126/rv1126.c create mode 100644 arch/arm/mach-rockchip/rv1126/syscon_rv1126.c diff --git a/arch/arm/include/asm/arch-rv1126/boot0.h b/arch/arm/include/asm/arch-rv1126/boot0.h new file mode 100644 index 00..2e78b074ad --- /dev/null +++ b/arch/arm/include/asm/arch-rv1126/boot0.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2019 Rockchip Electronics Co., Ltd + */ + +#ifndef __ASM_ARCH_BOOT0_H__ +#define __ASM_ARCH_BOOT0_H__ + +#include + +#endif diff --git a/arch/arm/include/asm/arch-rv1126/gpio.h b/arch/arm/include/asm/arch-rv1126/gpio.h new file mode 100644 index 00..eca79d5159 --- /dev/null +++ b/arch/arm/include/asm/arch-rv1126/gpio.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2019 Rockchip Electronics Co., Ltd + */ + +#ifndef __ASM_ARCH_GPIO_H__ +#define __ASM_ARCH_GPIO_H__ + +#include + +#endif diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index c561a77e6a..19fa6a4659 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -301,6 +301,51 @@ config ROCKCHIP_RV1108 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7 and a DSP. +config ROCKCHIP_RV1126 + bool "Support Rockchip RV1126" + select CPU_V7A + select SKIP_LOWLEVEL_INIT_ONLY + select TPL + select SUPPORT_TPL + select TPL_NEEDS_SEPARATE_STACK + select TPL_ROCKCHIP_BACK_TO_BROM + select SPL + select SUPPORT_SPL + select SPL_STACK_R + select CLK + select FIT + select PINCTRL + select RAM + select ROCKCHIP_SDRAM_COMMON + select REGMAP + select SYSCON + select DM_PMIC + select DM_REGULATOR_FIXED + select DM_RESET + select REGULATOR_RK8XX + select PMIC_RK8XX + select BOARD_LATE_INIT + imply ROCKCHIP_COMMON_BOARD + imply TPL_DM + imply TPL_LIBCOMMON_SUPPORT + imply TPL_LIBGENERIC_SUPPORT + imply TPL_OF_CONTROL + imply TPL_OF_PLATDATA + imply TPL_RAM + imply TPL_ROCKCHIP_COMMON_BOARD + imply TPL_SERIAL + imply SPL_CLK + imply SPL_DM + imply SPL_DRIVERS_MISC + imply SPL_LIBCOMMON_SUPPORT + imply SPL_LIBGENERIC_SUPPORT + imply SPL_OF_CONTROL + imply SPL_RAM + imply SPL_REGMAP + imply SPL_ROCKCHIP_COMMON_BOARD + imply SPL_SERIAL + imply SPL_SYSCON + config ROCKCHIP_USB_UART bool "Route uart output to usb pins" help @@ -448,4 +493,5 @@ source "arch/arm/mach-rockchip/rk3368/Kconfig" source "arch/arm/mach-rockchip/rk3399/Kconfig" source "arch/arm/mach-rockchip/rk3568/Kconfig" source "arch/arm/mach-rockchip/rv1108/Kconfig" +source "arch/arm/mach-rockchip/rv1126/Kconfig" endif diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 6c1c7b8a10..32138fa723 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -45,6 +45,7 @@ obj-$(CONFIG_ROCKCHIP_RK3368) += rk3368/ obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/ obj-$(CONFIG_ROCKCHIP_RK3568) += rk3568/ obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108/ +obj-$(CONFIG_ROCKCHIP_RV1126) += rv1126/ # Clear out SPL objects, in case this is a TPL build obj-spl-$(CONFIG_TPL_BUILD) = diff --git a/arch/arm/mach-rockchip/rv1126/Kconfig b/arch/arm/mach-rockchip/rv1126/Kconfig new file mode 100644 index 00..86abc4e2fa --- /dev/null +++ b/arch/arm/mach-rockchip/rv1126/Kconfig @@ -0,0 +1,43 @@ +if ROCKCHIP_RV1126 + +config SOC_SPECIFIC_OPTIONS # dummy + def_bool y + select HAS_CUSTOM_SYS_INIT_SP_ADDR + +config ROCKCHIP_BOOT_MODE_REG + default 0xfe020200 + +config ROCKCHIP_STIMER_BASE + default
[PATCH v2 20/28] ARM: dts: rockchip: Add Rockchip RV1126 SoC
RV1126 is a high-performance vision processor SoC for IPC/CVR,
especially for AI related application.
It is based on quad-core ARM Cortex-A7 32-bit core which integrates
NEON and FPU. There is a 32KB I-cache and 32KB D-cache for each core
and 512KB unified L2 cache. It has build-in NPU supports INT8/INT16
hybrid operation and computing power is up to 2.0TOPs.
This patch add basic core dtsi support.
Signed-off-by: Jon Lin
Signed-off-by: Sugar Zhang
Signed-off-by: Jagan Teki
---
Changes for v2:
- update header filename
arch/arm/dts/rv1126.dtsi | 500 +++
1 file changed, 500 insertions(+)
create mode 100644 arch/arm/dts/rv1126.dtsi
diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
new file mode 100644
index 00..235bfb126e
--- /dev/null
+++ b/arch/arm/dts/rv1126.dtsi
@@ -0,0 +1,500 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ compatible = "rockchip,rv1126";
+
+ interrupt-parent = <>;
+
+ aliases {
+ i2c0 =
+ i2c1 =
+ i2c2 =
+ i2c3 =
+ i2c4 =
+ i2c5 =
+ serial0 =
+ serial1 =
+ serial2 =
+ serial3 =
+ serial4 =
+ serial5 =
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@f00 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0xf00>;
+ clocks = < ARMCLK>;
+ };
+
+ cpu1: cpu@f01 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0xf01>;
+ clocks = < ARMCLK>;
+ };
+
+ cpu2: cpu@f02 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0xf02>;
+ clocks = < ARMCLK>;
+ };
+
+ cpu3: cpu@f03 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0xf03>;
+ clocks = < ARMCLK>;
+ };
+ };
+
+ arm-pmu {
+ compatible = "arm,cortex-a7-pmu";
+ interrupts = ,
+,
+,
+;
+ interrupt-affinity = <>, <>, <>, <>;
+ };
+
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = ,
+,
+,
+;
+ clock-frequency = <2400>;
+ };
+
+ xin24m: oscillator {
+ compatible = "fixed-clock";
+ clock-frequency = <2400>;
+ clock-output-names = "xin24m";
+ #clock-cells = <0>;
+ };
+
+ grf: syscon@fe00 {
+ compatible = "rockchip,rv1126-grf", "syscon", "simple-mfd";
+ reg = <0xfe00 0x2>;
+ };
+
+ pmugrf: syscon@fe02 {
+ compatible = "rockchip,rv1126-pmugrf", "syscon", "simple-mfd";
+ reg = <0xfe02 0x1000>;
+
+ pmu_io_domains: io-domains {
+ compatible = "rockchip,rv1126-pmu-io-voltage-domain";
+ status = "disabled";
+ };
+ };
+
+ qos_emmc: qos@fe86 {
+ compatible = "rockchip,rv1126-qos", "syscon";
+ reg = <0xfe86 0x20>;
+ };
+
+ qos_nandc: qos@fe860080 {
+ compatible = "rockchip,rv1126-qos", "syscon";
+ reg = <0xfe860080 0x20>;
+ };
+
+ qos_sfc: qos@fe860200 {
+ compatible = "rockchip,rv1126-qos", "syscon";
+ reg = <0xfe860200 0x20>;
+ };
+
+ qos_sdio: qos@fe86c000 {
+ compatible = "rockchip,rv1126-qos", "syscon";
+ reg = <0xfe86c000 0x20>;
+ };
+
+ gic: interrupt-controller@feff {
+ compatible = "arm,gic-400";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+
+ reg = <0xfeff1000 0x1000>,
+ <0xfeff2000 0x2000>,
+ <0xfeff4000 0x2000>,
+ <0xfeff6000 0x2000>;
+ interrupts = ;
+ };
+
+ pmu: power-management@ff3e {
+ compatible = "rockchip,rv1126-pmu", "syscon",
[PATCH v2 19/28] ARM: dts: rockchip: Add Rockchip RV1126 pinctrl
Add pinctrl definitions for Rockchip RV1126.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
arch/arm/dts/rv1126-pinctrl.dtsi | 302 +++
1 file changed, 302 insertions(+)
create mode 100644 arch/arm/dts/rv1126-pinctrl.dtsi
diff --git a/arch/arm/dts/rv1126-pinctrl.dtsi b/arch/arm/dts/rv1126-pinctrl.dtsi
new file mode 100644
index 00..93e2885e87
--- /dev/null
+++ b/arch/arm/dts/rv1126-pinctrl.dtsi
@@ -0,0 +1,302 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ */
+
+#include
+#include "rockchip-pinconf.dtsi"
+
+/*
+ * This file is auto generated by pin2dts tool, please keep these code
+ * by adding changes at end of this file.
+ */
+ {
+ emmc {
+ /omit-if-no-ref/
+ emmc_rstnout: emmc-rstnout {
+ rockchip,pins =
+ /* emmc_rstn */
+ <1 RK_PA3 2 _pull_none>;
+ };
+ /omit-if-no-ref/
+ emmc_bus8: emmc-bus8 {
+ rockchip,pins =
+ /* emmc_d0 */
+ <0 RK_PC4 2 _pull_up_drv_level_2>,
+ /* emmc_d1 */
+ <0 RK_PC5 2 _pull_up_drv_level_2>,
+ /* emmc_d2 */
+ <0 RK_PC6 2 _pull_up_drv_level_2>,
+ /* emmc_d3 */
+ <0 RK_PC7 2 _pull_up_drv_level_2>,
+ /* emmc_d4 */
+ <0 RK_PD0 2 _pull_up_drv_level_2>,
+ /* emmc_d5 */
+ <0 RK_PD1 2 _pull_up_drv_level_2>,
+ /* emmc_d6 */
+ <0 RK_PD2 2 _pull_up_drv_level_2>,
+ /* emmc_d7 */
+ <0 RK_PD3 2 _pull_up_drv_level_2>;
+ };
+ /omit-if-no-ref/
+ emmc_clk: emmc-clk {
+ rockchip,pins =
+ /* emmc_clko */
+ <0 RK_PD7 2 _pull_up_drv_level_2>;
+ };
+ /omit-if-no-ref/
+ emmc_cmd: emmc-cmd {
+ rockchip,pins =
+ /* emmc_cmd */
+ <0 RK_PD5 2 _pull_up_drv_level_2>;
+ };
+ };
+ i2c0 {
+ /omit-if-no-ref/
+ i2c0_xfer: i2c0-xfer {
+ rockchip,pins =
+ /* i2c0_scl */
+ <0 RK_PB4 1 _pull_none_drv_level_0_smt>,
+ /* i2c0_sda */
+ <0 RK_PB5 1 _pull_none_drv_level_0_smt>;
+ };
+ };
+ i2c1 {
+ /omit-if-no-ref/
+ i2c1_xfer: i2c1-xfer {
+ rockchip,pins =
+ /* i2c1_scl */
+ <1 RK_PD3 1 _pull_none_drv_level_0_smt>,
+ /* i2c1_sda */
+ <1 RK_PD2 1 _pull_none_drv_level_0_smt>;
+ };
+ };
+ i2c2 {
+ /omit-if-no-ref/
+ i2c2_xfer: i2c2-xfer {
+ rockchip,pins =
+ /* i2c2_scl */
+ <0 RK_PC2 1 _pull_none_drv_level_0_smt>,
+ /* i2c2_sda */
+ <0 RK_PC3 1 _pull_none_drv_level_0_smt>;
+ };
+ };
+ i2c3 {
+ /omit-if-no-ref/
+ i2c3m0_xfer: i2c3m0-xfer {
+ rockchip,pins =
+ /* i2c3_scl_m0 */
+ <3 RK_PA4 5 _pull_none_drv_level_0_smt>,
+ /* i2c3_sda_m0 */
+ <3 RK_PA5 5 _pull_none_drv_level_0_smt>;
+ };
+ /omit-if-no-ref/
+ i2c3m1_xfer: i2c3m1-xfer {
+ rockchip,pins =
+ /* i2c3_scl_m1 */
+ <2 RK_PD4 7 _pull_none_drv_level_0_smt>,
+ /* i2c3_sda_m1 */
+ <2 RK_PD5 7 _pull_none_drv_level_0_smt>;
+ };
+ /omit-if-no-ref/
+ i2c3m2_xfer: i2c3m2-xfer {
+ rockchip,pins =
+ /* i2c3_scl_m2 */
+ <1 RK_PD6 3 _pull_none_drv_level_0_smt>,
+ /* i2c3_sda_m2 */
+ <1 RK_PD7 3 _pull_none_drv_level_0_smt>;
+ };
+ };
+ i2c4 {
+
[PATCH v2 16/28] clk: rockchip: Add rv1126 clk support
Add clock driver support for Rockchip RV1126 SoC.
Signed-off-by: Joseph Chen
Signed-off-by: Jagan Teki
---
Changes for v2:
- update cru header
drivers/clk/rockchip/Makefile |1 +
drivers/clk/rockchip/clk_rv1126.c | 1889 +
2 files changed, 1890 insertions(+)
create mode 100644 drivers/clk/rockchip/clk_rv1126.c
diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index a72d8fe58a..f719f4e379 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -17,3 +17,4 @@ obj-$(CONFIG_ROCKCHIP_RK3368) += clk_rk3368.o
obj-$(CONFIG_ROCKCHIP_RK3399) += clk_rk3399.o
obj-$(CONFIG_ROCKCHIP_RK3568) += clk_rk3568.o
obj-$(CONFIG_ROCKCHIP_RV1108) += clk_rv1108.o
+obj-$(CONFIG_ROCKCHIP_RV1126) += clk_rv1126.o
diff --git a/drivers/clk/rockchip/clk_rv1126.c
b/drivers/clk/rockchip/clk_rv1126.c
new file mode 100644
index 00..3ed29364de
--- /dev/null
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -0,0 +1,1889 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ * Author: Finley Xiao
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define RV1126_CPUCLK_RATE(_rate, _aclk_div, _pclk_div)\
+{ \
+ .rate = _rate##U, \
+ .aclk_div = _aclk_div, \
+ .pclk_div = _pclk_div, \
+}
+
+#define DIV_TO_RATE(input_rate, div)((input_rate) / ((div) + 1))
+
+static struct rockchip_cpu_rate_table rv1126_cpu_rates[] = {
+ RV1126_CPUCLK_RATE(12, 1, 5),
+ RV1126_CPUCLK_RATE(100800, 1, 5),
+ RV1126_CPUCLK_RATE(81600, 1, 3),
+ RV1126_CPUCLK_RATE(6, 1, 3),
+ RV1126_CPUCLK_RATE(40800, 1, 1),
+};
+
+static struct rockchip_pll_rate_table rv1126_pll_rates[] = {
+ /* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
+ RK3036_PLL_RATE(16, 3, 200, 1, 1, 1, 0),
+ RK3036_PLL_RATE(14, 3, 350, 2, 1, 1, 0),
+ RK3036_PLL_RATE(12, 1, 100, 2, 1, 1, 0),
+ RK3036_PLL_RATE(118800, 1, 99, 2, 1, 1, 0),
+ RK3036_PLL_RATE(11, 3, 275, 2, 1, 1, 0),
+ RK3036_PLL_RATE(100800, 1, 84, 2, 1, 1, 0),
+ RK3036_PLL_RATE(10, 3, 250, 2, 1, 1, 0),
+ RK3036_PLL_RATE(81600, 1, 68, 2, 1, 1, 0),
+ RK3036_PLL_RATE(8, 3, 200, 2, 1, 1, 0),
+ RK3036_PLL_RATE(6, 1, 100, 4, 1, 1, 0),
+ RK3036_PLL_RATE(59400, 1, 99, 4, 1, 1, 0),
+ RK3036_PLL_RATE(5, 1, 125, 6, 1, 1, 0),
+ RK3036_PLL_RATE(2, 1, 100, 6, 2, 1, 0),
+ RK3036_PLL_RATE(1, 1, 100, 6, 4, 1, 0),
+ { /* sentinel */ },
+};
+
+static struct rockchip_pll_clock rv1126_pll_clks[] = {
+ [APLL] = PLL(pll_rk3328, PLL_APLL, RV1126_PLL_CON(0),
+RV1126_MODE_CON, 0, 10, 0, rv1126_pll_rates),
+ [DPLL] = PLL(pll_rk3328, PLL_DPLL, RV1126_PLL_CON(8),
+RV1126_MODE_CON, 2, 10, 0, NULL),
+ [CPLL] = PLL(pll_rk3328, PLL_CPLL, RV1126_PLL_CON(16),
+RV1126_MODE_CON, 4, 10, 0, rv1126_pll_rates),
+ [HPLL] = PLL(pll_rk3328, PLL_HPLL, RV1126_PLL_CON(24),
+RV1126_MODE_CON, 6, 10, 0, rv1126_pll_rates),
+ [GPLL] = PLL(pll_rk3328, PLL_GPLL, RV1126_PMU_PLL_CON(0),
+RV1126_PMU_MODE, 0, 10, 0, rv1126_pll_rates),
+};
+
+static ulong rv1126_gpll_set_rate(struct rv1126_clk_priv *priv,
+ struct rv1126_pmuclk_priv *pmu_priv,
+ ulong rate);
+/*
+ *
+ * rational_best_approximation(31415, 1,
+ * (1 << 8) - 1, (1 << 5) - 1, , );
+ *
+ * you may look at given_numerator as a fixed point number,
+ * with the fractional part size described in given_denominator.
+ *
+ * for theoretical background, see:
+ * http://en.wikipedia.org/wiki/Continued_fraction
+ */
+static void rational_best_approximation(unsigned long given_numerator,
+ unsigned long given_denominator,
+ unsigned long max_numerator,
+ unsigned long max_denominator,
+ unsigned long *best_numerator,
+ unsigned long *best_denominator)
+{
+ unsigned long n, d, n0, d0, n1, d1;
+
+ n = given_numerator;
+ d = given_denominator;
+ n0 = 0;
+ d1 = 0;
+ n1 = 1;
+ d0 = 1;
+ for (;;) {
+ unsigned long t, a;
+
+ if (n1 > max_numerator || d1 > max_denominator) {
+
[PATCH v2 18/28] arm: rockchip: Add grf header for rv1126
Add GRF header for Rockchip RV1126.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
.../include/asm/arch-rockchip/grf_rv1126.h| 251 ++
1 file changed, 251 insertions(+)
create mode 100644 arch/arm/include/asm/arch-rockchip/grf_rv1126.h
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rv1126.h
b/arch/arm/include/asm/arch-rockchip/grf_rv1126.h
new file mode 100644
index 00..4e0488b91a
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/grf_rv1126.h
@@ -0,0 +1,251 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd.
+ */
+
+#ifndef _ASM_ARCH_GRF_RV1126_H
+#define _ASM_ARCH_GRF_RV1126_H
+
+struct rv1126_grf {
+ unsigned int soc_con0;
+ unsigned int soc_con1;
+ unsigned int soc_con2;
+ unsigned int reserved0[1];
+ unsigned int soc_status0;
+ unsigned int soc_status1;
+ unsigned int reserved1[2];
+ unsigned int cpu_con0;
+ unsigned int cpu_con1;
+ unsigned int reserved2[2];
+ unsigned int cpu_status0;
+ unsigned int reserved3[3];
+ unsigned int noc_con0;
+ unsigned int noc_con1;
+ unsigned int noc_con2;
+ unsigned int noc_con3;
+ unsigned int usbhost_con0;
+ unsigned int usbhost_con1;
+ unsigned int usbhost_status0;
+ unsigned int usbotg_con0;
+ unsigned int usbotg_con1;
+ unsigned int usbotg_status0;
+ unsigned int usbotg_status1;
+ unsigned int usbotg_status2;
+ unsigned int mac_con0;
+ unsigned int mac_con1;
+ unsigned int mac_con2;
+ unsigned int reserved4[2];
+ unsigned int mac_status0;
+ unsigned int mac_status1;
+ unsigned int mac_status2;
+ unsigned int mem_con0;
+ unsigned int mem_con1;
+ unsigned int mem_con2;
+ unsigned int mem_con3;
+ unsigned int reserved5[(0x100 - 0x09c) / 4 - 1];
+ unsigned int tsadc_con0;
+ unsigned int reserved6[3];
+ unsigned int chip_id;
+ unsigned int reserved7[(0x1 - 0x110) / 4 - 1];
+ unsigned int gpio0c_iomux_h;
+ unsigned int gpio0d_iomux_l;
+ unsigned int gpio0d_iomux_h;
+ unsigned int reserved8[1];
+ unsigned int gpio1a_iomux_l;
+ unsigned int gpio1a_iomux_h;
+ unsigned int gpio1b_iomux_l;
+ unsigned int gpio1b_iomux_h;
+ unsigned int gpio1c_iomux_l;
+ unsigned int gpio1c_iomux_h;
+ unsigned int gpio1d_iomux_l;
+ unsigned int gpio1d_iomux_h;
+ unsigned int gpio2a_iomux_l;
+ unsigned int gpio2a_iomux_h;
+ unsigned int gpio2b_iomux_l;
+ unsigned int gpio2b_iomux_h;
+ unsigned int gpio2c_iomux_l;
+ unsigned int gpio2c_iomux_h;
+ unsigned int gpio2d_iomux_l;
+ unsigned int gpio2d_iomux_h;
+ unsigned int gpio3a_iomux_l;
+ unsigned int gpio3a_iomux_h;
+ unsigned int gpio3b_iomux_l;
+ unsigned int gpio3b_iomux_h;
+ unsigned int gpio3c_iomux_l;
+ unsigned int gpio3c_iomux_h;
+ unsigned int gpio3d_iomux_l;
+ unsigned int gpio3d_iomux_h;
+ unsigned int gpio4a_iomux_l;
+ unsigned int reserved9[3];
+ unsigned int gpio0c_ds_h;
+ unsigned int gpio0d_ds_l;
+ unsigned int gpio0d_ds_h;
+ unsigned int reserved10[1];
+ unsigned int gpio1a_ds_l;
+ unsigned int gpio1a_ds_h;
+ unsigned int gpio1b_ds_l;
+ unsigned int gpio1b_ds_h;
+ unsigned int gpio1c_ds_l;
+ unsigned int gpio1c_ds_h;
+ unsigned int gpio1d_ds_l;
+ unsigned int gpio1d_ds_h;
+ unsigned int gpio2a_ds_l;
+ unsigned int gpio2a_ds_h;
+ unsigned int gpio2b_ds_l;
+ unsigned int gpio2b_ds_h;
+ unsigned int gpio2c_ds_l;
+ unsigned int gpio2c_ds_h;
+ unsigned int gpio2d_ds_l;
+ unsigned int gpio2d_ds_h;
+ unsigned int gpio3a_ds_l;
+ unsigned int gpio3a_ds_h;
+ unsigned int gpio3b_ds_l;
+ unsigned int gpio3b_ds_h;
+ unsigned int gpio3c_ds_l;
+ unsigned int gpio3c_ds_h;
+ unsigned int gpio3d_ds_l;
+ unsigned int gpio3d_ds_h;
+ unsigned int gpio4a_ds_l;
+ unsigned int reserved12[3];
+ unsigned int gpio0c_p_h;
+ unsigned int gpio0d_p;
+ unsigned int gpio1a_p;
+ unsigned int gpio1b_p;
+ unsigned int gpio1c_p;
+ unsigned int gpio1d_p;
+ unsigned int gpio2a_p;
+ unsigned int gpio2b_p;
+ unsigned int gpio2c_p;
+ unsigned int gpio2d_p;
+ unsigned int gpio3a_p;
+ unsigned int gpio3b_p;
+ unsigned int gpio3c_p;
+ unsigned int gpio3d_p;
+ unsigned int gpio4a_p;
+ unsigned int reserved13[1];
+ unsigned int gpio0c_ie_h;
+ unsigned int gpio0d_ie;
+ unsigned int gpio1a_ie;
+ unsigned int gpio1b_ie;
+ unsigned int gpio1c_ie;
+ unsigned int gpio1d_ie;
+ unsigned int gpio2a_ie;
+ unsigned int gpio2b_ie;
+ unsigned int
[PATCH v2 15/28] dt-bindings: clk: Add dt-binding header for RV1126
Add the dt-bindings header for the Rockchip RV1126, that gets shared between the clock controller and the clock references in the dts. Signed-off-by: Finley Xiao Signed-off-by: Jagan Teki --- Changes for v2: - update cru header .../dt-bindings/clock/rockchip,rv1126-cru.h | 632 ++ 1 file changed, 632 insertions(+) create mode 100644 include/dt-bindings/clock/rockchip,rv1126-cru.h diff --git a/include/dt-bindings/clock/rockchip,rv1126-cru.h b/include/dt-bindings/clock/rockchip,rv1126-cru.h new file mode 100644 index 00..cfba8226de --- /dev/null +++ b/include/dt-bindings/clock/rockchip,rv1126-cru.h @@ -0,0 +1,632 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2019 Rockchip Electronics Co. Ltd. + * Author: Finley Xiao + */ + +#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RV1126_H +#define _DT_BINDINGS_CLK_ROCKCHIP_RV1126_H + +/* pmucru-clocks indices */ + +/* pll clocks */ +#define PLL_GPLL 1 + +/* sclk (special clocks) */ +#define CLK_OSC0_DIV32K2 +#define CLK_RTC32K 3 +#define CLK_WIFI_DIV 4 +#define CLK_WIFI_OSC0 5 +#define CLK_WIFI 6 +#define CLK_PMU7 +#define SCLK_UART1_DIV 8 +#define SCLK_UART1_FRACDIV 9 +#define SCLK_UART1_MUX 10 +#define SCLK_UART1 11 +#define CLK_I2C0 12 +#define CLK_I2C2 13 +#define CLK_CAPTURE_PWM0 14 +#define CLK_PWM0 15 +#define CLK_CAPTURE_PWM1 16 +#define CLK_PWM1 17 +#define CLK_SPI0 18 +#define DBCLK_GPIO019 +#define CLK_PMUPVTM20 +#define CLK_CORE_PMUPVTM 21 +#define CLK_REF12M 22 +#define CLK_USBPHY_OTG_REF 23 +#define CLK_USBPHY_HOST_REF24 +#define CLK_REF24M 25 +#define CLK_MIPIDSIPHY_REF 26 + +/* pclk */ +#define PCLK_PDPMU 30 +#define PCLK_PMU 31 +#define PCLK_UART1 32 +#define PCLK_I2C0 33 +#define PCLK_I2C2 34 +#define PCLK_PWM0 35 +#define PCLK_PWM1 36 +#define PCLK_SPI0 37 +#define PCLK_GPIO0 38 +#define PCLK_PMUSGRF 39 +#define PCLK_PMUGRF40 +#define PCLK_PMUCRU41 +#define PCLK_CHIPVEROTP42 +#define PCLK_PDPMU_NIU 43 +#define PCLK_PMUPVTM 44 +#define PCLK_SCRKEYGEN 45 + +#define CLKPMU_NR_CLKS (PCLK_SCRKEYGEN + 1) + +/* cru-clocks indices */ + +/* pll clocks */ +#define PLL_APLL 1 +#define PLL_DPLL 2 +#define PLL_CPLL 3 +#define PLL_HPLL 4 + +/* sclk (special clocks) */ +#define ARMCLK 5 +#define USB480M6 +#define CLK_CORE_CPUPVTM 7 +#define CLK_CPUPVTM8 +#define CLK_SCR1 9 +#define CLK_SCR1_CORE 10 +#define CLK_SCR1_RTC 11 +#define CLK_SCR1_JTAG 12 +#define SCLK_UART0_DIV 13 +#define SCLK_UART0_FRAC14 +#define SCLK_UART0_MUX 15 +#define SCLK_UART0 16 +#define SCLK_UART2_DIV 17 +#define SCLK_UART2_FRAC18 +#define SCLK_UART2_MUX 19 +#define SCLK_UART2 20 +#define SCLK_UART3_DIV 21 +#define SCLK_UART3_FRAC22 +#define SCLK_UART3_MUX 23 +#define SCLK_UART3 24 +#define SCLK_UART4_DIV 25 +#define SCLK_UART4_FRAC26 +#define SCLK_UART4_MUX 27 +#define SCLK_UART4 28 +#define SCLK_UART5_DIV 29 +#define SCLK_UART5_FRAC30 +#define SCLK_UART5_MUX 31 +#define SCLK_UART5 32 +#define CLK_I2C1 33 +#define CLK_I2C3 34 +#define CLK_I2C4 35 +#define CLK_I2C5 36 +#define CLK_SPI1 37 +#define CLK_CAPTURE_PWM2 38 +#define CLK_PWM2 39 +#define DBCLK_GPIO140 +#define DBCLK_GPIO241 +#define DBCLK_GPIO342 +#define DBCLK_GPIO443 +#define CLK_SARADC 44 +#define CLK_TIMER0 45 +#define CLK_TIMER1 46 +#define CLK_TIMER2 47 +#define CLK_TIMER3 48 +#define CLK_TIMER4 49 +#define CLK_TIMER5 50 +#define CLK_CAN51 +#define CLK_NPU_TSADC 52 +#define CLK_NPU_TSADCPHY 53 +#define CLK_CPU_TSADC 54 +#define CLK_CPU_TSADCPHY 55 +#define CLK_CRYPTO_CORE56 +#define CLK_CRYPTO_PKA 57 +#define MCLK_I2S0_TX_DIV 58 +#define MCLK_I2S0_TX_FRACDIV 59 +#define MCLK_I2S0_TX_MUX 60 +#define MCLK_I2S0_TX 61 +#define MCLK_I2S0_RX_DIV 62 +#define MCLK_I2S0_RX_FRACDIV 63 +#define MCLK_I2S0_RX_MUX 64 +#define MCLK_I2S0_RX 65 +#define MCLK_I2S0_TX_OUT2IO66 +#define MCLK_I2S0_RX_OUT2IO67 +#define
[PATCH v2 17/28] dt-bindings: power: Add power-domain header for rv1126
Add power-domain header for RV1126 SoC from description in TRM. Signed-off-by: Elaine Zhang Signed-off-by: Jagan Teki --- Changes for v2: - update filename .../dt-bindings/power/rockchip,rv1126-power.h | 35 +++ 1 file changed, 35 insertions(+) create mode 100644 include/dt-bindings/power/rockchip,rv1126-power.h diff --git a/include/dt-bindings/power/rockchip,rv1126-power.h b/include/dt-bindings/power/rockchip,rv1126-power.h new file mode 100644 index 00..38a68e000d --- /dev/null +++ b/include/dt-bindings/power/rockchip,rv1126-power.h @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __DT_BINDINGS_POWER_RV1126_POWER_H__ +#define __DT_BINDINGS_POWER_RV1126_POWER_H__ + +/* VD_CORE */ +#define RV1126_PD_CPU_00 +#define RV1126_PD_CPU_11 +#define RV1126_PD_CPU_22 +#define RV1126_PD_CPU_33 +#define RV1126_PD_CORE_ALIVE 4 + +/* VD_PMU */ +#define RV1126_PD_PMU 5 +#define RV1126_PD_PMU_ALIVE6 + +/* VD_NPU */ +#define RV1126_PD_NPU 7 + +/* VD_VEPU */ +#define RV1126_PD_VEPU 8 + +/* VD_LOGIC */ +#define RV1126_PD_VI 9 +#define RV1126_PD_VO 10 +#define RV1126_PD_ISPP 11 +#define RV1126_PD_VDPU 12 +#define RV1126_PD_CRYPTO 13 +#define RV1126_PD_DDR 14 +#define RV1126_PD_NVM 15 +#define RV1126_PD_SDIO 16 +#define RV1126_PD_USB 17 +#define RV1126_PD_LOGIC_ALIVE 18 + +#endif -- 2.25.1
[PATCH v2 13/28] pinctrl: rockchip: Add rv1126 support
Add pinctrl driver for Rockchip RV1126.
Signed-off-by: Jianqun Xu
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
drivers/pinctrl/rockchip/Makefile | 1 +
drivers/pinctrl/rockchip/pinctrl-rv1126.c | 416 ++
2 files changed, 417 insertions(+)
create mode 100644 drivers/pinctrl/rockchip/pinctrl-rv1126.c
diff --git a/drivers/pinctrl/rockchip/Makefile
b/drivers/pinctrl/rockchip/Makefile
index 7d03f8101d..9884355473 100644
--- a/drivers/pinctrl/rockchip/Makefile
+++ b/drivers/pinctrl/rockchip/Makefile
@@ -15,3 +15,4 @@ obj-$(CONFIG_ROCKCHIP_RK3328) += pinctrl-rk3328.o
obj-$(CONFIG_ROCKCHIP_RK3368) += pinctrl-rk3368.o
obj-$(CONFIG_ROCKCHIP_RK3399) += pinctrl-rk3399.o
obj-$(CONFIG_ROCKCHIP_RV1108) += pinctrl-rv1108.o
+obj-$(CONFIG_ROCKCHIP_RV1126) += pinctrl-rv1126.o
diff --git a/drivers/pinctrl/rockchip/pinctrl-rv1126.c
b/drivers/pinctrl/rockchip/pinctrl-rv1126.c
new file mode 100644
index 00..eefb8b1776
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl-rv1126.c
@@ -0,0 +1,416 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "pinctrl-rockchip.h"
+
+static struct rockchip_mux_recalced_data rv1126_mux_recalced_data[] = {
+ {
+ .num = 0,
+ .pin = 20,
+ .reg = 0x1,
+ .bit = 0,
+ .mask = 0xf
+ },
+ {
+ .num = 0,
+ .pin = 21,
+ .reg = 0x1,
+ .bit = 4,
+ .mask = 0xf
+ },
+ {
+ .num = 0,
+ .pin = 22,
+ .reg = 0x1,
+ .bit = 8,
+ .mask = 0xf
+ },
+ {
+ .num = 0,
+ .pin = 23,
+ .reg = 0x1,
+ .bit = 12,
+ .mask = 0xf
+ },
+};
+
+static struct rockchip_mux_route_data rv1126_mux_route_data[] = {
+ MR_TOPGRF(RK_GPIO3, RK_PD2, 1, 0x10260, RK_GENMASK_VAL(0, 0, 0)), /*
I2S0_MCLK_M0 */
+ MR_TOPGRF(RK_GPIO3, RK_PB0, 3, 0x10260, RK_GENMASK_VAL(0, 0, 1)), /*
I2S0_MCLK_M1 */
+
+ MR_TOPGRF(RK_GPIO0, RK_PD4, 4, 0x10260, RK_GENMASK_VAL(3, 2, 0)), /*
I2S1_MCLK_M0 */
+ MR_TOPGRF(RK_GPIO1, RK_PD5, 2, 0x10260, RK_GENMASK_VAL(3, 2, 1)), /*
I2S1_MCLK_M1 */
+ MR_TOPGRF(RK_GPIO2, RK_PC7, 6, 0x10260, RK_GENMASK_VAL(3, 2, 2)), /*
I2S1_MCLK_M2 */
+
+ MR_TOPGRF(RK_GPIO1, RK_PD0, 1, 0x10260, RK_GENMASK_VAL(4, 4, 0)), /*
I2S2_MCLK_M0 */
+ MR_TOPGRF(RK_GPIO2, RK_PB3, 2, 0x10260, RK_GENMASK_VAL(4, 4, 1)), /*
I2S2_MCLK_M1 */
+
+ MR_TOPGRF(RK_GPIO3, RK_PD4, 2, 0x10260, RK_GENMASK_VAL(12, 12, 0)), /*
PDM_CLK0_M0 */
+ MR_TOPGRF(RK_GPIO3, RK_PC0, 3, 0x10260, RK_GENMASK_VAL(12, 12, 1)), /*
PDM_CLK0_M1 */
+
+ MR_TOPGRF(RK_GPIO3, RK_PC6, 1, 0x10264, RK_GENMASK_VAL(0, 0, 0)), /*
CIF_CLKOUT_M0 */
+ MR_TOPGRF(RK_GPIO2, RK_PD1, 3, 0x10264, RK_GENMASK_VAL(0, 0, 1)), /*
CIF_CLKOUT_M1 */
+
+ MR_TOPGRF(RK_GPIO3, RK_PA4, 5, 0x10264, RK_GENMASK_VAL(5, 4, 0)), /*
I2C3_SCL_M0 */
+ MR_TOPGRF(RK_GPIO2, RK_PD4, 7, 0x10264, RK_GENMASK_VAL(5, 4, 1)), /*
I2C3_SCL_M1 */
+ MR_TOPGRF(RK_GPIO1, RK_PD6, 3, 0x10264, RK_GENMASK_VAL(5, 4, 2)), /*
I2C3_SCL_M2 */
+
+ MR_TOPGRF(RK_GPIO3, RK_PA0, 7, 0x10264, RK_GENMASK_VAL(6, 6, 0)), /*
I2C4_SCL_M0 */
+ MR_TOPGRF(RK_GPIO4, RK_PA0, 4, 0x10264, RK_GENMASK_VAL(6, 6, 1)), /*
I2C4_SCL_M1 */
+
+ MR_TOPGRF(RK_GPIO2, RK_PA5, 7, 0x10264, RK_GENMASK_VAL(9, 8, 0)), /*
I2C5_SCL_M0 */
+ MR_TOPGRF(RK_GPIO3, RK_PB0, 5, 0x10264, RK_GENMASK_VAL(9, 8, 1)), /*
I2C5_SCL_M1 */
+ MR_TOPGRF(RK_GPIO1, RK_PD0, 4, 0x10264, RK_GENMASK_VAL(9, 8, 2)), /*
I2C5_SCL_M2 */
+
+ MR_TOPGRF(RK_GPIO3, RK_PC0, 5, 0x10264, RK_GENMASK_VAL(11, 10, 0)), /*
SPI1_CLK_M0 */
+ MR_TOPGRF(RK_GPIO1, RK_PC6, 3, 0x10264, RK_GENMASK_VAL(11, 10, 1)), /*
SPI1_CLK_M1 */
+ MR_TOPGRF(RK_GPIO2, RK_PD5, 6, 0x10264, RK_GENMASK_VAL(11, 10, 2)), /*
SPI1_CLK_M2 */
+
+ MR_TOPGRF(RK_GPIO3, RK_PC0, 2, 0x10264, RK_GENMASK_VAL(12, 12, 0)), /*
RGMII_CLK_M0 */
+ MR_TOPGRF(RK_GPIO2, RK_PB7, 2, 0x10264, RK_GENMASK_VAL(12, 12, 1)), /*
RGMII_CLK_M1 */
+
+ MR_TOPGRF(RK_GPIO3, RK_PA1, 3, 0x10264, RK_GENMASK_VAL(13, 13, 0)), /*
CAN_TXD_M0 */
+ MR_TOPGRF(RK_GPIO3, RK_PA7, 5, 0x10264, RK_GENMASK_VAL(13, 13, 1)), /*
CAN_TXD_M1 */
+
+ MR_TOPGRF(RK_GPIO3, RK_PA4, 6, 0x10268, RK_GENMASK_VAL(0, 0, 0)), /*
PWM8_M0 */
+ MR_TOPGRF(RK_GPIO2, RK_PD7, 5, 0x10268, RK_GENMASK_VAL(0, 0, 1)), /*
PWM8_M1 */
+
+ MR_TOPGRF(RK_GPIO3, RK_PA5, 6, 0x10268, RK_GENMASK_VAL(2, 2, 0)), /*
PWM9_M0 */
+ MR_TOPGRF(RK_GPIO2, RK_PD6, 5, 0x10268, RK_GENMASK_VAL(2, 2, 1)), /*
PWM9_M1 */
+
+ MR_TOPGRF(RK_GPIO3, RK_PA6, 6, 0x10268, RK_GENMASK_VAL(4, 4, 0)), /*
PWM10_M0 */
+
[PATCH v2 12/28] pinctrl: rockchip: Add pinctrl route types
Some pins in rockchip are routed via Top GRF and PMU GRF
instead of direct regmap.
Add support to handle all these routing paths so that the
SoC pinctrl drivers will use them accordingly.
Signed-off-by: Jianqun Xu
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
drivers/pinctrl/rockchip/pinctrl-px30.c | 11 +---
drivers/pinctrl/rockchip/pinctrl-rk3128.c | 11 +---
drivers/pinctrl/rockchip/pinctrl-rk322x.c | 11 +---
drivers/pinctrl/rockchip/pinctrl-rk3288.c | 11 +---
drivers/pinctrl/rockchip/pinctrl-rk3308.c | 11 +---
drivers/pinctrl/rockchip/pinctrl-rk3328.c | 11 +---
drivers/pinctrl/rockchip/pinctrl-rk3399.c | 11 +---
.../pinctrl/rockchip/pinctrl-rockchip-core.c | 45 --
drivers/pinctrl/rockchip/pinctrl-rockchip.h | 58 ++-
9 files changed, 102 insertions(+), 78 deletions(-)
diff --git a/drivers/pinctrl/rockchip/pinctrl-px30.c
b/drivers/pinctrl/rockchip/pinctrl-px30.c
index 9de29c0b8b..2c35491b24 100644
--- a/drivers/pinctrl/rockchip/pinctrl-px30.c
+++ b/drivers/pinctrl/rockchip/pinctrl-px30.c
@@ -80,7 +80,7 @@ static int px30_set_mux(struct rockchip_pin_bank *bank, int
pin, int mux)
struct regmap *regmap;
int reg, ret, mask, mux_type;
u8 bit;
- u32 data, route_reg, route_val;
+ u32 data;
regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
? priv->regmap_pmu : priv->regmap_base;
@@ -90,15 +90,6 @@ static int px30_set_mux(struct rockchip_pin_bank *bank, int
pin, int mux)
reg = bank->iomux[iomux_num].offset;
reg += rockchip_get_mux_data(mux_type, pin, , );
- if (bank->route_mask & BIT(pin)) {
- if (rockchip_get_mux_route(bank, pin, mux, _reg,
- _val)) {
- ret = regmap_write(regmap, route_reg, route_val);
- if (ret)
- return ret;
- }
- }
-
data = (mask << (bit + 16));
data |= (mux & mask) << bit;
ret = regmap_write(regmap, reg, data);
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3128.c
b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
index e6dc1af86e..355c45eb7f 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3128.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
@@ -106,7 +106,7 @@ static int rk3128_set_mux(struct rockchip_pin_bank *bank,
int pin, int mux)
struct regmap *regmap;
int reg, ret, mask, mux_type;
u8 bit;
- u32 data, route_reg, route_val;
+ u32 data;
regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
? priv->regmap_pmu : priv->regmap_base;
@@ -119,15 +119,6 @@ static int rk3128_set_mux(struct rockchip_pin_bank *bank,
int pin, int mux)
if (bank->recalced_mask & BIT(pin))
rockchip_get_recalced_mux(bank, pin, , , );
- if (bank->route_mask & BIT(pin)) {
- if (rockchip_get_mux_route(bank, pin, mux, _reg,
- _val)) {
- ret = regmap_write(regmap, route_reg, route_val);
- if (ret)
- return ret;
- }
- }
-
data = (mask << (bit + 16));
data |= (mux & mask) << bit;
ret = regmap_write(regmap, reg, data);
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk322x.c
b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
index 7c58f40d93..351406da2d 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk322x.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
@@ -150,7 +150,7 @@ static int rk3228_set_mux(struct rockchip_pin_bank *bank,
int pin, int mux)
struct regmap *regmap;
int reg, ret, mask, mux_type;
u8 bit;
- u32 data, route_reg, route_val;
+ u32 data;
regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
? priv->regmap_pmu : priv->regmap_base;
@@ -160,15 +160,6 @@ static int rk3228_set_mux(struct rockchip_pin_bank *bank,
int pin, int mux)
reg = bank->iomux[iomux_num].offset;
reg += rockchip_get_mux_data(mux_type, pin, , );
- if (bank->route_mask & BIT(pin)) {
- if (rockchip_get_mux_route(bank, pin, mux, _reg,
- _val)) {
- ret = regmap_write(regmap, route_reg, route_val);
- if (ret)
- return ret;
- }
- }
-
data = (mask << (bit + 16));
data |= (mux & mask) << bit;
ret = regmap_write(regmap, reg, data);
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index 5894f47f53..a976b7aeeb 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -37,7 +37,7 @@ static int rk3288_set_mux(struct rockchip_pin_bank *bank, int
pin,
[PATCH v2 11/28] ram: rockchip: Add rv1126 lpddr4 support
Add LPDDR4 detection timings and support for RV1126.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
.../sdram-rv1126-lpddr4-detect-1056.inc | 78 +++
.../sdram-rv1126-lpddr4-detect-328.inc| 78 +++
.../sdram-rv1126-lpddr4-detect-396.inc| 78 +++
.../sdram-rv1126-lpddr4-detect-528.inc| 78 +++
.../sdram-rv1126-lpddr4-detect-664.inc| 78 +++
.../sdram-rv1126-lpddr4-detect-784.inc| 78 +++
.../sdram-rv1126-lpddr4-detect-924.inc| 78 +++
drivers/ram/rockchip/sdram_rv1126.c | 10 +++
8 files changed, 556 insertions(+)
create mode 100644 drivers/ram/rockchip/sdram-rv1126-lpddr4-detect-1056.inc
create mode 100644 drivers/ram/rockchip/sdram-rv1126-lpddr4-detect-328.inc
create mode 100644 drivers/ram/rockchip/sdram-rv1126-lpddr4-detect-396.inc
create mode 100644 drivers/ram/rockchip/sdram-rv1126-lpddr4-detect-528.inc
create mode 100644 drivers/ram/rockchip/sdram-rv1126-lpddr4-detect-664.inc
create mode 100644 drivers/ram/rockchip/sdram-rv1126-lpddr4-detect-784.inc
create mode 100644 drivers/ram/rockchip/sdram-rv1126-lpddr4-detect-924.inc
diff --git a/drivers/ram/rockchip/sdram-rv1126-lpddr4-detect-1056.inc
b/drivers/ram/rockchip/sdram-rv1126-lpddr4-detect-1056.inc
new file mode 100644
index 00..705cbfb5cb
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-rv1126-lpddr4-detect-1056.inc
@@ -0,0 +1,78 @@
+{
+ {
+ {
+ .rank = 0x1,
+ .col = 0xB,
+ .bk = 0x3,
+ .bw = 0x1,
+ .dbw = 0x1,
+ .row_3_4 = 0x0,
+ .cs0_row = 0x11,
+ .cs1_row = 0x11,
+ .cs0_high16bit_row = 0x0,
+ .cs1_high16bit_row = 0x0,
+ .ddrconfig = 0
+ },
+ {
+ {0x41241522},
+ {0x15050b07},
+ {0x0602},
+ {0x},
+ {0x0054},
+ {0x},
+ 0x00ff
+ }
+ },
+ {
+ .ddr_freq = 1056, /* clock rate(MHz) */
+ .dramtype = LPDDR4,
+ .num_channels = 1,
+ .stride = 0,
+ .odt = 1
+ },
+ {
+ {
+ {0x, 0x81081020}, /* MSTR */
+ {0x0064, 0x00400094}, /* RFSHTMG */
+ {0x00d0, 0x00030409}, /* INIT0 */
+ {0x00d4, 0x0069}, /* INIT1 */
+ {0x00d8, 0x0206}, /* INIT2 */
+ {0x00dc, 0x0034001b}, /* INIT3 */
+ {0x00e0, 0x0031}, /* INIT4 */
+ {0x00e8, 0x0011}, /* INIT6 */
+ {0x00ec, 0x}, /* INIT7 */
+ {0x00f4, 0x000f033f}, /* RANKCTL */
+ {0x0100, 0x14161217}, /* DRAMTMG0 */
+ {0x0104, 0x00040422}, /* DRAMTMG1 */
+ {0x0108, 0x050a0e0f}, /* DRAMTMG2 */
+ {0x010c, 0x00808000}, /* DRAMTMG3 */
+ {0x0110, 0x0a04060c}, /* DRAMTMG4 */
+ {0x0114, 0x02040808}, /* DRAMTMG5 */
+ {0x0118, 0x01010005}, /* DRAMTMG6 */
+ {0x011c, 0x0401}, /* DRAMTMG7 */
+ {0x0120, 0x0606}, /* DRAMTMG8 */
+ {0x0130, 0x0002}, /* DRAMTMG12 */
+ {0x0134, 0x0a12}, /* DRAMTMG13 */
+ {0x0138, 0x0098}, /* DRAMTMG14 */
+ {0x0180, 0x02100010}, /* ZQCTL0 */
+ {0x0184, 0x01b0}, /* ZQCTL1 */
+ {0x0190, 0x07070001}, /* DFITMG0 */
+ {0x0198, 0x07000101}, /* DFILPCFG0 */
+ {0x01a0, 0xc043}, /* DFIUPD0 */
+ {0x0240, 0x0b050d3c}, /* ODTCFG */
+ {0x0244, 0x0101}, /* ODTMAP */
+ {0x0250, 0x1f00}, /* SCHED */
+ {0x0490, 0x0001}, /* PCTRL_0 */
+ {0x, 0x}
+ }
+ },
+ {
+ {
+ {0x0004, 0x008d}, /* PHYREG01 */
+ {0x0014, 0x0014}, /* PHYREG05 */
+ {0x0018,
[PATCH v2 10/28] ram: rockchip: rv1126: Control ddr init prints via DEBUG
Control the ddr init print messages via RAM_ROCKCHIP_DEBUG
instead of printing by default.
This gives an option to configs to enable these prints or
not.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
drivers/ram/rockchip/sdram_rv1126.c | 38 +++--
1 file changed, 25 insertions(+), 13 deletions(-)
diff --git a/drivers/ram/rockchip/sdram_rv1126.c
b/drivers/ram/rockchip/sdram_rv1126.c
index 9b1c34391e..6fe5b0305e 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -3358,22 +3358,33 @@ static void ddr_set_rate_for_fsp(struct dram_info *dram,
if (get_wrlvl_val(dram, sdram_params))
printascii("get wrlvl value fail\n");
- printascii("change to: ");
- printdec(f1);
- printascii("MHz\n");
+ if (IS_ENABLED(CONFIG_RAM_ROCKCHIP_DEBUG)) {
+ printascii("change to: ");
+ printdec(f1);
+ printascii("MHz\n");
+ }
ddr_set_rate(_info, sdram_params, f1,
sdram_params->base.ddr_freq, 1, 1, 1);
- printascii("change to: ");
- printdec(f2);
- printascii("MHz\n");
+
+ if (IS_ENABLED(CONFIG_RAM_ROCKCHIP_DEBUG)) {
+ printascii("change to: ");
+ printdec(f2);
+ printascii("MHz\n");
+ }
ddr_set_rate(_info, sdram_params, f2, f1, 2, 0, 1);
- printascii("change to: ");
- printdec(f3);
- printascii("MHz\n");
+
+ if (IS_ENABLED(CONFIG_RAM_ROCKCHIP_DEBUG)) {
+ printascii("change to: ");
+ printdec(f3);
+ printascii("MHz\n");
+ }
ddr_set_rate(_info, sdram_params, f3, f2, 3, 1, 1);
- printascii("change to: ");
- printdec(f0);
- printascii("MHz(final freq)\n");
+
+ if (IS_ENABLED(CONFIG_RAM_ROCKCHIP_DEBUG)) {
+ printascii("change to: ");
+ printdec(f0);
+ printascii("MHz(final freq)\n");
+ }
ddr_set_rate(_info, sdram_params, f0, f3, 0, 0, 1);
}
@@ -3465,7 +3476,8 @@ static int rv1126_dmc_init(struct udevice *dev)
save_rw_trn_result_to_ddr(_trn_result);
#endif
- printascii("out\n");
+ if (IS_ENABLED(CONFIG_RAM_ROCKCHIP_DEBUG))
+ printascii("out\n");
return ret;
error:
--
2.25.1
[PATCH v2 08/28] ram: rockchip: Add rv1126 ddr loader params
Add DDR loader parameters for Rockchip RV1126 SoC. Signed-off-by: YouMin Chen Signed-off-by: Jagan Teki --- Changes for v2: - none .../rockchip/sdram-rv1126-loader_params.inc | 198 ++ 1 file changed, 198 insertions(+) create mode 100644 drivers/ram/rockchip/sdram-rv1126-loader_params.inc diff --git a/drivers/ram/rockchip/sdram-rv1126-loader_params.inc b/drivers/ram/rockchip/sdram-rv1126-loader_params.inc new file mode 100644 index 00..4b75f166d3 --- /dev/null +++ b/drivers/ram/rockchip/sdram-rv1126-loader_params.inc @@ -0,0 +1,198 @@ +0x12345678, +2,/* version */ +(0 << 0) | (1 << 8) | (9 << 16) | (8 << 24),/* cpu_gen,global index */ +(0 << 0) | (9 << 8) | (17 << 16) | (9 << 24),/* d2,d3 index */ +(26 << 0) | (9 << 8) | (0 << 16) | (0 << 24),/* d4,d5 index */ +(0 << 0) | (9 << 8) | (35 << 16) | (9 << 24),/* lp2,lp3 index */ +(44 << 0) | (13 << 8) | (0 << 16) | (0 << 24),/* lp4,lp5 index */ +(0 << 0) | (0 << 8) | (57 << 16) | (8 << 24),/* skew index, dq_map index */ +(65 << 0) | (13 << 8) | (0 << 16) | (0 << 24), /*lp4x index*/ +/* global info */ +0, +(93 << 16) | 13,/* sr_idle << 16 | pd_idle */ +0,/* channel info */ +1,/* 2t info */ +0, 0, 0, 0,/* reserved */ + +/* ddr3 */ +(924 << DDR_FREQ_F0_SHIFT) | (328 << DDR_FREQ_F1_SHIFT), +(528 << DDR_FREQ_F2_SHIFT) | (784 << DDR_FREQ_F3_SHIFT), +(0 << DDR_FREQ_F4_SHIFT) | (0 << DDR_FREQ_F5_SHIFT), +/* drv when odt on */ +(30 << PHY_DQ_DRV_SHIFT) | (41 << PHY_CA_DRV_SHIFT) | + (38 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT), +/* drv when odt off */ +(30 << PHY_DQ_DRV_SHIFT) | (30 << PHY_CA_DRV_SHIFT) | + (38 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT), +/* odt info */ +(120 << DRAM_ODT_SHIFT) | (141 << PHY_ODT_SHIFT) | + (1 << PHY_ODT_PUUP_EN_SHIFT) | + (0 << PHY_ODT_PUDN_EN_SHIFT), +/* odt enable freq */ +(333 << DRAM_ODT_EN_FREQ_SHIFT) | (333 << PHY_ODT_EN_FREQ_SHIFT), +/* slew rate when odt enable */ +(0x1f << PHY_DQ_SR_SHIFT) | (0x1f << PHY_CA_SR_SHIFT) | + (0x1f << PHY_CLK_SR_SHIFT), +/* slew ratee when odt disable */ +(0x1f << PHY_DQ_SR_SHIFT) | (0x1f << PHY_CA_SR_SHIFT) | + (0x1f << PHY_CLK_SR_SHIFT), + +/* ddr4 */ +(924 << DDR_FREQ_F0_SHIFT) | (328 << DDR_FREQ_F1_SHIFT), +(528 << DDR_FREQ_F2_SHIFT) | (784 << DDR_FREQ_F3_SHIFT), +(0 << DDR_FREQ_F4_SHIFT) | (0 << DDR_FREQ_F5_SHIFT), +/* drv when odt on */ +(37 << PHY_DQ_DRV_SHIFT) | (44 << PHY_CA_DRV_SHIFT) | + (37 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT), +/* drv when odt off */ +(37 << PHY_DQ_DRV_SHIFT) | (44 << PHY_CA_DRV_SHIFT) | + (37 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT), +/* odt info */ +(120 << DRAM_ODT_SHIFT) | (148 << PHY_ODT_SHIFT) | + (1 << PHY_ODT_PUUP_EN_SHIFT) | (1 << PHY_ODT_PUDN_EN_SHIFT), +/* odt enable freq */ +(625 << DRAM_ODT_EN_FREQ_SHIFT) | (625 << PHY_ODT_EN_FREQ_SHIFT), +/* slew rate when odt enable */ +(0xe << PHY_DQ_SR_SHIFT) | (0x3 << PHY_CA_SR_SHIFT) | + (0x3 << PHY_CLK_SR_SHIFT), +/* slew ratee when odt disable */ +(0xe << PHY_DQ_SR_SHIFT) | (0x3 << PHY_CA_SR_SHIFT) | + (0x3 << PHY_CLK_SR_SHIFT), + +/* lpddr3 */ +(924 << DDR_FREQ_F0_SHIFT) | (328 << DDR_FREQ_F1_SHIFT), +(528 << DDR_FREQ_F2_SHIFT) | (784 << DDR_FREQ_F3_SHIFT), +(0 << DDR_FREQ_F4_SHIFT) | (0 << DDR_FREQ_F5_SHIFT), +/* drv when odt on */ +(28 << PHY_DQ_DRV_SHIFT) | (37 << PHY_CA_DRV_SHIFT) | + (34 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT), +/* drv when odt off */ +(28 << PHY_DQ_DRV_SHIFT) | (37 << PHY_CA_DRV_SHIFT) | + (34 << PHY_CLK_DRV_SHIFT) | (34 << DRAM_DQ_DRV_SHIFT), +/* odt info */ +(120 << DRAM_ODT_SHIFT) | (148 << PHY_ODT_SHIFT) | + (1 << PHY_ODT_PUUP_EN_SHIFT) | (1 << PHY_ODT_PUDN_EN_SHIFT), +/* odt enable freq */ +(333 << DRAM_ODT_EN_FREQ_SHIFT) | (333 << PHY_ODT_EN_FREQ_SHIFT), + +/* slew rate when odt enable */ +(0xe << PHY_DQ_SR_SHIFT) | (0x0 << PHY_CA_SR_SHIFT) | + (0x0 << PHY_CLK_SR_SHIFT), +/* slew ratee when odt disable */ +(0xe << PHY_DQ_SR_SHIFT) | (0x0 << PHY_CA_SR_SHIFT) | + (0x0 << PHY_CLK_SR_SHIFT), + +/* lpddr4 */ +(924 << DDR_FREQ_F0_SHIFT) | (328 << DDR_FREQ_F1_SHIFT), +(528 << DDR_FREQ_F2_SHIFT) | (784 << DDR_FREQ_F3_SHIFT), +(0 << DDR_FREQ_F4_SHIFT) | (0 << DDR_FREQ_F5_SHIFT), + +/* drv when odt on */ +(38 << PHY_DQ_DRV_SHIFT) | (46 << PHY_CA_DRV_SHIFT) | + (38 << PHY_CLK_DRV_SHIFT) | (40 << DRAM_DQ_DRV_SHIFT), +/* drv when odt off */ +(38 << PHY_DQ_DRV_SHIFT) | (46 << PHY_CA_DRV_SHIFT) | + (38 << PHY_CLK_DRV_SHIFT) | (40 << DRAM_DQ_DRV_SHIFT), +/* odt info and PU-cal info */ +(240 << DRAM_ODT_SHIFT) | (80 << PHY_ODT_SHIFT) | + (0 << LP4_CA_ODT_SHIFT) | + (LPDDR4_VDDQ_2_5 << LP4_DRV_PU_CAL_ODTEN_SHIFT) | + (LPDDR4_VDDQ_2_5 << LP4_DRV_PU_CAL_ODTOFF_SHIFT) | + (0 << PHY_LP4_DRV_PULLDOWN_EN_ODTEN_SHIFT) | + (0 << PHY_LP4_DRV_PULLDOWN_EN_ODTOFF_SHIFT), +/* odt enable freq */ +(333 << PHY_LP4_ODT_EN_FREQ_SHIFT) | (333 << LP4_DQ_ODT_EN_FREQ_SHIFT), +/* slew rate when odt enable
[PATCH v2 07/28] ram: rockchip: Add rv1126 ddr3 support
Add DDR3 detection timings for Rockchip RV1126 SoC.
Signed-off-by: YouMin Chen
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
.../sdram-rv1126-ddr3-detect-1056.inc | 72 +++
.../rockchip/sdram-rv1126-ddr3-detect-328.inc | 72 +++
.../rockchip/sdram-rv1126-ddr3-detect-396.inc | 72 +++
.../rockchip/sdram-rv1126-ddr3-detect-528.inc | 72 +++
.../rockchip/sdram-rv1126-ddr3-detect-664.inc | 72 +++
.../rockchip/sdram-rv1126-ddr3-detect-784.inc | 72 +++
.../rockchip/sdram-rv1126-ddr3-detect-924.inc | 72 +++
7 files changed, 504 insertions(+)
create mode 100644 drivers/ram/rockchip/sdram-rv1126-ddr3-detect-1056.inc
create mode 100644 drivers/ram/rockchip/sdram-rv1126-ddr3-detect-328.inc
create mode 100644 drivers/ram/rockchip/sdram-rv1126-ddr3-detect-396.inc
create mode 100644 drivers/ram/rockchip/sdram-rv1126-ddr3-detect-528.inc
create mode 100644 drivers/ram/rockchip/sdram-rv1126-ddr3-detect-664.inc
create mode 100644 drivers/ram/rockchip/sdram-rv1126-ddr3-detect-784.inc
create mode 100644 drivers/ram/rockchip/sdram-rv1126-ddr3-detect-924.inc
diff --git a/drivers/ram/rockchip/sdram-rv1126-ddr3-detect-1056.inc
b/drivers/ram/rockchip/sdram-rv1126-ddr3-detect-1056.inc
new file mode 100644
index 00..4cde21565b
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-rv1126-ddr3-detect-1056.inc
@@ -0,0 +1,72 @@
+{
+ {
+ {
+ .rank = 0x1,
+ .col = 0xC,
+ .bk = 0x3,
+ .bw = 0x0,
+ .dbw = 0x0,
+ .row_3_4 = 0x0,
+ .cs0_row = 0x10,
+ .cs1_row = 0x10,
+ .cs0_high16bit_row = 0x10,
+ .cs1_high16bit_row = 0x10,
+ .ddrconfig = 0
+ },
+ {
+ {0x351b1019},
+ {0x12030903},
+ {0x0002},
+ {0x},
+ {0x000c},
+ {0x},
+ 0x00ff
+ }
+ },
+ {
+ .ddr_freq = 1056, /* clock rate(MHz) */
+ .dramtype = DDR3,
+ .num_channels = 1,
+ .stride = 0,
+ .odt = 1
+ },
+ {
+ {
+ {0x, 0x43042001}, /* MSTR */
+ {0x0064, 0x008000b9}, /* RFSHTMG */
+ {0x00d0, 0x00020103}, /* INIT0 */
+ {0x00d4, 0x0069}, /* INIT1 */
+ {0x00d8, 0x0100}, /* INIT2 */
+ {0x00dc, 0x01240040}, /* INIT3 */
+ {0x00e0, 0x0028}, /* INIT4 */
+ {0x00e4, 0x000c}, /* INIT5 */
+ {0x00f4, 0x000f011f}, /* RANKCTL */
+ {0x0100, 0x0f132414}, /* DRAMTMG0 */
+ {0x0104, 0x000d0419}, /* DRAMTMG1 */
+ {0x0108, 0x0507050b}, /* DRAMTMG2 */
+ {0x010c, 0x00202008}, /* DRAMTMG3 */
+ {0x0110, 0x07020408}, /* DRAMTMG4 */
+ {0x0114, 0x06060404}, /* DRAMTMG5 */
+ {0x0120, 0x0907}, /* DRAMTMG8 */
+ {0x0180, 0x00a9002b}, /* ZQCTL0 */
+ {0x0184, 0x}, /* ZQCTL1 */
+ {0x0190, 0x07050003}, /* DFITMG0 */
+ {0x0198, 0x07000101}, /* DFILPCFG0 */
+ {0x01a0, 0xc043}, /* DFIUPD0 */
+ {0x0240, 0x06000610}, /* ODTCFG */
+ {0x0244, 0x0201}, /* ODTMAP */
+ {0x0250, 0x1f00}, /* SCHED */
+ {0x0490, 0x0001}, /* PCTRL_0 */
+ {0x, 0x}
+ }
+ },
+ {
+ {
+ {0x0004, 0x008a}, /* PHYREG01 */
+ {0x0014, 0x000e}, /* PHYREG05 */
+ {0x0018, 0x}, /* PHYREG06 */
+ {0x001c, 0x000a}, /* PHYREG07 */
+ {0x, 0x}
+ }
+ }
+},
diff --git a/drivers/ram/rockchip/sdram-rv1126-ddr3-detect-328.inc
b/drivers/ram/rockchip/sdram-rv1126-ddr3-detect-328.inc
new file mode 100644
index 00..eef61ab500
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-rv1126-ddr3-detect-328.inc
@@ -0,0 +1,72 @@
+{
+ {
+
[PATCH v2 06/28] ram: rockchip: Update ddr pctl regs for px30
Add full ddr pctl registers and bit masks for px30.
Signed-off-by: YouMin Chen
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
.../asm/arch-rockchip/sdram_pctl_px30.h | 100 +-
drivers/ram/rockchip/sdram_pctl_px30.c| 6 +-
2 files changed, 101 insertions(+), 5 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h
b/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h
index 3a3657789f..3780dc6ea5 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h
@@ -12,7 +12,7 @@
#endif
struct ddr_pctl_regs {
- u32 pctl[30][2];
+ u32 pctl[35][2];
};
/* ddr pctl registers define */
@@ -25,6 +25,7 @@ struct ddr_pctl_regs {
#define DDR_PCTL2_MRCTRL2 0x1c
#define DDR_PCTL2_DERATEEN 0x20
#define DDR_PCTL2_DERATEINT0x24
+#define DDR_PCTL2_MSTR20x28
#define DDR_PCTL2_PWRCTL 0x30
#define DDR_PCTL2_PWRTMG 0x34
#define DDR_PCTL2_HWLPCTL 0x38
@@ -122,8 +123,103 @@ struct ddr_pctl_regs {
#define DDR_PCTL2_PCFGW_n 0x408
#define DDR_PCTL2_PCTRL_n 0x490
+#define UMCTL2_REGS_FREQ(n)\
+ ((0x1000 * (n) + (((n) > 0) ? 0x1000 : 0)))
+
+/* PCTL2_MSTR */
+#define PCTL2_FREQUENCY_MODE_MASK (1)
+#define PCTL2_FREQUENCY_MODE_SHIFT (29)
+#define PCTL2_DLL_OFF_MODE BIT(15)
+/* PCTL2_STAT */
+#define PCTL2_SELFREF_TYPE_MASK(3 << 4)
+#define PCTL2_SELFREF_TYPE_SR_NOT_AUTO (2 << 4)
+#define PCTL2_OPERATING_MODE_MASK (7)
+#define PCTL2_OPERATING_MODE_INIT (0)
+#define PCTL2_OPERATING_MODE_NORMAL(1)
+#define PCTL2_OPERATING_MODE_PD(2)
+#define PCTL2_OPERATING_MODE_SR(3)
+/* PCTL2_MRCTRL0 */
+#define PCTL2_MR_WRBIT(31)
+#define PCTL2_MR_ADDR_SHIFT(12)
+#define PCTL2_MR_RANK_SHIFT(4)
+#define PCTL2_MR_TYPE_WR (0)
+#define PCTL2_MR_TYPE_RD (1)
+/* PCTL2_MRCTRL1 */
+#define PCTL2_MR_ADDRESS_SHIFT (8)
+#define PCTL2_MR_DATA_MASK (0xff)
/* PCTL2_MRSTAT */
-#define MR_WR_BUSY BIT(0)
+#define PCTL2_MR_WR_BUSY BIT(0)
+/* PCTL2_DERATEEN */
+#define PCTL2_DERATE_ENABLE(1)
+/* PCTL2_PWRCTL */
+#define PCTL2_SELFREF_SW BIT(5)
+#define PCTL2_POWERDOWN_EN BIT(1)
+#define PCTL2_SELFREF_EN (1)
+/* PCTL2_PWRTMG */
+#define PCTL2_SELFREF_TO_X32_MASK (0xFF)
+#define PCTL2_SELFREF_TO_X32_SHIFT (16)
+#define PCTL2_POWERDOWN_TO_X32_MASK(0x1F)
+/* PCTL2_INIT3 */
+#define PCTL2_DDR34_MR0_SHIFT (16)
+#define PCTL2_LPDDR234_MR1_SHIFT (16)
+#define PCTL2_DDR34_MR1_SHIFT (0)
+#define PCTL2_LPDDR234_MR2_SHIFT (0)
+/* PCTL2_INIT4 */
+#define PCTL2_DDR34_MR2_SHIFT (16)
+#define PCTL2_LPDDR234_MR3_SHIFT (16)
+#define PCTL2_DDR34_MR3_SHIFT (0)
+#define PCTL2_LPDDR4_MR13_SHIFT(0)
+
+/* PCTL2_INIT6 */
+#define PCTL2_DDR4_MR4_SHIFT (16)
+#define PCTL2_LPDDR4_MR11_SHIFT(16)
+#define PCTL2_DDR4_MR5_SHIFT (0)
+#define PCTL2_LPDDR4_MR12_SHIFT(0)
+
+/* PCTL2_INIT7 */
+#define PCTL2_LPDDR4_MR22_SHIFT(16)
+#define PCTL2_DDR4_MR6_SHIFT (0)
+#define PCTL2_LPDDR4_MR14_SHIFT(0)
+
+#define PCTL2_MR_MASK (0x)
+
+/* PCTL2_RFSHCTL3 */
+#define PCTL2_DIS_AUTO_REFRESH (1)
+/* PCTL2_ZQCTL0 */
+#define PCTL2_DIS_AUTO_ZQ BIT(31)
+#define PCTL2_DIS_SRX_ZQCL BIT(30)
+/* PCTL2_DFILPCFG0 */
+#define PCTL2_DFI_LP_EN_SR BIT(8)
+#define PCTL2_DFI_LP_EN_SR_MASKBIT(8)
+#define PCTL2_DFI_LP_EN_SR_SHIFT (8)
+/* PCTL2_DFIMISC */
+#define PCTL2_DFI_INIT_COMPLETE_EN (1)
+/* PCTL2_DFISTAT */
+#define PCTL2_DFI_LP_ACK BIT(1)
+#define PCTL2_DFI_INIT_COMPLETE(1)
+/* PCTL2_DBG1 */
+#define PCTL2_DIS_HIF BIT(1)
+/* PCTL2_DBGCAM */
+#define PCTL2_DBG_WR_Q_EMPTY BIT(26)
+#define PCTL2_DBG_RD_Q_EMPTY BIT(25)
+#define PCTL2_DBG_LPR_Q_DEPTH_MASK (0x << 8)
+#define PCTL2_DBG_LPR_Q_DEPTH_EMPTY(0x0 << 8)
+/* PCTL2_DBGCMD */
+#define PCTL2_RANK1_REFRESHBIT(1)
+#define PCTL2_RANK0_REFRESH(1)
+/* PCTL2_DBGSTAT */
+#define PCTL2_RANK1_REFRESH_BUSY BIT(1)
+#define PCTL2_RANK0_REFRESH_BUSY (1)
+/* PCTL2_SWCTL */
+#define PCTL2_SW_DONE (1)
+#define PCTL2_SW_DONE_CLEAR(0)
+/* PCTL2_SWSTAT */
+#define PCTL2_SW_DONE_ACK (1)
+/* PCTL2_PSTAT */
+#define PCTL2_WR_PORT_BUSY_0 BIT(16)
+#define PCTL2_RD_PORT_BUSY_0 (1)
+/* PCTL2_PCTRLn */
+#define PCTL2_PORT_EN (1)
void pctl_read_mr(void __iomem *pctl_base, u32 rank, u32 mr_num);
[PATCH v2 05/28] ram: rockchip: Update high row detection for full bw
High row detection for non-8bit bw requires axi split.
So, update the existing high row detection code in order
to support full bw chips.
Signed-off-by: YouMin Chen
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
.../include/asm/arch-rockchip/sdram_common.h | 2 +-
drivers/ram/rockchip/sdram_common.c | 56 ++-
drivers/ram/rockchip/sdram_px30.c | 2 +-
3 files changed, 55 insertions(+), 5 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h
b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index a14b37cbc5..dd316f771a 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -136,7 +136,7 @@ int sdram_detect_row(struct sdram_cap_info *cap_info,
u32 coltmp, u32 bktmp, u32 rowtmp);
int sdram_detect_row_3_4(struct sdram_cap_info *cap_info,
u32 coltmp, u32 bktmp);
-int sdram_detect_high_row(struct sdram_cap_info *cap_info);
+int sdram_detect_high_row(struct sdram_cap_info *cap_info, u32 dramtype);
int sdram_detect_cs1_row(struct sdram_cap_info *cap_info, u32 dram_type);
u64 sdram_get_cs_cap(struct sdram_cap_info *cap_info, u32 cs, u32 dram_type);
void sdram_copy_to_reg(u32 *dest, const u32 *src, u32 n);
diff --git a/drivers/ram/rockchip/sdram_common.c
b/drivers/ram/rockchip/sdram_common.c
index 1c3236746a..17d0096dfd 100644
--- a/drivers/ram/rockchip/sdram_common.c
+++ b/drivers/ram/rockchip/sdram_common.c
@@ -381,10 +381,60 @@ int sdram_detect_row_3_4(struct sdram_cap_info *cap_info,
return 0;
}
-int sdram_detect_high_row(struct sdram_cap_info *cap_info)
+int sdram_detect_high_row(struct sdram_cap_info *cap_info, u32 dramtype)
{
- cap_info->cs0_high16bit_row = cap_info->cs0_row;
- cap_info->cs1_high16bit_row = cap_info->cs1_row;
+ unsigned long base_addr;
+ u32 cs0_high_row, cs1_high_row, cs;
+ u64 cap = 0, cs0_cap = 0;
+ u32 i;
+ void __iomem *test_addr, *test_addr1;
+
+ cs = cap_info->rank;
+ /* 8bit bandwidth no enable axi split*/
+ if (!cap_info->bw) {
+ cs0_high_row = cap_info->cs0_row;
+ cs1_high_row = cap_info->cs1_row;
+ goto out;
+ }
+
+ cs0_cap = sdram_get_cs_cap(cap_info, 0, dramtype);
+ if (cs == 2) {
+ base_addr = CONFIG_SYS_SDRAM_BASE + cs0_cap;
+ cap = sdram_get_cs_cap(cap_info, 1, dramtype);
+ } else {
+ base_addr = CONFIG_SYS_SDRAM_BASE;
+ cap = cs0_cap;
+ }
+ /* detect full bandwidth size */
+ for (i = 0; i < 4; i++) {
+ test_addr = (void __iomem *)base_addr;
+ test_addr1 = (void __iomem *)(base_addr +
+(unsigned long)(cap / (1ul << (i + 1;
+ writel(0x0, test_addr);
+ writel(PATTERN, test_addr1);
+ if ((readl(test_addr) == 0x0) &&
+ (readl(test_addr1) == PATTERN))
+ break;
+ }
+ if (i == 4 && cs == 1) {
+ printascii("can't support this cap\n");
+ return -1;
+ }
+
+ if (cs == 2) {
+ cs0_high_row = cap_info->cs0_row;
+ if (i == 4)
+ cs1_high_row = 0;
+ else
+ cs1_high_row = cap_info->cs1_row - i;
+ } else {
+ cs0_high_row = cap_info->cs0_row - i;
+ cs1_high_row = 0;
+ }
+
+out:
+ cap_info->cs0_high16bit_row = cs0_high_row;
+ cap_info->cs1_high16bit_row = cs1_high_row;
return 0;
}
diff --git a/drivers/ram/rockchip/sdram_px30.c
b/drivers/ram/rockchip/sdram_px30.c
index a003893538..6b700f5ce5 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -677,7 +677,7 @@ static int sdram_init_detect(struct dram_info *dram,
writel(sys_reg3, >pmugrf->os_reg[3]);
}
- ret = sdram_detect_high_row(cap_info);
+ ret = sdram_detect_high_row(cap_info, sdram_params->base.dramtype);
out:
return ret;
--
2.25.1
[PATCH v2 04/28] ram: rockchip: Compute ddr capacity based on grf split
DDR chip capacity is computed based on GRF split in some
Rockchip SoC's like PX30 and RV1126.
Add split argument in ddr print info so-that the respective
ddr driver will pass the grf split.
Signed-off-by: YouMin Chen
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
arch/arm/include/asm/arch-rockchip/sdram_common.h | 2 +-
drivers/ram/rockchip/sdram_common.c | 6 --
drivers/ram/rockchip/sdram_px30.c | 2 +-
drivers/ram/rockchip/sdram_rk3328.c | 2 +-
drivers/ram/rockchip/sdram_rk3399.c | 2 +-
5 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h
b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index 5efa6e9445..a14b37cbc5 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -116,7 +116,7 @@ struct sdram_base_params {
void sdram_print_dram_type(unsigned char dramtype);
void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
- struct sdram_base_params *base);
+ struct sdram_base_params *base, u32 split);
void sdram_print_stride(unsigned int stride);
void sdram_org_config(struct sdram_cap_info *cap_info,
diff --git a/drivers/ram/rockchip/sdram_common.c
b/drivers/ram/rockchip/sdram_common.c
index b3e7421d08..1c3236746a 100644
--- a/drivers/ram/rockchip/sdram_common.c
+++ b/drivers/ram/rockchip/sdram_common.c
@@ -36,7 +36,7 @@ void sdram_print_dram_type(unsigned char dramtype)
}
void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
- struct sdram_base_params *base)
+ struct sdram_base_params *base, u32 split)
{
u64 cap;
u32 bg;
@@ -83,6 +83,8 @@ void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
cap = sdram_get_cs_cap(cap_info, 3, base->dramtype);
if (cap_info->row_3_4)
cap = cap * 3 / 4;
+ else if (split)
+ cap = cap / 2 + (split << 24) / 2;
printascii(" Size=");
printdec(cap >> 20);
@@ -123,7 +125,7 @@ inline void sdram_print_dram_type(unsigned char dramtype)
}
inline void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
-struct sdram_base_params *base)
+struct sdram_base_params *base, u32 split)
{
}
diff --git a/drivers/ram/rockchip/sdram_px30.c
b/drivers/ram/rockchip/sdram_px30.c
index 357fe2432a..a003893538 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -711,7 +711,7 @@ int sdram_init(void)
if (ret)
goto error;
- sdram_print_ddr_info(_params->ch.cap_info, _params->base);
+ sdram_print_ddr_info(_params->ch.cap_info, _params->base,
0);
printascii("out\n");
return ret;
diff --git a/drivers/ram/rockchip/sdram_rk3328.c
b/drivers/ram/rockchip/sdram_rk3328.c
index 9c6798f816..efe0049ead 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -506,7 +506,7 @@ static int sdram_init_detect(struct dram_info *dram,
writel(sys_reg3, >grf->os_reg[3]);
}
- sdram_print_ddr_info(_params->ch.cap_info, _params->base);
+ sdram_print_ddr_info(_params->ch.cap_info, _params->base,
0);
return 0;
}
diff --git a/drivers/ram/rockchip/sdram_rk3399.c
b/drivers/ram/rockchip/sdram_rk3399.c
index 0a88ee9f93..86f5c06583 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -2983,7 +2983,7 @@ static int sdram_init(struct dram_info *dram,
continue;
}
- sdram_print_ddr_info(cap_info, >base);
+ sdram_print_ddr_info(cap_info, >base, 0);
set_memory_map(chan, channel, params);
cap_info->ddrconfig =
calculate_ddrconfig(params, channel);
--
2.25.1
[PATCH v2 03/28] tools: rkcommon: Correct SPL size for px30
Rockchip PX30 has 16KB sram, bootrom reserved 4KB as stack.
Correct it.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
tools/rkcommon.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 0db45c2d41..1325aa83cb 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -121,7 +121,7 @@ struct spl_info {
};
static struct spl_info spl_infos[] = {
- { "px30", "RK33", 0x2800, false, RK_HEADER_V1 },
+ { "px30", "RK33", 0x4000 - 0x1000, false, RK_HEADER_V1 },
{ "rk3036", "RK30", 0x1000, false, RK_HEADER_V1 },
{ "rk3066", "RK30", 0x8000 - 0x800, true, RK_HEADER_V1 },
{ "rk3128", "RK31", 0x1800, false, RK_HEADER_V1 },
--
2.25.1
[PATCH v2 02/28] ram: rockchip: Add common ddr type configs
We have common ddr types in rockchip or in general. So use the common ddr type names instead of per Rockchip SoC to avoid confusion. The respective ddr type names will use on the associated ddr SoC driver as these drivers are built per SoC at a time. Signed-off-by: Jagan Teki --- Changes for v2: - none board/engicam/px30_core/Kconfig | 2 +- configs/khadas-edge-captain-rk3399_defconfig | 2 +- configs/khadas-edge-rk3399_defconfig | 2 +- configs/khadas-edge-v-rk3399_defconfig | 2 +- configs/leez-rk3399_defconfig| 2 +- configs/nanopi-r4s-rk3399_defconfig | 2 +- configs/pinebook-pro-rk3399_defconfig| 2 +- configs/roc-pc-mezzanine-rk3399_defconfig| 2 +- configs/roc-pc-rk3399_defconfig | 2 +- configs/rock-pi-4-rk3399_defconfig | 2 +- configs/rock-pi-4c-rk3399_defconfig | 2 +- configs/rockpro64-rk3399_defconfig | 2 +- drivers/ram/rockchip/Kconfig | 32 +--- drivers/ram/rockchip/sdram_px30.c| 6 ++-- drivers/ram/rockchip/sdram_rk3399.c | 6 ++-- 15 files changed, 33 insertions(+), 35 deletions(-) diff --git a/board/engicam/px30_core/Kconfig b/board/engicam/px30_core/Kconfig index a03be78369..924c30f3e1 100644 --- a/board/engicam/px30_core/Kconfig +++ b/board/engicam/px30_core/Kconfig @@ -11,6 +11,6 @@ config SYS_CONFIG_NAME config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select RAM_PX30_DDR4 + select RAM_ROCKCHIP_DDR4 endif diff --git a/configs/khadas-edge-captain-rk3399_defconfig b/configs/khadas-edge-captain-rk3399_defconfig index 9a0171e4a8..ddf11afaae 100644 --- a/configs/khadas-edge-captain-rk3399_defconfig +++ b/configs/khadas-edge-captain-rk3399_defconfig @@ -54,7 +54,7 @@ CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y CONFIG_BAUDRATE=150 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y diff --git a/configs/khadas-edge-rk3399_defconfig b/configs/khadas-edge-rk3399_defconfig index 27f119931f..2881d7145b 100644 --- a/configs/khadas-edge-rk3399_defconfig +++ b/configs/khadas-edge-rk3399_defconfig @@ -53,7 +53,7 @@ CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y CONFIG_BAUDRATE=150 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y diff --git a/configs/khadas-edge-v-rk3399_defconfig b/configs/khadas-edge-v-rk3399_defconfig index de2b625120..35f3812ae4 100644 --- a/configs/khadas-edge-v-rk3399_defconfig +++ b/configs/khadas-edge-v-rk3399_defconfig @@ -54,7 +54,7 @@ CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y CONFIG_BAUDRATE=150 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y diff --git a/configs/leez-rk3399_defconfig b/configs/leez-rk3399_defconfig index 1e708ed3f9..e3db8ed2f5 100644 --- a/configs/leez-rk3399_defconfig +++ b/configs/leez-rk3399_defconfig @@ -49,7 +49,7 @@ CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y CONFIG_BAUDRATE=150 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y diff --git a/configs/nanopi-r4s-rk3399_defconfig b/configs/nanopi-r4s-rk3399_defconfig index 917fd3fd8e..6816bf7575 100644 --- a/configs/nanopi-r4s-rk3399_defconfig +++ b/configs/nanopi-r4s-rk3399_defconfig @@ -50,7 +50,7 @@ CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y CONFIG_BAUDRATE=150 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig index 602bcb78cb..43f6bbda16 100644 --- a/configs/pinebook-pro-rk3399_defconfig +++ b/configs/pinebook-pro-rk3399_defconfig @@ -75,7 +75,7 @@ CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_ROCKCHIP=y diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig index f537a605e1..2723d9a9ec 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig @@ -68,7 +68,7 @@ CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y # CONFIG_RAM_ROCKCHIP_DEBUG is not set -CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_RAM_ROCKCHIP_LPDDR4=y CONFIG_DM_RESET=y CONFIG_BAUDRATE=150 CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index a502e549fb..7db4e3fc1e 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -65,7 +65,7 @@ CONFIG_REGULATOR_PWM=y
[PATCH v2 01/28] ram: Mark ram-uclass depend on TPL_DM or SPL_DM
ram-uclass is building irrespective of whether TPL_DM or SPL_DM is enabled. So control the ram uclass build based on TPL/SPL_DM. Signed-off-by: Jagan Teki --- Changes for v2: - none drivers/ram/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ram/Makefile b/drivers/ram/Makefile index 5a39611349..83948e2c43 100644 --- a/drivers/ram/Makefile +++ b/drivers/ram/Makefile @@ -3,7 +3,7 @@ # Copyright (c) 2015 Google, Inc # Wolfgang Denk, DENX Software Engineering, w...@denx.de. # -obj-$(CONFIG_RAM) += ram-uclass.o +obj-$(CONFIG_$(SPL_TPL_)DM) += ram-uclass.o obj-$(CONFIG_MPC83XX_SDRAM) += mpc83xx_sdram.o obj-$(CONFIG_SANDBOX) += sandbox_ram.o obj-$(CONFIG_STM32MP1_DDR) += stm32mp1/ -- 2.25.1
[PATCH v2 00/28] ARM: Add Rockchip RV1126 support
RV1126 is a high-performance vision processor SoC for IPC/CVR, especially for AI related application. This patch series add basic core support for Rockchip RV1126 and boot from eMMC and SD. Linux support is under review for the same [2] and v1 can be [3]. Tested RV1126 in Edgeble AI Edge Compute Module 0. Anyone interested, please have a look on this repo [1] Note: I was little late to push this MW due to some issues, hope these would land as soon as possible. [1] https://github.com/edgeble/u-boot/commits/ecm0-v4 [2] https://patchwork.kernel.org/project/linux-arm-kernel/cover/20220818124132.125304-1-ja...@edgeble.ai/ [3] https://patchwork.ozlabs.org/project/uboot/cover/20220727174050.2214617-1-ja...@edgeble.ai/ Any inputs? Jagan. Jagan Teki (28): ram: Mark ram-uclass depend on TPL_DM or SPL_DM ram: rockchip: Add common ddr type configs tools: rkcommon: Correct SPL size for px30 ram: rockchip: Compute ddr capacity based on grf split ram: rockchip: Update high row detection for full bw ram: rockchip: Update ddr pctl regs for px30 ram: rockchip: Add rv1126 ddr3 support ram: rockchip: Add rv1126 ddr loader params ram: rockchip: Add rv1126 ddr driver support ram: rockchip: rv1126: Control ddr init prints via DEBUG ram: rockchip: Add rv1126 lpddr4 support pinctrl: rockchip: Add pinctrl route types pinctrl: rockchip: Add rv1126 support arch: rockchip: Add cru header for rv1126 dt-bindings: clk: Add dt-binding header for RV1126 clk: rockchip: Add rv1126 clk support dt-bindings: power: Add power-domain header for rv1126 arm: rockchip: Add grf header for rv1126 ARM: dts: rockchip: Add Rockchip RV1126 pinctrl ARM: dts: rockchip: Add Rockchip RV1126 SoC arm: rockchip: Add RV1126 arch core support arm: rockchip: rv1126: Set dram area unsecure for SPL configs: rockchip: Add rv1126 common config rockchip: mkimage: Add rv1126 support ARM: dts: rockchip: rv1126: Add Edgeble AI Edge Compute Module 0 ARM: dts: rockchip: rv1126: Add Edgeble AI Edge Compute Module 0 Carrier ARM: dts: rockchip: Add rv1126-u-boot.dtsi board: Add Edgeble AI Edge Compute Module 0 Carrier arch/arm/dts/Makefile |3 + .../rv1126-edgeble-ecm0-carrier-u-boot.dtsi | 10 + arch/arm/dts/rv1126-edgeble-ecm0-carrier.dts | 38 + .../rv1126-edgeble-edge-compute-module-0.dtsi | 329 ++ arch/arm/dts/rv1126-pinctrl.dtsi | 302 ++ arch/arm/dts/rv1126-u-boot.dtsi | 62 + arch/arm/dts/rv1126.dtsi | 500 +++ .../include/asm/arch-rockchip/cru_rv1126.h| 459 +++ .../asm/arch-rockchip/dram_spec_timing.h | 452 +++ .../include/asm/arch-rockchip/grf_rv1126.h| 251 ++ .../include/asm/arch-rockchip/sdram_common.h | 216 +- .../include/asm/arch-rockchip/sdram_msch.h| 12 + .../asm/arch-rockchip/sdram_pctl_px30.h | 100 +- .../asm/arch-rockchip/sdram_phy_rv1126.h | 93 + .../include/asm/arch-rockchip/sdram_rv1126.h | 420 ++ arch/arm/include/asm/arch-rv1126/boot0.h | 11 + arch/arm/include/asm/arch-rv1126/gpio.h | 11 + arch/arm/mach-rockchip/Kconfig| 46 + arch/arm/mach-rockchip/Makefile |1 + arch/arm/mach-rockchip/rv1126/Kconfig | 55 + arch/arm/mach-rockchip/rv1126/Makefile| 13 + arch/arm/mach-rockchip/rv1126/clk_rv1126.c| 33 + arch/arm/mach-rockchip/rv1126/rv1126.c| 75 + arch/arm/mach-rockchip/rv1126/syscon_rv1126.c | 47 + board/edgeble/edge-compute-module-0/Kconfig | 16 + .../edgeble/edge-compute-module-0/MAINTAINERS |6 + board/edgeble/edge-compute-module-0/Makefile |7 + board/edgeble/edge-compute-module-0/ecm0.c|4 + board/engicam/px30_core/Kconfig |2 +- common/spl/Kconfig.tpl|2 +- configs/ecm0-carrier-rv1126_defconfig | 56 + configs/khadas-edge-captain-rk3399_defconfig |2 +- configs/khadas-edge-rk3399_defconfig |2 +- configs/khadas-edge-v-rk3399_defconfig|2 +- configs/leez-rk3399_defconfig |2 +- configs/nanopi-r4s-rk3399_defconfig |2 +- configs/pinebook-pro-rk3399_defconfig |2 +- configs/roc-pc-mezzanine-rk3399_defconfig |2 +- configs/roc-pc-rk3399_defconfig |2 +- configs/rock-pi-4-rk3399_defconfig|2 +- configs/rock-pi-4c-rk3399_defconfig |2 +- configs/rockpro64-rk3399_defconfig|2 +- drivers/clk/rockchip/Makefile |1 + drivers/clk/rockchip/clk_rv1126.c | 1889 + drivers/pinctrl/rockchip/Makefile |1 + drivers/pinctrl/rockchip/pinctrl-px30.c | 11 +- drivers/pinctrl/rockchip/pinctrl-rk3128.c | 11 +- drivers/pinctrl/rockchip/pinctrl-rk322x.c | 11 +- drivers/pinctrl/rockchip/pinctrl-rk3288.c | 11 +- drivers/pinctrl/rockchip/pinctrl-rk3308.c | 11 +-
Re: [PATCH v2 2/2] rockchip: rk3399: remove duplicate call to regulators_enable_boot_on
On Fri, Jul 22, 2022 at 3:39 PM Quentin Schulz wrote: > > From: Quentin Schulz > > An earlier commit makes the common SPL code call > regulators_enable_boot_on and regulators_enable_boot_off before > iterating over possible boot media for U-Boot proper. There is therefore > no need to do this in the rk3399-specific code, so let's remove it. > > Cc: Quentin Schulz > Tested-by: Xavier Drudis Ferran > Signed-off-by: Quentin Schulz > --- Reviewed-by: Jagan Teki
Re: [PATCH v3 1/2] rockchip: rk3399: fix incorrect ifdef check on SPL_DM_REGULATOR
On Fri, Jul 22, 2022 at 3:00 PM Quentin Schulz wrote:
>
> From: Quentin Schulz
>
> The check to perform is on CONFIG_SPL_DM_REGULATOR and not
> SPL_DM_REGULATOR. Also switch to in-code check instead of ifdefs.
>
> Fixes: 07586ee4322a ("rockchip: rk3399: Support common spl_board_init")
> Cc: Quentin Schulz
> Signed-off-by: Quentin Schulz
> ---
Reviewed-by: Jagan Teki
Re: Fwd: [PATCH] [RFC] cmd: i2c: fix default address len for DM_I2C
Hello all,
On Tue, Aug 16, 2022 at 1:47 PM Simon Glass wrote:
>
> Hi Tim,
>
> On Tue, 16 Aug 2022 at 13:50, Tim Harvey wrote:
> >
> > On Mon, Aug 15, 2022 at 3:16 PM Simon Glass wrote:
> > >
> > > Hi Tim,
> > >
> > > On Mon, 15 Aug 2022 at 11:48, Tim Harvey wrote:
> > > >
> > > > On Sat, Aug 13, 2022 at 7:59 AM Simon Glass wrote:
> > > > >
> > > > > Hi Tim,
> > > > >
> > > > > On Thu, 11 Aug 2022 at 11:57, Tim Harvey
> > > > > wrote:
> > > > > >
> > > > > > According to the comment block "The default {addr} parameter is one
> > > > > > byte
> > > > > > (.1) which works well for memories and registers with 8 bits of
> > > > > > address
> > > > > > space."
> > > > > >
> > > > > > While this is true for legacy I2C a default length of -1 is being
> > > > > > passed
> > > > > > for DM_I2C which results in a usage error.
> > > > > >
> > > > > > Restore the documented behavior by always using a default alen of 1.
> > > > > >
> > > > > > Signed-off-by: Tim Harvey
> > > > > >
> > > > > > This is an RFC as I'm unclear if we want to restore the legacy
> > > > > > usage or
> > > > > > enforce a new usage (in which case the comment block should be
> > > > > > updated)
> > > > > > and I'm not clear if this is documented in other places. If the
> > > > > > decision
> > > > > > is to enforce a new usage then it is unclear to me how to specifiy
> > > > > > the
> > > > > > default alen as there is no command for that (i2c alen [len]?).
> > > > > > ---
> > > > > > cmd/i2c.c | 10 --
> > > > > > 1 file changed, 10 deletions(-)
> > > > > >
> > > > >
> > > > > Can you dig into this a little more on your board? DEFAULT_ADDR_LEN is
> > > > > set to -1 so that by default it does not get set by the command, and
> > > > > the existing alen is used.
> > > > >
> > > > > This is necessary for driver model, since the alen can be set by the
> > > > > peripheral device and we don't want to overwrite it:
> > > > >
> > > > > if (!ret && alen != -1)
> > > > > ret = i2c_set_chip_offset_len(dev, alen);
> > > > >
> > > >
> > > > Simon,
> > > >
> > > > Here's some annotated debug prints added where chip_offset is
> > > > passed/set:
> > > > Model: Gateworks Venice GW73xx-0x i.MX8MM Development Kit
> > > > DRAM: 1 GiB
> > > > i2c_chip_of_to_plat gsc@20 offset_len=1
> > > > i2c_chip_of_to_plat pmic@69 offset_len=1
> > > > i2c_get_chip i2c@30a2 0x51 offset_len=1
> > > > i2c_bind_driver i2c@30a2 offset_len=1
> > > > i2c_set_chip_offset_len generic_51 offset_len=1
> > > > dm_i2c_read generic_51 offset=0 offset_len=1
> > > > i2c_setup_offset 0x51 offset=0 offset_len=1
> > > > Core: 209 devices, 27 uclasses, devicetree: separate
> > > > ...
> > > > u-boot=> i2c dev 0 && i2c md 0x51 0 50
> > > > Setting bus to 0
> > > > i2c - I2C sub-system
> > > >
> > > > Usage:
> > > > i2c bus [muxtype:muxaddr:muxchannel] - show I2C bus info
> > > > ...
> > > >
> > > > So the chip I noticed this issue with is 0x51 which an atmel,24c02
> > > > compatible eeprom which imx8mm-venice-gw700x.dtsi defines 4 of
> > > > (i2c1-0x50, i2c1-0x51, i2c1-0x52, i2c1-0x53). You can see above
> > > > i2c1-0x51 (i2c1=i2c@30a2) is accessed early as it holds the board
> > > > model information and at that point in time it's accessed with alen=1
> > > > (which I specify in board/gateworks/venice/eeprom.c:eeprom_read()) but
> > > > by the time the 'i2c md 0x51 0 50' comes around
> > > > i2c_get_chip_offset_len() returns 0 for this device. The other eeprom
> > > > devices on i2c1 are never accessed by a driver so they would never
> > > > have a 'default' alen set.
> > >
> > > OK I see,
> > >
> > > >
> > > > Where is the initial setting of alen supposed to have come?
> > >
> > > The "u-boot,i2c-offset-len" property in the device tree.
> > >
> >
> > Simon,
> >
> > I see what happened here. The issue is caused by commit 8f8c04bf1ebbd
> > ("i2c: fix stack buffer overflow vulnerability in i2c md command")
> > which changed alen from int to uint (yet its still getting set to
> > DEFAULT_ADDR_LEN which is -1) thus the 'if (alen > 3)' now returns
> > CMD_RET_USAGE.
> >
> > I'm not sure what the best fix is at this point - revert all or part
> > of 8f8c04bf1ebbd
> >
> > Nicolas, what is your opinion? To summarize commit 8f8c04bf1ebbd broke
> > the ability to pass a -1 default address length to do_i2c_* such that
> > something as common as 'i2c md 0x50 0 50' fails with a usage error.
>
> Ah, ok. Well first we should add a test to dm/test/i2c.c to cover they
> failure you are seeing.
>
> Yes, revert part of it and then add checks for -ve values?
>
> Regards,
> Simon
I missed that -1 was a valid value for alen, as the checks "if (alen > 3)
return CMD_RET_USAGE;" seemed to suppose that alen was non-negative (for
example in do_i2c_read,
https://source.denx.de/u-boot/u-boot/-/blob/v2022.10-rc2/cmd/i2c.c#L271 and in
do_i2c_write, do_i2c_md and do_i2c_md). The thing is, using signed types to
hold sizes can lead to vulnerabilities, such as the one I fixed in
DHCP and TFTP
Hello! I have U-Boot installed on the SD card of my Orange Pi. It works great,
using SRVLOC to get the address of the server, DHCP to get an IP address, and
TFTP to get the application files.
I also have a rack of 48 Orange Pi devices with the same U-Boot code in their
SD cards. They all have a common power supply. When they boot, sometimes
do_pxe() runs before net_ip is set. (There are many devices trying to get IP
addresses.)
I have my own copy of the U-Boot code. Is there an environment variable that I
can set, or a code change that I can make? For example:
static int do_pxe(struct cmd_tbl *cmdtp, int flag, int argc, char *const
argv[]) {
struct cmd_tbl *cp;
if (net_ip.s_addr == 0) {
// now what?
}
...
Do you have any ideas? Thank you!
Jim Schaettle
[PATCH v6 0/3] ARM: imx6: dh-imx6: Enable d-cache early in SPL
This patch series enables d-cache in SPL for i.MX6 based boards from DH in order to improve boot time. This can only be achieved after migrating the corresponding symbols to Kconfig, which is done in patch 1/3 and 2/3. Changes in v6: - Once more improve the dcache_disable() comment Changes in v5: - Clarify dcache_disable() comment Changes in v4: - Reduce diffstat by using 'select' statements for omap2, mvebu and mx6 based boards - Elaborate on dcache_disable() comment Changes in v3: - Introduce CONFIG_SPL_SYS_L2_PL310 - Convert CONFIG_SYS_L2_PL310 to Kconfig - Use newly introduced Kconfig symbol for dh_imx6_defconfig Changes in v2: - Add comment to explain the relevance of dcache_disable() Marek Vasut (1): ARM: imx6: dh-imx6: Enable d-cache early in SPL Philip Oberfichtner (2): Convert CONFIG_SYS_L2_PL310 to Kconfig ARM: cache: Allow SPL to build cache-pl310.c README| 2 -- arch/arm/Kconfig | 10 ++ arch/arm/lib/Makefile | 2 +- arch/arm/mach-mvebu/Kconfig | 1 + arch/arm/mach-mvebu/include/mach/config.h | 2 -- arch/arm/mach-omap2/Kconfig | 1 + board/dhelectronics/dh_imx6/dh_imx6_spl.c | 41 +++ configs/dh_imx6_defconfig | 1 + configs/omap4_panda_defconfig | 1 + configs/omap4_sdp4430_defconfig | 1 + configs/poleg_evb_defconfig | 1 + configs/socfpga_arria10_defconfig | 1 + configs/socfpga_arria5_defconfig | 1 + configs/socfpga_chameleonv3_defconfig | 1 + configs/socfpga_cyclone5_defconfig| 1 + configs/socfpga_dbm_soc1_defconfig| 1 + configs/socfpga_de0_nano_soc_defconfig| 1 + configs/socfpga_de10_nano_defconfig | 1 + configs/socfpga_de10_standard_defconfig | 1 + configs/socfpga_de1_soc_defconfig | 1 + configs/socfpga_is1_defconfig | 1 + configs/socfpga_mcvevk_defconfig | 1 + configs/socfpga_secu1_defconfig | 1 + configs/socfpga_sockit_defconfig | 1 + configs/socfpga_socrates_defconfig| 1 + configs/socfpga_sr1500_defconfig | 1 + configs/socfpga_vining_fpga_defconfig | 1 + configs/stemmy_defconfig | 1 + include/configs/am43xx_evm.h | 1 - include/configs/brppt2.h | 1 - include/configs/cm_t43.h | 1 - include/configs/mx6_common.h | 1 - include/configs/odroid.h | 1 - include/configs/poleg.h | 1 - include/configs/socfpga_common.h | 1 - include/configs/stemmy.h | 1 - include/configs/ti_omap4_common.h | 1 - include/configs/trats.h | 1 - include/configs/trats2.h | 1 - include/configs/zynq-common.h | 1 - scripts/config_whitelist.txt | 1 - 41 files changed, 75 insertions(+), 18 deletions(-) -- 2.37.1
Re: [PATCH v8 05/13] stm32mp1: dk2: Add image information for capsule updates
hi Yann,
On Thu, 18 Aug 2022 at 13:35, Yann Gautier wrote:
>
> On 8/17/22 14:43, Sughosh Ganu wrote:
> > Enabling capsule update functionality on the platform requires
> > populating information on the images that are to be updated using the
> > functionality. Do so for the DK2 board.
> >
> > Signed-off-by: Sughosh Ganu
> > Reviewed-by: Patrick Delaunay
> > Reviewed-by: Ilias Apalodimas
> > ---
> > Changes since V7: None
> >
> > board/st/stm32mp1/stm32mp1.c | 23 +++
> > include/configs/stm32mp15_common.h | 4
> > 2 files changed, 27 insertions(+)
> >
> > diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
> > index 9496890d16..0fda8f150d 100644
> > --- a/board/st/stm32mp1/stm32mp1.c
> > +++ b/board/st/stm32mp1/stm32mp1.c
> > @@ -11,6 +11,7 @@
> > #include
> > #include
> > #include
> > +#include
> > #include
> > #include
> > #include
> > @@ -87,6 +88,16 @@
> > #define USB_START_LOW_THRESHOLD_UV 123
> > #define USB_START_HIGH_THRESHOLD_UV 215
> >
> > +#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
> > +struct efi_fw_image fw_images[1];
> > +
> > +struct efi_capsule_update_info update_info = {
> > + .images = fw_images,
> > +};
> > +
> > +u8 num_image_type_guids = ARRAY_SIZE(fw_images);
> > +#endif /* EFI_HAVE_CAPSULE_SUPPORT */
> > +
> > int board_early_init_f(void)
> > {
> > /* nothing to do, only used in SPL */
> > @@ -670,6 +681,18 @@ int board_init(void)
> >
> > setup_led(LEDST_ON);
> >
> > +#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
> > + if (board_is_stm32mp15x_dk2()) {
> > + efi_guid_t image_type_guid = STM32MP15_DK2_FIP_IMAGE_GUID;
> > + guidcpy(_images[0].image_type_id, _type_guid);
> > + fw_images[0].fw_name = u"STM32MP15-DK2-FIP";
> > + /*
> > + * For FWU multi bank update, the image
> > + * index will be computed at runtime
> > + */
> > + fw_images[0].image_index = 0;
> > + }
> > +#endif
> > return 0;
> > }
> >
> > diff --git a/include/configs/stm32mp15_common.h
> > b/include/configs/stm32mp15_common.h
> > index c5412ffeb3..6ab10d8ce5 100644
> > --- a/include/configs/stm32mp15_common.h
> > +++ b/include/configs/stm32mp15_common.h
> > @@ -34,6 +34,10 @@
> > #define CONFIG_SERVERIP 192.168.1.1
> > #endif
> >
>
> Hi Sugosh,
>
> Sorry for the late review.
>
> > +#define STM32MP15_DK2_FIP_IMAGE_GUID \
> Although this is now only supported on this STM32MP15_DK2 board, I don't
> think this macro should be tight to the board name, as it may be used
> for other STM32MP boards. I'd just use STM32MP_FIP_IMAGE_GUID.
> This should be the same for the fw_images[0].fw_name.
The idea of this GUID is to identify or associate an image with a
platform. Will the FIP image be common across multiple STM32MP
platforms? If we use a common GUID that might be shared across
multiple ST boards, it would be possible to flash an image generated
for the ev1 board on the dk2 board. However, you would know better
about ST platforms. So I can change this as per your suggestion.
Thanks.
-sughosh
>
>
> Best regards,
> Yann
>
> > + EFI_GUID(0x19d5df83, 0x11b0, 0x457b, 0xbe, 0x2c, \
> > + 0x75, 0x59, 0xc1, 0x31, 0x42, 0xa5)
> > +
> >
> > /*/
> > #ifdef CONFIG_DISTRO_DEFAULTS
> >
> > /*/
>
Re: [PATCH v8 10/13] FWU: cmd: Add a command to read FWU metadata
hi Simon, On Thu, 18 Aug 2022 at 08:51, Simon Glass wrote: > > Hi Sugosh, > > On Wed, 17 Aug 2022 at 06:44, Sughosh Ganu wrote: > > > > Add a command to read the metadata as specified in the FWU > > specification and print the fields of the metadata. > > > > Signed-off-by: Sughosh Ganu > > Reviewed-by: Ilias Apalodimas > > --- > > Changes since V7: None > > > > cmd/Kconfig | 7 + > > cmd/Makefile| 1 + > > cmd/fwu_mdata.c | 80 + > > 3 files changed, 88 insertions(+) > > create mode 100644 cmd/fwu_mdata.c > > This needs docs and a test. > > BTW I forgot to mention that the uclass needs a simple test of some sort. > > https://u-boot.readthedocs.io/en/latest/develop/tests_writing.html Okay. I will check how this can be done. Btw, there are plans to add a test for the feature once support for the feature has been added on the Synquacer platform. That test will exercise the above command as well as the driver code. Do we still need a standalone test for the uclass? -sughosh
Re: [PATCH v8 08/13] FWU: Add boot time checks as highlighted by the FWU specification
hi Simon, On Thu, 18 Aug 2022 at 08:51, Simon Glass wrote: > > Hi Sughosh, > > On Wed, 17 Aug 2022 at 06:44, Sughosh Ganu wrote: > > > > The FWU Multi Bank Update specification requires the Update Agent to > > carry out certain checks at the time of platform boot. The Update > > Agent is the component which is responsible for updating the firmware > > components and maintaining and keeping the metadata in sync. > > > > The spec requires that the Update Agent perform the following checks > > at the time of boot > > * Sanity check of both the metadata copies maintained by the platform. > > * Get the boot index passed to U-Boot by the prior stage bootloader > > and use this value for metadata bookkeeping. > > * Check if the system is booting in Trial State. If the system boots > > in the Trial State for more than a specified number of boot counts, > > change the Active Bank to be booting the platform from. > > > > Add these checks in the board initialisation sequence, invoked after > > relocation. > > > > Signed-off-by: Sughosh Ganu > > --- > > Changes since V7: > > * Introduce trial_counter_update() to increment and delete the > > TrialStateCtr variable. > > * Introduce in_trial_state() to check if the platform is booting in > > Trial State. > > > > common/board_r.c | 5 ++ > > include/fwu.h | 3 + > > lib/fwu_updates/fwu.c | 175 ++ > > 3 files changed, 183 insertions(+) > > We should use the event system instead of adding another hook. We are > trying to get rid of them! Okay, I will check about this. > > Also, please separate out the fwu change from touching common code > (although you may not need to touch comment code with events). The FWU specification requires certain checks to be run at the platform boot time. Not sure how else will that be done(although this might not be relevant if I can use events). -sughosh
Re: [PATCH v8 03/13] FWU: Add FWU metadata access driver for GPT partitioned block devices
hi Simon,
On Thu, 18 Aug 2022 at 08:51, Simon Glass wrote:
>
> Hi Sughosh,
>
> On Wed, 17 Aug 2022 at 06:44, Sughosh Ganu wrote:
> >
> > In the FWU Multi Bank Update feature, the information about the
> > updatable images is stored as part of the metadata, on a separate
> > partition. Add a driver for reading from and writing to the metadata
> > when the updatable images and the metadata are stored on a block
> > device which is formated with GPT based partition scheme.
> >
> > Signed-off-by: Sughosh Ganu
> > Reviewed-by: Patrick Delaunay
> > ---
> > Changes since V7: None
> >
> > drivers/fwu-mdata/Kconfig | 9 +
> > drivers/fwu-mdata/Makefile| 1 +
> > drivers/fwu-mdata/fwu_mdata_gpt_blk.c | 410 ++
> > include/fwu.h | 5 +
> > 4 files changed, 425 insertions(+)
> > create mode 100644 drivers/fwu-mdata/fwu_mdata_gpt_blk.c
> >
> > diff --git a/drivers/fwu-mdata/Kconfig b/drivers/fwu-mdata/Kconfig
> > index d6a21c8e19..d5edef19d6 100644
> > --- a/drivers/fwu-mdata/Kconfig
> > +++ b/drivers/fwu-mdata/Kconfig
> > @@ -5,3 +5,12 @@ config DM_FWU_MDATA
> > Enable support for accessing FWU Metadata partitions. The
> > FWU Metadata partitions reside on the same storage device
> > which contains the other FWU updatable firmware images.
>
> Can we link to the docs here, or will it be easy for people to find in
> the U-Boot docs?
The link to the spec is being provided in the documentation for the
feature. I guess that should suffice.
>
> > +
> > +config FWU_MDATA_GPT_BLK
> > + bool "FWU Metadata access for GPT partitioned Block devices"
> > + select PARTITION_TYPE_GUID
> > + select PARTITION_UUIDS
> > + depends on DM && HAVE_BLOCK_DEVICE && EFI_PARTITION
> > + help
> > + Enable support for accessing FWU Metadata on GPT partitioned
> > + block devices.
>
> GPT-partitioned (I think)
I see "GPT partition" being used elsewhere. I don't have a strong
opinion on this though.
>
> > diff --git a/drivers/fwu-mdata/Makefile b/drivers/fwu-mdata/Makefile
> > index e53a8c9983..313049f67a 100644
> > --- a/drivers/fwu-mdata/Makefile
> > +++ b/drivers/fwu-mdata/Makefile
> > @@ -4,3 +4,4 @@
> > #
> >
> > obj-$(CONFIG_DM_FWU_MDATA) += fwu-mdata-uclass.o
> > +obj-$(CONFIG_FWU_MDATA_GPT_BLK) += fwu_mdata_gpt_blk.o
> > diff --git a/drivers/fwu-mdata/fwu_mdata_gpt_blk.c
> > b/drivers/fwu-mdata/fwu_mdata_gpt_blk.c
>
> Perhaps just call it gpt_blk.c since it is in this directory
Actually, there are both type of examples that can be seen under
drivers/. For e.g. the drivers/clk/ has all files starting with clk_*.
Similarly, under drivers/reset/. But there are other examples as well.
But this is not a big effort. I will change the name as per your
suggestion.
>
> > new file mode 100644
> > index 00..f694c4369b
> > --- /dev/null
> > +++ b/drivers/fwu-mdata/fwu_mdata_gpt_blk.c
> > @@ -0,0 +1,410 @@
> > +// SPDX-License-Identifier: GPL-2.0-or-later
> > +/*
> > + * Copyright (c) 2022, Linaro Limited
> > + */
> > +
> > +#define LOG_CATEGORY UCLASS_FWU_MDATA
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +#define PRIMARY_PART BIT(0)
> > +#define SECONDARY_PART BIT(1)
> > +#define BOTH_PARTS (PRIMARY_PART | SECONDARY_PART)
> > +
> > +#define MDATA_READ BIT(0)
> > +#define MDATA_WRITEBIT(1)
> > +
>
> comment?
Umm, is the macro name not descriptive enough? They are just being
used to select a read or write operation.
>
> > +static int gpt_get_mdata_partitions(struct blk_desc *desc,
> > + u16 *primary_mpart,
> > + u16 *secondary_mpart)
>
> Should use uint, no need to select a 16-bit var so far as I can get
Okay
>
> > +{
> > + int i, ret;
> > + u32 mdata_parts;
> > + efi_guid_t part_type_guid;
> > + struct disk_partition info;
> > + const efi_guid_t fwu_mdata_guid = FWU_MDATA_GUID;
> > +
> > + mdata_parts = 0;
> > + for (i = 1; i < MAX_SEARCH_PARTITIONS; i++) {
> > + if (part_get_info(desc, i, ))
> > + continue;
> > + uuid_str_to_bin(info.type_guid, part_type_guid.b,
> > + UUID_STR_FORMAT_GUID);
> > +
> > + if (!guidcmp(_mdata_guid, _type_guid)) {
> > + ++mdata_parts;
> > + if (!*primary_mpart)
> > + *primary_mpart = i;
> > + else
> > + *secondary_mpart = i;
> > + }
> > + }
> > +
> > + if (mdata_parts != 2) {
> > + log_err("Expect two copies of the FWU metadata instead of
> >
Re: [PATCH v8 02/13] FWU: Add FWU metadata structure and driver for accessing metadata
hi Simon,
On Thu, 18 Aug 2022 at 06:43, Simon Glass wrote:
>
> Hi Sughosh,
>
> On Wed, 17 Aug 2022 at 06:44, Sughosh Ganu wrote:
> >
> > In the FWU Multi Bank Update feature, the information about the
> > updatable images is stored as part of the metadata, which is stored on
> > a dedicated partition. Add the metadata structure, and a driver model
> > uclass which provides functions to access the metadata. These are
> > generic API's, and implementations can be added based on parameters
> > like how the metadata partition is accessed and what type of storage
> > device houses the metadata.
> >
> > Signed-off-by: Sughosh Ganu
> > Reviewed-by: Patrick Delaunay
> > ---
> > Changes since V7:
> > * Rephrased the error message in fwu_update_active_index as per
> > suggestion from Ilias.
> > * Reworked the logic in fwu_get_image_alt_num() as per the suggestion
> > from Ilias.
> >
> > drivers/Kconfig | 2 +
> > drivers/Makefile | 1 +
> > drivers/fwu-mdata/Kconfig| 7 +
> > drivers/fwu-mdata/Makefile | 6 +
> > drivers/fwu-mdata/fwu-mdata-uclass.c | 463 +++
> > include/dm/uclass-id.h | 1 +
> > include/fwu.h| 49 +++
> > include/fwu_mdata.h | 67
> > 8 files changed, 596 insertions(+)
> > create mode 100644 drivers/fwu-mdata/Kconfig
> > create mode 100644 drivers/fwu-mdata/Makefile
> > create mode 100644 drivers/fwu-mdata/fwu-mdata-uclass.c
> > create mode 100644 include/fwu.h
> > create mode 100644 include/fwu_mdata.h
> >
> > diff --git a/drivers/Kconfig b/drivers/Kconfig
> > index 8b6fead351..75ac149d31 100644
> > --- a/drivers/Kconfig
> > +++ b/drivers/Kconfig
> > @@ -44,6 +44,8 @@ source "drivers/fuzz/Kconfig"
> >
> > source "drivers/fpga/Kconfig"
> >
> > +source "drivers/fwu-mdata/Kconfig"
> > +
> > source "drivers/gpio/Kconfig"
> >
> > source "drivers/hwspinlock/Kconfig"
> > diff --git a/drivers/Makefile b/drivers/Makefile
> > index eba9940231..70bbc2f5e0 100644
> > --- a/drivers/Makefile
> > +++ b/drivers/Makefile
> > @@ -84,6 +84,7 @@ obj-y += cache/
> > obj-$(CONFIG_CPU) += cpu/
> > obj-y += crypto/
> > obj-$(CONFIG_FASTBOOT) += fastboot/
> > +obj-$(CONFIG_DM_FWU_MDATA) += fwu-mdata/
> > obj-y += misc/
> > obj-$(CONFIG_MMC) += mmc/
> > obj-$(CONFIG_NVME) += nvme/
> > diff --git a/drivers/fwu-mdata/Kconfig b/drivers/fwu-mdata/Kconfig
> > new file mode 100644
> > index 00..d6a21c8e19
> > --- /dev/null
> > +++ b/drivers/fwu-mdata/Kconfig
> > @@ -0,0 +1,7 @@
> > +config DM_FWU_MDATA
>
> Please drop DM_ as there is no non-DM version
Okay
>
>
> > + bool "Driver support for accessing FWU Metadata"
> > + depends on DM
> > + help
> > + Enable support for accessing FWU Metadata partitions. The
> > + FWU Metadata partitions reside on the same storage device
> > + which contains the other FWU updatable firmware images.
> > diff --git a/drivers/fwu-mdata/Makefile b/drivers/fwu-mdata/Makefile
> > new file mode 100644
> > index 00..e53a8c9983
> > --- /dev/null
> > +++ b/drivers/fwu-mdata/Makefile
> > @@ -0,0 +1,6 @@
> > +# SPDX-License-Identifier: GPL-2.0-or-later
> > +#
> > +# Copyright (c) 2022, Linaro Limited
> > +#
> > +
> > +obj-$(CONFIG_DM_FWU_MDATA) += fwu-mdata-uclass.o
> > diff --git a/drivers/fwu-mdata/fwu-mdata-uclass.c
> > b/drivers/fwu-mdata/fwu-mdata-uclass.c
> > new file mode 100644
> > index 00..6bf7fa1b03
> > --- /dev/null
> > +++ b/drivers/fwu-mdata/fwu-mdata-uclass.c
> > @@ -0,0 +1,463 @@
> > +// SPDX-License-Identifier: GPL-2.0-or-later
> > +/*
> > + * Copyright (c) 2022, Linaro Limited
> > + */
> > +
> > +#define LOG_CATEGORY UCLASS_FWU_MDATA
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +#include
> > +#include
> > +#include
> > +
> > +#define IMAGE_ACCEPT_SET BIT(0)
> > +#define IMAGE_ACCEPT_CLEAR BIT(1)
> > +
> > +static int fwu_get_dev_ops(struct udevice **dev,
> > + const struct fwu_mdata_ops **ops)
> > +{
> > + int ret;
> > +
> > + ret = uclass_get_device(UCLASS_FWU_MDATA, 0, dev);
>
> uclass_first_device() if there is only one
Okay
>
> > + if (ret) {
> > + log_debug("Cannot find fwu device\n");
> > + return ret;
> > + }
> > +
> > + if ((*ops = device_get_ops(*dev)) == NULL) {
> > + log_debug("Cannot get fwu device ops\n");
> > + return -ENOSYS;
> > + }
>
> This is actually a bug, so drop this. It is OK to have an assert() if
> you want one.
Okay
>
> > +
> > + return 0;
> > +}
> > +
> > +/**
> > + * fwu_verify_mdata() - Verify the FWU metadata
> > + * @mdata: FWU metadata structure
> > + * @pri_part: FWU metadata partition is primary or secondary
> > + *
> > + * Verify the FWU metadata by computing the CRC32 for the metadata
> > + *
Re: [PATCH] clk: at91: sam9x60: change parent clock from mck_pres to mck_div
On 17.08.2022 10:04, Eugen Hristev wrote:
> From: Mihai Sain
>
> ddrck and qspick should have mck_div as parent clocks to be in sync with
> linux driver.
>
> Signed-off-by: Mihai Sain
Reviewed-by: Claudiu Beznea
> ---
> drivers/clk/at91/sam9x60.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
> index 4d00ee2ddc..6b5486c6c9 100644
> --- a/drivers/clk/at91/sam9x60.c
> +++ b/drivers/clk/at91/sam9x60.c
> @@ -265,10 +265,10 @@ static const struct {
> u8 id;
> u8 cid;
> } sam9x60_systemck[] = {
> - { .n = "ddrck", .p = "mck_pres", .id = 2, .cid = ID_DDR, },
> + { .n = "ddrck", .p = "mck_div", .id = 2, .cid = ID_DDR, },
> { .n = "pck0", .p = "prog0",.id = 8, .cid = ID_PCK0, },
> { .n = "pck1", .p = "prog1",.id = 9, .cid = ID_PCK1, },
> - { .n = "qspick",.p = "mck_pres", .id = 19, .cid = ID_QSPI, },
> + { .n = "qspick",.p = "mck_div", .id = 19, .cid = ID_QSPI, },
> };
>
> /**
Re: [PATCH v11 1/9] eficonfig: menu-driven addition of UEFI boot option
Hi Heinrich,
On Thu, 18 Aug 2022 at 15:49, Heinrich Schuchardt wrote:
>
> On 8/17/22 11:36, Masahisa Kojima wrote:
> > This commit add the "eficonfig" command.
> > The "eficonfig" command implements the menu-driven UEFI boot option
> > maintenance feature. This commit implements the addition of
> > new boot option. User can select the block device volume having
> > efi_simple_file_system_protocol and select the file corresponding
> > to the Boot variable. User can also enter the description and
> > optional_data of the BOOT variable in utf8.
> >
> > This commit adds "include/efi_config.h", it contains the common
> > definition to be used from other menus such as UEFI Secure Boot
> > key management.
> >
> > Signed-off-by: Masahisa Kojima
> > ---
> > Changes in v11:
> > - refactor menu entry construction, directly use eficonfig_entry structure
> > - remove reading directory info to calculate the number of entry
> > - fix invalid efi_free_pool() in ill_file_info()
> > - use ANSI_CURSOR_POSITION and ANSI_CLEAR_LINE instead of printf("\n")
> >since current eficonfig implementation does not handle console size
> > correctly.
> >printf("\n") at the outside of console size breaks the console output.
> >
> > Changes in v10:
> > - add initrd file selection
> > - do refactoring
> > - eficonfig_process_common() use list structure
> > - remove u'/' before copying file_path into current_path
> > - fix typos
> > - check snprintf error
> >
> > Changes in v9:
> > - move "efi_guid_bootmenu_auto_generated definition" into efi_bootmgr.c
> >to address build error when CMD_EFICONFIG is disabled
> > - fix typos and comment
> > - remove file system information from error message
> > - remove unreachable code in eficonfig_choice_entry()
> > - single printf() call as much as possible
> > - call only getchar() in eficonfig_print_msg()
> > - filter out '.' entry from file selection
> > - update the efi_disk_get_device_name() implementation
> > - add function comment
> >
> > Changes in v8:
> > - command name is change from "efimenu" to "eficonfig"
> > - function and struct prefixes is changed to "eficonfig"
> > - fix menu header string
> >
> > Changes in v7:
> > - add "efimenu" command and uefi variable maintenance code
> >moved into cmd/efimenu.c
> > - create include/efimenu.h to define the common definition for
> >the other menu such as UEFI Secure Boot key management
> > - update boot option edit UI, user can select description, file,
> >and optional_data to edit in the same menu like following.
> >
> >** Edit Boot Option **
> >
> > Description: debian
> > File: virtio 0:1/EFI\debian\grubaa64.efi
> > Optional Data: test
> > Save
> > Quit
> >
> > - remove exit parameter from efimenu_process_common()
> > - menu title type is changed from u16 to char
> > - efimenu_process_common() add menu title string
> > - reduce printf/puts function call for displaying the menu
> > - efi_console_get_u16_string() accept 0 length to allow
> >optional_data is empty
> > - efi_console_get_u16_string() the "size" parameter name is changes to
> > "count"
> > - efimenu is now designed to maintain the UEFI variables, remove autoboot
> > related code
> > - remove one empty line before "Quit" entry
> > - efimenu_init() processes only the first time
> >
> > Changes in v6:
> > - fix typos
> > - modify volume name to match U-Boot syntax
> > - compile in CONFIG_EFI_LOADER=n and CONFIG_CMD_BOOTEFI_BOOTMGR=n
> > - simplify u16_strncmp() usage
> > - support "a\b.efi" file path, use link list to handle filepath
> > - modify length check condition
> > - UEFI related menu items only appears with CONFIG_AUTOBOOT_MENU_SHOW=y
> >
> > Changes in v5:
> > - remove forward declarations
> > - add const qualifier for menu items
> > - fix the possible unaligned access for directory info access
> > - split into three commit 1)add boot option 2) delete boot option 3)change
> > boot order
> >This commit is 1)add boot option.
> > - fix file name buffer allocation size, it should be
> > EFI_BOOTMENU_FILE_PATH_MAX * sizeof(u16)
> > - fix wrong size checking for file selection
> >
> > Chanes in v4:
> > - UEFI boot option maintenance menu is integrated into bootmenu
> > - display the simplified volume name(e.g. usb0:1, nvme1:2) for the
> >volume selection
> > - instead of extending lib/efi_loader/efi_bootmgr.c, newly create
> >lib/efi_loader/efi_bootmenu_maintenance.c and implement boot
> >variable maintenance into it.
> >
> > Changes in RFC v3:
> > not included in v3 series
> >
> > Changes in RFC v2:
> > - enable utf8 user input for boot option name
> > - create lib/efi_loader/efi_console.c::efi_console_get_u16_string() for
> >utf8 user input handling
> > - use u16_strlcat instead of u16_strcat
> > - remove the EFI_CALLs, and newly create or expose the following
> >xxx_int() functions.
> > efi_locate_handle_buffer_int(), efi_open_volume_int(),
> > efi_file_open_int(),
Re: [BISECTED] BeagleBone Black doesn't boot after a58147c2dbbf
I've played a little and now I believe that the issue is that EEPROM read addr
pointer is somehow corrupted due to 1-byte address write. The EEPROM is
definitely have two-byte read address accoring the datasheet.
I've failed to unravel exact rule what is happening when only one address byte
is set, but was able to read random places of EEPROM.
However, the following diff makes the board bootable.
diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c
index ed34991377..26edddccc6 100644
--- a/board/ti/common/board_detect.c
+++ b/board/ti/common/board_detect.c
@@ -86,7 +86,6 @@ __weak void gpi2c_init(void)
static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr,
u32 header, u32 size, uint8_t *ep)
{
- u32 hdr_read = 0xdeadbeef;
int rc;
#if CONFIG_IS_ENABLED(DM_I2C)
@@ -113,10 +112,10 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr,
int dev_addr,
* We must allow for fall through to check the data if 2 byte
* addressing works
*/
- (void)dm_i2c_read(dev, 0, (uint8_t *)_read, 4);
+ rc = dm_i2c_read(dev, 0, ep, size);
/* Corrupted data??? */
- if (hdr_read != header) {
+ if (rc || (*((u32*)ep) != header)) {
/*
* read the eeprom header using i2c again, but use only a
* 2 byte address (some newer boards need this..)
@@ -125,16 +124,13 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr,
int dev_addr,
if (rc)
return rc;
- rc = dm_i2c_read(dev, 0, (uint8_t *)_read, 4);
+ rc = dm_i2c_read(dev, 0, ep, size);
if (rc)
return rc;
}
- if (hdr_read != header)
+ if (*((u32*)ep) != header)
return -1;
- rc = dm_i2c_read(dev, 0, ep, size);
- if (rc)
- return rc;
#else
u32 byte;
Re: [SPAM] [PATCH 2/2] binman: Add more documentation about binman usage
Hi Xavier,
On Mon, 8 Aug 2022 at 09:48, Xavier Drudis Ferran wrote:
>
> El Sun, Aug 07, 2022 at 04:33:26PM -0600, Simon Glass deia:
> > This is an attempt to answer the comments provided by Xavier [1].
> >
>
> Thank you. Sorry if I point out silly things too. No agony intended.
>
> >
> > +Note that binman can itself can create a FIT. This helps to move mkimage
>
> one "can" too much
It looks like Heinrich applied this patch, or at least it seems to be
in mainline now. This 'can' was fixed.
>
> > +invocations out of the Makefile and into binman image descriptions. It also
> > +helps by removing the need for ad-hoc tools like `make_fit_atf.py`.
> > +
> >
>
> Maybe in future tense?
> We're not there yet?, because of tee.bin, see Jerome's message.
> Or is tee.bin not officialy supported yet in U-Boot?
I suppose we are not there yet for some cases. Patches are welcome but
I don't think we need to put this in the future tense.
>
>
> > +How do you know how to incorporate ATF? It is handled by the atf-bl31
> > entry type
> > +(etype). An etype is an implementation of reading a binary into binman, in
> > this
> > +case the `bl31.bin` file. When you build U-Boot but do not set the BL31
> > +environment variable, binman provides a help message, which comes from
> > +`missing-blob-help`::
> > +
> > +See the documentation for your board. You may need to build ARM Trusted
> > +Firmware and build with BL31=/path/to/bl31.bin
> > +
> > +The mechanism by which binman is advised of this is also in the Makefile.
> > See
> > +the `-a atf-bl31-path=${BL31}` piece in `cmd_binman`. This tells binman to
> > +set the EntryArg `atf-bl31-path` to the value of the `BL31` environment
> > +variable. Within binman, this EntryArg is picked up by the `Entry_atf_bl31`
> > +etype. An EntryArg is simply an argument to the entry. The `atf-bl31-path`
> > +name is documented in :ref:`etype_atf_bl31`.
> > +
>
> Still confused. Shouldn't you mention split-elf ?
> The way I use it bl31.elf is not simply copied into an image (atf_bl31.py
> is just a Entry_blob_named_by_arg). It is sliced in pieces and put into
> u-boot.itb. Each piece carries a little metadada like the load address,
> extracted from the elf by make_fit_atf.py or binman with split-elf.
>
> The problem is binman cannot incorporate an image it produced as a binary into
> another, so we must still use make_fit_atf.py. But then binman does not use
> atf-bl31, it simply includes a blob with filename="u-boot.itb".
>
> Maybe it's not the best way to do it and people should just add a atf-bl31 {}
> section in their binman image and it somehow works ? Because that's what
> I would assume from your text.
>
> Or maybe you're talking of other boards, but then try not to write it as this
> is the method one uses always when one has atf (TF-A)?
I was, but I'll send a patch with a try at this also.
>
> Anyway, thank you for writing it. The docs help understand many of the issues
> and are a good improvement.
OK good. Thanks for writing up your questions in such detail.
Regards,
SImon
Re: [PATCH v4 1/8] binman: add support for skipping file concatenation for mkimage
Hi Quentin, On Wed, 3 Aug 2022 at 06:19, Quentin Schulz wrote: > > From: Quentin Schulz > > Some image types handled by mkimage require the datafiles to be passed > independently (-d data1:data2) for specific handling of each. A > concatenation of datafiles prior to passing them to mkimage wouldn't > work. > > That is the case for rkspi for example which requires page alignment > and only writing 2KB every 4KB. > > This adds the ability to tell binman to pass the datafiles without > prior concatenation to mkimage, by adding the multiple-data-files > boolean property to the mkimage node. > > Cc: Quentin Schulz > Reviewed-by: Simon Glass > Signed-off-by: Quentin Schulz > --- > tools/binman/entries.rst | 22 +++ > tools/binman/etype/mkimage.py | 41 +++ > 2 files changed, 59 insertions(+), 4 deletions(-) Somehow I missed this one, sorry. It needs a test (try 'binman test -T' to see that it breaks code coverage). Regards, Simon
[PATCH 2/2] binman: Document how to handle dependent images
Binman does not support this properly at present. Add documentation about
it including a work-around.
Signed-off-by: Simon Glass
---
tools/binman/binman.rst | 50 +
1 file changed, 50 insertions(+)
diff --git a/tools/binman/binman.rst b/tools/binman/binman.rst
index f85d13b700a..7cfac724b84 100644
--- a/tools/binman/binman.rst
+++ b/tools/binman/binman.rst
@@ -858,6 +858,55 @@ allow-repack:
image description to be stored in the FDT and fdtmap.
+Image dependencies
+--
+
+Binman does not currently support images that depend on each other. For
example,
+if one image creates `fred.bin` and then the next uses this `fred.bin` to
+produce a final `image.bin`, then the behaviour is undefined. It may work, or
it
+may produce an error about `fred.bin` being missing, or it may use a version of
+`fred.bin` from a previous run.
+
+Often this can be handled by incorporating the dependency into the second
+image. For example, instead of::
+
+binman {
+multiple-images;
+
+fred {
+u-boot {
+};
+fill {
+size = <0x100>;
+};
+};
+
+image {
+blob {
+filename = "fred.bin";
+};
+u-boot-spl {
+};
+};
+
+you can do this::
+
+binman {
+image {
+fred {
+type = "section";
+u-boot {
+};
+fill {
+size = <0x100>;
+};
+};
+u-boot-spl {
+};
+};
+
+
+
Hashing Entries
---
@@ -1690,6 +1739,7 @@ Some ideas:
Perhaps it should completely regenerate the flat tree?
- Put faked files into a separate subdir and remove them on start-up, to avoid
seeing them as 'real' files on a subsequent run
+- Support images which depend on each other
--
Simon Glass
--
2.37.1.595.g718a3a8f04-goog
[PATCH 1/2] binman: Mention split-elf in the main docs
Since we are talking about ATF, add mention of this new feature too. Signed-off-by: Simon Glass --- tools/binman/binman.rst | 4 1 file changed, 4 insertions(+) diff --git a/tools/binman/binman.rst b/tools/binman/binman.rst index 6e1fd3476f1..f85d13b700a 100644 --- a/tools/binman/binman.rst +++ b/tools/binman/binman.rst @@ -236,6 +236,10 @@ variable. Within binman, this EntryArg is picked up by the `Entry_atf_bl31` etype. An EntryArg is simply an argument to the entry. The `atf-bl31-path` name is documented in :ref:`etype_atf_bl31`. +Taking this a little further, when binman is used to create a FIT, it supports +using an ELF file, e.g. `bl31.elf` and splitting it into separate pieces (with +`fit,operation = "split-elf"`), each with its own load address. + Invoking binman outside U-Boot -- -- 2.37.1.595.g718a3a8f04-goog
Re: [PATCH v8 05/13] stm32mp1: dk2: Add image information for capsule updates
On 8/17/22 14:43, Sughosh Ganu wrote:
Enabling capsule update functionality on the platform requires
populating information on the images that are to be updated using the
functionality. Do so for the DK2 board.
Signed-off-by: Sughosh Ganu
Reviewed-by: Patrick Delaunay
Reviewed-by: Ilias Apalodimas
---
Changes since V7: None
board/st/stm32mp1/stm32mp1.c | 23 +++
include/configs/stm32mp15_common.h | 4
2 files changed, 27 insertions(+)
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 9496890d16..0fda8f150d 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -87,6 +88,16 @@
#define USB_START_LOW_THRESHOLD_UV123
#define USB_START_HIGH_THRESHOLD_UV 215
+#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
+struct efi_fw_image fw_images[1];
+
+struct efi_capsule_update_info update_info = {
+ .images = fw_images,
+};
+
+u8 num_image_type_guids = ARRAY_SIZE(fw_images);
+#endif /* EFI_HAVE_CAPSULE_SUPPORT */
+
int board_early_init_f(void)
{
/* nothing to do, only used in SPL */
@@ -670,6 +681,18 @@ int board_init(void)
setup_led(LEDST_ON);
+#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
+ if (board_is_stm32mp15x_dk2()) {
+ efi_guid_t image_type_guid = STM32MP15_DK2_FIP_IMAGE_GUID;
+ guidcpy(_images[0].image_type_id, _type_guid);
+ fw_images[0].fw_name = u"STM32MP15-DK2-FIP";
+ /*
+* For FWU multi bank update, the image
+* index will be computed at runtime
+*/
+ fw_images[0].image_index = 0;
+ }
+#endif
return 0;
}
diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h
index c5412ffeb3..6ab10d8ce5 100644
--- a/include/configs/stm32mp15_common.h
+++ b/include/configs/stm32mp15_common.h
@@ -34,6 +34,10 @@
#define CONFIG_SERVERIP 192.168.1.1
#endif
Hi Sugosh,
Sorry for the late review.
+#define STM32MP15_DK2_FIP_IMAGE_GUID \
Although this is now only supported on this STM32MP15_DK2 board, I don't
think this macro should be tight to the board name, as it may be used
for other STM32MP boards. I'd just use STM32MP_FIP_IMAGE_GUID.
This should be the same for the fw_images[0].fw_name.
Best regards,
Yann
+ EFI_GUID(0x19d5df83, 0x11b0, 0x457b, 0xbe, 0x2c, \
+0x75, 0x59, 0xc1, 0x31, 0x42, 0xa5)
+
/*/
#ifdef CONFIG_DISTRO_DEFAULTS
/*/
Re: [PATCH] Makefile: Unify condition for mpc85xx reset vector
On Wednesday 17 August 2022 19:13:08 Simon Glass wrote:
> On Wed, 3 Aug 2022 at 15:57, Pali Rohár wrote:
> >
> > Use 'CONFIG_MPC85XX_HAVE_RESET_VECTOR && CONFIG_OF_SEPARATE' pattern
> > instead of 'CONFIG_MPC85XX_HAVE_RESET_VECTOR && !CONFIG_OF_EMBED' also in
> > OBJCOPYFLAGS_u-boot-nodtb.bin as this pattern is used in rest of Makefile.
> >
> > Signed-off-by: Pali Rohár
> > ---
> > Makefile | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
>
> Reviewed-by: Simon Glass
>
> Let's make a plan to move this to binman at some point.
>
Once all mpc pending patches which are waiting there for months are
reviewed and merged, I can try to look at it. Until that I'm stopping
any development in this area. Ball is _not_ on my side.
>
> >
> > diff --git a/Makefile b/Makefile
> > index d659c8118cba..23bf0c8b1e62 100644
> > --- a/Makefile
> > +++ b/Makefile
> > @@ -1267,7 +1267,7 @@ spl/u-boot-spl.srec: spl/u-boot-spl FORCE
> >
> > OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \
> > $(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) \
> > - $(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR),$(if
> > $(CONFIG_OF_EMBED),,-R .bootpg -R .resetvec))
> > + $(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR),$(if
> > $(CONFIG_OF_SEPARATE),-R .bootpg -R .resetvec))
> >
> > binary_size_check: u-boot-nodtb.bin FORCE
> > @file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \
> > --
> > 2.20.1
> >
Re: [PATCH v11 4/9] eficonfig: add "Change Boot Order" menu entry
Hi Heinrich,
On Thu, 18 Aug 2022 at 15:50, Heinrich Schuchardt wrote:
>
> On 8/18/22 08:17, Heinrich Schuchardt wrote:
> > On 8/17/22 11:36, Masahisa Kojima wrote:
> >> This commit adds the menu entry to update UEFI BootOrder variable.
> >> User moves the entry with UP/DOWN key, changes the order
> >> with PLUS/MINUS key, press SPACE to activate or deactivate
> >> the entry, then finalizes the order by ENTER key.
> >> If the entry is activated, the boot index is added into the
> >> BootOrder variable in the order of the list.
> >>
> >> The U-Boot menu framework is well designed for static menu,
> >> this commit implements the own menu display and key handling
> >> for dynamically change the order of menu entry.
> >>
> >> Signed-off-by: Masahisa Kojima
> >
> > Hello Masahisa,
> >
> > not all boot option will necessarily be in the boot order.
> >
> > It must be possible to add an existing boot option to the boot order.
> >
> > It must be possible to delete a boot option from the boot order without
> > deleting the boot option.
> >
> > I can't see how to do this inside the eficonfig command with the patch
> > series applied
>
> Sorry, I got this wrong. The inclusion/exclusion is done via the
> checkmark. This works fine.
Thank you for your quick check!
Regrads,
Masahisa Kojima
>
> Best regards
>
> Heinrich
>
> >
> >> ---
> >> Changes in v11:
> >> - remove BootOrder variable dependency
> >> - use ANSI_CURSOR_POSITION and ANSI_CLEAR_LINE instead of printf("\n")
> >>since current eficonfig implementation does not handle console size
> >> correctly.
> >>printf("\n") at the outside of console size breaks the console output.
> >> - add KEY_SPACE to toggle the boot option active status
> >>
> >> No update since v9
> >>
> >> Changes in v9:
> >> - add function comment
> >>
> >> Changes in v8:
> >> - add "Save" and "Quit" entries
> >>
> >> Changes in v7:
> >> - use UP/DOWN and PLUS/MINUS key to change to order
> >>
> >> no update in v6:
> >>
> >> cmd/eficonfig.c | 346
> >> 1 file changed, 346 insertions(+)
> >>
> >> diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c
> >> index 938d46374e..f6152495c8 100644
> >> --- a/cmd/eficonfig.c
> >> +++ b/cmd/eficonfig.c
> >> @@ -91,6 +91,23 @@ struct eficonfig_boot_selection_data {
> >> int *selected;
> >> };
> >>
> >> +/**
> >> + * struct eficonfig_boot_order - structure to be used to update
> >> BootOrder variable
> >> + *
> >> + * @num:index in the menu entry
> >> + * @description:pointer to the description string
> >> + * @boot_index:boot option index
> >> + * @active:flag to include the boot option into BootOrder
> >> variable
> >> + * @list:list structure
> >> + */
> >> +struct eficonfig_boot_order {
> >> +u32 num;
> >> +u16 *description;
> >> +u32 boot_index;
> >> +bool active;
> >> +struct list_head list;
> >> +};
> >> +
> >> /**
> >>* eficonfig_print_msg() - print message
> >>*
> >> @@ -1665,6 +1682,334 @@ out:
> >> return ret;
> >> }
> >>
> >> +/**
> >> + * eficonfig_display_change_boot_order() - display the BootOrder list
> >> + *
> >> + * @efi_menu:pointer to the efimenu structure
> >> + * Return:status code
> >> + */
> >> +static void eficonfig_display_change_boot_order(struct efimenu
> >> *efi_menu)
> >> +{
> >> +bool reverse;
> >> +struct list_head *pos, *n;
> >> +struct eficonfig_boot_order *entry;
> >> +
> >> +printf(ANSI_CLEAR_CONSOLE ANSI_CURSOR_POSITION
> >> + "\n ** Change Boot Order **\n"
> >> + ANSI_CURSOR_POSITION
> >> + " Press UP/DOWN to move, +/- to change order"
> >> + ANSI_CURSOR_POSITION
> >> + " Press SPACE to activate or deactivate the entry"
> >> + ANSI_CURSOR_POSITION
> >> + " Select [Save] to complete, ESC/CTRL+C to quit"
> >> + ANSI_CURSOR_POSITION ANSI_CLEAR_LINE,
> >> + 1, 1, efi_menu->count + 5, 1, efi_menu->count + 6, 1,
> >> + efi_menu->count + 7, 1, efi_menu->count + 8, 1);
> >> +
> >> +/* draw boot option list */
> >> +list_for_each_safe(pos, n, _menu->list) {
> >> +entry = list_entry(pos, struct eficonfig_boot_order, list);
> >> +reverse = (entry->num == efi_menu->active);
> >> +
> >> +printf(ANSI_CURSOR_POSITION, entry->num + 4, 7);
> >> +
> >> +if (reverse)
> >> +puts(ANSI_COLOR_REVERSE);
> >> +
> >> +if (entry->num < efi_menu->count - 2) {
> >> +if (entry->active)
> >> +printf("[*] ");
> >> +else
> >> +printf("[ ] ");
> >> +}
> >> +
> >> +printf("%ls", entry->description);
> >> +
> >> +if (reverse)
> >> +puts(ANSI_COLOR_RESET);
> >> +}
> >> +}
> >> +
> >> +/**
> >> + * eficonfig_choice_change_boot_order() - handle the BootOrder update
> >> + *
> >> + * @efi_menu:pointer to the efimenu structure
> >> + *
Re: [PATCH v2 6/7] tpm: Implement state command for Cr50
Hi Simon,
On Wed, 17 Aug 2022 at 21:54, Simon Glass wrote:
>
> Hi Ilias,
>
> On Tue, 16 Aug 2022 at 06:43, Ilias Apalodimas
> wrote:
> >
> > Hi Simon,
> >
> > I know little of this device and the whole patch seems fine apart from
> > the definitions and declarations of the state functions.
> >
> >
> > On Sat, 13 Aug 2022 at 22:56, Simon Glass wrote:
> > >
> >
> > >
> > > drivers/tpm/cr50_i2c.c | 117 +
> > > include/tpm-v2.h | 54 +++
> > > lib/tpm-v2.c | 24 +
> >
> > [...]
> >
> > > diff --git a/include/tpm-v2.h b/include/tpm-v2.h
> > > index e79c90b9395..8e90a616220 100644
> > > --- a/include/tpm-v2.h
> > > +++ b/include/tpm-v2.h
> > > @@ -419,6 +419,50 @@ enum {
> > > HR_NV_INDEX = TPM_HT_NV_INDEX << HR_SHIFT,
> > > };
> > >
> > > +/*
> > > + * Operations specific to the Cr50 TPM used on Chromium OS and Android
> > > devices
> > > + *
> > > + * FIXME: below is not enough to differentiate between vendors commands
> > > + * of numerous devices. However, the current tpm2 APIs aren't very
> > > amenable
> > > + * to extending generically because the marshaling code is assuming all
> > > + * knowledge of all commands.
> > > + */
> > > +#define TPM2_CC_VENDOR_BIT_MASK0x2000
> > > +
> > > +#define TPM2_CR50_VENDOR_COMMAND (TPM2_CC_VENDOR_BIT_MASK
> > > | 0)
> > > +#define TPM2_CR50_SUB_CMD_IMMEDIATE_RESET 19
> > > +#define TPM2_CR50_SUB_CMD_NVMEM_ENABLE_COMMITS 21
> > > +#define TPM2_CR50_SUB_CMD_REPORT_TPM_STATE 23
> > > +#define TPM2_CR50_SUB_CMD_TURN_UPDATE_ON 24
> > > +#define TPM2_CR50_SUB_CMD_GET_REC_BTN 29
> > > +#define TPM2_CR50_SUB_CMD_TPM_MODE 40
> > > +#define TPM2_CR50_SUB_CMD_GET_BOOT_MODE52
> > > +#define TPM2_CR50_SUB_CMD_RESET_EC 53
> > > +
> > > +/* Cr50 vendor-specific error codes. */
> > > +#define VENDOR_RC_ERR 0x0500
> > > +enum cr50_vendor_rc {
> > > + VENDOR_RC_INTERNAL_ERROR= (VENDOR_RC_ERR | 6),
> > > + VENDOR_RC_NO_SUCH_SUBCOMMAND= (VENDOR_RC_ERR | 8),
> > > + VENDOR_RC_NO_SUCH_COMMAND = (VENDOR_RC_ERR | 127),
> > > +};
> > > +
> > > +enum cr50_tpm_mode {
> > > + /*
> > > +* Default state: TPM is enabled, and may be set to either
> > > +* TPM_MODE_ENABLED or TPM_MODE_DISABLED.
> > > +*/
> > > + TPM_MODE_ENABLED_TENTATIVE = 0,
> > > +
> > > + /* TPM is enabled, and mode may not be changed. */
> > > + TPM_MODE_ENABLED = 1,
> > > +
> > > + /* TPM is disabled, and mode may not be changed. */
> > > + TPM_MODE_DISABLED = 2,
> > > +
> > > + TPM_MODE_INVALID,
> > > +};
> > > +
> > > /**
> > > * Issue a TPM2_Startup command.
> > > *
> > > @@ -658,4 +702,14 @@ u32 tpm2_disable_platform_hierarchy(struct udevice
> > > *dev);
> > > u32 tpm2_submit_command(struct udevice *dev, const u8 *sendbuf,
> > > u8 *recvbuf, size_t *recv_size);
> > >
> > > +/**
> > > + * tpm_cr50_report_state() - Report the Cr50 internal state
> > > + *
> > > + * @dev: TPM device
> > > + * @recvbuf: Buffer to save the response to
> > > + * @recv_size: Pointer to the size of the response buffer
> > > + * Return: result of the operation
> > > + */
> > > +u32 tpm2_cr50_report_state(struct udevice *dev, u8 *recvbuf, size_t
> > > *recv_size);
> > > +
> >
> > I think we should keep the generic include files clean for hardware
> > specific details.
> >
> > > #endif /* __TPM_V2_H */
> > > diff --git a/lib/tpm-v2.c b/lib/tpm-v2.c
> > > index 3e240bb4c67..3de4841974a 100644
> > > --- a/lib/tpm-v2.c
> > > +++ b/lib/tpm-v2.c
> > > @@ -679,3 +679,27 @@ u32 tpm2_submit_command(struct udevice *dev, const
> > > u8 *sendbuf,
> > > {
> > > return tpm_sendrecv_command(dev, sendbuf, recvbuf, recv_size);
> > > }
> > > +
> > > +u32 tpm2_cr50_report_state(struct udevice *dev, u8 *recvbuf, size_t
> > > *recv_size)
> > > +{
> > > + u8 command_v2[COMMAND_BUFFER_SIZE] = {
> > > + /* header 10 bytes */
> > > + tpm_u16(TPM2_ST_NO_SESSIONS), /* TAG */
> > > + tpm_u32(10 + 2),/* Length */
> > > + tpm_u32(TPM2_CR50_VENDOR_COMMAND), /* Command code */
> > > +
> > > + tpm_u16(TPM2_CR50_SUB_CMD_REPORT_TPM_STATE),
> > > + };
> > > + int ret;
> > > +
> > > + ret = tpm_sendrecv_command(dev, command_v2, recvbuf, recv_size);
> > > + log_debug("ret=%s, %x\n", dev->name, ret);
> > > + if (ret)
> > > + return ret;
> > > + if (*recv_size < 12)
> > > + return -ENODATA;
> > > + *recv_size -= 12;
> > > + memcpy(recvbuf, recvbuf + 12, *recv_size);
> > > +
> > > + return 0;
> > > +}
> >
> > Same here, this functions seems ok but shouldn't land in the generic TPM API
>
> So shall I create a new
Re: [PATCH v11 4/9] eficonfig: add "Change Boot Order" menu entry
On 8/18/22 08:17, Heinrich Schuchardt wrote:
On 8/17/22 11:36, Masahisa Kojima wrote:
This commit adds the menu entry to update UEFI BootOrder variable.
User moves the entry with UP/DOWN key, changes the order
with PLUS/MINUS key, press SPACE to activate or deactivate
the entry, then finalizes the order by ENTER key.
If the entry is activated, the boot index is added into the
BootOrder variable in the order of the list.
The U-Boot menu framework is well designed for static menu,
this commit implements the own menu display and key handling
for dynamically change the order of menu entry.
Signed-off-by: Masahisa Kojima
Hello Masahisa,
not all boot option will necessarily be in the boot order.
It must be possible to add an existing boot option to the boot order.
It must be possible to delete a boot option from the boot order without
deleting the boot option.
I can't see how to do this inside the eficonfig command with the patch
series applied
Sorry, I got this wrong. The inclusion/exclusion is done via the
checkmark. This works fine.
Best regards
Heinrich
---
Changes in v11:
- remove BootOrder variable dependency
- use ANSI_CURSOR_POSITION and ANSI_CLEAR_LINE instead of printf("\n")
since current eficonfig implementation does not handle console size
correctly.
printf("\n") at the outside of console size breaks the console output.
- add KEY_SPACE to toggle the boot option active status
No update since v9
Changes in v9:
- add function comment
Changes in v8:
- add "Save" and "Quit" entries
Changes in v7:
- use UP/DOWN and PLUS/MINUS key to change to order
no update in v6:
cmd/eficonfig.c | 346
1 file changed, 346 insertions(+)
diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c
index 938d46374e..f6152495c8 100644
--- a/cmd/eficonfig.c
+++ b/cmd/eficonfig.c
@@ -91,6 +91,23 @@ struct eficonfig_boot_selection_data {
int *selected;
};
+/**
+ * struct eficonfig_boot_order - structure to be used to update
BootOrder variable
+ *
+ * @num: index in the menu entry
+ * @description: pointer to the description string
+ * @boot_index: boot option index
+ * @active: flag to include the boot option into BootOrder
variable
+ * @list: list structure
+ */
+struct eficonfig_boot_order {
+ u32 num;
+ u16 *description;
+ u32 boot_index;
+ bool active;
+ struct list_head list;
+};
+
/**
* eficonfig_print_msg() - print message
*
@@ -1665,6 +1682,334 @@ out:
return ret;
}
+/**
+ * eficonfig_display_change_boot_order() - display the BootOrder list
+ *
+ * @efi_menu: pointer to the efimenu structure
+ * Return: status code
+ */
+static void eficonfig_display_change_boot_order(struct efimenu
*efi_menu)
+{
+ bool reverse;
+ struct list_head *pos, *n;
+ struct eficonfig_boot_order *entry;
+
+ printf(ANSI_CLEAR_CONSOLE ANSI_CURSOR_POSITION
+ "\n ** Change Boot Order **\n"
+ ANSI_CURSOR_POSITION
+ " Press UP/DOWN to move, +/- to change order"
+ ANSI_CURSOR_POSITION
+ " Press SPACE to activate or deactivate the entry"
+ ANSI_CURSOR_POSITION
+ " Select [Save] to complete, ESC/CTRL+C to quit"
+ ANSI_CURSOR_POSITION ANSI_CLEAR_LINE,
+ 1, 1, efi_menu->count + 5, 1, efi_menu->count + 6, 1,
+ efi_menu->count + 7, 1, efi_menu->count + 8, 1);
+
+ /* draw boot option list */
+ list_for_each_safe(pos, n, _menu->list) {
+ entry = list_entry(pos, struct eficonfig_boot_order, list);
+ reverse = (entry->num == efi_menu->active);
+
+ printf(ANSI_CURSOR_POSITION, entry->num + 4, 7);
+
+ if (reverse)
+ puts(ANSI_COLOR_REVERSE);
+
+ if (entry->num < efi_menu->count - 2) {
+ if (entry->active)
+ printf("[*] ");
+ else
+ printf("[ ] ");
+ }
+
+ printf("%ls", entry->description);
+
+ if (reverse)
+ puts(ANSI_COLOR_RESET);
+ }
+}
+
+/**
+ * eficonfig_choice_change_boot_order() - handle the BootOrder update
+ *
+ * @efi_menu: pointer to the efimenu structure
+ * Return: status code
+ */
+static efi_status_t eficonfig_choice_change_boot_order(struct efimenu
*efi_menu)
+{
+ int esc = 0;
+ struct list_head *pos, *n;
+ struct eficonfig_boot_order *tmp;
+ enum bootmenu_key key = KEY_NONE;
+ struct eficonfig_boot_order *entry;
+
+ while (1) {
+ bootmenu_loop(NULL, , );
+
+ switch (key) {
+ case KEY_PLUS:
+ if (efi_menu->active > 0) {
+ list_for_each_safe(pos, n, _menu->list) {
+ entry = list_entry(pos, struct
eficonfig_boot_order, list);
+ if (entry->num == efi_menu->active)
+ break;
+ }
+ tmp = list_entry(pos->prev, struct
eficonfig_boot_order, list);
+ entry->num--;
+
Re: [PATCH v11 1/9] eficonfig: menu-driven addition of UEFI boot option
On 8/17/22 11:36, Masahisa Kojima wrote:
This commit add the "eficonfig" command.
The "eficonfig" command implements the menu-driven UEFI boot option
maintenance feature. This commit implements the addition of
new boot option. User can select the block device volume having
efi_simple_file_system_protocol and select the file corresponding
to the Boot variable. User can also enter the description and
optional_data of the BOOT variable in utf8.
This commit adds "include/efi_config.h", it contains the common
definition to be used from other menus such as UEFI Secure Boot
key management.
Signed-off-by: Masahisa Kojima
---
Changes in v11:
- refactor menu entry construction, directly use eficonfig_entry structure
- remove reading directory info to calculate the number of entry
- fix invalid efi_free_pool() in ill_file_info()
- use ANSI_CURSOR_POSITION and ANSI_CLEAR_LINE instead of printf("\n")
since current eficonfig implementation does not handle console size
correctly.
printf("\n") at the outside of console size breaks the console output.
Changes in v10:
- add initrd file selection
- do refactoring
- eficonfig_process_common() use list structure
- remove u'/' before copying file_path into current_path
- fix typos
- check snprintf error
Changes in v9:
- move "efi_guid_bootmenu_auto_generated definition" into efi_bootmgr.c
to address build error when CMD_EFICONFIG is disabled
- fix typos and comment
- remove file system information from error message
- remove unreachable code in eficonfig_choice_entry()
- single printf() call as much as possible
- call only getchar() in eficonfig_print_msg()
- filter out '.' entry from file selection
- update the efi_disk_get_device_name() implementation
- add function comment
Changes in v8:
- command name is change from "efimenu" to "eficonfig"
- function and struct prefixes is changed to "eficonfig"
- fix menu header string
Changes in v7:
- add "efimenu" command and uefi variable maintenance code
moved into cmd/efimenu.c
- create include/efimenu.h to define the common definition for
the other menu such as UEFI Secure Boot key management
- update boot option edit UI, user can select description, file,
and optional_data to edit in the same menu like following.
** Edit Boot Option **
Description: debian
File: virtio 0:1/EFI\debian\grubaa64.efi
Optional Data: test
Save
Quit
- remove exit parameter from efimenu_process_common()
- menu title type is changed from u16 to char
- efimenu_process_common() add menu title string
- reduce printf/puts function call for displaying the menu
- efi_console_get_u16_string() accept 0 length to allow
optional_data is empty
- efi_console_get_u16_string() the "size" parameter name is changes to "count"
- efimenu is now designed to maintain the UEFI variables, remove autoboot
related code
- remove one empty line before "Quit" entry
- efimenu_init() processes only the first time
Changes in v6:
- fix typos
- modify volume name to match U-Boot syntax
- compile in CONFIG_EFI_LOADER=n and CONFIG_CMD_BOOTEFI_BOOTMGR=n
- simplify u16_strncmp() usage
- support "a\b.efi" file path, use link list to handle filepath
- modify length check condition
- UEFI related menu items only appears with CONFIG_AUTOBOOT_MENU_SHOW=y
Changes in v5:
- remove forward declarations
- add const qualifier for menu items
- fix the possible unaligned access for directory info access
- split into three commit 1)add boot option 2) delete boot option 3)change boot
order
This commit is 1)add boot option.
- fix file name buffer allocation size, it should be EFI_BOOTMENU_FILE_PATH_MAX
* sizeof(u16)
- fix wrong size checking for file selection
Chanes in v4:
- UEFI boot option maintenance menu is integrated into bootmenu
- display the simplified volume name(e.g. usb0:1, nvme1:2) for the
volume selection
- instead of extending lib/efi_loader/efi_bootmgr.c, newly create
lib/efi_loader/efi_bootmenu_maintenance.c and implement boot
variable maintenance into it.
Changes in RFC v3:
not included in v3 series
Changes in RFC v2:
- enable utf8 user input for boot option name
- create lib/efi_loader/efi_console.c::efi_console_get_u16_string() for
utf8 user input handling
- use u16_strlcat instead of u16_strcat
- remove the EFI_CALLs, and newly create or expose the following
xxx_int() functions.
efi_locate_handle_buffer_int(), efi_open_volume_int(),
efi_file_open_int(), efi_file_close_int(), efi_file_read_int() and
efi_file_setpos_int().
Note that EFI_CALLs still exist for EFI_DEVICE_PATH_TO_TEXT_PROTOCOL
and EFI_SIMPLE_TEXT_INPUT/OUTPUT_PROTOCOL
- use efi_search_protocol() instead of calling locate_protocol() to get
the device_path_to_text_protocol interface.
- remove unnecessary puts(ANSI_CLEAR_LINE), this patch is still depends on
puts(ANSI_CLEAR_CONSOLE)
- skip SetVariable() if the bootorder is not changed
cmd/Kconfig |7 +
cmd/Makefile
Re: [PATCH v11 1/9] eficonfig: menu-driven addition of UEFI boot option
On 8/17/22 11:36, Masahisa Kojima wrote:
This commit add the "eficonfig" command.
The "eficonfig" command implements the menu-driven UEFI boot option
maintenance feature. This commit implements the addition of
new boot option. User can select the block device volume having
efi_simple_file_system_protocol and select the file corresponding
to the Boot variable. User can also enter the description and
optional_data of the BOOT variable in utf8.
This commit adds "include/efi_config.h", it contains the common
definition to be used from other menus such as UEFI Secure Boot
key management.
Signed-off-by: Masahisa Kojima
---
Changes in v11:
- refactor menu entry construction, directly use eficonfig_entry structure
- remove reading directory info to calculate the number of entry
- fix invalid efi_free_pool() in ill_file_info()
- use ANSI_CURSOR_POSITION and ANSI_CLEAR_LINE instead of printf("\n")
since current eficonfig implementation does not handle console size
correctly.
printf("\n") at the outside of console size breaks the console output.
Changes in v10:
- add initrd file selection
- do refactoring
- eficonfig_process_common() use list structure
- remove u'/' before copying file_path into current_path
- fix typos
- check snprintf error
Changes in v9:
- move "efi_guid_bootmenu_auto_generated definition" into efi_bootmgr.c
to address build error when CMD_EFICONFIG is disabled
- fix typos and comment
- remove file system information from error message
- remove unreachable code in eficonfig_choice_entry()
- single printf() call as much as possible
- call only getchar() in eficonfig_print_msg()
- filter out '.' entry from file selection
- update the efi_disk_get_device_name() implementation
- add function comment
Changes in v8:
- command name is change from "efimenu" to "eficonfig"
- function and struct prefixes is changed to "eficonfig"
- fix menu header string
Changes in v7:
- add "efimenu" command and uefi variable maintenance code
moved into cmd/efimenu.c
- create include/efimenu.h to define the common definition for
the other menu such as UEFI Secure Boot key management
- update boot option edit UI, user can select description, file,
and optional_data to edit in the same menu like following.
** Edit Boot Option **
Description: debian
File: virtio 0:1/EFI\debian\grubaa64.efi
Optional Data: test
Save
Quit
- remove exit parameter from efimenu_process_common()
- menu title type is changed from u16 to char
- efimenu_process_common() add menu title string
- reduce printf/puts function call for displaying the menu
- efi_console_get_u16_string() accept 0 length to allow
optional_data is empty
- efi_console_get_u16_string() the "size" parameter name is changes to "count"
- efimenu is now designed to maintain the UEFI variables, remove autoboot
related code
- remove one empty line before "Quit" entry
- efimenu_init() processes only the first time
Changes in v6:
- fix typos
- modify volume name to match U-Boot syntax
- compile in CONFIG_EFI_LOADER=n and CONFIG_CMD_BOOTEFI_BOOTMGR=n
- simplify u16_strncmp() usage
- support "a\b.efi" file path, use link list to handle filepath
- modify length check condition
- UEFI related menu items only appears with CONFIG_AUTOBOOT_MENU_SHOW=y
Changes in v5:
- remove forward declarations
- add const qualifier for menu items
- fix the possible unaligned access for directory info access
- split into three commit 1)add boot option 2) delete boot option 3)change boot
order
This commit is 1)add boot option.
- fix file name buffer allocation size, it should be EFI_BOOTMENU_FILE_PATH_MAX
* sizeof(u16)
- fix wrong size checking for file selection
Chanes in v4:
- UEFI boot option maintenance menu is integrated into bootmenu
- display the simplified volume name(e.g. usb0:1, nvme1:2) for the
volume selection
- instead of extending lib/efi_loader/efi_bootmgr.c, newly create
lib/efi_loader/efi_bootmenu_maintenance.c and implement boot
variable maintenance into it.
Changes in RFC v3:
not included in v3 series
Changes in RFC v2:
- enable utf8 user input for boot option name
- create lib/efi_loader/efi_console.c::efi_console_get_u16_string() for
utf8 user input handling
- use u16_strlcat instead of u16_strcat
- remove the EFI_CALLs, and newly create or expose the following
xxx_int() functions.
efi_locate_handle_buffer_int(), efi_open_volume_int(),
efi_file_open_int(), efi_file_close_int(), efi_file_read_int() and
efi_file_setpos_int().
Note that EFI_CALLs still exist for EFI_DEVICE_PATH_TO_TEXT_PROTOCOL
and EFI_SIMPLE_TEXT_INPUT/OUTPUT_PROTOCOL
- use efi_search_protocol() instead of calling locate_protocol() to get
the device_path_to_text_protocol interface.
- remove unnecessary puts(ANSI_CLEAR_LINE), this patch is still depends on
puts(ANSI_CLEAR_CONSOLE)
- skip SetVariable() if the bootorder is not changed
cmd/Kconfig |7 +
cmd/Makefile
Re: [PATCH v11 4/9] eficonfig: add "Change Boot Order" menu entry
On 8/17/22 11:36, Masahisa Kojima wrote:
This commit adds the menu entry to update UEFI BootOrder variable.
User moves the entry with UP/DOWN key, changes the order
with PLUS/MINUS key, press SPACE to activate or deactivate
the entry, then finalizes the order by ENTER key.
If the entry is activated, the boot index is added into the
BootOrder variable in the order of the list.
The U-Boot menu framework is well designed for static menu,
this commit implements the own menu display and key handling
for dynamically change the order of menu entry.
Signed-off-by: Masahisa Kojima
Hello Masahisa,
not all boot option will necessarily be in the boot order.
It must be possible to add an existing boot option to the boot order.
It must be possible to delete a boot option from the boot order without
deleting the boot option.
I can't see how to do this inside the eficonfig command with the patch
series applied
Best regards
Heinrich
---
Changes in v11:
- remove BootOrder variable dependency
- use ANSI_CURSOR_POSITION and ANSI_CLEAR_LINE instead of printf("\n")
since current eficonfig implementation does not handle console size
correctly.
printf("\n") at the outside of console size breaks the console output.
- add KEY_SPACE to toggle the boot option active status
No update since v9
Changes in v9:
- add function comment
Changes in v8:
- add "Save" and "Quit" entries
Changes in v7:
- use UP/DOWN and PLUS/MINUS key to change to order
no update in v6:
cmd/eficonfig.c | 346
1 file changed, 346 insertions(+)
diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c
index 938d46374e..f6152495c8 100644
--- a/cmd/eficonfig.c
+++ b/cmd/eficonfig.c
@@ -91,6 +91,23 @@ struct eficonfig_boot_selection_data {
int *selected;
};
+/**
+ * struct eficonfig_boot_order - structure to be used to update BootOrder
variable
+ *
+ * @num: index in the menu entry
+ * @description: pointer to the description string
+ * @boot_index:boot option index
+ * @active:flag to include the boot option into BootOrder variable
+ * @list: list structure
+ */
+struct eficonfig_boot_order {
+ u32 num;
+ u16 *description;
+ u32 boot_index;
+ bool active;
+ struct list_head list;
+};
+
/**
* eficonfig_print_msg() - print message
*
@@ -1665,6 +1682,334 @@ out:
return ret;
}
+/**
+ * eficonfig_display_change_boot_order() - display the BootOrder list
+ *
+ * @efi_menu: pointer to the efimenu structure
+ * Return: status code
+ */
+static void eficonfig_display_change_boot_order(struct efimenu *efi_menu)
+{
+ bool reverse;
+ struct list_head *pos, *n;
+ struct eficonfig_boot_order *entry;
+
+ printf(ANSI_CLEAR_CONSOLE ANSI_CURSOR_POSITION
+ "\n ** Change Boot Order **\n"
+ ANSI_CURSOR_POSITION
+ " Press UP/DOWN to move, +/- to change order"
+ ANSI_CURSOR_POSITION
+ " Press SPACE to activate or deactivate the entry"
+ ANSI_CURSOR_POSITION
+ " Select [Save] to complete, ESC/CTRL+C to quit"
+ ANSI_CURSOR_POSITION ANSI_CLEAR_LINE,
+ 1, 1, efi_menu->count + 5, 1, efi_menu->count + 6, 1,
+ efi_menu->count + 7, 1, efi_menu->count + 8, 1);
+
+ /* draw boot option list */
+ list_for_each_safe(pos, n, _menu->list) {
+ entry = list_entry(pos, struct eficonfig_boot_order, list);
+ reverse = (entry->num == efi_menu->active);
+
+ printf(ANSI_CURSOR_POSITION, entry->num + 4, 7);
+
+ if (reverse)
+ puts(ANSI_COLOR_REVERSE);
+
+ if (entry->num < efi_menu->count - 2) {
+ if (entry->active)
+ printf("[*] ");
+ else
+ printf("[ ] ");
+ }
+
+ printf("%ls", entry->description);
+
+ if (reverse)
+ puts(ANSI_COLOR_RESET);
+ }
+}
+
+/**
+ * eficonfig_choice_change_boot_order() - handle the BootOrder update
+ *
+ * @efi_menu: pointer to the efimenu structure
+ * Return: status code
+ */
+static efi_status_t eficonfig_choice_change_boot_order(struct efimenu
*efi_menu)
+{
+ int esc = 0;
+ struct list_head *pos, *n;
+ struct eficonfig_boot_order *tmp;
+ enum bootmenu_key key = KEY_NONE;
+ struct eficonfig_boot_order *entry;
+
+ while (1) {
+ bootmenu_loop(NULL, , );
+
+ switch (key) {
+ case KEY_PLUS:
+ if (efi_menu->active > 0) {
+ list_for_each_safe(pos, n, _menu->list) {
+ entry = list_entry(pos, struct
eficonfig_boot_order, list);
+ if (entry->num ==
