Re: [PATCH v2 3/6] Revert "board: rockchip: Fix binman_init failure on EVB-RK3568"
On 2023/2/14 18:33, Jonas Karlman wrote: An external TPL binary is now expected to be provided using ROCKCHIP_TPL when building RK3568 targets. This reverts commit 31500e7bcfaca08ab7c2879f502a6cf852410244. Signed-off-by: Jonas Karlman Reviewed-by: Simon Glass Reviewed-by: Kever Yang Thanks, - Kever --- v2: - Collect r-b tag configs/evb-rk3568_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig index a76d924d3872..7374ee42fb19 100644 --- a/configs/evb-rk3568_defconfig +++ b/configs/evb-rk3568_defconfig @@ -65,5 +65,4 @@ CONFIG_BAUDRATE=150 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y -# CONFIG_BINMAN_FDT is not set CONFIG_ERRNO_STR=y
Re: [PATCH v2 2/6] rockchip: Use an external TPL binary on RK3568
On 2023/2/14 18:33, Jonas Karlman wrote:
Rockchip SoCs typically use U-Boot TPL to initialize DRAM, then jumps
back to BootRom to load next stage, U-Boot SPL, into DRAM. BootRom then
jumps to U-Boot SPL to continue the normal boot flow.
However, there is no support to initialize DRAM on RK35xx SoCs using
U-Boot TPL and instead an external TPL binary must be used to generate a
bootable u-boot-rockchip.bin image.
Add CONFIG_ROCKCHIP_EXTERNAL_TPL to indicate that an external TPL should
be used. Build U-Boot with ROCKCHIP_TPL=/path/to/ddr.bin to generate a
bootable u-boot-rockchip.bin image for RK3568.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2:
- rename external-tpl-path to rockchip-tpl-path
- rename EXTERNAL_TPL to ROCKCHIP_TPL
- add CONFIG_ROCKCHIP_EXTERNAL_TPL option
Makefile | 1 +
arch/arm/dts/rockchip-u-boot.dtsi | 10 --
arch/arm/mach-rockchip/Kconfig| 4
3 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/Makefile b/Makefile
index 54f894dab841..58f8c7a35335 100644
--- a/Makefile
+++ b/Makefile
@@ -1335,6 +1335,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if
$(BINMAN_DEBUG),-D) \
-a opensbi-path=${OPENSBI} \
-a default-dt=$(default_dt) \
-a scp-path=$(SCP) \
+ -a rockchip-tpl-path=$(ROCKCHIP_TPL) \
-a spl-bss-pad=$(if $(CONFIG_SPL_SEPARATE_BSS),,1) \
-a tpl-bss-pad=$(if $(CONFIG_TPL_SEPARATE_BSS),,1) \
-a spl-dtb=$(CONFIG_SPL_OF_REAL) \
diff --git a/arch/arm/dts/rockchip-u-boot.dtsi
b/arch/arm/dts/rockchip-u-boot.dtsi
index 6c662a72d4f9..2878b80926c4 100644
--- a/arch/arm/dts/rockchip-u-boot.dtsi
+++ b/arch/arm/dts/rockchip-u-boot.dtsi
@@ -20,9 +20,12 @@
mkimage {
filename = "idbloader.img";
args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
-#ifdef CONFIG_TPL
multiple-data-files;
+#ifdef CONFIG_ROCKCHIP_EXTERNAL_TPL
+ rockchip-tpl {
+ };
+#elif defined(CONFIG_TPL)
u-boot-tpl {
};
#endif
@@ -134,9 +137,12 @@
mkimage {
filename = "idbloader-spi.img";
args = "-n", CONFIG_SYS_SOC, "-T", "rkspi";
-#ifdef CONFIG_TPL
multiple-data-files;
+#ifdef CONFIG_ROCKCHIP_EXTERNAL_TPL
+ rockchip-tpl {
+ };
+#elif defined(CONFIG_TPL)
u-boot-tpl {
};
#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index b678ec41318e..4a5415403446 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -377,6 +377,10 @@ config TPL_ROCKCHIP_BACK_TO_BROM
SPL will return to the boot rom, which will then load the U-Boot
binary to keep going on.
+config ROCKCHIP_EXTERNAL_TPL
+ bool "Use external TPL binary"
+ default y if ROCKCHIP_RK3568
+
config ROCKCHIP_COMMON_BOARD
bool "Rockchip common board file"
help
Re: [PATCH v2 1/6] binman: Add support for a rockchip-tpl entry
On 2023/2/14 18:33, Jonas Karlman wrote:
The rockchip-tpl entry can be used when an external TPL binary should be
used instead of the normal U-Boot TPL.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2:
- rename external-tpl to rockchip-tpl
- missing message moved to this patch
tools/binman/entries.rst | 14 ++
tools/binman/etype/rockchip_tpl.py | 20
tools/binman/ftest.py | 7 +++
tools/binman/missing-blob-help | 5 +
tools/binman/test/277_rockchip_tpl.dts | 16
5 files changed, 62 insertions(+)
create mode 100644 tools/binman/etype/rockchip_tpl.py
create mode 100644 tools/binman/test/277_rockchip_tpl.dts
diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
index 7a04a613992d..e177860a6a82 100644
--- a/tools/binman/entries.rst
+++ b/tools/binman/entries.rst
@@ -1386,6 +1386,20 @@ For example, this creates an image with a pre-load
header and a binary::
+.. _etype_rockchip_tpl:
+
+Entry: rockchip-tpl: Rockchip TPL binary
+
+
+Properties / Entry arguments:
+- rockchip-tpl-path: Filename of file to read into the entry,
+ typically _ddr_.bin
+
+This entry holds an external TPL binary used by some Rockchip SoCs
+instead of normal U-Boot TPL, typically to initialize DRAM.
+
+
+
.. _etype_scp:
Entry: scp: System Control Processor (SCP) firmware blob
diff --git a/tools/binman/etype/rockchip_tpl.py
b/tools/binman/etype/rockchip_tpl.py
new file mode 100644
index ..74f58ba8570c
--- /dev/null
+++ b/tools/binman/etype/rockchip_tpl.py
@@ -0,0 +1,20 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Entry-type module for Rockchip TPL binary
+#
+
+from binman.etype.blob_named_by_arg import Entry_blob_named_by_arg
+
+class Entry_rockchip_tpl(Entry_blob_named_by_arg):
+"""Rockchip TPL binary
+
+Properties / Entry arguments:
+- rockchip-tpl-path: Filename of file to read into the entry,
+ typically _ddr_.bin
+
+This entry holds an external TPL binary used by some Rockchip SoCs
+instead of normal U-Boot TPL, typically to initialize DRAM.
+"""
+def __init__(self, section, etype, node):
+super().__init__(section, etype, node, 'rockchip-tpl')
+self.external = True
diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py
index 062f54adb0ed..ed4b5c987557 100644
--- a/tools/binman/ftest.py
+++ b/tools/binman/ftest.py
@@ -90,6 +90,7 @@ TEE_OS_DATA = b'this is some tee OS data'
ATF_BL2U_DATA = b'bl2u'
OPENSBI_DATA = b'opensbi'
SCP_DATA = b'scp'
+ROCKCHIP_TPL_DATA = b'rockchip-tpl'
TEST_FDT1_DATA= b'fdt1'
TEST_FDT2_DATA= b'test-fdt2'
ENV_DATA = b'var1=1\nvar2="2"'
@@ -205,6 +206,7 @@ class TestFunctional(unittest.TestCase):
TestFunctional._MakeInputFile('bl2u.bin', ATF_BL2U_DATA)
TestFunctional._MakeInputFile('fw_dynamic.bin', OPENSBI_DATA)
TestFunctional._MakeInputFile('scp.bin', SCP_DATA)
+TestFunctional._MakeInputFile('rockchip-tpl.bin', ROCKCHIP_TPL_DATA)
# Add a few .dtb files for testing
TestFunctional._MakeInputFile('%s/test-fdt1.dtb' % TEST_FDT_SUBDIR,
@@ -4097,6 +4099,11 @@ class TestFunctional(unittest.TestCase):
data = self._DoReadFile('172_scp.dts')
self.assertEqual(SCP_DATA, data[:len(SCP_DATA)])
+def testPackRockchipTpl(self):
+"""Test that an image with a Rockchip TPL binary can be created"""
+data = self._DoReadFile('277_rockchip_tpl.dts')
+self.assertEqual(ROCKCHIP_TPL_DATA, data[:len(ROCKCHIP_TPL_DATA)])
+
def testFitFdt(self):
"""Test an image with an FIT with multiple FDT images"""
def _CheckFdt(seq, expected_data):
diff --git a/tools/binman/missing-blob-help b/tools/binman/missing-blob-help
index c61ca02a35ee..e8c991206fe5 100644
--- a/tools/binman/missing-blob-help
+++ b/tools/binman/missing-blob-help
@@ -34,6 +34,11 @@ If CONFIG_WDT_K3_RTI_LOAD_FW is enabled, a firmware image is
needed for
the R5F core(s) to trigger the system reset. One possible source is
https://github.com/siemens/k3-rti-wdt.
+rockchip-tpl:
+An external TPL is required to initialize DRAM. Get the external TPL
+binary and build with ROCKCHIP_TPL=/path/to/ddr.bin. One possible source
+for the external TPL binary is https://github.com/rockchip-linux/rkbin.
+
tee-os:
See the documentation for your board. You may need to build Open Portable
Trusted Execution Environment (OP-TEE) with TEE=/path/to/tee.bin
diff --git a/tools/binman/test/277_rockchip_tpl.dts
b/tools/binman/test/277_rockchip_tpl.dts
new file mode 100644
index ..269f56e2545c
--- /dev/null
+++ b/tools/binman/test/277_rockchip_tpl.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/dts-v1/;
+
+/ {
Re: [PATCH v2 06/10] rockchip: mtd: raw: rockchip_nfc convert dev_read_addr output to phys_addr_t
On 2023/2/7 22:54, Johan Jonker wrote:
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expext 64-bit data from the device tree parser,
so convert dev_read_addr output to phys_addr_t in the
rockchip_nfc.c file.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/mtd/nand/raw/rockchip_nfc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c
b/drivers/mtd/nand/raw/rockchip_nfc.c
index d016d255..78e2a691 100644
--- a/drivers/mtd/nand/raw/rockchip_nfc.c
+++ b/drivers/mtd/nand/raw/rockchip_nfc.c
@@ -1180,7 +1180,7 @@ static int rk_nfc_probe(struct udevice *dev)
nfc->cfg = (void *)dev_get_driver_data(dev);
nfc->dev = dev;
- nfc->regs = (void *)dev_read_addr(dev);
+ nfc->regs = (void *)((phys_addr_t)dev_read_addr(dev));
if (IS_ERR(nfc->regs)) {
ret = PTR_ERR(nfc->regs);
goto release_nfc;
--
2.20.1
Re: [PATCH v2 10/10] mtd: nand: add support for the Sandisk SDTNQGAMA chip
On 2023/2/7 22:56, Johan Jonker wrote:
Sandisk SDTNQGAMA is a 8GB size, 3.3V 8 bit chip with 16KB page size, 1KB write
size and 40 bit ecc support
Signed-off-by: Paweł Jarosz
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/mtd/nand/raw/nand_ids.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c
index d0cfacc6..22ea5e2f 100644
--- a/drivers/mtd/nand/raw/nand_ids.c
+++ b/drivers/mtd/nand/raw/nand_ids.c
@@ -48,6 +48,9 @@ struct nand_flash_dev nand_flash_ids[] = {
{"TC58NVG6D2 64G 3.3V 8-bit",
{ .id = {0x98, 0xde, 0x94, 0x82, 0x76, 0x56, 0x04, 0x20} },
SZ_8K, SZ_8K, SZ_2M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },
+ {"SDTNQGAMA 64G 3.3V 8-bit",
+ { .id = {0x45, 0xde, 0x94, 0x93, 0x76, 0x57} },
+ SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) },
{"SDTNRGAMA 64G 3.3V 8-bit",
{ .id = {0x45, 0xde, 0x94, 0x93, 0x76, 0x50} },
SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) },
--
2.20.1
Re: [PATCH v2 09/10] mtd: nand: raw: rockchip_nfc: add flash_node to chip stucture
On 2023/2/7 22:55, Johan Jonker wrote: Add flash_node to the rockchip_nfc driver chip stucture in order to find the partitions in the add_mtd_partitions_of() functions. Signed-off-by: Johan Jonker Reviewed-by: Kever Yang Thanks, - Kever --- drivers/mtd/nand/raw/rockchip_nfc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c b/drivers/mtd/nand/raw/rockchip_nfc.c index 5e2b8346..9e3a2533 100644 --- a/drivers/mtd/nand/raw/rockchip_nfc.c +++ b/drivers/mtd/nand/raw/rockchip_nfc.c @@ -934,6 +934,7 @@ static int rk_nfc_nand_chip_init(ofnode node, struct rk_nfc *nfc, int devnum) nand_set_controller_data(chip, nfc); + chip->flash_node = node; chip->chip_delay = NFC_RB_DELAY_US; chip->select_chip = rk_nfc_select_chip; chip->cmd_ctrl = rk_nfc_cmd; -- 2.20.1
Re: [PATCH v2 08/10] mtd: nand: raw: rockchip_nfc: add layout structure
On 2023/2/7 22:54, Johan Jonker wrote:
The MTD framework in U-boot is not identical for drivers ported
from Linux. The rockchip_nfc driver was ported with OOB ops functions
while the framework expects a layout structure per chip.
Fix by adding a structure with OOB data and remove unused functions.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/mtd/nand/raw/rockchip_nfc.c | 61 ++---
1 file changed, 20 insertions(+), 41 deletions(-)
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c
b/drivers/mtd/nand/raw/rockchip_nfc.c
index 3809702e..5e2b8346 100644
--- a/drivers/mtd/nand/raw/rockchip_nfc.c
+++ b/drivers/mtd/nand/raw/rockchip_nfc.c
@@ -814,47 +814,9 @@ static void rk_nfc_disable_clks(struct rk_nfc *nfc)
clk_disable_unprepare(nfc->ahb_clk);
}
-static int rk_nfc_ooblayout_free(struct mtd_info *mtd, int section,
-struct mtd_oob_region *oob_region)
-{
- struct nand_chip *chip = mtd_to_nand(mtd);
- struct rk_nfc_nand_chip *rknand = rk_nfc_to_rknand(chip);
-
- if (section)
- return -ERANGE;
-
- /*
-* The beginning of the OOB area stores the reserved data for the NFC,
-* the size of the reserved data is NFC_SYS_DATA_SIZE bytes.
-*/
- oob_region->length = rknand->metadata_size - NFC_SYS_DATA_SIZE - 2;
- oob_region->offset = NFC_SYS_DATA_SIZE + 2;
-
- return 0;
-}
-
-static int rk_nfc_ooblayout_ecc(struct mtd_info *mtd, int section,
- struct mtd_oob_region *oob_region)
-{
- struct nand_chip *chip = mtd_to_nand(mtd);
- struct rk_nfc_nand_chip *rknand = rk_nfc_to_rknand(chip);
-
- if (section)
- return -ERANGE;
-
- oob_region->length = mtd->oobsize - rknand->metadata_size;
- oob_region->offset = rknand->metadata_size;
-
- return 0;
-}
-
-static const struct mtd_ooblayout_ops rk_nfc_ooblayout_ops = {
- .rfree = rk_nfc_ooblayout_free,
- .ecc = rk_nfc_ooblayout_ecc,
-};
-
static int rk_nfc_ecc_init(struct rk_nfc *nfc, struct nand_chip *chip)
{
+ struct rk_nfc_nand_chip *rknand = rk_nfc_to_rknand(chip);
const u8 *strengths = nfc->cfg->ecc_strengths;
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_ecc_ctrl *ecc = >ecc;
@@ -892,6 +854,21 @@ static int rk_nfc_ecc_init(struct rk_nfc *nfc, struct
nand_chip *chip)
ecc->steps = mtd->writesize / ecc->size;
ecc->bytes = DIV_ROUND_UP(ecc->strength * fls(8 * chip->ecc.size), 8);
+ if (ecc->bytes * ecc->steps > mtd->oobsize - rknand->metadata_size)
+ return -EINVAL;
+
+ ecc->layout = kzalloc(sizeof(*ecc->layout), GFP_KERNEL);
+ if (!ecc->layout)
+ return -ENOMEM;
+
+ ecc->layout->eccbytes = ecc->bytes * ecc->steps;
+
+ for (i = 0; i < ecc->layout->eccbytes; i++)
+ ecc->layout->eccpos[i] = rknand->metadata_size + i;
+
+ ecc->layout->oobfree[0].length = rknand->metadata_size -
NFC_SYS_DATA_SIZE - 2;
+ ecc->layout->oobfree[0].offset = NFC_SYS_DATA_SIZE + 2;
+
return 0;
}
@@ -969,7 +946,6 @@ static int rk_nfc_nand_chip_init(ofnode node, struct rk_nfc
*nfc, int devnum)
chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;
chip->options |= NAND_NO_SUBPAGE_WRITE | NAND_USE_BOUNCE_BUFFER;
- mtd_set_ooblayout(mtd, _nfc_ooblayout_ops);
rk_nfc_hw_init(nfc);
ret = nand_scan_ident(mtd, nsels, NULL);
if (ret)
@@ -998,13 +974,16 @@ static int rk_nfc_nand_chip_init(ofnode node, struct
rk_nfc *nfc, int devnum)
if (!nfc->page_buf) {
nfc->page_buf = kzalloc(NFC_MAX_PAGE_SIZE, GFP_KERNEL);
- if (!nfc->page_buf)
+ if (!nfc->page_buf) {
+ kfree(ecc->layout);
return -ENOMEM;
+ }
}
if (!nfc->oob_buf) {
nfc->oob_buf = kzalloc(NFC_MAX_OOB_SIZE, GFP_KERNEL);
if (!nfc->oob_buf) {
+ kfree(ecc->layout);
kfree(nfc->page_buf);
nfc->page_buf = NULL;
return -ENOMEM;
--
2.20.1
Re: [PATCH v2 07/10] mtd: nand: raw: rockchip_nfc: remove the compatible string "rockchip,rk3308-nfc"
On 2023/2/7 22:54, Johan Jonker wrote:
The compatible string for rk3308 has as fallback string "rockchip,rv1108-nfc".
As there is no logic in probe priority between the SoC orientated string
and the fall back, so remove the compatible string "rockchip,rk3308-nfc"
from the driver.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/mtd/nand/raw/rockchip_nfc.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c
b/drivers/mtd/nand/raw/rockchip_nfc.c
index 78e2a691..3809702e 100644
--- a/drivers/mtd/nand/raw/rockchip_nfc.c
+++ b/drivers/mtd/nand/raw/rockchip_nfc.c
@@ -1165,10 +1165,6 @@ static const struct udevice_id rk_nfc_id_table[] = {
.compatible = "rockchip,rv1108-nfc",
.data = (unsigned long)_v8_cfg
},
- {
- .compatible = "rockchip,rk3308-nfc",
- .data = (unsigned long)_v8_cfg
- },
{ /* sentinel */ }
};
--
2.20.1
Re: [PATCH v2 05/10] rockchip: timer: dw-apb-timer: convert dev_read_addr output to phys_addr_t
On 2023/2/7 22:53, Johan Jonker wrote:
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so convert dev_read_addr output to phys_addr_t in the
dw-apb-timer.c file.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/timer/dw-apb-timer.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/timer/dw-apb-timer.c b/drivers/timer/dw-apb-timer.c
index 10f0a9f6..f55a3c54 100644
--- a/drivers/timer/dw-apb-timer.c
+++ b/drivers/timer/dw-apb-timer.c
@@ -23,7 +23,7 @@
#define DW_APB_CTRL 0x8
struct dw_apb_timer_priv {
- fdt_addr_t regs;
+ phys_addr_t regs;
struct reset_ctl_bulk resets;
};
@@ -92,7 +92,7 @@ static int dw_apb_timer_of_to_plat(struct udevice *dev)
if (CONFIG_IS_ENABLED(OF_REAL)) {
struct dw_apb_timer_priv *priv = dev_get_priv(dev);
- priv->regs = dev_read_addr(dev);
+ priv->regs = (phys_addr_t)dev_read_addr(dev);
}
return 0;
--
2.20.1
Re: [PATCH v2 04/10] rockchip: adc: rockchip-saradc: convert dev_read_addr output to phys_addr_t
On 2023/2/7 22:53, Johan Jonker wrote:
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expext 64-bit data from the device tree parser,
so convert dev_read_addr output to phys_addr_t in the
rockchip-saradc.c file.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/adc/rockchip-saradc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/adc/rockchip-saradc.c b/drivers/adc/rockchip-saradc.c
index 760f8fe6..1ba7c483 100644
--- a/drivers/adc/rockchip-saradc.c
+++ b/drivers/adc/rockchip-saradc.c
@@ -145,7 +145,7 @@ int rockchip_saradc_of_to_plat(struct udevice *dev)
struct rockchip_saradc_data *data;
data = (struct rockchip_saradc_data *)dev_get_driver_data(dev);
- priv->regs = (struct rockchip_saradc_regs *)dev_read_addr(dev);
+ priv->regs = (struct rockchip_saradc_regs
*)((phys_addr_t)dev_read_addr(dev));
if (priv->regs == (struct rockchip_saradc_regs *)FDT_ADDR_T_NONE) {
pr_err("Dev: %s - can't get address!", dev->name);
return -ENODATA;
--
2.20.1
Re: [PATCH v2 03/10] core: remap: convert regmap_init_mem_plat() input to phys_addr_t
On 2023/2/7 22:52, Johan Jonker wrote:
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so convert regmap_init_mem_plat() input to phys_addr_t in files
that use this function.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/core/regmap.c | 2 +-
drivers/core/syscon-uclass.c| 2 +-
drivers/ram/rockchip/sdram_rk3066.c | 2 +-
drivers/ram/rockchip/sdram_rk3188.c | 2 +-
drivers/ram/rockchip/sdram_rk322x.c | 2 +-
drivers/ram/rockchip/sdram_rk3288.c | 2 +-
drivers/ram/rockchip/sdram_rk3328.c | 2 +-
drivers/ram/rockchip/sdram_rk3399.c | 2 +-
include/regmap.h| 2 +-
9 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index e33bb9d7..37da64b2 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -79,7 +79,7 @@ static struct regmap *regmap_alloc(int count)
}
#if CONFIG_IS_ENABLED(OF_PLATDATA)
-int regmap_init_mem_plat(struct udevice *dev, fdt_val_t *reg, int count,
+int regmap_init_mem_plat(struct udevice *dev, phys_addr_t *reg, int count,
struct regmap **mapp)
{
struct regmap_range *range;
diff --git a/drivers/core/syscon-uclass.c b/drivers/core/syscon-uclass.c
index 25fdb66e..69b66773 100644
--- a/drivers/core/syscon-uclass.c
+++ b/drivers/core/syscon-uclass.c
@@ -58,7 +58,7 @@ static int syscon_pre_probe(struct udevice *dev)
#if CONFIG_IS_ENABLED(OF_PLATDATA)
struct syscon_base_plat *plat = dev_get_plat(dev);
- return regmap_init_mem_plat(dev, plat->reg, ARRAY_SIZE(plat->reg),
+ return regmap_init_mem_plat(dev, (phys_addr_t *)plat->reg,
ARRAY_SIZE(plat->reg),
>regmap);
#else
return regmap_init_mem(dev_ofnode(dev), >regmap);
diff --git a/drivers/ram/rockchip/sdram_rk3066.c
b/drivers/ram/rockchip/sdram_rk3066.c
index a2425f22..9bb26b64 100644
--- a/drivers/ram/rockchip/sdram_rk3066.c
+++ b/drivers/ram/rockchip/sdram_rk3066.c
@@ -801,7 +801,7 @@ static int rk3066_dmc_conv_of_plat(struct udevice *dev)
memcpy(>base, of_plat->rockchip_sdram_params, sizeof(plat->base));
/* RK3066 supports dual-channel, set default channel num to 2. */
plat->num_channels = 1;
- ret = regmap_init_mem_plat(dev, of_plat->reg,
+ ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg,
ARRAY_SIZE(of_plat->reg) / 2, >map);
if (ret)
return ret;
diff --git a/drivers/ram/rockchip/sdram_rk3188.c
b/drivers/ram/rockchip/sdram_rk3188.c
index 272b1b2d..1838985c 100644
--- a/drivers/ram/rockchip/sdram_rk3188.c
+++ b/drivers/ram/rockchip/sdram_rk3188.c
@@ -867,7 +867,7 @@ static int conv_of_plat(struct udevice *dev)
memcpy(>base, of_plat->rockchip_sdram_params, sizeof(plat->base));
/* rk3188 supports dual-channel, set default channel num to 2 */
plat->num_channels = 1;
- ret = regmap_init_mem_plat(dev, of_plat->reg,
+ ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg,
ARRAY_SIZE(of_plat->reg) / 2, >map);
if (ret)
return ret;
diff --git a/drivers/ram/rockchip/sdram_rk322x.c
b/drivers/ram/rockchip/sdram_rk322x.c
index 1b204fb5..33599dc5 100644
--- a/drivers/ram/rockchip/sdram_rk322x.c
+++ b/drivers/ram/rockchip/sdram_rk322x.c
@@ -769,7 +769,7 @@ static int conv_of_plat(struct udevice *dev)
memcpy(>base, of_plat->rockchip_sdram_params, sizeof(plat->base));
plat->num_channels = 1;
- ret = regmap_init_mem_plat(dev, of_plat->reg,
+ ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg,
ARRAY_SIZE(of_plat->reg) / 2, >map);
if (ret)
return ret;
diff --git a/drivers/ram/rockchip/sdram_rk3288.c
b/drivers/ram/rockchip/sdram_rk3288.c
index 83778ad1..1a548da5 100644
--- a/drivers/ram/rockchip/sdram_rk3288.c
+++ b/drivers/ram/rockchip/sdram_rk3288.c
@@ -1029,7 +1029,7 @@ static int conv_of_plat(struct udevice *dev)
memcpy(>base, of_plat->rockchip_sdram_params, sizeof(plat->base));
/* Rk3288 supports dual-channel, set default channel num to 2 */
plat->num_channels = 2;
- ret = regmap_init_mem_plat(dev, of_plat->reg,
+ ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg,
ARRAY_SIZE(of_plat->reg) / 2, >map);
if (ret)
return ret;
diff --git a/drivers/ram/rockchip/sdram_rk3328.c
b/drivers/ram/rockchip/sdram_rk3328.c
index b511c6bf..2427efe0 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -54,7 +54,7 @@ static int conv_of_plat(struct udevice *dev)
struct dtd_rockchip_rk3328_dmc *dtplat = >dtplat;
int ret;
- ret = regmap_init_mem_plat(dev, dtplat->reg,
+
Re: [PATCH v2 02/10] include: dm: ofnode: fix headers
On 2023/2/7 22:52, Johan Jonker wrote: When fdt_addr_t and phys_addr_t are split it turns out that the header don't match the functions, so fix the headers. Signed-off-by: Johan Jonker Reviewed-by: Simon Glass Reviewed-by: Kever Yang Thanks, - Kever --- include/dm/ofnode.h | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index fa986560..287b0c35 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -678,8 +678,8 @@ int ofnode_read_size(ofnode node, const char *propname); * @size: Pointer to size of the address * Return: address, or FDT_ADDR_T_NONE if not present or invalid */ -phys_addr_t ofnode_get_addr_size_index(ofnode node, int index, - fdt_size_t *size); +fdt_addr_t ofnode_get_addr_size_index(ofnode node, int index, + fdt_size_t *size); /** * ofnode_get_addr_size_index_notrans() - get an address/size from a node @@ -695,8 +695,8 @@ phys_addr_t ofnode_get_addr_size_index(ofnode node, int index, * @size: Pointer to size of the address * Return: address, or FDT_ADDR_T_NONE if not present or invalid */ -phys_addr_t ofnode_get_addr_size_index_notrans(ofnode node, int index, - fdt_size_t *size); +fdt_addr_t ofnode_get_addr_size_index_notrans(ofnode node, int index, + fdt_size_t *size); /** * ofnode_get_addr_index() - get an address from a node @@ -707,7 +707,7 @@ phys_addr_t ofnode_get_addr_size_index_notrans(ofnode node, int index, * @index: Index of address to read (0 for first) * Return: address, or FDT_ADDR_T_NONE if not present or invalid */ -phys_addr_t ofnode_get_addr_index(ofnode node, int index); +fdt_addr_t ofnode_get_addr_index(ofnode node, int index); /** * ofnode_get_addr() - get an address from a node @@ -717,7 +717,7 @@ phys_addr_t ofnode_get_addr_index(ofnode node, int index); * @node: node to read from * Return: address, or FDT_ADDR_T_NONE if not present or invalid */ -phys_addr_t ofnode_get_addr(ofnode node); +fdt_addr_t ofnode_get_addr(ofnode node); /** * ofnode_get_size() - get size from a node @@ -1055,8 +1055,8 @@ const void *ofprop_get_property(const struct ofprop *prop, * @sizep: place to put size value (on success) * Return: address value, or FDT_ADDR_T_NONE on error */ -phys_addr_t ofnode_get_addr_size(ofnode node, const char *propname, -phys_size_t *sizep); +fdt_addr_t ofnode_get_addr_size(ofnode node, const char *propname, + fdt_size_t *sizep); /** * ofnode_read_u8_array_ptr() - find an 8-bit array -- 2.20.1
Re: [PATCH v2 01/10] include: fdtdec: decouple fdt_addr_t and phys_addr_t size
On 2023/2/7 22:51, Johan Jonker wrote: The DT specification supports CPUs with both 32-bit and 64-bit addressing capabilities. In U-boot the fdt_addr_t and phys_addr_t size are coupled by a typedef. The MTD NAND drivers for 32-bit CPU's can describe partitions with a 64-bit reg property. These partitions synced from Linux end up with the wrong offset and sizes when only the lower 32-bit is passed. Decouple the fdt_addr_t and phys_addr_t size as they don't necessary match. Signed-off-by: Johan Jonker Reviewed-by: Simon Glass Reviewed-by: Kever Yang Thanks, - Kever --- Changed V2: reword --- Note: Most drivers still assume that FDT and CPU capabilities are identical. In order to use these variables a cast is needed. --- Kconfig | 8 include/fdtdec.h | 13 + 2 files changed, 17 insertions(+), 4 deletions(-) diff --git a/Kconfig b/Kconfig index a75cce7e..7697dade 100644 --- a/Kconfig +++ b/Kconfig @@ -422,11 +422,19 @@ endif # EXPERT config PHYS_64BIT bool "64bit physical address support" + select FDT_64BIT help Say Y here to support 64bit physical memory address. This can be used not only for 64bit SoCs, but also for large physical address extension on 32bit SoCs. +config FDT_64BIT + bool "64bit fdt address support" + help + Say Y here to support 64bit fdt addresses. + This can be used not only for 64bit SoCs, but also + for large address extensions on 32bit SoCs. + config HAS_ROM bool select BINMAN diff --git a/include/fdtdec.h b/include/fdtdec.h index 12355afd..af29ac0c 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -18,15 +18,18 @@ #include /* - * A typedef for a physical address. Note that fdt data is always big + * Support for 64bit fdt addresses. + * This can be used not only for 64bit SoCs, but also + * for large address extensions on 32bit SoCs. + * Note that fdt data is always big * endian even on a litle endian machine. */ -typedef phys_addr_t fdt_addr_t; -typedef phys_size_t fdt_size_t; #define FDT_SIZE_T_NONE (-1U) -#ifdef CONFIG_PHYS_64BIT +#ifdef CONFIG_FDT_64BIT +typedef u64 fdt_addr_t; +typedef u64 fdt_size_t; #define FDT_ADDR_T_NONE ((ulong)(-1)) #define fdt_addr_to_cpu(reg) be64_to_cpu(reg) @@ -35,6 +38,8 @@ typedef phys_size_t fdt_size_t; #define cpu_to_fdt_size(reg) cpu_to_be64(reg) typedef fdt64_t fdt_val_t; #else +typedef u32 fdt_addr_t; +typedef u32 fdt_size_t; #define FDT_ADDR_T_NONE (-1U) #define fdt_addr_to_cpu(reg) be32_to_cpu(reg) -- 2.20.1
Re: [PATCH v2 00/17] Basic StarFive JH7110 RISC-V SoC support
On 2023/1/22 5:56, Sean Anderson wrote: > On 1/21/23 16:36, Conor Dooley wrote: >> On Wed, Jan 18, 2023 at 04:11:15PM +0800, Yanhong Wang wrote: >>> This series of patches base on the latest branch/master, and add support >>> for the StarFive JH7110 RISC-V SoC and VisionFive V2 board. In order for >>> this to be achieved, the respective DT nodes have been added, and the >>> required defconfigs have been added to the boards' defconfig. What is more, >>> the basic required DM drivers have been added, such as reset, clock, >>> pinctrl, >>> uart, ram etc. >>> >>> Note that the register base address of reset controller is same with the >>> clock controller. Therefore, there is no device tree node alone for reset >>> driver. It binds device node in the clock driver. >>> >>> The u-boot-spl and u-boot has been tested on the VisionFive V2 boards which >>> equip with JH7110 SoC and works normally. >>> >>> For more information and support, you can visit RVspace wiki[1]. >>> >>> [1] https://wiki.rvspace.org/ >>> >>> Changes in v2: >>> - Renamed file 'jh7110-regs.h' to 'regs.h'. >>> - Reworded the clear L2 LIM memory code in C. >>> - Removed flash init call in 'spl_soc_init' function. >>> - Reworded the clock driver. >>> - Rename the macro 'SET_DIV' to 'ASSIGNED_CLOCK_PARENTS' in 'spl.c'. >>> - Moved the device tree node 'dmc@1570' from 'jh7110-u-boot.dtsi' to >>> 'starfive_visionfive2-u-boot.dtsi'. >>> >>> Previous versions: >>> v1 - >>> https://patchwork.ozlabs.org/project/uboot/cover/20221212025020.23778-1-yanhong.w...@starfivetech.com/ >>> >>> Jianlong Huang (1): >>> dt-bindings: pinctrl: Add StarFive JH7110 pinctrl definitions >>> >>> Kuan Lim Lee (1): >>> pinctrl: starfive: Add StarFive JH7110 driver >>> >>> Yanhong Wang (15): >>> riscv: cpu: jh7110: Add support for jh7110 SoC >>> cache: starfive: Add StarFive JH7110 support >>> dt-bindings: reset: Add StarFive JH7110 reset definitions >>> reset: starfive: jh7110: Add reset driver for StarFive JH7110 SoC >>> dt-bindings: clock: Add StarFive JH7110 clock definitions >>> clk: starfive: Add StarFive JH7110 clock driver >>> ram: starfive: add ddr driver >>> board: starfive: add StarFive VisionFive v2 board support >>> riscv: cpu: jh7110: Add Kconfig for StarFive JH7110 SoC >>> board: starfive: Add Kconfig for StarFive VisionFive v2 Board >>> board: starfive: Add TARGET_STARFIVE_VISIONFIVE2 to Kconfig >>> riscv: dts: jh7110: Add initial StarFive JH7110 device tree >>> riscv: dts: jh7110: Add initial u-boot device tree >>> riscv: dts: jh7110: Add initial StarFive VisionFive v2 board device >>> tree >>> configs: starfive: add starfive_visionfive2_defconfig >> >> Apologies if I have missed it somewhere - but where is patch 12? >> I don't see it on lore.kernel.org nor in my inbox :( >> >> Thanks, >> Conor. >> > > https://lore.kernel.org/all/20230118082907.31629-1-yanhong.w...@starfivetech.com/ > > Not sure why it isn't with the rest of the series. > It was reported send fail when sending patch 12, so it was sent separately later > --Sean
Re: [PATCH v2 06/10] rockchip: mtd: raw: rockchip_nfc convert dev_read_addr output to phys_addr_t
Hi Johan
On Tue, Feb 7, 2023 at 3:54 PM Johan Jonker wrote:
>
> The fdt_addr_t and phys_addr_t size have been decoupled.
> A 32bit CPU can expext 64-bit data from the device tree parser,
> so convert dev_read_addr output to phys_addr_t in the
> rockchip_nfc.c file.
>
> Signed-off-by: Johan Jonker
> ---
> drivers/mtd/nand/raw/rockchip_nfc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c
> b/drivers/mtd/nand/raw/rockchip_nfc.c
> index d016d255..78e2a691 100644
> --- a/drivers/mtd/nand/raw/rockchip_nfc.c
> +++ b/drivers/mtd/nand/raw/rockchip_nfc.c
> @@ -1180,7 +1180,7 @@ static int rk_nfc_probe(struct udevice *dev)
> nfc->cfg = (void *)dev_get_driver_data(dev);
> nfc->dev = dev;
>
> - nfc->regs = (void *)dev_read_addr(dev);
> + nfc->regs = (void *)((phys_addr_t)dev_read_addr(dev));
Is phy_read_addr_ptr() family supposed to be used in this case?
Michael
> if (IS_ERR(nfc->regs)) {
> ret = PTR_ERR(nfc->regs);
> goto release_nfc;
> --
> 2.20.1
>
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
mich...@amarulasolutions.com
__
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
i...@amarulasolutions.com
www.amarulasolutions.com
Re: [PATCH v2 07/10] mtd: nand: raw: rockchip_nfc: remove the compatible string "rockchip,rk3308-nfc"
Hi Johan
On Tue, Feb 7, 2023 at 3:54 PM Johan Jonker wrote:
>
> The compatible string for rk3308 has as fallback string "rockchip,rv1108-nfc".
> As there is no logic in probe priority between the SoC orientated string
> and the fall back, so remove the compatible string "rockchip,rk3308-nfc"
> from the driver.
>
> Signed-off-by: Johan Jonker
> ---
> drivers/mtd/nand/raw/rockchip_nfc.c | 4
> 1 file changed, 4 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c
> b/drivers/mtd/nand/raw/rockchip_nfc.c
> index 78e2a691..3809702e 100644
> --- a/drivers/mtd/nand/raw/rockchip_nfc.c
> +++ b/drivers/mtd/nand/raw/rockchip_nfc.c
> @@ -1165,10 +1165,6 @@ static const struct udevice_id rk_nfc_id_table[] = {
> .compatible = "rockchip,rv1108-nfc",
> .data = (unsigned long)_v8_cfg
> },
> - {
> - .compatible = "rockchip,rk3308-nfc",
> - .data = (unsigned long)_v8_cfg
> - },
Ok, same on linux
Reviewed-by: Michael Trimarchi
> { /* sentinel */ }
> };
>
> --
> 2.20.1
>
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
mich...@amarulasolutions.com
__
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
i...@amarulasolutions.com
www.amarulasolutions.com
Re: [PATCH v2 17/17] configs: starfive: add starfive_visionfive2_defconfig
On 2023/1/23 22:53, Andreas Schwab wrote: > On Jan 18 2023, Yanhong Wang wrote: > >> This is the initial basic config for StarFive VisionFive v2 board. It >> includes consol, Norflash, sdio, ddr etc. > > Please enable CONFIG_DISTRO_DEFAULTS. > I will enable it. >> +CONFIG_DEFAULT_FDT_FILE="starfive/starfive_visionfive2.dtb" > > That should match the name the kernel is using. I will rename it to match the name the kernel is using. >
Re: [PATCH v2 08/10] mtd: nand: raw: rockchip_nfc: add layout structure
Hi
On Tue, Feb 7, 2023 at 3:55 PM Johan Jonker wrote:
>
> The MTD framework in U-boot is not identical for drivers ported
> from Linux. The rockchip_nfc driver was ported with OOB ops functions
> while the framework expects a layout structure per chip.
> Fix by adding a structure with OOB data and remove unused functions.
>
> Signed-off-by: Johan Jonker
> ---
> drivers/mtd/nand/raw/rockchip_nfc.c | 61 ++---
> 1 file changed, 20 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c
> b/drivers/mtd/nand/raw/rockchip_nfc.c
> index 3809702e..5e2b8346 100644
> --- a/drivers/mtd/nand/raw/rockchip_nfc.c
> +++ b/drivers/mtd/nand/raw/rockchip_nfc.c
> @@ -814,47 +814,9 @@ static void rk_nfc_disable_clks(struct rk_nfc *nfc)
> clk_disable_unprepare(nfc->ahb_clk);
> }
>
> -static int rk_nfc_ooblayout_free(struct mtd_info *mtd, int section,
> -struct mtd_oob_region *oob_region)
> -{
> - struct nand_chip *chip = mtd_to_nand(mtd);
> - struct rk_nfc_nand_chip *rknand = rk_nfc_to_rknand(chip);
> -
> - if (section)
> - return -ERANGE;
> -
> - /*
> -* The beginning of the OOB area stores the reserved data for the NFC,
> -* the size of the reserved data is NFC_SYS_DATA_SIZE bytes.
> -*/
> - oob_region->length = rknand->metadata_size - NFC_SYS_DATA_SIZE - 2;
> - oob_region->offset = NFC_SYS_DATA_SIZE + 2;
> -
> - return 0;
> -}
> -
> -static int rk_nfc_ooblayout_ecc(struct mtd_info *mtd, int section,
> - struct mtd_oob_region *oob_region)
> -{
> - struct nand_chip *chip = mtd_to_nand(mtd);
> - struct rk_nfc_nand_chip *rknand = rk_nfc_to_rknand(chip);
> -
> - if (section)
> - return -ERANGE;
> -
> - oob_region->length = mtd->oobsize - rknand->metadata_size;
> - oob_region->offset = rknand->metadata_size;
> -
> - return 0;
> -}
> -
> -static const struct mtd_ooblayout_ops rk_nfc_ooblayout_ops = {
> - .rfree = rk_nfc_ooblayout_free,
> - .ecc = rk_nfc_ooblayout_ecc,
> -};
> -
> static int rk_nfc_ecc_init(struct rk_nfc *nfc, struct nand_chip *chip)
> {
> + struct rk_nfc_nand_chip *rknand = rk_nfc_to_rknand(chip);
> const u8 *strengths = nfc->cfg->ecc_strengths;
> struct mtd_info *mtd = nand_to_mtd(chip);
> struct nand_ecc_ctrl *ecc = >ecc;
> @@ -892,6 +854,21 @@ static int rk_nfc_ecc_init(struct rk_nfc *nfc, struct
> nand_chip *chip)
> ecc->steps = mtd->writesize / ecc->size;
> ecc->bytes = DIV_ROUND_UP(ecc->strength * fls(8 * chip->ecc.size), 8);
>
> + if (ecc->bytes * ecc->steps > mtd->oobsize - rknand->metadata_size)
> + return -EINVAL;
> +
> + ecc->layout = kzalloc(sizeof(*ecc->layout), GFP_KERNEL);
> + if (!ecc->layout)
> + return -ENOMEM;
> +
> + ecc->layout->eccbytes = ecc->bytes * ecc->steps;
> +
> + for (i = 0; i < ecc->layout->eccbytes; i++)
> + ecc->layout->eccpos[i] = rknand->metadata_size + i;
> +
> + ecc->layout->oobfree[0].length = rknand->metadata_size -
> NFC_SYS_DATA_SIZE - 2;
> + ecc->layout->oobfree[0].offset = NFC_SYS_DATA_SIZE + 2;
> +
> return 0;
> }
>
> @@ -969,7 +946,6 @@ static int rk_nfc_nand_chip_init(ofnode node, struct
> rk_nfc *nfc, int devnum)
> chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;
> chip->options |= NAND_NO_SUBPAGE_WRITE | NAND_USE_BOUNCE_BUFFER;
>
> - mtd_set_ooblayout(mtd, _nfc_ooblayout_ops);
> rk_nfc_hw_init(nfc);
> ret = nand_scan_ident(mtd, nsels, NULL);
> if (ret)
> @@ -998,13 +974,16 @@ static int rk_nfc_nand_chip_init(ofnode node, struct
> rk_nfc *nfc, int devnum)
>
> if (!nfc->page_buf) {
> nfc->page_buf = kzalloc(NFC_MAX_PAGE_SIZE, GFP_KERNEL);
> - if (!nfc->page_buf)
> + if (!nfc->page_buf) {
> + kfree(ecc->layout);
> return -ENOMEM;
> + }
> }
>
> if (!nfc->oob_buf) {
> nfc->oob_buf = kzalloc(NFC_MAX_OOB_SIZE, GFP_KERNEL);
> if (!nfc->oob_buf) {
> + kfree(ecc->layout);
> kfree(nfc->page_buf);
> nfc->page_buf = NULL;
> return -ENOMEM;
> --
> 2.20.1
>
Reviewed-by: Michael Trimarchi
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
mich...@amarulasolutions.com
__
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
i...@amarulasolutions.com
www.amarulasolutions.com
Re: [PATCH v2 09/10] mtd: nand: raw: rockchip_nfc: add flash_node to chip stucture
Hi On Tue, Feb 7, 2023 at 3:55 PM Johan Jonker wrote: > > Add flash_node to the rockchip_nfc driver chip stucture in order > to find the partitions in the add_mtd_partitions_of() functions. > > Signed-off-by: Johan Jonker > --- > drivers/mtd/nand/raw/rockchip_nfc.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c > b/drivers/mtd/nand/raw/rockchip_nfc.c > index 5e2b8346..9e3a2533 100644 > --- a/drivers/mtd/nand/raw/rockchip_nfc.c > +++ b/drivers/mtd/nand/raw/rockchip_nfc.c > @@ -934,6 +934,7 @@ static int rk_nfc_nand_chip_init(ofnode node, struct > rk_nfc *nfc, int devnum) > > nand_set_controller_data(chip, nfc); > > + chip->flash_node = node; > chip->chip_delay = NFC_RB_DELAY_US; > chip->select_chip = rk_nfc_select_chip; > chip->cmd_ctrl = rk_nfc_cmd; > -- > 2.20.1 > Reviewed-by: Michael Trimarchi -- Michael Nazzareno Trimarchi Co-Founder & Chief Executive Officer M. +39 347 913 2170 mich...@amarulasolutions.com __ Amarula Solutions BV Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 9172 i...@amarulasolutions.com www.amarulasolutions.com
Re: [PATCH 3/3] mmc: mv_sdhci: Depend on DM_MMC
On 2/10/23 21:23, Stefan Roese wrote:
> All build targets using this driver already use DM_MMC. So let's depend
> this driver on this Kconfig symbol and remove the non-DM driver part.
>
> Signed-off-by: Stefan Roese
> Cc: Tom Rini
> Cc: Simon Glass
> Cc: Peng Fan
> Cc: Jaehoon Chung
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
> drivers/mmc/Kconfig| 1 +
> drivers/mmc/mv_sdhci.c | 39 +++
> 2 files changed, 8 insertions(+), 32 deletions(-)
>
> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
> index 878f867c627b..3f5f61503fb6 100644
> --- a/drivers/mmc/Kconfig
> +++ b/drivers/mmc/Kconfig
> @@ -621,6 +621,7 @@ config MMC_SDHCI_MV
> bool "SDHCI support on Marvell platform"
> depends on ARCH_MVEBU
> depends on MMC_SDHCI
> + depends on DM_MMC
> help
> This selects the Secure Digital Host Controller Interface on
> Marvell platform.
> diff --git a/drivers/mmc/mv_sdhci.c b/drivers/mmc/mv_sdhci.c
> index 42fa735f3160..dbdd671c88bc 100644
> --- a/drivers/mmc/mv_sdhci.c
> +++ b/drivers/mmc/mv_sdhci.c
> @@ -15,6 +15,13 @@
> #define SDHCI_WINDOW_CTRL(win) (0x4080 + ((win) << 4))
> #define SDHCI_WINDOW_BASE(win) (0x4084 + ((win) << 4))
>
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +struct mv_sdhci_plat {
> + struct mmc_config cfg;
> + struct mmc mmc;
> +};
> +
> static void sdhci_mvebu_mbus_config(void __iomem *base)
> {
> const struct mbus_dram_target_info *dram;
> @@ -40,37 +47,6 @@ static void sdhci_mvebu_mbus_config(void __iomem *base)
> }
> }
>
> -#ifndef CONFIG_DM_MMC
> -
> -int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks)
> -{
> - struct sdhci_host *host = NULL;
> - host = calloc(1, sizeof(*host));
> - if (!host) {
> - printf("sdh_host malloc fail!\n");
> - return -ENOMEM;
> - }
> -
> - host->name = MVSDH_NAME;
> - host->ioaddr = (void *)regbase;
> - host->quirks = quirks;
> - host->max_clk = max_clk;
> -
> - /* Configure SDHCI MBUS mbus bridge windows */
> - sdhci_mvebu_mbus_config((void __iomem *)regbase);
> -
> - return add_sdhci(host, 0, min_clk);
> -}
> -
> -#else
> -
> -DECLARE_GLOBAL_DATA_PTR;
> -
> -struct mv_sdhci_plat {
> - struct mmc_config cfg;
> - struct mmc mmc;
> -};
> -
> static int mv_sdhci_probe(struct udevice *dev)
> {
> struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
> @@ -123,4 +99,3 @@ U_BOOT_DRIVER(mv_sdhci_drv) = {
> .priv_auto = sizeof(struct sdhci_host),
> .plat_auto = sizeof(struct mv_sdhci_plat),
> };
> -#endif /* CONFIG_DM_MMC */
Re: [PATCH 2/3] mmc: mv_sdhci: Remove CONFIG_MMC_SDHCI_IO_ACCESSORS support
On 2/10/23 21:23, Stefan Roese wrote:
> CONFIG_MMC_SDHCI_IO_ACCESSORS is not supported and/or used by this
> driver so let's remove these unused parts completely.
>
> Signed-off-by: Stefan Roese
> Cc: Tom Rini
> Cc: Simon Glass
> Cc: Peng Fan
> Cc: Jaehoon Chung
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
> drivers/mmc/mv_sdhci.c | 8
> 1 file changed, 8 deletions(-)
>
> diff --git a/drivers/mmc/mv_sdhci.c b/drivers/mmc/mv_sdhci.c
> index 50d03b703ed7..42fa735f3160 100644
> --- a/drivers/mmc/mv_sdhci.c
> +++ b/drivers/mmc/mv_sdhci.c
> @@ -42,10 +42,6 @@ static void sdhci_mvebu_mbus_config(void __iomem *base)
>
> #ifndef CONFIG_DM_MMC
>
> -#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
> -static struct sdhci_ops mv_ops;
> -#endif /* CONFIG_MMC_SDHCI_IO_ACCESSORS */
> -
> int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks)
> {
> struct sdhci_host *host = NULL;
> @@ -59,10 +55,6 @@ int mv_sdh_init(unsigned long regbase, u32 max_clk, u32
> min_clk, u32 quirks)
> host->ioaddr = (void *)regbase;
> host->quirks = quirks;
> host->max_clk = max_clk;
> -#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
> - memset(_ops, 0, sizeof(struct sdhci_ops));
> - host->ops = _ops;
> -#endif
>
> /* Configure SDHCI MBUS mbus bridge windows */
> sdhci_mvebu_mbus_config((void __iomem *)regbase);
Re: [PATCH 1/3] mmc: mv_sdhci: Simplify call to sdhci_mvebu_mbus_config()
On 2/10/23 21:23, Stefan Roese wrote:
> This driver already depends on CONFIG_ARCH_MVEBU, so there is no need
> to have some checks for this Kconfig symbol in the driver itself. Let's
> remove these superfluous checks.
>
> Signed-off-by: Stefan Roese
> Cc: Tom Rini
> Cc: Simon Glass
> Cc: Peng Fan
> Cc: Jaehoon Chung
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
> drivers/mmc/mv_sdhci.c | 12
> 1 file changed, 4 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/mmc/mv_sdhci.c b/drivers/mmc/mv_sdhci.c
> index 336ebf141026..50d03b703ed7 100644
> --- a/drivers/mmc/mv_sdhci.c
> +++ b/drivers/mmc/mv_sdhci.c
> @@ -64,10 +64,8 @@ int mv_sdh_init(unsigned long regbase, u32 max_clk, u32
> min_clk, u32 quirks)
> host->ops = _ops;
> #endif
>
> - if (CONFIG_IS_ENABLED(ARCH_MVEBU)) {
> - /* Configure SDHCI MBUS mbus bridge windows */
> - sdhci_mvebu_mbus_config((void __iomem *)regbase);
> - }
> + /* Configure SDHCI MBUS mbus bridge windows */
> + sdhci_mvebu_mbus_config((void __iomem *)regbase);
>
> return add_sdhci(host, 0, min_clk);
> }
> @@ -103,10 +101,8 @@ static int mv_sdhci_probe(struct udevice *dev)
> if (ret)
> return ret;
>
> - if (CONFIG_IS_ENABLED(ARCH_MVEBU)) {
> - /* Configure SDHCI MBUS mbus bridge windows */
> - sdhci_mvebu_mbus_config(host->ioaddr);
> - }
> + /* Configure SDHCI MBUS mbus bridge windows */
> + sdhci_mvebu_mbus_config(host->ioaddr);
>
> upriv->mmc = host->mmc;
>
Re: [PATCH 08/13] mvebu: Drop empty arch_misc_init
On 2/16/23 04:36, Tom Rini wrote:
If this hooks is needed later, it should be added and populated for
real.
Cc: Stefan Roese
Signed-off-by: Tom Rini
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
arch/arm/mach-mvebu/Kconfig | 1 -
arch/arm/mach-mvebu/cpu.c | 11 ---
2 files changed, 12 deletions(-)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 16c5e7229550..6a8bf39f86b1 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -5,7 +5,6 @@ config HAVE_MVEBU_EFUSE
config ARMADA_32BIT
bool
- select ARCH_MISC_INIT
select BOARD_EARLY_INIT_F
select CPU_V7A
select SPL_DM if SPL
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 329d13691f0e..1d14e2eca596 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -514,17 +514,6 @@ u32 mvebu_get_nand_clock(void)
NAND_ECC_DIVCKL_RATIO_MASK) >> NAND_ECC_DIVCKL_RATIO_OFFS);
}
-/*
- * SOC specific misc init
- */
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
- /* Nothing yet, perhaps we need something here later */
- return 0;
-}
-#endif /* CONFIG_ARCH_MISC_INIT */
-
#if defined(CONFIG_MMC_SDHCI_MV) && !defined(CONFIG_DM_MMC)
int board_mmc_init(struct bd_info *bis)
{
Viele Grüße,
Stefan Roese
--
DENX Software Engineering GmbH, Managing Director: Erika Unter
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH 02/13] arm: mvebu: Add select on ARCH_EARLY_INIT_R if ARM64
On 2/16/23 04:36, Tom Rini wrote: We need to be calling arch_early_init_r() on 64bit mvebu platforms, so move this to a select. Cc: Stefan Roese Signed-off-by: Tom Rini Reviewed-by: Stefan Roese Thanks, Stefan --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index bd7fffcce0ba..724cbdde257c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -588,6 +588,7 @@ config ARCH_KIRKWOOD config ARCH_MVEBU bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)" + select ARCH_EARLY_INIT_R if ARM64 select DM select DM_SERIAL select DM_SPI Viele Grüße, Stefan Roese -- DENX Software Engineering GmbH, Managing Director: Erika Unter HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH v2 16/17] riscv: dts: jh7110: Add initial StarFive VisionFive v2 board device tree
On 2023/1/22 2:46, Sean Anderson wrote:
> On 1/18/23 03:11, Yanhong Wang wrote:
>> Add initial device tree for StarFive VisionFive v2 board.
>>
>> Signed-off-by: Yanhong Wang
>> ---
>> arch/riscv/dts/Makefile | 2 +-
>> .../dts/starfive_visionfive2-u-boot.dtsi | 84 +++
>> arch/riscv/dts/starfive_visionfive2.dts | 234 ++
>> 3 files changed, 319 insertions(+), 1 deletion(-)
>> create mode 100644 arch/riscv/dts/starfive_visionfive2-u-boot.dtsi
>> create mode 100644 arch/riscv/dts/starfive_visionfive2.dts
>>
>> diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
>> index 5c15a0f303..0351cc0c38 100644
>> --- a/arch/riscv/dts/Makefile
>> +++ b/arch/riscv/dts/Makefile
>> @@ -7,7 +7,7 @@ dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) +=
>> openpiton-riscv64.dtb
>> dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb
>> dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb
>> dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
>> -
>> +dtb-$(CONFIG_TARGET_STARFIVE_VISIONFIVE2) += starfive_visionfive2.dtb
>> include $(srctree)/scripts/Makefile.dts
>> targets += $(dtb-y)
>> diff --git a/arch/riscv/dts/starfive_visionfive2-u-boot.dtsi
>> b/arch/riscv/dts/starfive_visionfive2-u-boot.dtsi
>> new file mode 100644
>> index 00..1b4e3392ab
>> --- /dev/null
>> +++ b/arch/riscv/dts/starfive_visionfive2-u-boot.dtsi
>> @@ -0,0 +1,84 @@
>> +// SPDX-License-Identifier: GPL-2.0 OR MIT
>> +/*
>> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
>> + */
>> +
>> +#include "binman.dtsi"
>> +#include "jh7110-u-boot.dtsi"
>> +/ {
>> + chosen {
>> + u-boot,dm-spl;
>> + };
>> +
>> + firmware {
>> + spi0 =
>> + u-boot,dm-spl;
>> + };
>> +
>> + config {
>> + u-boot,dm-spl;
>> + u-boot,spl-payload-offset = <0x10>;
>> + };
>> +
>> + memory@4000 {
>> + u-boot,dm-spl;
>> + };
>> +
>> + soc {
>> + u-boot,dm-spl;
>> +
>> + dmc: dmc@1570 {
>> + u-boot,dm-spl;
>> + compatible = "starfive,jh7110-dmc";
>> + reg = <0x0 0x1570 0x0 0x1>,
>> + <0x0 0x1300 0x0 0x1>;
>> + resets = < JH7110_SYSRST_DDR_AXI>,
>> + < JH7110_SYSRST_DDR_OSC>,
>> + < JH7110_SYSRST_DDR_APB>;
>> + reset-names = "axi", "osc", "apb";
>> + clocks = < JH7110_SYSCLK_PLL1_OUT>;
>> + clock-names = "pll1";
>> + clock-frequency = <2133>;
>> + };
>
> Again, needs to go in SoC dtsi.
>
Thanks. I will move the dmc node to jh7110-u-boot.dtsi in the next version.
> Here are the rules for where something should go:
>
> - If it is part of the chip, it goes in the SoC dtsi, even if it is not always
> used! You can disable it by default (status = "disabled") if this is the
> case.
> - If it is on the board, it goes in the board dts.
> - If it is a property which is added to a node to support a board peripheral,
> it goes in the board dts.
> - If it is a U-Boot-specific property, it goes in the -u-boot.dts[i]
>
> --Sean
>
>> + };
>> +};
>> +
>> +_syscon {
>> + u-boot,dm-spl;
>> +};
>> +
>> + {
>> + u-boot,dm-spl;
>> +};
>> +
>> + {
>> + u-boot,dm-spl;
>> +};
>> +
>> + {
>> + u-boot,dm-spl;
>> +};
>> +
>> + {
>> + u-boot,dm-spl;
>> +
>> + nor-flash@0 {
>> + u-boot,dm-spl;
>> + };
>> +};
>> +
>> + {
>> + u-boot,dm-spl;
>> +};
>> +
>> + {
>> + u-boot,dm-spl;
>> +};
>> +
>> + {
>> + u-boot,dm-spl;
>> +};
>> +
>> + {
>> + u-boot,dm-spl;
>> +};
>> diff --git a/arch/riscv/dts/starfive_visionfive2.dts
>> b/arch/riscv/dts/starfive_visionfive2.dts
>> new file mode 100644
>> index 00..52b31546da
>> --- /dev/null
>> +++ b/arch/riscv/dts/starfive_visionfive2.dts
>> @@ -0,0 +1,234 @@
>> +// SPDX-License-Identifier: GPL-2.0 OR MIT
>> +/*
>> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "jh7110.dtsi"
>> +#include
>> +/ {
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + model = "StarFive VisionFive V2";
>> + compatible = "starfive,jh7110";
>> +
>> + aliases {
>> + spi0 =
>> + mmc0 =
>> + mmc1 =
>> + };
>> +
>> + chosen {
>> + stdout-path = "/soc/serial@1000:115200";
>> + };
>> +
>> + cpus {
>> + timebase-frequency = <400>;
>> + };
>> +
>> + memory@4000 {
>> + device_type = "memory";
>> + reg = <0x0 0x4000 0x1 0x0>;
>> + };
>> +
>> + soc {
>> + sys_syscon: sys_syscon@1303 {
>> + compatible = "syscon";
>> + reg = <0x0 0x1303 0x0 0x1000>;
>> + };
>> + };
>
> ditto
>
I will move sys_syscon node to jh7110.dtsi
>> +};
>> +
>> +_0 {
>> + status = "okay";
>> +};
>> +
>> + {
>> + clock-frequency = <2400>;
>> +};
>> +
>> +_rtc {
>> + clock-frequency = <32768>;
>> +};
Re: [PATCH v2 14/17] riscv: dts: jh7110: Add initial StarFive JH7110 device tree
On 2023/1/20 2:30, Conor Dooley wrote:
> Hey Seán, David,
>
> On Thu, Jan 19, 2023 at 01:26:52AM -0500, Sean Anderson wrote:
>> On 1/19/23 01:18, David Abdurachmanov wrote:
>> > On Wed, Jan 18, 2023 at 10:19 AM Yanhong Wang
>> > wrote:
>
>> > > + U74_4: cpu@4 {
>> > > + compatible = "sifive,u74-mc", "riscv";
>> > > + reg = <4>;
>> > > + d-cache-block-size = <64>;
>> > > + d-cache-sets = <64>;
>> > > + d-cache-size = <32768>;
>> > > + d-tlb-sets = <1>;
>> > > + d-tlb-size = <40>;
>> > > + device_type = "cpu";
>> > > + i-cache-block-size = <64>;
>> > > + i-cache-sets = <64>;
>> > > + i-cache-size = <32768>;
>> > > + i-tlb-sets = <1>;
>> > > + i-tlb-size = <40>;
>> > > + mmu-type = "riscv,sv39";
>> > > + next-level-cache = <>;
>> > > + riscv,isa = "rv64imafdcbsu";
>> >
>> > Looking at SiFive U74 manuals, shouldn't this be RV64GC_Zba_Zbb_Sscofpmf?
>> > U74 only supports Zba and Zbb bit manip extensions.
>> > This is from the 21G3.02.00 release manual.
>> >
>> > Looking more, S76 core is listed in the manual as supporting up to:
>> > RV64IMAC_Zicsr_Zifencei_Zba_Zbb_Sscofpmf.
>> >
>> > I almost forgot about _Zicsr_Zifencei (which are part of G). Shouldn't
>> > those be listed too in riscv,isa?
>
> AFAIU, Linux just assumes them since they weren't their own thing prior
> to ISA spec 20191213. I think in- & ex- cluding them are both valid...
> Yeah.
>
>> AFAIK we don't support Z/X in U-Boot.
>
> Does the U-Boot ISA string parsing not just ignore un-implemented
> extensions? If it does ignore things you don't implement, then I think
> including the Z extensions should be no harm.
> IMO, it'd be nice to have this string match whatever the hardware can
> support so that same Devicetree can be used for U-Boot & whatever OS it
> is booting.
>
> That said, I'm yet to be sure that this SoC supports Zba or Zbb.
> I asked on the corresponding patchset for Linux and the answer I got,
> not from the vendor, was that it did.
> To what extent it might (or if it actually does) I have not yet
> determined. It's not mentioned in any of the documentation that I have
> got my hands on.
> I have one of these boards, so am in the process of getting something
> functional enough on it to actually test that.
>
Refer to the corresponding manual,the ISA definition of S7 is:
rv64imac_zicsr_zba_zbb,
and the ISA definition of U7 is: rv64imafdc_zicsr_zba_zbb, which is consistent
with linux.
> Thanks!
> Conor.
[PATCH] net: ipv6: IPv6 environment variable cleanup
From: Sean Edmond
Fix "setenv gatewayip6".
Synchronize IPv6 local variables with environment variables
in netboot_update_env()
Signed-off-by: Sean Edmond
---
cmd/net.c | 23 ++-
include/env_flags.h | 2 +-
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/cmd/net.c b/cmd/net.c
index 88d53d14d5..0161c87529 100644
--- a/cmd/net.c
+++ b/cmd/net.c
@@ -208,7 +208,7 @@ U_BOOT_CMD(
static void netboot_update_env(void)
{
- char tmp[22];
+ char tmp[44];
if (net_gateway.s_addr) {
ip_to_string(net_gateway, tmp);
@@ -269,6 +269,27 @@ static void netboot_update_env(void)
env_set("ntpserverip", tmp);
}
#endif
+
+ if (IS_ENABLED(CONFIG_IPV6)) {
+ if (!ip6_is_unspecified_addr(_ip6) ||
+ net_prefix_length != 0) {
+ sprintf(tmp, "%pI6c", _ip6);
+ if (net_prefix_length != 0)
+ sprintf(tmp, "%s/%d", tmp, net_prefix_length);
+
+ env_set("ip6addr", tmp);
+ }
+
+ if (!ip6_is_unspecified_addr(_server_ip6)) {
+ sprintf(tmp, "%pI6c", _server_ip6);
+ env_set("serverip6", tmp);
+ }
+
+ if (!ip6_is_unspecified_addr(_gateway6)) {
+ sprintf(tmp, "%pI6c", _gateway6);
+ env_set("gatewayip6", tmp);
+ }
+ }
}
/**
diff --git a/include/env_flags.h b/include/env_flags.h
index 6bd574c2bd..7df40c59be 100644
--- a/include/env_flags.h
+++ b/include/env_flags.h
@@ -71,7 +71,7 @@ enum env_flags_varaccess {
#define NET6_FLAGS \
"ip6addr:s," \
"serverip6:s," \
- "gatewayip6:s"
+ "gatewayip6:s,"
#else
#define NET6_FLAGS
#endif
--
2.39.0
Re: [PATCH] riscv: binman: Add help message for missing blobs
Hi Rick,
On Thu, Feb 16, 2023 at 09:19:45AM +0800, Rick Chen wrote:
> Add the 'missing-msg' for more detailed output
> on missing system firmware.
>
> Signed-off-by: Rick Chen
> ---
> arch/riscv/dts/binman.dtsi | 1 +
> tools/binman/missing-blob-help | 4
> 2 files changed, 5 insertions(+)
>
> diff --git a/arch/riscv/dts/binman.dtsi b/arch/riscv/dts/binman.dtsi
> index b8fc8f7f35..156cb00971 100644
> --- a/arch/riscv/dts/binman.dtsi
> +++ b/arch/riscv/dts/binman.dtsi
> @@ -45,6 +45,7 @@
>
> opensbi_blob: opensbi {
> filename = "fw_dynamic.bin";
> + missing-msg = "opensbi";
> };
> };
>
> diff --git a/tools/binman/missing-blob-help b/tools/binman/missing-blob-help
> index c61ca02a35..654ad642a3 100644
> --- a/tools/binman/missing-blob-help
> +++ b/tools/binman/missing-blob-help
> @@ -37,3 +37,7 @@ https://github.com/siemens/k3-rti-wdt.
> tee-os:
> See the documentation for your board. You may need to build Open Portable
> Trusted Execution Environment (OP-TEE) with TEE=/path/to/tee.bin
> +
> +opensbi:
> +See the documentation for your board. The OpenSBI git repo is at
> +https://github.com/riscv/opensbi.git
Hi Rick,
Could we add something like
"build fw_dynamic.bin first and re-build u-boot with
OPENSBI=/path/to/fw_dynamic.bin"
Other than that,
Reviewed-by: Leo Yu-Chi Liang
> --
> 2.17.1
>
[PATCH 11/13] imx8mm-mx8menlo: Drop SPL_BOARD_INIT
On this platform spl_board_init is a call to arch_misc_init which is a no-op, so drop the CONFIG options. Cc: Marek Vasut Cc: Olaf Mandel Signed-off-by: Tom Rini --- configs/imx8mm-mx8menlo_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/imx8mm-mx8menlo_defconfig b/configs/imx8mm-mx8menlo_defconfig index f1e48bba9653..7ca327676171 100644 --- a/configs/imx8mm-mx8menlo_defconfig +++ b/configs/imx8mm-mx8menlo_defconfig @@ -40,7 +40,6 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x91 CONFIG_SPL_BSS_MAX_SIZE=0x2000 -CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x92 CONFIG_SYS_SPL_MALLOC=y -- 2.34.1
[PATCH 12/13] global: Add a select for ARCH_MISC_INIT where used
When we have an arch_misc_init function, we can select it to ensure it's used. In that there is a functional change here, it's that on i.MX6 it's always been possible to populate "serial#" with something meaningful, but not every platform was taking the hook, and now it is. Cc: Stefano Babic Cc: Fabio Estevam Cc: NXP i.MX U-Boot Team Signed-off-by: Tom Rini --- arch/arm/Kconfig | 7 +++ arch/arm/cpu/armv7/ls102xa/Kconfig| 1 + arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 + arch/arm/mach-imx/imx8/Kconfig| 2 -- arch/arm/mach-imx/imx8m/Kconfig | 6 -- arch/arm/mach-imx/mx6/Kconfig | 5 - arch/arm/mach-imx/mx7ulp/Kconfig | 1 - arch/arm/mach-imx/mxs/Kconfig | 3 +++ arch/arm/mach-omap2/Kconfig | 1 + arch/arm/mach-tegra/tegra124/Kconfig | 1 + arch/arm/mach-tegra/tegra20/Kconfig | 1 + arch/arm/mach-tegra/tegra30/Kconfig | 2 ++ arch/mips/Kconfig | 1 + arch/powerpc/Kconfig | 1 + 14 files changed, 19 insertions(+), 14 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index c51f15fcf465..ef3910b367b5 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -605,6 +605,7 @@ config ARCH_MVEBU config ARCH_ORION5X bool "Marvell Orion" + select ARCH_MISC_INIT select CPU_ARM926EJS select GPIO_EXTRA_HEADER select SPL_SEPARATE_BSS if SPL @@ -819,6 +820,7 @@ config ARCH_LPC32XX config ARCH_IMX8 bool "NXP i.MX8 platform" select ARM64 + select ARCH_MISC_INIT if FSL_CAAM select SYS_FSL_HAS_SEC select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_LE @@ -832,6 +834,7 @@ config ARCH_IMX8 config ARCH_IMX8M bool "NXP i.MX8M platform" select ARM64 + select ARCH_MISC_INIT if FSL_CAAM select GPIO_EXTRA_HEADER select MACH_IMX select SYS_FSL_HAS_SEC @@ -902,6 +905,7 @@ config ARCH_MX31 config ARCH_MX7ULP bool "NXP MX7ULP" + select ARCH_MISC_INIT if FSL_CAAM select BOARD_POSTCLK_INIT select CPU_V7A select GPIO_EXTRA_HEADER @@ -929,6 +933,7 @@ config ARCH_MX7 config ARCH_MX6 bool "Freescale MX6" + select ARCH_MISC_INIT select BOARD_POSTCLK_INIT select CPU_V7A select GPIO_EXTRA_HEADER @@ -1023,6 +1028,7 @@ config ARCH_QEMU config ARCH_RMOBILE bool "Renesas ARM SoCs" + select ARCH_MISC_INIT if !RZA1 select DM select DM_SERIAL select GPIO_EXTRA_HEADER @@ -1198,6 +1204,7 @@ config ARCH_VERSAL_NET config ARCH_VF610 bool "Freescale Vybrid" + select ARCH_MISC_INIT select CPU_V7A select GPIO_EXTRA_HEADER select IOMUX_SHARE_CONF_REG diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index 3e292bf70e18..4546025195b9 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -1,5 +1,6 @@ config ARCH_LS1021A bool + select ARCH_MISC_INIT if FSL_CAAM select FSL_DEVICE_DISABLE select FSL_IFC if !QSPI_BOOT && !SD_BOOT_QSPI select LS102XA_STREAM_ID diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index a8b493e2f875..a42ede24f189 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -328,6 +328,7 @@ config ARCH_LX2160A config FSL_LSCH2 bool + select ARCH_MISC_INIT if FSL_CAAM select SKIP_LOWLEVEL_INIT select SYS_FSL_CCSR_GUR_BE select SYS_FSL_CCSR_SCFG_BE diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index 37d12d189586..c211a1bb687e 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -75,7 +75,6 @@ config TARGET_IMX8QM_MEK select BOARD_LATE_INIT select IMX8QM select FSL_CAAM - select ARCH_MISC_INIT select SPL_CRYPTO if SPL config TARGET_CONGA_QMX8 @@ -98,7 +97,6 @@ config TARGET_IMX8QXP_MEK select BOARD_LATE_INIT select IMX8QXP select FSL_CAAM - select ARCH_MISC_INIT select SPL_CRYPTO if SPL endchoice diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig index 5e4836b02feb..d6845c053718 100644 --- a/arch/arm/mach-imx/imx8m/Kconfig +++ b/arch/arm/mach-imx/imx8m/Kconfig @@ -51,7 +51,6 @@ config TARGET_IMX8MQ_EVK select IMX8MQ select IMX8M_LPDDR4 select FSL_CAAM - select ARCH_MISC_INIT select SPL_CRYPTO if SPL config TARGET_IMX8MQ_PHANBELL @@ -74,7 +73,6 @@ config TARGET_IMX8MM_EVK select SUPPORT_SPL select IMX8M_LPDDR4 select FSL_CAAM - select ARCH_MISC_INIT select SPL_CRYPTO if SPL config TARGET_IMX8MM_ICORE_MX8MM @@ -126,7 +124,6 @@ config TARGET_KONTRON_MX8MM select
[PATCH 13/13] common: Make ARCH_MISC_INIT be selected only
As platforms which require this hook need this hook enabled, in order to function, or do not need this hook, it doesn't make sense to prompt the user. As all platforms that need this hook now select the symbol, remove the prompt text. Signed-off-by: Tom Rini --- common/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/Kconfig b/common/Kconfig index e35fca69823d..866e3b153f5b 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -641,7 +641,7 @@ config ARCH_EARLY_INIT_R enabled. This can be used to set up architecture-specific devices. config ARCH_MISC_INIT - bool "Call arch-specific init after relocation, when console is ready" + bool help With this option U-Boot will call arch_misc_init() after relocation to allow miscellaneous arch-dependent initialisation -- 2.34.1
[PATCH 09/13] s5p: Remove empty arch_misc_init
We don't need to provide an empty arch_misc_init function here, we can
just not enable the hook.
Cc: Stefan Bosch
Signed-off-by: Tom Rini
---
arch/arm/cpu/armv7/s5p4418/cpu.c | 7 ---
configs/s5p4418_nanopi2_defconfig | 1 -
2 files changed, 8 deletions(-)
diff --git a/arch/arm/cpu/armv7/s5p4418/cpu.c b/arch/arm/cpu/armv7/s5p4418/cpu.c
index fcaafc0ff76f..8febfe527669 100644
--- a/arch/arm/cpu/armv7/s5p4418/cpu.c
+++ b/arch/arm/cpu/armv7/s5p4418/cpu.c
@@ -84,10 +84,3 @@ void enable_caches(void)
/* Enable D-cache. I-cache is already enabled in start.S */
dcache_enable();
}
-
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
- return 0;
-}
-#endif /* CONFIG_ARCH_MISC_INIT */
diff --git a/configs/s5p4418_nanopi2_defconfig
b/configs/s5p4418_nanopi2_defconfig
index 0645b09f78a4..a6154e137287 100644
--- a/configs/s5p4418_nanopi2_defconfig
+++ b/configs/s5p4418_nanopi2_defconfig
@@ -29,7 +29,6 @@ CONFIG_FIT_BEST_MATCH=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=1
-CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PBSIZE=1050
--
2.34.1
[PATCH 10/13] verdin-imx8mm: Remove unused SPL_BOARD_INIT
On this platform SPL_BOARD_INIT is used to call arch_misc_init which is
in turn empty, drop the call.
Cc: Marcel Ziswiler
Signed-off-by: Tom Rini
---
board/toradex/verdin-imx8mm/spl.c | 5 -
configs/verdin-imx8mm_defconfig | 1 -
2 files changed, 6 deletions(-)
diff --git a/board/toradex/verdin-imx8mm/spl.c
b/board/toradex/verdin-imx8mm/spl.c
index 9d54d60bb17d..3f33ff7d87a4 100644
--- a/board/toradex/verdin-imx8mm/spl.c
+++ b/board/toradex/verdin-imx8mm/spl.c
@@ -51,11 +51,6 @@ void spl_dram_init(void)
ddr_init(_timing);
}
-void spl_board_init(void)
-{
- arch_misc_init();
-}
-
#ifdef CONFIG_SPL_LOAD_FIT
int board_fit_config_name_match(const char *name)
{
diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig
index 5b5f7c051e54..0e7d67cf093d 100644
--- a/configs/verdin-imx8mm_defconfig
+++ b/configs/verdin-imx8mm_defconfig
@@ -40,7 +40,6 @@ CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x91
CONFIG_SPL_BSS_MAX_SIZE=0x2000
-CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_STACK=0x92
CONFIG_SYS_SPL_MALLOC=y
--
2.34.1
[PATCH 08/13] mvebu: Drop empty arch_misc_init
If this hooks is needed later, it should be added and populated for
real.
Cc: Stefan Roese
Signed-off-by: Tom Rini
---
arch/arm/mach-mvebu/Kconfig | 1 -
arch/arm/mach-mvebu/cpu.c | 11 ---
2 files changed, 12 deletions(-)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 16c5e7229550..6a8bf39f86b1 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -5,7 +5,6 @@ config HAVE_MVEBU_EFUSE
config ARMADA_32BIT
bool
- select ARCH_MISC_INIT
select BOARD_EARLY_INIT_F
select CPU_V7A
select SPL_DM if SPL
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 329d13691f0e..1d14e2eca596 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -514,17 +514,6 @@ u32 mvebu_get_nand_clock(void)
NAND_ECC_DIVCKL_RATIO_MASK) >> NAND_ECC_DIVCKL_RATIO_OFFS);
}
-/*
- * SOC specific misc init
- */
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
- /* Nothing yet, perhaps we need something here later */
- return 0;
-}
-#endif /* CONFIG_ARCH_MISC_INIT */
-
#if defined(CONFIG_MMC_SDHCI_MV) && !defined(CONFIG_DM_MMC)
int board_mmc_init(struct bd_info *bis)
{
--
2.34.1
[PATCH 06/13] imx9: Remove ARCH_MISC_INIT
We don't need an empty function, we can just not enable the hook we
don't use.
Cc: Peng Fan
Signed-off-by: Tom Rini
---
arch/arm/mach-imx/imx9/soc.c | 5 -
configs/imx93_11x11_evk_defconfig | 1 -
2 files changed, 6 deletions(-)
diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c
index 797d7a802baf..a16e22ea6bbf 100644
--- a/arch/arm/mach-imx/imx9/soc.c
+++ b/arch/arm/mach-imx/imx9/soc.c
@@ -208,11 +208,6 @@ int print_cpuinfo(void)
return 0;
}
-int arch_misc_init(void)
-{
- return 0;
-}
-
int ft_system_setup(void *blob, struct bd_info *bd)
{
return 0;
diff --git a/configs/imx93_11x11_evk_defconfig
b/configs/imx93_11x11_evk_defconfig
index 64da123c3723..33d703020798 100644
--- a/configs/imx93_11x11_evk_defconfig
+++ b/configs/imx93_11x11_evk_defconfig
@@ -25,7 +25,6 @@ CONFIG_DISTRO_DEFAULTS=y
CONFIG_REMAKE_ELF=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_DEFAULT_FDT_FILE="imx93-11x11-evk.dtb"
-CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
--
2.34.1
[PATCH 07/13] mvebe: Drop ARCH_MISC_INIT from alleycat 5
In this platform, arch_misc_init doesn't perform any real function. The
call to get_soc_type_rev has no lasting side effects.
Cc: Chris Packham
Signed-off-by: Tom Rini
---
arch/arm/mach-mvebu/alleycat5/soc.c | 9 -
configs/mvebu_ac5_rd_defconfig | 1 -
2 files changed, 10 deletions(-)
diff --git a/arch/arm/mach-mvebu/alleycat5/soc.c
b/arch/arm/mach-mvebu/alleycat5/soc.c
index efbef233a148..dc69f46eedb2 100644
--- a/arch/arm/mach-mvebu/alleycat5/soc.c
+++ b/arch/arm/mach-mvebu/alleycat5/soc.c
@@ -287,12 +287,3 @@ int mach_cpu_init(void)
return 0;
}
-
-int arch_misc_init(void)
-{
- u32 type, rev;
-
- get_soc_type_rev(, );
-
- return 0;
-}
diff --git a/configs/mvebu_ac5_rd_defconfig b/configs/mvebu_ac5_rd_defconfig
index a27202eb23e2..4e66791dbda8 100644
--- a/configs/mvebu_ac5_rd_defconfig
+++ b/configs/mvebu_ac5_rd_defconfig
@@ -22,7 +22,6 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_ARCH_EARLY_INIT_R=y
-CONFIG_ARCH_MISC_INIT=y
CONFIG_CMD_BOOTZ=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_MEMTEST=y
--
2.34.1
[PATCH 04/13] arm: rk3368: Select ARCH_EARLY_INIT_R when used
On the lion and evb-px5 platforms, we need this function, so select it. Cc: Andy Yan Cc: Quentin Schulz Cc: Klaus Goger Signed-off-by: Tom Rini --- arch/arm/mach-rockchip/rk3368/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-rockchip/rk3368/Kconfig b/arch/arm/mach-rockchip/rk3368/Kconfig index c3249a7be457..3de695186ed9 100644 --- a/arch/arm/mach-rockchip/rk3368/Kconfig +++ b/arch/arm/mach-rockchip/rk3368/Kconfig @@ -5,6 +5,7 @@ choice config TARGET_LION_RK3368 bool "Theobroma Systems RK3368-uQ7 (Lion) module" + select ARCH_EARLY_INIT_R help The RK3368-uQ7 is a micro-Qseven form-factor (40mm x 70mm, MXM-230 connector) system-on-module designed by Theobroma @@ -34,6 +35,7 @@ config TARGET_GEEKBOX config TARGET_EVB_PX5 bool "Evb-PX5" + select ARCH_EARLY_INIT_R help PX5 EVB is designed by Rockchip for automotive field with integrated CVBS (TP2825) / MIPI DSI / CSI / LVDS -- 2.34.1
[PATCH 05/13] common: Make ARCH_EARLY_INIT_R be selected only
As platforms which require this hook need this hook enabled, in order to function, or do not need this hook, it doesn't make sense to prompt the user. As all platforms that need this hook now select the symbol, remove the prompt text. Signed-off-by: Tom Rini --- common/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/Kconfig b/common/Kconfig index 86d6679d05b5..e35fca69823d 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -633,7 +633,7 @@ config EVENT_DEBUG endif # EVENT config ARCH_EARLY_INIT_R - bool "Call arch-specific init soon after relocation" + bool help With this option U-Boot will call arch_early_init_r() soon after relocation. Driver model is running by this point, and the cache -- 2.34.1
[PATCH 03/13] arm: zynq: Move to select'ing ARCH_EARLY_INIT_R if we have FPGA
The function arch_early_init_r only does anything on these platforms if we have FPGA (or SPL and SPL_FPGA) enabled, so move the logic to select based on that. Cc: Michal Simek Signed-off-by: Tom Rini --- arch/arm/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 724cbdde257c..c51f15fcf465 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1209,6 +1209,7 @@ config ARCH_VF610 config ARCH_ZYNQ bool "Xilinx Zynq based platform" select ARM_TWD_TIMER + select ARCH_EARLY_INIT_R if FPGA || (SPL && SPL_FPGA) select CLK select CLK_ZYNQ select CPU_V7A @@ -1230,7 +1231,6 @@ config ARCH_ZYNQ select SPL_TIMER if SPL select SUPPORT_SPL select TIMER - imply ARCH_EARLY_INIT_R imply BOARD_LATE_INIT imply CMD_CLK imply CMD_DM -- 2.34.1
[PATCH 02/13] arm: mvebu: Add select on ARCH_EARLY_INIT_R if ARM64
We need to be calling arch_early_init_r() on 64bit mvebu platforms, so move this to a select. Cc: Stefan Roese Signed-off-by: Tom Rini --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index bd7fffcce0ba..724cbdde257c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -588,6 +588,7 @@ config ARCH_KIRKWOOD config ARCH_MVEBU bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)" + select ARCH_EARLY_INIT_R if ARM64 select DM select DM_SERIAL select DM_SPI -- 2.34.1
[PATCH 01/13] common/Kconfig: Reword text for BOARD_TYPES
While it is true that for some Samsung platforms, we call get_board_type() the main usage of this CONFIG switch is to enable board_types in global data, which is then used by various platforms. Signed-off-by: Tom Rini --- common/Kconfig | 9 - 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/common/Kconfig b/common/Kconfig index e3a5e1be1e95..86d6679d05b5 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -551,12 +551,11 @@ endmenu menu "Init options" config BOARD_TYPES - bool "Call get_board_type() to get and display the board type" + bool "Enable board_type entry in global data struct" help - If this option is enabled, checkboard() will call get_board_type() - to get a string containing the board type and this will be - displayed immediately after the model is shown on the console - early in boot. + If this option is enabled, a field will be added to the global + data struct to store an unsigned long value for the type of + platform that we have determined we are on, at run-time. config DISPLAY_CPUINFO bool "Display information about the CPU during start up" -- 2.34.1
Re: [PATCH v2 06/17] clk: starfive: Add StarFive JH7110 clock driver
On 2023/1/22 2:56, Sean Anderson wrote:
> On 1/18/23 03:11, Yanhong Wang wrote:
>> Add a DM clock driver for StarFive JH7110 SoC.
>>
>> Signed-off-by: Yanhong Wang
>> ---
>> drivers/clk/Kconfig | 1 +
>> drivers/clk/Makefile | 1 +
>> drivers/clk/starfive/Kconfig | 17 +
>> drivers/clk/starfive/Makefile | 4 +
>> drivers/clk/starfive/clk-jh7110-pll.c | 293 ++
>> drivers/clk/starfive/clk-jh7110.c | 559 ++
>> drivers/clk/starfive/clk.h | 60 +++
>> 7 files changed, 935 insertions(+)
>> create mode 100644 drivers/clk/starfive/Kconfig
>> create mode 100644 drivers/clk/starfive/Makefile
>> create mode 100644 drivers/clk/starfive/clk-jh7110-pll.c
>> create mode 100644 drivers/clk/starfive/clk-jh7110.c
>> create mode 100644 drivers/clk/starfive/clk.h
>>
>> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
>> index 09aa97ee8c..4d60c84aad 100644
>> --- a/drivers/clk/Kconfig
>> +++ b/drivers/clk/Kconfig
>> @@ -235,6 +235,7 @@ source "drivers/clk/owl/Kconfig"
>> source "drivers/clk/renesas/Kconfig"
>> source "drivers/clk/sunxi/Kconfig"
>> source "drivers/clk/sifive/Kconfig"
>> +source "drivers/clk/starfive/Kconfig"
>> source "drivers/clk/stm32/Kconfig"
>> source "drivers/clk/tegra/Kconfig"
>> source "drivers/clk/ti/Kconfig"
>> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
>> index c274cda77c..66f5860356 100644
>> --- a/drivers/clk/Makefile
>> +++ b/drivers/clk/Makefile
>> @@ -13,6 +13,7 @@ obj-$(CONFIG_$(SPL_TPL_)CLK_COMPOSITE_CCF) +=
>> clk-composite.o
>> obj-y += analogbits/
>> obj-y += imx/
>> +obj-$(CONFIG_CLK_JH7110) += starfive/
>> obj-y += tegra/
>> obj-y += ti/
>> obj-$(CONFIG_$(SPL_TPL_)CLK_INTEL) += intel/
>> diff --git a/drivers/clk/starfive/Kconfig b/drivers/clk/starfive/Kconfig
>> new file mode 100644
>> index 00..9399ef6d51
>> --- /dev/null
>> +++ b/drivers/clk/starfive/Kconfig
>> @@ -0,0 +1,17 @@
>> +# SPDX-License-Identifier: GPL-2.0+
>> +
>> +config SPL_CLK_JH7110
>> + bool "SPL clock support for JH7110"
>> + depends on STARFIVE_JH7110 && SPL
>> + select SPL_CLK
>> + select SPL_CLK_CCF
>> + help
>> + This enables SPL DM support for clock driver in JH7110.
>> +
>> +config CLK_JH7110
>> + bool "StarFive JH7110 clock support"
>> + depends on STARFIVE_JH7110
>> + select CLK
>> + select CLK_CCF
>> + help
>> + This enables support clock driver for StarFive JH7110 SoC platform.
>> diff --git a/drivers/clk/starfive/Makefile b/drivers/clk/starfive/Makefile
>> new file mode 100644
>> index 00..ec0d157094
>> --- /dev/null
>> +++ b/drivers/clk/starfive/Makefile
>> @@ -0,0 +1,4 @@
>> +# SPDX-License-Identifier: GPL-2.0+
>> +
>> +obj-y += clk-jh7110.o
>> +obj-y += clk-jh7110-pll.o
>> diff --git a/drivers/clk/starfive/clk-jh7110-pll.c
>> b/drivers/clk/starfive/clk-jh7110-pll.c
>> new file mode 100644
>> index 00..08e1755d3a
>> --- /dev/null
>> +++ b/drivers/clk/starfive/clk-jh7110-pll.c
>> @@ -0,0 +1,293 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
>
> 2022-23 :)
>
>> + *
>> + * Author: Yanhong Wang
>> + */
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +#include "clk.h"
>> +
>> +#define UBOOT_DM_CLK_JH7110_PLLX "jh7110_clk_pllx"
>> +
>> +#define PLL_PD_OFF 1
>> +#define PLL_PD_ON 0
>> +
>> +#define CLK_DDR_BUS_MASK GENMASK(29, 24)
>> +#define CLK_DDR_BUS_OFFSET 0xAC
>> +#define CLK_DDR_BUS_OSC_DIV2 0
>> +#define CLK_DDR_BUS_PLL1_DIV2 1
>> +#define CLK_DDR_BUS_PLL1_DIV4 2
>> +#define CLK_DDR_BUS_PLL1_DIV8 3
>> +
>> +struct clk_jh7110_pllx {
>> + struct clk clk;
>> + void __iomem *base;
>> + void __iomem *sysreg;
>> + enum starfive_pll_type type;
>> + const struct starfive_pllx_offset *offset;
>> + const struct starfive_pllx_rate *rate_table;
>> + int rate_count;
>> +};
>> +
>> +#define getbits_le32(addr, mask) ((in_le32(addr) & (mask)) >> __ffs((mask)))
>> +
>> +#define PLLX_SET(offset, mask, val) do {\
>> + reg = readl((ulong *)((ulong)pll->base + (offset))); \
>> + reg &= ~(mask); \
>> + reg |= (mask) & ((val) << __ffs(mask)); \
>> + writel(reg, (ulong *)((ulong)pll->base + (offset))); \
>> + } while (0)
>> +
>> +#define PLLX_RATE(_rate, _pd, _fd, _pd1, _da, _ds) \
>> + { \
>> + .rate = (_rate), \
>> + .prediv = (_pd), \
>> + .fbdiv = (_fd), \
>> + .postdiv1 = (_pd1), \
>> + .dacpd = (_da), \
>> + .dsmpd = (_ds), \
>> + }
>> +
>> +#define to_clk_pllx(_clk) container_of(_clk, struct clk_jh7110_pllx, clk)
>> +
>> +static const struct starfive_pllx_rate jh7110_pll0_tbl[] = {
>> +
Re: [PATCH 10/11] rockchip: misc: Set eth1addr mac address
On Thu, Feb 16, 2023 at 7:57 AM Jonas Karlman wrote:
>
> Set eth1addr when there is an ethernet1 alias in the fdt.
Maybe it makes sense to set it regardless whether an alias is present
or not?
The user might be loading a custom FDT for the kernel, or have DT
overlays stacked on, either could have the "ethernet1" alias while
the U-boot DT doesn't.
ChenYu
> Also allow fdt fixup of ethernet mac addresses when CMD_NET is disabled.
> Set ethaddr and eth1addr based on HASH and SHA256 options.
>
> Signed-off-by: Jonas Karlman
> ---
> arch/arm/mach-rockchip/misc.c | 10 +-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-rockchip/misc.c b/arch/arm/mach-rockchip/misc.c
> index b350f18f1140..aceaea6b29b7 100644
> --- a/arch/arm/mach-rockchip/misc.c
> +++ b/arch/arm/mach-rockchip/misc.c
> @@ -21,9 +21,11 @@
>
> #include
>
> +DECLARE_GLOBAL_DATA_PTR;
> +
> int rockchip_setup_macaddr(void)
> {
> -#if IS_ENABLED(CONFIG_CMD_NET)
> +#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256)
> int ret;
> const char *cpuid = env_get("cpuid#");
> u8 hash[SHA256_SUM_LEN];
> @@ -52,6 +54,12 @@ int rockchip_setup_macaddr(void)
> mac_addr[0] &= 0xfe; /* clear multicast bit */
> mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
> eth_env_set_enetaddr("ethaddr", mac_addr);
> +
> + if (gd->fdt_blob && fdt_get_alias(gd->fdt_blob, "ethernet1")) {
> + /* Make a valid MAC address for eth1 */
> + mac_addr[5] += 0x20;
> + eth_env_set_enetaddr("eth1addr", mac_addr);
> + }
> #endif
> return 0;
> }
> --
> 2.39.1
>
Re: [PATCH v3] efi_loader: update SetVariable attribute check
Hi Heinrich,
On Wed, 15 Feb 2023 at 22:14, Heinrich Schuchardt wrote:
>
> On 2/15/23 10:55, Masahisa Kojima wrote:
> > UEFI specification v2.10 says that
> > EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS is deprecated and
> > EFI_UNSUPPORTED should be returned in SetVariable variable service.
> > Current implementation returns EFI_INVALID_PARAMETER,
> > let's fix the return value.
> >
> > Together with above change, this commit also updates the SetVariable
> > attribute check to be aligned with the EDK2 reference implementation.
> >
> > Signed-off-by: Masahisa Kojima
> > ---
> > Changes in v3:
> > - accept no access attribute for deletion
> >
> > Changes in v2:
> > - fix coding style
> > - HR must be set with NV
>
> The 2.10 spec say NV, BS, RT, HR.
> 8.2.8.2 Hardware Error Record Variables, p. 224
>
> If we want to check HR variables, should RT be required too?
Current implementation(check HR and NV only) is aligned to EDK2
reference implementation,
but there is no reason to blindly follow the EDK2.
So we will add to check RT(and implicitly BS in this case) for HR variables.
UEFI specification v2.10 P.80 and P.82 says the "HwErrRecSupport"
variable indicates
whether the platform supports Hardware Error Record Persistence or not.
We also need to check this variable existence and value.
Thanks,
Masahisa Kojima
>
> Best regards
>
> Heinrich
>
> >
> > lib/efi_loader/efi_variable.c | 32 +---
> > 1 file changed, 25 insertions(+), 7 deletions(-)
> >
> > diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c
> > index 4c85cfa607..3e11373331 100644
> > --- a/lib/efi_loader/efi_variable.c
> > +++ b/lib/efi_loader/efi_variable.c
> > @@ -230,9 +230,30 @@ efi_status_t efi_set_variable_int(const u16
> > *variable_name,
> > u64 time = 0;
> > enum efi_auth_var_type var_type;
> >
> > - if (!variable_name || !*variable_name || !vendor ||
> > - ((attributes & EFI_VARIABLE_RUNTIME_ACCESS) &&
> > - !(attributes & EFI_VARIABLE_BOOTSERVICE_ACCESS)))
> > + if (!variable_name || !*variable_name || !vendor)
> > + return EFI_INVALID_PARAMETER;
> > +
> > + if (data_size && !data)
> > + return EFI_INVALID_PARAMETER;
> > +
> > + /* EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS is deprecated */
> > + if (attributes & EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS)
> > + return EFI_UNSUPPORTED;
> > +
> > + /* Make sure if runtime bit is set, boot service bit is set also */
> > + if ((attributes &
> > + (EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_BOOTSERVICE_ACCESS))
> > ==
> > + EFI_VARIABLE_RUNTIME_ACCESS)
> > + return EFI_INVALID_PARAMETER;
> > +
> > + /* only EFI_VARIABLE_NON_VOLATILE attribute is invalid */
> > + if ((attributes & EFI_VARIABLE_MASK) == EFI_VARIABLE_NON_VOLATILE)
> > + return EFI_INVALID_PARAMETER;
> > +
> > + /* Make sure HR is set with NV */
> > + if ((attributes &
> > + (EFI_VARIABLE_NON_VOLATILE |
> > EFI_VARIABLE_HARDWARE_ERROR_RECORD)) ==
> > + EFI_VARIABLE_HARDWARE_ERROR_RECORD)
> > return EFI_INVALID_PARAMETER;
> >
> > /* check if a variable exists */
> > @@ -281,8 +302,6 @@ efi_status_t efi_set_variable_int(const u16
> > *variable_name,
> >
> > /* authenticate a variable */
> > if (IS_ENABLED(CONFIG_EFI_SECURE_BOOT)) {
> > - if (attributes & EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS)
> > - return EFI_INVALID_PARAMETER;
> > if (attributes &
> > EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS) {
> > u32 env_attr;
> > @@ -300,8 +319,7 @@ efi_status_t efi_set_variable_int(const u16
> > *variable_name,
> > }
> > } else {
> > if (attributes &
> > - (EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS |
> > - EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS)) {
> > + EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS) {
> > EFI_PRINT("Secure boot is not configured\n");
> > return EFI_INVALID_PARAMETER;
> > }
>
Re: [PATCH v3 01/14] clk: imx8mp: Add EQoS MAC clock
On 2/12/2023 5:47 AM, Marek Vasut wrote:
Add clock for the DWMAC EQoS block. This is used among other things
to configure the MII clock via DM CLK.
Acked-by: Sean Anderson
Signed-off-by: Marek Vasut
---
Cc: "Ariel D'Alessandro"
Cc: "NXP i.MX U-Boot Team"
Cc: Andrey Zhizhikin
Cc: Fabio Estevam
Cc: Joe Hershberger
Cc: Lukasz Majewski
Cc: Marcel Ziswiler
Cc: Marek Vasut
Cc: Michael Trimarchi
Cc: Peng Fan
Cc: Ramon Fried
Cc: Sean Anderson
Cc: Stefano Babic
Cc: Tim Harvey
Cc: Tommaso Merciai
Cc: u-boot@lists.denx.de
Reviewed-by: Peng Fan
---
V2: Add AB from Sean
V3: No change
---
drivers/clk/imx/clk-imx8mp.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index ffbc1d1ba9f..6dda0403e35 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -70,6 +70,14 @@ static const char *imx8mp_i2c6_sels[] = {"clock-osc-24m",
"sys_pll1_160m", "sys_
"sys_pll3_out", "audio_pll1_out",
"video_pll1_out",
"audio_pll2_out", "sys_pll1_133m", };
+static const char *imx8mp_enet_qos_sels[] = {"clock-osc-24m", "sys_pll2_125m", "sys_pll2_50m",
+"sys_pll2_100m", "sys_pll1_160m",
"audio_pll1_out",
+"video_pll1_out", "clk_ext4", };
+
+static const char *imx8mp_enet_qos_timer_sels[] = {"clock-osc-24m", "sys_pll2_100m",
"audio_pll1_out",
+ "clk_ext1", "clk_ext2",
"clk_ext3",
+ "clk_ext4",
"video_pll1_out", };
+
static const char *imx8mp_usdhc1_sels[] = {"clock-osc-24m", "sys_pll1_400m",
"sys_pll1_800m",
"sys_pll2_500m", "sys_pll3_out",
"sys_pll1_266m",
"audio_pll2_out", "sys_pll1_100m", };
@@ -250,6 +258,8 @@ static int imx8mp_clk_probe(struct udevice *dev)
clk_dm(IMX8MP_CLK_DRAM_APB, imx8m_clk_composite_critical("dram_apb",
imx8mp_dram_apb_sels, base + 0xa080));
clk_dm(IMX8MP_CLK_I2C5, imx8m_clk_composite("i2c5", imx8mp_i2c5_sels,
base + 0xa480));
clk_dm(IMX8MP_CLK_I2C6, imx8m_clk_composite("i2c6", imx8mp_i2c6_sels,
base + 0xa500));
+ clk_dm(IMX8MP_CLK_ENET_QOS, imx8m_clk_composite("enet_qos",
imx8mp_enet_qos_sels, base + 0xa880));
+ clk_dm(IMX8MP_CLK_ENET_QOS_TIMER, imx8m_clk_composite("enet_qos_timer",
imx8mp_enet_qos_timer_sels, base + 0xa900));
clk_dm(IMX8MP_CLK_ENET_REF, imx8m_clk_composite("enet_ref",
imx8mp_enet_ref_sels, base + 0xa980));
clk_dm(IMX8MP_CLK_ENET_TIMER, imx8m_clk_composite("enet_timer",
imx8mp_enet_timer_sels, base + 0xaa00));
clk_dm(IMX8MP_CLK_ENET_PHY_REF, imx8m_clk_composite("enet_phy_ref",
imx8mp_enet_phy_ref_sels, base + 0xaa80));
@@ -292,10 +302,13 @@ static int imx8mp_clk_probe(struct udevice *dev)
clk_dm(IMX8MP_CLK_I2C2_ROOT, imx_clk_gate4("i2c2_root_clk", "i2c2",
base + 0x4180, 0));
clk_dm(IMX8MP_CLK_I2C3_ROOT, imx_clk_gate4("i2c3_root_clk", "i2c3",
base + 0x4190, 0));
clk_dm(IMX8MP_CLK_I2C4_ROOT, imx_clk_gate4("i2c4_root_clk", "i2c4",
base + 0x41a0, 0));
+ clk_dm(IMX8MP_CLK_QOS_ROOT, imx_clk_gate4("qos_root_clk", "ipg_root",
base + 0x42c0, 0));
+ clk_dm(IMX8MP_CLK_QOS_ENET_ROOT, imx_clk_gate4("qos_enet_root_clk",
"ipg_root", base + 0x42e0, 0));
clk_dm(IMX8MP_CLK_QSPI_ROOT, imx_clk_gate4("qspi_root_clk", "qspi",
base + 0x42f0, 0));
clk_dm(IMX8MP_CLK_I2C5_ROOT, imx_clk_gate2("i2c5_root_clk", "i2c5",
base + 0x4330, 0));
clk_dm(IMX8MP_CLK_I2C6_ROOT, imx_clk_gate2("i2c6_root_clk", "i2c6",
base + 0x4340, 0));
clk_dm(IMX8MP_CLK_SIM_ENET_ROOT, imx_clk_gate4("sim_enet_root_clk",
"enet_axi", base + 0x4400, 0));
+ clk_dm(IMX8MP_CLK_ENET_QOS_ROOT, imx_clk_gate4("enet_qos_root_clk",
"sim_enet_root_clk", base + 0x43b0, 0));
clk_dm(IMX8MP_CLK_UART1_ROOT, imx_clk_gate4("uart1_root_clk", "uart1",
base + 0x4490, 0));
clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk", "uart2",
base + 0x44a0, 0));
clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk", "uart3",
base + 0x44b0, 0));
Re: [PATCH] mx6sxsabreauto: Remove myself from MAINTAINERS
On 2/16/2023 2:32 AM, Fabio Estevam wrote: I don't have access to the mx6sxsabreauto board, so remove myself from the MAINTAINERS entry and add Peng instead. Signed-off-by: Fabio Estevam Acked-by: Peng Fan --- board/freescale/mx6sxsabreauto/MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/freescale/mx6sxsabreauto/MAINTAINERS b/board/freescale/mx6sxsabreauto/MAINTAINERS index 692bbd9767..8dc62e5e3e 100644 --- a/board/freescale/mx6sxsabreauto/MAINTAINERS +++ b/board/freescale/mx6sxsabreauto/MAINTAINERS @@ -1,5 +1,5 @@ MX6SXSABREAUTO BOARD -M: Fabio Estevam +M: Peng Fan S:Maintained F:board/freescale/mx6sxsabreauto/ F:include/configs/mx6sxsabreauto.h
Re: [Patch] net: dwc_eth_qos - works with fixed-phy
On 2/15/23 17:16, Elmar Psilog wrote:
Let the EQoS in imx8mp handle fixed-phy too.
Without that patch it lost track to the node to scan
speed and duplex.
Patch was created by Marek Vasut, just tested by me.
Signed-off-by: Elmar Psilog
---
drivers/net/dwc_eth_qos.c
1 file changed
If you were to use 'git format-patch' and 'git send-email', those tools
would generate the correct Subject and diffstat etc. for you. Also have
a look at scripts/checkpatch.pl to validate whether a patch is correct.
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index afc47b56ff..10915d8e47 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -785,9 +785,21 @@ static int eqos_start(struct udevice *dev)
*/
if (!eqos->phy) {
int addr = -1;
- addr = eqos_get_phy_addr(eqos, dev);
- eqos->phy = phy_connect(eqos->mii, addr, dev,
- eqos->config->interface(dev));
+ ofnode fixed_node;
+
+ if (IS_ENABLED(CONFIG_PHY_FIXED)) {
+ fixed_node = ofnode_find_subnode(dev_ofnode(dev),
+ "fixed-link");
+ if (ofnode_valid(fixed_node)) {
+ eqos->phy =
fixed_phy_create(dev_ofnode(dev));
+ eqos->phy_of_node = fixed_node;
+ }
+ }
+ if (!eqos->phy) {
+ addr = eqos_get_phy_addr(eqos, dev);
+ eqos->phy = phy_connect(eqos->mii, addr, dev,
eqos->config->interface(dev));
+ }
+
if (!eqos->phy) {
pr_err("phy_connect() failed");
goto err_stop_resets;
+CC Ramon the network maintainer .
[PATCH] riscv: binman: Add help message for missing blobs
Add the 'missing-msg' for more detailed output
on missing system firmware.
Signed-off-by: Rick Chen
---
arch/riscv/dts/binman.dtsi | 1 +
tools/binman/missing-blob-help | 4
2 files changed, 5 insertions(+)
diff --git a/arch/riscv/dts/binman.dtsi b/arch/riscv/dts/binman.dtsi
index b8fc8f7f35..156cb00971 100644
--- a/arch/riscv/dts/binman.dtsi
+++ b/arch/riscv/dts/binman.dtsi
@@ -45,6 +45,7 @@
opensbi_blob: opensbi {
filename = "fw_dynamic.bin";
+ missing-msg = "opensbi";
};
};
diff --git a/tools/binman/missing-blob-help b/tools/binman/missing-blob-help
index c61ca02a35..654ad642a3 100644
--- a/tools/binman/missing-blob-help
+++ b/tools/binman/missing-blob-help
@@ -37,3 +37,7 @@ https://github.com/siemens/k3-rti-wdt.
tee-os:
See the documentation for your board. You may need to build Open Portable
Trusted Execution Environment (OP-TEE) with TEE=/path/to/tee.bin
+
+opensbi:
+See the documentation for your board. The OpenSBI git repo is at
+https://github.com/riscv/opensbi.git
--
2.17.1
Re: [PATCH v3 4/9] video console: move 8x16 font data in named header
On Wed, 15 Feb 2023 at 04:44, Dzmitry Sankouski wrote:
>
> Consistent font data header names needed to add new
> fonts.
>
> Signed-off-by: Dzmitry Sankouski
> ---
> Changes for v2: N/A
> Changes for v3: N/A
>
> include/video_font.h | 2 +-
> include/{video_font_data.h => video_font_8x16.h} | 5 ++---
> 2 files changed, 3 insertions(+), 4 deletions(-)
> rename include/{video_font_data.h => video_font_8x16.h} (99%)
>
Reviewed-by: Simon Glass
[PATCH 10/11] rockchip: misc: Set eth1addr mac address
Set eth1addr when there is an ethernet1 alias in the fdt.
Also allow fdt fixup of ethernet mac addresses when CMD_NET is disabled.
Set ethaddr and eth1addr based on HASH and SHA256 options.
Signed-off-by: Jonas Karlman
---
arch/arm/mach-rockchip/misc.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-rockchip/misc.c b/arch/arm/mach-rockchip/misc.c
index b350f18f1140..aceaea6b29b7 100644
--- a/arch/arm/mach-rockchip/misc.c
+++ b/arch/arm/mach-rockchip/misc.c
@@ -21,9 +21,11 @@
#include
+DECLARE_GLOBAL_DATA_PTR;
+
int rockchip_setup_macaddr(void)
{
-#if IS_ENABLED(CONFIG_CMD_NET)
+#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256)
int ret;
const char *cpuid = env_get("cpuid#");
u8 hash[SHA256_SUM_LEN];
@@ -52,6 +54,12 @@ int rockchip_setup_macaddr(void)
mac_addr[0] &= 0xfe; /* clear multicast bit */
mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
eth_env_set_enetaddr("ethaddr", mac_addr);
+
+ if (gd->fdt_blob && fdt_get_alias(gd->fdt_blob, "ethernet1")) {
+ /* Make a valid MAC address for eth1 */
+ mac_addr[5] += 0x20;
+ eth_env_set_enetaddr("eth1addr", mac_addr);
+ }
#endif
return 0;
}
--
2.39.1
Re: [PATCH] samsung: common: ignore if CROS EC is not supported
On Wed, 15 Feb 2023 at 12:03, Stefan Agner wrote: > > If the CROS device class is not compiled in, uclass returns not > supported. Ignore this case as well. > > This avoids boot failures on ODROID-XU4 without CONFIG_CROS_EC > ending with: > cros-ec communications failure -96 > Please reset with Power+Refresh > Cannot init cros-ec device > > Signed-off-by: Stefan Agner > --- > board/samsung/common/board.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Simon Glass
Re: [PATCH v3 9/9] video console: add 12x22 console simple font test
Hi Dzmitry,
On Wed, 15 Feb 2023 at 04:43, Dzmitry Sankouski wrote:
>
> Tests fonts wider than a byte.
>
> Signed-off-by: Dzmitry Sankouski
> Reviewed-by: Simon Glass
I found a problem with this
> ---
> Changes for v2: N/A
> Changes for v2: none
>
> configs/sandbox_defconfig | 3 +++
> test/dm/video.c | 41 +++
> 2 files changed, 44 insertions(+)
>
> diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
> index 34c342b6f5..625ca35f5c 100644
> --- a/configs/sandbox_defconfig
> +++ b/configs/sandbox_defconfig
> @@ -337,3 +337,6 @@ CONFIG_TEST_FDTDEC=y
> CONFIG_UNIT_TEST=y
> CONFIG_UT_TIME=y
> CONFIG_UT_DM=y
> +CONFIG_CMD_SELECT_FONT=y
> +CONFIG_VIDEO_FONT_8X16=y
> +CONFIG_VIDEO_FONT_SUN12X22=y
I don't think you can enable this, since sandbox uses
CONSOLE_TRUETYPE. Can we perhaps use sandbox_flattree to run this
test?
Also, for me the tests crash with signal 8 (I think).
> diff --git a/test/dm/video.c b/test/dm/video.c
> index 17a33cc7af..30778157d9 100644
> --- a/test/dm/video.c
> +++ b/test/dm/video.c
> @@ -151,6 +151,8 @@ static int dm_test_video_text(struct unit_test_state *uts)
>
> ut_assertok(select_vidconsole(uts, "vidconsole0"));
> ut_assertok(video_get_nologo(uts, ));
> + ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, ));
> + ut_assertok(vidconsole_select_font(con, "8x16", 0));
> ut_asserteq(46, compress_frame_buffer(uts, dev));
>
> ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, ));
> @@ -175,6 +177,42 @@ static int dm_test_video_text(struct unit_test_state
> *uts)
> }
> DM_TEST(dm_test_video_text, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
>
> +static int dm_test_video_text_12x22(struct unit_test_state *uts)
> +{
> + struct udevice *dev, *con;
> + int i;
> +
> +#define WHITE 0x
> +#define SCROLL_LINES 100
> +
> + ut_assertok(select_vidconsole(uts, "vidconsole0"));
> + ut_assertok(video_get_nologo(uts, ));
> + ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, ));
> + ut_assertok(vidconsole_select_font(con, "12x22", 0));
> + ut_asserteq(46, compress_frame_buffer(uts, dev));
> +
> + ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, ));
> + vidconsole_putc_xy(con, 0, 0, 'a');
> + ut_asserteq(89, compress_frame_buffer(uts, dev));
> +
> + vidconsole_putc_xy(con, 0, 0, ' ');
> + ut_asserteq(46, compress_frame_buffer(uts, dev));
> +
> + for (i = 0; i < 20; i++)
> + vidconsole_putc_xy(con, VID_TO_POS(i * 8), 0, ' ' + i);
> + ut_asserteq(363, compress_frame_buffer(uts, dev));
> +
> + vidconsole_set_row(con, 0, WHITE);
> + ut_asserteq(46, compress_frame_buffer(uts, dev));
> +
> + for (i = 0; i < 20; i++)
> + vidconsole_putc_xy(con, VID_TO_POS(i * 8), 0, ' ' + i);
> + ut_asserteq(363, compress_frame_buffer(uts, dev));
> +
> + return 0;
> +}
> +DM_TEST(dm_test_video_text_12x22, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
> +
> /* Test handling of special characters in the console */
> static int dm_test_video_chars(struct unit_test_state *uts)
> {
> @@ -184,6 +222,7 @@ static int dm_test_video_chars(struct unit_test_state
> *uts)
> ut_assertok(select_vidconsole(uts, "vidconsole0"));
> ut_assertok(video_get_nologo(uts, ));
> ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, ));
> + ut_assertok(vidconsole_select_font(con, "8x16", 0));
> vidconsole_put_string(con, test_string);
> ut_asserteq(466, compress_frame_buffer(uts, dev));
>
> @@ -201,6 +240,7 @@ static int dm_test_video_ansi(struct unit_test_state *uts)
> ut_assertok(select_vidconsole(uts, "vidconsole0"));
> ut_assertok(video_get_nologo(uts, ));
> ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, ));
> + ut_assertok(vidconsole_select_font(con, "8x16", 0));
>
> /* reference clear: */
> video_clear(con->parent);
> @@ -249,6 +289,7 @@ static int check_vidconsole_output(struct unit_test_state
> *uts, int rot,
>
> ut_assertok(video_get_nologo(uts, ));
> ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, ));
> + ut_assertok(vidconsole_select_font(con, "8x16", 0));
> ut_asserteq(46, compress_frame_buffer(uts, dev));
>
> /* Check display wrap */
> --
> 2.30.2
>
Regards,
Simon
Re: [PATCH v3 6/9] video console: allow font size configuration at runtime
On Wed, 15 Feb 2023 at 04:43, Dzmitry Sankouski wrote: > > Allow font size configuration at runtime for console_simple.c > driver. This needed for unit testing different fonts. > > Configuring is done by `font` command, also used for font > selection in true type console. > > Signed-off-by: Dzmitry Sankouski > --- > Changes for v2: N/A > Changes for v3: > - move 8x16 font patch extracted > - implement multiple fonts patch extracted > - add static modifiers, where needed > - remove list fonts operation > - put fontdata in local var > > cmd/Kconfig| 8 > cmd/Makefile | 2 +- > drivers/video/Kconfig | 1 + > drivers/video/console_simple.c | 30 ++ > 4 files changed, 40 insertions(+), 1 deletion(-) > Reviewed-by: Simon Glass
Re: [PATCH v3 1/9] video console: unite normal and rotated files
Hi Dzmitry,
On Wed, 15 Feb 2023 at 04:43, Dzmitry Sankouski wrote:
>
> Unite console_normal.c and console_rotate.c files.
> Those files have similar logic, and common logic
> may be extracted after putting code in single file.
>
> Signed-off-by: Dzmitry Sankouski
> ---
> Changes for v2: none
> Changes for v3: none
>
> drivers/video/Kconfig | 8 +-
> drivers/video/Makefile| 3 +-
> drivers/video/console_normal.c| 178 --
> .../{console_rotate.c => console_simple.c}| 166
> 4 files changed, 171 insertions(+), 184 deletions(-)
> delete mode 100644 drivers/video/console_normal.c
> rename drivers/video/{console_rotate.c => console_simple.c} (75%)
I would prefer to keep these separate, rather than adding an #ifdef.
Could you add an internal header file like
drivers/video/video_internal.h to export the shared functions?
Regards,
Simon
Re: [PATCH v3 5/9] video console: implement multiple fonts configuration
On Wed, 15 Feb 2023 at 04:43, Dzmitry Sankouski wrote: > > This needed for unit testing different fonts. > > Configured fonts are placed in an array of fonts. > First font is selected by default upon console probe. > > Signed-off-by: Dzmitry Sankouski > --- > Changes for v2: N/A > Changes for v3: N/A > > common/splash.c| 17 ++- > drivers/video/Kconfig | 15 +++ > drivers/video/console_simple.c | 232 - > include/video_font.h | 17 ++- > include/video_font_4x6.h | 11 +- > include/video_font_8x16.h | 8 +- > include/video_font_data.h | 31 + > 7 files changed, 216 insertions(+), 115 deletions(-) > create mode 100644 include/video_font_data.h > Reviewed-by: Simon Glass
Re: [PATCH v3 2/9] video console: refactoring and optimization
On Wed, 15 Feb 2023 at 04:44, Dzmitry Sankouski wrote: > > - get rid of code duplications in switch across bpp values > - extract common pixel fill logic in two functions one per > horizontal and vertical filling > - rearrange statements in put_xy* methods in unified way > - replace types - uint*_t to u* > > Signed-off-by: Dzmitry Sankouski > --- > Changes for v2: > - move width and pixel data size macros to console_simple.c > - performance: move if statement out of pixel fill loops > - document new functions > - remove console_probe_2 function > - make fill_pixel_and_goto_next void > - fix video unit tests failures > Changes for v3: none > > drivers/video/console_simple.c | 598 ++--- > 1 file changed, 258 insertions(+), 340 deletions(-) Reviewed-by: Simon Glass
Re: [PATCH v3 3/9] video console: add support for fonts wider than 1 byte
jOn Wed, 15 Feb 2023 at 04:44, Dzmitry Sankouski wrote: > > Devices with high ppi may benefit from wider fonts. > > Current width implementation is limited by 1 byte, i.e. 8 bits. > New version iterates VIDEO_FONT_BYTE_WIDTH times, to process all > width bytes, thus allowing fonts wider than 1 byte. > > Signed-off-by: Dzmitry Sankouski > --- > Charges for v2: > - replace TAIL_BIT_COUNT macro with c code > - rename refactoring > Charges for v3: none > > drivers/video/console_simple.c | 93 +- > 1 file changed, 59 insertions(+), 34 deletions(-) > Reviewed-by: Simon Glass
[PATCH 09/11] rockchip: efuse: Add support for RK3036
Add support for rk3036 compatible.
Signed-off-by: Jonas Karlman
---
drivers/misc/rockchip-efuse.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 897e79bcc60f..177c96983ed8 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -18,6 +18,9 @@
#include
#define EFUSE_CTRL 0x
+#define RK3036_A_SHIFT 8
+#define RK3036_A_MASK GENMASK(15, 8)
+#define RK3036_ADDR(n) ((n) << RK3036_A_SHIFT)
#define RK3128_A_SHIFT 7
#define RK3128_A_MASK GENMASK(15, 7)
#define RK3128_ADDR(n) ((n) << RK3128_A_SHIFT)
@@ -86,6 +89,33 @@ U_BOOT_CMD(
);
#endif
+static int rockchip_rk3036_efuse_read(struct udevice *dev, int offset,
+ void *buf, int size)
+{
+ struct rockchip_efuse_plat *efuse = dev_get_plat(dev);
+ u8 *buffer = buf;
+
+ /* Switch to read mode */
+ writel(EFUSE_LOAD, efuse->base + EFUSE_CTRL);
+ udelay(2);
+
+ while (size--) {
+ clrsetbits_le32(efuse->base + EFUSE_CTRL, RK3036_A_MASK,
+ RK3036_ADDR(offset++));
+ udelay(2);
+ setbits_le32(efuse->base + EFUSE_CTRL, EFUSE_STROBE);
+ udelay(2);
+ *buffer++ = readb(efuse->base + EFUSE_DOUT);
+ clrbits_le32(efuse->base + EFUSE_CTRL, EFUSE_STROBE);
+ udelay(2);
+ }
+
+ /* Switch to inactive mode */
+ writel(0x0, efuse->base + EFUSE_CTRL);
+
+ return 0;
+}
+
static int rockchip_rk3128_efuse_read(struct udevice *dev, int offset,
void *buf, int size)
{
@@ -241,6 +271,11 @@ static int rockchip_efuse_of_to_plat(struct udevice *dev)
return 0;
}
+static const struct rockchip_efuse_data rk3036_data = {
+ .read = rockchip_rk3036_efuse_read,
+ .size = 0x20,
+};
+
static const struct rockchip_efuse_data rk3128_data = {
.read = rockchip_rk3128_efuse_read,
.size = 0x40,
@@ -265,6 +300,10 @@ static const struct rockchip_efuse_data rk3399_data = {
};
static const struct udevice_id rockchip_efuse_ids[] = {
+ {
+ .compatible = "rockchip,rk3036-efuse",
+ .data = (ulong)_data,
+ },
{
.compatible = "rockchip,rk3066a-efuse",
.data = (ulong)_data,
--
2.39.1
[PATCH 08/11] rockchip: efuse: Add support for RK3128
Add support for rk3128 compatible.
Signed-off-by: Jonas Karlman
---
drivers/misc/rockchip-efuse.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 7aa3dc1b3868..897e79bcc60f 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -18,6 +18,9 @@
#include
#define EFUSE_CTRL 0x
+#define RK3128_A_SHIFT 7
+#define RK3128_A_MASK GENMASK(15, 7)
+#define RK3128_ADDR(n) ((n) << RK3128_A_SHIFT)
#define RK3288_A_SHIFT 6
#define RK3288_A_MASK GENMASK(15, 6)
#define RK3288_ADDR(n) ((n) << RK3288_A_SHIFT)
@@ -83,6 +86,33 @@ U_BOOT_CMD(
);
#endif
+static int rockchip_rk3128_efuse_read(struct udevice *dev, int offset,
+ void *buf, int size)
+{
+ struct rockchip_efuse_plat *efuse = dev_get_plat(dev);
+ u8 *buffer = buf;
+
+ /* Switch to read mode */
+ writel(EFUSE_LOAD, efuse->base + EFUSE_CTRL);
+ udelay(2);
+
+ while (size--) {
+ clrsetbits_le32(efuse->base + EFUSE_CTRL, RK3128_A_MASK,
+ RK3128_ADDR(offset++));
+ udelay(2);
+ setbits_le32(efuse->base + EFUSE_CTRL, EFUSE_STROBE);
+ udelay(2);
+ *buffer++ = readb(efuse->base + EFUSE_DOUT);
+ clrbits_le32(efuse->base + EFUSE_CTRL, EFUSE_STROBE);
+ udelay(2);
+ }
+
+ /* Switch to inactive mode */
+ writel(0x0, efuse->base + EFUSE_CTRL);
+
+ return 0;
+}
+
static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset,
void *buf, int size)
{
@@ -211,6 +241,11 @@ static int rockchip_efuse_of_to_plat(struct udevice *dev)
return 0;
}
+static const struct rockchip_efuse_data rk3128_data = {
+ .read = rockchip_rk3128_efuse_read,
+ .size = 0x40,
+};
+
static const struct rockchip_efuse_data rk3288_data = {
.read = rockchip_rk3288_efuse_read,
.size = 0x20,
@@ -234,6 +269,10 @@ static const struct udevice_id rockchip_efuse_ids[] = {
.compatible = "rockchip,rk3066a-efuse",
.data = (ulong)_data,
},
+ {
+ .compatible = "rockchip,rk3128-efuse",
+ .data = (ulong)_data,
+ },
{
.compatible = "rockchip,rk3188-efuse",
.data = (ulong)_data,
--
2.39.1
[PATCH 11/11] rockchip: rk3568: Read cpuid from otp
The cpuid on RK3568 is located at 0xa instead of 0x7 as all other SoCs.
Add and use a CFG_CPUID_OFFSET to define this offset.
Signed-off-by: Jonas Karlman
---
arch/arm/dts/rk356x-u-boot.dtsi | 12
arch/arm/mach-rockchip/Kconfig| 2 ++
arch/arm/mach-rockchip/board.c| 2 +-
include/configs/rk3568_common.h | 3 +++
include/configs/rockchip-common.h | 2 ++
5 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi
index ccb8db0001a4..4262afce768d 100644
--- a/arch/arm/dts/rk356x-u-boot.dtsi
+++ b/arch/arm/dts/rk356x-u-boot.dtsi
@@ -20,6 +20,18 @@
u-boot,dm-pre-reloc;
status = "okay";
};
+
+ otp: nvmem@fe38c000 {
+ compatible = "rockchip,rk3568-otp";
+ reg = <0x0 0xfe38c000 0x0 0x4000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ status = "okay";
+
+ otp_id: id@a {
+ reg = <0x0a 0x10>;
+ };
+ };
};
{
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index b678ec41318e..998c6e88e4aa 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -287,6 +287,8 @@ config ROCKCHIP_RK3568
select SYSCON
select BOARD_LATE_INIT
imply ROCKCHIP_COMMON_BOARD
+ imply ROCKCHIP_OTP
+ imply MISC_INIT_R
help
The Rockchip RK3568 is a ARM-based SoC with quad-core Cortex-A55,
including NEON and GPU, 512K L3 cache, Mali-G52 based graphics,
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index ebffb6c3ff0c..f1f70c81d0ca 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -323,7 +323,7 @@ int fastboot_set_reboot_flag(enum fastboot_reboot_reason
reason)
#ifdef CONFIG_MISC_INIT_R
__weak int misc_init_r(void)
{
- const u32 cpuid_offset = 0x7;
+ const u32 cpuid_offset = CFG_CPUID_OFFSET;
const u32 cpuid_length = 0x10;
u8 cpuid[cpuid_length];
int ret;
diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
index ae360105d508..e4004d19ee37 100644
--- a/include/configs/rk3568_common.h
+++ b/include/configs/rk3568_common.h
@@ -8,6 +8,9 @@
#include "rockchip-common.h"
+#undef CFG_CPUID_OFFSET
+#define CFG_CPUID_OFFSET 0xa
+
#define CFG_IRAM_BASE 0xfdcc
#define CFG_SYS_SDRAM_BASE 0
diff --git a/include/configs/rockchip-common.h
b/include/configs/rockchip-common.h
index ff8123dabd69..b62c32f02bdb 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -7,6 +7,8 @@
#define _ROCKCHIP_COMMON_H_
#include
+#define CFG_CPUID_OFFSET 0x7
+
/* ((CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR - 64) * 512) */
#ifndef CONFIG_SPL_BUILD
--
2.39.1
[PATCH 05/11] rockchip: efuse: Refactor to use driver data and ops
Refactor the driver to use driver data and ops to simplify handling
of SoCs that require a unique read op.
Move handling of the aligned bounce buffer to main read op in order to
keep the SoC unique read op simple.
Signed-off-by: Jonas Karlman
---
drivers/misc/rockchip-efuse.c | 160 ++
1 file changed, 85 insertions(+), 75 deletions(-)
diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 083ee65e0ad7..864c9c15bbe5 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -13,50 +13,40 @@
#include
#include
#include
+#include
#include
-#define RK3399_A_SHIFT 16
-#define RK3399_A_MASK 0x3ff
-#define RK3399_NFUSES 32
-#define RK3399_BYTES_PER_FUSE 4
-#define RK3399_STROBSFTSEL BIT(9)
-#define RK3399_RSB BIT(7)
-#define RK3399_PD BIT(5)
-#define RK3399_PGENBBIT(3)
-#define RK3399_LOAD BIT(2)
-#define RK3399_STROBE BIT(1)
-#define RK3399_CSB BIT(0)
-
-struct rockchip_efuse_regs {
- u32 ctrl; /* 0x00 efuse control register */
- u32 dout; /* 0x04 efuse data out register */
- u32 rf;/* 0x08 efuse redundancy bit used register */
- u32 _rsvd0;
- u32 jtag_pass; /* 0x10 JTAG password */
- u32 strobe_finish_ctrl;
- /* 0x14 efuse strobe finish control register */
-};
+#define EFUSE_CTRL 0x
+#define RK3399_A_SHIFT 16
+#define RK3399_A_MASK GENMASK(25, 16)
+#define RK3399_ADDR(n) ((n) << RK3399_A_SHIFT)
+#define RK3399_STROBSFTSEL BIT(9)
+#define RK3399_RSB BIT(7)
+#define RK3399_PD BIT(5)
+#define RK3399_PGENB BIT(3)
+#define RK3399_LOADBIT(2)
+#define RK3399_STROBE BIT(1)
+#define RK3399_CSB BIT(0)
+#define EFUSE_DOUT 0x0004
struct rockchip_efuse_plat {
void __iomem *base;
- struct clk *clk;
+};
+
+struct rockchip_efuse_data {
+ int (*read)(struct udevice *dev, int offset, void *buf, int size);
+ int size;
+ int block_size;
};
#if defined(DEBUG)
-static int dump_efuses(struct cmd_tbl *cmdtp, int flag,
- int argc, char *const argv[])
+static int dump_efuse(struct cmd_tbl *cmdtp, int flag,
+ int argc, char *const argv[])
{
- /*
-* N.B.: This function is tailored towards the RK3399 and assumes that
-* there's always 32 fuses x 32 bits (i.e. 128 bytes of data) to
-* be read.
-*/
-
struct udevice *dev;
- u8 fuses[128];
- int ret;
+ u8 data[4];
+ int ret, i;
- /* retrieve the device */
ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_efuse), );
if (ret) {
@@ -64,21 +54,20 @@ static int dump_efuses(struct cmd_tbl *cmdtp, int flag,
return 0;
}
- ret = misc_read(dev, 0, , sizeof(fuses));
- if (ret < 0) {
- printf("%s: misc_read failed\n", __func__);
- return 0;
- }
+ for (i = 0; true; i += sizeof(data)) {
+ ret = misc_read(dev, i, , sizeof(data));
+ if (ret < 0)
+ return 0;
- printf("efuse-contents:\n");
- print_buffer(0, fuses, 1, 128, 16);
+ print_buffer(i, data, sizeof(data), 1, 1);
+ }
return 0;
}
U_BOOT_CMD(
- rk3399_dump_efuses, 1, 1, dump_efuses,
- "Dump the content of the efuses",
+ dump_efuse, 1, 1, dump_efuse,
+ "Dump the content of the efuse",
""
);
#endif
@@ -86,43 +75,25 @@ U_BOOT_CMD(
static int rockchip_rk3399_efuse_read(struct udevice *dev, int offset,
void *buf, int size)
{
- struct rockchip_efuse_plat *plat = dev_get_plat(dev);
- struct rockchip_efuse_regs *efuse =
- (struct rockchip_efuse_regs *)plat->base;
-
- unsigned int addr_start, addr_end, addr_offset;
- u32 out_value;
- u8 bytes[RK3399_NFUSES * RK3399_BYTES_PER_FUSE];
- int i = 0;
- u32 addr;
-
- addr_start = offset / RK3399_BYTES_PER_FUSE;
- addr_offset = offset % RK3399_BYTES_PER_FUSE;
- addr_end = DIV_ROUND_UP(offset + size, RK3399_BYTES_PER_FUSE);
-
- /* cap to the size of the efuse block */
- if (addr_end > RK3399_NFUSES)
- addr_end = RK3399_NFUSES;
+ struct rockchip_efuse_plat *efuse = dev_get_plat(dev);
+ u32 *buffer = buf;
+ /* Switch to array read mode */
writel(RK3399_LOAD | RK3399_PGENB | RK3399_STROBSFTSEL | RK3399_RSB,
- >ctrl);
+ efuse->base + EFUSE_CTRL);
udelay(1);
- for (addr = addr_start; addr < addr_end; addr++) {
- setbits_le32(>ctrl,
-
[PATCH 06/11] rockchip: efuse: Add support for RK3288 and more
Add support for rk3066a, rk3188, rk322x and rk3288 compatible.
Signed-off-by: Jonas Karlman
---
drivers/misc/Kconfig | 4 ---
drivers/misc/rockchip-efuse.c | 68 ++-
2 files changed, 60 insertions(+), 12 deletions(-)
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index b07261d3db5a..b5707a15c504 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -92,10 +92,6 @@ config ROCKCHIP_EFUSE
or through child-nodes that are generated based on the e-fuse map
retrieved from the DTS.
- This driver currently supports the RK3399 only, but can easily be
- extended (by porting the read function from the Linux kernel sources)
- to support other recent Rockchip devices.
-
config ROCKCHIP_OTP
bool "Rockchip OTP Support"
depends on MISC
diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 864c9c15bbe5..808246e92230 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -17,16 +17,19 @@
#include
#define EFUSE_CTRL 0x
+#define RK3288_A_SHIFT 6
+#define RK3288_A_MASK GENMASK(15, 6)
+#define RK3288_ADDR(n) ((n) << RK3288_A_SHIFT)
#define RK3399_A_SHIFT 16
#define RK3399_A_MASK GENMASK(25, 16)
#define RK3399_ADDR(n) ((n) << RK3399_A_SHIFT)
#define RK3399_STROBSFTSEL BIT(9)
#define RK3399_RSB BIT(7)
#define RK3399_PD BIT(5)
-#define RK3399_PGENB BIT(3)
-#define RK3399_LOADBIT(2)
-#define RK3399_STROBE BIT(1)
-#define RK3399_CSB BIT(0)
+#define EFUSE_PGENBBIT(3)
+#define EFUSE_LOAD BIT(2)
+#define EFUSE_STROBE BIT(1)
+#define EFUSE_CSB BIT(0)
#define EFUSE_DOUT 0x0004
struct rockchip_efuse_plat {
@@ -72,6 +75,34 @@ U_BOOT_CMD(
);
#endif
+static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset,
+ void *buf, int size)
+{
+ struct rockchip_efuse_plat *efuse = dev_get_plat(dev);
+ u8 *buffer = buf;
+
+ /* Switch to read mode */
+ writel(EFUSE_CSB, efuse->base + EFUSE_CTRL);
+ writel(EFUSE_LOAD | EFUSE_PGENB, efuse->base + EFUSE_CTRL);
+ udelay(2);
+
+ while (size--) {
+ clrsetbits_le32(efuse->base + EFUSE_CTRL, RK3288_A_MASK,
+ RK3288_ADDR(offset++));
+ udelay(2);
+ setbits_le32(efuse->base + EFUSE_CTRL, EFUSE_STROBE);
+ udelay(2);
+ *buffer++ = readb(efuse->base + EFUSE_DOUT);
+ clrbits_le32(efuse->base + EFUSE_CTRL, EFUSE_STROBE);
+ udelay(2);
+ }
+
+ /* Switch to standby mode */
+ writel(EFUSE_CSB | EFUSE_PGENB, efuse->base + EFUSE_CTRL);
+
+ return 0;
+}
+
static int rockchip_rk3399_efuse_read(struct udevice *dev, int offset,
void *buf, int size)
{
@@ -79,21 +110,21 @@ static int rockchip_rk3399_efuse_read(struct udevice *dev,
int offset,
u32 *buffer = buf;
/* Switch to array read mode */
- writel(RK3399_LOAD | RK3399_PGENB | RK3399_STROBSFTSEL | RK3399_RSB,
+ writel(EFUSE_LOAD | EFUSE_PGENB | RK3399_STROBSFTSEL | RK3399_RSB,
efuse->base + EFUSE_CTRL);
udelay(1);
while (size--) {
setbits_le32(efuse->base + EFUSE_CTRL,
-RK3399_STROBE | RK3399_ADDR(offset++));
+EFUSE_STROBE | RK3399_ADDR(offset++));
udelay(1);
*buffer++ = readl(efuse->base + EFUSE_DOUT);
- clrbits_le32(efuse->base + EFUSE_CTRL, RK3399_STROBE);
+ clrbits_le32(efuse->base + EFUSE_CTRL, EFUSE_STROBE);
udelay(1);
}
/* Switch to power-down mode */
- writel(RK3399_PD | RK3399_CSB, efuse->base + EFUSE_CTRL);
+ writel(RK3399_PD | EFUSE_CSB, efuse->base + EFUSE_CTRL);
return 0;
}
@@ -146,6 +177,11 @@ static int rockchip_efuse_of_to_plat(struct udevice *dev)
return 0;
}
+static const struct rockchip_efuse_data rk3288_data = {
+ .read = rockchip_rk3288_efuse_read,
+ .size = 0x20,
+};
+
static const struct rockchip_efuse_data rk3399_data = {
.read = rockchip_rk3399_efuse_read,
.size = 0x80,
@@ -153,6 +189,22 @@ static const struct rockchip_efuse_data rk3399_data = {
};
static const struct udevice_id rockchip_efuse_ids[] = {
+ {
+ .compatible = "rockchip,rk3066a-efuse",
+ .data = (ulong)_data,
+ },
+ {
+ .compatible = "rockchip,rk3188-efuse",
+ .data = (ulong)_data,
+ },
+ {
+ .compatible = "rockchip,rk3228-efuse",
+ .data = (ulong)_data,
+ },
+ {
+ .compatible =
[PATCH 07/11] rockchip: efuse: Add support for RK3328
Add support for rk3328 compatible.
Signed-off-by: Jonas Karlman
---
drivers/misc/rockchip-efuse.c | 45 +++
1 file changed, 45 insertions(+)
diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 808246e92230..7aa3dc1b3868 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -13,6 +13,7 @@
#include
#include
#include
+#include
#include
#include
@@ -31,6 +32,12 @@
#define EFUSE_STROBE BIT(1)
#define EFUSE_CSB BIT(0)
#define EFUSE_DOUT 0x0004
+#define RK3328_INT_STATUS 0x0018
+#define RK3328_INT_FINISH BIT(0)
+#define RK3328_DOUT0x0020
+#define RK3328_AUTO_CTRL 0x0024
+#define RK3328_AUTO_RD BIT(1)
+#define RK3328_AUTO_ENBBIT(0)
struct rockchip_efuse_plat {
void __iomem *base;
@@ -38,6 +45,7 @@ struct rockchip_efuse_plat {
struct rockchip_efuse_data {
int (*read)(struct udevice *dev, int offset, void *buf, int size);
+ int offset;
int size;
int block_size;
};
@@ -103,6 +111,30 @@ static int rockchip_rk3288_efuse_read(struct udevice *dev,
int offset,
return 0;
}
+static int rockchip_rk3328_efuse_read(struct udevice *dev, int offset,
+ void *buf, int size)
+{
+ struct rockchip_efuse_plat *efuse = dev_get_plat(dev);
+ u32 status, *buffer = buf;
+ int ret;
+
+ while (size--) {
+ writel(RK3328_AUTO_RD | RK3328_AUTO_ENB | RK3399_ADDR(offset++),
+ efuse->base + RK3328_AUTO_CTRL);
+ udelay(1);
+
+ ret = readl_poll_sleep_timeout(efuse->base + RK3328_INT_STATUS,
+ status, (status & RK3328_INT_FINISH), 1, 50);
+ if (ret)
+ return ret;
+
+ *buffer++ = readl(efuse->base + RK3328_DOUT);
+ writel(RK3328_INT_FINISH, efuse->base + RK3328_INT_STATUS);
+ }
+
+ return 0;
+}
+
static int rockchip_rk3399_efuse_read(struct udevice *dev, int offset,
void *buf, int size)
{
@@ -144,6 +176,8 @@ static int rockchip_efuse_read(struct udevice *dev, int
offset,
if (!data->read)
return -ENOSYS;
+ offset += data->offset;
+
if (data->block_size <= 1)
return data->read(dev, offset, buf, size);
@@ -182,6 +216,13 @@ static const struct rockchip_efuse_data rk3288_data = {
.size = 0x20,
};
+static const struct rockchip_efuse_data rk3328_data = {
+ .read = rockchip_rk3328_efuse_read,
+ .offset = 0x60,
+ .size = 0x20,
+ .block_size = 4,
+};
+
static const struct rockchip_efuse_data rk3399_data = {
.read = rockchip_rk3399_efuse_read,
.size = 0x80,
@@ -205,6 +246,10 @@ static const struct udevice_id rockchip_efuse_ids[] = {
.compatible = "rockchip,rk3288-efuse",
.data = (ulong)_data,
},
+ {
+ .compatible = "rockchip,rk3328-efuse",
+ .data = (ulong)_data,
+ },
{
.compatible = "rockchip,rk3399-efuse",
.data = (ulong)_data,
--
2.39.1
[PATCH 03/11] rockchip: otp: Add support for RK3588
Add support for rk3588 compatible.
Adjust offset using driver data in main read op.
Signed-off-by: Jonas Karlman
---
drivers/misc/rockchip-otp.c | 63 +
1 file changed, 57 insertions(+), 6 deletions(-)
diff --git a/drivers/misc/rockchip-otp.c b/drivers/misc/rockchip-otp.c
index 243c173cdb18..babb6ce2f241 100644
--- a/drivers/misc/rockchip-otp.c
+++ b/drivers/misc/rockchip-otp.c
@@ -48,28 +48,41 @@
#define OTPC_TIMEOUT 1
+#define RK3588_OTPC_AUTO_CTRL 0x0004
+#define RK3588_ADDR_SHIFT 16
+#define RK3588_ADDR(n) ((n) << RK3588_ADDR_SHIFT)
+#define RK3588_BURST_SHIFT 8
+#define RK3588_BURST(n)((n) << RK3588_BURST_SHIFT)
+#define RK3588_OTPC_AUTO_EN0x0008
+#define RK3588_AUTO_EN BIT(0)
+#define RK3588_OTPC_DOUT0 0x0020
+#define RK3588_OTPC_INT_ST 0x0084
+#define RK3588_RD_DONE BIT(1)
+
struct rockchip_otp_plat {
void __iomem *base;
};
struct rockchip_otp_data {
int (*read)(struct udevice *dev, int offset, void *buf, int size);
+ int offset;
int size;
int block_size;
};
-static int rockchip_otp_poll_timeout(struct rockchip_otp_plat *otp, u32 flag)
+static int rockchip_otp_poll_timeout(struct rockchip_otp_plat *otp,
+u32 flag, u32 reg)
{
u32 status;
int ret;
- ret = readl_poll_sleep_timeout(otp->base + OTPC_INT_STATUS, status,
+ ret = readl_poll_sleep_timeout(otp->base + reg, status,
(status & flag), 1, OTPC_TIMEOUT);
if (ret)
return ret;
/* Clear int flag */
- writel(flag, otp->base + OTPC_INT_STATUS);
+ writel(flag, otp->base + reg);
return 0;
}
@@ -90,7 +103,7 @@ static int rockchip_otp_ecc_enable(struct rockchip_otp_plat
*otp, bool enable)
writel(SBPI_ENABLE_MASK | SBPI_ENABLE, otp->base + OTPC_SBPI_CTRL);
- return rockchip_otp_poll_timeout(otp, OTPC_SBPI_DONE);
+ return rockchip_otp_poll_timeout(otp, OTPC_SBPI_DONE, OTPC_INT_STATUS);
}
static int rockchip_px30_otp_read(struct udevice *dev, int offset,
@@ -113,7 +126,8 @@ static int rockchip_px30_otp_read(struct udevice *dev, int
offset,
writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK,
otp->base + OTPC_USER_ENABLE);
- ret = rockchip_otp_poll_timeout(otp, OTPC_USER_DONE);
+ ret = rockchip_otp_poll_timeout(otp, OTPC_USER_DONE,
+ OTPC_INT_STATUS);
if (ret)
goto read_end;
@@ -146,7 +160,8 @@ static int rockchip_rk3568_otp_read(struct udevice *dev,
int offset,
writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK,
otp->base + OTPC_USER_ENABLE);
- ret = rockchip_otp_poll_timeout(otp, OTPC_USER_DONE);
+ ret = rockchip_otp_poll_timeout(otp, OTPC_USER_DONE,
+ OTPC_INT_STATUS);
if (ret)
goto read_end;
@@ -159,6 +174,29 @@ read_end:
return ret;
}
+static int rockchip_rk3588_otp_read(struct udevice *dev, int offset,
+ void *buf, int size)
+{
+ struct rockchip_otp_plat *otp = dev_get_plat(dev);
+ u32 *buffer = buf;
+ int ret;
+
+ while (size--) {
+ writel(RK3588_ADDR(offset++) | RK3588_BURST(1),
+ otp->base + RK3588_OTPC_AUTO_CTRL);
+ writel(RK3588_AUTO_EN, otp->base + RK3588_OTPC_AUTO_EN);
+
+ ret = rockchip_otp_poll_timeout(otp, RK3588_RD_DONE,
+ RK3588_OTPC_INT_ST);
+ if (ret)
+ return ret;
+
+ *buffer++ = readl(otp->base + RK3588_OTPC_DOUT0);
+ }
+
+ return 0;
+}
+
static int rockchip_otp_read(struct udevice *dev, int offset,
void *buf, int size)
{
@@ -174,6 +212,8 @@ static int rockchip_otp_read(struct udevice *dev, int
offset,
if (!data->read)
return -ENOSYS;
+ offset += data->offset;
+
if (data->block_size <= 1)
return data->read(dev, offset, buf, size);
@@ -218,6 +258,13 @@ static const struct rockchip_otp_data rk3568_data = {
.block_size = 2,
};
+static const struct rockchip_otp_data rk3588_data = {
+ .read = rockchip_rk3588_otp_read,
+ .offset = 0xC00,
+ .size = 0x400,
+ .block_size = 4,
+};
+
static const struct udevice_id rockchip_otp_ids[] = {
{
.compatible = "rockchip,px30-otp",
@@ -231,6 +278,10 @@ static const struct udevice_id rockchip_otp_ids[] = {
.compatible = "rockchip,rk3568-otp",
[PATCH 00/11] rockchip: Add efuse and otp support to more SoCs
This series refactors and add support for more SoCs to the rockchip efuse and otp driver. Support is added for the following SoCs: - efuse: RK3036, RK3066, RK3128, RK3188, RK3228, RK3288 and RK3328 - otp: RK3568 and RK3588 This also changes so that eth1addr is also set when there is a ethernet1 alias in the fdt. And a small change so that ethernet addresses is set based on CONFIG_HASH and CONFIG_SHA256 instead of CONFIG_CMD_NET. I have only been able to test the efuse driver on RK3288, RK3328, RK3399 and the otp driver on RK3568 and RK3588. Information on the remaining SoCs is based on information at [1], [2] and in TRM. The final patch enables use of the otp driver for RK3568. To handle this SoCs unique cpuid offset a new const CFG_CPUID_OFFSET was added. Ideally, we should get this cpuid offset from the id node in the fdt. Maybe adding a custom ioctl that these drivers support and misc.c can call to get the cpuid. Something that can be improved in a future series. This series can also be found at [3]. [1] https://github.com/rockchip-linux/kernel/blob/release-3.10/arch/arm/mach-rockchip/efuse.c [2] https://github.com/rockchip-linux/kernel/blob/develop-5.10/drivers/nvmem/rockchip-otp.c [2] https://github.com/Kwiboo/u-boot-rockchip/commits/rk3568-efuse-otp Jonas Karlman (11): rockchip: otp: Refactor to use driver data and ops rockchip: otp: Add support for RK3568 rockchip: otp: Add support for RK3588 rockchip: otp: Add dump_otp debug command rockchip: efuse: Refactor to use driver data and ops rockchip: efuse: Add support for RK3288 and more rockchip: efuse: Add support for RK3328 rockchip: efuse: Add support for RK3128 rockchip: efuse: Add support for RK3036 rockchip: misc: Set eth1addr mac address rockchip: rk3568: Read cpuid from otp arch/arm/dts/rk356x-u-boot.dtsi | 12 ++ arch/arm/mach-rockchip/Kconfig| 2 + arch/arm/mach-rockchip/board.c| 2 +- arch/arm/mach-rockchip/misc.c | 10 +- drivers/misc/Kconfig | 4 - drivers/misc/rockchip-efuse.c | 333 +++--- drivers/misc/rockchip-otp.c | 230 + include/configs/rk3568_common.h | 3 + include/configs/rockchip-common.h | 2 + 9 files changed, 480 insertions(+), 118 deletions(-) -- 2.39.1
[PATCH 04/11] rockchip: otp: Add dump_otp debug command
Add a simple debug command to dump the content of the otp.
Signed-off-by: Jonas Karlman
---
drivers/misc/rockchip-otp.c | 35 +++
1 file changed, 35 insertions(+)
diff --git a/drivers/misc/rockchip-otp.c b/drivers/misc/rockchip-otp.c
index babb6ce2f241..c41f0a606258 100644
--- a/drivers/misc/rockchip-otp.c
+++ b/drivers/misc/rockchip-otp.c
@@ -5,6 +5,8 @@
#include
#include
+#include
+#include
#include
#include
#include
@@ -70,6 +72,39 @@ struct rockchip_otp_data {
int block_size;
};
+#if defined(DEBUG)
+static int dump_otp(struct cmd_tbl *cmdtp, int flag,
+ int argc, char *const argv[])
+{
+ struct udevice *dev;
+ u8 data[4];
+ int ret, i;
+
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
+ DM_DRIVER_GET(rockchip_otp), );
+ if (ret) {
+ printf("%s: no misc-device found\n", __func__);
+ return 0;
+ }
+
+ for (i = 0; true; i += sizeof(data)) {
+ ret = misc_read(dev, i, , sizeof(data));
+ if (ret < 0)
+ return 0;
+
+ print_buffer(i, data, sizeof(data), 1, 1);
+ }
+
+ return 0;
+}
+
+U_BOOT_CMD(
+ dump_otp, 1, 1, dump_otp,
+ "Dump the content of the otp",
+ ""
+);
+#endif
+
static int rockchip_otp_poll_timeout(struct rockchip_otp_plat *otp,
u32 flag, u32 reg)
{
--
2.39.1
[PATCH 02/11] rockchip: otp: Add support for RK3568
Add support for rk3568 compatible.
Handle allocation of an aligned bounce buffer in main read op in order
to keep the SoC unique read op simple.
Signed-off-by: Jonas Karlman
---
drivers/misc/rockchip-otp.c | 67 -
1 file changed, 66 insertions(+), 1 deletion(-)
diff --git a/drivers/misc/rockchip-otp.c b/drivers/misc/rockchip-otp.c
index a6df0834ebbc..243c173cdb18 100644
--- a/drivers/misc/rockchip-otp.c
+++ b/drivers/misc/rockchip-otp.c
@@ -9,6 +9,7 @@
#include
#include
#include
+#include
#include
/* OTP Register Offsets */
@@ -54,6 +55,7 @@ struct rockchip_otp_plat {
struct rockchip_otp_data {
int (*read)(struct udevice *dev, int offset, void *buf, int size);
int size;
+ int block_size;
};
static int rockchip_otp_poll_timeout(struct rockchip_otp_plat *otp, u32 flag)
@@ -124,11 +126,47 @@ read_end:
return ret;
}
+static int rockchip_rk3568_otp_read(struct udevice *dev, int offset,
+ void *buf, int size)
+{
+ struct rockchip_otp_plat *otp = dev_get_plat(dev);
+ u16 *buffer = buf;
+ int ret;
+
+ ret = rockchip_otp_ecc_enable(otp, false);
+ if (ret)
+ return ret;
+
+ writel(OTPC_USE_USER | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
+ udelay(5);
+
+ while (size--) {
+ writel(offset++ | OTPC_USER_ADDR_MASK,
+ otp->base + OTPC_USER_ADDR);
+ writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK,
+ otp->base + OTPC_USER_ENABLE);
+
+ ret = rockchip_otp_poll_timeout(otp, OTPC_USER_DONE);
+ if (ret)
+ goto read_end;
+
+ *buffer++ = readw(otp->base + OTPC_USER_Q);
+ }
+
+read_end:
+ writel(0x0 | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
+
+ return ret;
+}
+
static int rockchip_otp_read(struct udevice *dev, int offset,
void *buf, int size)
{
const struct rockchip_otp_data *data =
(void *)dev_get_driver_data(dev);
+ u32 block_start, block_end, block_offset, blocks;
+ u8 *buffer;
+ int ret;
if (offset < 0 || !buf || size <= 0 || offset + size > data->size)
return -EINVAL;
@@ -136,7 +174,24 @@ static int rockchip_otp_read(struct udevice *dev, int
offset,
if (!data->read)
return -ENOSYS;
- return data->read(dev, offset, buf, size);
+ if (data->block_size <= 1)
+ return data->read(dev, offset, buf, size);
+
+ block_start = offset / data->block_size;
+ block_offset = offset % data->block_size;
+ block_end = DIV_ROUND_UP(offset + size, data->block_size);
+ blocks = block_end - block_start;
+
+ buffer = calloc(blocks, data->block_size);
+ if (!buffer)
+ return -ENOMEM;
+
+ ret = data->read(dev, block_start, buffer, blocks);
+ if (!ret)
+ memcpy(buf, buffer + block_offset, size);
+
+ free(buffer);
+ return ret;
}
static const struct misc_ops rockchip_otp_ops = {
@@ -157,6 +212,12 @@ static const struct rockchip_otp_data px30_data = {
.size = 0x40,
};
+static const struct rockchip_otp_data rk3568_data = {
+ .read = rockchip_rk3568_otp_read,
+ .size = 0x80,
+ .block_size = 2,
+};
+
static const struct udevice_id rockchip_otp_ids[] = {
{
.compatible = "rockchip,px30-otp",
@@ -166,6 +227,10 @@ static const struct udevice_id rockchip_otp_ids[] = {
.compatible = "rockchip,rk3308-otp",
.data = (ulong)_data,
},
+ {
+ .compatible = "rockchip,rk3568-otp",
+ .data = (ulong)_data,
+ },
{}
};
--
2.39.1
[PATCH 01/11] rockchip: otp: Refactor to use driver data and ops
Refactor the driver to use driver data and ops to simplify handling
of SoCs that require a unique read op.
Use readl_poll_sleep_timeout instead of a custom poll loop, and add
validation of input parameter to main read op.
Signed-off-by: Jonas Karlman
---
drivers/misc/rockchip-otp.c | 83 +++--
1 file changed, 43 insertions(+), 40 deletions(-)
diff --git a/drivers/misc/rockchip-otp.c b/drivers/misc/rockchip-otp.c
index cc9a5450e0ce..a6df0834ebbc 100644
--- a/drivers/misc/rockchip-otp.c
+++ b/drivers/misc/rockchip-otp.c
@@ -5,10 +5,10 @@
#include
#include
-#include
#include
#include
#include
+#include
#include
/* OTP Register Offsets */
@@ -49,35 +49,31 @@
struct rockchip_otp_plat {
void __iomem *base;
- unsigned long secure_conf_base;
- unsigned long otp_mask_base;
};
-static int rockchip_otp_wait_status(struct rockchip_otp_plat *otp,
- u32 flag)
+struct rockchip_otp_data {
+ int (*read)(struct udevice *dev, int offset, void *buf, int size);
+ int size;
+};
+
+static int rockchip_otp_poll_timeout(struct rockchip_otp_plat *otp, u32 flag)
{
- int delay = OTPC_TIMEOUT;
-
- while (!(readl(otp->base + OTPC_INT_STATUS) & flag)) {
- udelay(1);
- delay--;
- if (delay <= 0) {
- printf("%s: wait init status timeout\n", __func__);
- return -ETIMEDOUT;
- }
- }
+ u32 status;
+ int ret;
+
+ ret = readl_poll_sleep_timeout(otp->base + OTPC_INT_STATUS, status,
+ (status & flag), 1, OTPC_TIMEOUT);
+ if (ret)
+ return ret;
- /* clean int status */
+ /* Clear int flag */
writel(flag, otp->base + OTPC_INT_STATUS);
return 0;
}
-static int rockchip_otp_ecc_enable(struct rockchip_otp_plat *otp,
- bool enable)
+static int rockchip_otp_ecc_enable(struct rockchip_otp_plat *otp, bool enable)
{
- int ret = 0;
-
writel(SBPI_DAP_ADDR_MASK | (SBPI_DAP_ADDR << SBPI_DAP_ADDR_SHIFT),
otp->base + OTPC_SBPI_CTRL);
@@ -92,11 +88,7 @@ static int rockchip_otp_ecc_enable(struct rockchip_otp_plat
*otp,
writel(SBPI_ENABLE_MASK | SBPI_ENABLE, otp->base + OTPC_SBPI_CTRL);
- ret = rockchip_otp_wait_status(otp, OTPC_SBPI_DONE);
- if (ret < 0)
- printf("%s timeout during ecc_enable\n", __func__);
-
- return ret;
+ return rockchip_otp_poll_timeout(otp, OTPC_SBPI_DONE);
}
static int rockchip_px30_otp_read(struct udevice *dev, int offset,
@@ -104,27 +96,24 @@ static int rockchip_px30_otp_read(struct udevice *dev, int
offset,
{
struct rockchip_otp_plat *otp = dev_get_plat(dev);
u8 *buffer = buf;
- int ret = 0;
+ int ret;
ret = rockchip_otp_ecc_enable(otp, false);
- if (ret < 0) {
- printf("%s rockchip_otp_ecc_enable err\n", __func__);
+ if (ret)
return ret;
- }
writel(OTPC_USE_USER | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
udelay(5);
+
while (size--) {
writel(offset++ | OTPC_USER_ADDR_MASK,
otp->base + OTPC_USER_ADDR);
writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK,
otp->base + OTPC_USER_ENABLE);
- ret = rockchip_otp_wait_status(otp, OTPC_USER_DONE);
- if (ret < 0) {
- printf("%s timeout during read setup\n", __func__);
+ ret = rockchip_otp_poll_timeout(otp, OTPC_USER_DONE);
+ if (ret)
goto read_end;
- }
*buffer++ = readb(otp->base + OTPC_USER_Q);
}
@@ -138,7 +127,16 @@ read_end:
static int rockchip_otp_read(struct udevice *dev, int offset,
void *buf, int size)
{
- return rockchip_px30_otp_read(dev, offset, buf, size);
+ const struct rockchip_otp_data *data =
+ (void *)dev_get_driver_data(dev);
+
+ if (offset < 0 || !buf || size <= 0 || offset + size > data->size)
+ return -EINVAL;
+
+ if (!data->read)
+ return -ENOSYS;
+
+ return data->read(dev, offset, buf, size);
}
static const struct misc_ops rockchip_otp_ops = {
@@ -147,21 +145,26 @@ static const struct misc_ops rockchip_otp_ops = {
static int rockchip_otp_of_to_plat(struct udevice *dev)
{
- struct rockchip_otp_plat *otp = dev_get_plat(dev);
+ struct rockchip_otp_plat *plat = dev_get_plat(dev);
- otp->base = dev_read_addr_ptr(dev);
+ plat->base = dev_read_addr_ptr(dev);
return 0;
}
+static const struct rockchip_otp_data px30_data = {
+ .read = rockchip_px30_otp_read,
+ .size = 0x40,
+};
+
static const struct udevice_id
[PATCH] m68k: dts: stmark2: set correct compatible field for spi nor
From: Angelo Durgehello
Fix error:
Invalid chip select 0:1 (err=-19)
update spi nor "compatible" property with "jedec,spi-nor"
to have spi nor properly bound as a child device.
Signed-off-by: Angelo Durgehello
---
arch/m68k/dts/stmark2.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/m68k/dts/stmark2.dts b/arch/m68k/dts/stmark2.dts
index 306b56d679..3688651e59 100644
--- a/arch/m68k/dts/stmark2.dts
+++ b/arch/m68k/dts/stmark2.dts
@@ -27,7 +27,7 @@
flash: is25lp128@1 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "spi-flash";
+ compatible = "jedec,spi-nor";
spi-max-frequency = <6000>;
reg = <1>;
};
--
2.39.1
[PATCH] samsung: common: ignore if CROS EC is not supported
If the CROS device class is not compiled in, uclass returns not
supported. Ignore this case as well.
This avoids boot failures on ODROID-XU4 without CONFIG_CROS_EC
ending with:
cros-ec communications failure -96
Please reset with Power+Refresh
Cannot init cros-ec device
Signed-off-by: Stefan Agner
---
board/samsung/common/board.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index 16ce5cb892..663d7ca991 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -223,7 +223,7 @@ int board_late_init(void)
char mmcbootdev_str[16];
ret = uclass_first_device_err(UCLASS_CROS_EC, );
- if (ret && ret != -ENODEV) {
+ if (ret && ret != -ENODEV && ret != -EPFNOSUPPORT) {
/* Force console on */
gd->flags &= ~GD_FLG_SILENT;
--
2.39.1
Re: [PATCH V2 4/9] arm64: dts: rockchip: Sync rk356x from Linux main
On 2023-02-13 23:27, Chris Morgan wrote:
> From: Chris Morgan
>
> Sync rk3566 and rk3568 from the mainline Linux kernel (6.2-rc2 as of
> this writing).
>
> Note that this will rename the rk3568-evb to rk3568-evb1-v10.
Is the rename and sync of evb-rk3568 necessary for your use case?
I tend to abuse the evb variants as "minimal" soc defconfig. They
usually contain minimal needed to boot any board following the reference
design from sd or emmc.
Using the current evb-rk3568_defconfig and rk3568-evb.dts I can boot,
load atf and start linux on all my rk3566/rk3568 boards. Not sure that
will continue to be possible after these changes.
Regards,
Jonas
>
> Signed-off-by: Chris Morgan
> ---
> arch/arm/dts/Makefile | 2 +-
> arch/arm/dts/rk3568-evb.dts | 79 --
> ...-boot.dtsi => rk3568-evb1-v10-u-boot.dtsi} | 0
> arch/arm/dts/rk3568-evb1-v10.dts | 692 ++
> arch/arm/dts/rk3568.dtsi | 122 +++
> arch/arm/dts/rk356x.dtsi | 182 -
> ...68_defconfig => evb1-v10-rk3568_defconfig} | 4 +-
> 7 files changed, 985 insertions(+), 96 deletions(-)
> delete mode 100644 arch/arm/dts/rk3568-evb.dts
> rename arch/arm/dts/{rk3568-evb-u-boot.dtsi => rk3568-evb1-v10-u-boot.dtsi}
> (100%)
> create mode 100644 arch/arm/dts/rk3568-evb1-v10.dts
> rename configs/{evb-rk3568_defconfig => evb1-v10-rk3568_defconfig} (94%)
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 9d647b9639..56e0543bd2 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -165,7 +165,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
> rk3399pro-rock-pi-n10.dtb
>
> dtb-$(CONFIG_ROCKCHIP_RK3568) += \
> - rk3568-evb.dtb
> + rk3568-evb1-v10.dtb
>
> dtb-$(CONFIG_ROCKCHIP_RV1108) += \
> rv1108-elgin-r1.dtb \
> diff --git a/arch/arm/dts/rk3568-evb.dts b/arch/arm/dts/rk3568-evb.dts
> deleted file mode 100644
> index 6978655709..00
> --- a/arch/arm/dts/rk3568-evb.dts
> +++ /dev/null
> @@ -1,79 +0,0 @@
> -// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> -/*
> - * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
> - *
> - */
> -
> -/dts-v1/;
> -#include
> -#include
> -#include "rk3568.dtsi"
> -
> -/ {
> - model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
> - compatible = "rockchip,rk3568-evb1-v10", "rockchip,rk3568";
> -
> - chosen: chosen {
> - stdout-path = "serial2:150n8";
> - };
> -
> - dc_12v: dc-12v {
> - compatible = "regulator-fixed";
> - regulator-name = "dc_12v";
> - regulator-always-on;
> - regulator-boot-on;
> - regulator-min-microvolt = <1200>;
> - regulator-max-microvolt = <1200>;
> - };
> -
> - vcc3v3_sys: vcc3v3-sys {
> - compatible = "regulator-fixed";
> - regulator-name = "vcc3v3_sys";
> - regulator-always-on;
> - regulator-boot-on;
> - regulator-min-microvolt = <330>;
> - regulator-max-microvolt = <330>;
> - vin-supply = <_12v>;
> - };
> -
> - vcc5v0_sys: vcc5v0-sys {
> - compatible = "regulator-fixed";
> - regulator-name = "vcc5v0_sys";
> - regulator-always-on;
> - regulator-boot-on;
> - regulator-min-microvolt = <500>;
> - regulator-max-microvolt = <500>;
> - vin-supply = <_12v>;
> - };
> -
> - vcc3v3_lcd0_n: vcc3v3-lcd0-n {
> - compatible = "regulator-fixed";
> - regulator-name = "vcc3v3_lcd0_n";
> - regulator-boot-on;
> -
> - regulator-state-mem {
> - regulator-off-in-suspend;
> - };
> - };
> -
> - vcc3v3_lcd1_n: vcc3v3-lcd1-n {
> - compatible = "regulator-fixed";
> - regulator-name = "vcc3v3_lcd1_n";
> - regulator-boot-on;
> -
> - regulator-state-mem {
> - regulator-off-in-suspend;
> - };
> - };
> -};
> -
> - {
> - bus-width = <8>;
> - max-frequency = <2>;
> - non-removable;
> - status = "okay";
> -};
> -
> - {
> - status = "okay";
> -};
> diff --git a/arch/arm/dts/rk3568-evb-u-boot.dtsi
> b/arch/arm/dts/rk3568-evb1-v10-u-boot.dtsi
> similarity index 100%
> rename from arch/arm/dts/rk3568-evb-u-boot.dtsi
> rename to arch/arm/dts/rk3568-evb1-v10-u-boot.dtsi
> diff --git a/arch/arm/dts/rk3568-evb1-v10.dts
> b/arch/arm/dts/rk3568-evb1-v10.dts
> new file mode 100644
> index 00..674792567f
> --- /dev/null
> +++ b/arch/arm/dts/rk3568-evb1-v10.dts
> @@ -0,0 +1,692 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
> + *
> + */
> +
> +/dts-v1/;
> +#include
> +#include
> +#include
> +#include
> +#include "rk3568.dtsi"
> +
> +/ {
> + model = "Rockchip RK3568 EVB1 DDR4
[PATCH] mx6sxsabreauto: Remove myself from MAINTAINERS
I don't have access to the mx6sxsabreauto board, so remove myself from the MAINTAINERS entry and add Peng instead. Signed-off-by: Fabio Estevam --- board/freescale/mx6sxsabreauto/MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/freescale/mx6sxsabreauto/MAINTAINERS b/board/freescale/mx6sxsabreauto/MAINTAINERS index 692bbd9767..8dc62e5e3e 100644 --- a/board/freescale/mx6sxsabreauto/MAINTAINERS +++ b/board/freescale/mx6sxsabreauto/MAINTAINERS @@ -1,5 +1,5 @@ MX6SXSABREAUTO BOARD -M: Fabio Estevam +M: Peng Fan S: Maintained F: board/freescale/mx6sxsabreauto/ F: include/configs/mx6sxsabreauto.h -- 2.25.1
Re: [PATCH V2 5/9] rockchip: rk3568: add boot device detection
Hi Chris,
On 2023-02-13 23:27, Chris Morgan wrote:
> From: Chris Morgan
>
> Enable spl to detect which device it was booted from.
>
> Signed-off-by: Peter Geis
> Signed-off-by: Chris Morgan
> ---
> arch/arm/mach-rockchip/rk3568/rk3568.c | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c
> b/arch/arm/mach-rockchip/rk3568/rk3568.c
> index 22eeb77d41..a2d59abc26 100644
> --- a/arch/arm/mach-rockchip/rk3568/rk3568.c
> +++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
> @@ -7,6 +7,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -70,6 +71,12 @@ static struct mm_region rk3568_mem_map[] = {
> }
> };
>
> +const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
> + [BROM_BOOTSOURCE_EMMC] = "/sdhci@fe31",
This should be mmc@@fe31.
Regards,
Jonas
> + [BROM_BOOTSOURCE_SPINOR] = "/spi@fe30/flash@0",
> + [BROM_BOOTSOURCE_SD] = "/mmc@fe2b",
> +};
> +
> struct mm_region *mem_map = rk3568_mem_map;
>
> void board_debug_uart_init(void)
Re: [PATCH v2 6/6] RFC: binman: Improve allow missing for mkimage entry
Hi Simon,
On 2023-02-14 20:48, Simon Glass wrote:
> Hi Jonas,
>
> On Tue, 14 Feb 2023 at 03:34, Jonas Karlman wrote:
>>
>> Implement CheckMissing and CheckOptional methods that is adapted to
>> Entry_mkimage in order to improve support for allow missing flag.
>>
>> Use collect_contents_to_file in multiple-data-files handling to improve
>> support for allow missing and fake blobs handling.
>>
>> Signed-off-by: Jonas Karlman
>> ---
>> Building for RK3568 without ROCKCHIP_TPL will result in the following
>> error message, regardless if BINMAN_ALLOW_MISSING is used or not.
>>
>> binman: Filename 'rockchip-tpl' not found in input path (...)
>>
>> With this patch and using BINMAN_ALLOW_MISSING=1 a new external blob
>> with no content is created and then passed to mkimage, resulting in an
>> error from the mkimage command.
>>
>> binman: Error 255 running 'mkimage -d
>> ./mkimage-0.simple-bin.mkimage:./mkimage-1.simple-bin.mkimage -n rk3568 -T
>> rksd ./idbloader.img': mkimage: Can't read ./mkimage-0.simple-bin.mkimage:
>> Invalid argument
>>
>> If the --fake-ext-blobs argument is also used I get the message I was
>> expecting to see from the beginning.
>>
>> Image 'main-section' is missing external blobs and is non-functional:
>> rockchip-tpl
>>
>> /binman/simple-bin/mkimage/rockchip-tpl:
>> An external TPL is required to initialize DRAM. Get the external TPL
>> binary and build with ROCKCHIP_TPL=/path/to/ddr.bin. One possible source
>> for the external TPL binary is
>> https://github.com/rockchip-linux/rkbin>>> Image 'main-section' has faked
>> external blobs and is non-functional: rockchip-tpl
>>
>> Some images are invalid
>>
>> Not sure how this should work, but I was expecting to see the message
>> about the missing rockchip-tpl from the beginning instead of the generic
>> "not found in input path" message. At leas with BINMAN_ALLOW_MISSING=1.
>>
>> tools/binman/etype/mkimage.py | 37 +++
>> 1 file changed, 33 insertions(+), 4 deletions(-)
>>
>> diff --git a/tools/binman/etype/mkimage.py b/tools/binman/etype/mkimage.py
>> index cb264c3cad0b..44510a8c40ba 100644
>> --- a/tools/binman/etype/mkimage.py
>> +++ b/tools/binman/etype/mkimage.py
>> @@ -153,10 +153,12 @@ class Entry_mkimage(Entry):
>> if self._multiple_data_files:
>> fnames = []
>> uniq = self.GetUniqueName()
>> -for entry in self._mkimage_entries.values():
>> -if not entry.ObtainContents(fake_size=fake_size):
>> +for idx, entry in enumerate(self._mkimage_entries.values()):
>> +entry_data, entry_fname, _ = self.collect_contents_to_file(
>> +[entry], 'mkimage-%s' % idx, fake_size)
>> +if entry_data is None:
>
> This is OK, I suppose, but I'm not quite sure what actually changes
> here, other than writing each entry to a file?
The collect_contents_to_file function seemed to handle the
external/missing/optional/faked entry flags. So I changed to use that
function in order to see if that would change anything, see below.
Use of this function does make it possible to use entry type other
then external blobs, not sure if that would ever be needed/useful.
>
> Also, if you do this, please add / extend a test that checks that the
> output files are written, since there is otherwise no coverage here.
>
> What test uses these optional mkimage pieces?
Sorry, I was not clear enough about the reason for these changes in my
message above.
Building with --rockchip-tpl-path=/path/to/existing/tpl works as
expected and generates a working image.
I was expecting that the missing-blob-help message added in patch 1
would be shown by binman when rockchip-tpl-path was empty/not-existing,
or at least together with the allow-missing flag.
However, whatever I tested, empty/none-existing rockchip-tpl-path,
allow-missing, fake-ext-blobs, I was not able to see this message.
Instead, all I could get from binman was this "Filename 'rockchip-tpl'
not found in input path" message.
Maybe my assumptions about when these missing messages should be shown
is wrong?
Trying binman with the following two dts and --allow-missing gives
different results. First one shows the missing message, second one show
filename not found.
binman {
rockchip-tpl {
};
};
binman {
mkimage {
args = "-n rk3568 -T rksd";
multiple-data-files;
rockchip-tpl {
};
};
};
With the changes in this patch I instead get the missing message when I
also add the --fake-ext-blobs flag, so it clearly needs more work or
a completely different approach if we want to be able to see the missing
message added in patch 1.
Adding a message that never will be displayed annoys me :-)
Maybe I should just drop this rfc/patch for a v3 of this series?
Regards,
Jonas
>
>> return False
>> -
>>
[PATCH 2/2] pico-imx6: Pass the mmc alias to fix boot regression
Originally, the mmc aliases node was present in imx6qdl-pico.dtsi.
After the sync with Linux in commit d0399a46e7cd ("imx6dl/imx6qdl:
synchronise device trees with linux"), the aliases node is gone as
the upstream version does not have it.
This causes a boot regression in which the eMMC card cannot be found anymore.
Fix it by passing the alias node in the u-boot.dtsi file to
restore the original behaviour where the eMMC (esdhc3) was
mapped to mmc0.
Fixes: d0399a46e7cd ("imx6dl/imx6qdl: synchronise device trees with linux")
Signed-off-by: Fabio Estevam
---
arch/arm/dts/imx6dl-pico-u-boot.dtsi | 7 +++
1 file changed, 7 insertions(+)
create mode 100644 arch/arm/dts/imx6dl-pico-u-boot.dtsi
diff --git a/arch/arm/dts/imx6dl-pico-u-boot.dtsi
b/arch/arm/dts/imx6dl-pico-u-boot.dtsi
new file mode 100644
index 00..e2ef9bcc14
--- /dev/null
+++ b/arch/arm/dts/imx6dl-pico-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+
+/ {
+ aliases {
+ mmc0 =
+ };
+};
--
2.25.1
[PATCH 1/2] pico-imx6: Add DM_SERIAL support
The conversion to DM_SERIAL is mandatory, so add support for it. Signed-off-by: Fabio Estevam --- configs/pico-imx6_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig index a6ed013f8b..f79b7ec520 100644 --- a/configs/pico-imx6_defconfig +++ b/configs/pico-imx6_defconfig @@ -83,6 +83,7 @@ CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y +CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_USB=y CONFIG_USB_GADGET=y -- 2.25.1
[PATCH] udoo: Add DM_SERIAL support
The conversion to DM_SERIAL is mandatory, so add support for it. Signed-off-by: Fabio Estevam --- configs/udoo_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index 0a3baec12e..20686298bd 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -55,5 +55,6 @@ CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_SCSI=y +CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_DM_THERMAL=y -- 2.25.1
[PATCH] mx6sxsabresd: Add DM_SERIAL support
The conversion to DM_SERIAL is mandatory, so add support for it. Signed-off-by: Fabio Estevam --- configs/mx6sxsabresd_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index c469084737..2e52e301ae 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -69,6 +69,7 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_PFUZE100=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_DM_SPI=y -- 2.25.1
[Patch] net: dwc_eth_qos - works with fixed-phy
Let the EQoS in imx8mp handle fixed-phy too.
Without that patch it lost track to the node to scan
speed and duplex.
Patch was created by Marek Vasut, just tested by me.
Signed-off-by: Elmar Psilog
---
drivers/net/dwc_eth_qos.c
1 file changed
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index afc47b56ff..10915d8e47 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -785,9 +785,21 @@ static int eqos_start(struct udevice *dev)
*/
if (!eqos->phy) {
int addr = -1;
- addr = eqos_get_phy_addr(eqos, dev);
- eqos->phy = phy_connect(eqos->mii, addr, dev,
- eqos->config->interface(dev));
+ ofnode fixed_node;
+
+ if (IS_ENABLED(CONFIG_PHY_FIXED)) {
+ fixed_node = ofnode_find_subnode(dev_ofnode(dev),
+ "fixed-link");
+ if (ofnode_valid(fixed_node)) {
+ eqos->phy =
fixed_phy_create(dev_ofnode(dev));
+ eqos->phy_of_node = fixed_node;
+ }
+ }
+ if (!eqos->phy) {
+ addr = eqos_get_phy_addr(eqos, dev);
+ eqos->phy = phy_connect(eqos->mii, addr, dev,
eqos->config->interface(dev));
+ }
+
if (!eqos->phy) {
pr_err("phy_connect() failed");
goto err_stop_resets;
[PATCH v3 1/1] cmd: ums: abort mounting by pressing any key
This patch introduses config which allows interrupt run of usb
mass storage with any key. This is especially useful on devices
with limited input capabilities like tablets and smatphones which
have only gpio keys in direct access.
Signed-off-by: Svyatoslav Ryhel
---
cmd/Kconfig| 6 ++
cmd/usb_mass_storage.c | 10 ++
2 files changed, 16 insertions(+)
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 2caa4af71c..920ea854b3 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1542,6 +1542,12 @@ config CMD_USB_MASS_STORAGE
export a block device: U-Boot, the USB device, acts as a simple
external hard drive plugged on the host USB port.
+config CMD_UMS_ABORT_KEYED
+ bool "UMS abort with any key"
+ depends on CMD_USB_MASS_STORAGE
+ help
+ Allow interruption of usb mass storage run with any key pressed.
+
config CMD_PVBLOCK
bool "Xen para-virtualized block device"
depends on XEN
diff --git a/cmd/usb_mass_storage.c b/cmd/usb_mass_storage.c
index b7daaa6e8e..c3cc1975f9 100644
--- a/cmd/usb_mass_storage.c
+++ b/cmd/usb_mass_storage.c
@@ -231,6 +231,16 @@ static int do_usb_mass_storage(struct cmd_tbl *cmdtp, int
flag,
goto cleanup_register;
}
+ if (IS_ENABLED(CONFIG_CMD_UMS_ABORT_KEYED)) {
+ /* Abort by pressing any key */
+ if (tstc()) {
+ getchar();
+ printf("\rOperation aborted.\n");
+ rc = CMD_RET_SUCCESS;
+ goto cleanup_register;
+ }
+ }
+
schedule();
}
--
2.25.1
[PATCH v3 0/1] CMD commands improvements
- add ability for 'ums' command to interrupt run of usb mass storage with any key. This is especially useful on devices with limited input capabilities like tablets and smatphones which have only gpio keys in direct access. Current implementation uses Kconfig entry. Changelog from v2 - fix stuck of ums due to getchar loop. Now getchar is called after tstc check. Changelog from v1 - 'continue' command commit was dropped as there already exists 'pause' command with same function. - UMS_ABORT_KEYED renamed to CMD_UMS_ABORT_KEYED Svyatoslav Ryhel (1): cmd: ums: abort mounting by pressing any key cmd/Kconfig| 6 ++ cmd/usb_mass_storage.c | 10 ++ 2 files changed, 16 insertions(+) -- 2.25.1
[PATCH 5/5] board: freescale: ls1088a: remove code under !CONFIG_DM_ETH
Now that DM_ETH is enabled by default, there is no point in keeping the
non-DM_ETH code which initialized the ethernet interfaces.
Signed-off-by: Ioana Ciornei
---
board/freescale/ls1088a/eth_ls1088aqds.c | 739 +--
board/freescale/ls1088a/eth_ls1088ardb.c | 93 ---
board/freescale/ls1088a/ls1088a.c| 2 +-
3 files changed, 4 insertions(+), 830 deletions(-)
diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c
b/board/freescale/ls1088a/eth_ls1088aqds.c
index 8fe643f70b96..f62f5fd27450 100644
--- a/board/freescale/ls1088a/eth_ls1088aqds.c
+++ b/board/freescale/ls1088a/eth_ls1088aqds.c
@@ -3,742 +3,9 @@
* Copyright 2017 NXP
*/
-#include
-#include
-#include
-#include
-#include
-#include
#include
#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
#include
-#include
-#include
-
-#include "../common/qixis.h"
-
-#include "ls1088a_qixis.h"
-
-#ifndef CONFIG_DM_ETH
-#ifdef CONFIG_FSL_MC_ENET
-
-#define SFP_TX 0
-
- /* - In LS1088A A there are only 16 SERDES lanes, spread across 2 SERDES
banks.
- * Bank 1 -> Lanes A, B, C, D,
- * Bank 2 -> Lanes A,B, C, D,
- */
-
- /* Mapping of 8 SERDES lanes to LS1088A QDS board slots. A value of '0' here
- * means that the mapping must be determined dynamically, or that the lane
- * maps to something other than a board slot.
- */
-
-static u8 lane_to_slot_fsm1[] = {
- 0, 0, 0, 0, 0, 0, 0, 0
-};
-
-/* On the Vitesse VSC8234XHG SGMII riser card there are 4 SGMII PHYs
- * housed.
- */
-
-static int xqsgii_riser_phy_addr[] = {
- XQSGMII_CARD_PHY1_PORT0_ADDR,
- XQSGMII_CARD_PHY2_PORT0_ADDR,
- XQSGMII_CARD_PHY3_PORT0_ADDR,
- XQSGMII_CARD_PHY4_PORT0_ADDR,
- XQSGMII_CARD_PHY3_PORT2_ADDR,
- XQSGMII_CARD_PHY1_PORT2_ADDR,
- XQSGMII_CARD_PHY4_PORT2_ADDR,
- XQSGMII_CARD_PHY2_PORT2_ADDR,
-};
-
-static int sgmii_riser_phy_addr[] = {
- SGMII_CARD_PORT1_PHY_ADDR,
- SGMII_CARD_PORT2_PHY_ADDR,
- SGMII_CARD_PORT3_PHY_ADDR,
- SGMII_CARD_PORT4_PHY_ADDR,
-};
-
-/* Slot2 does not have EMI connections */
-#define EMI_NONE 0xFF
-#define EMI1_RGMII10
-#define EMI1_RGMII21
-#define EMI1_SLOT1 2
-
-static const char * const mdio_names[] = {
- "LS1088A_QDS_MDIO0",
- "LS1088A_QDS_MDIO1",
- "LS1088A_QDS_MDIO2",
- DEFAULT_WRIOP_MDIO2_NAME,
-};
-
-struct ls1088a_qds_mdio {
- u8 muxval;
- struct mii_dev *realbus;
-};
-
-struct reg_pair {
- uint addr;
- u8 *val;
-};
-
-static void sgmii_configure_repeater(int dpmac)
-{
- struct mii_dev *bus;
- uint8_t a = 0xf;
- int i, j, k, ret;
- unsigned short value;
- const char *dev = "LS1088A_QDS_MDIO2";
- int i2c_addr[] = {0x58, 0x59, 0x5a, 0x5b};
- int i2c_phy_addr = 0;
- int phy_addr = 0;
-
- uint8_t ch_a_eq[] = {0x1, 0x2, 0x3, 0x7};
- uint8_t ch_a_ctl2[] = {0x81, 0x82, 0x83, 0x84};
- uint8_t ch_b_eq[] = {0x1, 0x2, 0x3, 0x7};
- uint8_t ch_b_ctl2[] = {0x81, 0x82, 0x83, 0x84};
-
- u8 reg_val[6] = {0x18, 0x38, 0x4, 0x14, 0xb5, 0x20};
- struct reg_pair reg_pair[10] = {
- {6, _val[0]}, {4, _val[1]},
- {8, _val[2]}, {0xf, NULL},
- {0x11, NULL}, {0x16, NULL},
- {0x18, NULL}, {0x23, _val[3]},
- {0x2d, _val[4]}, {4, _val[5]},
- };
-#if CONFIG_IS_ENABLED(DM_I2C)
- struct udevice *udev;
-#endif
-
- /* Set I2c to Slot 1 */
-#if !CONFIG_IS_ENABLED(DM_I2C)
- ret = i2c_write(0x77, 0, 0, , 1);
-#else
- ret = i2c_get_chip_for_busnum(0, 0x77, 1, );
- if (!ret)
- ret = dm_i2c_write(udev, 0, , 1);
-#endif
- if (ret)
- goto error;
-
- switch (dpmac) {
- case 1:
- i2c_phy_addr = i2c_addr[1];
- phy_addr = 4;
- break;
- case 2:
- i2c_phy_addr = i2c_addr[0];
- phy_addr = 0;
- break;
- case 3:
- i2c_phy_addr = i2c_addr[3];
- phy_addr = 0xc;
- break;
- case 7:
- i2c_phy_addr = i2c_addr[2];
- phy_addr = 8;
- break;
- }
-
- /* Check the PHY status */
- ret = miiphy_set_current_dev(dev);
- if (ret > 0)
- goto error;
-
- bus = mdio_get_current_dev();
- debug("Reading from bus %s\n", bus->name);
-
- ret = miiphy_write(dev, phy_addr, 0x1f, 3);
- if (ret > 0)
- goto error;
-
- mdelay(10);
- ret = miiphy_read(dev, phy_addr, 0x11, );
- if (ret > 0)
- goto error;
-
- mdelay(10);
-
- if ((value & 0xfff) == 0x401) {
- miiphy_write(dev, phy_addr, 0x1f, 0);
- printf("DPMAC %d:PHY is . Configured\n", dpmac);
- return;
- }
-
-#if CONFIG_IS_ENABLED(DM_I2C)
-
[PATCH 2/5] board: freescale: lx2160a: remove code under !CONFIG_DM_ETH
Now that DM_ETH is enabled by default, there is no point in keeping the
non-DM_ETH code which initialized the ethernet interfaces.
Signed-off-by: Ioana Ciornei
---
board/freescale/lx2160a/eth_lx2160aqds.c | 825 +-
board/freescale/lx2160a/eth_lx2160ardb.c | 32 -
board/freescale/lx2160a/eth_lx2162aqds.c | 844 +--
board/freescale/lx2160a/lx2160a.c| 6 +-
4 files changed, 8 insertions(+), 1699 deletions(-)
diff --git a/board/freescale/lx2160a/eth_lx2160aqds.c
b/board/freescale/lx2160a/eth_lx2160aqds.c
index 374d0526b42f..9939bb6f89e4 100644
--- a/board/freescale/lx2160a/eth_lx2160aqds.c
+++ b/board/freescale/lx2160a/eth_lx2160aqds.c
@@ -4,575 +4,15 @@
*
*/
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
#include
#include
#include
-#include
#include
-#include
-#include
-
-#include "../common/qixis.h"
DECLARE_GLOBAL_DATA_PTR;
-#ifndef CONFIG_DM_ETH
-#define EMI_NONE 0
-#define EMI1 1 /* Mdio Bus 1 */
-#define EMI2 2 /* Mdio Bus 2 */
-
-#if defined(CONFIG_FSL_MC_ENET)
-enum io_slot {
- IO_SLOT_NONE = 0,
- IO_SLOT_1,
- IO_SLOT_2,
- IO_SLOT_3,
- IO_SLOT_4,
- IO_SLOT_5,
- IO_SLOT_6,
- IO_SLOT_7,
- IO_SLOT_8,
- EMI1_RGMII1,
- EMI1_RGMII2,
- IO_SLOT_MAX
-};
-
-struct lx2160a_qds_mdio {
- enum io_slot ioslot : 4;
- u8 realbusnum : 4;
- struct mii_dev *realbus;
-};
-
-/* structure explaining the phy configuration on 8 lanes of a serdes*/
-struct serdes_phy_config {
- u8 serdes; /* serdes protocol */
- struct phy_config {
- u8 dpmacid;
- /* -1 terminated array */
- int phy_address[WRIOP_MAX_PHY_NUM + 1];
- u8 mdio_bus;
- enum io_slot ioslot;
- } phy_config[SRDS_MAX_LANES];
-};
-
-/* Table defining the phy configuration on 8 lanes of a serdes.
- * Various assumptions have been made while defining this table.
- * e.g. for serdes1 protocol 19 it is being assumed that X-M11-USXGMII
- * card is being used for dpmac 3-4. (X-M12-XFI could also have been used)
- * And also that this card is connected to IO Slot 1 (could have been connected
- * to any of the 8 IO slots (IO slot 1 - IO slot 8)).
- * similarly, it is also being assumed that MDIO 1 is selected on X-M7-40G card
- * used in serdes1 protocol 19 (could have selected MDIO 2)
- * To override these settings "dpmac" environment variable can be used after
- * defining "dpmac_override" in hwconfig environment variable.
- * This table has limited serdes protocol entries. It can be expanded as per
- * requirement.
- */
-static const struct serdes_phy_config serdes1_phy_config[] = {
- {3, {{WRIOP1_DPMAC3, {AQ_PHY_ADDR1, -1},
- EMI1, IO_SLOT_1},
- {WRIOP1_DPMAC4, {AQ_PHY_ADDR2, -1},
-EMI1, IO_SLOT_1},
- {WRIOP1_DPMAC5, {AQ_PHY_ADDR3, -1},
-EMI1, IO_SLOT_1},
- {WRIOP1_DPMAC6, {AQ_PHY_ADDR4, -1},
-EMI1, IO_SLOT_1} } },
- {7, {{WRIOP1_DPMAC3, {AQ_PHY_ADDR1, -1},
- EMI1, IO_SLOT_1},
- {WRIOP1_DPMAC4, {AQ_PHY_ADDR2, -1},
-EMI1, IO_SLOT_1},
- {WRIOP1_DPMAC5, {AQ_PHY_ADDR3, -1},
-EMI1, IO_SLOT_1},
- {WRIOP1_DPMAC6, {AQ_PHY_ADDR4, -1},
-EMI1, IO_SLOT_1},
- {WRIOP1_DPMAC7, {SGMII_CARD_PORT1_PHY_ADDR, -1},
-EMI1, IO_SLOT_2},
- {WRIOP1_DPMAC8, {SGMII_CARD_PORT2_PHY_ADDR, -1},
-EMI1, IO_SLOT_2},
- {WRIOP1_DPMAC9, {SGMII_CARD_PORT3_PHY_ADDR, -1},
-EMI1, IO_SLOT_2},
- {WRIOP1_DPMAC10, {SGMII_CARD_PORT4_PHY_ADDR, -1},
-EMI1, IO_SLOT_2} } },
- {8, {} },
- {13, {{WRIOP1_DPMAC1, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1},
- EMI1, IO_SLOT_1},
-{WRIOP1_DPMAC2, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1},
- EMI1, IO_SLOT_2} } },
- {14, {{WRIOP1_DPMAC1, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1},
- EMI1, IO_SLOT_1} } },
- {15, {{WRIOP1_DPMAC1, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1},
- EMI1, IO_SLOT_1},
-{WRIOP1_DPMAC2, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1},
- EMI1, IO_SLOT_1} } },
- {17, {{WRIOP1_DPMAC3, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1},
- EMI1, IO_SLOT_1},
-{WRIOP1_DPMAC4, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1},
- EMI1, IO_SLOT_1},
-{WRIOP1_DPMAC5, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1},
- EMI1, IO_SLOT_1},
-{WRIOP1_DPMAC6, {INPHI_PHY_ADDR1, INPHI_PHY_ADDR2, -1},
- EMI1, IO_SLOT_1} } },
- {19, {{WRIOP1_DPMAC2, {CORTINA_PHY_ADDR1, -1},
- EMI1, IO_SLOT_2},
-{WRIOP1_DPMAC3, {AQ_PHY_ADDR1, -1},
- EMI1, IO_SLOT_1},
-{WRIOP1_DPMAC4,
[PATCH 4/5] board: freescale: ls2080aqds: remove code under !CONFIG_DM_ETH
Now that DM_ETH is enabled by default, there is no point in keeping the
non-DM_ETH code which initialized the ethernet interfaces.
Signed-off-by: Ioana Ciornei
---
board/freescale/ls2080aqds/eth.c| 981 +---
board/freescale/ls2080aqds/ls2080aqds.c | 2 +-
2 files changed, 4 insertions(+), 979 deletions(-)
diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c
index 6da6e5c84152..0d0d5de15623 100644
--- a/board/freescale/ls2080aqds/eth.c
+++ b/board/freescale/ls2080aqds/eth.c
@@ -3,987 +3,12 @@
* Copyright 2015 Freescale Semiconductor, Inc.
*/
-#include
-#include
-#include
-#include
-#include
#include
#include
-#include
-#include
-#include
-#include
-#include
-#include
#include
-#include
-#include
-
-#include "../common/qixis.h"
-
-#include "ls2080aqds_qixis.h"
#define MC_BOOT_ENV_VAR "mcinitcmd"
-#ifndef CONFIG_DM_ETH
-
-#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
- /* - In LS2080A there are only 16 SERDES lanes, spread across 2 SERDES banks.
- * Bank 1 -> Lanes A, B, C, D, E, F, G, H
- * Bank 2 -> Lanes A,B, C, D, E, F, G, H
- */
-
- /* Mapping of 16 SERDES lanes to LS2080A QDS board slots. A value of '0' here
- * means that the mapping must be determined dynamically, or that the lane
- * maps to something other than a board slot.
- */
-
-static u8 lane_to_slot_fsm1[] = {
- 0, 0, 0, 0, 0, 0, 0, 0
-};
-
-static u8 lane_to_slot_fsm2[] = {
- 0, 0, 0, 0, 0, 0, 0, 0
-};
-
-/* On the Vitesse VSC8234XHG SGMII riser card there are 4 SGMII PHYs
- * housed.
- */
-
-static int xqsgii_riser_phy_addr[] = {
- XQSGMII_CARD_PHY1_PORT0_ADDR,
- XQSGMII_CARD_PHY2_PORT0_ADDR,
- XQSGMII_CARD_PHY3_PORT0_ADDR,
- XQSGMII_CARD_PHY4_PORT0_ADDR,
- XQSGMII_CARD_PHY3_PORT2_ADDR,
- XQSGMII_CARD_PHY1_PORT2_ADDR,
- XQSGMII_CARD_PHY4_PORT2_ADDR,
- XQSGMII_CARD_PHY2_PORT2_ADDR,
-};
-
-static int sgmii_riser_phy_addr[] = {
- SGMII_CARD_PORT1_PHY_ADDR,
- SGMII_CARD_PORT2_PHY_ADDR,
- SGMII_CARD_PORT3_PHY_ADDR,
- SGMII_CARD_PORT4_PHY_ADDR,
-};
-
-/* Slot2 does not have EMI connections */
-#define EMI_NONE 0xFF
-#define EMI1_SLOT1 0
-#define EMI1_SLOT2 1
-#define EMI1_SLOT3 2
-#define EMI1_SLOT4 3
-#define EMI1_SLOT5 4
-#define EMI1_SLOT6 5
-#define EMI2 6
-#define SFP_TX 0
-
-static const char * const mdio_names[] = {
- "LS2080A_QDS_MDIO0",
- "LS2080A_QDS_MDIO1",
- "LS2080A_QDS_MDIO2",
- "LS2080A_QDS_MDIO3",
- "LS2080A_QDS_MDIO4",
- "LS2080A_QDS_MDIO5",
- DEFAULT_WRIOP_MDIO2_NAME,
-};
-
-struct ls2080a_qds_mdio {
- u8 muxval;
- struct mii_dev *realbus;
-};
-
-struct reg_pair {
- uint addr;
- u8 *val;
-};
-
-static void sgmii_configure_repeater(int serdes_port)
-{
- struct mii_dev *bus;
- uint8_t a = 0xf;
- int i, j, k, ret;
- int dpmac_id = 0, dpmac, mii_bus = 0;
- unsigned short value;
- char dev[2][20] = {"LS2080A_QDS_MDIO0", "LS2080A_QDS_MDIO3"};
- uint8_t i2c_addr[] = {0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5f, 0x60};
-
- uint8_t ch_a_eq[] = {0x1, 0x2, 0x3, 0x7};
- uint8_t ch_a_ctl2[] = {0x81, 0x82, 0x83, 0x84};
- uint8_t ch_b_eq[] = {0x1, 0x2, 0x3, 0x7};
- uint8_t ch_b_ctl2[] = {0x81, 0x82, 0x83, 0x84};
-
- u8 reg_val[6] = {0x18, 0x38, 0x4, 0x14, 0xb5, 0x20};
- struct reg_pair reg_pair[10] = {
- {6, _val[0]}, {4, _val[1]},
- {8, _val[2]}, {0xf, NULL},
- {0x11, NULL}, {0x16, NULL},
- {0x18, NULL}, {0x23, _val[3]},
- {0x2d, _val[4]}, {4, _val[5]},
- };
-
- int *riser_phy_addr = _riser_phy_addr[0];
-#if CONFIG_IS_ENABLED(DM_I2C)
- struct udevice *udev;
-#endif
-
- /* Set I2c to Slot 1 */
-#if !CONFIG_IS_ENABLED(DM_I2C)
- ret = i2c_write(0x77, 0, 0, , 1);
-#else
- ret = i2c_get_chip_for_busnum(0, 0x77, 1, );
- if (!ret)
- ret = dm_i2c_write(udev, 0, , 1);
-#endif
- if (ret)
- goto error;
-
- for (dpmac = 0; dpmac < 8; dpmac++) {
- /* Check the PHY status */
- switch (serdes_port) {
- case 1:
- mii_bus = 0;
- dpmac_id = dpmac + 1;
- break;
- case 2:
- mii_bus = 1;
- dpmac_id = dpmac + 9;
- a = 0xb;
-#if !CONFIG_IS_ENABLED(DM_I2C)
- ret = i2c_write(0x76, 0, 0, , 1);
-#else
- ret = i2c_get_chip_for_busnum(0, 0x76, 1, );
- if (!ret)
- ret = dm_i2c_write(udev, 0, , 1);
-#endif
- if (ret)
- goto error;
- break;
-
[PATCH 3/5] board: freescale: ls2080rdb: remove code under !CONFIG_DM_ETH
Now that DM_ETH is enabled by default, there is no point in keeping the
non-DM_ETH code which initialized the ethernet interfaces.
Signed-off-by: Ioana Ciornei
---
board/freescale/ls2080ardb/eth_ls2080rdb.c | 95 --
board/freescale/ls2080ardb/ls2080ardb.c| 2 +-
2 files changed, 1 insertion(+), 96 deletions(-)
diff --git a/board/freescale/ls2080ardb/eth_ls2080rdb.c
b/board/freescale/ls2080ardb/eth_ls2080rdb.c
index 7034bc6e5d21..44d9782d729f 100644
--- a/board/freescale/ls2080ardb/eth_ls2080rdb.c
+++ b/board/freescale/ls2080ardb/eth_ls2080rdb.c
@@ -4,104 +4,13 @@
*
*/
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
#include
-#include
#include
-#include
DECLARE_GLOBAL_DATA_PTR;
int board_eth_init(struct bd_info *bis)
{
-#ifndef CONFIG_DM_ETH
-#if defined(CONFIG_FSL_MC_ENET)
- int i, interface;
- struct memac_mdio_info mdio_info;
- struct mii_dev *dev;
- struct ccsr_gur *gur = (void *)(CFG_SYS_FSL_GUTS_ADDR);
- u32 srds_s1;
- struct memac_mdio_controller *reg;
-
- srds_s1 = in_le32(>rcwsr[28]) &
- FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK;
- srds_s1 >>= FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT;
-
- reg = (struct memac_mdio_controller *)CFG_SYS_FSL_WRIOP1_MDIO1;
- mdio_info.regs = reg;
- mdio_info.name = DEFAULT_WRIOP_MDIO1_NAME;
-
- /* Register the EMI 1 */
- fm_memac_mdio_init(bis, _info);
-
- reg = (struct memac_mdio_controller *)CFG_SYS_FSL_WRIOP1_MDIO2;
- mdio_info.regs = reg;
- mdio_info.name = DEFAULT_WRIOP_MDIO2_NAME;
-
- /* Register the EMI 2 */
- fm_memac_mdio_init(bis, _info);
-
- switch (srds_s1) {
- case 0x2A:
- wriop_set_phy_address(WRIOP1_DPMAC1, 0, CORTINA_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC2, 0, CORTINA_PHY_ADDR2);
- wriop_set_phy_address(WRIOP1_DPMAC3, 0, CORTINA_PHY_ADDR3);
- wriop_set_phy_address(WRIOP1_DPMAC4, 0, CORTINA_PHY_ADDR4);
- wriop_set_phy_address(WRIOP1_DPMAC5, 0, AQ_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC6, 0, AQ_PHY_ADDR2);
- wriop_set_phy_address(WRIOP1_DPMAC7, 0, AQ_PHY_ADDR3);
- wriop_set_phy_address(WRIOP1_DPMAC8, 0, AQ_PHY_ADDR4);
-
- break;
- case 0x4B:
- wriop_set_phy_address(WRIOP1_DPMAC1, 0, CORTINA_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC2, 0, CORTINA_PHY_ADDR2);
- wriop_set_phy_address(WRIOP1_DPMAC3, 0, CORTINA_PHY_ADDR3);
- wriop_set_phy_address(WRIOP1_DPMAC4, 0, CORTINA_PHY_ADDR4);
-
- break;
- default:
- printf("SerDes1 protocol 0x%x is not supported on LS2080aRDB\n",
- srds_s1);
- break;
- }
-
- for (i = WRIOP1_DPMAC1; i <= WRIOP1_DPMAC4; i++) {
- interface = wriop_get_enet_if(i);
- switch (interface) {
- case PHY_INTERFACE_MODE_XGMII:
- dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME);
- wriop_set_mdio(i, dev);
- break;
- default:
- break;
- }
- }
-
- for (i = WRIOP1_DPMAC5; i <= WRIOP1_DPMAC8; i++) {
- switch (wriop_get_enet_if(i)) {
- case PHY_INTERFACE_MODE_XGMII:
- dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO2_NAME);
- wriop_set_mdio(i, dev);
- break;
- default:
- break;
- }
- }
-
- cpu_eth_init(bis);
-#endif /* CONFIG_FSL_MC_ENET */
-#endif /* !CONFIG_DM_ETH */
#ifdef CONFIG_PHY_AQUANTIA
/*
@@ -116,11 +25,7 @@ int board_eth_init(struct bd_info *bis)
gd->jt->miiphy_set_current_dev = miiphy_set_current_dev;
#endif
-#ifdef CONFIG_DM_ETH
return 0;
-#else
- return pci_eth_init(bis);
-#endif
}
#if defined(CONFIG_RESET_PHY_R)
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c
b/board/freescale/ls2080ardb/ls2080ardb.c
index aa2d65b45b89..a7fc2b207660 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -297,7 +297,7 @@ int board_init(void)
out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR405_IRQ_MASK);
#endif
-#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH)
+#if !defined(CONFIG_SYS_EARLY_PCI_INIT)
pci_init();
#endif
--
2.25.1
[PATCH 1/5] board: freescale: lx2160a: remove hardcoded ethernet initialization
The LX2160ARDB board has support for DM_ETH probed devices, which means
that we do not need to manually create an MDIO controller, register it,
create PHYs on it etc.
In order to cleanup the board file a bit, just remove this code entirely.
Signed-off-by: Ioana Ciornei
---
board/freescale/lx2160a/eth_lx2160ardb.c | 144 ---
1 file changed, 144 deletions(-)
diff --git a/board/freescale/lx2160a/eth_lx2160ardb.c
b/board/freescale/lx2160a/eth_lx2160ardb.c
index 8a9c60f46cd5..69f3e817915b 100644
--- a/board/freescale/lx2160a/eth_lx2160ardb.c
+++ b/board/freescale/lx2160a/eth_lx2160ardb.c
@@ -5,158 +5,14 @@
*/
#include
-#include
-#include
-#include
#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
#include
-#include
#include
-#include
-#include "lx2160a.h"
DECLARE_GLOBAL_DATA_PTR;
-static bool get_inphi_phy_id(struct mii_dev *bus, int addr, int devad)
-{
- int phy_reg;
- u32 phy_id;
-
- phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
- phy_id = (phy_reg & 0x) << 16;
-
- phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
- phy_id |= (phy_reg & 0x);
-
- if (phy_id == PHY_UID_IN112525_S03)
- return true;
- else
- return false;
-}
-
int board_eth_init(struct bd_info *bis)
{
-#if defined(CONFIG_FSL_MC_ENET)
- struct memac_mdio_info mdio_info;
- struct memac_mdio_controller *reg;
- int i, interface;
- struct mii_dev *dev;
- struct ccsr_gur *gur = (void *)(CFG_SYS_FSL_GUTS_ADDR);
- u32 srds_s1;
-
- srds_s1 = in_le32(>rcwsr[28]) &
- FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK;
- srds_s1 >>= FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT;
-
- reg = (struct memac_mdio_controller *)CFG_SYS_FSL_WRIOP1_MDIO1;
- mdio_info.regs = reg;
- mdio_info.name = DEFAULT_WRIOP_MDIO1_NAME;
-
- /* Register the EMI 1 */
- fm_memac_mdio_init(bis, _info);
-
- reg = (struct memac_mdio_controller *)CFG_SYS_FSL_WRIOP1_MDIO2;
- mdio_info.regs = reg;
- mdio_info.name = DEFAULT_WRIOP_MDIO2_NAME;
-
- /* Register the EMI 2 */
- fm_memac_mdio_init(bis, _info);
-
- dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO2_NAME);
- switch (srds_s1) {
- case 19:
- wriop_set_phy_address(WRIOP1_DPMAC2, 0,
- CORTINA_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC3, 0,
- AQR107_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC4, 0,
- AQR107_PHY_ADDR2);
- if (get_inphi_phy_id(dev, INPHI_PHY_ADDR1, MDIO_MMD_VEND1)) {
- wriop_set_phy_address(WRIOP1_DPMAC5, 0,
- INPHI_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC6, 0,
- INPHI_PHY_ADDR1);
- }
- wriop_set_phy_address(WRIOP1_DPMAC17, 0,
- RGMII_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC18, 0,
- RGMII_PHY_ADDR2);
- break;
-
- case 18:
- wriop_set_phy_address(WRIOP1_DPMAC7, 0,
- CORTINA_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC8, 0,
- CORTINA_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC9, 0,
- CORTINA_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC10, 0,
- CORTINA_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC3, 0,
- AQR107_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC4, 0,
- AQR107_PHY_ADDR2);
- if (get_inphi_phy_id(dev, INPHI_PHY_ADDR1, MDIO_MMD_VEND1)) {
- wriop_set_phy_address(WRIOP1_DPMAC5, 0,
- INPHI_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC6, 0,
- INPHI_PHY_ADDR1);
- }
- wriop_set_phy_address(WRIOP1_DPMAC17, 0,
- RGMII_PHY_ADDR1);
- wriop_set_phy_address(WRIOP1_DPMAC18, 0,
- RGMII_PHY_ADDR2);
- break;
-
- default:
- printf("SerDes1 protocol 0x%x is not supported on LX2160ARDB\n",
- srds_s1);
- goto next;
- }
-
- for (i = WRIOP1_DPMAC2; i <= WRIOP1_DPMAC10; i++) {
- interface = wriop_get_enet_if(i);
- switch (interface) {
- case PHY_INTERFACE_MODE_XGMII:
- dev =
[PATCH 0/5] board: freescale: remove non-DM_ETH code for Layerscape DPAA2 platforms
Now that DM_ETH is enabled by default and even the ldpaa_eth driver
doesn't have support for the non-DM_ETH use case (see commit below),
remove non-DM_ETH code from the board files.
commit cde5a844fbba ("net: ldpaa_eth: Remove non-DM_ETH code")
There is no point in keeping around the creation of the MDIO bus or the
hardcoded MDIO PHY addresses since we have these described in the DTS.
And if there is any RCW combination which is still not supported /
described by DTS we can always look in the commit history.
Ioana Ciornei (5):
board: freescale: lx2160a: remove hardcoded ethernet initialization
board: freescale: lx2160a: remove code under !CONFIG_DM_ETH
board: freescale: ls2080rdb: remove code under !CONFIG_DM_ETH
board: freescale: ls2080aqds: remove code under !CONFIG_DM_ETH
board: freescale: ls1088a: remove code under !CONFIG_DM_ETH
board/freescale/ls1088a/eth_ls1088aqds.c | 739 +---
board/freescale/ls1088a/eth_ls1088ardb.c | 93 --
board/freescale/ls1088a/ls1088a.c | 2 +-
board/freescale/ls2080aqds/eth.c | 981 +
board/freescale/ls2080aqds/ls2080aqds.c| 2 +-
board/freescale/ls2080ardb/eth_ls2080rdb.c | 95 --
board/freescale/ls2080ardb/ls2080ardb.c| 2 +-
board/freescale/lx2160a/eth_lx2160aqds.c | 825 +
board/freescale/lx2160a/eth_lx2160ardb.c | 176
board/freescale/lx2160a/eth_lx2162aqds.c | 844 +-
board/freescale/lx2160a/lx2160a.c | 6 +-
11 files changed, 17 insertions(+), 3748 deletions(-)
--
2.25.1
Re: [RFC][PATCH] board: rockchip: add Radxa ROCK5B Rk3588 board
On 2/14/23 13:04, Jonas Karlman wrote: Hi Eugen, On 2023-02-14 11:26, Eugen Hristev wrote: On 2/6/23 14:14, Jonas Karlman wrote: Hi Eugen, On 2023-02-06 12:59, Eugen Hristev wrote: ROCK 5B is a Rockchip RK3588 based SBC (Single Board Computer) by Radxa. There are tree variants depending on the DRAM size : 4G, 8G and 16G. Specification: Rockchip Rk3588 SoC 4x ARM Cortex-A76, 4x ARM Cortex-A55 4/8/16GB memory LPDDR4x Mali G610MC4 GPU MIPI CSI 2 multiple lanes connector eMMC module connector uSD slot (up to 128GB) 2x USB 2.0, 2x USB 3.0 2x HDMI output, 1x HDMI input Ethernet port 40-pin IO header including UART, SPI, I2C and 5V DC power in USB PD over USB Type-C Size: 85mm x 54mm Signed-off-by: Eugen Hristev --- Hi, This patch is based on top of Jagan's series https://lists.denx.de/pipermail/u-boot/2023-January/506156.html And fixes from Jonas Karlman which I cherrypicked The DT is identical with current linux-next. One thing which is not working as expected is the DRAM size detection, the rock5b has 16 GiB but Uboot only reports 4 GiB. The DRAM driver used is the one from Jagan's series. Jagan, maybe you can tell me how is this driver working on your Edgeble board and how the detection works there for you ? With the SDRAM series at [1] it should hopefylly detect the correct ram size. I will send a v2 rebased on u-boot master later today, a CONFIG_ to CFG_ change. [1] https://patchwork.ozlabs.org/project/uboot/cover/20230116161459.1307591-1-jo...@kwiboo.se/>>> Regards, Jonas Hi Jonas, Jagan, Have you tested the rk3588 with 16 GiB of DRAM ? If the DRAM bank discovered is [0, 4 ] , U-boot will reserve an area for trust and for optee, and place two areas in kernel's DTB : [20 , f000 ] and [1 , 4 ] And this cause the kernel to crash very early. Downstream U-boot appears to get the banks from ATAGs and has three areas: [ 20 , f000 ] (size: 0xefe0) [1 , 3 fc00 ] (size: 0x2fc00) [3 fc50 , 3 fff0 ] (size: 0x03a0) So maybe you have any idea why the gap at 3 fc00 until 3 fc50 and the gap at 3 fff0 up to 4 ? I have only tested running u-boot and not linux on my rk3588 8GB board. The TRM does not mention any address mapping within [1 , 9 ]. Also try without TEE, the area reserved by vendor u-boot may be something optee will use. U-Boot mainline does not reserve a memory area when TEE is used. Hi Jonas, Yes I noticed the same in the TRM. In my u-boot.itb there are 4 ATFs : Firmware: atf-1 FDT: fdt-1 Loadables:u-boot atf-2 atf-3 It appears that only BL31 is run when starting up the board, and it's being run before u-boot proper, and after the SPL. However the DRAM banks and the gap at [3 fc50 ] comes from an earlier stage, I assume ddr.bin, as the SPL does not use atags right ? So it should not be the area reserved by optee, but this area has another purpose. Maybe Kever you have any knowledge about this area ? Thanks, Eugen Regards, Jonas Thanks, Eugen [snip]
[PATCH] mx51evk: Add DM_SERIAL support
The conversion to DM_SERIAL is mandatory, so add support for it. Signed-off-by: Fabio Estevam --- configs/mx51evk_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig index b173648c8e..832f718410 100644 --- a/configs/mx51evk_defconfig +++ b/configs/mx51evk_defconfig @@ -57,6 +57,7 @@ CONFIG_DM_REGULATOR_GPIO=y CONFIG_POWER_FSL=y CONFIG_POWER_SPI=y CONFIG_RTC_MC13XXX=y +CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_MXC_SPI=y -- 2.25.1
[PATCH 2/2] mx53loco: Add DM_I2C support
The conversion to DM_I2C is mandatory, so add support
for it.
Signed-off-by: Fabio Estevam
---
board/freescale/mx53loco/mx53loco.c | 36 ++---
configs/mx53loco_defconfig | 2 +-
2 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/board/freescale/mx53loco/mx53loco.c
b/board/freescale/mx53loco/mx53loco.c
index d447ad840a..a2aed44fbb 100644
--- a/board/freescale/mx53loco/mx53loco.c
+++ b/board/freescale/mx53loco/mx53loco.c
@@ -27,6 +27,8 @@
#include
#include
#include
+#include
+#include
#define MX53LOCO_LCD_POWER IMX_GPIO_NR(3, 24)
@@ -39,10 +41,16 @@ u32 get_board_rev(void)
struct fuse_bank *bank = >bank[0];
struct fuse_bank0_regs *fuse =
(struct fuse_bank0_regs *)bank->fuse_regs;
+ struct udevice *bus;
+ struct udevice *dev;
int rev = readl(>gp[6]);
- if (!i2c_probe(CFG_SYS_DIALOG_PMIC_I2C_ADDR))
+ ret = uclass_get_device_by_seq(UCLASS_I2C, 0, );
+ if (ret)
+ return ret;
+
+ if (!dm_i2c_probe(bus, CFG_SYS_DIALOG_PMIC_I2C_ADDR, 0, ))
rev = 0;
return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
@@ -62,26 +70,19 @@ static void setup_iomux_uart(void)
imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
}
-#define I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \
-PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
-
-static void setup_iomux_i2c(void)
-{
- static const iomux_v3_cfg_t i2c1_pads[] = {
- NEW_PAD_CTRL(MX53_PAD_CSI0_DAT8__I2C1_SDA, I2C_PAD_CTRL),
- NEW_PAD_CTRL(MX53_PAD_CSI0_DAT9__I2C1_SCL, I2C_PAD_CTRL),
- };
-
- imx_iomux_v3_setup_multiple_pads(i2c1_pads, ARRAY_SIZE(i2c1_pads));
-}
-
static int power_init(void)
{
unsigned int val;
int ret;
struct pmic *p;
+ struct udevice *bus;
+ struct udevice *dev;
+
+ ret = uclass_get_device_by_seq(UCLASS_I2C, 0, );
+ if (ret)
+ return ret;
- if (!i2c_probe(CFG_SYS_DIALOG_PMIC_I2C_ADDR)) {
+ if (!dm_i2c_probe(bus, CFG_SYS_DIALOG_PMIC_I2C_ADDR, 0, )) {
ret = pmic_dialog_init(I2C_PMIC);
if (ret)
return ret;
@@ -124,8 +125,8 @@ static int power_init(void)
return ret;
}
- if (!i2c_probe(CFG_SYS_FSL_PMIC_I2C_ADDR)) {
- ret = pmic_init(I2C_0);
+ if (!dm_i2c_probe(bus, CFG_SYS_FSL_PMIC_I2C_ADDR, 0, )) {
+ ret = pmic_init(0);
if (ret)
return ret;
@@ -225,7 +226,6 @@ int board_init(void)
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
mxc_set_sata_internal_clock();
- setup_iomux_i2c();
return 0;
}
diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig
index e332c930b9..f497ccf9e9 100644
--- a/configs/mx53loco_defconfig
+++ b/configs/mx53loco_defconfig
@@ -44,7 +44,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="FEC0"
CONFIG_ARP_TIMEOUT=200
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y
--
2.25.1
[PATCH 1/2] mx53loco: Add DM_SERIAL support
The conversion to DM_SERIAL is mandatory, so add support for it. Signed-off-by: Fabio Estevam --- configs/mx53loco_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig index d5f2b7092d..e332c930b9 100644 --- a/configs/mx53loco_defconfig +++ b/configs/mx53loco_defconfig @@ -61,6 +61,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_POWER_FSL=y CONFIG_POWER_I2C=y +CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_USB=y CONFIG_USB_EHCI_MX5=y -- 2.25.1
[PATCH v3 8/9] video console: add 16x32 Terminus font from linux
Modern mobile phones typically have high pixel density.
Bootmenu is hardly readable on those with 8x16 font.
Signed-off-by: Dzmitry Sankouski
Reviewed-by: Simon Glass
---
Changes for v2:
- edit for runtime configuration
Changes for v3: none
drivers/video/Kconfig |7 +
include/video_font.h |6 +
include/video_font_ter16x32.h | 2062 +
3 files changed, 2075 insertions(+)
create mode 100644 include/video_font_ter16x32.h
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index acce7c21e8..70ae66c53c 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -38,6 +38,13 @@ config VIDEO_FONT_SUN12X22
Provides character bitmap data in header file.
When selecting multiple fonts, you may want to enable CMD_SELECT_FONT
too.
+config VIDEO_FONT_16X32
+ bool "16 x 32 font size"
+ help
+ Font for video console driver, 16 x 32 pixels
+ Provides character bitmap data in header file.
+ When selecting multiple fonts, you may want to enable CMD_SELECT_FONT
too.
+
config VIDEO_LOGO
bool "Show the U-Boot logo on the display"
default y if !SPLASH_SCREEN
diff --git a/include/video_font.h b/include/video_font.h
index 03622adc7a..d4dd2b5eed 100644
--- a/include/video_font.h
+++ b/include/video_font.h
@@ -18,6 +18,9 @@
#if defined(CONFIG_VIDEO_FONT_SUN12X22)
#include
#endif
+#if defined(CONFIG_VIDEO_FONT_16X32)
+#include
+#endif
static struct video_fontdata __maybe_unused fonts[] = {
#if defined(CONFIG_VIDEO_FONT_4X6)
@@ -28,6 +31,9 @@ static struct video_fontdata __maybe_unused fonts[] = {
#endif
#if defined(CONFIG_VIDEO_FONT_SUN12X22)
FONT_ENTRY(12, 22, 12x22),
+#endif
+#if defined(CONFIG_VIDEO_FONT_16X32)
+ FONT_ENTRY(16, 32, 16x32),
#endif
{/* list terminator */}
};
diff --git a/include/video_font_ter16x32.h b/include/video_font_ter16x32.h
new file mode 100644
index 00..bcf3d4b123
--- /dev/null
+++ b/include/video_font_ter16x32.h
@@ -0,0 +1,2062 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copied from linux.
+ */
+
+#ifndef _VIDEO_FONT_TER_16X32_
+#define _VIDEO_FONT_TER_16X32_
+
+#include
+
+static unsigned char video_fontdata_16x32[VIDEO_FONT_SIZE(256, 16, 32)] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x7f, 0xfc, 0x7f, 0xfc,
+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c,
+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c,
+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c,
+ 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c,
+ 0x7f, 0xfc, 0x7f, 0xfc, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x3f, 0xf8, 0x7f, 0xfc,
+ 0xf0, 0x1e, 0xe0, 0x0e, 0xe0, 0x0e, 0xe0, 0x0e,
+ 0xee, 0xee, 0xee, 0xee, 0xe0, 0x0e, 0xe0, 0x0e,
+ 0xe0, 0x0e, 0xe0, 0x0e, 0xef, 0xee, 0xe7, 0xce,
+ 0xe0, 0x0e, 0xe0, 0x0e, 0xe0, 0x0e, 0xf0, 0x1e,
+ 0x7f, 0xfc, 0x3f, 0xf8, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 1 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x3f, 0xf8, 0x7f, 0xfc,
+ 0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe,
+ 0xe3, 0x8e, 0xe3, 0x8e, 0xff, 0xfe, 0xff, 0xfe,
+ 0xff, 0xfe, 0xff, 0xfe, 0xe0, 0x0e, 0xf0, 0x1e,
+ 0xf8, 0x3e, 0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe,
+ 0x7f, 0xfc, 0x3f, 0xf8, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 2 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x78, 0x3c, 0xfc, 0x7e, 0xfe, 0xfe, 0xff, 0xfe,
+ 0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe,
+ 0x7f, 0xfc, 0x7f, 0xfc, 0x3f, 0xf8, 0x1f, 0xf0,
+ 0x0f, 0xe0, 0x07, 0xc0, 0x03, 0x80, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 3 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x03, 0x80, 0x07, 0xc0, 0x0f, 0xe0,
+ 0x1f, 0xf0, 0x3f, 0xf8, 0x7f, 0xfc, 0xff, 0xfe,
+ 0xff, 0xfe, 0x7f, 0xfc, 0x3f, 0xf8, 0x1f, 0xf0,
+ 0x0f, 0xe0, 0x07, 0xc0, 0x03, 0x80, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 4 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x07, 0xc0, 0x0f, 0xe0,
+ 0x0f, 0xe0, 0x0f, 0xe0, 0x0f, 0xe0, 0x0f, 0xe0,
+ 0x07, 0xc0, 0x03, 0x80, 0x3b, 0xb8, 0x7f, 0xfc,
+ 0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe,
+ 0x7f, 0xfc, 0x3b, 0xb8, 0x03, 0x80, 0x03, 0x80,
+ 0x0f, 0xe0, 0x0f, 0xe0, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00,
Re: [PATCH v3] efi_loader: update SetVariable attribute check
On 2/15/23 10:55, Masahisa Kojima wrote:
UEFI specification v2.10 says that
EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS is deprecated and
EFI_UNSUPPORTED should be returned in SetVariable variable service.
Current implementation returns EFI_INVALID_PARAMETER,
let's fix the return value.
Together with above change, this commit also updates the SetVariable
attribute check to be aligned with the EDK2 reference implementation.
Signed-off-by: Masahisa Kojima
---
Changes in v3:
- accept no access attribute for deletion
Changes in v2:
- fix coding style
- HR must be set with NV
The 2.10 spec say NV, BS, RT, HR.
8.2.8.2 Hardware Error Record Variables, p. 224
If we want to check HR variables, should RT be required too?
Best regards
Heinrich
lib/efi_loader/efi_variable.c | 32 +---
1 file changed, 25 insertions(+), 7 deletions(-)
diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c
index 4c85cfa607..3e11373331 100644
--- a/lib/efi_loader/efi_variable.c
+++ b/lib/efi_loader/efi_variable.c
@@ -230,9 +230,30 @@ efi_status_t efi_set_variable_int(const u16 *variable_name,
u64 time = 0;
enum efi_auth_var_type var_type;
- if (!variable_name || !*variable_name || !vendor ||
- ((attributes & EFI_VARIABLE_RUNTIME_ACCESS) &&
-!(attributes & EFI_VARIABLE_BOOTSERVICE_ACCESS)))
+ if (!variable_name || !*variable_name || !vendor)
+ return EFI_INVALID_PARAMETER;
+
+ if (data_size && !data)
+ return EFI_INVALID_PARAMETER;
+
+ /* EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS is deprecated */
+ if (attributes & EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS)
+ return EFI_UNSUPPORTED;
+
+ /* Make sure if runtime bit is set, boot service bit is set also */
+ if ((attributes &
+(EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_BOOTSERVICE_ACCESS)) ==
+ EFI_VARIABLE_RUNTIME_ACCESS)
+ return EFI_INVALID_PARAMETER;
+
+ /* only EFI_VARIABLE_NON_VOLATILE attribute is invalid */
+ if ((attributes & EFI_VARIABLE_MASK) == EFI_VARIABLE_NON_VOLATILE)
+ return EFI_INVALID_PARAMETER;
+
+ /* Make sure HR is set with NV */
+ if ((attributes &
+(EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_HARDWARE_ERROR_RECORD))
==
+ EFI_VARIABLE_HARDWARE_ERROR_RECORD)
return EFI_INVALID_PARAMETER;
/* check if a variable exists */
@@ -281,8 +302,6 @@ efi_status_t efi_set_variable_int(const u16 *variable_name,
/* authenticate a variable */
if (IS_ENABLED(CONFIG_EFI_SECURE_BOOT)) {
- if (attributes & EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS)
- return EFI_INVALID_PARAMETER;
if (attributes &
EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS) {
u32 env_attr;
@@ -300,8 +319,7 @@ efi_status_t efi_set_variable_int(const u16 *variable_name,
}
} else {
if (attributes &
- (EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS |
-EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS)) {
+ EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS) {
EFI_PRINT("Secure boot is not configured\n");
return EFI_INVALID_PARAMETER;
}
[PATCH v3 9/9] video console: add 12x22 console simple font test
Tests fonts wider than a byte.
Signed-off-by: Dzmitry Sankouski
Reviewed-by: Simon Glass
---
Changes for v2: N/A
Changes for v2: none
configs/sandbox_defconfig | 3 +++
test/dm/video.c | 41 +++
2 files changed, 44 insertions(+)
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 34c342b6f5..625ca35f5c 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -337,3 +337,6 @@ CONFIG_TEST_FDTDEC=y
CONFIG_UNIT_TEST=y
CONFIG_UT_TIME=y
CONFIG_UT_DM=y
+CONFIG_CMD_SELECT_FONT=y
+CONFIG_VIDEO_FONT_8X16=y
+CONFIG_VIDEO_FONT_SUN12X22=y
diff --git a/test/dm/video.c b/test/dm/video.c
index 17a33cc7af..30778157d9 100644
--- a/test/dm/video.c
+++ b/test/dm/video.c
@@ -151,6 +151,8 @@ static int dm_test_video_text(struct unit_test_state *uts)
ut_assertok(select_vidconsole(uts, "vidconsole0"));
ut_assertok(video_get_nologo(uts, ));
+ ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, ));
+ ut_assertok(vidconsole_select_font(con, "8x16", 0));
ut_asserteq(46, compress_frame_buffer(uts, dev));
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, ));
@@ -175,6 +177,42 @@ static int dm_test_video_text(struct unit_test_state *uts)
}
DM_TEST(dm_test_video_text, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+static int dm_test_video_text_12x22(struct unit_test_state *uts)
+{
+ struct udevice *dev, *con;
+ int i;
+
+#define WHITE 0x
+#define SCROLL_LINES 100
+
+ ut_assertok(select_vidconsole(uts, "vidconsole0"));
+ ut_assertok(video_get_nologo(uts, ));
+ ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, ));
+ ut_assertok(vidconsole_select_font(con, "12x22", 0));
+ ut_asserteq(46, compress_frame_buffer(uts, dev));
+
+ ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, ));
+ vidconsole_putc_xy(con, 0, 0, 'a');
+ ut_asserteq(89, compress_frame_buffer(uts, dev));
+
+ vidconsole_putc_xy(con, 0, 0, ' ');
+ ut_asserteq(46, compress_frame_buffer(uts, dev));
+
+ for (i = 0; i < 20; i++)
+ vidconsole_putc_xy(con, VID_TO_POS(i * 8), 0, ' ' + i);
+ ut_asserteq(363, compress_frame_buffer(uts, dev));
+
+ vidconsole_set_row(con, 0, WHITE);
+ ut_asserteq(46, compress_frame_buffer(uts, dev));
+
+ for (i = 0; i < 20; i++)
+ vidconsole_putc_xy(con, VID_TO_POS(i * 8), 0, ' ' + i);
+ ut_asserteq(363, compress_frame_buffer(uts, dev));
+
+ return 0;
+}
+DM_TEST(dm_test_video_text_12x22, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+
/* Test handling of special characters in the console */
static int dm_test_video_chars(struct unit_test_state *uts)
{
@@ -184,6 +222,7 @@ static int dm_test_video_chars(struct unit_test_state *uts)
ut_assertok(select_vidconsole(uts, "vidconsole0"));
ut_assertok(video_get_nologo(uts, ));
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, ));
+ ut_assertok(vidconsole_select_font(con, "8x16", 0));
vidconsole_put_string(con, test_string);
ut_asserteq(466, compress_frame_buffer(uts, dev));
@@ -201,6 +240,7 @@ static int dm_test_video_ansi(struct unit_test_state *uts)
ut_assertok(select_vidconsole(uts, "vidconsole0"));
ut_assertok(video_get_nologo(uts, ));
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, ));
+ ut_assertok(vidconsole_select_font(con, "8x16", 0));
/* reference clear: */
video_clear(con->parent);
@@ -249,6 +289,7 @@ static int check_vidconsole_output(struct unit_test_state
*uts, int rot,
ut_assertok(video_get_nologo(uts, ));
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, ));
+ ut_assertok(vidconsole_select_font(con, "8x16", 0));
ut_asserteq(46, compress_frame_buffer(uts, dev));
/* Check display wrap */
--
2.30.2
[PATCH v3 5/9] video console: implement multiple fonts configuration
This needed for unit testing different fonts.
Configured fonts are placed in an array of fonts.
First font is selected by default upon console probe.
Signed-off-by: Dzmitry Sankouski
---
Changes for v2: N/A
Changes for v3: N/A
common/splash.c| 17 ++-
drivers/video/Kconfig | 15 +++
drivers/video/console_simple.c | 232 -
include/video_font.h | 17 ++-
include/video_font_4x6.h | 11 +-
include/video_font_8x16.h | 8 +-
include/video_font_data.h | 31 +
7 files changed, 216 insertions(+), 115 deletions(-)
create mode 100644 include/video_font_data.h
diff --git a/common/splash.c b/common/splash.c
index 245ff680eb..1cd9afae2d 100644
--- a/common/splash.c
+++ b/common/splash.c
@@ -127,6 +127,7 @@ void splash_get_pos(int *x, int *y)
#include
#include
#include
+#include
void splash_display_banner(void)
{
@@ -138,13 +139,15 @@ void splash_display_banner(void)
if (ret)
return;
-#ifdef CONFIG_VIDEO_LOGO
- col = BMP_LOGO_WIDTH / VIDEO_FONT_WIDTH + 1;
- row = BMP_LOGO_HEIGHT / VIDEO_FONT_HEIGHT + 1;
-#else
- col = 0;
- row = 0;
-#endif
+ if (IS_ENABLED(CONFIG_VIDEO_LOGO)) {
+ struct video_fontdata *fontdata = [0];
+
+ col = BMP_LOGO_WIDTH / fontdata->width + 1;
+ row = BMP_LOGO_HEIGHT / fontdata->height + 1;
+ } else {
+ col = 0;
+ row = 0;
+ }
display_options_get_banner(false, buf, sizeof(buf));
vidconsole_position_cursor(dev, col, 1);
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index f2e930ab68..47428ecb6c 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -16,6 +16,21 @@ config VIDEO
if VIDEO
+config VIDEO_FONT_4X6
+ bool "4 x 6 font size"
+ help
+ Font for video console driver, 4 x 6 pixels.
+ Provides character bitmap data in header file.
+ When selecting multiple fonts, you may want to enable CMD_SELECT_FONT
too.
+
+config VIDEO_FONT_8X16
+ bool "8 x 16 font size"
+ default y
+ help
+ Font for video console driver, 8 x 16 pixels
+ Provides character bitmap data in header file.
+ When selecting multiple fonts, you may want to enable CMD_SELECT_FONT
too.
+
config VIDEO_LOGO
bool "Show the U-Boot logo on the display"
default y if !SPLASH_SCREEN
diff --git a/drivers/video/console_simple.c b/drivers/video/console_simple.c
index cdc26cac30..402d67f85f 100644
--- a/drivers/video/console_simple.c
+++ b/drivers/video/console_simple.c
@@ -12,12 +12,50 @@
#include
#include /* Get font data, width and height */
-#define VIDEO_FONT_BYTE_WIDTH ((VIDEO_FONT_WIDTH / 8) + (VIDEO_FONT_WIDTH % 8
> 0))
-#define VIDEO_FONT_CHAR_PIXEL_BYTES(VIDEO_FONT_HEIGHT *
VIDEO_FONT_BYTE_WIDTH)
-
#define FLIPPED_DIRECTION 1
#define NORMAL_DIRECTION 0
+/**
+ * struct console_simple_priv - Private data for this driver
+ *
+ * @video_fontdata font graphical representation data
+ */
+struct console_simple_priv {
+ struct video_fontdata *fontdata;
+};
+
+/**
+ * console_set_font() - prepare vidconsole for chosen font.
+ *
+ * @devvidconsole device
+ * @fontdata pointer to font data struct
+ */
+static int console_set_font(struct udevice *dev, struct video_fontdata
*fontdata)
+{
+ struct console_simple_priv *priv = dev_get_priv(dev);
+ struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev);
+ struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent);
+
+ debug("console_simple: setting %s font\n", fontdata->name);
+ debug("width: %d\n", fontdata->width);
+ debug("byte width: %d\n", fontdata->byte_width);
+ debug("height: %d\n", fontdata->height);
+
+ priv->fontdata = fontdata;
+ vc_priv->x_charsize = fontdata->width;
+ vc_priv->y_charsize = fontdata->height;
+ if (vid_priv->rot % 2) {
+ vc_priv->cols = vid_priv->ysize / fontdata->width;
+ vc_priv->rows = vid_priv->xsize / fontdata->height;
+ vc_priv->xsize_frac = VID_TO_POS(vid_priv->ysize);
+ } else {
+ vc_priv->cols = vid_priv->xsize / fontdata->width;
+ vc_priv->rows = vid_priv->ysize / fontdata->height;
+ }
+
+ return 0;
+}
+
/**
* Checks if bits per pixel supported.
*
@@ -78,6 +116,7 @@ static inline void fill_pixel_and_goto_next(void **dstp, u32
value, int pbytes,
* @param pfonta pointer to character font data.
* @param line a pointer to pointer to framebuffer. It's a point for
upper left char corner
* @param vid_priv driver private data.
+ * @fontdata font graphical representation data
* @param directioncontrols character orientation. Can be normal or
flipped.
* When normal: When flipped:
[PATCH v3 6/9] video console: allow font size configuration at runtime
Allow font size configuration at runtime for console_simple.c
driver. This needed for unit testing different fonts.
Configuring is done by `font` command, also used for font
selection in true type console.
Signed-off-by: Dzmitry Sankouski
---
Changes for v2: N/A
Changes for v3:
- move 8x16 font patch extracted
- implement multiple fonts patch extracted
- add static modifiers, where needed
- remove list fonts operation
- put fontdata in local var
cmd/Kconfig| 8
cmd/Makefile | 2 +-
drivers/video/Kconfig | 1 +
drivers/video/console_simple.c | 30 ++
4 files changed, 40 insertions(+), 1 deletion(-)
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 2caa4af71c..f368ee7e9b 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -2226,6 +2226,14 @@ config CMD_VIDCONSOLE
The name 'lcdputs' is a bit of a misnomer, but so named because the
video device is often an LCD.
+config CMD_SELECT_FONT
+bool "select font size"
+ depends on VIDEO
+ default n
+ help
+ Enabling this will provide 'font' command.
+ Allows font selection at runtime.
+
endmenu
source "cmd/ti/Kconfig"
diff --git a/cmd/Makefile b/cmd/Makefile
index 36d2daf22a..2d8bb4fc05 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -78,7 +78,7 @@ obj-$(CONFIG_CMD_EXT2) += ext2.o
obj-$(CONFIG_CMD_FAT) += fat.o
obj-$(CONFIG_CMD_FDT) += fdt.o
obj-$(CONFIG_CMD_SQUASHFS) += sqfs.o
-obj-$(CONFIG_CONSOLE_TRUETYPE) += font.o
+obj-$(CONFIG_CMD_SELECT_FONT) += font.o
obj-$(CONFIG_CMD_FLASH) += flash.o
obj-$(CONFIG_CMD_FPGA) += fpga.o
obj-$(CONFIG_CMD_FPGAD) += fpgad.o
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 47428ecb6c..419c53418d 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -165,6 +165,7 @@ config CONSOLE_ROTATION
config CONSOLE_TRUETYPE
bool "Support a console that uses TrueType fonts"
+ select CMD_SELECT_FONT
help
TrueTrype fonts can provide outline-drawing capability rather than
needing to provide a bitmap for each font and size that is needed.
diff --git a/drivers/video/console_simple.c b/drivers/video/console_simple.c
index 402d67f85f..2b39d724f4 100644
--- a/drivers/video/console_simple.c
+++ b/drivers/video/console_simple.c
@@ -56,6 +56,28 @@ static int console_set_font(struct udevice *dev, struct
video_fontdata *fontdata
return 0;
}
+static int console_simple_get_font(struct udevice *dev, int seq, struct
vidfont_info *info)
+{
+ info->name = ([seq])->name;
+
+ return 0;
+}
+
+static int console_simple_select_font(struct udevice *dev, const char *name,
uint size)
+{
+ console_set_font(dev, [1]);
+ struct video_fontdata *font;
+
+ for (font = fonts; font->name; font++) {
+ if (!strcmp(name, font->name)) {
+ console_set_font(dev, font);
+ return 0;
+ }
+ };
+ printf("no such font: %s, make sure it's name has x
format\n", name);
+ return -ENOENT;
+}
+
/**
* Checks if bits per pixel supported.
*
@@ -352,6 +374,8 @@ struct vidconsole_ops console_ops = {
.putc_xy= console_putc_xy,
.move_rows = console_move_rows,
.set_row= console_set_row,
+ .get_font = console_simple_get_font,
+ .select_font= console_simple_select_font,
};
U_BOOT_DRIVER(vidconsole_normal) = {
@@ -612,18 +636,24 @@ struct vidconsole_ops console_ops_1 = {
.putc_xy= console_putc_xy_1,
.move_rows = console_move_rows_1,
.set_row= console_set_row_1,
+ .get_font = console_simple_get_font,
+ .select_font= console_simple_select_font,
};
struct vidconsole_ops console_ops_2 = {
.putc_xy= console_putc_xy_2,
.move_rows = console_move_rows_2,
.set_row= console_set_row_2,
+ .get_font = console_simple_get_font,
+ .select_font= console_simple_select_font,
};
struct vidconsole_ops console_ops_3 = {
.putc_xy= console_putc_xy_3,
.move_rows = console_move_rows_3,
.set_row= console_set_row_3,
+ .get_font = console_simple_get_font,
+ .select_font= console_simple_select_font,
};
U_BOOT_DRIVER(vidconsole_1) = {
--
2.30.2
[PATCH v3 4/9] video console: move 8x16 font data in named header
Consistent font data header names needed to add new
fonts.
Signed-off-by: Dzmitry Sankouski
---
Changes for v2: N/A
Changes for v3: N/A
include/video_font.h | 2 +-
include/{video_font_data.h => video_font_8x16.h} | 5 ++---
2 files changed, 3 insertions(+), 4 deletions(-)
rename include/{video_font_data.h => video_font_8x16.h} (99%)
diff --git a/include/video_font.h b/include/video_font.h
index 5e23f70f85..b07c07662c 100644
--- a/include/video_font.h
+++ b/include/video_font.h
@@ -10,7 +10,7 @@
#ifdef CONFIG_VIDEO_FONT_4X6
#include
#else
-#include
+#include
#endif
#endif /* _VIDEO_FONT_ */
diff --git a/include/video_font_data.h b/include/video_font_8x16.h
similarity index 99%
rename from include/video_font_data.h
rename to include/video_font_8x16.h
index 6e64198d1a..d3d4295032 100644
--- a/include/video_font_data.h
+++ b/include/video_font_8x16.h
@@ -6,8 +6,8 @@
* This file contains an 8x16 bitmap font for code page 437.
*/
-#ifndef _VIDEO_FONT_DATA_
-#define _VIDEO_FONT_DATA_
+#ifndef _VIDEO_FONT_8X16
+#define _VIDEO_FONT_8X16
#define VIDEO_FONT_CHARS 256
#define VIDEO_FONT_WIDTH 8
@@ -4623,7 +4623,6 @@ static unsigned char __maybe_unused
video_fontdata[VIDEO_FONT_SIZE] = {
0x00, /* */
0x00, /* */
0x00, /* */
-
};
#endif
--
2.30.2
[PATCH v3 2/9] video console: refactoring and optimization
- get rid of code duplications in switch across bpp values
- extract common pixel fill logic in two functions one per
horizontal and vertical filling
- rearrange statements in put_xy* methods in unified way
- replace types - uint*_t to u*
Signed-off-by: Dzmitry Sankouski
---
Changes for v2:
- move width and pixel data size macros to console_simple.c
- performance: move if statement out of pixel fill loops
- document new functions
- remove console_probe_2 function
- make fill_pixel_and_goto_next void
- fix video unit tests failures
Changes for v3: none
drivers/video/console_simple.c | 598 ++---
1 file changed, 258 insertions(+), 340 deletions(-)
diff --git a/drivers/video/console_simple.c b/drivers/video/console_simple.c
index a4b3cfe3d8..1eb47be449 100644
--- a/drivers/video/console_simple.c
+++ b/drivers/video/console_simple.c
@@ -3,6 +3,7 @@
* Copyright (c) 2015 Google, Inc
* (C) Copyright 2015
* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
+ * (C) Copyright 2023 Dzmitry Sankouski
*/
#include
@@ -11,46 +12,209 @@
#include
#include /* Get font data, width and height */
-static int console_normal_set_row(struct udevice *dev, uint row, int clr)
-{
- struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent);
- void *line, *end;
- int pixels = VIDEO_FONT_HEIGHT * vid_priv->xsize;
- int ret;
- int i;
+#define VIDEO_FONT_BYTE_WIDTH ((VIDEO_FONT_WIDTH / 8) + (VIDEO_FONT_WIDTH % 8
> 0))
- line = vid_priv->fb + row * VIDEO_FONT_HEIGHT * vid_priv->line_length;
- switch (vid_priv->bpix) {
- case VIDEO_BPP8:
- if (IS_ENABLED(CONFIG_VIDEO_BPP8)) {
- uint8_t *dst = line;
+#define FLIPPED_DIRECTION 1
+#define NORMAL_DIRECTION 0
- for (i = 0; i < pixels; i++)
- *dst++ = clr;
- end = dst;
- break;
- }
+/**
+ * Checks if bits per pixel supported.
+ *
+ * @param bpix framebuffer bits per pixel.
+ *
+ * @returns 0, if supported, or else -ENOSYS.
+ */
+static int check_bpix_support(int bpix)
+{
+ switch (bpix) {
+ case VIDEO_BPP8:
+ if (IS_ENABLED(CONFIG_VIDEO_BPP8))
+ return 0;
case VIDEO_BPP16:
- if (IS_ENABLED(CONFIG_VIDEO_BPP16)) {
- uint16_t *dst = line;
+ if (IS_ENABLED(CONFIG_VIDEO_BPP16))
+ return 0;
+ case VIDEO_BPP32:
+ if (IS_ENABLED(CONFIG_VIDEO_BPP32))
+ return 0;
+ default:
+ return -ENOSYS;
+ }
+}
+
+/**
+ * Fill 1 pixel in framebuffer, and go to next one.
+ *
+ * @param dstp a pointer to pointer to framebuffer.
+ * @param valuevalue to write to framebuffer.
+ * @param pbytes framebuffer bytes per pixel.
+ * @param step framebuffer pointer increment. Usually is equal to
pbytes,
+ * and may be negative to control filling direction.
+ */
+static inline void fill_pixel_and_goto_next(void **dstp, u32 value, int
pbytes, int step)
+{
+ u8 *dst_byte = *dstp;
+
+ if (pbytes == 4) {
+ u32 *dst = *dstp;
+ *dst = value;
+ }
+ if (pbytes == 2) {
+ u16 *dst = *dstp;
+ *dst = value;
+ }
+ if (pbytes == 1) {
+ u8 *dst = *dstp;
+ *dst = value;
+ }
+ *dstp = dst_byte + step;
+}
+
+#if (CONFIG_IS_ENABLED(CONSOLE_ROTATION))
+/**
+ * Fills 1 character in framebuffer horizontally.
+ * Horizontally means we're filling char font data columns across the lines.
+ *
+ * @param pfonta pointer to character font data.
+ * @param line a pointer to pointer to framebuffer. It's a point for
upper left char corner
+ * @param vid_priv driver private data.
+ * @param directioncontrols character orientation. Can be normal or
flipped.
+ * When normal: When flipped:
+ *|---|
+ *| *| line stepping |
+ *|^ * * * * *| | |
+ *||* *| v * *|
+ *|| | * * * * * |
+ *| line stepping | * |
+ *|| |
+ *| stepping -> |<- stepping |
+ *|---!!we're starting from upper left char corner|
+ *|---|
+ *
+ * @returns 0, if success, or else error code.
+ */
+static int fill_char_horizontally(uchar *pfont, void **line, struct video_priv
*vid_priv,
+ bool direction)
+{
+ int step, line_step, pbytes, ret;
+ void *dst;
+ u8 mask = 0x80;
+
+ ret = check_bpix_support(vid_priv->bpix);
+
[PATCH v3 3/9] video console: add support for fonts wider than 1 byte
Devices with high ppi may benefit from wider fonts.
Current width implementation is limited by 1 byte, i.e. 8 bits.
New version iterates VIDEO_FONT_BYTE_WIDTH times, to process all
width bytes, thus allowing fonts wider than 1 byte.
Signed-off-by: Dzmitry Sankouski
---
Charges for v2:
- replace TAIL_BIT_COUNT macro with c code
- rename refactoring
Charges for v3: none
drivers/video/console_simple.c | 93 +-
1 file changed, 59 insertions(+), 34 deletions(-)
diff --git a/drivers/video/console_simple.c b/drivers/video/console_simple.c
index 1eb47be449..cdc26cac30 100644
--- a/drivers/video/console_simple.c
+++ b/drivers/video/console_simple.c
@@ -13,6 +13,7 @@
#include /* Get font data, width and height */
#define VIDEO_FONT_BYTE_WIDTH ((VIDEO_FONT_WIDTH / 8) + (VIDEO_FONT_WIDTH % 8
> 0))
+#define VIDEO_FONT_CHAR_PIXEL_BYTES(VIDEO_FONT_HEIGHT *
VIDEO_FONT_BYTE_WIDTH)
#define FLIPPED_DIRECTION 1
#define NORMAL_DIRECTION 0
@@ -95,9 +96,9 @@ static inline void fill_pixel_and_goto_next(void **dstp, u32
value, int pbytes,
static int fill_char_horizontally(uchar *pfont, void **line, struct video_priv
*vid_priv,
bool direction)
{
- int step, line_step, pbytes, ret;
+ int step, line_step, pbytes, bitcount = 8, width_remainder, ret;
void *dst;
- u8 mask = 0x80;
+ u8 mask;
ret = check_bpix_support(vid_priv->bpix);
if (ret)
@@ -111,21 +112,32 @@ static int fill_char_horizontally(uchar *pfont, void
**line, struct video_priv *
step = pbytes;
line_step = -vid_priv->line_length;
}
- for (int col = 0; col < VIDEO_FONT_WIDTH; col++) {
- dst = *line;
- for (int row = 0; row < VIDEO_FONT_HEIGHT; row++) {
- u32 value = (pfont[row * VIDEO_FONT_BYTE_WIDTH] & mask)
?
- vid_priv->colour_fg :
- vid_priv->colour_bg;
-
- fill_pixel_and_goto_next(,
-value,
-pbytes,
-step
- );
+
+ width_remainder = VIDEO_FONT_WIDTH % 8;
+ for (int col = 0; col < VIDEO_FONT_BYTE_WIDTH; col++) {
+ mask = 0x80;
+ if (width_remainder) {
+ bool is_last_iteration = (VIDEO_FONT_BYTE_WIDTH - col
== 1);
+
+ if (is_last_iteration)
+ bitcount = width_remainder;
+ }
+ for (int bit = 0; bit < bitcount; bit++) {
+ dst = *line;
+ for (int row = 0; row < VIDEO_FONT_HEIGHT; row++) {
+ u32 value = (pfont[row * VIDEO_FONT_BYTE_WIDTH]
& mask) ?
+ vid_priv->colour_fg :
+ vid_priv->colour_bg;
+
+ fill_pixel_and_goto_next(,
+value,
+pbytes,
+step
+ );
+ }
+ *line += line_step;
+ mask >>= 1;
}
- *line += line_step;
- mask >>= 1;
}
return ret;
}
@@ -158,7 +170,7 @@ static int fill_char_horizontally(uchar *pfont, void
**line, struct video_priv *
static int fill_char_vertically(uchar *pfont, void **line, struct video_priv
*vid_priv,
bool direction)
{
- int step, line_step, pbytes, ret;
+ int step, line_step, pbytes, bitcount, width_remainder, ret;
void *dst;
ret = check_bpix_support(vid_priv->bpix);
@@ -174,23 +186,36 @@ static int fill_char_vertically(uchar *pfont, void
**line, struct video_priv *vi
line_step = vid_priv->line_length;
}
+ width_remainder = VIDEO_FONT_WIDTH % 8;
for (int row = 0; row < VIDEO_FONT_HEIGHT; row++) {
+ uchar bits;
+
+ bitcount = 8;
dst = *line;
- uchar bits = pfont[row];
-
- for (int i = 0; i < VIDEO_FONT_WIDTH; i++) {
- u32 value = (bits & 0x80) ?
- vid_priv->colour_fg :
- vid_priv->colour_bg;
-
- fill_pixel_and_goto_next(,
-value,
-pbytes,
-step
- );
- bits <<= 1;
+ for (int col =
[PATCH v3 1/9] video console: unite normal and rotated files
Unite console_normal.c and console_rotate.c files.
Those files have similar logic, and common logic
may be extracted after putting code in single file.
Signed-off-by: Dzmitry Sankouski
---
Changes for v2: none
Changes for v3: none
drivers/video/Kconfig | 8 +-
drivers/video/Makefile| 3 +-
drivers/video/console_normal.c| 178 --
.../{console_rotate.c => console_simple.c}| 166
4 files changed, 171 insertions(+), 184 deletions(-)
delete mode 100644 drivers/video/console_normal.c
rename drivers/video/{console_rotate.c => console_simple.c} (75%)
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 2a76d19cc8..f2e930ab68 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -127,17 +127,17 @@ config VIDEO_MIPI_DSI
The MIPI Display Serial Interface (MIPI DSI) defines a high-speed
serial interface between a host processor and a display module.
-config CONSOLE_NORMAL
+config VIDEO_CONSOLE
bool "Support a simple text console"
default y
help
Support drawing text on the frame buffer console so that it can be
- used as a console. Rotation is not supported by this driver (see
- CONFIG_CONSOLE_ROTATION for that). A built-in 8x16 font is used
- for the display.
+ used as a console. See CONFIG_CONSOLE_ROTATION for rotation support.
+ A built-in 8x16 font is used for the display.
config CONSOLE_ROTATION
bool "Support rotated displays"
+ depends on VIDEO_CONSOLE
help
Sometimes, for example if the display is mounted in portrait
mode or even if it's mounted landscape but rotated by 180degree,
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index cdb7d9a54d..0989c526be 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -7,8 +7,7 @@ ifdef CONFIG_DM
obj-$(CONFIG_BACKLIGHT) += backlight-uclass.o
obj-$(CONFIG_BACKLIGHT_GPIO) += backlight_gpio.o
obj-$(CONFIG_BACKLIGHT_PWM) += pwm_backlight.o
-obj-$(CONFIG_CONSOLE_NORMAL) += console_normal.o
-obj-$(CONFIG_CONSOLE_ROTATION) += console_rotate.o
+obj-$(CONFIG_VIDEO_CONSOLE) += console_simple.o
obj-$(CONFIG_CONSOLE_TRUETYPE) += console_truetype.o fonts/
obj-$(CONFIG_DISPLAY) += display-uclass.o
obj-$(CONFIG_VIDEO_MIPI_DSI) += dsi-host-uclass.o
diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c
deleted file mode 100644
index 04f022491e..00
--- a/drivers/video/console_normal.c
+++ /dev/null
@@ -1,178 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2015 Google, Inc
- * (C) Copyright 2001-2015
- * DENX Software Engineering -- w...@denx.de
- * Compulab Ltd - http://compulab.co.il/
- * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
- */
-
-#include
-#include
-#include
-#include
-#include /* Get font data, width and height */
-
-static int console_normal_set_row(struct udevice *dev, uint row, int clr)
-{
- struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent);
- void *line, *end;
- int pixels = VIDEO_FONT_HEIGHT * vid_priv->xsize;
- int ret;
- int i;
-
- line = vid_priv->fb + row * VIDEO_FONT_HEIGHT * vid_priv->line_length;
- switch (vid_priv->bpix) {
- case VIDEO_BPP8:
- if (IS_ENABLED(CONFIG_VIDEO_BPP8)) {
- uint8_t *dst = line;
-
- for (i = 0; i < pixels; i++)
- *dst++ = clr;
- end = dst;
- break;
- }
- case VIDEO_BPP16:
- if (IS_ENABLED(CONFIG_VIDEO_BPP16)) {
- uint16_t *dst = line;
-
- for (i = 0; i < pixels; i++)
- *dst++ = clr;
- end = dst;
- break;
- }
- case VIDEO_BPP32:
- if (IS_ENABLED(CONFIG_VIDEO_BPP32)) {
- uint32_t *dst = line;
-
- for (i = 0; i < pixels; i++)
- *dst++ = clr;
- end = dst;
- break;
- }
- default:
- return -ENOSYS;
- }
- ret = vidconsole_sync_copy(dev, line, end);
- if (ret)
- return ret;
-
- return 0;
-}
-
-static int console_normal_move_rows(struct udevice *dev, uint rowdst,
-uint rowsrc, uint count)
-{
- struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent);
- void *dst;
- void *src;
- int size;
- int ret;
-
- dst = vid_priv->fb + rowdst * VIDEO_FONT_HEIGHT * vid_priv->line_length;
- src = vid_priv->fb + rowsrc * VIDEO_FONT_HEIGHT * vid_priv->line_length;
- size = VIDEO_FONT_HEIGHT * vid_priv->line_length *
