Re: [PATCH RFC u-boot-mvebu 00/59] arm: mvebu: Various fixes
On Tuesday 21 February 2023 21:45:07 Tony Dinh wrote: > Hi Pali, > > On Tue, Feb 21, 2023 at 3:14 PM Pali Rohár wrote: > > > > On Tuesday 21 February 2023 15:06:16 Tony Dinh wrote: > > > Hi Pali, > > > > > > On Tue, Feb 21, 2023 at 12:22 PM Pali Rohár wrote: > > > > > > > > This patch series contains various improvements and fixes for existing > > > > logical errors. Boot phase was adjusted to match behavior of Armada 385 > > > > BootROM by inspecting and disassembling of BootROM binary dump itself. > > > > Important information are included in documentation patch for kwboot. > > > > Most of the changes are untested, hence this patch series is just RFC. > > > > So please test changes before applying, idealy on SPI, SATA and SD/MMC. > > > > Nevertheless all patches on github passed CI testing in this PR: > > > > https://github.com/u-boot/u-boot/pull/275 > > ... > > > I went to patchwork and downloaded the series. > > > https://patchwork.ozlabs.org/project/uboot/patch/20230221201925.9644-2-p...@kernel.org > > > > > > When I applied the patches set there were some rejections. > > > > > > # patch -p1 < > > > /usr/src/builds-u-boot-marvell/pali_patches/arm-mvebu-Various-fixes.patch > > > > > ... > > FAILED > > ... > > > > > > > > > I'm on the latest master branch (just did a git pull today). Could > > > some patches be out of order? > > > > > > Thanks, > > > Tony > > > > Well, that is because DENX mail server is broken and it crashed during > > processing antispam filter on my some of my patches. So some patches are > > missing in archive and then applying dependent patches failed. > > > > So ignore patchwork and email patches. Rather fetch changes from the > > mentioned github pull request https://github.com/u-boot/u-boot/pull/275 > > > > You can do it via git command (it fetch it to the new mvebu branch): > > > > git fetch https://github.com/u-boot/u-boot.git refs/pull/275/merge:mvebu > > Indeed! That pull request was applied without problem. > > So I did a general regression test running rebuilt kwboot binary, and > rebuilt u-boot images for these 2 Marvell boards: > > Thecus N2350 (Armada 385) > Pogo V4 (Kirkwood 88F6192). > > So for that part: > Tested-by: Tony Dinh > > All the best, > Tony Thanks for testing! Anyway do you have some A38x board which can boot from SD/MMC, SATA or NAND? This is what is needed to test too. I see that Pogo boots from NAND but it does not use SPL.
Re: [PATCH] board: edgeble: Fix neural-compute-module-2 board name
On 2023/1/25 03:31, Jagan Teki wrote:
The board should be RV1126-NEU2 instead RV1126-ECM0.
Fix the wrong name.
Fixes: b8f1ca954013 ("board: rockchip: Add Edgeble Neu2 IO Board")
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
board/edgeble/neural-compute-module-2/MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/edgeble/neural-compute-module-2/MAINTAINERS
b/board/edgeble/neural-compute-module-2/MAINTAINERS
index 38edb3a360..bd2405220f 100644
--- a/board/edgeble/neural-compute-module-2/MAINTAINERS
+++ b/board/edgeble/neural-compute-module-2/MAINTAINERS
@@ -1,4 +1,4 @@
-RV1126-ECM0
+RV1126-NEU2
M:Jagan Teki
S:Maintained
F:board/edgeble/neural-compute-module-2
Re: [PATCH V2 7/9] gpio/rockchip: rk_gpio support v2 gpio controller
On 2023/2/14 06:27, Chris Morgan wrote:
From: Chris Morgan
Add support for the newer GPIO controller used by the rk356x series,
as well as the pinctrl device for the rk356x series. The GPIOv2
controller has a write enable bit for some registers which differs
from the older versions of the GPIO controller.
Signed-off-by: Peter Geis
Signed-off-by: Chris Morgan
With FUKAUMI Naoki's comment apply:
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/include/asm/arch-rockchip/gpio.h | 38 ++
drivers/gpio/rk_gpio.c| 49 +-
drivers/pinctrl/rockchip/Makefile | 1 +
drivers/pinctrl/rockchip/pinctrl-rk3568.c | 453 ++
.../pinctrl/rockchip/pinctrl-rockchip-core.c | 12 +-
5 files changed, 540 insertions(+), 13 deletions(-)
create mode 100644 drivers/pinctrl/rockchip/pinctrl-rk3568.c
diff --git a/arch/arm/include/asm/arch-rockchip/gpio.h
b/arch/arm/include/asm/arch-rockchip/gpio.h
index 1aaec5faec..15f5de321b 100644
--- a/arch/arm/include/asm/arch-rockchip/gpio.h
+++ b/arch/arm/include/asm/arch-rockchip/gpio.h
@@ -6,6 +6,7 @@
#ifndef _ASM_ARCH_GPIO_H
#define _ASM_ARCH_GPIO_H
+#if !defined(CONFIG_ROCKCHIP_RK3568)
struct rockchip_gpio_regs {
u32 swport_dr;
u32 swport_ddr;
@@ -22,7 +23,44 @@ struct rockchip_gpio_regs {
u32 reserved1[(0x60 - 0x54) / 4];
u32 ls_sync;
};
+
check_member(rockchip_gpio_regs, ls_sync, 0x60);
+#else
+struct rockchip_gpio_regs {
+ u32 swport_dr_l;/* ADDRESS OFFSET: 0x */
+ u32 swport_dr_h;/* ADDRESS OFFSET: 0x0004 */
+ u32 swport_ddr_l; /* ADDRESS OFFSET: 0x0008 */
+ u32 swport_ddr_h; /* ADDRESS OFFSET: 0x000c */
+ u32 int_en_l; /* ADDRESS OFFSET: 0x0010 */
+ u32 int_en_h; /* ADDRESS OFFSET: 0x0014 */
+ u32 int_mask_l; /* ADDRESS OFFSET: 0x0018 */
+ u32 int_mask_h; /* ADDRESS OFFSET: 0x001c */
+ u32 int_type_l; /* ADDRESS OFFSET: 0x0020 */
+ u32 int_type_h; /* ADDRESS OFFSET: 0x0024 */
+ u32 int_polarity_l; /* ADDRESS OFFSET: 0x0028 */
+ u32 int_polarity_h; /* ADDRESS OFFSET: 0x002c */
+ u32 int_bothedge_l; /* ADDRESS OFFSET: 0x0030 */
+ u32 int_bothedge_h; /* ADDRESS OFFSET: 0x0034 */
+ u32 debounce_l; /* ADDRESS OFFSET: 0x0038 */
+ u32 debounce_h; /* ADDRESS OFFSET: 0x003c */
+ u32 dbclk_div_en_l; /* ADDRESS OFFSET: 0x0040 */
+ u32 dbclk_div_en_h; /* ADDRESS OFFSET: 0x0044 */
+ u32 dbclk_div_con; /* ADDRESS OFFSET: 0x0048 */
+ u32 reserved004c; /* ADDRESS OFFSET: 0x004c */
+ u32 int_status; /* ADDRESS OFFSET: 0x0050 */
+ u32 reserved0054; /* ADDRESS OFFSET: 0x0054 */
+ u32 int_rawstatus; /* ADDRESS OFFSET: 0x0058 */
+ u32 reserved005c; /* ADDRESS OFFSET: 0x005c */
+ u32 port_eoi_l; /* ADDRESS OFFSET: 0x0060 */
+ u32 port_eoi_h; /* ADDRESS OFFSET: 0x0064 */
+ u32 reserved0068[2];/* ADDRESS OFFSET: 0x0068 */
+ u32 ext_port; /* ADDRESS OFFSET: 0x0070 */
+ u32 reserved0074; /* ADDRESS OFFSET: 0x0074 */
+ u32 ver_id; /* ADDRESS OFFSET: 0x0078 */
+};
+
+check_member(rockchip_gpio_regs, ver_id, 0x0078);
+#endif
enum gpio_pu_pd {
GPIO_PULL_NORMAL = 0,
diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index 98a79b5f4d..e2653be058 100644
--- a/drivers/gpio/rk_gpio.c
+++ b/drivers/gpio/rk_gpio.c
@@ -2,12 +2,15 @@
/*
* (C) Copyright 2015 Google, Inc
*
- * (C) Copyright 2008-2014 Rockchip Electronics
+ * (C) Copyright 2008-2023 Rockchip Electronics
* Peter, Software Engineering, .
+ * Jianqun Xu, Software Engineering, .
*/
#include
#include
+#include
+#include
#include
#include
#include
@@ -23,6 +26,35 @@ enum {
#define OFFSET_TO_BIT(bit) (1UL << (bit))
+/*
+ * Newer Rockchip devices have additional registers that must be
+ * accounted for.
+ */
+#if defined(CONFIG_ROCKCHIP_RK3568)
+#define GPIO_VER 2
+#define REG_L(R) (R##_l)
+#define REG_H(R) (R##_h)
+#define READ_REG(REG) ((readl(REG_L(REG)) & 0x) | \
+ ((readl(REG_H(REG)) & 0x) << 16))
+#define WRITE_REG(REG, VAL)\
+{\
+ writel(((VAL) & 0x) | 0x, REG_L(REG)); \
+ writelVAL) & 0x) >> 16) | 0x
Re: [PATCH V2 9/9] evb1-v10-rk3568: Update MAINTAINERS and documentation
On 2023/2/14 06:27, Chris Morgan wrote: From: Chris Morgan Update the MAINTAINERS file to include the devicetree for the rk3568-evb1-v10 board. Also update Rockchip board docs to include information on building RK3568 based devices. Signed-off-by: Chris Morgan --- board/rockchip/evb_rk3568/MAINTAINERS | 12 +++- doc/board/rockchip/rockchip.rst | 10 ++ 2 files changed, 17 insertions(+), 5 deletions(-) diff --git a/board/rockchip/evb_rk3568/MAINTAINERS b/board/rockchip/evb_rk3568/MAINTAINERS index b6ea498d2b..f959e8862b 100644 --- a/board/rockchip/evb_rk3568/MAINTAINERS +++ b/board/rockchip/evb_rk3568/MAINTAINERS @@ -1,6 +1,8 @@ EVB-RK3568 -M: Joseph Chen -S: Maintained -F: board/rockchip/evb_rk3568 -F: include/configs/evb_rk3568.h -F: configs/evb-rk3568_defconfig +M: Joseph Chen +S: Maintained +F: arch/arm/dts/rk3568-evb1-v10-u-boot.dtsi +F: arch/arm/dts/rk3568-evb1-v10.dts +F: board/rockchip/evb_rk3568 +F: configs/evb1-v10-rk3568_defconfig +F: include/configs/evb_rk3568.h diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 28c837a382..02e6e82927 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -86,6 +86,8 @@ List of mainline supported Rockchip boards: - Radxa ROCK Pi 4 (rock-pi-4-rk3399) - Rockchip Evb-RK3399 (evb_rk3399) - Theobroma Systems RK3399-Q7 SoM - Puma (puma_rk3399) +* rk3568 + - Rockchip EVB-RK3568 (evb1-v10-rk3568) * rv1108 - Rockchip Evb-rv1108 (evb-rv1108) - Elgin-R1 (elgin-rv1108) @@ -167,6 +169,14 @@ To build rk3399 boards: make evb-rk3399_defconfig make CROSS_COMPILE=aarch64-linux-gnu- +To build rk3568 boards: + +.. code-block:: bash + + export BL31=../arm-trusted-firmware/build/rk3568/release/bl31/bl31.elf + make evb1-v10-rk3568_defconfig Keep to use make evb-rk3568_defconfig. Thanks, - Kever + make CROSS_COMPILE=aarch64-linux-gnu- + Flashing
Re: [PATCH V2 8/9] arm64: dts: rockchip: add gpio-ranges property to gpio nodes
On 2023/2/14 06:27, Chris Morgan wrote: From: Chris Morgan Add gpio-ranges property to GPIO nodes so that the bank ID can be correctly derived for each GPIO bank. Signed-off-by: Chris Morgan Reviewed-by: Kever Yang Thanks, - Kever --- arch/arm/dts/rk356x.dtsi | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/dts/rk356x.dtsi b/arch/arm/dts/rk356x.dtsi index 5706c3e24f..6492ace0de 100644 --- a/arch/arm/dts/rk356x.dtsi +++ b/arch/arm/dts/rk356x.dtsi @@ -1806,6 +1806,7 @@ interrupts = ; clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -1817,6 +1818,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -1828,6 +1830,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -1839,6 +1842,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -1850,6 +1854,7 @@ interrupts = ; clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; gpio-controller; + gpio-ranges = <&pinctrl 0 128 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>;
Re: [PATCH V2 5/9] rockchip: rk3568: add boot device detection
On 2023/2/16 02:28, Jonas Karlman wrote:
Hi Chris,
On 2023-02-13 23:27, Chris Morgan wrote:
From: Chris Morgan
Enable spl to detect which device it was booted from.
Signed-off-by: Peter Geis
Signed-off-by: Chris Morgan
---
arch/arm/mach-rockchip/rk3568/rk3568.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c
b/arch/arm/mach-rockchip/rk3568/rk3568.c
index 22eeb77d41..a2d59abc26 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -7,6 +7,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -70,6 +71,12 @@ static struct mm_region rk3568_mem_map[] = {
}
};
+const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
+ [BROM_BOOTSOURCE_EMMC] = "/sdhci@fe31",
This should be mmc@@fe31.
With this update.
Reviewed-by: Kever Yang
Thanks,
- Kever
Regards,
Jonas
+ [BROM_BOOTSOURCE_SPINOR] = "/spi@fe30/flash@0",
+ [BROM_BOOTSOURCE_SD] = "/mmc@fe2b",
+};
+
struct mm_region *mem_map = rk3568_mem_map;
void board_debug_uart_init(void)
Re: [PATCH] dm: adc: add iMX93 ADC support
On 21/02/2023 21:28, Fabio Estevam wrote: Hi Luca, On Tue, Feb 21, 2023 at 9:55 AM Luca Ellero wrote: +int imx93_adc_channel_data(struct udevice *dev, int channel, static int +int imx93_adc_start_channel(struct udevice *dev, int channel) static int +int imx93_adc_stop(struct udevice *dev) static int +int imx93_adc_probe(struct udevice *dev) static int +int imx93_adc_of_to_plat(struct udevice *dev) static int Also, please add a user for this driver in a subsequent patch. Otherwise it will never be built and would become dead code. Hi Fabio, thank you for your reply. I will fix the issues and resend. I will also add proper CONFIG_ to imx93_11x11_evk_defconfig. Regards -- Luca Ellero E-mail: luca.ell...@brickedbrain.com Internet: www.brickedbrain.com
Re: [PATCH V2 2/9] dts: rockchip: px30: add gpio-ranges property to gpio nodes
On 2023/2/14 06:27, Chris Morgan wrote:
From: Chris Morgan
Add the gpio-ranges property to each GPIO node for use in deriving
the correct bank ID. Note that invoking "gpio status -a" no longer
causes the board to hit a "Synchronous Abort".
Fixes: 537b1a277479 ("rockchip: add px30 devicetrees")
Signed-off-by: Chris Morgan
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/px30.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index bfa3580429..3152bf107d 100644
--- a/arch/arm/dts/px30.dtsi
+++ b/arch/arm/dts/px30.dtsi
@@ -1366,6 +1366,7 @@
interrupts = ;
clocks = <&pmucru PCLK_GPIO0_PMU>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1378,6 +1379,7 @@
interrupts = ;
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 32 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1390,6 +1392,7 @@
interrupts = ;
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 64 32>;
#gpio-cells = <2>;
interrupt-controller;
@@ -1402,6 +1405,7 @@
interrupts = ;
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 96 32>;
#gpio-cells = <2>;
interrupt-controller;
Re: [PATCH V2 1/9] gpio: gpio-rockchip: parse gpio-ranges for bank id
On 2023/2/14 06:27, Chris Morgan wrote:
From: Chris Morgan
Use the new devicetree property of gpio-ranges to determine the GPIO
bank ID. Preserve the "old" way of doing things too, so that boards
can be migrated and tested gradually (I only have a 3566 and 3326 to
test).
Signed-off-by: Chris Morgan
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/gpio/rk_gpio.c | 20 +---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index 68f30157a9..98a79b5f4d 100644
--- a/drivers/gpio/rk_gpio.c
+++ b/drivers/gpio/rk_gpio.c
@@ -142,6 +142,7 @@ static int rockchip_gpio_probe(struct udevice *dev)
{
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct rockchip_gpio_priv *priv = dev_get_priv(dev);
+ struct ofnode_phandle_args args;
char *end;
int ret;
@@ -150,9 +151,22 @@ static int rockchip_gpio_probe(struct udevice *dev)
if (ret)
return ret;
- uc_priv->gpio_count = ROCKCHIP_GPIOS_PER_BANK;
- end = strrchr(dev->name, '@');
- priv->bank = trailing_strtoln(dev->name, end);
+ /*
+* If "gpio-ranges" is present in the devicetree use it to parse
+* the GPIO bank ID, otherwise use the legacy method.
+*/
+ ret = ofnode_parse_phandle_with_args(dev_ofnode(dev),
+"gpio-ranges", NULL, 3,
+0, &args);
+ if (!ret || ret != -ENOENT) {
+ uc_priv->gpio_count = args.args[2];
+ priv->bank = args.args[1] / args.args[2];
+ } else {
+ uc_priv->gpio_count = ROCKCHIP_GPIOS_PER_BANK;
+ end = strrchr(dev->name, '@');
+ priv->bank = trailing_strtoln(dev->name, end);
+ }
+
priv->name[0] = 'A' + priv->bank;
uc_priv->bank_name = priv->name;
Re: [PATCH V2 6/9] rockchip: rk3568: enable automatic power savings
On 2023/2/14 06:27, Chris Morgan wrote:
From: Chris Morgan
It enables automatic clock gating on idle, disables the eDP phy by
default, and sets the core pvtpll ring length. It is reported this
lowers the temperature on at least one SoC by 7C.
Signed-off-by: Peter Geis
Signed-off-by: Chris Morgan
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/mach-rockchip/rk3568/rk3568.c | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c
b/arch/arm/mach-rockchip/rk3568/rk3568.c
index a2d59abc26..4a08820a09 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -24,6 +24,16 @@
#define SGRF_SOC_CON4 0x10
#define EMMC_HPROT_SECURE_CTRL0x03
#define SDMMC0_HPROT_SECURE_CTRL 0x01
+
+#define PMU_BASE_ADDR 0xfdd9
+#define PMU_NOC_AUTO_CON0 (0x70)
+#define PMU_NOC_AUTO_CON1 (0x74)
+#define EDP_PHY_GRF_BASE 0xfdcb
+#define EDP_PHY_GRF_CON0 (EDP_PHY_GRF_BASE + 0x00)
+#define EDP_PHY_GRF_CON10 (EDP_PHY_GRF_BASE + 0x28)
+#define CPU_GRF_BASE 0xfdc3
+#define GRF_CORE_PVTPLL_CON0 (0x10)
+
/* PMU_GRF_GPIO0D_IOMUX_L */
enum {
GPIO0D1_SHIFT = 4,
@@ -98,6 +108,20 @@ void board_debug_uart_init(void)
int arch_cpu_init(void)
{
#ifdef CONFIG_SPL_BUILD
+ /*
+* When perform idle operation, corresponding clock can
+* be opened or gated automatically.
+*/
+ writel(0x, PMU_BASE_ADDR + PMU_NOC_AUTO_CON0);
+ writel(0x000f000f, PMU_BASE_ADDR + PMU_NOC_AUTO_CON1);
+
+ /* Disable eDP phy by default */
+ writel(0x00070007, EDP_PHY_GRF_CON10);
+ writel(0x0ff10ff1, EDP_PHY_GRF_CON0);
+
+ /* Set core pvtpll ring length */
+ writel(0x00ff002b, CPU_GRF_BASE + GRF_CORE_PVTPLL_CON0);
+
/* Set the emmc sdmmc0 to secure */
rk_clrreg(SGRF_BASE + SGRF_SOC_CON4, (EMMC_HPROT_SECURE_CTRL << 11
| SDMMC0_HPROT_SECURE_CTRL << 4));
Re: [PATCH V2 4/9] arm64: dts: rockchip: Sync rk356x from Linux main
Hi Chris,
On 2023/2/16 02:44, Jonas Karlman wrote:
On 2023-02-13 23:27, Chris Morgan wrote:
From: Chris Morgan
Sync rk3566 and rk3568 from the mainline Linux kernel (6.2-rc2 as of
this writing).
Note that this will rename the rk3568-evb to rk3568-evb1-v10.
Is the rename and sync of evb-rk3568 necessary for your use case?
I tend to abuse the evb variants as "minimal" soc defconfig. They
usually contain minimal needed to boot any board following the reference
design from sd or emmc.
Using the current evb-rk3568_defconfig and rk3568-evb.dts I can boot,
load atf and start linux on all my rk3566/rk3568 boards. Not sure that
will continue to be possible after these changes.
There are many SBC boards copy the core logic from evb, so the
evb-rk3568 config can
make many boards boot. We can keep evb-rk3568_defconfig before there in
another
rk3568 evb available on the tree.
For others:
Reviewed-by: Kever Yang
Thanks,
- Kever
Regards,
Jonas
Signed-off-by: Chris Morgan
---
arch/arm/dts/Makefile | 2 +-
arch/arm/dts/rk3568-evb.dts | 79 --
...-boot.dtsi => rk3568-evb1-v10-u-boot.dtsi} | 0
arch/arm/dts/rk3568-evb1-v10.dts | 692 ++
arch/arm/dts/rk3568.dtsi | 122 +++
arch/arm/dts/rk356x.dtsi | 182 -
...68_defconfig => evb1-v10-rk3568_defconfig} | 4 +-
7 files changed, 985 insertions(+), 96 deletions(-)
delete mode 100644 arch/arm/dts/rk3568-evb.dts
rename arch/arm/dts/{rk3568-evb-u-boot.dtsi => rk3568-evb1-v10-u-boot.dtsi}
(100%)
create mode 100644 arch/arm/dts/rk3568-evb1-v10.dts
rename configs/{evb-rk3568_defconfig => evb1-v10-rk3568_defconfig} (94%)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9d647b9639..56e0543bd2 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -165,7 +165,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399pro-rock-pi-n10.dtb
dtb-$(CONFIG_ROCKCHIP_RK3568) += \
- rk3568-evb.dtb
+ rk3568-evb1-v10.dtb
dtb-$(CONFIG_ROCKCHIP_RV1108) += \
rv1108-elgin-r1.dtb \
diff --git a/arch/arm/dts/rk3568-evb.dts b/arch/arm/dts/rk3568-evb.dts
deleted file mode 100644
index 6978655709..00
--- a/arch/arm/dts/rk3568-evb.dts
+++ /dev/null
@@ -1,79 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
- *
- */
-
-/dts-v1/;
-#include
-#include
-#include "rk3568.dtsi"
-
-/ {
- model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
- compatible = "rockchip,rk3568-evb1-v10", "rockchip,rk3568";
-
- chosen: chosen {
- stdout-path = "serial2:150n8";
- };
-
- dc_12v: dc-12v {
- compatible = "regulator-fixed";
- regulator-name = "dc_12v";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200>;
- regulator-max-microvolt = <1200>;
- };
-
- vcc3v3_sys: vcc3v3-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- vin-supply = <&dc_12v>;
- };
-
- vcc5v0_sys: vcc5v0-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <500>;
- regulator-max-microvolt = <500>;
- vin-supply = <&dc_12v>;
- };
-
- vcc3v3_lcd0_n: vcc3v3-lcd0-n {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_lcd0_n";
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc3v3_lcd1_n: vcc3v3-lcd1-n {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_lcd1_n";
- regulator-boot-on;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&sdhci {
- bus-width = <8>;
- max-frequency = <2>;
- non-removable;
- status = "okay";
-};
-
-&uart2 {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3568-evb-u-boot.dtsi
b/arch/arm/dts/rk3568-evb1-v10-u-boot.dtsi
similarity index 100%
rename from arch/arm/dts/rk3568-evb-u-boot.dtsi
rename to arch/arm/dts/rk3568-evb1-v10-u-boot.dtsi
diff --git a/arch/arm/dts/rk3568-evb1-v10.dts b/arch/arm/dts/rk3568-evb1-v10.dts
new file mode 100644
index 00..674792567f
--- /dev/null
+++ b/arch/arm/dts/rk3568-evb1-v10.dts
@@ -0,0 +1,692 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021
Re: [PATCH v1 18/18] board: rockchip: Add Edgeble Neural Compute Module 6
Hi Jagan,
On 2023/1/30 22:57, Jagan Teki wrote:
Neural Compute Module 6(Neu2) is a 96boards SoM-CB compute module
based on Rockchip RK3588 from Edgeble AI.
General features:
- Rockchip RK3588
- up to 32GB LPDDR4x
- up to 128GB eMMC
- 2x MIPI CSI2 FPC
On module WiFi6/BT5 is available in the following Neu6 variants.
Neural Compute Module 6(Neu6) IO board is an industrial form factor
ready-to-use IO board from Edgeble AI.
IO board offers plenty of peripherals and connectivity options and
this patch enables basic eMMC and UART which is enough to successfully
boot Linux.
Neu6 needs to mount on top of this IO board in order to create a
complete Edgeble Neural Compute Module 6(Neu6) IO platform.
Boot log for the record,
DDR Version V1.08 20220617
LPDDR4X, 2112MHz
channel[0] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
channel[1] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
channel[2] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
channel[3] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
Manufacturer ID:0x6
CH0 RX Vref:31.7%, TX Vref:21.8%,21.8%
CH1 RX Vref:30.7%, TX Vref:22.8%,23.8%
CH2 RX Vref:30.7%, TX Vref:22.8%,22.8%
CH3 RX Vref:30.7%, TX Vref:21.8%,21.8%
change to F1: 528MHz
change to F2: 1068MHz
change to F3: 1560MHz
change to F0: 2112MHz
out
U-Boot SPL 2023.01-00952-g1d1785a516-dirty (Jan 30 2023 - 19:53:55 +0530)
Trying to boot from MMC1
INFO:Preloader serial: 2
NOTICE: BL31: v2.3():v2.3-391-g856309329:derrick.huang
NOTICE: BL31: Built : 14:15:50, Jul 18 2022
INFO:ext 32k is not valid
INFO:GICv3 without legacy support detected.
INFO:ARM GICv3 driver initialized in EL3
INFO:system boots from cpu-hwid-0
INFO:idle_st=0x21fff, pd_st=0x11fff9, repair_st=0xfff70001
INFO:dfs DDR fsp_params[0].freq_mhz= 2112MHz
INFO:dfs DDR fsp_params[1].freq_mhz= 528MHz
INFO:dfs DDR fsp_params[2].freq_mhz= 1068MHz
INFO:dfs DDR fsp_params[3].freq_mhz= 1560MHz
INFO:BL31: Initialising Exception Handling Framework
INFO:BL31: Initializing runtime services
WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE
initialization. SMC`s destined for OPTEE will return SMC_UNK
ERROR: Error initializing runtime service opteed_fast
INFO:BL31: Preparing for EL3 exit to normal world
INFO:Entry point address = 0xa0
INFO:SPSR = 0x3c9
U-Boot 2023.01-00952-g1d1785a516-dirty (Jan 30 2023 - 19:53:55 +0530)
Model: Edgeble Neu6A IO Board
DRAM: 7.5 GiB (effective 3.7 GiB)
Core: 71 devices, 15 uclasses, devicetree: separate
MMC: mmc@fe2c: 0
Loading Environment from nowhere... OK
In:serial@feb5
Out: serial@feb5
Err: serial@feb5
Model: Edgeble Neu6A IO Board
Net: No ethernet found.
Hit any key to stop autoboot: 0
=>
Add support for Edgeble Neu6 Model A IO Board.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
.../dts/rk3588-edgeble-neu6a-io-u-boot.dtsi | 24 +++
arch/arm/mach-rockchip/rk3588/Kconfig | 15 +
board/edgeble/neural-compute-module-6/Kconfig | 15 +
.../neural-compute-module-6/MAINTAINERS | 6 ++
.../edgeble/neural-compute-module-6/Makefile | 7 ++
board/edgeble/neural-compute-module-6/neu6.c | 4 ++
configs/neu6a-io-rk3588_defconfig | 67 +++
doc/board/rockchip/rockchip.rst | 2 +
include/configs/neural-compute-module-6.h | 15 +
9 files changed, 155 insertions(+)
create mode 100644 arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
create mode 100644 board/edgeble/neural-compute-module-6/Kconfig
create mode 100644 board/edgeble/neural-compute-module-6/MAINTAINERS
create mode 100644 board/edgeble/neural-compute-module-6/Makefile
create mode 100644 board/edgeble/neural-compute-module-6/neu6.c
create mode 100644 configs/neu6a-io-rk3588_defconfig
create mode 100644 include/configs/neural-compute-module-6.h
diff --git a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
new file mode 100644
index 00..19a658a662
--- /dev/null
+++ b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ */
+
+#include "rk3588-u-boot.dtsi"
+
+/ {
+ aliases {
+ mmc0 = &sdmmc;
+ };
+
+ chosen {
+ stdout-path = &uart2;
+ u-boot,spl-boot-order = &sdmmc;
+ };
+};
+
+&sdmmc {
+ bus-width = <4>;
+ u-boot,dm-spl;
+ u-boot,spl-fifo-mode;
+ status = "okay";
+};
diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig
b/arch/arm/mach-rockchip/rk3588/Kconfig
index e8c14e4187..def4094e2e 100644
--- a/arch/arm/mach-rockchip/rk3588/Kconfig
+++ b/arch/arm/mach-rockchip/rk3588/Kconfig
@@ -1,5 +1,18 @@
if ROCKCHIP_RK3588
+config TARGET_RK3588_NEU6
+ bool "Edgeble Neur
Re: [PATCH v1 15/18] ARM: dts: rockchip: Add rk3588-u-boot.dtsi
On 2023/1/30 22:57, Jagan Teki wrote:
Add u-boot,dm-spl and u-boot,dm-pre-reloc related properties
for Rockchip RK3588 SoC to boot the SPL.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk3588-u-boot.dtsi | 7 +
arch/arm/dts/rk3588s-u-boot.dtsi | 45
2 files changed, 52 insertions(+)
create mode 100644 arch/arm/dts/rk3588-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3588s-u-boot.dtsi
diff --git a/arch/arm/dts/rk3588-u-boot.dtsi b/arch/arm/dts/rk3588-u-boot.dtsi
new file mode 100644
index 00..4c8ac804d6
--- /dev/null
+++ b/arch/arm/dts/rk3588-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ */
+
+#include "rockchip-u-boot.dtsi"
+#include "rk3588s-u-boot.dtsi"
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi
new file mode 100644
index 00..cfcbef2fc2
--- /dev/null
+++ b/arch/arm/dts/rk3588s-u-boot.dtsi
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ */
+
+#include "rockchip-u-boot.dtsi"
+
+/ {
+ dmc {
+ compatible = "rockchip,rk3588-dmc";
+ u-boot,dm-pre-reloc;
+ status = "okay";
+ };
+
+ pmu1_grf: syscon@fd58a000 {
+ u-boot,dm-pre-reloc;
+ compatible = "rockchip,rk3588-pmu1-grf", "syscon";
+ reg = <0x0 0xfd58a000 0x0 0x2000>;
+ };
+};
+
+&xin24m {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&cru {
+ u-boot,dm-spl;
+ status = "okay";
+};
+
+&sys_grf {
+ u-boot,dm-spl;
+ status = "okay";
+};
+
+&uart2 {
+ clock-frequency = <2400>;
+ u-boot,dm-spl;
+ status = "okay";
+};
+
+&ioc {
+ u-boot,dm-spl;
+};
Re: [PATCH] include: rk3328: Add default env for compressed kernel images
On 2023/1/28 01:03, Christopher Obbard wrote: Add default memory addresses for kernel_comp_addr_r and kernel_comp_size to enable booting from a compressed kernel image. This area is temporarily used to decompress the kernel image on-the-fly. Signed-off-by: Christopher Obbard Reviewed-by: Kever Yang Thanks, - Kever --- include/configs/rk3328_common.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index fadcb93a5f..24b21c024d 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -19,7 +19,9 @@ "pxefile_addr_r=0x0060\0" \ "fdt_addr_r=0x01f0\0" \ "kernel_addr_r=0x0208\0" \ - "ramdisk_addr_r=0x0600\0" + "ramdisk_addr_r=0x0600\0" \ + "kernel_comp_addr_r=0x0800\0" \ + "kernel_comp_size=0x200\0" #include #define CFG_EXTRA_ENV_SETTINGS \
Re: [PATCH v2] usb: dwc3: Use the devm_gpiod_get_optional() API for reset gpio
On 2/22/23 02:06, Marek Vasut wrote: On 1/13/23 06:12, Venkatesh Yadav Abbarapu wrote: As the "reset-gpios" property is optional, don't return the error and just skip the gpio reset sequence. Signed-off-by: Venkatesh Yadav Abbarapu --- Changes in v2: - Replaced the gpio_request_by_name() the API with devm_gpiod_get_optional(). The PX30 seems to fail to build: https://source.denx.de/u-boot/custodians/u-boot-usb/-/jobs/580968 Doesn't look usb related. +Please report this bug. +make[4]: *** [scripts/Makefile.build:257: spl/drivers/mmc/mmc.o] Error 1 +make[3]: *** [scripts/Makefile.build:397: spl/drivers/mmc] Error 2 +make[2]: *** [scripts/Makefile.spl:533: spl/drivers] Error 2 Can you please double check it? Thanks, Michal
Re: [PATCH v3 1/2] configs: phycore-rk3288: Enable CONFIG_LTO
Hi Wadim, Samuel, Migrate to use the TPL+SPL can fix the size limit issue. On 2023/1/22 08:08, Samuel Holland wrote: From: Wadim Egorov The phycore-rk3288 SPL binary is reaching the limits of 32KB very often. Enable CONFIG_LTO to reduce the size of the SPL and make the board more future proof for changes increasing the SPL size. Signed-off-by: Wadim Egorov Signed-off-by: Samuel Holland Reviewed-by: Kever Yang Thanks, - Kever --- Changes in v3: - New patch for v3 configs/phycore-rk3288_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index 0632a928bc..f2a92e25a8 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -15,6 +15,7 @@ CONFIG_DEBUG_UART_BASE=0xff69 CONFIG_DEBUG_UART_CLOCK=2400 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y +CONFIG_LTO=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10 CONFIG_SYS_MONITOR_LEN=614400
Re: [PATCH v2] arm: dts: rockchip: rk3399: nanopi-r4s: Provide smbios sysinfo
On 2022/10/18 03:02, Christian Kohlschütter wrote:
Provide human-readable manufacturer and product names for the
FriendlyELEC NanoPi R4S.
Enable CONFIG_SYSINFO and CONFIG_SYSINFO_SMBIOS by default.
Signed-off-by: Christian Kohlschütter
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi | 22 ++
configs/nanopi-r4s-rk3399_defconfig| 6 ++
2 files changed, 28 insertions(+)
diff --git a/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
b/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
index cd1642527b..69800cc368 100644
--- a/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
@@ -14,3 +14,25 @@
#include "rk3399-nanopi4-u-boot.dtsi"
#include "rk3399-sdram-lpddr4-100.dtsi"
+
+/ {
+ smbios {
+ compatible = "u-boot,sysinfo-smbios";
+
+ smbios {
+ system {
+ manufacturer = "FriendlyELEC";
+ product = "NanoPi R4S";
+ };
+
+ baseboard {
+ manufacturer = "FriendlyELEC";
+ product = "NanoPi R4S";
+ };
+
+ chassis {
+ manufacturer = "FriendlyELEC";
+ };
+ };
+ };
+};
diff --git a/configs/nanopi-r4s-rk3399_defconfig
b/configs/nanopi-r4s-rk3399_defconfig
index d8854abbb1..502f007e6e 100644
--- a/configs/nanopi-r4s-rk3399_defconfig
+++ b/configs/nanopi-r4s-rk3399_defconfig
@@ -71,3 +71,9 @@ CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
+CONFIG_MISC=y
+CONFIG_MISC_INIT_R=y
+CONFIG_ROCKCHIP_EFUSE=y
+CONFIG_ROCKCHIP_OTP=y
+CONFIG_SYSINFO=y
+CONFIG_SYSINFO_SMBIOS=y
bootstd breakages
Hi Simon, Using the attached config U-Boot fails to compile. aarch64-linux-gnu-ld.bfd: boot/bootmeth_efi_mgr.o: in function `efi_mgr_check': /home/apalos/work/u-boot-tpm/boot/bootmeth_efi_mgr.c:39: undefined reference to `bootflow_iter_check_system' make: *** [Makefile:1752: u-boot] Error 1 make: *** Deleting file 'u-boot' Regards /Ilias CONFIG_ARM=y CONFIG_POSITION_INDEPENDENT=y CONFIG_ARCH_QEMU=y CONFIG_SYS_MALLOC_LEN=0x100 CONFIG_NR_DRAM_BANKS=1 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020 CONFIG_ENV_SIZE=0x4 CONFIG_ENV_SECT_SIZE=0x4 CONFIG_DEFAULT_DEVICE_TREE="qemu-arm64" CONFIG_DEBUG_UART_BASE=0x900 CONFIG_DEBUG_UART_CLOCK=0 CONFIG_ARMV8_CRYPTO=y CONFIG_SYS_LOAD_ADDR=0x4020 CONFIG_ENV_ADDR=0x400 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y # CONFIG_BOOTSTD is not set CONFIG_BOOTSTD_FULL=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="bootflow scan -lb" CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_PCI_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_DFU=y CONFIG_CMD_MTD=y CONFIG_CMD_PART=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_PXE=y CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_TPM=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_SCSI_AHCI=y CONFIG_AHCI_PCI=y CONFIG_DFU_TFTP=y CONFIG_DFU_MTD=y CONFIG_DFU_RAM=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=256 CONFIG_SYS_MAX_FLASH_BANKS=2 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y CONFIG_E1000=y CONFIG_NVME_PCI=y CONFIG_PCI=y CONFIG_PCIE_ECAM_GENERIC=y CONFIG_SCSI=y CONFIG_DM_SCSI=y CONFIG_DEBUG_UART_PL011=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_SYSRESET_CMD_POWEROFF=y CONFIG_SYSRESET_PSCI=y CONFIG_TPM2_MMIO=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_PCI=y CONFIG_USB_STORAGE=y CONFIG_TPM=y
Re: rk3399: Loading OP-TEE by SPL?
Hi Christoph, The SPL_OPTEE_IMAGE is suppose to use like ATF for armv7: TPL->SPL->BL31/ATF/OPTEE->U-Boot. But not for OPTEE use as a BL32 after BL31. BL31 and U-Boot is package as a itb file, so it's easy to add a BL32, but you may need to study how BL31 get entry to BL32 and then add support for it. Thanks, - Kever On 2023/2/22 04:16, Christoph Fritz wrote: Hello, my goal is to load OP-TEE after BL31 and before u-boot, so I enabled CONFIG_SPL_OPTEE_IMAGE. But it fails to build (tested current master): $ make -j$(nproc) CROSS_COMPILE=aarch64-linux-gnu- rock-pi-4-rk3399_defconfig all ./arch/arm/include/asm/unified.h: Assembler messages: ./arch/arm/include/asm/unified.h:12: Error: unknown pseudo-op: `.syntax' common/spl/spl_optee.S:11: Error: operand 1 must be an integer register -- `mov pc,r3' make[3]: *** [scripts/Makefile.build:292: spl/common/spl/spl_optee.o] Error 1 make[2]: *** [scripts/Makefile.spl:533: spl/common/spl] Error 2 make[2]: *** Waiting for unfinished jobs Without CONFIG_SPL_OPTEE_IMAGE the board starts like this: TPL -> SPL -> BL31 -> u-boot What's the correct way to start OP-TEE on rk3399? Any ideas? Thanks -- Christoph
Re: [PATCH RFC u-boot-mvebu 19/59] tools: kwboot: Show image type and error parsing reasons
On Tue, Feb 21, 2023 at 12:22 PM Pali Rohár wrote:
>
> Show image type and version during parsing of kwbimage.
> And show reasons in error messages when parsing failed.
> This can help to debug issues with invalid images.
>
> Signed-off-by: Pali Rohár
> ---
> tools/kwboot.c | 39 ++-
> 1 file changed, 34 insertions(+), 5 deletions(-)
>
> diff --git a/tools/kwboot.c b/tools/kwboot.c
> index cb31d5b858ce..7c666486f31f 100644
> --- a/tools/kwboot.c
> +++ b/tools/kwboot.c
> @@ -1976,6 +1976,21 @@ _inject_baudrate_change_code(void *img, size_t *size,
> int for_data,
> }
> }
>
> +static const char *
> +kwboot_img_type(uint8_t blockid)
> +{
> + switch (blockid) {
> + case IBR_HDR_I2C_ID: return "I2C";
> + case IBR_HDR_SPI_ID: return "SPI";
> + case IBR_HDR_NAND_ID: return "NAND";
> + case IBR_HDR_SATA_ID: return "SATA";
> + case IBR_HDR_PEX_ID: return "PEX";
> + case IBR_HDR_UART_ID: return "UART";
> + case IBR_HDR_SDIO_ID: return "SDIO";
> + default: return "unknown";
> + }
> +}
> +
> static int
> kwboot_img_patch(void *img, size_t *size, int baudrate)
> {
> @@ -1989,8 +2004,10 @@ kwboot_img_patch(void *img, size_t *size, int baudrate)
>
> hdr = img;
>
> - if (*size < sizeof(struct main_hdr_v1))
> + if (*size < sizeof(struct main_hdr_v1)) {
> + fprintf(stderr, "Invalid image header size\n");
> goto err;
> + }
>
> image_ver = kwbimage_version(img);
> if (image_ver != 0 && image_ver != 1) {
> @@ -2000,12 +2017,18 @@ kwboot_img_patch(void *img, size_t *size, int
> baudrate)
>
> hdrsz = kwbheader_size(hdr);
>
> - if (*size < hdrsz)
> + if (*size < hdrsz) {
> + fprintf(stderr, "Invalid image header size\n");
> goto err;
> + }
> +
> + kwboot_printv("Detected kwbimage v%d with %s boot signature\n",
> image_ver, kwboot_img_type(hdr->blockid));
>
> csum = kwboot_hdr_csum8(hdr) - hdr->checksum;
> - if (csum != hdr->checksum)
> + if (csum != hdr->checksum) {
> + fprintf(stderr, "Image has invalid header checksum stored in
> image header\n");
> goto err;
> + }
>
> srcaddr = le32_to_cpu(hdr->srcaddr);
>
> @@ -2028,9 +2051,15 @@ kwboot_img_patch(void *img, size_t *size, int baudrate)
> break;
> }
>
> - if (hdrsz > le32_to_cpu(hdr->srcaddr) ||
> - *size < le32_to_cpu(hdr->srcaddr) + le32_to_cpu(hdr->blocksize))
> + if (hdrsz > le32_to_cpu(hdr->srcaddr)) {
> + fprintf(stderr, "Image has invalid data offset stored in
> image header\n");
> + goto err;
> + }
> +
> + if (*size < le32_to_cpu(hdr->srcaddr) + le32_to_cpu(hdr->blocksize)) {
> + fprintf(stderr, "Image has invalid data size stored in image
> header\n");
> goto err;
> + }
>
> for_each_opt_hdr_v1 (ohdr, hdr) {
> if (!opt_hdr_v1_valid_size(ohdr, (const uint8_t *)hdr +
> hdrsz)) {
> --
> 2.20.1
>
Nominal cases (no error) with Armada 385 and KIrkwood 6192:
Detected kwbimage v1 with SPI boot signature
Detected kwbimage v0 with NAND boot signature
Tested-by: Tony Dinh
All the best,
Tony
Re: [PATCH RFC u-boot-mvebu 00/59] arm: mvebu: Various fixes
Hi Pali, On Tue, Feb 21, 2023 at 3:14 PM Pali Rohár wrote: > > On Tuesday 21 February 2023 15:06:16 Tony Dinh wrote: > > Hi Pali, > > > > On Tue, Feb 21, 2023 at 12:22 PM Pali Rohár wrote: > > > > > > This patch series contains various improvements and fixes for existing > > > logical errors. Boot phase was adjusted to match behavior of Armada 385 > > > BootROM by inspecting and disassembling of BootROM binary dump itself. > > > Important information are included in documentation patch for kwboot. > > > Most of the changes are untested, hence this patch series is just RFC. > > > So please test changes before applying, idealy on SPI, SATA and SD/MMC. > > > Nevertheless all patches on github passed CI testing in this PR: > > > https://github.com/u-boot/u-boot/pull/275 > ... > > I went to patchwork and downloaded the series. > > https://patchwork.ozlabs.org/project/uboot/patch/20230221201925.9644-2-p...@kernel.org > > > > When I applied the patches set there were some rejections. > > > > # patch -p1 < > > /usr/src/builds-u-boot-marvell/pali_patches/arm-mvebu-Various-fixes.patch > > > ... > FAILED > ... > > > > > > I'm on the latest master branch (just did a git pull today). Could > > some patches be out of order? > > > > Thanks, > > Tony > > Well, that is because DENX mail server is broken and it crashed during > processing antispam filter on my some of my patches. So some patches are > missing in archive and then applying dependent patches failed. > > So ignore patchwork and email patches. Rather fetch changes from the > mentioned github pull request https://github.com/u-boot/u-boot/pull/275 > > You can do it via git command (it fetch it to the new mvebu branch): > > git fetch https://github.com/u-boot/u-boot.git refs/pull/275/merge:mvebu Indeed! That pull request was applied without problem. So I did a general regression test running rebuilt kwboot binary, and rebuilt u-boot images for these 2 Marvell boards: Thecus N2350 (Armada 385) Pogo V4 (Kirkwood 88F6192). So for that part: Tested-by: Tony Dinh All the best, Tony
Re: [PATCH v5 0/6] tpm: Support boot measurements
On Thu, 2 Feb 2023 at 17:08, Eddie James wrote: > > This series adds support for measuring the boot images more generically > than the existing EFI support. Several EFI functions have been moved to > the TPM layer. The series includes optional measurement from the bootm > command. > A new test case has been added for the bootm measurement to test the new > path, and the sandbox TPM2 driver has been updated to support this use > case. > This series is based on Ilias' auto-startup series: > https://lore.kernel.org/u-boot/20230126081844.591148-1-ilias.apalodi...@linaro.org/ Nice work Eddie. It looks like you're closing in on the issues Ilias and Simon have. I did some testing and found some missing dependencies from running 'make check': sandbox_spl: +make O=/home/joel/dev/u-boot/upstream/build-sandbox_spl -s sandbox_spl_defconfig +make O=/home/joel/dev/u-boot/upstream/build-sandbox_spl -s -j8 /usr/bin/ld: warning: test/overlay/test-fdt-overlay-stacked.dtb.o: missing .note.GNU-stack section implies executable stack /usr/bin/ld: NOTE: This behaviour is deprecated and will be removed in a future version of the linker /usr/bin/ld: /tmp/cc8cNroX.ltrans22.ltrans.o:(.data.rel+0x440): undefined reference to `do_ut_measurement' collect2: error: ld returned 1 exit status make[2]: *** [/home/joel/dev/u-boot/upstream/Makefile:1752: u-boot] Error 1 There's a few variants of the sandbox defconfig. I'm not sure if we want to exclude the measurement code from those configs, or add it to the configs. When fixing them up to add CONFIG_MEASURED_BOOT=y we still fail to link: sandbox_spl: +make O=/home/joel/dev/u-boot/upstream/build-sandbox_spl -s sandbox_spl_defconfig +make O=/home/joel/dev/u-boot/upstream/build-sandbox_spl -s -j8 /usr/bin/ld: warning: test/overlay/test-fdt-overlay-stacked.dtb.o: missing .note.GNU-stack section implies executable stack /usr/bin/ld: NOTE: This behaviour is deprecated and will be removed in a future version of the linker /usr/bin/ld: /tmp/ccRuOSFi.ltrans17.ltrans.o: in function `tcg2_create_digest': /home/joel/dev/u-boot/upstream/build-sandbox_spl/../lib/tpm-v2.c:112: undefined reference to `sha512_starts' /usr/bin/ld: /home/joel/dev/u-boot/upstream/build-sandbox_spl/../lib/tpm-v2.c:113: undefined reference to `sha512_update' /usr/bin/ld: /home/joel/dev/u-boot/upstream/build-sandbox_spl/../lib/tpm-v2.c:114: undefined reference to `sha512_finish' /usr/bin/ld: /home/joel/dev/u-boot/upstream/build-sandbox_spl/../lib/tpm-v2.c:106: undefined reference to `sha384_starts' /usr/bin/ld: /home/joel/dev/u-boot/upstream/build-sandbox_spl/../lib/tpm-v2.c:107: undefined reference to `sha384_update' /usr/bin/ld: /home/joel/dev/u-boot/upstream/build-sandbox_spl/../lib/tpm-v2.c:108: undefined reference to `sha384_finish' collect2: error: ld returned 1 exit status This sorted that out for me: --- a/lib/Kconfig +++ b/lib/Kconfig @@ -411,6 +411,8 @@ config TPM bool "Trusted Platform Module (TPM) Support" depends on DM imply DM_RNG + select SHA512 + select SHA384 The tree I tested with is here: https://github.com/shenki/u-boot/commits/measured-boot Cheers, Joel > > Changes since v4: > - Remove tcg2_measure_event function and check for NULL data in >tcg2_measure_data > - Use tpm_auto_startup > - Fix efi_tcg2.c compilation for removing tcg2_pcr_read function > - Change PCR indexes for initrd and dtb > - Drop u8 casting in measurement test > - Use bullets in documentation > > Changes since v3: > - Reordered headers > - Refactored more of EFI code into common code > Removed digest_info structure and instead used the common alg_to_mask > and alg_to_len > Improved event log parsing in common code to get it equivalent to EFI > Common code now extends PCR if previous bootloader stage couldn't > No need to allocate memory in the common code, so EFI copies the > discovered buffer like it did before > Rename efi measure_event function > > Changes since v2: > - Add documentation. > - Changed reserved memory address to the top of the RAM for sandbox dts. > - Add measure state to booti and bootz. > - Skip measurement for EFI images that should be measured > > Changes since v1: > - Refactor TPM layer functions to allow EFI system to use them, and >remove duplicate EFI functions. > - Add test case > - Drop #ifdefs for bootm > - Add devicetree measurement config option > - Update sandbox TPM driver > > Eddie James (6): > tpm: Fix spelling for tpmu_ha union > tpm: Support boot measurements > bootm: Support boot measurement > tpm: sandbox: Update for needed TPM2 capabilities > test: Add sandbox TPM boot measurement > doc: Add measured boot documentation > > arch/sandbox/dts/sandbox.dtsi | 14 + > arch/sandbox/dts/test.dts | 13 + > boot/Kconfig | 23 + > boot/bootm.c | 70 +++ > cmd/booti.c|1 + > cmd/bootm.c|2 +
Re: [PATCH v2] binman: bintool: Add support for tool directories
Hi Simon
On 22/02/23 01:05, Simon Glass wrote:
Hi Neha,
On Fri, 17 Feb 2023 at 04:46, Neha Malcom Francis wrote:
Currently, bintool supports external compilable tools as single
executable files. Adding support for git repos that can be used to run
non-compilable scripting tools that cannot otherwise be present in
binman.
Signed-off-by: Neha Malcom Francis
---
Changes in v2:
- added parameter to obtain path to download the directory
optionally, enables flexibility to avoid using
DOWNLOAD_DESTDIR
- added test to bintool_test.py
- s/FETCH_NO_BUILD/FETCH_SOURCE
- code reformatting
This looks better but I see have some questions and nits.
tools/binman/bintool.py| 45 --
tools/binman/bintool_test.py | 22 +
tools/binman/btool/_testing.py | 5
tools/patman/tools.py | 2 +-
4 files changed, 66 insertions(+), 8 deletions(-)
diff --git a/tools/binman/bintool.py b/tools/binman/bintool.py
index 8fda13ff01..04c951fa0b 100644
--- a/tools/binman/bintool.py
+++ b/tools/binman/bintool.py
@@ -32,12 +32,13 @@ FORMAT = '%-16.16s %-12.12s %-26.26s %s'
modules = {}
# Possible ways of fetching a tool (FETCH_COUNT is number of ways)
-FETCH_ANY, FETCH_BIN, FETCH_BUILD, FETCH_COUNT = range(4)
+FETCH_ANY, FETCH_BIN, FETCH_BUILD, FETCH_SOURCE, FETCH_COUNT = range(5)
FETCH_NAMES = {
FETCH_ANY: 'any method',
FETCH_BIN: 'binary download',
-FETCH_BUILD: 'build from source'
+FETCH_BUILD: 'build from source',
+FETCH_SOURCE: 'download source without building'
Would this be a script? Should we say 'download script without building' ?
Addressed this in a further below comment.
}
# Status of tool fetching
@@ -201,12 +202,13 @@ class Bintool:
print(f'- trying method: {FETCH_NAMES[try_method]}')
result = try_fetch(try_method)
if result:
+method = try_method
break
else:
result = try_fetch(method)
if not result:
return FAIL
-if result is not True:
+if result is not True and method != FETCH_SOURCE:
fname, tmpdir = result
dest = os.path.join(DOWNLOAD_DESTDIR, self.name)
print(f"- writing to '{dest}'")
@@ -261,7 +263,7 @@ class Bintool:
show_status(col.RED, 'Failures', status[FAIL])
return not status[FAIL]
-def run_cmd_result(self, *args, binary=False, raise_on_error=True):
+def run_cmd_result(self, *args, binary=False, raise_on_error=True,
add_name=True):
Please update function comment for new param
"""Run the bintool using command-line arguments
Args:
@@ -278,7 +280,10 @@ class Bintool:
if self.name in self.missing_list:
return None
name = os.path.expanduser(self.name) # Expand paths containing ~
-all_args = (name,) + args
+if add_name:
+all_args = (name,) + args
+else:
+all_args = args
env = tools.get_env_with_path()
tout.detail(f"bintool: {' '.join(all_args)}")
result = command.run_pipe(
@@ -304,7 +309,7 @@ class Bintool:
tout.debug(result.stderr)
return result
-def run_cmd(self, *args, binary=False):
+def run_cmd(self, *args, binary=False, add_name=True):
Please update function comment for new param
"""Run the bintool using command-line arguments
Args:
@@ -315,7 +320,7 @@ class Bintool:
Returns:
str or bytes: Resulting stdout from the bintool
"""
-result = self.run_cmd_result(*args, binary=binary)
+result = self.run_cmd_result(*args, binary=binary, add_name=add_name)
if result:
return result.stdout
@@ -354,6 +359,32 @@ class Bintool:
return None
return fname, tmpdir
+@classmethod
+def fetch_from_git(cls, git_repo, name, toolpath=DOWNLOAD_DESTDIR):
+"""Fetch a bintool git repo
+
+This clones the repo and returns
+
+Args:
+git_repo (str): URL of git repo
+name (str): Bintool name assigned as tool directory name
missing toolpath arg
Will make the above changes
+
+Returns:
+str: Directory of fetched repo
+or None on error
+"""
+dir = os.path.join(toolpath, name)
+if os.path.exists(dir):
+print(f"- Repo {dir} already exists")
+return None
+os.mkdir(dir)
+print(f"- clone git repo '{git_repo}' to '{dir}'")
+tools.run('git', 'clone', '--depth', '1', git_repo, dir)
doesn't this download directly into the download directory? What if
there are other files in the git repo...they will all end up in there,
right? Can we instead specify the filename that we want?
Also, if
Re: [PATCH v4 00/10] usb: dwc3: Refactor dwc3-generic and apply to dwc3-uniphier
On 2/22/23 03:00, Kunihiko Hayashi wrote: Hi Marek, On 2023/02/21 0:53, Marek Vasut wrote: On 2/20/23 06:50, Kunihiko Hayashi wrote: This series achieves refactoring of dwc3-generic. First, dwc3-generic allows DT controller nodes to be children of glue nodes, but outside of glue nodes. To achieve this goal, define a glue-specific function to get controller node, look up more reference clocks in the controller node, and initialize clocks in children of glue node before access to the controller, Next, this series exports the structures and functions from the driver source to the header, and replaces dwc3-uniphier driver as one implementation using them. This expects dwc3-generic to prevent more SoC-dependent codes. The dwc3-uniphier has original USB node, however, tentatively added its own node dedicated to U-Boot. After this refactoring, the driver needs to add clock entries and PHY driver to enable them corresponding to the properties in the original node. PATCH 1 has been provided below. https://patchwork.ozlabs.org/project/uboot/patch/20221215223822.137739-1-ma...@denx.de/ PATCH 2 is based on the suggested patch from Marek. PATCH 4-5 and 9-10 have been already reviewed in the previous v1. https://lists.denx.de/pipermail/u-boot/2023-January/505689.html I think this series is good to go. Do you want to pull this through the uniphier git tree and send PR to Tom that way , or shall I pick it all via usb git tree ? I think the former option is better. Currently I don't have the public uniphier git tree and the maintainership, so I'd like to choose the latter at the moment. Colud you please pick it now? Applied to usb/next , thanks . +CC Tom, I think it would be good to get you a git tree for the uniphier stuff , what do you think ?
Re: [PATCH v4 00/10] usb: dwc3: Refactor dwc3-generic and apply to dwc3-uniphier
Hi Marek, On 2023/02/21 0:53, Marek Vasut wrote: On 2/20/23 06:50, Kunihiko Hayashi wrote: This series achieves refactoring of dwc3-generic. First, dwc3-generic allows DT controller nodes to be children of glue nodes, but outside of glue nodes. To achieve this goal, define a glue-specific function to get controller node, look up more reference clocks in the controller node, and initialize clocks in children of glue node before access to the controller, Next, this series exports the structures and functions from the driver source to the header, and replaces dwc3-uniphier driver as one implementation using them. This expects dwc3-generic to prevent more SoC-dependent codes. The dwc3-uniphier has original USB node, however, tentatively added its own node dedicated to U-Boot. After this refactoring, the driver needs to add clock entries and PHY driver to enable them corresponding to the properties in the original node. PATCH 1 has been provided below. https://patchwork.ozlabs.org/project/uboot/patch/20221215223822.137739-1-ma...@denx.de/ PATCH 2 is based on the suggested patch from Marek. PATCH 4-5 and 9-10 have been already reviewed in the previous v1. https://lists.denx.de/pipermail/u-boot/2023-January/505689.html I think this series is good to go. Do you want to pull this through the uniphier git tree and send PR to Tom that way , or shall I pick it all via usb git tree ? I think the former option is better. Currently I don't have the public uniphier git tree and the maintainership, so I'd like to choose the latter at the moment. Colud you please pick it now? Thank you, --- Best Regards Kunihiko Hayashi
[PATCH v1 23/24] arm: cpu: armv7: ls102xa: fdt: remove eth_device support
commit e524f3a449f5 ("net: Remove eth_legacy.c")
removed struct eth_device
This prevents errors in the conversion to CONFIG_IS_ENABLED(DM_ETH).
Signed-off-by: Troy Kisky
---
arch/arm/cpu/armv7/ls102xa/fdt.c | 12
1 file changed, 12 deletions(-)
diff --git a/arch/arm/cpu/armv7/ls102xa/fdt.c b/arch/arm/cpu/armv7/ls102xa/fdt.c
index 599b7e18ef3..a5c5c780ae8 100644
--- a/arch/arm/cpu/armv7/ls102xa/fdt.c
+++ b/arch/arm/cpu/armv7/ls102xa/fdt.c
@@ -25,11 +25,7 @@ DECLARE_GLOBAL_DATA_PTR;
void ft_fixup_enet_phy_connect_type(void *fdt)
{
-#ifdef CONFIG_DM_ETH
struct udevice *dev;
-#else
- struct eth_device *dev;
-#endif
struct tsec_private *priv;
const char *enet_path, *phy_path;
char enet[16];
@@ -37,12 +33,8 @@ void ft_fixup_enet_phy_connect_type(void *fdt)
int phy_node;
int i = 0;
uint32_t ph;
-#ifdef CONFIG_DM_ETH
char *name[3] = { "ethernet@2d1", "ethernet@2d5",
"ethernet@2d9" };
-#else
- char *name[3] = { "eTSEC1", "eTSEC2", "eTSEC3" };
-#endif
for (; i < ARRAY_SIZE(name); i++) {
dev = eth_get_dev_by_name(name[i]);
@@ -53,11 +45,7 @@ void ft_fixup_enet_phy_connect_type(void *fdt)
continue;
}
-#ifdef CONFIG_DM_ETH
priv = dev_get_priv(dev);
-#else
- priv = dev->priv;
-#endif
if (priv->flags & TSEC_SGMII)
continue;
--
2.34.1
[PATCH v1 00/24] CONFIG_IS_ENABLED vs IS_ENABLED
This patch set gets ready to checks the usage of CONFIG_IS_ENABLED/IS_ENABLED. After the set has been applied, you can delete test/usage_of_is_enabled_todo.txt and run test/usage_of_is_enabled_commit.sh The script test/usage_of_is_enabled_check.sh checks for new questionable uses of CONFIG_IS_ENABLED/IS_ENABLED and is added to .azure-pipelines.yml, and .gitlab-ci.yml Troy Kisky (24): cmd: nvedit: check for ENV_SUPPORT lib: crc32: prepare for CONFIG_IS_ENABLED changes lib: md5: prepare for CONFIG_IS_ENABLED changes lib: sha1: prepare for CONFIG_IS_ENABLED changes lib: sha256: prepare for CONFIG_IS_ENABLED changes lib: sha512: prepare for CONFIG_IS_ENABLED changes tools: prevent CONFIG_IS_ENABLED errors by including linux/kconfig.h tools: Makefile: prepare for CONFIG_IS_ENABLED changes by adding CONFIG_TOOLS_xxx x86: cpu: qemu: qemu: remove SPL use with CONFIG_IS_ENABLED config_distro_bootcmd: remove booting environment variables from SPL environment ofnode: fdt_support definitions needed if OF_CONTROL is enabled ringneck-px30: remove check for ENV_IS_NOWHERE, it is an SPL config puma-rk3399: remove check for ENV_IS_NOWHERE, it is an SPL config fdt_support: always define fdt_fixup_mtdparts m53menlo: define ft_board_setup only if CONFIG_IS_ENABLED(OF_LIBFDT) freescale: common: pfuze: define pfuze_mode_init only if defined(CONFIG_DM_PMIC) ns16550: match when to define bdf with uart code solidrun: mx6cuboxi: use CONFIG_IS_ENABLED(SATA) instead of CONFIG_CMD_SATA arm: mach-imx: use CONFIG_$(SPL_)SATA instead of CONFIG_SATA x86: cpu: i386: cpu: only set pci_ram_top if CONFIG_IS_ENABLED(PCI) gateworks: venice: surround call of setup_fec with if IS_ENABLED(CONFIG_NET) power: pmic: add dm style definitions if not CONFIG_IS_ENABLED(POWER_LEGACY) arm: cpu: armv7: ls102xa: fdt: remove eth_device support CI: add test/usage_of_is_enabled_check.sh .azure-pipelines.yml | 11 + .gitlab-ci.yml| 5 + arch/arm/cpu/armv7/ls102xa/fdt.c | 12 - arch/arm/mach-imx/Makefile| 2 +- arch/x86/cpu/apollolake/uart.c| 6 +- arch/x86/cpu/i386/cpu.c | 2 + arch/x86/cpu/qemu/qemu.c | 2 +- board/freescale/common/pfuze.c| 2 +- board/gateworks/venice/venice.c | 4 +- board/menlo/m53menlo/m53menlo.c | 2 + board/solidrun/mx6cuboxi/mx6cuboxi.c | 2 +- .../puma_rk3399/puma-rk3399.c | 4 - .../ringneck_px30/ringneck-px30.c | 4 - boot/fdt_region.c | 1 + cmd/nvedit.c | 5 +- include/config_distro_bootcmd.h | 23 ++ include/fdt_support.h | 26 ++- include/ns16550.h | 2 +- include/power/pmic.h | 2 +- lib/crc32.c | 12 +- lib/fdtdec_common.c | 1 + lib/hash-checksum.c | 1 + lib/md5.c | 9 +- lib/sha1.c| 8 +- lib/sha256.c | 8 +- lib/sha512.c | 12 +- test/usage_of_is_enabled_check.sh | 19 ++ test/usage_of_is_enabled_commit.sh| 12 + test/usage_of_is_enabled_correct.sh | 50 + test/usage_of_is_enabled_exempt.txt | 9 + test/usage_of_is_enabled_list.sh | 86 +++ test/usage_of_is_enabled_splcfg.txt | 21 ++ test/usage_of_is_enabled_todo.txt | 210 ++ tools/Makefile| 2 + tools/env/fw_env.c| 1 + tools/fdt_host.h | 1 + tools/mkimage.h | 1 + 37 files changed, 524 insertions(+), 56 deletions(-) create mode 100755 test/usage_of_is_enabled_check.sh create mode 100755 test/usage_of_is_enabled_commit.sh create mode 100755 test/usage_of_is_enabled_correct.sh create mode 100644 test/usage_of_is_enabled_exempt.txt create mode 100755 test/usage_of_is_enabled_list.sh create mode 100644 test/usage_of_is_enabled_splcfg.txt create mode 100644 test/usage_of_is_enabled_todo.txt -- 2.34.1
[PATCH v1 24/24] CI: add test/usage_of_is_enabled_check.sh
Add script usage_of_is_enabled_check to print any configs that
use CONFIG_IS_ENABLED instead of IS_ENABLED and vice versa.
Add usage_of_is_enabled_commit.sh to generate commits to fix the above
issues.
You can remove entries from test/usage_of_is_enabled_todo.txt
or the entire file and then run
test/usage_of_is_enabled_commit.sh
to convert to suggested usage of CONFIG_IS_ENABLED/IS_ENABLED
or run test/usage_of_is_enabled_check.sh to
see which configs are still todo.
Signed-off-by: Troy Kisky
---
.azure-pipelines.yml| 11 ++
.gitlab-ci.yml | 5 +
test/usage_of_is_enabled_check.sh | 19 +++
test/usage_of_is_enabled_commit.sh | 12 ++
test/usage_of_is_enabled_correct.sh | 50 +++
test/usage_of_is_enabled_exempt.txt | 9 ++
test/usage_of_is_enabled_list.sh| 86
test/usage_of_is_enabled_splcfg.txt | 21 +++
test/usage_of_is_enabled_todo.txt | 210
9 files changed, 423 insertions(+)
create mode 100755 test/usage_of_is_enabled_check.sh
create mode 100755 test/usage_of_is_enabled_commit.sh
create mode 100755 test/usage_of_is_enabled_correct.sh
create mode 100644 test/usage_of_is_enabled_exempt.txt
create mode 100755 test/usage_of_is_enabled_list.sh
create mode 100644 test/usage_of_is_enabled_splcfg.txt
create mode 100644 test/usage_of_is_enabled_todo.txt
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml
index 947c400f8d3..fcf8885fd33 100644
--- a/.azure-pipelines.yml
+++ b/.azure-pipelines.yml
@@ -67,6 +67,17 @@ stages:
:^doc/ :^arch/arm/dts/ :^scripts/kconfig/lkc.h
:^include/linux/kconfig.h :^tools/ && exit 1 || exit 0
+ - job: check_usage_of_is_enabled
+displayName: 'Check usage of CONFIG_IS_ENABLED vs IS_ENABLED'
+pool:
+ vmImage: $(ubuntu_vm)
+container:
+ image: $(ci_runner_image)
+ options: $(container_option)
+steps:
+ # generate list of SPL configs
+ - script: test/usage_of_is_enabled_check.sh
+
- job: cppcheck
displayName: 'Static code analysis with cppcheck'
pool:
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 272d69e2206..c9443702d00 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -137,6 +137,11 @@ check for new CONFIG symbols outside Kconfig:
:^doc/ :^arch/arm/dts/ :^scripts/kconfig/lkc.h
:^include/linux/kconfig.h :^tools/ && exit 1 || exit 0
+check usage of CONFIG_IS_ENABLED vs IS_ENABLED:
+ stage: testsuites
+ script:
+- ./test/usage_of_is_enabled_check.sh
+
# QA jobs for code analytics
# static code analysis with cppcheck (we can add --enable=all later)
cppcheck:
diff --git a/test/usage_of_is_enabled_check.sh
b/test/usage_of_is_enabled_check.sh
new file mode 100755
index 000..6bd5d9c1ac7
--- /dev/null
+++ b/test/usage_of_is_enabled_check.sh
@@ -0,0 +1,19 @@
+#!/bin/bash
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Written by Troy Kisky
+
+scriptdir=`dirname "$0"`;
+${scriptdir}/usage_of_is_enabled_list.sh | grep -vw FOO;
+if [ $? -eq 0 ] ; then
+ echo "The above may have incorrect usage of IS_ENABLED/"\
+"CONFIG_IS_ENABLED"
+ echo "Run test/usage_of_is_enabled_commit.sh and "\
+"squash with appropriate commit"
+ ret=1;
+else
+ ret=0;
+fi
+
+rm ${scriptdir}/splcfg.tmp ${scriptdir}/exclude.tmp
+exit ${ret}
diff --git a/test/usage_of_is_enabled_commit.sh
b/test/usage_of_is_enabled_commit.sh
new file mode 100755
index 000..593dbd1428c
--- /dev/null
+++ b/test/usage_of_is_enabled_commit.sh
@@ -0,0 +1,12 @@
+#!/bin/bash
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Written by Troy Kisky
+
+scriptdir=`dirname "$0"`;
+${scriptdir}/usage_of_is_enabled_list.sh | \
+xargs -I {} sh -c "${scriptdir}/usage_of_is_enabled_correct.sh {}; \
+git commit -a -m\"CONFIG_{}: correct usage of CONFIG_IS_ENABLED/IS_ENABLED\";"
+
+
+rm ${scriptdir}/splcfg.tmp ${scriptdir}/exclude.tmp
diff --git a/test/usage_of_is_enabled_correct.sh
b/test/usage_of_is_enabled_correct.sh
new file mode 100755
index 000..8724747beed
--- /dev/null
+++ b/test/usage_of_is_enabled_correct.sh
@@ -0,0 +1,50 @@
+#!/bin/bash
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Written by Troy Kisky
+
+scriptdir=`dirname "$0"`;
+
+if [ -z "$1" ] ; then
+ echo missing config
+ exit 1;
+fi
+if [ ! -f "${scriptdir}/splcfg.tmp" ] ; then
+ echo missing splcfg.tmp
+ exit 1;
+fi
+
+
+grep -qw $1 ${scriptdir}/splcfg.tmp
+if [ $? -ne 0 ] ; then
+# not splcfg
+# change CONFIG_IS_ENABLED to IS_ENABLED
+git grep -l \
+-e "CONFIG_IS_ENABLED($1)" \
+ | \
+xargs -IFile sh -c \
+" \
+sed -i -E \"\
+s/CONFIG_IS_ENABLED\($1\)/IS_ENABLED\(CONFIG_$1\)/g; \
+\" File";
+else
+# splcfg
+# change IS_ENABLED to CONFIG_IS_ENABLED
+# change ifdef to CONFIG_IS_ENABLED
+# change ifndef to !CONFIG_IS_ENABLED
+# change defined to CONFIG_IS_ENABLED
+git grep -l \
+-e "IS_ENABLED(CONFIG_$1)" \
+-e "^#ifdef[ \t]\
[PATCH v1 22/24] power: pmic: add dm style definitions if not CONFIG_IS_ENABLED(POWER_LEGACY)
This avoids an error in converting to CONFIG_IS_ENABLED(DM_PMIC).
Many boards SPL code needs these definitions to compile, even if
the functions are not linked.
Signed-off-by: Troy Kisky
---
include/power/pmic.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/power/pmic.h b/include/power/pmic.h
index 70f2709bd0b..636221692d0 100644
--- a/include/power/pmic.h
+++ b/include/power/pmic.h
@@ -86,7 +86,7 @@ struct pmic {
#endif /* CONFIG_IS_ENABLED(POWER_LEGACY) */
/* TODO: Change to CONFIG_IS_ENABLED(DM_PMIC) when SPL_DM_PMIC exists */
-#ifdef CONFIG_DM_PMIC
+#if defined(CONFIG_DM_PMIC) || !CONFIG_IS_ENABLED(POWER_LEGACY)
/**
* U-Boot PMIC Framework
* =
--
2.34.1
Re: [PATCH] doc: uefi: fix links
On 2/20/23 15:37, Vincent Stehlé wrote: Fix a couple of links so that they are rendered correctly with sphinx. Signed-off-by: Vincent Stehlé Cc: Heinrich Schuchardt Cc: Ilias Apalodimas Reviewed-by: Heinrich Schuchardt --- doc/develop/uefi/fwu_updates.rst | 3 ++- doc/develop/uefi/uefi.rst| 4 ++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/doc/develop/uefi/fwu_updates.rst b/doc/develop/uefi/fwu_updates.rst index 72c850a7908..e4709d82b41 100644 --- a/doc/develop/uefi/fwu_updates.rst +++ b/doc/develop/uefi/fwu_updates.rst @@ -27,7 +27,8 @@ metadata. Individual drivers can be added based on the type of storage media, and its partitioning method. Details of the storage device containing the FWU metadata partitions are specified through a U-Boot specific device tree property `fwu-mdata-store`. Please refer to -U-Boot `doc `__ +U-Boot :download:`fwu-mdata-gpt.yaml +` for the device tree bindings. Enabling the FWU Multi Bank Update feature diff --git a/doc/develop/uefi/uefi.rst b/doc/develop/uefi/uefi.rst index a944c0fb803..ffe25ca2318 100644 --- a/doc/develop/uefi/uefi.rst +++ b/doc/develop/uefi/uefi.rst @@ -386,8 +386,8 @@ is because the FWU feature supports multiple partitions(banks) of updatable images, and the actual dfu alt number to which the image is to be written to is determined at runtime, based on the value of the update bank to which the image is to be written. For more information -on the FWU Multi Bank Update feature, please refer `doc -`__. +on the FWU Multi Bank Update feature, please refer to +:doc:`/develop/uefi/fwu_updates`. When using the FMP for FIT images, the image index value needs to be set to 1.
[PATCH v1 20/24] x86: cpu: i386: cpu: only set pci_ram_top if CONFIG_IS_ENABLED(PCI)
This avoids an error when ifdef CONFIG_PCI is changed to
if CONFIG_IS_ENABLED(PCI)
Signed-off-by: Troy Kisky
---
arch/x86/cpu/i386/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c
index c7f6c5a013e..07a73f79768 100644
--- a/arch/x86/cpu/i386/cpu.c
+++ b/arch/x86/cpu/i386/cpu.c
@@ -415,7 +415,9 @@ int cpu_phys_address_size(void)
/* Don't allow PCI region 3 to use memory in the 2-4GB memory hole */
static void setup_pci_ram_top(void)
{
+#if CONFIG_IS_ENABLED(PCI)
gd->pci_ram_top = 0x8000U;
+#endif
}
static void setup_mtrr(void)
--
2.34.1
[PATCH v1 19/24] arm: mach-imx: use CONFIG_$(SPL_)SATA instead of CONFIG_SATA
This avoid an error with enable_sata_clock when defined(CONFIG_SATA) is changed to CONFIG_IS_ENABLED(SATA). Signed-off-by: Troy Kisky --- arch/arm/mach-imx/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 4dfc60eedc4..50f26975eac 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -54,7 +54,7 @@ obj-$(CONFIG_IMX_RDC) += rdc-sema.o ifneq ($(CONFIG_SPL_BUILD),y) obj-$(CONFIG_IMX_BOOTAUX) += imx_bootaux.o endif -obj-$(CONFIG_SATA) += sata.o +obj-$(CONFIG_$(SPL_)SATA) += sata.o obj-$(CONFIG_IMX_HAB)+= hab.o obj-$(CONFIG_SYSCOUNTER_TIMER) += syscounter.o endif -- 2.34.1
[PATCH v1 21/24] gateworks: venice: surround call of setup_fec with if IS_ENABLED(CONFIG_NET)
This is the same as the definition is surrounded by.
It avoids an error in converting to CONFIG_IS_ENABLED(NET).
Signed-off-by: Troy Kisky
---
board/gateworks/venice/venice.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/board/gateworks/venice/venice.c b/board/gateworks/venice/venice.c
index c4d86c26a9b..ad27835caaf 100644
--- a/board/gateworks/venice/venice.c
+++ b/board/gateworks/venice/venice.c
@@ -41,7 +41,7 @@ int board_fit_config_name_match(const char *name)
return -1;
}
-#if (IS_ENABLED(CONFIG_NET))
+#if IS_ENABLED(CONFIG_NET)
static int setup_fec(void)
{
struct iomuxc_gpr_base_regs *gpr =
@@ -113,10 +113,12 @@ int board_init(void)
{
venice_eeprom_init(1);
+#if IS_ENABLED(CONFIG_NET)
if (IS_ENABLED(CONFIG_FEC_MXC))
setup_fec();
if (IS_ENABLED(CONFIG_DWC_ETH_QOS))
setup_eqos();
+#endif
return 0;
}
--
2.34.1
[PATCH v1 16/24] freescale: common: pfuze: define pfuze_mode_init only if defined(CONFIG_DM_PMIC)
pfuze_mode_init calls pmic_reg_read which is only available from
obj-$(CONFIG_$(SPL_TPL_)DM_PMIC) += pmic-uclass.o
Prepare for conversion of defined(CONFIG_DM_PMIC) to
CONFIG_IS_ENABLED(DM_PMIC).
Signed-off-by: Troy Kisky
---
board/freescale/common/pfuze.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/common/pfuze.c b/board/freescale/common/pfuze.c
index 6dca22960bf..a9288820b2e 100644
--- a/board/freescale/common/pfuze.c
+++ b/board/freescale/common/pfuze.c
@@ -91,7 +91,7 @@ struct pmic *pfuze_common_init(unsigned char i2cbus)
return p;
}
-#else
+#elif defined(CONFIG_DM_PMIC)
int pfuze_mode_init(struct udevice *dev, u32 mode)
{
unsigned char offset, i, switch_num;
--
2.34.1
[PATCH v1 17/24] ns16550: match when to define bdf with uart code
When switching defined(CONFIG_PCI) to CONFIG_IS_ENABLED(PCI)
bdf is no longer accessible. So change to preprocessor to avoid access.
Signed-off-by: Troy Kisky
---
arch/x86/cpu/apollolake/uart.c | 6 +++---
include/ns16550.h | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/x86/cpu/apollolake/uart.c b/arch/x86/cpu/apollolake/uart.c
index a9362436000..143217755ff 100644
--- a/arch/x86/cpu/apollolake/uart.c
+++ b/arch/x86/cpu/apollolake/uart.c
@@ -79,11 +79,11 @@ void apl_uart_init(pci_dev_t bdf, ulong base)
static int apl_ns16550_probe(struct udevice *dev)
{
+#if !CONFIG_IS_ENABLED(PCI)
struct apl_ns16550_plat *plat = dev_get_plat(dev);
- if (!CONFIG_IS_ENABLED(PCI))
- apl_uart_init(plat->ns16550.bdf, plat->ns16550.base);
-
+ apl_uart_init(plat->ns16550.bdf, plat->ns16550.base);
+#endif
return ns16550_serial_probe(dev);
}
diff --git a/include/ns16550.h b/include/ns16550.h
index e7e68663d03..8d7eb7d8f9c 100644
--- a/include/ns16550.h
+++ b/include/ns16550.h
@@ -74,7 +74,7 @@ struct ns16550_plat {
int clock;
u32 fcr;
int flags;
-#if defined(CONFIG_PCI) && defined(CONFIG_SPL)
+#if !CONFIG_IS_ENABLED(PCI) || CONFIG_IS_ENABLED(OF_PLATDATA)
int bdf;
#endif
};
--
2.34.1
[PATCH v1 15/24] m53menlo: define ft_board_setup only if CONFIG_IS_ENABLED(OF_LIBFDT)
The function ft_board_setup calls do_fixup_by_path_string
which is only available on CONFIG_IS_ENABLED(OF_LIBFDT).
This prepares for the conversion.
ft_board_setup is only called from image-fdt which is linked by
obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o
Signed-off-by: Troy Kisky
---
board/menlo/m53menlo/m53menlo.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/menlo/m53menlo/m53menlo.c b/board/menlo/m53menlo/m53menlo.c
index 14324c7087d..ca3b81c57ff 100644
--- a/board/menlo/m53menlo/m53menlo.c
+++ b/board/menlo/m53menlo/m53menlo.c
@@ -264,6 +264,7 @@ void board_preboot_os(void)
gpio_direction_output(IMX_GPIO_NR(6, 0), 0);
}
+#if CONFIG_IS_ENABLED(OF_LIBFDT)
int ft_board_setup(void *blob, struct bd_info *bd)
{
if (lvds_compat_string)
@@ -272,6 +273,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
return 0;
}
+#endif
struct display_info_t const displays[] = {
{
--
2.34.1
[PATCH v1 18/24] solidrun: mx6cuboxi: use CONFIG_IS_ENABLED(SATA) instead of CONFIG_CMD_SATA
setup_sata is linked with
obj-$(CONFIG_SATA) += sata.o
So use SATA instead of CMD_SATA.
Signed-off-by: Troy Kisky
---
board/solidrun/mx6cuboxi/mx6cuboxi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c
b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index 7c44379ec4a..e31a7e9552f 100644
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -275,7 +275,7 @@ int board_early_init_f(void)
{
setup_iomux_uart();
-#ifdef CONFIG_CMD_SATA
+#if CONFIG_IS_ENABLED(SATA)
setup_sata();
#endif
setup_fec();
--
2.34.1
[PATCH v1 13/24] puma-rk3399: remove check for ENV_IS_NOWHERE, it is an SPL config
When IS_ENABLED(CONFIG_ENV_IS_NOWHERE) is converted to
CONFIG_IS_ENABLED(ENV_IS_NOWHERE) this will give unwanted errors
on spl builds.
Signed-off-by: Troy Kisky
---
board/theobroma-systems/puma_rk3399/puma-rk3399.c | 4
1 file changed, 4 deletions(-)
diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 97f398bd754..614a60ee8f9 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -136,10 +136,6 @@ int mmc_get_env_dev(void)
return CONFIG_SYS_MMC_ENV_DEV;
}
-#if !IS_ENABLED(CONFIG_ENV_IS_NOWHERE)
-#error Please enable CONFIG_ENV_IS_NOWHERE
-#endif
-
enum env_location arch_env_get_location(enum env_operation op, int prio)
{
const char *boot_device =
--
2.34.1
[PATCH v1 14/24] fdt_support: always define fdt_fixup_mtdparts
SPL code wants fdt_fixup_mtdparts defined as a NOP
when the function isn't linked in.
Prepare for ifdef CONFIG_OF_LIBFDT being converted to
if CONFIG_IS_ENABLED(OF_LIBFDT)
Signed-off-by: Troy Kisky
---
include/fdt_support.h | 23 +--
1 file changed, 13 insertions(+), 10 deletions(-)
diff --git a/include/fdt_support.h b/include/fdt_support.h
index eeb83e6251d..94497d755a3 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -245,16 +245,6 @@ int fdt_increase_size(void *fdt, int add_len);
int fdt_delete_disabled_nodes(void *blob);
struct node_info;
-#if defined(CONFIG_FDT_FIXUP_PARTITIONS)
-void fdt_fixup_mtdparts(void *fdt, const struct node_info *node_info,
- int node_info_size);
-#else
-static inline void fdt_fixup_mtdparts(void *fdt,
- const struct node_info *node_info,
- int node_info_size)
-{
-}
-#endif
void fdt_del_node_and_alias(void *blob, const char *alias);
@@ -412,6 +402,19 @@ int fdt_get_cells_len(const void *blob, char
*nr_cells_name);
#endif /* ifdef CONFIG_OF_LIBFDT */
+#if CONFIG_IS_ENABLED(OF_LIBFDT) && defined(CONFIG_FDT_FIXUP_PARTITIONS)
+struct node_info;
+void fdt_fixup_mtdparts(void *fdt, const struct node_info *node_info,
+ int node_info_size);
+#else
+struct node_info;
+static inline void fdt_fixup_mtdparts(void *fdt,
+ const struct node_info *node_info,
+ int node_info_size)
+{
+}
+#endif
+
#ifdef USE_HOSTCC
int fdtdec_get_int(const void *blob, int node, const char *prop_name,
int default_val);
--
2.34.1
[PATCH v1 12/24] ringneck-px30: remove check for ENV_IS_NOWHERE, it is an SPL config
When IS_ENABLED(CONFIG_ENV_IS_NOWHERE) is converted to
CONFIG_IS_ENABLED(ENV_IS_NOWHERE) this will give unwanted errors
on spl builds.
Signed-off-by: Troy Kisky
---
board/theobroma-systems/ringneck_px30/ringneck-px30.c | 4
1 file changed, 4 deletions(-)
diff --git a/board/theobroma-systems/ringneck_px30/ringneck-px30.c
b/board/theobroma-systems/ringneck_px30/ringneck-px30.c
index 47d1a40ef7c..bb1bb4acf5c 100644
--- a/board/theobroma-systems/ringneck_px30/ringneck-px30.c
+++ b/board/theobroma-systems/ringneck_px30/ringneck-px30.c
@@ -118,10 +118,6 @@ int mmc_get_env_dev(void)
return CONFIG_SYS_MMC_ENV_DEV;
}
-#if !IS_ENABLED(CONFIG_ENV_IS_NOWHERE)
-#error Please enable CONFIG_ENV_IS_NOWHERE
-#endif
-
enum env_location arch_env_get_location(enum env_operation op, int prio)
{
const char *boot_device =
--
2.34.1
[PATCH v1 09/24] x86: cpu: qemu: qemu: remove SPL use with CONFIG_IS_ENABLED
CONFIG_IS_ENABLED(SPL_X86_32BIT_INIT)
would check for CONFIG_SPL_SPL_X86_32BIT_INIT for SPL builds
Signed-off-by: Troy Kisky
---
arch/x86/cpu/qemu/qemu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index e54082df7f9..274978c023b 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -97,7 +97,7 @@ static void qemu_chipset_init(void)
}
}
-#if !CONFIG_IS_ENABLED(SPL_X86_32BIT_INIT)
+#if CONFIG_IS_ENABLED(X86_32BIT_INIT)
int arch_cpu_init(void)
{
post_code(POST_CPU_INIT);
--
2.34.1
[PATCH v1 11/24] ofnode: fdt_support definitions needed if OF_CONTROL is enabled
With the use of CONFIG_IS_ENABLED in code, instead of at the preprocessor level, these defines are still needed if OF_CONTROL is enabled. Signed-off-by: Troy Kisky --- include/fdt_support.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/fdt_support.h b/include/fdt_support.h index 5638bd4f165..eeb83e6251d 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -7,7 +7,8 @@ #ifndef __FDT_SUPPORT_H #define __FDT_SUPPORT_H -#if defined(CONFIG_OF_LIBFDT) && !defined(USE_HOSTCC) +#if (defined(CONFIG_OF_LIBFDT) || defined(CONFIG_OF_CONTROL)) && \ + !defined(USE_HOSTCC) #include #include -- 2.34.1
[PATCH v1 10/24] config_distro_bootcmd: remove booting environment variables from SPL environment
SPL environments don't need command that they can never use. Avoid errors with CONFIG_IS_ENABLED conversions by skipping them now. Signed-off-by: Troy Kisky --- include/config_distro_bootcmd.h | 23 +++ 1 file changed, 23 insertions(+) diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h index 9d2a225e7eb..2a136b96a6d 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -35,11 +35,15 @@ #devtypel "_boot=" \ BOOTENV_SHARED_BLKDEV_BODY(devtypel) +#define BOOTENV_DEV_BLKDEV_NONE(devtypeu, devtypel, instance) + #define BOOTENV_DEV_BLKDEV(devtypeu, devtypel, instance) \ "bootcmd_" #devtypel #instance "=" \ "devnum=" #instance "; " \ "run " #devtypel "_boot\0" +#define BOOTENV_DEV_NAME_BLKDEV_NONE(devtypeu, devtypel, instance) + #define BOOTENV_DEV_NAME_BLKDEV(devtypeu, devtypel, instance) \ #devtypel #instance " " @@ -59,6 +63,10 @@ #define BOOTENV_SHARED_MMC BOOTENV_SHARED_BLKDEV(mmc) #define BOOTENV_DEV_MMCBOOTENV_DEV_BLKDEV #define BOOTENV_DEV_NAME_MMC BOOTENV_DEV_NAME_BLKDEV +#elif defined(CONFIG_SPL_BUILD) +#define BOOTENV_SHARED_MMC +#define BOOTENV_DEV_MMCBOOTENV_DEV_BLKDEV_NONE +#define BOOTENV_DEV_NAME_MMC BOOTENV_DEV_NAME_BLKDEV_NONE #else #define BOOTENV_SHARED_MMC #define BOOTENV_DEV_MMC \ @@ -190,6 +198,10 @@ #define BOOTENV_SHARED_SATABOOTENV_SHARED_BLKDEV(sata) #define BOOTENV_DEV_SATA BOOTENV_DEV_BLKDEV #define BOOTENV_DEV_NAME_SATA BOOTENV_DEV_NAME_BLKDEV +#elif defined(CONFIG_SPL_BUILD) +#define BOOTENV_SHARED_SATA +#define BOOTENV_DEV_SATA BOOTENV_DEV_BLKDEV_NONE +#define BOOTENV_DEV_NAME_SATA BOOTENV_DEV_NAME_BLKDEV_NONE #else #define BOOTENV_SHARED_SATA #define BOOTENV_DEV_SATA \ @@ -293,6 +305,11 @@ BOOTENV_SHARED_BLKDEV_BODY(usb) #define BOOTENV_DEV_USBBOOTENV_DEV_BLKDEV #define BOOTENV_DEV_NAME_USB BOOTENV_DEV_NAME_BLKDEV +#elif defined(CONFIG_SPL_BUILD) +#define BOOTENV_RUN_NET_USB_START +#define BOOTENV_SHARED_USB +#define BOOTENV_DEV_USBBOOTENV_DEV_BLKDEV_NONE +#define BOOTENV_DEV_NAME_USB BOOTENV_DEV_NAME_BLKDEV_NONE #else #define BOOTENV_RUN_NET_USB_START #define BOOTENV_SHARED_USB @@ -395,6 +412,9 @@ "\0" #define BOOTENV_DEV_NAME_DHCP(devtypeu, devtypel, instance) \ "dhcp " +#elif defined(CONFIG_SPL_BUILD) +#define BOOTENV_DEV_DHCP BOOTENV_DEV_BLKDEV_NONE +#define BOOTENV_DEV_NAME_DHCP BOOTENV_DEV_NAME_BLKDEV_NONE #else #define BOOTENV_DEV_DHCP \ BOOT_TARGET_DEVICES_references_DHCP_without_CONFIG_CMD_DHCP @@ -413,6 +433,9 @@ "fi\0" #define BOOTENV_DEV_NAME_PXE(devtypeu, devtypel, instance) \ "pxe " +#elif defined(CONFIG_SPL_BUILD) +#define BOOTENV_DEV_PXEBOOTENV_DEV_BLKDEV_NONE +#define BOOTENV_DEV_NAME_PXE BOOTENV_DEV_NAME_BLKDEV_NONE #else #define BOOTENV_DEV_PXE \ BOOT_TARGET_DEVICES_references_PXE_without_CONFIG_CMD_DHCP_or_PXE -- 2.34.1
[PATCH v1 08/24] tools: Makefile: prepare for CONFIG_IS_ENABLED changes by adding CONFIG_TOOLS_xxx
CONFIG_IS_ENABLED(FIT_SIGNATURE) will check for CONFIG_TOOLS_FIT_SIGNATURE. So define it now in preparation. Signed-off-by: Troy Kisky --- tools/Makefile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tools/Makefile b/tools/Makefile index e13effbb66a..2670c77b2cb 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -162,8 +162,10 @@ ifdef CONFIG_TOOLS_LIBCRYPTO # This affects include/image.h, but including the board config file # is tricky, so manually define this options here. HOST_EXTRACFLAGS += -DCONFIG_FIT_SIGNATURE +HOST_EXTRACFLAGS += -DCONFIG_TOOLS_FIT_SIGNATURE=1 HOST_EXTRACFLAGS += -DCONFIG_FIT_SIGNATURE_MAX_SIZE=0x HOST_EXTRACFLAGS += -DCONFIG_FIT_CIPHER +HOST_EXTRACFLAGS += -DCONFIG_TOOLS_FIT_CIPHER=1 endif # MXSImage needs LibSSL -- 2.34.1
[PATCH v1 07/24] tools: prevent CONFIG_IS_ENABLED errors by including linux/kconfig.h
We need to include in order to include files that use CONFIG_IS_ENABLED. Signed-off-by: Troy Kisky --- boot/fdt_region.c | 1 + lib/fdtdec_common.c | 1 + lib/hash-checksum.c | 1 + tools/env/fw_env.c | 1 + tools/fdt_host.h| 1 + tools/mkimage.h | 1 + 6 files changed, 6 insertions(+) diff --git a/boot/fdt_region.c b/boot/fdt_region.c index 295ea08ac91..5331fbbfb50 100644 --- a/boot/fdt_region.c +++ b/boot/fdt_region.c @@ -5,6 +5,7 @@ * Written by Simon Glass */ +#include #include #include #include diff --git a/lib/fdtdec_common.c b/lib/fdtdec_common.c index ddaca0087e1..76719fb59b2 100644 --- a/lib/fdtdec_common.c +++ b/lib/fdtdec_common.c @@ -13,6 +13,7 @@ #include #include #else +#include #include "libfdt.h" #include "fdt_support.h" diff --git a/lib/hash-checksum.c b/lib/hash-checksum.c index 8f2a42f9a08..062c3a54db4 100644 --- a/lib/hash-checksum.c +++ b/lib/hash-checksum.c @@ -11,6 +11,7 @@ #include #include #else +#include #include "fdt_host.h" #endif #include diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c index c9a8774acef..abe9977fad3 100644 --- a/tools/env/fw_env.c +++ b/tools/env/fw_env.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include diff --git a/tools/fdt_host.h b/tools/fdt_host.h index bc42306c9e5..6c7788db3c6 100644 --- a/tools/fdt_host.h +++ b/tools/fdt_host.h @@ -7,6 +7,7 @@ #define __FDT_HOST_H__ /* Make sure to include u-boot version of libfdt include files */ +#include "../include/linux/kconfig.h" #include "../include/linux/libfdt.h" #include "../include/fdt_support.h" diff --git a/tools/mkimage.h b/tools/mkimage.h index f5ca65e2edf..5cbb372d7b1 100644 --- a/tools/mkimage.h +++ b/tools/mkimage.h @@ -8,6 +8,7 @@ #ifndef _MKIIMAGE_H_ #define _MKIIMAGE_H_ +#include #include "os_support.h" #include #include -- 2.34.1
[PATCH v1 05/24] lib: sha256: prepare for CONFIG_IS_ENABLED changes
We need to include in order to include
files that use CONFIG_IS_ENABLED. TO prepare for that
don't pet the watchdog when USE_HOSTCC is defined.
Signed-off-by: Troy Kisky
---
lib/sha256.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/lib/sha256.c b/lib/sha256.c
index 4d26aea1c8c..eb31d16f996 100644
--- a/lib/sha256.c
+++ b/lib/sha256.c
@@ -8,7 +8,11 @@
#ifndef USE_HOSTCC
#include
#include
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+#define PET_WDG
+#endif
#else
+#include
#include
#endif /* USE_HOSTCC */
#include
@@ -276,7 +280,7 @@ void sha256_csum_wd(const unsigned char *input, unsigned
int ilen,
unsigned char *output, unsigned int chunk_sz)
{
sha256_context ctx;
-#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+#ifdef PET_WDG
const unsigned char *end;
unsigned char *curr;
int chunk;
@@ -284,7 +288,7 @@ void sha256_csum_wd(const unsigned char *input, unsigned
int ilen,
sha256_starts(&ctx);
-#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+#ifdef PET_WDG
curr = (unsigned char *)input;
end = input + ilen;
while (curr < end) {
--
2.34.1
[PATCH v1 06/24] lib: sha512: prepare for CONFIG_IS_ENABLED changes
We need to include in order to include
files that use CONFIG_IS_ENABLED. TO prepare for that
don't pet the watchdog when USE_HOSTCC is defined.
Signed-off-by: Troy Kisky
---
lib/sha512.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/lib/sha512.c b/lib/sha512.c
index fbe8d5f5bfe..4db2e5c08e4 100644
--- a/lib/sha512.c
+++ b/lib/sha512.c
@@ -13,7 +13,11 @@
#ifndef USE_HOSTCC
#include
#include
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+#define PET_WDG
+#endif
#else
+#include
#include
#endif /* USE_HOSTCC */
#include
@@ -292,7 +296,7 @@ void sha384_csum_wd(const unsigned char *input, unsigned
int ilen,
unsigned char *output, unsigned int chunk_sz)
{
sha512_context ctx;
-#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+#ifdef PET_WDG
const unsigned char *end;
unsigned char *curr;
int chunk;
@@ -300,7 +304,7 @@ void sha384_csum_wd(const unsigned char *input, unsigned
int ilen,
sha384_starts(&ctx);
-#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+#ifdef PET_WDG
curr = (unsigned char *)input;
end = input + ilen;
while (curr < end) {
@@ -355,7 +359,7 @@ void sha512_csum_wd(const unsigned char *input, unsigned
int ilen,
unsigned char *output, unsigned int chunk_sz)
{
sha512_context ctx;
-#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+#ifdef PET_WDG
const unsigned char *end;
unsigned char *curr;
int chunk;
@@ -363,7 +367,7 @@ void sha512_csum_wd(const unsigned char *input, unsigned
int ilen,
sha512_starts(&ctx);
-#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+#ifdef PET_WDG
curr = (unsigned char *)input;
end = input + ilen;
while (curr < end) {
--
2.34.1
[PATCH v1 04/24] lib: sha1: prepare for CONFIG_IS_ENABLED changes
We need to include in order to include
files that use CONFIG_IS_ENABLED. TO prepare for that
don't pet the watchdog when USE_HOSTCC is defined.
Signed-off-by: Troy Kisky
---
lib/sha1.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/lib/sha1.c b/lib/sha1.c
index 8d074078934..af49535e5d2 100644
--- a/lib/sha1.c
+++ b/lib/sha1.c
@@ -19,7 +19,11 @@
#ifndef USE_HOSTCC
#include
#include
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+#define PET_WDG
+#endif
#else
+#include
#include
#endif /* USE_HOSTCC */
#include
@@ -328,14 +332,14 @@ void sha1_csum_wd(const unsigned char *input, unsigned
int ilen,
unsigned char *output, unsigned int chunk_sz)
{
sha1_context ctx;
-#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+#ifdef PET_WDG
const unsigned char *end, *curr;
int chunk;
#endif
sha1_starts (&ctx);
-#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+#ifdef PET_WDG
curr = input;
end = input + ilen;
while (curr < end) {
--
2.34.1
[PATCH v1 02/24] lib: crc32: prepare for CONFIG_IS_ENABLED changes
We need to include in order to include
files that use CONFIG_IS_ENABLED. TO prepare for that
be more direct with using defined(USE_HOSTCC).
Signed-off-by: Troy Kisky
---
lib/crc32.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/lib/crc32.c b/lib/crc32.c
index aa94d70ef3e..b2fa9e06e55 100644
--- a/lib/crc32.c
+++ b/lib/crc32.c
@@ -11,14 +11,18 @@
#ifdef USE_HOSTCC
#include
#include
+#include
#else
#include
#include
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+#define PET_WDG
+#endif
#endif
#include
#include
-#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+#ifdef PET_WDG
#include
#endif
#include "u-boot/zlib.h"
@@ -84,7 +88,7 @@ static void __efi_runtime make_crc_table(void)
}
crc_table_empty = 0;
}
-#elif !defined(CONFIG_ARM64_CRC32)
+#elif !defined(CONFIG_ARM64_CRC32) || defined(USE_HOSTCC)
/*
* Table of CRC-32's of all single-byte values (made by make_crc_table)
*/
@@ -184,7 +188,7 @@ const uint32_t * ZEXPORT get_crc_table()
*/
uint32_t __efi_runtime crc32_no_comp(uint32_t crc, const Bytef *buf, uInt len)
{
-#ifdef CONFIG_ARM64_CRC32
+#if defined(CONFIG_ARM64_CRC32) && !defined(USE_HOSTCC)
crc = cpu_to_le32(crc);
while (len--)
crc = __builtin_aarch64_crc32b(crc, *buf++);
@@ -243,7 +247,7 @@ uint32_t __efi_runtime crc32(uint32_t crc, const Bytef *p,
uInt len)
uint32_t crc32_wd(uint32_t crc, const unsigned char *buf, uInt len,
uInt chunk_sz)
{
-#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+#ifdef PET_WDG
const unsigned char *end, *curr;
int chunk;
--
2.34.1
[PATCH v1 03/24] lib: md5: prepare for CONFIG_IS_ENABLED changes
We need to include in order to include
files that use CONFIG_IS_ENABLED. TO prepare for that
don't pet the watchdog when USE_HOSTCC is defined.
Signed-off-by: Troy Kisky
---
lib/md5.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/lib/md5.c b/lib/md5.c
index 1636ab93661..bd3d8fa9b2b 100644
--- a/lib/md5.c
+++ b/lib/md5.c
@@ -29,7 +29,12 @@
#ifndef USE_HOSTCC
#include
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
#include
+#define PET_WDG
+#endif
+#else
+#include
#endif /* USE_HOSTCC */
#include
@@ -288,14 +293,14 @@ md5_wd(const unsigned char *input, unsigned int len,
unsigned char output[16],
unsigned int chunk_sz)
{
struct MD5Context context;
-#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+#ifdef PET_WDG
const unsigned char *end, *curr;
int chunk;
#endif
MD5Init(&context);
-#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+#ifdef PET_WDG
curr = input;
end = input + len;
while (curr < end) {
--
2.34.1
[PATCH v1 01/24] cmd: nvedit: check for ENV_SUPPORT
Avoid error messages when SPL,TPL,VPL build don't
have the environment options of the main build.
This is needed when defined(CONFIG_ENV_IS_IN_xxx) is changed
to CONFIG_IS_ENABLED(ENV_IS_IN_xxx).
Signed-off-by: Troy Kisky
---
cmd/nvedit.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 7cbc3fd573a..ef0fe55431c 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -43,6 +43,7 @@
DECLARE_GLOBAL_DATA_PTR;
+#if CONFIG_IS_ENABLED(ENV_SUPPORT)
#ifdefined(CONFIG_ENV_IS_IN_EEPROM)|| \
defined(CONFIG_ENV_IS_IN_FLASH) || \
defined(CONFIG_ENV_IS_IN_MMC) || \
@@ -60,10 +61,12 @@ DECLARE_GLOBAL_DATA_PTR;
#endif
#if!defined(ENV_IS_IN_DEVICE) && \
- !defined(CONFIG_ENV_IS_NOWHERE)
+ !defined(CONFIG_ENV_IS_NOWHERE) && \
+ !defined(CONFIG_VPL_BUILD)
# error Define one of CONFIG_ENV_IS_IN_{EEPROM|FLASH|MMC|FAT|EXT4|\
NAND|NVRAM|ONENAND|SATA|SPI_FLASH|REMOTE|UBI} or CONFIG_ENV_IS_NOWHERE
#endif
+#endif
/*
* Maximum expected input data size for import command
--
2.34.1
Re: [PATCH v2 00/10] Backport BRCMNAND changes from Linux
Hi Linus. On 02/11/2023 07:28 AM, Linus Walleij wrote: Hunting down a bug on my system I took to back-porting all reasonable changes from the Linux brcmnand driver that were not yet in the U-Boot derivative. I noticed that a simple diff -ur between brcmnand.c between the file in Linux and U-Boot was possible to see what differs. Combining this with some git log --oneline manual comparison, fuzzing and manual intervention I backported a set of relevant patches from Linux that compiles and WorksForMe(TM). The diff between Linux and U-Boot is much smaller after this, the main missing part are subsystem cosmetics changes and the EDU DMA mode support. This was as much as I could bite off in one go. All patches countersigned-off and marked as [backported]. ChangeLog v1->v2: - Drop the patch to use the new OOB data layout helpers "mtd: nand: brcm: switch to mtd_ooblayout_ops" - Drop all patches depending on the previous patch, in total 4 patches. Claire Lin (1): mtd: rawnand: brcmnand: Fix ecc chunk calculation for erased page bitfips Kamal Dasu (3): mtd: rawnand: brcmnand: Refactored code to introduce helper functions mtd: rawnand: brcmnand: Add support for v7.3 controller mtd: nand: brcmnand: Add support for flash-dma v0 Álvaro Fernández Rojas (6): mtd: rawnand: brcmnand: correctly verify erased pages mtd: rawnand: brcmnand: rename v4 registers mtd: rawnand: brcmnand: fix CS0 layout mtd: rawnand: brcmnand: rename page sizes mtd: rawnand: brcmnand: support v2.1-v2.2 controllers mtd: rawnand: brcmnand: fix OOB R/W with Hamming ECC drivers/mtd/nand/raw/brcmnand/brcmnand.c | 353 +-- 1 file changed, 268 insertions(+), 85 deletions(-) Sorry for the delay. Finally I got some time to try your patches on a BCM63158 based board with NAND controller 7.1. It works fine. smime.p7s Description: S/MIME Cryptographic Signature
Re: [PATCH v2 10/10] mtd: rawnand: brcmnand: fix OOB R/W with Hamming ECC
On 02/11/2023 07:29 AM, Linus Walleij wrote:
From: Álvaro Fernández Rojas
Hamming ECC doesn't cover the OOB data, so reading or writing OOB shall
always be done without ECC enabled.
This is a problem when adding JFFS2 cleanmarkers to erased blocks. If JFFS2
clenmarkers are added to the OOB with ECC enabled, OOB bytes will be changed
from ff ff ff to 00 00 00, reporting incorrect ECC errors.
Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB NAND
controller")
Signed-off-by: Álvaro Fernández Rojas
Acked-by: Brian Norris
Signed-off-by: Miquel Raynal
Link: https://lore.kernel.org/linux-mtd/20210224080210.23686-1-nolt...@gmail.com
[Ported to U-Boot from the Linux kernel]
Signed-off-by: Linus Walleij
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index b2ebcaf7a5bf..efbf9a3120a4 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -2515,6 +2515,12 @@ static int brcmnand_init_cs(struct brcmnand_host *host,
ofnode dn)
ret = nand_register(0, mtd);
#endif /* __UBOOT__ */
+ /* If OOB is written with ECC enabled it will cause ECC errors */
+ if (is_hamming_ecc(host->ctrl, &host->hwcfg)) {
+ chip->ecc.write_oob = brcmnand_write_oob_raw;
+ chip->ecc.read_oob = brcmnand_read_oob_raw;
+ }
+
return ret;
}
Acked-by: William Zhang
smime.p7s
Description: S/MIME Cryptographic Signature
Re: [PATCH v2 09/10] mtd: rawnand: brcmnand: support v2.1-v2.2 controllers
On 02/11/2023 07:29 AM, Linus Walleij wrote:
From: Álvaro Fernández Rojas
v2.1: tested on Netgear DGND3700v1 (BCM6368)
v2.2: tested on Netgear DGND3700v2 (BCM6362)
Signed-off-by: Álvaro Fernández Rojas
Acked-by: Florian Fainelli
Signed-off-by: Miquel Raynal
Link:
https://lore.kernel.org/linux-mtd/20200522121524.4161539-6-nolt...@gmail.com
[Ported to U-Boot from the Linux kernel]
Signed-off-by: Linus Walleij
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 85 +---
1 file changed, 76 insertions(+), 9 deletions(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 10a2e2c0f599..b2ebcaf7a5bf 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -217,6 +217,7 @@ struct brcmnand_controller {
const unsigned int *block_sizes;
unsigned intmax_page_size;
const unsigned int *page_sizes;
+ unsigned intpage_size_shift;
unsigned intmax_oob;
u32 features;
@@ -293,6 +294,36 @@ enum brcmnand_reg {
BRCMNAND_FC_BASE,
};
+/* BRCMNAND v2.1-v2.2 */
+static const u16 brcmnand_regs_v21[] = {
+ [BRCMNAND_CMD_START]= 0x04,
+ [BRCMNAND_CMD_EXT_ADDRESS] = 0x08,
+ [BRCMNAND_CMD_ADDRESS] = 0x0c,
+ [BRCMNAND_INTFC_STATUS] = 0x5c,
+ [BRCMNAND_CS_SELECT]= 0x14,
+ [BRCMNAND_CS_XOR] = 0x18,
+ [BRCMNAND_LL_OP]= 0,
+ [BRCMNAND_CS0_BASE] = 0x40,
+ [BRCMNAND_CS1_BASE] = 0,
+ [BRCMNAND_CORR_THRESHOLD] = 0,
+ [BRCMNAND_CORR_THRESHOLD_EXT] = 0,
+ [BRCMNAND_UNCORR_COUNT] = 0,
+ [BRCMNAND_CORR_COUNT] = 0,
+ [BRCMNAND_CORR_EXT_ADDR]= 0x60,
+ [BRCMNAND_CORR_ADDR]= 0x64,
+ [BRCMNAND_UNCORR_EXT_ADDR] = 0x68,
+ [BRCMNAND_UNCORR_ADDR] = 0x6c,
+ [BRCMNAND_SEMAPHORE]= 0x50,
+ [BRCMNAND_ID] = 0x54,
+ [BRCMNAND_ID_EXT] = 0,
+ [BRCMNAND_LL_RDATA] = 0,
+ [BRCMNAND_OOB_READ_BASE]= 0x20,
+ [BRCMNAND_OOB_READ_10_BASE] = 0,
+ [BRCMNAND_OOB_WRITE_BASE] = 0x30,
+ [BRCMNAND_OOB_WRITE_10_BASE]= 0,
+ [BRCMNAND_FC_BASE] = 0x200,
+};
+
/* BRCMNAND v3.3-v4.0 */
static const u16 brcmnand_regs_v33[] = {
[BRCMNAND_CMD_START]= 0x04,
@@ -491,6 +522,9 @@ enum {
CFG_BUS_WIDTH = BIT(CFG_BUS_WIDTH_SHIFT),
CFG_DEVICE_SIZE_SHIFT = 24,
+ /* Only for v2.1 */
+ CFG_PAGE_SIZE_SHIFT_v2_1= 30,
+
/* Only for pre-v7.1 (with no CFG_EXT register) */
CFG_PAGE_SIZE_SHIFT = 20,
CFG_BLK_SIZE_SHIFT = 28,
@@ -526,12 +560,16 @@ static int brcmnand_revision_init(struct
brcmnand_controller *ctrl)
{
static const unsigned int block_sizes_v6[] = { 8, 16, 128, 256, 512,
1024, 2048, 0 };
static const unsigned int block_sizes_v4[] = { 16, 128, 8, 512, 256,
1024, 2048, 0 };
+ static const unsigned int block_sizes_v2_2[] = { 16, 128, 8, 512, 256,
0 };
+ static const unsigned int block_sizes_v2_1[] = { 16, 128, 8, 512, 0 };
static const unsigned int page_sizes_v3_4[] = { 512, 2048, 4096, 8192,
0 };
+ static const unsigned int page_sizes_v2_2[] = { 512, 2048, 4096, 0 };
+ static const unsigned int page_sizes_v2_1[] = { 512, 2048, 0 };
ctrl->nand_version = nand_readreg(ctrl, 0) & 0x;
- /* Only support v4.0+? */
- if (ctrl->nand_version < 0x0400) {
+ /* Only support v2.1+ */
+ if (ctrl->nand_version < 0x0201) {
dev_err(ctrl->dev, "version %#x not supported\n",
ctrl->nand_version);
return -ENODEV;
@@ -548,6 +586,8 @@ static int brcmnand_revision_init(struct
brcmnand_controller *ctrl)
ctrl->reg_offsets = brcmnand_regs_v50;
else if (ctrl->nand_version >= 0x0303)
ctrl->reg_offsets = brcmnand_regs_v33;
+ else if (ctrl->nand_version >= 0x0201)
+ ctrl->reg_offsets = brcmnand_regs_v21;
/* Chip-select stride */
if (ctrl->nand_version >= 0x0701)
@@ -573,14 +613,32 @@ static int brcmnand_revision_init(struct
brcmnand_controller *ctrl)
ctrl->max_page_size = 16 * 1024;
ctrl->max_block_size = 2 * 1024 * 1024;
} else {
- ctrl->page_sizes = page_sizes_v3_4;
+ if (ctrl->nand_version >= 0x0304)
+ ctrl->page_sizes = page_sizes_v3_4;
+ else if (ctrl->nand_version >= 0x0202)
+ ctrl->page_sizes = page_sizes_v2_2;
+ else
+
Re: [PATCH v2 08/10] mtd: rawnand: brcmnand: rename page sizes
On 02/11/2023 07:29 AM, Linus Walleij wrote:
From: Álvaro Fernández Rojas
Current pages sizes apply to controllers after v3.4
Signed-off-by: Álvaro Fernández Rojas
Acked-by: Florian Fainelli
Signed-off-by: Miquel Raynal
Link:
https://lore.kernel.org/linux-mtd/20200522121524.4161539-4-nolt...@gmail.com
[Ported to U-Boot from the Linux kernel]
Signed-off-by: Linus Walleij
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 1ea9091e6497..10a2e2c0f599 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -526,7 +526,7 @@ static int brcmnand_revision_init(struct
brcmnand_controller *ctrl)
{
static const unsigned int block_sizes_v6[] = { 8, 16, 128, 256, 512,
1024, 2048, 0 };
static const unsigned int block_sizes_v4[] = { 16, 128, 8, 512, 256,
1024, 2048, 0 };
- static const unsigned int page_sizes[] = { 512, 2048, 4096, 8192, 0 };
+ static const unsigned int page_sizes_v3_4[] = { 512, 2048, 4096, 8192,
0 };
ctrl->nand_version = nand_readreg(ctrl, 0) & 0x;
@@ -573,7 +573,7 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl)
ctrl->max_page_size = 16 * 1024;
ctrl->max_block_size = 2 * 1024 * 1024;
} else {
- ctrl->page_sizes = page_sizes;
+ ctrl->page_sizes = page_sizes_v3_4;
if (ctrl->nand_version >= 0x0600)
ctrl->block_sizes = block_sizes_v6;
else
Acked-by: William Zhang
smime.p7s
Description: S/MIME Cryptographic Signature
Re: [PATCH v2 07/10] mtd: rawnand: brcmnand: fix CS0 layout
On 02/11/2023 07:29 AM, Linus Walleij wrote:
From: Álvaro Fernández Rojas
Only v3.3-v5.0 have a different CS0 layout.
Controllers before v3.3 use the same layout for every CS.
Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB NAND
controller")
Signed-off-by: Álvaro Fernández Rojas
Acked-by: Florian Fainelli
Signed-off-by: Miquel Raynal
Link:
https://lore.kernel.org/linux-mtd/20200522121524.4161539-3-nolt...@gmail.com
[Ported to U-Boot from the Linux kernel]
Signed-off-by: Linus Walleij
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index ee7c3a21602e..1ea9091e6497 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -561,8 +561,9 @@ static int brcmnand_revision_init(struct
brcmnand_controller *ctrl)
} else {
ctrl->cs_offsets = brcmnand_cs_offsets;
- /* v5.0 and earlier has a different CS0 offset layout */
- if (ctrl->nand_version <= 0x0500)
+ /* v3.3-5.0 have a different CS0 offset layout */
+ if (ctrl->nand_version >= 0x0303 &&
+ ctrl->nand_version <= 0x0500)
ctrl->cs0_offsets = brcmnand_cs_offsets_cs0;
}
Acked-by: William Zhang
smime.p7s
Description: S/MIME Cryptographic Signature
[PATCH 1/1] test: unit test for crc8
Add a unit test for the crc8() function.
Signed-off-by: Heinrich Schuchardt
---
test/lib/Makefile| 1 +
test/lib/test_crc8.c | 29 +
2 files changed, 30 insertions(+)
create mode 100644 test/lib/test_crc8.c
diff --git a/test/lib/Makefile b/test/lib/Makefile
index 7e7922fe3b..e0bd9e04e8 100644
--- a/test/lib/Makefile
+++ b/test/lib/Makefile
@@ -20,6 +20,7 @@ obj-$(CONFIG_UT_LIB_ASN1) += asn1.o
obj-$(CONFIG_UT_LIB_RSA) += rsa.o
obj-$(CONFIG_AES) += test_aes.o
obj-$(CONFIG_GETOPT) += getopt.o
+obj-$(CONFIG_CRC8) += test_crc8.o
obj-$(CONFIG_UT_LIB_CRYPT) += test_crypt.o
else
obj-$(CONFIG_SANDBOX) += kconfig_spl.o
diff --git a/test/lib/test_crc8.c b/test/lib/test_crc8.c
new file mode 100644
index 00..0dac97bc5b
--- /dev/null
+++ b/test/lib/test_crc8.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2023, Heinrich Schuchardt
+ *
+ * Unit test for crc8
+ */
+
+#include
+#include
+#include
+
+static int lib_crc8(struct unit_test_state *uts) {
+ const char str[] = {0x20, 0xf4, 0xd8, 0x24, 0x6f, 0x41, 0x91, 0xae,
+ 0x46, 0x61, 0xf6, 0x55, 0xeb, 0x38, 0x47, 0x0f,
+ 0xec, 0xd8};
+ int actual1, actual2, actual3;
+ int expected1 = 0x47, expected2 = 0xea, expected3 = expected1;
+
+ actual1 = crc8(0, str, sizeof(str));
+ ut_asserteq(expected1, actual1);
+ actual2 = crc8(0, str, 7);
+ ut_asserteq(expected2, actual2);
+ actual3 = crc8(actual2, str + 7, sizeof(str) - 7);
+ ut_asserteq(expected3, actual3);
+
+ return 0;
+}
+
+LIB_TEST(lib_crc8, 0);
--
2.38.1
Re: [PATCH v2 06/10] mtd: rawnand: brcmnand: rename v4 registers
On 02/11/2023 07:29 AM, Linus Walleij wrote:
From: Álvaro Fernández Rojas
These registers are also used on v3.3.
Signed-off-by: Álvaro Fernández Rojas
Reviewed-by: Miquel Raynal
Acked-by: Florian Fainelli
Signed-off-by: Miquel Raynal
Link:
https://lore.kernel.org/linux-mtd/20200522121524.4161539-2-nolt...@gmail.com
[Ported to U-Boot from the Linux kernel]
Signed-off-by: Linus Walleij
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 5d3fb460d89a..ee7c3a21602e 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -293,8 +293,8 @@ enum brcmnand_reg {
BRCMNAND_FC_BASE,
};
-/* BRCMNAND v4.0 */
-static const u16 brcmnand_regs_v40[] = {
+/* BRCMNAND v3.3-v4.0 */
+static const u16 brcmnand_regs_v33[] = {
[BRCMNAND_CMD_START]= 0x04,
[BRCMNAND_CMD_EXT_ADDRESS] = 0x08,
[BRCMNAND_CMD_ADDRESS] = 0x0c,
@@ -546,8 +546,8 @@ static int brcmnand_revision_init(struct
brcmnand_controller *ctrl)
ctrl->reg_offsets = brcmnand_regs_v60;
else if (ctrl->nand_version >= 0x0500)
ctrl->reg_offsets = brcmnand_regs_v50;
- else if (ctrl->nand_version >= 0x0400)
- ctrl->reg_offsets = brcmnand_regs_v40;
+ else if (ctrl->nand_version >= 0x0303)
+ ctrl->reg_offsets = brcmnand_regs_v33;
/* Chip-select stride */
if (ctrl->nand_version >= 0x0701)
Acked-by: William Zhang
smime.p7s
Description: S/MIME Cryptographic Signature
Re: [PATCH v2 05/10] mtd: rawnand: brcmnand: correctly verify erased pages
On 02/11/2023 07:29 AM, Linus Walleij wrote:
From: Álvaro Fernández Rojas
The current code checks that the whole OOB area is erased.
This is a problem when JFFS2 cleanmarkers are added to the OOB, since it will
fail due to the usable OOB bytes not being 0xff.
Correct this by only checking that data and ECC bytes aren't 0xff.
Fixes: 02b88eea9f9c ("mtd: brcmnand: Add check for erased page bitflips")
Signed-off-by: Álvaro Fernández Rojas
Signed-off-by: Miquel Raynal
Link:
https://lore.kernel.org/linux-mtd/20200512082451.771212-1-nolt...@gmail.com
[Ported to U-Boot from the Linux kernel]
Signed-off-by: Linus Walleij
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index a934373a2992..5d3fb460d89a 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -1777,11 +1777,12 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd,
struct nand_chip *chip,
static int brcmstb_nand_verify_erased_page(struct mtd_info *mtd,
struct nand_chip *chip, void *buf, u64 addr)
{
- int i, sas;
- void *oob = chip->oob_poi;
+ struct mtd_oob_region ecc;
+ int i;
int bitflips = 0;
int page = addr >> chip->page_shift;
int ret;
+ void *ecc_bytes;
void *ecc_chunk;
if (!buf) {
@@ -1794,18 +1795,20 @@ static int brcmstb_nand_verify_erased_page(struct
mtd_info *mtd,
chip->pagebuf = -1;
}
- sas = mtd->oobsize / chip->ecc.steps;
-
/* read without ecc for verification */
ret = chip->ecc.read_page_raw(mtd, chip, buf, true, page);
if (ret)
return ret;
- for (i = 0; i < chip->ecc.steps; i++, oob += sas) {
+ for (i = 0; i < chip->ecc.steps; i++) {
ecc_chunk = buf + chip->ecc.size * i;
- ret = nand_check_erased_ecc_chunk(ecc_chunk,
- chip->ecc.size,
- oob, sas, NULL, 0,
+
+ mtd_ooblayout_ecc(mtd, i, &ecc);
+ ecc_bytes = chip->oob_poi + ecc.offset;
+
+ ret = nand_check_erased_ecc_chunk(ecc_chunk, chip->ecc.size,
+ ecc_bytes, ecc.length,
+ NULL, 0,
chip->ecc.strength);
if (ret < 0)
return ret;
Acked-by: William Zhang
smime.p7s
Description: S/MIME Cryptographic Signature
Re: [PATCH v2 04/10] mtd: nand: brcmnand: Add support for flash-dma v0
On 02/11/2023 07:29 AM, Linus Walleij wrote:
From: Kamal Dasu
This change adds support for flash dma v0.0.
Signed-off-by: Kamal Dasu
Signed-off-by: Miquel Raynal
[Ported to U-Boot from the Linux kernel]
Signed-off-by: Linus Walleij
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 21 +++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 0402cb06a74b..a934373a2992 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -120,6 +120,18 @@ enum flash_dma_reg {
};
#ifndef __UBOOT__
+/* flash_dma registers v0*/
+static const u16 flash_dma_regs_v0[] = {
+ [FLASH_DMA_REVISION]= 0x00,
+ [FLASH_DMA_FIRST_DESC] = 0x04,
+ [FLASH_DMA_CTRL]= 0x08,
+ [FLASH_DMA_MODE]= 0x0c,
+ [FLASH_DMA_STATUS] = 0x10,
+ [FLASH_DMA_INTERRUPT_DESC] = 0x14,
+ [FLASH_DMA_ERROR_STATUS]= 0x18,
+ [FLASH_DMA_CURRENT_DESC]= 0x1c,
+};
+
/* flash_dma registers v1*/
static const u16 flash_dma_regs_v1[] = {
[FLASH_DMA_REVISION]= 0x00,
@@ -614,6 +626,8 @@ static void brcmnand_flash_dma_revision_init(struct
brcmnand_controller *ctrl)
/* flash_dma register offsets */
if (ctrl->nand_version >= 0x0703)
ctrl->flash_dma_offsets = flash_dma_regs_v4;
+ else if (ctrl->nand_version == 0x0602)
+ ctrl->flash_dma_offsets = flash_dma_regs_v0;
else
ctrl->flash_dma_offsets = flash_dma_regs_v1;
}
@@ -1645,8 +1659,11 @@ static void brcmnand_dma_run(struct brcmnand_host *host,
dma_addr_t desc)
flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC, lower_32_bits(desc));
(void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC);
- flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC_EXT, upper_32_bits(desc));
- (void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC_EXT);
+ if (ctrl->nand_version > 0x0602) {
+ flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC_EXT,
+upper_32_bits(desc));
+ (void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC_EXT);
+ }
/* Start FLASH_DMA engine */
ctrl->dma_pending = true;
Acked-by: William Zhang
smime.p7s
Description: S/MIME Cryptographic Signature
Re: [PATCH v2 03/10] mtd: rawnand: brcmnand: Fix ecc chunk calculation for erased page bitfips
On 02/11/2023 07:29 AM, Linus Walleij wrote:
From: Claire Lin
In brcmstb_nand_verify_erased_page(), the ECC chunk pointer calculation
while correcting erased page bitflips is wrong, fix it.
Fixes: 02b88eea9f9c ("mtd: brcmnand: Add check for erased page bitflips")
Signed-off-by: Claire Lin
Reviewed-by: Ray Jui
Signed-off-by: Kamal Dasu
Signed-off-by: Miquel Raynal
[Ported to U-Boot from the Linux kernel]
Signed-off-by: Linus Walleij
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 170aece0aa79..0402cb06a74b 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -1765,6 +1765,7 @@ static int brcmstb_nand_verify_erased_page(struct
mtd_info *mtd,
int bitflips = 0;
int page = addr >> chip->page_shift;
int ret;
+ void *ecc_chunk;
if (!buf) {
#ifndef __UBOOT__
@@ -1784,7 +1785,9 @@ static int brcmstb_nand_verify_erased_page(struct
mtd_info *mtd,
return ret;
for (i = 0; i < chip->ecc.steps; i++, oob += sas) {
- ret = nand_check_erased_ecc_chunk(buf, chip->ecc.size,
+ ecc_chunk = buf + chip->ecc.size * i;
+ ret = nand_check_erased_ecc_chunk(ecc_chunk,
+ chip->ecc.size,
oob, sas, NULL, 0,
chip->ecc.strength);
if (ret < 0)
Acked-by: William Zhang
smime.p7s
Description: S/MIME Cryptographic Signature
Re: [PATCH v2 02/10] mtd: rawnand: brcmnand: Add support for v7.3 controller
On 02/11/2023 07:29 AM, Linus Walleij wrote:
From: Kamal Dasu
This change adds support for brcm NAND v7.3 controller. This controller
uses a newer version of flash_dma engine and change mostly implements
these differences.
Signed-off-by: Kamal Dasu
Signed-off-by: Miquel Raynal
[Ported to U-Boot from the Linux kernel]
Signed-off-by: Linus Walleij
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 106 ++-
1 file changed, 84 insertions(+), 22 deletions(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 571f1c795da0..170aece0aa79 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -86,6 +86,12 @@ struct brcm_nand_dma_desc {
#define FLASH_DMA_ECC_ERROR (1 << 8)
#define FLASH_DMA_CORR_ERROR (1 << 9)
+/* Bitfields for DMA_MODE */
+#define FLASH_DMA_MODE_STOP_ON_ERROR BIT(1) /* stop in Uncorr ECC error */
+#define FLASH_DMA_MODE_MODEBIT(0) /* link list */
+#define FLASH_DMA_MODE_MASK(FLASH_DMA_MODE_STOP_ON_ERROR | \
+ FLASH_DMA_MODE_MODE)
+
/* 512B flash cache in the NAND controller HW */
#define FC_SHIFT 9U
#define FC_BYTES 512U
@@ -98,6 +104,53 @@ struct brcm_nand_dma_desc {
#define NAND_CTRL_RDY (INTFC_CTLR_READY | INTFC_FLASH_READY)
#define NAND_POLL_STATUS_TIMEOUT_MS 100
+/* flash_dma registers */
+enum flash_dma_reg {
+ FLASH_DMA_REVISION = 0,
+ FLASH_DMA_FIRST_DESC,
+ FLASH_DMA_FIRST_DESC_EXT,
+ FLASH_DMA_CTRL,
+ FLASH_DMA_MODE,
+ FLASH_DMA_STATUS,
+ FLASH_DMA_INTERRUPT_DESC,
+ FLASH_DMA_INTERRUPT_DESC_EXT,
+ FLASH_DMA_ERROR_STATUS,
+ FLASH_DMA_CURRENT_DESC,
+ FLASH_DMA_CURRENT_DESC_EXT,
+};
+
+#ifndef __UBOOT__
+/* flash_dma registers v1*/
+static const u16 flash_dma_regs_v1[] = {
+ [FLASH_DMA_REVISION]= 0x00,
+ [FLASH_DMA_FIRST_DESC] = 0x04,
+ [FLASH_DMA_FIRST_DESC_EXT] = 0x08,
+ [FLASH_DMA_CTRL]= 0x0c,
+ [FLASH_DMA_MODE]= 0x10,
+ [FLASH_DMA_STATUS] = 0x14,
+ [FLASH_DMA_INTERRUPT_DESC] = 0x18,
+ [FLASH_DMA_INTERRUPT_DESC_EXT] = 0x1c,
+ [FLASH_DMA_ERROR_STATUS]= 0x20,
+ [FLASH_DMA_CURRENT_DESC]= 0x24,
+ [FLASH_DMA_CURRENT_DESC_EXT]= 0x28,
+};
+
+/* flash_dma registers v4 */
+static const u16 flash_dma_regs_v4[] = {
+ [FLASH_DMA_REVISION]= 0x00,
+ [FLASH_DMA_FIRST_DESC] = 0x08,
+ [FLASH_DMA_FIRST_DESC_EXT] = 0x0c,
+ [FLASH_DMA_CTRL]= 0x10,
+ [FLASH_DMA_MODE]= 0x14,
+ [FLASH_DMA_STATUS] = 0x18,
+ [FLASH_DMA_INTERRUPT_DESC] = 0x20,
+ [FLASH_DMA_INTERRUPT_DESC_EXT] = 0x24,
+ [FLASH_DMA_ERROR_STATUS]= 0x28,
+ [FLASH_DMA_CURRENT_DESC]= 0x30,
+ [FLASH_DMA_CURRENT_DESC_EXT]= 0x34,
+};
+#endif /* __UBOOT__ */
+
/* Controller feature flags */
enum {
BRCMNAND_HAS_1K_SECTORS = BIT(0),
@@ -135,6 +188,8 @@ struct brcmnand_controller {
/* List of NAND hosts (one for each chip-select) */
struct list_head host_list;
+ /* flash_dma reg */
+ const u16 *flash_dma_offsets;
struct brcm_nand_dma_desc *dma_desc;
dma_addr_t dma_pa;
@@ -473,7 +528,7 @@ static int brcmnand_revision_init(struct brcmnand_controller *ctrl)
/* Register offsets */
if (ctrl->nand_version >= 0x0702)
ctrl->reg_offsets = brcmnand_regs_v72;
- else if (ctrl->nand_version >= 0x0701)
+ else if (ctrl->nand_version == 0x0701)
ctrl->reg_offsets = brcmnand_regs_v71;
else if (ctrl->nand_version >= 0x0600)
ctrl->reg_offsets = brcmnand_regs_v60;
@@ -518,7 +573,7 @@ static int brcmnand_revision_init(struct
brcmnand_controller *ctrl)
}
/* Maximum spare area sector size (per 512B) */
- if (ctrl->nand_version >= 0x0702)
+ if (ctrl->nand_version == 0x0702)
ctrl->max_oob = 128;
else if (ctrl->nand_version >= 0x0600)
ctrl->max_oob = 64;
@@ -553,6 +608,17 @@ static int brcmnand_revision_init(struct
brcmnand_controller *ctrl)
return 0;
}
+#ifndef __UBOOT__
+static void brcmnand_flash_dma_revision_init(struct brcmnand_controller *ctrl)
+{
+ /* flash_dma register offsets */
+ if (ctrl->nand_version >= 0x0703)
+ ctrl->flash_dma_offsets = flash_dma_regs_v4;
+ else
+ ctrl->flash_dma_offsets = flash_dma_regs_v1;
+}
+#endif /* __UBOOT__ */
+
static inline u32 brcmnand_read_reg(struct brcmnand_controller *ctrl,
enum brcmnand_reg reg)
{
@@ -675,7 +741,7 @@ static void brcmnand_wr_corr_thresh(struct b
Re: [PATCH v2 01/10] mtd: rawnand: brcmnand: Refactored code to introduce helper functions
On 02/11/2023 07:29 AM, Linus Walleij wrote:
From: Kamal Dasu
Refactored NAND ECC and CMD address configuration code to use helper
functions.
Signed-off-by: Kamal Dasu
Signed-off-by: Miquel Raynal
[Ported to U-Boot from the Linux kernel]
Signed-off-by: Linus Walleij
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 100 ++-
1 file changed, 62 insertions(+), 38 deletions(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 74c9348f7fc4..571f1c795da0 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -595,6 +595,54 @@ static inline void brcmnand_write_fc(struct
brcmnand_controller *ctrl,
__raw_writel(val, ctrl->nand_fc + word * 4);
}
+static void brcmnand_clear_ecc_addr(struct brcmnand_controller *ctrl)
+{
+
+ /* Clear error addresses */
+ brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_ADDR, 0);
+ brcmnand_write_reg(ctrl, BRCMNAND_CORR_ADDR, 0);
+ brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_EXT_ADDR, 0);
+ brcmnand_write_reg(ctrl, BRCMNAND_CORR_EXT_ADDR, 0);
+}
+
+static u64 brcmnand_get_uncorrecc_addr(struct brcmnand_controller *ctrl)
+{
+ u64 err_addr;
+
+ err_addr = brcmnand_read_reg(ctrl, BRCMNAND_UNCORR_ADDR);
+ err_addr |= ((u64)(brcmnand_read_reg(ctrl,
+BRCMNAND_UNCORR_EXT_ADDR)
+& 0x) << 32);
+
+ return err_addr;
+}
+
+static u64 brcmnand_get_correcc_addr(struct brcmnand_controller *ctrl)
+{
+ u64 err_addr;
+
+ err_addr = brcmnand_read_reg(ctrl, BRCMNAND_CORR_ADDR);
+ err_addr |= ((u64)(brcmnand_read_reg(ctrl,
+BRCMNAND_CORR_EXT_ADDR)
+& 0x) << 32);
+
+ return err_addr;
+}
+
+static void brcmnand_set_cmd_addr(struct mtd_info *mtd, u64 addr)
+{
+ struct nand_chip *chip = mtd_to_nand(mtd);
+ struct brcmnand_host *host = nand_get_controller_data(chip);
+ struct brcmnand_controller *ctrl = host->ctrl;
+
+ brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS,
+ (host->cs << 16) | ((addr >> 32) & 0x));
+ (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS);
+ brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS,
+ lower_32_bits(addr));
+ (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS);
+}
+
static inline u16 brcmnand_cs_offset(struct brcmnand_controller *ctrl, int cs,
enum brcmnand_cs_reg reg)
{
@@ -1190,9 +1238,12 @@ static void brcmnand_send_cmd(struct brcmnand_host
*host, int cmd)
{
struct brcmnand_controller *ctrl = host->ctrl;
int ret;
+ u64 cmd_addr;
+
+ cmd_addr = brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS);
+
+ dev_dbg(ctrl->dev, "send native cmd %d addr 0x%llx\n", cmd, cmd_addr);
- dev_dbg(ctrl->dev, "send native cmd %d addr_lo 0x%x\n", cmd,
- brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS));
BUG_ON(ctrl->cmd_pending != 0);
ctrl->cmd_pending = cmd;
@@ -1365,12 +1416,7 @@ static void brcmnand_cmdfunc(struct mtd_info *mtd, unsigned command,
if (!native_cmd)
return;
- brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS,
- (host->cs << 16) | ((addr >> 32) & 0x));
- (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS);
- brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS, lower_32_bits(addr));
- (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS);
-
+ brcmnand_set_cmd_addr(mtd, addr);
brcmnand_send_cmd(host, native_cmd);
brcmnand_waitfunc(mtd, chip);
@@ -1600,20 +1646,10 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip,
struct brcmnand_controller *ctrl = host->ctrl;
int i, j, ret = 0;
- /* Clear error addresses */
- brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_ADDR, 0);
- brcmnand_write_reg(ctrl, BRCMNAND_CORR_ADDR, 0);
- brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_EXT_ADDR, 0);
- brcmnand_write_reg(ctrl, BRCMNAND_CORR_EXT_ADDR, 0);
-
- brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS,
- (host->cs << 16) | ((addr >> 32) & 0x));
- (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS);
+ brcmnand_clear_ecc_addr(ctrl);
for (i = 0; i < trans; i++, addr += FC_BYTES) {
- brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS,
- lower_32_bits(addr));
- (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS);
+ brcmnand_set_cmd_addr(mtd, addr);
/* SPARE_AREA_READ does not use ECC, so just use PAGE_READ */
brcmnand_send_cmd(host, CMD_PAGE_READ);
brcmnand_waitfunc(mtd, chip);
@@ -1633,21 +1669,15
Re: [PATCH v2] usb: dwc3: Use the devm_gpiod_get_optional() API for reset gpio
On 1/13/23 06:12, Venkatesh Yadav Abbarapu wrote: As the "reset-gpios" property is optional, don't return the error and just skip the gpio reset sequence. Signed-off-by: Venkatesh Yadav Abbarapu --- Changes in v2: - Replaced the gpio_request_by_name() the API with devm_gpiod_get_optional(). The PX30 seems to fail to build: https://source.denx.de/u-boot/custodians/u-boot-usb/-/jobs/580968
[PULL] u-boot-socfpga/master
The following changes since commit 4eb7c5030d3f3c707c02a64dc8ea90de3da89928:
Merge tag 'efi-2023-04-rc3' of
https://source.denx.de/u-boot/custodians/u-boot-efi (2023-02-19 17:03:30
-0500)
are available in the Git repository at:
git://git.denx.de/u-boot-socfpga.git master
for you to fetch changes up to 52b8fca7178afdcacb31cfcdfea9429779d084a1:
chameleonv3: Convert CONFIG_SPL_MAX_SIZE to Kconfig (2023-02-22
00:28:39 +0100)
Paweł Anikiel (6):
socfpga: chameleonv3: Enable ext4 in SPL
socfpga: chameleonv3: Move environment to a text file
arm: dts: chameleonv3: Override chameleonv3 bitstream names
arm: dts: chameleonv3: Rename chameleonv3.dts to .dtsi
arm: dts: chameleonv3: Add 270-2 variant
chameleonv3: Convert CONFIG_SPL_MAX_SIZE to Kconfig
arch/arm/dts/Makefile
| 1 +
arch/arm/dts/{socfpga_arria10_chameleonv3.dts =>
socfpga_arria10_chameleonv3.dtsi} | 0
arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi
| 12
arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts
| 5 +
arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi
| 4
arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts
| 2 +-
arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi
| 4
arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts
| 2 +-
board/google/chameleonv3/environment.txt
| 13 +
configs/socfpga_chameleonv3_defconfig
| 2 ++
include/configs/socfpga_chameleonv3.h
| 9 -
11 files changed, 47 insertions(+), 7 deletions(-)
rename arch/arm/dts/{socfpga_arria10_chameleonv3.dts =>
socfpga_arria10_chameleonv3.dtsi} (100%)
create mode 100644
arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi
create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts
create mode 100644 board/google/chameleonv3/environment.txt
[PATCH v2 1/1] sandbox: fix building with CONFIG_SPL_TIMER=y
Building sandbox_defconfig with CONFIG_SPL_TIMER=y results in an error
include/dm/platdata.h:63:33: error: static assertion failed:
"Cannot use U_BOOT_DRVINFO with of-platdata.
Please use devicetree instead"
Add a missing condition in the sandbox driver.
Signed-off-by: Heinrich Schuchardt
---
v2:
don't create U_BOOT_DRVINFO for DT_PLAT_C
(as requested in review comment by Simon)
---
drivers/timer/sandbox_timer.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/timer/sandbox_timer.c b/drivers/timer/sandbox_timer.c
index c846bfb9f1..1da7e0c3a7 100644
--- a/drivers/timer/sandbox_timer.c
+++ b/drivers/timer/sandbox_timer.c
@@ -66,6 +66,8 @@ U_BOOT_DRIVER(sandbox_timer) = {
};
/* This is here in case we don't have a device tree */
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
U_BOOT_DRVINFO(sandbox_timer_non_fdt) = {
.name = "sandbox_timer",
};
+#endif
--
2.38.1
[PATCH] linker_lists.h: Add attribute used to ll_entry_start macro
>From 39d292a327b104dcb1347afb545b2baeb7b2227e Mon Sep 17 00:00:00 2001
From: AdityaK
Date: Tue, 21 Feb 2023 15:05:54 -0800
Subject: [PATCH] linker_lists.h: Add attribute used to ll_entry_start macro
The variable gets dropped by clang compiler in an optimized builds.
Adding attribute((used)) allows the symbol to be preserved. Similar
changes have been proposed in the past e.g.,
569524741a01e1a96fc2b75dd7e5d12e41ce6c2b for ll_entry_declare macro.
Signed-off-by: AdityaK
---
include/linker_lists.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linker_lists.h b/include/linker_lists.h
index d3da9d44e8..4cd13c3bc8 100644
--- a/include/linker_lists.h
+++ b/include/linker_lists.h
@@ -125,7 +125,7 @@
#define ll_entry_start(_type, _list) \
({ \
static char start[0] __aligned(CONFIG_LINKER_LIST_ALIGN) \
- __attribute__((unused)) \
+ __attribute__((unused)) __attribute__((used)) \
__section("__u_boot_list_2_"#_list"_1"); \
(_type *)&start; \
})
--
2.39.2.637.g21b0678d19-goog
Re: [PATCH 2/3] rockchip: Disable DISTRO_DEFAULTS for rockpro64
On 2023-02-21, Simon Glass wrote: > This board has moved to standard boot but the old 'distro_bootcmd' > command is still active. Disable DISTRO_DEFAULTS to fix this. Works for booting rockpro64-rk3399, thanks! Tested-by: Vagrant Cascadian > Signed-off-by: Simon Glass > --- > > configs/rockpro64-rk3399_defconfig | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/configs/rockpro64-rk3399_defconfig > b/configs/rockpro64-rk3399_defconfig > index 49614236819..fe2415c87c9 100644 > --- a/configs/rockpro64-rk3399_defconfig > +++ b/configs/rockpro64-rk3399_defconfig > @@ -19,6 +19,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y > CONFIG_SPL_SPI=y > CONFIG_SYS_LOAD_ADDR=0x800800 > CONFIG_DEBUG_UART=y > +# CONFIG_DISTRO_DEFAULTS is not set > CONFIG_BOOTSTAGE=y > CONFIG_BOOTSTAGE_REPORT=y > CONFIG_USE_PREBOOT=y > -- > 2.39.2.637.g21b0678d19-goog signature.asc Description: PGP signature
Re: [PATCH v2 RESEND 0/6] Update Chameleon v3 configuration
On 2/21/23 16:17, Paweł Anikiel wrote:
These changes add the third chameleon variation and make it easier to
deploy images to different boards.
v2 changes:
- rename chameleonv3.dts to .dtsi
- add missing CONFIG_SPL_MAX_SIZE symbol
Paweł Anikiel (6):
socfpga: chameleonv3: Enable ext4 in SPL
socfpga: chameleonv3: Move environment to a text file
arm: dts: chameleonv3: Override chameleonv3 bitstream names
arm: dts: chameleonv3: Rename chameleonv3.dts to .dtsi
arm: dts: chameleonv3: Add 270-2 variant
chameleonv3: Convert CONFIG_SPL_MAX_SIZE to Kconfig
arch/arm/dts/Makefile | 1 +
...eleonv3.dts => socfpga_arria10_chameleonv3.dtsi} | 0
.../socfpga_arria10_chameleonv3_270_2-u-boot.dtsi | 12
arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts | 5 +
.../socfpga_arria10_chameleonv3_270_3-u-boot.dtsi | 4
arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts | 2 +-
.../socfpga_arria10_chameleonv3_480_2-u-boot.dtsi | 4
arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts | 2 +-
board/google/chameleonv3/environment.txt| 13 +
configs/socfpga_chameleonv3_defconfig | 2 ++
include/configs/socfpga_chameleonv3.h | 9 -
11 files changed, 47 insertions(+), 7 deletions(-)
rename arch/arm/dts/{socfpga_arria10_chameleonv3.dts =>
socfpga_arria10_chameleonv3.dtsi} (100%)
create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi
create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts
create mode 100644 board/google/chameleonv3/environment.txt
Applied all, thanks.
Please just keep an eye on this and let me know if this doesn't land in
mainline in like a week or so. Sorry for the delay.
Re: [PATCH 3/3] bootstd: Enable BOOTSTD_DEFAULTS by default
On 2023-02-21, Simon Glass wrote: > This is needed to enable the boot command used to start standard boot. > Enable it by default. This brings in quite a few features, mostly in > common with DISTRO_DEFAULTS Works for booting rockpro64-rk3399, thanks! Tested-by: Vagrant Cascadian > Signed-off-by: Simon Glass > --- > > boot/Kconfig | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/boot/Kconfig b/boot/Kconfig > index 5f491625c82..8759b863b00 100644 > --- a/boot/Kconfig > +++ b/boot/Kconfig > @@ -409,6 +409,7 @@ if BOOTSTD > config BOOTSTD_DEFAULTS > bool "Select some common defaults for standard boot" > depends on BOOTSTD > + default y > imply USE_BOOTCOMMAND > # Bring in some defaults which are generally needed. Boards can drop > # these as needed to save code space. Bootstd does not generally require > -- > 2.39.2.637.g21b0678d19-goog signature.asc Description: PGP signature
Re: [PATCH 1/3] rockchip: Drop bootstage stash in TPL and SPL
On 2023-02-21, Simon Glass wrote: > Unfortunately the IRAM used to stash the bootstage records in TPL > becomes accessible after SPL runs. Presumably this is because of ATF > taking it over. > > We could move the stash to another address in SPL, before passing it to > U-Boot proper. But it seems easier to wait until we have support for > standard passage[1] which should not be too far away. > > For now, disable it in TPL and SPL. > > [1] https://patchwork.ozlabs.org/project/uboot/cover/ > 20220117150428.1580273-1-...@chromium.org/ > > Signed-off-by: Simon Glass Works for booting rockpro64-rk3399, thanks! Tested-by: Vagrant Cascadian > configs/rockpro64-rk3399_defconfig | 5 - > 1 file changed, 5 deletions(-) > > diff --git a/configs/rockpro64-rk3399_defconfig > b/configs/rockpro64-rk3399_defconfig > index dd67f9dff64..49614236819 100644 > --- a/configs/rockpro64-rk3399_defconfig > +++ b/configs/rockpro64-rk3399_defconfig > @@ -13,7 +13,6 @@ CONFIG_DM_RESET=y > CONFIG_ROCKCHIP_RK3399=y > CONFIG_TARGET_ROCKPRO64_RK3399=y > CONFIG_SPL_STACK=0x40 > -CONFIG_BOOTSTAGE_STASH_ADDR=0xff8e > CONFIG_DEBUG_UART_BASE=0xFF1A > CONFIG_DEBUG_UART_CLOCK=2400 > CONFIG_SPL_SPI_FLASH_SUPPORT=y > @@ -21,11 +20,7 @@ CONFIG_SPL_SPI=y > CONFIG_SYS_LOAD_ADDR=0x800800 > CONFIG_DEBUG_UART=y > CONFIG_BOOTSTAGE=y > -CONFIG_SPL_BOOTSTAGE=y > -CONFIG_TPL_BOOTSTAGE=y > CONFIG_BOOTSTAGE_REPORT=y > -CONFIG_SPL_BOOTSTAGE_RECORD_COUNT=10 > -CONFIG_BOOTSTAGE_STASH=y > CONFIG_USE_PREBOOT=y > CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb" > CONFIG_DISPLAY_BOARDINFO_LATE=y > -- > 2.39.2.637.g21b0678d19-goog signature.asc Description: PGP signature
Re: [PATCH v3 11/95] Correct SPL use of PHY_CADENCE_SIERRA
Hi Tom, On Tue, 21 Feb 2023 at 16:09, Simon Glass wrote: > > Hi Tom, > > On Tue, 21 Feb 2023 at 16:02, Tom Rini wrote: > > > > On Tue, Feb 21, 2023 at 12:35:41PM -0700, Simon Glass wrote: > > > Hi Tom, > > > > > > On Tue, 14 Feb 2023 at 09:31, Tom Rini wrote: > > > > > > > > On Sun, Feb 12, 2023 at 04:15:14PM -0700, Simon Glass wrote: > > > > > This converts 1 usage of this option to the non-SPL form, since there > > > > > is > > > > > no SPL_PHY_CADENCE_SIERRA defined in Kconfig > > > > > > > > > > Signed-off-by: Simon Glass > > > > > --- > > > > > > > > > > (no changes since v1) > > > > > > > > > > drivers/phy/cadence/Makefile | 2 +- > > > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > > > > > diff --git a/drivers/phy/cadence/Makefile > > > > > b/drivers/phy/cadence/Makefile > > > > > index af63b32d9f5..c247feb8262 100644 > > > > > --- a/drivers/phy/cadence/Makefile > > > > > +++ b/drivers/phy/cadence/Makefile > > > > > @@ -1,2 +1,2 @@ > > > > > -obj-$(CONFIG_$(SPL_)PHY_CADENCE_SIERRA) += phy-cadence-sierra.o > > > > > +obj-$(CONFIG_PHY_CADENCE_SIERRA) += phy-cadence-sierra.o > > > > > obj-$(CONFIG_$(SPL_)PHY_CADENCE_TORRENT) += phy-cadence-torrent.o > > > > > > > > This, and then PHY_CADENCE_TORRENT take this the wrong direction, both > > > > symbols should be false for non-PPL builds. > > > > > > This one is odd, since the board defines SPL_PHY, presumably for a > > > reason. It could always undefine that if needed. > > > > > > I'll add some more notes in v5. > > > > The platforms in question are fairly complex and I want to say it needs > > a PHY for USB in SPL, but not a PHY for networking, in SPL. > > Ah that makes more sense. OK, will take yet another look. I'll just drop this patch. Regards, Simon
Re: [PATCH RFC u-boot-mvebu 00/59] arm: mvebu: Various fixes
On Tuesday 21 February 2023 15:06:16 Tony Dinh wrote: > Hi Pali, > > On Tue, Feb 21, 2023 at 12:22 PM Pali Rohár wrote: > > > > This patch series contains various improvements and fixes for existing > > logical errors. Boot phase was adjusted to match behavior of Armada 385 > > BootROM by inspecting and disassembling of BootROM binary dump itself. > > Important information are included in documentation patch for kwboot. > > Most of the changes are untested, hence this patch series is just RFC. > > So please test changes before applying, idealy on SPI, SATA and SD/MMC. > > Nevertheless all patches on github passed CI testing in this PR: > > https://github.com/u-boot/u-boot/pull/275 ... > I went to patchwork and downloaded the series. > https://patchwork.ozlabs.org/project/uboot/patch/20230221201925.9644-2-p...@kernel.org > > When I applied the patches set there were some rejections. > > # patch -p1 < > /usr/src/builds-u-boot-marvell/pali_patches/arm-mvebu-Various-fixes.patch > ... FAILED ... > > > I'm on the latest master branch (just did a git pull today). Could > some patches be out of order? > > Thanks, > Tony Well, that is because DENX mail server is broken and it crashed during processing antispam filter on my some of my patches. So some patches are missing in archive and then applying dependent patches failed. So ignore patchwork and email patches. Rather fetch changes from the mentioned github pull request https://github.com/u-boot/u-boot/pull/275 You can do it via git command (it fetch it to the new mvebu branch): git fetch https://github.com/u-boot/u-boot.git refs/pull/275/merge:mvebu
Re: [PATCH v1 1/1] input: button_kbd: make driver complementary to gpio buttons
Hi Svyatoslav, If there is no input maintainer, It should just get picked up by Tom at some point. Regards, Simon On Tue, 21 Feb 2023 at 12:51, Svyatoslav Ryhel wrote: > Thanks! Do I need someone else to be able to merge this or your review > is enough? > > Best regards, > Svyatoslav R. > > вт, 21 лют. 2023 р. о 21:37 Simon Glass пише: > > > > On Mon, 20 Feb 2023 at 10:41, Svyatoslav Ryhel > wrote: > > > > > > Remove need of dts binding for button keyboard since it reuses > > > gpio-keys binding. Select gpio-keys driver if button keyboard > > > is selected since button keyboard can not operate on its own. > > > > > > Tested-by: Svyatoslav Ryhel # HTC One X T30 > > > Signed-off-by: Svyatoslav Ryhel > > > --- > > > drivers/input/Kconfig | 2 +- > > > drivers/input/button_kbd.c | 10 -- > > > 2 files changed, 5 insertions(+), 7 deletions(-) > > > > Reviewed-by: Simon Glass >
Re: [PATCH v3 11/95] Correct SPL use of PHY_CADENCE_SIERRA
Hi Tom, On Tue, 21 Feb 2023 at 16:02, Tom Rini wrote: > > On Tue, Feb 21, 2023 at 12:35:41PM -0700, Simon Glass wrote: > > Hi Tom, > > > > On Tue, 14 Feb 2023 at 09:31, Tom Rini wrote: > > > > > > On Sun, Feb 12, 2023 at 04:15:14PM -0700, Simon Glass wrote: > > > > This converts 1 usage of this option to the non-SPL form, since there is > > > > no SPL_PHY_CADENCE_SIERRA defined in Kconfig > > > > > > > > Signed-off-by: Simon Glass > > > > --- > > > > > > > > (no changes since v1) > > > > > > > > drivers/phy/cadence/Makefile | 2 +- > > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > > > diff --git a/drivers/phy/cadence/Makefile b/drivers/phy/cadence/Makefile > > > > index af63b32d9f5..c247feb8262 100644 > > > > --- a/drivers/phy/cadence/Makefile > > > > +++ b/drivers/phy/cadence/Makefile > > > > @@ -1,2 +1,2 @@ > > > > -obj-$(CONFIG_$(SPL_)PHY_CADENCE_SIERRA) += phy-cadence-sierra.o > > > > +obj-$(CONFIG_PHY_CADENCE_SIERRA) += phy-cadence-sierra.o > > > > obj-$(CONFIG_$(SPL_)PHY_CADENCE_TORRENT) += phy-cadence-torrent.o > > > > > > This, and then PHY_CADENCE_TORRENT take this the wrong direction, both > > > symbols should be false for non-PPL builds. > > > > This one is odd, since the board defines SPL_PHY, presumably for a > > reason. It could always undefine that if needed. > > > > I'll add some more notes in v5. > > The platforms in question are fairly complex and I want to say it needs > a PHY for USB in SPL, but not a PHY for networking, in SPL. Ah that makes more sense. OK, will take yet another look. Regards, Simon
Re: [PATCH 9/9] Makefile: Show binman missing blob message
On Tue, Feb 21, 2023 at 12:41:52PM -0700, Simon Glass wrote: > Hi Jonas > > +Tom Rini > > On Sun, 19 Feb 2023 at 15:02, Jonas Karlman wrote: > > > > When binman is invoked during a build of U-Boot and an external blob is > > missing, the user is usually presented with a generic file not found in > > input path message. > > > > Invoke binman with --allow-missing so that binman can show relevant > > missing blob help messages. Build continue to fail with missing blobs > > unless BINMAN_ALLOW_MISSING=1 is used. > > > > This changes the following error message: > > > > binman: Filename 'atf-bl31' not found in input path (...) > > > > to the following: > > > > Image 'itb' is missing external blobs and is non-functional: atf-blob > > > > /binman/itb/fit/images/atf/atf-blob (bl31.bin): > > See the documentation for your board. You may need to build ARM Trusted > > Firmware and build with BL31=/path/to/bl31.bin > > > > Signed-off-by: Jonas Karlman > > --- > > Makefile | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/Makefile b/Makefile > > index 58f8c7a35335..c2860824f6f2 100644 > > --- a/Makefile > > +++ b/Makefile > > @@ -1326,7 +1326,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if > > $(BINMAN_DEBUG),-D) \ > > --toolpath $(objtree)/tools \ > > $(if $(BINMAN_VERBOSE),-v$(BINMAN_VERBOSE)) \ > > build -u -d u-boot.dtb -O . -m \ > > - $(if $(BINMAN_ALLOW_MISSING),--allow-missing > > --ignore-missing) \ > > + --allow-missing $(if > > $(BINMAN_ALLOW_MISSING),--ignore-missing) \ > > -I . -I $(srctree) -I $(srctree)/board/$(BOARDDIR) \ > > -I arch/$(ARCH)/dts -a of-list=$(CONFIG_OF_LIST) \ > > $(foreach f,$(BINMAN_INDIRS),-I $(f)) \ > > -- > > 2.39.2 > > > > I agree this is better, but we should see what Tom thinks. > > Reviewed-by: Simon Glass This sounds like a binman bug. We shouldn't need to say --allow-missing to then make use of the missing-msg node. -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/2] board: rock5b-rk3588: add memory gaps into kernel's DTB
> Date: Tue, 21 Feb 2023 10:35:18 +0200
> From: Eugen Hristev
>
> On 2/21/23 00:47, Mark Kettenis wrote:
> >> From: Eugen Hristev
> >> Date: Thu, 16 Feb 2023 15:29:05 +0200
> >>
> >> RK3588 has two memory gaps when using 16 GiB DRAM size:
> >> [0x3fc00 , 0x3fc50]
> >> and
> >> [0x3fff0 , 0x3]
> >>
> >> If the kernel is agnostic to these gaps, accessing the area causes
> >> a SError panic.
> >>
> >> Hence, add reserved memory areas in kernel's DTB before booting.
> >
> > I can confirm that using the full 16GB of memory on the rock5b causes
> > prolems for OpenBSD as well.
> >
> > Was wondering whether excluding these regions was better done by
> > adding reserved-memory nodes in the device tree though like what is
> > done in the meson-g12-common.dtsi file for example.
>
> But does it work fine with this patch ?
Yes, it does.
> >> Signed-off-by: Eugen Hristev
> >> ---
> >>
> >> Hi,
> >>
> >> These memory gaps are required because the kernel crashes with a SError if
> >> accessing that area.
> >> It appears the ATAGs provide DDR banks that do not include those specific
> >> two regions.
> >> To be able to boot the kernel, those areas have to be reserved.
> >> Maybe someone from Rockchip could have an explanation to this behavior?
> >> Otherwise we have to block them at this level.
> >> If those memory ranges are reserved for a dedicated purpose we can come up
> >> with a better solution, w.r.t. the purpose of the regions.
> >>
> >> Thanks !
> >> Eugen
> >>
> >> board/radxa/rock5b-rk3588/rock5b-rk3588.c | 35 +++
> >> configs/rock5b-rk3588_defconfig | 1 +
> >> 2 files changed, 36 insertions(+)
> >>
> >> diff --git a/board/radxa/rock5b-rk3588/rock5b-rk3588.c
> >> b/board/radxa/rock5b-rk3588/rock5b-rk3588.c
> >> index b5d74798f3b9..5c3b52b94898 100644
> >> --- a/board/radxa/rock5b-rk3588/rock5b-rk3588.c
> >> +++ b/board/radxa/rock5b-rk3588/rock5b-rk3588.c
> >> @@ -2,3 +2,38 @@
> >> /*
> >>* Copyright (c) 2023 Collabora Ltd.
> >>*/
> >> +
> >> +#include
> >> +#include
> >> +
> >> +#ifdef CONFIG_OF_BOARD_SETUP
> >> +int rock5b_add_reserved_memory_fdt_nodes(void *new_blob)
> >> +{
> >> + struct fdt_memory gap1 = {
> >> + .start = 0x3fc00,
> >> + .end = 0x3fc4f,
> >> + };
> >> + struct fdt_memory gap2 = {
> >> + .start = 0x3fff0,
> >> + .end = 0x3,
> >> + };
> >> + unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
> >> + unsigned int ret;
> >> +
> >> + /*
> >> + * Inject the reserved-memory nodes into the DTS
> >> + */
> >> + ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0,
> >> + NULL, flags);
> >> + if (ret)
> >> + return ret;
> >> +
> >> + return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0,
> >> +NULL, flags);
> >> +}
> >> +
> >> +int ft_board_setup(void *blob, struct bd_info *bd)
> >> +{
> >> + return rock5b_add_reserved_memory_fdt_nodes(blob);
> >> +}
> >> +#endif
> >> diff --git a/configs/rock5b-rk3588_defconfig
> >> b/configs/rock5b-rk3588_defconfig
> >> index 9b7db7de64be..f3026c7ea166 100644
> >> --- a/configs/rock5b-rk3588_defconfig
> >> +++ b/configs/rock5b-rk3588_defconfig
> >> @@ -26,6 +26,7 @@ CONFIG_FIT=y
> >> CONFIG_FIT_VERBOSE=y
> >> CONFIG_SPL_FIT_SIGNATURE=y
> >> CONFIG_SPL_LOAD_FIT=y
> >> +CONFIG_OF_BOARD_SETUP=y
> >> CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-rock-5b.dtb"
> >> # CONFIG_DISPLAY_CPUINFO is not set
> >> CONFIG_DISPLAY_BOARDINFO_LATE=y
> >> --
> >> 2.34.1
> >>
> >>
>
>
Re: [PATCH 2/2] clk: ast2600: Keep PLL power on
On Tue, 21 Feb 2023 at 13:01, Dylan Hung wrote: > > According to the PLL vendor, we should keep the PLL power on, so we > shouldn't toggle the power-down bit during PLL initialization. > > Signed-off-by: Dylan Hung Reviewed-by: Joel Stanley > --- > drivers/clk/aspeed/clk_ast2600.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/clk/aspeed/clk_ast2600.c > b/drivers/clk/aspeed/clk_ast2600.c > index 0df1dc3718d3..e5ada5b6d49c 100644 > --- a/drivers/clk/aspeed/clk_ast2600.c > +++ b/drivers/clk/aspeed/clk_ast2600.c > @@ -538,7 +538,7 @@ static uint32_t ast2600_configure_pll(struct ast2600_scu > *scu, > } > > p_cfg->reg.b.bypass = 0; > - p_cfg->reg.b.off = 1; > + p_cfg->reg.b.off = 0; > p_cfg->reg.b.reset = 1; > > reg = readl(addr); > @@ -549,7 +549,6 @@ static uint32_t ast2600_configure_pll(struct ast2600_scu > *scu, > /* write extend parameter */ > writel(p_cfg->ext_reg, addr_ext); > udelay(100); > - p_cfg->reg.b.off = 0; > p_cfg->reg.b.reset = 0; > reg &= ~GENMASK(25, 0); > reg |= p_cfg->reg.w; > -- > 2.25.1 >
Re: [PATCH 1/2] ram: ast2600: Keep MPLL power on
On Tue, 21 Feb 2023 at 13:01, Dylan Hung wrote: > > According to the PLL vendor, we should keep the PLL power on, so we > shouldn't toggle the power-down bit during PLL initialization. > > Signed-off-by: Dylan Hung Reviewed-by: Joel Stanley > --- > drivers/ram/aspeed/sdram_ast2600.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/ram/aspeed/sdram_ast2600.c > b/drivers/ram/aspeed/sdram_ast2600.c > index 18767554123f..d463933363ee 100644 > --- a/drivers/ram/aspeed/sdram_ast2600.c > +++ b/drivers/ram/aspeed/sdram_ast2600.c > @@ -1089,13 +1089,13 @@ static int ast2600_sdrammc_probe(struct udevice *dev) > } > > reg = readl(&priv->scu->mpll); > - reg &= ~(SCU_PLL_BYPASS | SCU_PLL_DIV_MASK | > + reg &= ~(SCU_PLL_BYPASS | SCU_PLL_OFF | SCU_PLL_DIV_MASK | > SCU_PLL_DENUM_MASK | SCU_PLL_NUM_MASK); > - reg |= (SCU_PLL_RST | SCU_PLL_OFF | SCU_MPLL_FREQ_CFG); > + reg |= (SCU_PLL_RST | SCU_MPLL_FREQ_CFG); > writel(reg, &priv->scu->mpll); > writel(SCU_MPLL_EXT_CFG, &priv->scu->mpll_ext); > udelay(100); > - reg &= ~(SCU_PLL_RST | SCU_PLL_OFF); > + reg &= ~SCU_PLL_RST; > writel(reg, &priv->scu->mpll); > > while ((readl(&priv->scu->mpll_ext) & BIT(31)) == 0) > -- > 2.25.1 >
Re: [PATCH RFC u-boot-mvebu 00/59] arm: mvebu: Various fixes
Hi Pali, On Tue, Feb 21, 2023 at 12:22 PM Pali Rohár wrote: > > This patch series contains various improvements and fixes for existing > logical errors. Boot phase was adjusted to match behavior of Armada 385 > BootROM by inspecting and disassembling of BootROM binary dump itself. > Important information are included in documentation patch for kwboot. > Most of the changes are untested, hence this patch series is just RFC. > So please test changes before applying, idealy on SPI, SATA and SD/MMC. > Nevertheless all patches on github passed CI testing in this PR: > https://github.com/u-boot/u-boot/pull/275 > > Pali Rohár (59): > tools: kwbimage: Fix generating, verifying and extracting SDIO > kwbimage > tools: kwboot: Fix parsing SDIO kwbimage > arm: mvebu: spl: Fix parsing SDIO kwbimage > cmd: mvebu/bubt: Fix parsing SDIO kwbimage > tools: kwbimage: Fix generating, verifying and extracting SATA > kwbimage > tools: kwboot: Fix parsing SATA kwbimage > arm: mvebu: spl: Fix parsing SATA kwbimage > cmd: mvebu/bubt: Fix parsing SATA kwbimage > arm: mvebu: spl: Remove checks for BOOT_DEVICE_MMC2 and > BOOT_DEVICE_MMC2_2 > arm: mvebu: spl: Load proper U-Boot from selected eMMC boot partition > spl: mmc: Allow to disable SYS_MMCSD_FS_BOOT_PARTITION > arm: mvebu: spl: Fix support for loading U-Boot proper from SD card > tools: kwboot: Add more documentation references > tools: kwboot: Add image type documentation > tools: kwboot: Fix parsing UART image without data checksum > tools: kwboot: Validate optional kwbimage v1 headers > tools: kwboot: Add check that kwbimage contains DDR init code > tools: kwboot: Fix patching of SPI/NOR XIP images > tools: kwboot: Show image type and error parsing reasons > cmd: mvebu/bubt: Add support for selecting eMMC HW partition > cmd: mvebu/bubt: Add support for writing image to SATA disk > cmd: mvebu/bubt: Add support for reading image from the SATA disk > partition > cmd: mvebu/bubt: Rename variable image_size to hdr_size > cmd: mvebu/bubt: Mark all local symbols as static > cmd: mvebu/bubt: Do not modify image in A8K check_image_header() > cmd: mvebu/bubt: Check also A8K boot image checksum > cmd: mvebu/bubt: Set correct default image name for 32-bit Armada SoCs > cmd: mvebu/bubt: Better guess default MVEBU_*_BOOT option > cmd: mvebu/bubt: Fix warnings: unused variable 'secure_mode' and > 'fuse_read_u64' defined but not used > cmd: mvebu/bubt: Enable command by default > tools: kwbimage: Fix dumping register set / DATA commands > tools: kwbimage: Fix endianity when dumping NAND_PAGE_SIZE > tools: kwbimage: Fix dumping NAND_BADBLK_LOCATION > tools: kwbimage: Fix dumping NAND_BLKSZ > tools: kwbimage: Fix generating of kwbimage v0 header checksum > tools: kwbimage: Fix endianity when printing kwbimage header > tools: kwbimage: Reject mkimage -F option > tools: kwbimage: Add support for dumping NAND_BLKSZ for v0 images > tools: kwbimage: Print binary image offset as size > tools: kwbimage: Print image data offset when printing kwbimage header > tools: kwbimage: Simplify add_secure_header_v1() > tools: kwbimage: Rename imagesz to dataoff > tools: kwbimage: Fix generating secure boot data image signature > tools: kwbimage: Fix invalid secure boot header signature > tools: mkimage: Do not fill legacy_img_hdr for non-legacy XIP images > tools: kwbimage: Add support for XIP SPI/NOR images > tools: mkimage: Print human readable error when -d is not specified > tools: mkimage: Do not try to open datafile when it is skipped > tools: kwbimage: Add support for creating an image with no data > arm: mvebu: Add support for generating NAND kwbimage > arm: mvebu: Add support for generating PEX kwbimage > arm: mvebu: Fix description of MVEBU_SPL_BOOT_DEVICE_(SPI|MMC) options > arm: mvebu: db-88f6820-amc: Add defconfig for NAND booting > arm: mvebu: clearfog: Add defconfig for SATA booting > arm: mvebu: Remove A39x relicts > arm: mvebu: Fix comment about CPU_ATTR_BOOTROM mapping > arm: mvebu: Define env_sf_get_env_addr() also for Proper U-Boot > arm: mvebu: Define SPL memory maps > doc/kwboot.1: Update example description > > arch/arm/mach-mvebu/Kconfig | 23 +- > arch/arm/mach-mvebu/Makefile | 13 + > arch/arm/mach-mvebu/cpu.c | 11 +- > arch/arm/mach-mvebu/include/mach/cpu.h| 21 ++ > arch/arm/mach-mvebu/kwbimage.cfg.in | 5 + > .../serdes/a38x/high_speed_env_spec.c | 4 +- > .../serdes/a38x/high_speed_env_spec.h | 4 +- > arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c | 14 +- > arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h | 30 -- > arch/arm/mach-mvebu/spl.c | 84 +++-- > cmd/mvebu/Kconfig | 18 ++ > cmd/mvebu/bubt.c | 253 --- > common/spl/Kconfig
Re: [PATCH v3 11/95] Correct SPL use of PHY_CADENCE_SIERRA
On Tue, Feb 21, 2023 at 12:35:41PM -0700, Simon Glass wrote: > Hi Tom, > > On Tue, 14 Feb 2023 at 09:31, Tom Rini wrote: > > > > On Sun, Feb 12, 2023 at 04:15:14PM -0700, Simon Glass wrote: > > > This converts 1 usage of this option to the non-SPL form, since there is > > > no SPL_PHY_CADENCE_SIERRA defined in Kconfig > > > > > > Signed-off-by: Simon Glass > > > --- > > > > > > (no changes since v1) > > > > > > drivers/phy/cadence/Makefile | 2 +- > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > diff --git a/drivers/phy/cadence/Makefile b/drivers/phy/cadence/Makefile > > > index af63b32d9f5..c247feb8262 100644 > > > --- a/drivers/phy/cadence/Makefile > > > +++ b/drivers/phy/cadence/Makefile > > > @@ -1,2 +1,2 @@ > > > -obj-$(CONFIG_$(SPL_)PHY_CADENCE_SIERRA) += phy-cadence-sierra.o > > > +obj-$(CONFIG_PHY_CADENCE_SIERRA) += phy-cadence-sierra.o > > > obj-$(CONFIG_$(SPL_)PHY_CADENCE_TORRENT) += phy-cadence-torrent.o > > > > This, and then PHY_CADENCE_TORRENT take this the wrong direction, both > > symbols should be false for non-PPL builds. > > This one is odd, since the board defines SPL_PHY, presumably for a > reason. It could always undefine that if needed. > > I'll add some more notes in v5. The platforms in question are fairly complex and I want to say it needs a PHY for USB in SPL, but not a PHY for networking, in SPL. -- Tom signature.asc Description: PGP signature
[PATCH RFC u-boot-mvebu 46/59] tools: kwbimage: Add support for XIP SPI/NOR images
Marvell BootROM can execute SPI images directly from NOR (either SPI/serial
or parallel) without copying them to DDR RAM. This is know at XIP - execute
in place. To achieve that, destination address in kwbimage must be set to
0x and execute address to the offset in bytes from the beginning of
NOR memory.
Kirkwood and Dove which use kwbimage v0 format and have SPI address space
mapped to physical memory at 0xE800-0xEFFF by BootROM.
Armada SoCs use kwbimage v1 format and have SPI address space mapped to
physical memory at 0xD400-0xD7FF and Device bus address space (used
for parallel NOR) at 0xD800-0xDFFF.
Add support for generating XIP kwbimages by mkimage -x flag and mark xflag
as valid option in kwbimage.c.
Signed-off-by: Pali Rohár
---
tools/kwbimage.c | 96
1 file changed, 89 insertions(+), 7 deletions(-)
diff --git a/tools/kwbimage.c b/tools/kwbimage.c
index da539541742d..7ebb625d03b9 100644
--- a/tools/kwbimage.c
+++ b/tools/kwbimage.c
@@ -927,6 +927,71 @@ done:
return ret;
}
+static int image_fill_xip_header(void *image, struct image_tool_params *params)
+{
+ struct main_hdr_v1 *main_hdr = image; /* kwbimage v0 and v1 have same
XIP members */
+ int version = kwbimage_version(image);
+ uint32_t srcaddr = le32_to_cpu(main_hdr->srcaddr);
+ uint32_t startaddr = 0;
+
+ if (main_hdr->blockid != IBR_HDR_SPI_ID) {
+ fprintf(stderr, "XIP is supported only for SPI images\n");
+ return 0;
+ }
+
+ if (version == 0 &&
+ params->addr >= 0xE800 && params->addr < 0xEFFF &&
+ params->ep >= 0xE800 && params->ep < 0xEFFF) {
+ /* Load and Execute address is in SPI address space (kwbimage
v0) */
+ startaddr = 0xE800;
+ } else if (version != 0 &&
+ params->addr >= 0xD400 && params->addr < 0xD7FF &&
+ params->ep >= 0xD400 && params->ep < 0xD7FF) {
+ /* Load and Execute address is in SPI address space (kwbimage
v1) */
+ startaddr = 0xD400;
+ } else if (version != 0 &&
+ params->addr >= 0xD800 && params->addr < 0xDFFF &&
+ params->ep >= 0xD800 && params->ep < 0xDFFF) {
+ /* Load and Execute address is in Device bus space (kwbimage
v1) */
+ startaddr = 0xD800;
+ } else if (params->addr != 0x0) {
+ /* Load address is non-zero */
+ if (version == 0)
+ fprintf(stderr, "XIP Load Address or XIP Entry Point is
not in SPI address space\n");
+ else
+ fprintf(stderr, "XIP Load Address or XIP Entry Point is
not in SPI nor in Device bus address space\n");
+ return 0;
+ }
+
+ /*
+* For XIP destaddr must be set to 0x and
+* execaddr relative to the start of XIP memory address space.
+*/
+ main_hdr->destaddr = cpu_to_le32(0x);
+
+ if (startaddr == 0) {
+ /*
+* mkimage's --load-address 0x0 means that binary is Position
+* Independent and in this case mkimage's --entry-point address
+* is relative offset from beginning of the data part of image.
+*/
+ main_hdr->execaddr = cpu_to_le32(srcaddr + params->ep);
+ } else {
+ /* The lowest possible load address is after the header at
srcaddr. */
+ if (params->addr - startaddr < srcaddr) {
+ fprintf(stderr,
+ "Invalid XIP Load Address 0x%08x.\n"
+ "The lowest address for this configuration is
0x%08x.\n",
+ params->addr, (unsigned)(startaddr + srcaddr));
+ return 0;
+ }
+ main_hdr->srcaddr = cpu_to_le32(params->addr - startaddr);
+ main_hdr->execaddr = cpu_to_le32(params->ep - startaddr);
+ }
+
+ return 1;
+}
+
static size_t image_headersz_align(size_t headersz, uint8_t blockid)
{
/*
@@ -1022,6 +1087,14 @@ static void *image_create_v0(size_t *dataoff, struct
image_tool_params *params,
if (main_hdr->blockid == IBR_HDR_PEX_ID)
main_hdr->srcaddr = cpu_to_le32(0x);
+ if (params->xflag) {
+ if (!image_fill_xip_header(main_hdr, params)) {
+ free(image);
+ return NULL;
+ }
+ *dataoff = le32_to_cpu(main_hdr->srcaddr);
+ }
+
/* Generate the ext header */
if (has_ext) {
struct ext_hdr_v0 *ext_hdr;
@@ -1461,6 +1534,14 @@ static void *image_create_v1(size_t *dataoff, struct
image_tool_params *params,
if (main_hdr->blockid == IBR_HD
[PATCH RFC u-boot-mvebu 35/59] tools: kwbimage: Fix generating of kwbimage v0 header checksum
Checksum for v0 image must be generated after filling all fields in the
main header. Otherwise it would be invalid.
Exactly same problem for v1 images was already fixed in the past in commit
9203c73895ab ("tools: kwbimage: Fix checksum calculation for v1 images").
Fixes: 5c61710c9880 ("tools: kwbimage: Properly set srcaddr in kwbimage v0")
Signed-off-by: Pali Rohár
---
tools/kwbimage.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/tools/kwbimage.c b/tools/kwbimage.c
index b6deb978f611..1128c934dda9 100644
--- a/tools/kwbimage.c
+++ b/tools/kwbimage.c
@@ -1009,8 +1009,6 @@ static void *image_create_v0(size_t *imagesz, struct
image_tool_params *params,
e = image_find_option(IMAGE_CFG_NAND_BADBLK_LOCATION);
if (e)
main_hdr->nandbadblklocation = e->nandbadblklocation;
- main_hdr->checksum = image_checksum8(image,
-sizeof(struct main_hdr_v0));
/*
* For SATA srcaddr is specified in number of sectors.
@@ -1049,6 +1047,9 @@ static void *image_create_v0(size_t *imagesz, struct
image_tool_params *params,
sizeof(struct ext_hdr_v0));
}
+ main_hdr->checksum = image_checksum8(image,
+sizeof(struct main_hdr_v0));
+
*imagesz = headersz;
return image;
}
--
2.20.1
[PATCH RFC u-boot-mvebu 33/59] tools: kwbimage: Fix dumping NAND_BADBLK_LOCATION
Value 0x0 for NAND_BADBLK_LOCATION/nandbadblklocation means that BBI is on
the first or second page and value 0x1 means that BBI is on the last page.
This indicates also NAND Flash Technology, value 0x0 is SLC NAND and value
0x1 is MLC NAND.
Therefore we need to dump NAND_BADBLK_LOCATION also when it is zero.
Note that in v0 images, nandbadblklocation field overlaps with ddrinitdelay
field in one union. ddrinitdelay is used in Kirkwood and nandbadblklocation
is used in Dove. For Dove images is_v0_ext should be set, so use it to
distinguish if nandbadblklocation is available or not. In v1 images there
is always nandbadblklocation field.
Fixes: 1a8e6b63e24f ("tools: kwbimage: Dump kwbimage config file on '-p -1'
option")
Signed-off-by: Pali Rohár
---
tools/kwbimage.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/kwbimage.c b/tools/kwbimage.c
index a6f6f1578c79..4e9ba5ddfae2 100644
--- a/tools/kwbimage.c
+++ b/tools/kwbimage.c
@@ -2187,7 +2187,7 @@ static int kwbimage_generate_config(void *ptr, struct
image_tool_params *params)
if (version != 0 && mhdr->blockid == IBR_HDR_NAND_ID)
fprintf(f, "NAND_BLKSZ 0x%x\n", (unsigned)mhdr->nandblocksize);
- if (mhdr->blockid == IBR_HDR_NAND_ID && (mhdr->nandbadblklocation != 0
|| is_v0_ext))
+ if (mhdr->blockid == IBR_HDR_NAND_ID && (version != 0 || is_v0_ext))
fprintf(f, "NAND_BADBLK_LOCATION 0x%x\n",
(unsigned)mhdr->nandbadblklocation);
if (version == 0 && mhdr->blockid == IBR_HDR_SATA_ID)
--
2.20.1
[PATCH RFC u-boot-mvebu 27/59] cmd: mvebu/bubt: Set correct default image name for 32-bit Armada SoCs
32-bit Armada SoCs uses u-boot binary packed in kwbimage format. Name of the image is in CONFIG_BUILD_TARGET option. So use it as a default option in Kconfig. Signed-off-by: Pali Rohár --- cmd/mvebu/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/cmd/mvebu/Kconfig b/cmd/mvebu/Kconfig index 8f30a0c22be3..9f6ad2d1dd16 100644 --- a/cmd/mvebu/Kconfig +++ b/cmd/mvebu/Kconfig @@ -60,6 +60,7 @@ endchoice config MVEBU_UBOOT_DFLT_NAME string "Default image name for bubt command" + default BUILD_TARGET if ARMADA_32BIT && BUILD_TARGET != "" default "flash-image.bin" help This option should contain a default file name to be used with -- 2.20.1
[PATCH RFC u-boot-mvebu 21/59] cmd: mvebu/bubt: Add support for writing image to SATA disk
All 32-bit Armada SoCs and also 64-bit Armada 3720 SoC can load and boot
firmware from SATA disk. This adds support for updating firmware binary for
these SoCs. On 32-bit Armada SoC is firmware stored at sector 1 and on
Armada 3720 is stored at MBR partition 0x4d or GPT partition with type GUID
6828311A-BA55-42A4-BCDE-A89BB5EDECAE (Marvell Armada 3700 Boot partition).
Signed-off-by: Pali Rohár
---
cmd/mvebu/Kconfig | 12 +
cmd/mvebu/bubt.c | 109 -
doc/mvebu/cmd/bubt.txt | 2 +-
3 files changed, 121 insertions(+), 2 deletions(-)
diff --git a/cmd/mvebu/Kconfig b/cmd/mvebu/Kconfig
index 9ec3aa983a51..8f30a0c22be3 100644
--- a/cmd/mvebu/Kconfig
+++ b/cmd/mvebu/Kconfig
@@ -5,6 +5,9 @@ config CMD_MVEBU_BUBT
bool "bubt"
select SHA256 if ARMADA_3700
select SHA512 if ARMADA_3700
+ select DOS_PARTITION if ARMADA_3700
+ select EFI_PARTITION if ARMADA_3700
+ select PARTITION_TYPE_GUID if ARMADA_3700
select MVEBU_EFUSE if ARMADA_38X || ARMADA_3700
help
bubt - Burn a u-boot image to flash
@@ -44,6 +47,15 @@ config MVEBU_MMC_BOOT
For details about bubt command please see the documentation
in doc/mvebu/cmd/bubt.txt
+config MVEBU_SATA_BOOT
+ bool "SATA flash boot"
+ depends on SCSI
+ help
+ Enable boot from SATA disk.
+ Allow usage of SATA disk as a target for "bubt" command
+ For details about bubt command please see the documentation
+ in doc/mvebu/cmd/bubt.txt
+
endchoice
config MVEBU_UBOOT_DFLT_NAME
diff --git a/cmd/mvebu/bubt.c b/cmd/mvebu/bubt.c
index 4bad9a69527c..1d51fde579b5 100644
--- a/cmd/mvebu/bubt.c
+++ b/cmd/mvebu/bubt.c
@@ -19,6 +19,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -333,6 +334,108 @@ static int is_mmc_active(void)
}
#endif /* CONFIG_DM_MMC */
+/
+ * SATA services
+ /
+#if defined(CONFIG_SCSI) && defined(CONFIG_BLK)
+static int sata_burn_image(size_t image_size)
+{
+#if defined(CONFIG_ARMADA_3700) || defined(CONFIG_ARMADA_32BIT)
+ lbaint_tstart_lba;
+ lbaint_tblk_count;
+ ulong blk_written;
+ struct blk_desc *blk_desc;
+#ifdef CONFIG_ARMADA_3700
+ struct disk_partition info;
+ int part;
+#endif
+
+ scsi_scan(false);
+
+ blk_desc = blk_get_devnum_by_uclass_id(UCLASS_SCSI, 0);
+ if (!blk_desc)
+ return -ENODEV;
+
+#ifdef CONFIG_ARMADA_3700
+ /*
+* 64-bit Armada 3700 BootROM loads SATA firmware from
+* GPT 'Marvell Armada 3700 Boot partition' or from
+* MBR 'M' (0x4d) partition.
+*/
+ switch (blk_desc->part_type) {
+ case PART_TYPE_DOS:
+ for (part = 1; part <= 4; part++) {
+ info.sys_ind = 0;
+ if (part_get_info(blk_desc, part, &info))
+ continue;
+ if (info.sys_ind == 'M')
+ break;
+ }
+ if (part > 4) {
+ printf("Error - cannot find MBR 'M' (0x4d) partition on
SATA disk\n");
+ return -ENODEV;
+ }
+ start_lba = info.start;
+ break;
+ case PART_TYPE_EFI:
+ for (part = 1; part <= 64; part++) {
+ info.type_guid[0] = 0;
+ if (part_get_info(blk_desc, part, &info))
+ continue;
+ /* Check for GPT type GUID of 'Marvell Armada 3700 Boot
partition' */
+ if (strcmp(info.type_guid,
"6828311A-BA55-42A4-BCDE-A89BB5EDECAE") == 0)
+ break;
+ }
+ if (part > 64) {
+ printf("Error - cannot find GPT 'Marvell Armada 3700
Boot partition' on SATA disk\n");
+ return -ENODEV;
+ }
+ start_lba = info.start;
+ break;
+ default:
+ printf("Error - no partitions on SATA disk\n");
+ return -ENODEV;
+ }
+#else
+ /* 32-bit Armada BootROM loads SATA firmware from the sector 1. */
+ start_lba = 1;
+#endif
+
+ blk_count = image_size / blk_desc->blksz;
+ if (image_size % blk_desc->blksz)
+ blk_count += 1;
+
+ blk_written = blk_dwrite(blk_desc, start_lba, blk_count,
+(void *)get_load_addr());
+
+ if (blk_written != blk_count) {
+ printf("Error - written %#lx blocks\n", blk_written);
+ return -ENOSPC;
+ }
+
+ printf("Done!\n");
+ return 0;
+#else
+ return -ENODEV;
+#endif
+}
+
+static int is_sata_acti
[PATCH RFC u-boot-mvebu 11/59] spl: mmc: Allow to disable SYS_MMCSD_FS_BOOT_PARTITION
On some platforms is SYS_MMCSD_FS_BOOT_PARTITION unsupported. So allow to
completely disable MMC FS Boot support via new option SYS_MMCSD_FS_BOOT.
By default MMC FS Boot support is enabled (like it was before) except for
ARCH_MVEBU where MMC FS Boot supported is unsupported due to Marvell
BootROM limitations.
Signed-off-by: Pali Rohár
---
common/spl/Kconfig | 9 +
common/spl/spl_mmc.c | 12 +++-
2 files changed, 12 insertions(+), 9 deletions(-)
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index d774c930a80b..fdee0bd06936 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -815,8 +815,17 @@ config SPL_MMC
this option to build the drivers in drivers/mmc as part of an SPL
build.
+config SYS_MMCSD_FS_BOOT
+ bool "MMC FS Boot mode"
+ depends on SPL_MMC
+ default y if !ARCH_MVEBU
+ help
+ Enable MMC FS Boot mode. Partition is selected by option
+ SYS_MMCSD_FS_BOOT_PARTITION.
+
config SYS_MMCSD_FS_BOOT_PARTITION
int "MMC Boot Partition"
+ depends on SYS_MMCSD_FS_BOOT
default 1
help
Partition on the MMC to load U-Boot from when the MMC is being
diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index e4135b204875..bd5e6adf1ea6 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -272,7 +272,7 @@ int spl_start_uboot(void)
}
#endif
-#ifdef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
+#ifdef CONFIG_SYS_MMCSD_FS_BOOT
static int spl_mmc_do_fs_boot(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
struct mmc *mmc,
@@ -341,14 +341,6 @@ static int spl_mmc_do_fs_boot(struct spl_image_info
*spl_image,
return err;
}
-#else
-static int spl_mmc_do_fs_boot(struct spl_image_info *spl_image,
- struct spl_boot_device *bootdev,
- struct mmc *mmc,
- const char *filename)
-{
- return -ENOSYS;
-}
#endif
u32 __weak spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
@@ -481,6 +473,7 @@ int spl_mmc_load(struct spl_image_info *spl_image,
return err;
#endif
/* If RAW mode fails, try FS mode. */
+#ifdef CONFIG_SYS_MMCSD_FS_BOOT
case MMCSD_MODE_FS:
debug("spl: mmc boot mode: fs\n");
@@ -489,6 +482,7 @@ int spl_mmc_load(struct spl_image_info *spl_image,
return err;
break;
+#endif
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
default:
puts("spl: mmc: wrong boot mode\n");
--
2.20.1
[PATCH RFC u-boot-mvebu 05/59] tools: kwbimage: Fix generating, verifying and extracting SATA kwbimage
Despite the official specification, Marvell BootROM does not interpret
srcaddr from SATA image as number of sectors the beginning of the hard
drive, but as number of sectors relative to the main header.
The main header is stored at absolute sector number 1. So do not add or
subtract it when calculating with relative offsets to the main header.
Fixes: 501a54a29cc2 ("tools: kwbimage: Fix generation of SATA, SDIO and PCIe
images")
Fixes: 5c61710c9880 ("tools: kwbimage: Properly set srcaddr in kwbimage v0")
Fixes: e0c243c398a7 ("tools: kwbimage: Validate data checksum of v1 images")
Fixes: aa6943ca3122 ("kwbimage: Add support for extracting images via dumpimage
tool")
Signed-off-by: Pali Rohár
---
tools/kwbimage.c | 24 +++-
1 file changed, 7 insertions(+), 17 deletions(-)
diff --git a/tools/kwbimage.c b/tools/kwbimage.c
index 09d52d47652f..67b45503e466 100644
--- a/tools/kwbimage.c
+++ b/tools/kwbimage.c
@@ -1013,13 +1013,12 @@ static void *image_create_v0(size_t *imagesz, struct
image_tool_params *params,
sizeof(struct main_hdr_v0));
/*
-* For SATA srcaddr is specified in number of sectors starting from
-* sector 0. The main header is stored at sector number 1.
+* For SATA srcaddr is specified in number of sectors.
* This expects the sector size to be 512 bytes.
* Header size is already aligned.
*/
if (main_hdr->blockid == IBR_HDR_SATA_ID)
- main_hdr->srcaddr = cpu_to_le32(headersz / 512 + 1);
+ main_hdr->srcaddr = cpu_to_le32(headersz / 512);
/* For PCIe srcaddr is not used and must be set to 0x. */
if (main_hdr->blockid == IBR_HDR_PEX_ID)
@@ -1461,13 +1460,12 @@ static void *image_create_v1(size_t *imagesz, struct
image_tool_params *params,
main_hdr->flags = e->debug ? 0x1 : 0;
/*
-* For SATA srcaddr is specified in number of sectors starting from
-* sector 0. The main header is stored at sector number 1.
+* For SATA srcaddr is specified in number of sectors.
* This expects the sector size to be 512 bytes.
* Header size is already aligned.
*/
if (main_hdr->blockid == IBR_HDR_SATA_ID)
- main_hdr->srcaddr = cpu_to_le32(headersz / 512 + 1);
+ main_hdr->srcaddr = cpu_to_le32(headersz / 512);
/* For PCIe srcaddr is not used and must be set to 0x. */
if (main_hdr->blockid == IBR_HDR_PEX_ID)
@@ -2010,16 +2008,10 @@ static int kwbimage_verify_header(unsigned char *ptr,
int image_size,
/*
* For SATA srcaddr is specified in number of sectors.
-* The main header is must be stored at sector number 1.
-* This expects that sector size is 512 bytes and recalculates
-* data offset to bytes relative to the main header.
+* This expects that sector size is 512 bytes.
*/
- if (blockid == IBR_HDR_SATA_ID) {
- if (offset < 1)
- return -FDT_ERR_BADSTRUCTURE;
- offset -= 1;
+ if (blockid == IBR_HDR_SATA_ID)
offset *= 512;
- }
/*
* For PCIe srcaddr is always set to 0x.
@@ -2377,10 +2369,8 @@ static int kwbimage_extract_subimage(void *ptr, struct
image_tool_params *params
/* Extract data image when -p is not specified or when '-p 0'
is specified */
offset = le32_to_cpu(mhdr->srcaddr);
- if (mhdr->blockid == IBR_HDR_SATA_ID) {
- offset -= 1;
+ if (mhdr->blockid == IBR_HDR_SATA_ID)
offset *= 512;
- }
if (mhdr->blockid == IBR_HDR_PEX_ID && offset == 0x)
offset = header_size;
--
2.20.1
Re: [PATCH v5 0/6] tpm: Support boot measurements
On 2/6/23 06:20, Ilias Apalodimas wrote: Thanks Eddie, I quickly tested this but the EFI subsystem fails to initialize the TCG protocol properly now. Unfortunately I am on a business trip and I won't be able to take a look into why till next week Hi Ilias, I haven't had the opportunity to test this, have you? Thanks, Eddie Cheers /Ilias On Thu, Feb 02, 2023 at 11:05:25AM -0600, Eddie James wrote: This series adds support for measuring the boot images more generically than the existing EFI support. Several EFI functions have been moved to the TPM layer. The series includes optional measurement from the bootm command. A new test case has been added for the bootm measurement to test the new path, and the sandbox TPM2 driver has been updated to support this use case. This series is based on Ilias' auto-startup series: https://lore.kernel.org/u-boot/20230126081844.591148-1-ilias.apalodi...@linaro.org/ Changes since v4: - Remove tcg2_measure_event function and check for NULL data in tcg2_measure_data - Use tpm_auto_startup - Fix efi_tcg2.c compilation for removing tcg2_pcr_read function - Change PCR indexes for initrd and dtb - Drop u8 casting in measurement test - Use bullets in documentation Changes since v3: - Reordered headers - Refactored more of EFI code into common code Removed digest_info structure and instead used the common alg_to_mask and alg_to_len Improved event log parsing in common code to get it equivalent to EFI Common code now extends PCR if previous bootloader stage couldn't No need to allocate memory in the common code, so EFI copies the discovered buffer like it did before Rename efi measure_event function Changes since v2: - Add documentation. - Changed reserved memory address to the top of the RAM for sandbox dts. - Add measure state to booti and bootz. - Skip measurement for EFI images that should be measured Changes since v1: - Refactor TPM layer functions to allow EFI system to use them, and remove duplicate EFI functions. - Add test case - Drop #ifdefs for bootm - Add devicetree measurement config option - Update sandbox TPM driver Eddie James (6): tpm: Fix spelling for tpmu_ha union tpm: Support boot measurements bootm: Support boot measurement tpm: sandbox: Update for needed TPM2 capabilities test: Add sandbox TPM boot measurement doc: Add measured boot documentation arch/sandbox/dts/sandbox.dtsi | 14 + arch/sandbox/dts/test.dts | 13 + boot/Kconfig | 23 + boot/bootm.c | 70 +++ cmd/booti.c|1 + cmd/bootm.c|2 + cmd/bootz.c|1 + configs/sandbox_defconfig |1 + doc/usage/index.rst|1 + doc/usage/measured_boot.rst| 23 + drivers/tpm/tpm2_tis_sandbox.c | 100 +++- include/bootm.h|2 + include/efi_tcg2.h | 44 -- include/image.h|1 + include/test/suites.h |1 + include/tpm-v2.h | 246 +++- lib/efi_loader/efi_tcg2.c | 1010 +++- lib/tpm-v2.c | 771 test/boot/Makefile |1 + test/boot/measurement.c| 66 +++ test/cmd_ut.c |2 + 21 files changed, 1383 insertions(+), 1010 deletions(-) create mode 100644 doc/usage/measured_boot.rst create mode 100644 test/boot/measurement.c -- 2.31.1
[PATCH RFC u-boot-mvebu 42/59] tools: kwbimage: Rename imagesz to dataoff
Variable imagesz in functions image_create_v0(), image_create_v1() and
kwbimage_set_header() stores offset to data from the beginning of the main
header. So it is not image size.
Signed-off-by: Pali Rohár
---
tools/kwbimage.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/tools/kwbimage.c b/tools/kwbimage.c
index 857af6a438a4..b32f845b7e2d 100644
--- a/tools/kwbimage.c
+++ b/tools/kwbimage.c
@@ -962,7 +962,7 @@ static size_t image_headersz_v0(int *hasext)
return image_headersz_align(headersz, image_get_bootfrom());
}
-static void *image_create_v0(size_t *imagesz, struct image_tool_params *params,
+static void *image_create_v0(size_t *dataoff, struct image_tool_params *params,
int payloadsz)
{
struct image_cfg_element *e;
@@ -1050,7 +1050,7 @@ static void *image_create_v0(size_t *imagesz, struct
image_tool_params *params,
main_hdr->checksum = image_checksum8(image,
sizeof(struct main_hdr_v0));
- *imagesz = headersz;
+ *dataoff = headersz;
return image;
}
@@ -1385,7 +1385,7 @@ static void finish_register_set_header_v1(uint8_t **cur,
uint8_t **next_ext,
*datai = 0;
}
-static void *image_create_v1(size_t *imagesz, struct image_tool_params *params,
+static void *image_create_v1(size_t *dataoff, struct image_tool_params *params,
uint8_t *ptr, int payloadsz)
{
struct image_cfg_element *e;
@@ -1532,7 +1532,7 @@ static void *image_create_v1(size_t *imagesz, struct
image_tool_params *params,
image, headersz, secure_hdr))
return NULL;
- *imagesz = headersz;
+ *dataoff = headersz;
/* Fill the real header size without padding into the main header */
headersz = sizeof(*main_hdr);
@@ -1811,7 +1811,7 @@ static void kwbimage_set_header(void *ptr, struct stat
*sbuf, int ifd,
FILE *fcfg;
void *image = NULL;
int version;
- size_t headersz = 0;
+ size_t dataoff = 0;
size_t datasz;
uint32_t checksum;
struct stat s;
@@ -1862,11 +1862,11 @@ static void kwbimage_set_header(void *ptr, struct stat
*sbuf, int ifd,
*/
case -1:
case 0:
- image = image_create_v0(&headersz, params, datasz + 4);
+ image = image_create_v0(&dataoff, params, datasz + 4);
break;
case 1:
- image = image_create_v1(&headersz, params, ptr, datasz + 4);
+ image = image_create_v1(&dataoff, params, ptr, datasz + 4);
break;
default:
@@ -1884,12 +1884,12 @@ static void kwbimage_set_header(void *ptr, struct stat
*sbuf, int ifd,
free(image_cfg);
/* Build and add image data checksum */
- checksum = cpu_to_le32(image_checksum32((uint8_t *)ptr + headersz,
+ checksum = cpu_to_le32(image_checksum32((uint8_t *)ptr + dataoff,
datasz));
- memcpy((uint8_t *)ptr + headersz + datasz, &checksum, sizeof(uint32_t));
+ memcpy((uint8_t *)ptr + dataoff + datasz, &checksum, sizeof(uint32_t));
/* Finally copy the header into the image area */
- memcpy(ptr, image, headersz);
+ memcpy(ptr, image, dataoff);
free(image);
}
--
2.20.1
[PATCH RFC u-boot-mvebu 37/59] tools: kwbimage: Reject mkimage -F option
mkimage -F option (re-sign existing FIT image) signaled by fflag is not supported by kwbimage. So mark its usage as invalid parameter. Signed-off-by: Pali Rohár --- tools/kwbimage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/kwbimage.c b/tools/kwbimage.c index 97be3bed79cb..0c3b40d075e9 100644 --- a/tools/kwbimage.c +++ b/tools/kwbimage.c @@ -2440,7 +2440,7 @@ static int kwbimage_check_params(struct image_tool_params *params) } return (params->dflag && (params->fflag || params->lflag)) || - (params->fflag && (params->dflag || params->lflag)) || + (params->fflag) || (params->lflag && (params->dflag || params->fflag)) || (params->xflag); } -- 2.20.1
[PATCH RFC u-boot-mvebu 25/59] cmd: mvebu/bubt: Do not modify image in A8K check_image_header()
Change checksum verification code so it does require to modify image.
Signed-off-by: Pali Rohár
---
cmd/mvebu/bubt.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/cmd/mvebu/bubt.c b/cmd/mvebu/bubt.c
index 820d342ae100..1b08ca9298c2 100644
--- a/cmd/mvebu/bubt.c
+++ b/cmd/mvebu/bubt.c
@@ -739,18 +739,14 @@ static int check_image_header(void)
return -ENOEXEC;
}
- /* The checksum value is discarded from checksum calculation */
- hdr->prolog_checksum = 0;
-
checksum = do_checksum32((u32 *)hdr, header_len);
+ checksum -= hdr->prolog_checksum;
if (checksum != checksum_ref) {
printf("Error: Bad Image checksum. 0x%x != 0x%x\n",
checksum, checksum_ref);
return -ENOEXEC;
}
- /* Restore the checksum before writing */
- hdr->prolog_checksum = checksum_ref;
printf("Image checksum...OK!\n");
return 0;
--
2.20.1
[PATCH RFC u-boot-mvebu 50/59] arm: mvebu: Add support for generating NAND kwbimage
Add a new Kconfig option CONFIG_MVEBU_SPL_BOOT_DEVICE_NAND which instruct make to generate kwbimage with NAND header. This image is used for booting from NAND flash (either SPI or parallel). Support is very simple, SPL after finishes DDR training returns back to the BootROM (via CONFIG_SPL_BOOTROM_SUPPORT option) and BootROM then loads and executes U-Boot proper. To generate correct kwbimage NAND header, it is required to set following Kconfig options: CONFIG_SYS_NAND_PAGE_SIZE CONFIG_SYS_NAND_BLOCK_SIZE CONFIG_MVEBU_SPL_NAND_BADBLK_LOCATION They are used only by make / mkimage when generating final kwbimage. CONFIG_MVEBU_SPL_NAND_BADBLK_LOCATION is a new mvebu specific Kconfig option which is set into kwbimage NAND_BADBLK_LOCATION header field. Signed-off-by: Pali Rohár --- arch/arm/mach-mvebu/Kconfig | 13 + arch/arm/mach-mvebu/Makefile| 10 ++ arch/arm/mach-mvebu/kwbimage.cfg.in | 5 + drivers/mtd/nand/raw/Kconfig| 4 +++- 4 files changed, 31 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index 2863babefbe3..5e9480aed291 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -321,6 +321,11 @@ config MVEBU_SPL_BOOT_DEVICE_SPI imply SPL_SPI select SPL_BOOTROM_SUPPORT +config MVEBU_SPL_BOOT_DEVICE_NAND + bool "NAND flash (SPI or parallel)" + select MTD_RAW_NAND + select SPL_BOOTROM_SUPPORT + config MVEBU_SPL_BOOT_DEVICE_MMC bool "SDIO/MMC card" imply ENV_IS_IN_MMC @@ -346,6 +351,14 @@ config MVEBU_SPL_BOOT_DEVICE_UART endchoice +config MVEBU_SPL_NAND_BADBLK_LOCATION + hex "NAND Bad block indicator location" + depends on MVEBU_SPL_BOOT_DEVICE_NAND + range 0x0 0x1 + help + Value 0x0 = SLC flash = BBI at page 0 or page 1 + Value 0x1 = MLC flash = BBI at last page in the block + config MVEBU_EFUSE bool "Enable eFuse support" depends on HAVE_MVEBU_EFUSE diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile index a23511b113bb..4b7b9ff8b2f2 100644 --- a/arch/arm/mach-mvebu/Makefile +++ b/arch/arm/mach-mvebu/Makefile @@ -50,6 +50,9 @@ KWB_REPLACE += BOOT_FROM ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI),) KWB_CFG_BOOT_FROM=spi endif +ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_NAND),) + KWB_CFG_BOOT_FROM=nand +endif ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC),) KWB_CFG_BOOT_FROM=sdio endif @@ -60,6 +63,13 @@ ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_UART),) KWB_CFG_BOOT_FROM=uart endif +ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_NAND),) +KWB_REPLACE += NAND_PAGE_SIZE NAND_BLKSZ NAND_BADBLK_LOCATION +KWB_CFG_NAND_PAGE_SIZE = $(CONFIG_SYS_NAND_PAGE_SIZE) +KWB_CFG_NAND_BLKSZ = $(CONFIG_SYS_NAND_BLOCK_SIZE) +KWB_CFG_NAND_BADBLK_LOCATION = $(CONFIG_MVEBU_SPL_NAND_BADBLK_LOCATION) +endif + ifneq ($(CONFIG_SECURED_MODE_IMAGE),) KWB_REPLACE += CSK_INDEX KWB_CFG_CSK_INDEX = $(CONFIG_SECURED_MODE_CSK_INDEX) diff --git a/arch/arm/mach-mvebu/kwbimage.cfg.in b/arch/arm/mach-mvebu/kwbimage.cfg.in index ccb09975817e..90cf00c5b984 100644 --- a/arch/arm/mach-mvebu/kwbimage.cfg.in +++ b/arch/arm/mach-mvebu/kwbimage.cfg.in @@ -11,6 +11,11 @@ VERSION 1 # Boot Media configurations #@BOOT_FROM +# NAND configuration +#@NAND_PAGE_SIZE +#@NAND_BLKSZ +#@NAND_BADBLK_LOCATION + # Enable BootROM output via DEBUG flag on SoCs which require it #@DEBUG diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 8aaba8b1a2cf..8aaf135ab45d 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -550,7 +550,8 @@ comment "Generic NAND options" config SYS_NAND_BLOCK_SIZE hex "NAND chip eraseblock size" - depends on ARCH_SUNXI || SPL_NAND_SUPPORT || TPL_NAND_SUPPORT + depends on ARCH_SUNXI || SPL_NAND_SUPPORT || TPL_NAND_SUPPORT || \ + MVEBU_SPL_BOOT_DEVICE_NAND depends on !NAND_MXS && !NAND_DENALI_DT && !NAND_LPC32XX_MLC && \ !NAND_FSL_IFC && !NAND_MT7621 help @@ -576,6 +577,7 @@ config SYS_NAND_PAGE_SIZE hex "NAND chip page size" depends on ARCH_SUNXI || NAND_OMAP_GPMC || NAND_LPC32XX_SLC || \ SPL_NAND_SIMPLE || (NAND_MXC && SPL_NAND_SUPPORT) || \ + MVEBU_SPL_BOOT_DEVICE_NAND || \ (NAND_ATMEL && SPL_NAND_SUPPORT) || SPL_GENERATE_ATMEL_PMECC_HEADER depends on !NAND_MXS && !NAND_DENALI_DT && !NAND_LPC32XX_MLC && !NAND_MT7621 help -- 2.20.1
[PATCH RFC u-boot-mvebu 10/59] arm: mvebu: spl: Load proper U-Boot from selected eMMC boot partition
When eMMC boot is selected then BootROM loads kwbimage header (U-Boot SPL)
from the selected eMMC boot partition. So for eMMC boot ensure that U-Boot
SPL loads U-Boot proper (from kwbimage) also from the same selected eMMC
boot partition.
Fixes: 2226ca173486 ("arm: mvebu: Load U-Boot proper binary in SPL code based
on kwbimage header")
Signed-off-by: Pali Rohár
---
arch/arm/mach-mvebu/Kconfig | 1 +
arch/arm/mach-mvebu/spl.c | 8 +++-
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 594e9a03d901..5303b1cbb965 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -330,6 +330,7 @@ config MVEBU_SPL_BOOT_DEVICE_MMC
imply SPL_GPIO
imply SPL_LIBDISK_SUPPORT
imply SPL_MMC
+ select SUPPORT_EMMC_BOOT if SPL_MMC
select SPL_BOOTROM_SUPPORT
config MVEBU_SPL_BOOT_DEVICE_SATA
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index e14c7a9c6cf2..0a809e91349c 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -41,6 +41,12 @@
* kwbimage main header.
*/
#ifdef CONFIG_SPL_MMC
+#ifdef CONFIG_SUPPORT_EMMC_BOOT_OVERRIDE_PART_CONFIG
+#error CONFIG_SUPPORT_EMMC_BOOT_OVERRIDE_PART_CONFIG is unsupported
+#endif
+#ifdef CONFIG_SYS_MMCSD_RAW_MODE_EMMC_BOOT_PARTITION
+#error CONFIG_SYS_MMCSD_RAW_MODE_EMMC_BOOT_PARTITION is unsupported
+#endif
#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is unsupported
#endif
@@ -98,7 +104,7 @@ struct kwbimage_main_hdr_v1 {
#ifdef CONFIG_SPL_MMC
u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
{
- return MMCSD_MODE_RAW;
+ return MMCSD_MODE_EMMCBOOT;
}
#endif
--
2.20.1
[PATCH RFC u-boot-mvebu 15/59] tools: kwboot: Fix parsing UART image without data checksum
The 32-bit data checksum in UART image is not checked by the BootROM and
also Marvell tools do not generate it.
So if data checksum stored in UART image does not match calculated checksum
from the image then treat those checksum bytes as part of the executable
image code (and not as the checksum) and for compatibility with the rest of
the code manually insert data checksum into the in-memory image after the
executable code, without overwriting it.
This should allow to boot UART images generated by Marvell tools.
Signed-off-by: Pali Rohár
---
tools/kwboot.c | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/tools/kwboot.c b/tools/kwboot.c
index 7a7dd5bf3d7b..da840864b565 100644
--- a/tools/kwboot.c
+++ b/tools/kwboot.c
@@ -1990,8 +1990,18 @@ kwboot_img_patch(void *img, size_t *size, int baudrate)
*size < le32_to_cpu(hdr->srcaddr) + le32_to_cpu(hdr->blocksize))
goto err;
- if (kwboot_img_csum32(img) != *kwboot_img_csum32_ptr(img))
- goto err;
+ /*
+* The 32-bit data checksum is optional for UART image. If it is not
+* present (checksum detected as invalid) then grow data part of the
+* image for the checksum, so it can be inserted there.
+*/
+ if (kwboot_img_csum32(img) != *kwboot_img_csum32_ptr(img)) {
+ if (hdr->blockid != IBR_HDR_UART_ID) {
+ fprintf(stderr, "Image has invalid data checksum\n");
+ goto err;
+ }
+ kwboot_img_grow_data_right(img, size, sizeof(uint32_t));
+ }
is_secure = kwboot_img_is_secure(img);
@@ -2256,6 +2266,7 @@ main(int argc, char **argv)
KWBOOT_XM_BLKSZ +
sizeof(kwboot_baud_code) +
sizeof(kwboot_baud_code_data_jump) +
+sizeof(uint32_t) +
KWBOOT_XM_BLKSZ;
if (imgpath) {
--
2.20.1
[PATCH RFC u-boot-mvebu 03/59] arm: mvebu: spl: Fix parsing SDIO kwbimage
Despite the official specification, Marvell BootROM does not interpret
srcaddr from SDIO image as offset in number of sectors (like for SATA
image), but as offset in bytes (like for all other images except SATA).
To process SDIO kwbimage and load U-Boot proper from it in the same way as
Marvell BootROM, it is needed to interpret srcaddr in bytes. This change
fixes booting of U-Boot proper from SPL code stored in SDIO image.
Fixes: 2226ca173486 ("arm: mvebu: Load U-Boot proper binary in SPL code based
on kwbimage header")
Signed-off-by: Pali Rohár
---
arch/arm/mach-mvebu/spl.c | 8
1 file changed, 8 deletions(-)
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index 424599286e5e..b238ba2f5d99 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -196,14 +196,6 @@ int spl_parse_board_header(struct spl_image_info
*spl_image,
spl_image->offset *= 512;
}
- /*
-* For SDIO (eMMC) srcaddr is specified in number of sectors.
-* This expects that sector size is 512 bytes and recalculates
-* data offset to bytes.
-*/
- if (IS_ENABLED(CONFIG_SPL_MMC) && mhdr->blockid == IBR_HDR_SDIO_ID)
- spl_image->offset *= 512;
-
if (spl_image->offset % 4 != 0) {
printf("ERROR: Wrong srcaddr (0x%08x) in kwbimage\n",
spl_image->offset);
--
2.20.1
[PATCH RFC u-boot-mvebu 48/59] tools: mkimage: Do not try to open datafile when it is skipped
When mkimage was instructed to skip datafile via option -s then do not try
to validate or open datafile as it does not have to exist or to be
specified via -d option.
This change allows to use -s option for skipping datafile when -d option
for datafile was not specified.
Signed-off-by: Pali Rohár
---
tools/mkimage.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/mkimage.c b/tools/mkimage.c
index c53768f8d8de..19c139f402c9 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -567,7 +567,7 @@ int main(int argc, char **argv)
exit (retval);
}
- if ((params.type != IH_TYPE_MULTI) && (params.type != IH_TYPE_SCRIPT)) {
+ if (!params.skipcpy && params.type != IH_TYPE_MULTI && params.type !=
IH_TYPE_SCRIPT) {
if (!params.datafile) {
fprintf(stderr, "%s: Option -d with image data file was
not specified\n",
params.cmdname);
--
2.20.1
[PATCH RFC u-boot-mvebu 16/59] tools: kwboot: Validate optional kwbimage v1 headers
Before starting parsing of kwbimage, first validate that all optional v1
headers and correct. This prevents kwboot crashes on invalid input.
Signed-off-by: Pali Rohár
---
tools/kwboot.c | 8
1 file changed, 8 insertions(+)
diff --git a/tools/kwboot.c b/tools/kwboot.c
index da840864b565..c8c7a8d24658 100644
--- a/tools/kwboot.c
+++ b/tools/kwboot.c
@@ -1939,6 +1939,7 @@ static int
kwboot_img_patch(void *img, size_t *size, int baudrate)
{
struct main_hdr_v1 *hdr;
+ struct opt_hdr_v1 *ohdr;
uint32_t srcaddr;
uint8_t csum;
size_t hdrsz;
@@ -1990,6 +1991,13 @@ kwboot_img_patch(void *img, size_t *size, int baudrate)
*size < le32_to_cpu(hdr->srcaddr) + le32_to_cpu(hdr->blocksize))
goto err;
+ for_each_opt_hdr_v1 (ohdr, hdr) {
+ if (!opt_hdr_v1_valid_size(ohdr, (const uint8_t *)hdr + hdrsz))
{
+ fprintf(stderr, "Invalid optional image header\n");
+ goto err;
+ }
+ }
+
/*
* The 32-bit data checksum is optional for UART image. If it is not
* present (checksum detected as invalid) then grow data part of the
--
2.20.1
Re: rk3399 boards broken, only partially converted to standard boot? (was Re: [PATCH 71/71] rockchip: Convert rockpro64-rk3399 to use standard boot)
Hi Vagrant, On Tue, 21 Feb 2023 at 13:32, Vagrant Cascadian wrote: > > On 2023-02-20, Simon Glass wrote: > > On Sat, 18 Feb 2023 at 19:19, Vagrant Cascadian wrote: > >> On 2022-12-07, Simon Glass wrote: > >> > Drop the use of scripts and rely on standard boot for all operation. > >> > >> This patch, applied as 3891c68ef50eda38d78c95ecd03aed030aa6bb53 broke > >> booting on pinebook-pro-rk3399, which still tries to "run > >> distro_bootcmd" but distro_bootcmd is no longer defined... probably > >> several other rk3399 systems are similarly affected? Maybe other > >> rockchip systems as well? Reverting the patch fixes booting on the > >> pinebook-pro-rk3399, at least. > >> > >> It seems that rockpro64-rk3399 was used as an example, so that > >> presumably works, but in actuality, this commit only modifies common > >> files for many rockchip and rk3399 boards and nothing rockpro64-rk3399 > >> specific, so the commit message is a bit misleading. > >> > >> I am not sure what the best way forward is; to quickly convert all the > >> other boards in a new patch series, or incrementally shift one system at > >> a time over (and somehow restore previous behavior in the > >> meantime?)... as it stands it appears we are left with rk3399 boards > >> partially converted but broken... > >> > >> FWIW, I have not confirmed for sure that other boards are broken, so it > >> might just be pinebook-pro-rk3399 for some reason. I have a few rk3399 > >> based boards I can test to confirm... > > > > I suspect it needs BOOTSTD_DEFAULTS enabled. Could you try that? I can > > send a patch if you like? > > I added CONFIG_BOOTSTD_DEFAULTS=y to > configs/pinebook-pro-rk3399_defconfig but it still had the same issue... > > bootcmd does not get updated to use bootstd instead of distro_bootcmd > ... and distro_bootcmd is not defined, so it fails to boot! At least it > gets as far as a u-boot prompt! > > > As mentioned on irc, I wasn't able to get rockpro64-rk3399 to boot at > all (hanging at SPL), so cannot test if it also needs further changes > for BOOTSTD to work... and for good measure, rock64-rk3328 also fails in > the same way. > > I also have puma-rk3399, firefly-rk3399 and firefly-rk3288 to > test... though might wait on some of those till the dust settles a > bit... Yes, see my note about this a few minutes back. I sent 3 patches at lunchtime too: https://patchwork.ozlabs.org/project/uboot/list/?series=343056 Regards, Simon
Re: rk3399 boards broken, only partially converted to standard boot? (was Re: [PATCH 71/71] rockchip: Convert rockpro64-rk3399 to use standard boot)
On 2023-02-20, Simon Glass wrote: > On Sat, 18 Feb 2023 at 19:19, Vagrant Cascadian wrote: >> On 2022-12-07, Simon Glass wrote: >> > Drop the use of scripts and rely on standard boot for all operation. >> >> This patch, applied as 3891c68ef50eda38d78c95ecd03aed030aa6bb53 broke >> booting on pinebook-pro-rk3399, which still tries to "run >> distro_bootcmd" but distro_bootcmd is no longer defined... probably >> several other rk3399 systems are similarly affected? Maybe other >> rockchip systems as well? Reverting the patch fixes booting on the >> pinebook-pro-rk3399, at least. >> >> It seems that rockpro64-rk3399 was used as an example, so that >> presumably works, but in actuality, this commit only modifies common >> files for many rockchip and rk3399 boards and nothing rockpro64-rk3399 >> specific, so the commit message is a bit misleading. >> >> I am not sure what the best way forward is; to quickly convert all the >> other boards in a new patch series, or incrementally shift one system at >> a time over (and somehow restore previous behavior in the >> meantime?)... as it stands it appears we are left with rk3399 boards >> partially converted but broken... >> >> FWIW, I have not confirmed for sure that other boards are broken, so it >> might just be pinebook-pro-rk3399 for some reason. I have a few rk3399 >> based boards I can test to confirm... > > I suspect it needs BOOTSTD_DEFAULTS enabled. Could you try that? I can > send a patch if you like? I added CONFIG_BOOTSTD_DEFAULTS=y to configs/pinebook-pro-rk3399_defconfig but it still had the same issue... bootcmd does not get updated to use bootstd instead of distro_bootcmd ... and distro_bootcmd is not defined, so it fails to boot! At least it gets as far as a u-boot prompt! As mentioned on irc, I wasn't able to get rockpro64-rk3399 to boot at all (hanging at SPL), so cannot test if it also needs further changes for BOOTSTD to work... and for good measure, rock64-rk3328 also fails in the same way. I also have puma-rk3399, firefly-rk3399 and firefly-rk3288 to test... though might wait on some of those till the dust settles a bit... live well, vagrant signature.asc Description: PGP signature
