[PATCH v6 5/6] fwu: DeveloperBox: add support for FWU
From: Jassi Brar
Add code to support FWU_MULTI_BANK_UPDATE.
The platform does not have gpt-partition storage for
Banks and MetaData, rather it used SPI-NOR backed
mtd regions for the purpose.
Signed-off-by: Jassi Brar
---
board/socionext/developerbox/Makefile | 1 +
board/socionext/developerbox/developerbox.c | 8 +
board/socionext/developerbox/fwu_plat.c | 37 +
configs/synquacer_developerbox_defconfig| 8 +
doc/board/socionext/developerbox.rst| 154 +++-
include/configs/synquacer.h | 10 ++
6 files changed, 212 insertions(+), 6 deletions(-)
create mode 100644 board/socionext/developerbox/fwu_plat.c
diff --git a/board/socionext/developerbox/Makefile
b/board/socionext/developerbox/Makefile
index 4a46de995a..1acd067a7e 100644
--- a/board/socionext/developerbox/Makefile
+++ b/board/socionext/developerbox/Makefile
@@ -7,3 +7,4 @@
#
obj-y := developerbox.o
+obj-$(CONFIG_FWU_MDATA_MTD) += fwu_plat.o
diff --git a/board/socionext/developerbox/developerbox.c
b/board/socionext/developerbox/developerbox.c
index 16e14d4f7f..ce2cccf4f0 100644
--- a/board/socionext/developerbox/developerbox.c
+++ b/board/socionext/developerbox/developerbox.c
@@ -20,6 +20,13 @@
#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
struct efi_fw_image fw_images[] = {
+#if CONFIG_IS_ENABLED(FWU_MULTI_BANK_UPDATE)
+ {
+ .image_type_id = DEVELOPERBOX_FIP_IMAGE_GUID,
+ .fw_name = u"DEVELOPERBOX-FIP",
+ .image_index = 1,
+ },
+#else
{
.image_type_id = DEVELOPERBOX_UBOOT_IMAGE_GUID,
.fw_name = u"DEVELOPERBOX-UBOOT",
@@ -35,6 +42,7 @@ struct efi_fw_image fw_images[] = {
.fw_name = u"DEVELOPERBOX-OPTEE",
.image_index = 3,
},
+#endif
};
struct efi_capsule_update_info update_info = {
diff --git a/board/socionext/developerbox/fwu_plat.c
b/board/socionext/developerbox/fwu_plat.c
new file mode 100644
index 00..e724e702bd
--- /dev/null
+++ b/board/socionext/developerbox/fwu_plat.c
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (c) 2023, Linaro Limited
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define DFU_ALT_BUF_LEN 256
+
+/* Generate dfu_alt_info from partitions */
+void set_dfu_alt_info(char *interface, char *devstr)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN);
+ struct mtd_info *mtd;
+ int ret;
+
+ memset(buf, 0, sizeof(buf));
+
+ mtd_probe_devices();
+
+ mtd = get_mtd_device_nm("nor1");
+ if (IS_ERR_OR_NULL(mtd))
+ return;
+
+ ret = fwu_gen_alt_info_from_mtd(buf, DFU_ALT_BUF_LEN, mtd);
+ if (ret < 0) {
+ log_err("Error: Failed to generate dfu_alt_info. (%d)\n", ret);
+ return;
+ }
+ log_debug("Make dfu_alt_info: '%s'\n", buf);
+
+ env_set("dfu_alt_info", buf);
+}
diff --git a/configs/synquacer_developerbox_defconfig
b/configs/synquacer_developerbox_defconfig
index 0c37897c9a..8e7236b572 100644
--- a/configs/synquacer_developerbox_defconfig
+++ b/configs/synquacer_developerbox_defconfig
@@ -97,3 +97,11 @@ CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
CONFIG_EFI_CAPSULE_ON_DISK=y
CONFIG_EFI_IGNORE_OSINDICATIONS=y
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
+CONFIG_EFI_SECURE_BOOT=y
+CONFIG_FWU_MULTI_BANK_UPDATE=y
+CONFIG_FWU_MDATA=y
+CONFIG_FWU_MDATA_MTD=y
+CONFIG_FWU_NUM_BANKS=2
+CONFIG_FWU_NUM_IMAGES_PER_BANK=1
+CONFIG_CMD_FWU_METADATA=y
+CONFIG_TOOLS_MKFWUMDATA=y
diff --git a/doc/board/socionext/developerbox.rst
b/doc/board/socionext/developerbox.rst
index 2d943c23be..aa7080e26c 100644
--- a/doc/board/socionext/developerbox.rst
+++ b/doc/board/socionext/developerbox.rst
@@ -57,14 +57,20 @@ Installation
You can install the SNI_NOR_UBOOT.fd via NOR flash writer.
-Flashing the U-Boot image on DeveloperBox requires a 96boards UART mezzanine
or other mezzanine which can connect to LS-UART0 port.
-Connect USB cable from host to the LS-UART0 and set DSW2-7 to ON, and turn the
board on again. The flash writer program will be started automatically; don???t
forget to turn the DSW2-7 off again after flashing.
+Flashing the U-Boot image on DeveloperBox requires a 96boards UART mezzanine
+or other mezzanine which can connect to the LS-UART0 port.
+Connect USB cable from host to the LS-UART0 and set DSW2-7 to ON, and turn the
+board on again. The flash writer program will be started automatically;
+don't forget to turn the DSW2-7 off again after flashing.
-*!!CAUTION!! If you failed to write the U-Boot image on wrong address, the
board can be bricked. See below page if you need to recover the bricked board.
See the following page for more detail*
+*!!CAUTION!! If you write the U-Boot image on wrong address, the board can
+be bricked. See below page if you need to recover the bricked board. See
+the following page for more details*
[PATCH v6 6/6] fwu: provide default fwu_plat_get_bootidx
From: Jassi Brar
Just like fwu_plat_get_update_index, provide a default/weak
implementation of fwu_plat_get_bootidx. So that most platforms
wouldn't have to re-implement the likely case.
Signed-off-by: Jassi Brar
---
lib/fwu_updates/fwu.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/lib/fwu_updates/fwu.c b/lib/fwu_updates/fwu.c
index a24ccf567a..c9996f4d6d 100644
--- a/lib/fwu_updates/fwu.c
+++ b/lib/fwu_updates/fwu.c
@@ -545,6 +545,24 @@ __weak int fwu_plat_get_update_index(uint *update_idx)
return ret;
}
+/**
+ * fwu_plat_get_bootidx() - Get the value of the boot index
+ * @boot_idx: Boot index value
+ *
+ * Get the value of the bank(partition) from which the platform
+ * has booted. This value is passed to U-Boot from the earlier
+ * stage bootloader which loads and boots all the relevant
+ * firmware images
+ */
+__weak void fwu_plat_get_bootidx(uint *boot_idx)
+{
+ int ret;
+
+ ret = fwu_get_active_index(boot_idx);
+ if (ret < 0)
+ *boot_idx = 0; /* Dummy value */
+}
+
/**
* fwu_update_checks_pass() - Check if FWU update can be done
*
--
2.34.1
[PATCH v6 4/6] config: developerbox: move to new flash layout and boot flow
From: Jassi Brar Towards enabling FWU and supporting new firmware layout in NOR flash, make u-boot PIC and adjust uboot env offset in flash. Acked-by: Etienne Carriere Signed-off-by: Jassi Brar --- configs/synquacer_developerbox_defconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/synquacer_developerbox_defconfig b/configs/synquacer_developerbox_defconfig index 68f7bacf02..0c37897c9a 100644 --- a/configs/synquacer_developerbox_defconfig +++ b/configs/synquacer_developerbox_defconfig @@ -1,13 +1,13 @@ CONFIG_ARM=y CONFIG_ARCH_SYNQUACER=y -CONFIG_TEXT_BASE=0x0820 +CONFIG_POSITION_INDEPENDENT=y CONFIG_SYS_MALLOC_LEN=0x100 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xe000 CONFIG_SF_DEFAULT_SPEED=3125 CONFIG_ENV_SIZE=0x3 -CONFIG_ENV_OFFSET=0x30 +CONFIG_ENV_OFFSET=0x58 CONFIG_ENV_SECT_SIZE=0x1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="synquacer-sc2a11-developerbox" -- 2.34.1
[PATCH v6 3/6] dt: fwu: developerbox: enable fwu banks and mdata regions
From: Jassi Brar
Specify Bank-0/1 and fwu metadata mtd regions.
Signed-off-by: Jassi Brar
---
.../synquacer-sc2a11-developerbox-u-boot.dtsi | 49 +--
1 file changed, 46 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
b/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
index 9f9837b33b..9957646a46 100644
--- a/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
+++ b/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
@@ -21,7 +21,7 @@
#size-cells = <0>;
status = "okay";
- flash@0 {
+ flash0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -74,8 +74,24 @@
};
partition@50 {
- label = "Ex-OPTEE";
- reg = <0x50 0x20>;
+ label = "MDATA-Pri";
+ reg = <0x50 0x1000>;
+ };
+
+ partition@53 {
+ label = "MDATA-Sec";
+ reg = <0x53 0x1000>;
+ };
+
+ /* FWU Multi bank update partitions */
+ partition@60 {
+ label = "FIP-Bank0";
+ reg = <0x60 0x40>;
+ };
+
+ partition@a0 {
+ label = "FIP-Bank1";
+ reg = <0xa0 0x40>;
};
};
};
@@ -102,6 +118,33 @@
optee {
status = "okay";
};
+
+ fwu-mdata {
+ compatible = "u-boot,fwu-mdata-mtd";
+ fwu-mdata-store = <>;
+ mdata-parts = "MDATA-Pri", "MDATA-Sec";
+
+ fwu-bank0 {
+ id = <0>;
+ label = "FIP-Bank0";
+ fwu-image0 {
+ id = <0>;
+ offset = <0x0>;
+ size = <0x40>;
+ uuid =
"5a66a702-99fd-4fef-a392-c26e261a2828";
+ };
+ };
+ fwu-bank1 {
+ id = <1>;
+ label = "FIP-Bank1";
+ fwu-image0 {
+ id = <0>;
+ offset = <0x0>;
+ size = <0x40>;
+ uuid =
"a8f868a1-6e5c-4757-878d-ce63375ef2c0";
+ };
+ };
+ };
};
};
--
2.34.1
[PATCH v6 2/6] tools: Add mkfwumdata tool for FWU metadata image
From: Masami Hiramatsu
Add 'mkfwumdata' tool to generate FWU metadata image for the meta-data
partition to be used in A/B Update imeplementation.
Signed-off-by: Sughosh Ganu
Signed-off-by: Jassi Brar
Signed-off-by: Masami Hiramatsu
---
doc/mkfwumdata.1 | 89
tools/Kconfig | 9 ++
tools/Makefile | 4 +
tools/mkfwumdata.c | 334 +
4 files changed, 436 insertions(+)
create mode 100644 doc/mkfwumdata.1
create mode 100644 tools/mkfwumdata.c
diff --git a/doc/mkfwumdata.1 b/doc/mkfwumdata.1
new file mode 100644
index 00..7dd718b26e
--- /dev/null
+++ b/doc/mkfwumdata.1
@@ -0,0 +1,89 @@
+.\" SPDX-License-Identifier: GPL-2.0-or-later
+.\" Copyright (C) 2023 Jassi Brar
+.TH MKFWUMDATA 1 2023-04-10 U-Boot
+.SH NAME
+mkfwumdata \- create FWU metadata image
+.
+.SH SYNOPSIS
+.SY mkfwumdata
+.OP \-a activeidx
+.OP \-p previousidx
+.OP \-g
+.BI \-i\~ imagecount
+.BI \-b\~ bankcount
+.I UUIDs
+.I outputimage
+.YS
+.SY mkfwumdata
+.B \-h
+.YS
+.
+.SH DESCRIPTION
+.B mkfwumdata
+creates metadata info to be used with FWU.
+.
+.SH OPTIONS
+.TP
+.B \-h
+Print usage information and exit.
+.
+.TP
+.B \-a
+Set
+.IR activeidx
+as the currently active Bank. Default is 0.
+.
+.TP
+.B \-p
+Set
+.IR previousidx
+as the previous active Bank. Default is
+.IR activeidx "-1"
+or
+.IR bankcount "-1,"
+whichever is non-negative.
+.
+.TP
+.B \-g
+Convert the
+.IR UUIDs
+as GUIDs before use.
+.
+.TP
+.B \-i
+Specify there are
+.IR imagecount
+images in each bank.
+.
+.TP
+.B \-b
+Specify there are a total of
+.IR bankcount
+banks.
+.
+.TP
+.IR UUIDs
+Comma-separated list of UUIDs required to create the metadata :-
+location_uuid,image_type_uuid,
+.
+.TP
+.IR outputimage
+Specify the name of the metadata image file to be created.
+.
+.SH BUGS
+Please report bugs to the
+.UR https://\:source\:.denx\:.de/\:u-boot/\:u-boot/\:issues
+U-Boot bug tracker
+.UE .
+.SH EXAMPLES
+Create a metadata image with 2 banks and 1 image/bank, BankAct=0, BankPrev=1:
+.PP
+.EX
+.in +4
+$ \c
+.B mkfwumdata \-a 0 \-p 1 \-b 2 \-i 1 \&
+.in +6
+.B 17e86d77-41f9-4fd7-87ec-a55df9842de5,\&
+.B 10c36d7d-ca52-b843-b7b9-f9d6c501d108,\&
+.B 5a66a702-99fd-4fef-a392-c26e261a2828,a8f868a1-6e5c-4757-878d-ce63375ef2c0
\&
+.B fwu-mdata.img
diff --git a/tools/Kconfig b/tools/Kconfig
index 539708f277..6e23f44d55 100644
--- a/tools/Kconfig
+++ b/tools/Kconfig
@@ -157,4 +157,13 @@ config LUT_SEQUENCE
help
Look Up Table Sequence
+config TOOLS_MKFWUMDATA
+ bool "Build mkfwumdata command"
+ default y if FWU_MULTI_BANK_UPDATE
+ help
+ This command allows users to create a raw image of the FWU
+ metadata for initial installation of the FWU multi bank
+ update on the board. The installation method depends on
+ the platform.
+
endmenu
diff --git a/tools/Makefile b/tools/Makefile
index d793cf3bec..a0cd87ff93 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -251,6 +251,10 @@ HOSTLDLIBS_mkeficapsule += \
$(shell pkg-config --libs uuid 2> /dev/null || echo "-luuid")
hostprogs-$(CONFIG_TOOLS_MKEFICAPSULE) += mkeficapsule
+mkfwumdata-objs := mkfwumdata.o lib/crc32.o
+HOSTLDLIBS_mkfwumdata += -luuid
+hostprogs-$(CONFIG_TOOLS_MKFWUMDATA) += mkfwumdata
+
# We build some files with extra pedantic flags to try to minimize things
# that won't build on some weird host compiler -- though there are lots of
# exceptions for files that aren't complaint.
diff --git a/tools/mkfwumdata.c b/tools/mkfwumdata.c
new file mode 100644
index 00..9732a8ddc5
--- /dev/null
+++ b/tools/mkfwumdata.c
@@ -0,0 +1,334 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2023, Linaro Limited
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* This will dynamically allocate the fwu_mdata */
+#define CONFIG_FWU_NUM_BANKS 0
+#define CONFIG_FWU_NUM_IMAGES_PER_BANK 0
+
+/* Since we can not include fwu.h, redefine version here. */
+#define FWU_MDATA_VERSION 1
+
+typedef uint8_t u8;
+typedef int16_t s16;
+typedef uint16_t u16;
+typedef uint32_t u32;
+typedef uint64_t u64;
+
+#include
+
+/* TODO: Endianness conversion may be required for some arch. */
+
+static const char *opts_short = "b:i:a:p:gh";
+
+static struct option options[] = {
+ {"banks", required_argument, NULL, 'b'},
+ {"images", required_argument, NULL, 'i'},
+ {"guid", required_argument, NULL, 'g'},
+ {"active-bank", required_argument, NULL, 'a'},
+ {"previous-bank", required_argument, NULL, 'p'},
+ {"help", no_argument, NULL, 'h'},
+ {NULL, 0, NULL, 0},
+};
+
+static void print_usage(void)
+{
+ fprintf(stderr, "Usage: mkfwumdata [options] \n");
+ fprintf(stderr, "Options:\n"
+ "\t-i, --images Number of images (mandatory)\n"
+ "\t-b, --banksNumber of banks
[PATCH v6 1/6] FWU: Add FWU metadata access driver for MTD storage regions
From: Masami Hiramatsu
In the FWU Multi Bank Update feature, the information about the
updatable images is stored as part of the metadata, on a separate
region. Add a driver for reading from and writing to the metadata
when the updatable images and the metadata are stored on a raw
MTD region.
The code is divided into core under drivers/fwu-mdata/ and some helper
functions clubbed together under lib/fwu_updates/
Signed-off-by: Masami Hiramatsu
Signed-off-by: Jassi Brar
---
drivers/fwu-mdata/Kconfig | 15 ++
drivers/fwu-mdata/Makefile | 1 +
drivers/fwu-mdata/raw_mtd.c | 269
include/fwu.h | 32 +
lib/fwu_updates/Makefile| 1 +
lib/fwu_updates/fwu_mtd.c | 185 +
6 files changed, 503 insertions(+)
create mode 100644 drivers/fwu-mdata/raw_mtd.c
create mode 100644 lib/fwu_updates/fwu_mtd.c
diff --git a/drivers/fwu-mdata/Kconfig b/drivers/fwu-mdata/Kconfig
index 36c4479a59..42736a5e43 100644
--- a/drivers/fwu-mdata/Kconfig
+++ b/drivers/fwu-mdata/Kconfig
@@ -6,6 +6,11 @@ config FWU_MDATA
FWU Metadata partitions reside on the same storage device
which contains the other FWU updatable firmware images.
+choice
+ prompt "Storage Layout Scheme"
+ depends on FWU_MDATA
+ default FWU_MDATA_GPT_BLK
+
config FWU_MDATA_GPT_BLK
bool "FWU Metadata access for GPT partitioned Block devices"
select PARTITION_TYPE_GUID
@@ -14,3 +19,13 @@ config FWU_MDATA_GPT_BLK
help
Enable support for accessing FWU Metadata on GPT partitioned
block devices.
+
+config FWU_MDATA_MTD
+ bool "Raw MTD devices"
+ depends on MTD
+ help
+ Enable support for accessing FWU Metadata on non-partitioned
+ (or non-GPT partitioned, e.g. partition nodes in devicetree)
+ MTD devices.
+
+endchoice
diff --git a/drivers/fwu-mdata/Makefile b/drivers/fwu-mdata/Makefile
index 3fee64c10c..06c49747ba 100644
--- a/drivers/fwu-mdata/Makefile
+++ b/drivers/fwu-mdata/Makefile
@@ -6,3 +6,4 @@
obj-$(CONFIG_FWU_MDATA) += fwu-mdata-uclass.o
obj-$(CONFIG_FWU_MDATA_GPT_BLK) += gpt_blk.o
+obj-$(CONFIG_FWU_MDATA_MTD) += raw_mtd.o
diff --git a/drivers/fwu-mdata/raw_mtd.c b/drivers/fwu-mdata/raw_mtd.c
new file mode 100644
index 00..17e4517973
--- /dev/null
+++ b/drivers/fwu-mdata/raw_mtd.c
@@ -0,0 +1,269 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (c) 2023, Linaro Limited
+ */
+
+#define LOG_CATEGORY UCLASS_FWU_MDATA
+
+#include
+#include
+#include
+
+#include
+#include
+
+/* Internal helper structure to move data around */
+struct fwu_mdata_mtd_priv {
+ struct mtd_info *mtd;
+ char pri_label[50];
+ char sec_label[50];
+ u32 pri_offset;
+ u32 sec_offset;
+};
+
+enum fwu_mtd_op {
+ FWU_MTD_READ,
+ FWU_MTD_WRITE,
+};
+
+extern struct fwu_mtd_image_info fwu_mtd_images[];
+
+static bool mtd_is_aligned_with_block_size(struct mtd_info *mtd, u64 size)
+{
+ return !do_div(size, mtd->erasesize);
+}
+
+static int mtd_io_data(struct mtd_info *mtd, u32 offs, u32 size, void *data,
+ enum fwu_mtd_op op)
+{
+ struct mtd_oob_ops io_op = {};
+ u64 lock_len;
+ size_t len;
+ void *buf;
+ int ret;
+
+ if (!mtd_is_aligned_with_block_size(mtd, offs)) {
+ log_err("Offset unaligned with a block (0x%x)\n",
mtd->erasesize);
+ return -EINVAL;
+ }
+
+ /* This will expand erase size to align with the block size */
+ lock_len = round_up(size, mtd->erasesize);
+
+ ret = mtd_unlock(mtd, offs, lock_len);
+ if (ret && ret != -EOPNOTSUPP)
+ return ret;
+
+ if (op == FWU_MTD_WRITE) {
+ struct erase_info erase_op = {};
+
+ erase_op.mtd = mtd;
+ erase_op.addr = offs;
+ erase_op.len = lock_len;
+ erase_op.scrub = 0;
+
+ ret = mtd_erase(mtd, _op);
+ if (ret)
+ goto lock;
+ }
+
+ /* Also, expand the write size to align with the write size */
+ len = round_up(size, mtd->writesize);
+
+ buf = memalign(ARCH_DMA_MINALIGN, len);
+ if (!buf) {
+ ret = -ENOMEM;
+ goto lock;
+ }
+ memset(buf, 0xff, len);
+
+ io_op.mode = MTD_OPS_AUTO_OOB;
+ io_op.len = len;
+ io_op.datbuf = buf;
+
+ if (op == FWU_MTD_WRITE) {
+ memcpy(buf, data, size);
+ ret = mtd_write_oob(mtd, offs, _op);
+ } else {
+ ret = mtd_read_oob(mtd, offs, _op);
+ if (!ret)
+ memcpy(data, buf, size);
+ }
+ free(buf);
+
+lock:
+ mtd_lock(mtd, offs, lock_len);
+
+ return ret;
+}
+
+static int fwu_mtd_read_mdata(struct udevice *dev, struct fwu_mdata *mdata,
bool primary)
+{
+ struct fwu_mdata_mtd_priv
[PATCH v6 0/6] FWU: Add support for mtd backed feature on DeveloperBox
From: Jassi Brar Introduce support for mtd backed storage for FWU feature and enable it on Synquacer platform based DeveloperBox. This revision is rebased onto patchset that trims the FWU api https://lore.kernel.org/u-boot/20230306231747.1888513-1-jassisinghb...@gmail.com/ Changes since v5: * Some of the typo fixes and cosmetic changes suggested by Etienne Changes since v4: * Provide default/weak implementations of fwu_plat_get_alt_num and fwu_plat_get_bootidx * Provide man page for mkfwumdata * Misc typo fixes and cosmetic changes Changes since v3: * Fix and Update documentation to also build optee for FWU FIP image. * Fixed checkpatch warnings * Made local functions static. * Split config changes to a separate patch * Fix authorship of three patches. Jassi Brar (4): dt: fwu: developerbox: enable fwu banks and mdata regions configs: move to new flash layout and boot flow fwu: DeveloperBox: add support for FWU fwu: provide default fwu_plat_get_bootidx Masami Hiramatsu (2): FWU: Add FWU metadata access driver for MTD storage regions tools: Add mkfwumdata tool for FWU metadata image .../synquacer-sc2a11-developerbox-u-boot.dtsi | 49 ++- board/socionext/developerbox/Makefile | 1 + board/socionext/developerbox/developerbox.c | 8 + board/socionext/developerbox/fwu_plat.c | 37 ++ configs/synquacer_developerbox_defconfig | 12 +- doc/board/socionext/developerbox.rst | 154 +++- doc/mkfwumdata.1 | 89 + drivers/fwu-mdata/Kconfig | 15 + drivers/fwu-mdata/Makefile| 1 + drivers/fwu-mdata/raw_mtd.c | 269 ++ include/configs/synquacer.h | 10 + include/fwu.h | 32 ++ lib/fwu_updates/Makefile | 1 + lib/fwu_updates/fwu.c | 18 + lib/fwu_updates/fwu_mtd.c | 185 ++ tools/Kconfig | 9 + tools/Makefile| 4 + tools/mkfwumdata.c| 334 ++ 18 files changed, 1217 insertions(+), 11 deletions(-) create mode 100644 board/socionext/developerbox/fwu_plat.c create mode 100644 doc/mkfwumdata.1 create mode 100644 drivers/fwu-mdata/raw_mtd.c create mode 100644 lib/fwu_updates/fwu_mtd.c create mode 100644 tools/mkfwumdata.c -- 2.34.1
Re: R: Fit Signature booting without public key
Hi, On 16:51-20230530, Pegorer Massimo wrote: > Hi, > > > Inviato: venerdì 26 maggio 2023 15:00 > > Oggetto: Re: Fit Signature booting without public key > > > > On Fri, May 26, 2023 at 02:22:38PM +0530, Manorit Chawdhry wrote: > > > Hi Tom, > > > > > > On 10:05-20230525, Tom Rini wrote: > > > > On Thu, May 25, 2023 at 11:21:44AM +0530, Manorit Chawdhry wrote: > > > > > Hi Tom, > > > > > > > > > > On 11:30-20230516, Tom Rini wrote: > > > > > > On Tue, May 16, 2023 at 12:11:24PM +0530, Manorit Chawdhry wrote: > > > > > > > > > > > > > Hi All, > > > > > > > > > > > > > > I recently came upon a discussion that had happened a while back > > [0]. > > > > > > > I want to continue the discussion as I believe the issue still > > > > > > > persists and the checks around fit signature booting are still > > > > > > > the same, that allows booting the fit without changing the uboot > > dtb. > > > > > > > > > > > > > > Allowing the signed fit image without this seems to be a > > > > > > > bypass that is available and should not be allowed without any > > > > > > > gate to it for people who'd like to enforce these signing > > > > > > > checks. Let me know if there is a config already available for > > > > > > > it and if not, are there any plans to enable such a config in > > > > > > > future. Would like to hear your opinions on this as I believe this > > should be fixed as soon as possible. > > > > > > > > > > > > > > [0]: > > > > > > > https://u-boot.denx.narkive.com/dEClg9dW/signed-fit-image-boot > > > > > > > s-without-public-key > > > > > > > > > > > > Yes, can you please reproduce the issue in question on the > > > > > > current tree, with a supported platform and provide the > > > > > > defconfig and steps you used for this issue? Thanks. > > > > > > > > > > > > -- > > > > > > > > > > I've created a branch with some custom patches to make the > > > > > fitimage booting currently, please try with the branch and the > > > > > fitimage that are also committed [0]. > > > > > > > > > > The devices that I've tested this with is j721e-hs-evm, the > > > > > defconfig to use for the builds are j721e_evm_r5_defconfig and > > > > > j721e_evm_a72_defconfig. Although not synced up with the latest > > > > > changes but for reference the SDK documentation can help if required > > [1]. > > > > > > > > > > Attached the logs for reference with the signed fitimage and an > > > > > unsigned uboot without any modifications[2]. > > > > > > > > > > [0]: https://github.com/manorit2001/u-boot/tree/fit-image-poc > > > > > [1]: > > > > > https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-jacint > > > > > o7/08_06_00_11/exports/docs/linux/Foundational_Components/U- > > Boot/U > > > > > G-General-Info.html > > > > > [2]: > > > > > https://gist.github.com/manorit2001/3c49cfc19bf937783efb75fd4cddc5 > > > > > 8f > > > > > > > > I don't see the problem there, but please go and investigate what > > > > problem you're seeing. The intention is that yes, with the > > > > appropriate CONFIG settings, you can set U-Boot to only boot signed > > > > FIT configurations and unsigned ones should not boot. > > > > > > > > > > It boots with an unsigned fit too btw for reference [0]. The whole > > > logic behind the authentication is that uboot stores the public key > > > that is used for verification of the signed fit but apparantely if I > > > haven't kept the public key in uboot dtb the fit images still boot > > > whether signed or unsigned as that check is not guarded by anything if > > > you see in the codebase[1]. > > Which uboot behaviour would you expect? If uboot is missing of the public > key, it has no way to check signatures. Therefore either it boots everything > (signed and unsigned) or it boots nothing (signed and unsigned). The second > means it would be totally useless. So the first seems the only reasonable > behaviour, IMO. > I would actually expect it to through some errors telling about all this instead of silently booting it, if the configurations of the dtb and the signing ain't proper I don't believe there is any way to know about any of this as it just boots up without any hint about it whatsoever, I believe if this is enabled then there should atleast be an optional config that allows people to get their environment right for validating all this. Regards, Manorit > Massimo > > > > [0]: > > > https://gist.github.com/manorit2001/80c9242641141ac5bce0e335ea8a9f1a > > > [1]: > > > https://github.com/u-boot/u- > > boot/blob/6dcee70692601bd3296c86ac07d0317b > > > f06d2b7b/boot/image-fit-sig.c#L491-L496 > > > > Alright, please let us know what you find as indeed if you've set all the > > right > > options it's not supposed to boot unsigned images. > > > > -- > > Tom
[PATCH v7 10/10] test/py: efi_capsule: test for FMP versioning
This test covers the FMP versioning for both raw and FIT image,
and both signed and non-signed capsule update.
Signed-off-by: Masahisa Kojima
---
Changes in v7:
- use newly introcuded common functions of efi_capsule test
test/py/tests/test_efi_capsule/conftest.py| 82 ++
.../test_capsule_firmware_fit.py | 80 -
.../test_capsule_firmware_raw.py | 85 ++-
.../test_capsule_firmware_signed_fit.py | 65 ++
.../test_capsule_firmware_signed_raw.py | 70 +++
test/py/tests/test_efi_capsule/version.dts| 24 ++
6 files changed, 404 insertions(+), 2 deletions(-)
create mode 100644 test/py/tests/test_efi_capsule/version.dts
diff --git a/test/py/tests/test_efi_capsule/conftest.py
b/test/py/tests/test_efi_capsule/conftest.py
index a337e62936..d0e20df01e 100644
--- a/test/py/tests/test_efi_capsule/conftest.py
+++ b/test/py/tests/test_efi_capsule/conftest.py
@@ -62,6 +62,23 @@ def efi_capsule_data(request, u_boot_config):
'-out SIGNER2.crt -nodes -days 365'
% data_dir, shell=True)
+# Update dtb to add the version information
+check_call('cd %s; '
+ 'cp %s/test/py/tests/test_efi_capsule/version.dts .'
+ % (data_dir, u_boot_config.source_dir), shell=True)
+if capsule_auth_enabled:
+check_call('cd %s; '
+ 'dtc -@ -I dts -O dtb -o version.dtbo version.dts; '
+ 'fdtoverlay -i test_sig.dtb '
+'-o test_ver.dtb version.dtbo'
+ % (data_dir), shell=True)
+else:
+check_call('cd %s; '
+ 'dtc -@ -I dts -O dtb -o version.dtbo version.dts; '
+ 'fdtoverlay -i %s/arch/sandbox/dts/test.dtb '
+'-o test_ver.dtb version.dtbo'
+ % (data_dir, u_boot_config.build_dir), shell=True)
+
# Create capsule files
# two regions: one for u-boot.bin and the other for u-boot.env
check_call('cd %s; echo -n u-boot:Old > u-boot.bin.old; echo -n
u-boot:New > u-boot.bin.new; echo -n u-boot-env:Old > u-boot.env.old; echo -n
u-boot-env:New > u-boot.env.new' % data_dir,
@@ -87,6 +104,26 @@ def efi_capsule_data(request, u_boot_config):
check_call('cd %s; %s/tools/mkeficapsule --index 1 --guid
058B7D83-50D5-4C47-A195-60D86AD341C4 uboot_bin_env.itb Test05' %
(data_dir, u_boot_config.build_dir),
shell=True)
+check_call('cd %s; %s/tools/mkeficapsule --index 1 --fw-version 5 '
+'--guid 09D7CF52-0720-4710-91D1-08469B7FE9C8
u-boot.bin.new Test101' %
+ (data_dir, u_boot_config.build_dir),
+ shell=True)
+check_call('cd %s; %s/tools/mkeficapsule --index 2 --fw-version 10 '
+'--guid 5A7021F5-FEF2-48B4-AABA-832E777418C0
u-boot.env.new Test102' %
+ (data_dir, u_boot_config.build_dir),
+ shell=True)
+check_call('cd %s; %s/tools/mkeficapsule --index 1 --fw-version 2 '
+'--guid 09D7CF52-0720-4710-91D1-08469B7FE9C8
u-boot.bin.new Test103' %
+ (data_dir, u_boot_config.build_dir),
+ shell=True)
+check_call('cd %s; %s/tools/mkeficapsule --index 1 --fw-version 5 '
+'--guid 3673B45D-6A7C-46F3-9E60-ADABB03F7937
uboot_bin_env.itb Test104' %
+ (data_dir, u_boot_config.build_dir),
+ shell=True)
+check_call('cd %s; %s/tools/mkeficapsule --index 1 --fw-version 2 '
+'--guid 3673B45D-6A7C-46F3-9E60-ADABB03F7937
uboot_bin_env.itb Test105' %
+ (data_dir, u_boot_config.build_dir),
+ shell=True)
if capsule_auth_enabled:
# raw firmware signed with proper key
@@ -123,6 +160,51 @@ def efi_capsule_data(request, u_boot_config):
'uboot_bin_env.itb Test14'
% (data_dir, u_boot_config.build_dir),
shell=True)
+# raw firmware signed with proper key with version information
+check_call('cd %s; '
+ '%s/tools/mkeficapsule --index 1 --monotonic-count 1 '
+'--fw-version 5 '
+'--private-key SIGNER.key --certificate SIGNER.crt
'
+'--guid 09D7CF52-0720-4710-91D1-08469B7FE9C8 '
+'u-boot.bin.new Test111'
+ % (data_dir, u_boot_config.build_dir),
+ shell=True)
+# raw firmware signed with proper key with version information
+check_call('cd %s; '
+ '%s/tools/mkeficapsule --index 2 --monotonic-count 1 '
+
[PATCH v7 09/10] test: efi_capsule: refactor efi_capsule test
Current efi capsule python tests have much code duplication.
This commit creates the common function
in test/py/tests/test_efi_capsule/capsule_common.py,
aim to reduce the code size and improve maintainability.
Signed-off-by: Masahisa Kojima
---
Newly created in v7
.../tests/test_efi_capsule/capsule_common.py | 86 +++
.../test_capsule_firmware_fit.py | 151 +++-
.../test_capsule_firmware_raw.py | 224 +++---
.../test_capsule_firmware_signed_fit.py | 198 +++-
.../test_capsule_firmware_signed_raw.py | 210 +++-
5 files changed, 231 insertions(+), 638 deletions(-)
create mode 100644 test/py/tests/test_efi_capsule/capsule_common.py
diff --git a/test/py/tests/test_efi_capsule/capsule_common.py
b/test/py/tests/test_efi_capsule/capsule_common.py
new file mode 100644
index 00..a460cfd4c2
--- /dev/null
+++ b/test/py/tests/test_efi_capsule/capsule_common.py
@@ -0,0 +1,86 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (c) 2023, Linaro Limited
+
+
+"""Common function for UEFI capsule test."""
+
+from capsule_defs import CAPSULE_DATA_DIR, CAPSULE_INSTALL_DIR
+
+def setup(u_boot_console, disk_img, osindications):
+output = u_boot_console.run_command_list([
+'host bind 0 %s' % disk_img,
+'printenv -e PlatformLangCodes', # workaround for terminal size
determination
+'efidebug boot add -b 1 TEST host 0:1 /helloworld.efi',
+'efidebug boot order 1',
+'env set dfu_alt_info "sf 0:0=u-boot-bin raw 0x10
0x5;u-boot-env raw 0x15 0x20"'])
+
+if osindications is None:
+output = u_boot_console.run_command('env set -e OsIndications')
+else:
+output = u_boot_console.run_command('env set -e -nv -bs -rt
OsIndications =%s' % osindications)
+
+output = u_boot_console.run_command('env save')
+
+def init_content(u_boot_console, target, filename, expected):
+output = u_boot_console.run_command_list([
+'sf probe 0:0',
+'fatload host 0:1 400 %s/%s'
+% (CAPSULE_DATA_DIR, filename),
+'sf write 400 %s 10' % target,
+'sf read 500 10 10',
+'md.b 500 10'])
+assert expected in ''.join(output)
+
+def place_capsule_file(u_boot_console, filenames):
+for name in filenames:
+output = u_boot_console.run_command_list([
+'fatload host 0:1 400 %s/%s' % (CAPSULE_DATA_DIR, name),
+'fatwrite host 0:1 400 %s/%s $filesize'
+% (CAPSULE_INSTALL_DIR, name)])
+
+output = u_boot_console.run_command('fatls host 0:1 %s' %
CAPSULE_INSTALL_DIR)
+for name in filenames:
+assert name in ''.join(output)
+
+def exec_manual_update(u_boot_console, disk_img, filenames, need_reboot =
True):
+# make sure that dfu_alt_info exists even persistent variables
+# are not available.
+output = u_boot_console.run_command_list([
+'env set dfu_alt_info '
+'"sf 0:0=u-boot-bin raw 0x10 0x5;'
+'u-boot-env raw 0x15 0x20"',
+'host bind 0 %s' % disk_img,
+'fatls host 0:1 %s' % CAPSULE_INSTALL_DIR])
+for name in filenames:
+assert name in ''.join(output)
+
+# need to run uefi command to initiate capsule handling
+output = u_boot_console.run_command(
+'env print -e Capsule', wait_for_reboot = need_reboot)
+
+def check_file_removed(u_boot_console, disk_img, filenames):
+output = u_boot_console.run_command_list([
+'host bind 0 %s' % disk_img,
+'fatls host 0:1 %s' % CAPSULE_INSTALL_DIR])
+for name in filenames:
+assert name not in ''.join(output)
+
+def check_file_exist(u_boot_console, disk_img, filenames):
+output = u_boot_console.run_command_list([
+'host bind 0 %s' % disk_img,
+'fatls host 0:1 %s' % CAPSULE_INSTALL_DIR])
+for name in filenames:
+assert name in ''.join(output)
+
+def verify_content(u_boot_console, target, expected):
+output = u_boot_console.run_command_list([
+'sf probe 0:0',
+'sf read 400 %s 10' % target,
+'md.b 400 10'])
+assert expected in ''.join(output)
+
+def do_reboot_dtb_specified(u_boot_config, u_boot_console, dtb_filename):
+mnt_point = u_boot_config.persistent_data_dir + '/test_efi_capsule'
+u_boot_console.config.dtb = mnt_point + CAPSULE_DATA_DIR \
++ '/%s' % dtb_filename
+u_boot_console.restart_uboot()
diff --git a/test/py/tests/test_efi_capsule/test_capsule_firmware_fit.py
b/test/py/tests/test_efi_capsule/test_capsule_firmware_fit.py
index 9ee152818d..fccf1f3fc1 100644
--- a/test/py/tests/test_efi_capsule/test_capsule_firmware_fit.py
+++ b/test/py/tests/test_efi_capsule/test_capsule_firmware_fit.py
@@ -8,7 +8,14 @@ This test verifies capsule-on-disk firmware update for FIT
images
import pytest
from capsule_defs import CAPSULE_DATA_DIR,
[PATCH v7 08/10] doc: uefi: add anti-rollback documentation
This commit describe the procedure to configure lowest supported
version in the device tree for anti-rollback protection.
Signed-off-by: Masahisa Kojima
---
Changes in v7:
- describe the usage
Newly created in v6
doc/develop/uefi/uefi.rst | 39 +++
1 file changed, 39 insertions(+)
diff --git a/doc/develop/uefi/uefi.rst b/doc/develop/uefi/uefi.rst
index 30b90a09d5..ffd13cebe9 100644
--- a/doc/develop/uefi/uefi.rst
+++ b/doc/develop/uefi/uefi.rst
@@ -537,6 +537,45 @@ where signature.dts looks like::
};
};
+Anti-rollback Protection
+
+
+Anti-rollback prevents unintentional installation of outdated firmware.
+To enable anti-rollback, you must add the lowest-supported-version property
+to dtb and specify --fw-version when creating a capsule file with the
+mkeficapsule tool.
+When executing capsule update, U-Boot checks if fw_version is greater than
+or equal to lowest-supported-version. If fw_version is less than
+lowest-supported-version, the update will fail.
+For example, if lowest-supported-version is set to 7 and you run capsule
+update using a capsule file with --fw-version of 5, the update will fail.
+When the --fw-version in the capsule file is updated, lowest-supported-version
+in the dtb might be updated accordingly.
+
+To insert the lowest supported version into a dtb
+
+.. code-block:: console
+
+$ dtc -@ -I dts -O dtb -o version.dtbo version.dts
+$ fdtoverlay -i orig.dtb -o new.dtb -v version.dtbo
+
+where version.dts looks like::
+
+/dts-v1/;
+/plugin/;
+&{/} {
+firmware-version {
+image1 {
+image-type-id =
"09D7CF52-0720-4710-91D1-08469B7FE9C8";
+image-index = <1>;
+lowest-supported-version = <3>;
+};
+};
+};
+
+The properties of image-type-id and image-index must match the value
+defined in the efi_fw_image array as image_type_id and image_index.
+
Executing the boot manager
~~
--
2.34.1
[PATCH v7 07/10] doc: uefi: add firmware versioning documentation
This commit describes the procedure to add the firmware version into the capsule file. Signed-off-by: Masahisa Kojima --- Changes in v7: - move documentation into "Creating a capsule file" - cleary describe the --fw-version option Newly created in v6 doc/develop/uefi/uefi.rst | 27 +++ 1 file changed, 27 insertions(+) diff --git a/doc/develop/uefi/uefi.rst b/doc/develop/uefi/uefi.rst index ffe25ca231..30b90a09d5 100644 --- a/doc/develop/uefi/uefi.rst +++ b/doc/develop/uefi/uefi.rst @@ -318,6 +318,33 @@ Run the following command --guid \ +The UEFI specification does not define the firmware versioning mechanism. +EDK II reference implementation inserts the FMP Payload Header right before +the payload. It coutains the fw_version and lowest supported version, +EDK II reference implementation uses these information to implement the +firmware versioning and anti-rollback protection, the firmware version and +lowest supported version is stored into EFI non-volatile variable. + +In U-Boot, the firmware versioning is implemented utilizing +the FMP Payload Header same as EDK II reference implementation, +reads the FMP Payload Header and stores the firmware version into +"FmpState" EFI non-volatile variable. indicates the image index, +since FMP protocol handles multiple image indexes. + +To add the fw_version into the FMP Payload Header, +add --fw-version option in mkeficapsule tool. + +.. code-block:: console + +$ mkeficapsule \ + --index --instance 0 \ + --guid \ + --fw-version 5 \ + + +If the --fw-version option is not set, FMP Payload Header is not inserted +and fw_version is set as 0. + Performing the update * -- 2.34.1
[PATCH v7 06/10] mkeficapsule: add FMP Payload Header
Current mkeficapsule tool does not provide firmware
version management. EDK II reference implementation inserts
the FMP Payload Header right before the payload.
It coutains the fw_version and lowest supported version.
This commit adds a new parameters required to generate
the FMP Payload Header for mkeficapsule tool.
'-v' indicates the firmware version.
When mkeficapsule tool is invoked without '-v' option,
FMP Payload Header is not inserted, the behavior is same as
current implementation.
The lowest supported version included in the FMP Payload Header
is not used, the value stored in the device tree is used instead.
Signed-off-by: Masahisa Kojima
Acked-by: Ilias Apalodimas
---
No update since v5
Changes in v5:
- remove --lsv since we use the lowest_supported_version in the dtb
Changes in v3:
- remove '-f' option
- move some definitions into tools/eficapsule.h
- add dependency check of fw_version and lowest_supported_version
- remove unexpected modification of existing fprintf() call
- add documentation
Newly created in v2
doc/mkeficapsule.1 | 10 ++
tools/eficapsule.h | 30 ++
tools/mkeficapsule.c | 37 +
3 files changed, 73 insertions(+), 4 deletions(-)
diff --git a/doc/mkeficapsule.1 b/doc/mkeficapsule.1
index 1ca245a10f..c4c2057d5c 100644
--- a/doc/mkeficapsule.1
+++ b/doc/mkeficapsule.1
@@ -61,6 +61,16 @@ Specify an image index
.BI "-I\fR,\fB --instance " instance
Specify a hardware instance
+.PP
+FMP Payload Header is inserted right before the payload if
+.BR --fw-version
+is specified
+
+
+.TP
+.BI "-v\fR,\fB --fw-version " firmware-version
+Specify a firmware version, 0 if omitted
+
.PP
For generation of firmware accept empty capsule
.BR --guid
diff --git a/tools/eficapsule.h b/tools/eficapsule.h
index 072a4b5598..753fb73313 100644
--- a/tools/eficapsule.h
+++ b/tools/eficapsule.h
@@ -113,4 +113,34 @@ struct efi_firmware_image_authentication {
struct win_certificate_uefi_guid auth_info;
} __packed;
+/* fmp payload header */
+#define SIGNATURE_16(A, B) ((A) | ((B) << 8))
+#define SIGNATURE_32(A, B, C, D) \
+ (SIGNATURE_16(A, B) | (SIGNATURE_16(C, D) << 16))
+
+#define FMP_PAYLOAD_HDR_SIGNATURE SIGNATURE_32('M', 'S', 'S', '1')
+
+/**
+ * struct fmp_payload_header - EDK2 header for the FMP payload
+ *
+ * This structure describes the header which is preprended to the
+ * FMP payload by the edk2 capsule generation scripts.
+ *
+ * @signature: Header signature used to identify the header
+ * @header_size: Size of the structure
+ * @fw_version:Firmware versions used
+ * @lowest_supported_version: Lowest supported version (not used)
+ */
+struct fmp_payload_header {
+ uint32_t signature;
+ uint32_t header_size;
+ uint32_t fw_version;
+ uint32_t lowest_supported_version;
+};
+
+struct fmp_payload_header_params {
+ bool have_header;
+ uint32_t fw_version;
+};
+
#endif /* _EFI_CAPSULE_H */
diff --git a/tools/mkeficapsule.c b/tools/mkeficapsule.c
index b71537beee..52be1f122e 100644
--- a/tools/mkeficapsule.c
+++ b/tools/mkeficapsule.c
@@ -41,6 +41,7 @@ static struct option options[] = {
{"guid", required_argument, NULL, 'g'},
{"index", required_argument, NULL, 'i'},
{"instance", required_argument, NULL, 'I'},
+ {"fw-version", required_argument, NULL, 'v'},
{"private-key", required_argument, NULL, 'p'},
{"certificate", required_argument, NULL, 'c'},
{"monotonic-count", required_argument, NULL, 'm'},
@@ -60,6 +61,7 @@ static void print_usage(void)
"\t-g, --guid guid for image blob type\n"
"\t-i, --index update image index\n"
"\t-I, --instanceupdate hardware instance\n"
+ "\t-v, --fw-version firmware version\n"
"\t-p, --private-key private key file\n"
"\t-c, --certificate signer's certificate
file\n"
"\t-m, --monotonic-count monotonic count\n"
@@ -402,6 +404,7 @@ static void free_sig_data(struct auth_context *ctx)
*/
static int create_fwbin(char *path, char *bin, efi_guid_t *guid,
unsigned long index, unsigned long instance,
+ struct fmp_payload_header_params *fmp_ph_params,
uint64_t mcount, char *privkey_file, char *cert_file,
uint16_t oemflags)
{
@@ -410,10 +413,11 @@ static int create_fwbin(char *path, char *bin, efi_guid_t
*guid,
struct efi_firmware_management_capsule_image_header image;
struct auth_context auth_context;
FILE *f;
- uint8_t *data;
+ uint8_t *data, *new_data, *buf;
off_t bin_size;
uint64_t offset;
int ret;
+ struct fmp_payload_header payload_header;
#ifdef DEBUG
fprintf(stderr, "For output: %s\n", path);
@@
[PATCH v7 05/10] efi_loader: check lowest supported version
The FMP Payload Header which EDK II capsule generation scripts
insert has a firmware version.
This commit reads the lowest supported version stored in the
device tree, then check if the firmware version in FMP payload header
of the ongoing capsule is equal or greater than the
lowest supported version. If the firmware version is lower than
lowest supported version, capsule update will not be performed.
Signed-off-by: Masahisa Kojima
---
Changes in v7:
- return immediately if efi_firmware_capsule_authenticate() fails
Changes in v6:
- get aligned to the latest implementation
Changes in v5:
- newly implement the device tree based versioning
Changes in v4:
- use log_err() instead of printf()
Changes in v2:
- add error message when the firmware version is lower than
lowest supported version
lib/efi_loader/efi_firmware.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/lib/efi_loader/efi_firmware.c b/lib/efi_loader/efi_firmware.c
index ae631f49f7..b557738370 100644
--- a/lib/efi_loader/efi_firmware.c
+++ b/lib/efi_loader/efi_firmware.c
@@ -419,7 +419,8 @@ static void efi_firmware_get_fw_version(const void
**p_image,
* @image_index: Image index
* @state: Pointer to fmp state
*
- * Verify the capsule file
+ * Verify the capsule authentication and check if the fw_version
+ * is equal or greater than the lowest supported version.
*
* Return: status code
*/
@@ -429,11 +430,27 @@ efi_status_t efi_firmware_verify_image(const void
**p_image,
u8 image_index,
struct fmp_state *state)
{
+ u32 lsv;
efi_status_t ret;
+ efi_guid_t *image_type_id;
ret = efi_firmware_capsule_authenticate(p_image, p_image_size);
+ if (ret != EFI_SUCCESS)
+ return ret;
+
efi_firmware_get_fw_version(p_image, p_image_size, state);
+ image_type_id = efi_firmware_get_image_type_id(image_index);
+ if (!image_type_id)
+ return EFI_INVALID_PARAMETER;
+
+ efi_firmware_get_lsv_from_dtb(image_index, image_type_id, );
+ if (state->fw_version < lsv) {
+ log_err("Firmware version %u too low. Expecting >= %u. Aborting
update\n",
+ state->fw_version, lsv);
+ return EFI_INVALID_PARAMETER;
+ }
+
return ret;
}
--
2.34.1
[PATCH v7 04/10] efi_loader: get lowest supported version from device tree
This commit gets the lowest supported version from device tree,
then fills the lowest supported version in FMP->GetImageInfo().
Signed-off-by: Masahisa Kojima
Reviewed-by: Ilias Apalodimas
---
No update since v6
Changed in v6:
- fw_version is removed from device tree
.../firmware/firmware-version.txt | 22
lib/efi_loader/efi_firmware.c | 50 ++-
2 files changed, 71 insertions(+), 1 deletion(-)
create mode 100644 doc/device-tree-bindings/firmware/firmware-version.txt
diff --git a/doc/device-tree-bindings/firmware/firmware-version.txt
b/doc/device-tree-bindings/firmware/firmware-version.txt
new file mode 100644
index 00..ee90ce3117
--- /dev/null
+++ b/doc/device-tree-bindings/firmware/firmware-version.txt
@@ -0,0 +1,22 @@
+firmware-version bindings
+---
+
+Required properties:
+- image-type-id: guid for image blob type
+- image-index : image index
+- lowest-supported-version : lowest supported version
+
+Example:
+
+ firmware-version {
+ image1 {
+ image-type-id = "09D7CF52-0720-4710-91D1-08469B7FE9C8";
+ image-index = <1>;
+ lowest-supported-version = <3>;
+ };
+ image2 {
+ image-type-id = "5A7021F5-FEF2-48B4-AABA-832E777418C0";
+ image-index = <2>;
+ lowest-supported-version = <7>;
+ };
+ };
diff --git a/lib/efi_loader/efi_firmware.c b/lib/efi_loader/efi_firmware.c
index 5b71a2fcc9..ae631f49f7 100644
--- a/lib/efi_loader/efi_firmware.c
+++ b/lib/efi_loader/efi_firmware.c
@@ -144,6 +144,51 @@ efi_status_t EFIAPI
efi_firmware_set_package_info_unsupported(
return EFI_EXIT(EFI_UNSUPPORTED);
}
+/**
+ * efi_firmware_get_lsv_from_dtb - get lowest supported version from dtb
+ * @image_index: Image index
+ * @image_type_id: Image type id
+ * @lsv: Pointer to store the lowest supported version
+ *
+ * Read the firmware version information from dtb.
+ */
+static void efi_firmware_get_lsv_from_dtb(u8 image_index,
+ efi_guid_t *image_type_id, u32 *lsv)
+{
+ const void *fdt = gd->fdt_blob;
+ const fdt32_t *val;
+ const char *guid_str;
+ int len, offset, index;
+ int parent;
+
+ *lsv = 0;
+
+ parent = fdt_subnode_offset(fdt, 0, "firmware-version");
+ if (parent < 0)
+ return;
+
+ fdt_for_each_subnode(offset, fdt, parent) {
+ efi_guid_t guid;
+
+ guid_str = fdt_getprop(fdt, offset, "image-type-id", );
+ if (!guid_str)
+ continue;
+ uuid_str_to_bin(guid_str, guid.b, UUID_STR_FORMAT_GUID);
+
+ val = fdt_getprop(fdt, offset, "image-index", );
+ if (!val)
+ continue;
+ index = fdt32_to_cpu(*val);
+
+ if (!guidcmp(, image_type_id) && index == image_index) {
+ val = fdt_getprop(fdt, offset,
+ "lowest-supported-version", );
+ if (val)
+ *lsv = fdt32_to_cpu(*val);
+ }
+ }
+}
+
/**
* efi_firmware_fill_version_info - fill the version information
* @image_info:Image information
@@ -171,8 +216,11 @@ void efi_firmware_fill_version_info(struct
efi_firmware_image_descriptor *image_
else
image_info->version = 0;
+ efi_firmware_get_lsv_from_dtb(fw_array->image_index,
+ _array->image_type_id,
+
_info->lowest_supported_image_version);
+
image_info->version_name = NULL; /* not supported */
- image_info->lowest_supported_image_version = 0;
image_info->last_attempt_version = 0;
image_info->last_attempt_status = LAST_ATTEMPT_STATUS_SUCCESS;
}
--
2.34.1
[PATCH v7 03/10] efi_loader: versioning support in GetImageInfo
Current FMP->GetImageInfo() always return 0 for the firmware
version, user can not identify which firmware version is currently
running through the EFI interface.
This commit reads the "FmpState" EFI variable, then fills the
firmware version in FMP->GetImageInfo().
Now FMP->GetImageInfo() and ESRT have the meaningful version number.
Signed-off-by: Masahisa Kojima
Reviewed-by: Ilias Apalodimas
---
No update since v6
Changes in v6:
- create function to fill the version information
lib/efi_loader/efi_firmware.c | 41 ++-
1 file changed, 35 insertions(+), 6 deletions(-)
diff --git a/lib/efi_loader/efi_firmware.c b/lib/efi_loader/efi_firmware.c
index a798d380a3..5b71a2fcc9 100644
--- a/lib/efi_loader/efi_firmware.c
+++ b/lib/efi_loader/efi_firmware.c
@@ -144,6 +144,39 @@ efi_status_t EFIAPI
efi_firmware_set_package_info_unsupported(
return EFI_EXIT(EFI_UNSUPPORTED);
}
+/**
+ * efi_firmware_fill_version_info - fill the version information
+ * @image_info:Image information
+ * @fw_array: Pointer to size of new image
+ *
+ * Fill the version information into image_info strucrure.
+ *
+ */
+static
+void efi_firmware_fill_version_info(struct efi_firmware_image_descriptor
*image_info,
+ struct efi_fw_image *fw_array)
+{
+ u16 varname[13]; /* u"FmpState" */
+ efi_status_t ret;
+ efi_uintn_t size;
+ struct fmp_state var_state = { 0 };
+
+ efi_create_indexed_name(varname, sizeof(varname), "FmpState",
+ fw_array->image_index);
+ size = sizeof(var_state);
+ ret = efi_get_variable_int(varname, _array->image_type_id,
+ NULL, , _state, NULL);
+ if (ret == EFI_SUCCESS)
+ image_info->version = var_state.fw_version;
+ else
+ image_info->version = 0;
+
+ image_info->version_name = NULL; /* not supported */
+ image_info->lowest_supported_image_version = 0;
+ image_info->last_attempt_version = 0;
+ image_info->last_attempt_status = LAST_ATTEMPT_STATUS_SUCCESS;
+}
+
/**
* efi_fill_image_desc_array - populate image descriptor array
* @image_info_size: Size of @image_info
@@ -193,11 +226,10 @@ static efi_status_t efi_fill_image_desc_array(
image_info[i].image_index = fw_array[i].image_index;
image_info[i].image_type_id = fw_array[i].image_type_id;
image_info[i].image_id = fw_array[i].image_index;
-
image_info[i].image_id_name = fw_array[i].fw_name;
- image_info[i].version = 0; /* not supported */
- image_info[i].version_name = NULL; /* not supported */
+ efi_firmware_fill_version_info(_info[i], _array[i]);
+
image_info[i].size = 0;
image_info[i].attributes_supported =
IMAGE_ATTRIBUTE_IMAGE_UPDATABLE |
@@ -210,9 +242,6 @@ static efi_status_t efi_fill_image_desc_array(
image_info[0].attributes_setting |=
IMAGE_ATTRIBUTE_AUTHENTICATION_REQUIRED;
- image_info[i].lowest_supported_image_version = 0;
- image_info[i].last_attempt_version = 0;
- image_info[i].last_attempt_status = LAST_ATTEMPT_STATUS_SUCCESS;
image_info[i].hardware_instance = 1;
image_info[i].dependencies = NULL;
}
--
2.34.1
[PATCH v7 02/10] efi_loader: store firmware version into FmpState variable
Firmware version management is not implemented in the current
FMP protocol.
EDK II reference implementation capsule generation script inserts
the FMP Payload Header right before the payload, FMP Payload Header
contains the firmware version and lowest supported version.
This commit utilizes the FMP Payload Header, reads the header and
stores the firmware version into "FmpState" EFI non-volatile variable.
indicates the image index, since FMP protocol handles multiple
image indexes.
Note that lowest supported version included in the FMP Payload Header
is not used. If the platform uses file-based EFI variable storage,
it can be tampered. The file-based EFI variable storage is not the
right place to store the lowest supported version for anti-rollback
protection.
This change is compatible with the existing FMP implementation.
This change does not mandate the FMP Payload Header.
If no FMP Payload Header is found in the capsule file, fw_version,
lowest supported version, last attempt version and last attempt
status is 0 and this is the same behavior as existing FMP
implementation.
Signed-off-by: Masahisa Kojima
---
Changes in v7:
- simplify efi_firmware_get_fw_version() function
Changed in v6:
- only store the fw_version in the FmpState EFI variable
Changes in v4:
- move lines that are the same in both branches out of the if statement
- s/EDK2/EDK II/
- create print result function
- set last_attempt_version when capsule authentication failed
- use log_err() instead of printf()
Changes in v3:
- exclude CONFIG_FWU_MULTI_BANK_UPDATE case
- set image_type_id as a vendor field of FmpState variable
- set READ_ONLY flag for FmpState variable
- add error code for FIT image case
Changes in v2:
- modify indent
lib/efi_loader/efi_firmware.c | 164 ++
1 file changed, 145 insertions(+), 19 deletions(-)
diff --git a/lib/efi_loader/efi_firmware.c b/lib/efi_loader/efi_firmware.c
index cc650e1443..a798d380a3 100644
--- a/lib/efi_loader/efi_firmware.c
+++ b/lib/efi_loader/efi_firmware.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -36,11 +37,52 @@ struct fmp_payload_header {
u32 lowest_supported_version;
};
+/**
+ * struct fmp_state - fmp firmware update state
+ *
+ * This structure describes the state of the firmware update
+ * through FMP protocol.
+ *
+ * @fw_version:Firmware versions used
+ * @lowest_supported_version: Lowest supported version
+ * @last_attempt_version: Last attempt version
+ * @last_attempt_status: Last attempt status
+ */
+struct fmp_state {
+ u32 fw_version;
+ u32 lowest_supported_version; /* not used */
+ u32 last_attempt_version; /* not used */
+ u32 last_attempt_status; /* not used */
+};
+
__weak void set_dfu_alt_info(char *interface, char *devstr)
{
env_set("dfu_alt_info", update_info.dfu_string);
}
+/**
+ * efi_firmware_get_image_type_id - get image_type_id
+ * @image_index: image index
+ *
+ * Return the image_type_id identified by the image index.
+ *
+ * Return: pointer to the image_type_id, NULL if image_index is
invalid
+ */
+static
+efi_guid_t *efi_firmware_get_image_type_id(u8 image_index)
+{
+ int i;
+ struct efi_fw_image *fw_array;
+
+ fw_array = update_info.images;
+ for (i = 0; i < update_info.num_images; i++) {
+ if (fw_array[i].image_index == image_index)
+ return _array[i].image_type_id;
+ }
+
+ return NULL;
+}
+
/* Place holder; not supported */
static
efi_status_t EFIAPI efi_firmware_get_image_unsupported(
@@ -194,8 +236,6 @@ efi_status_t efi_firmware_capsule_authenticate(const void
**p_image,
{
const void *image = *p_image;
efi_uintn_t image_size = *p_image_size;
- u32 fmp_hdr_signature;
- struct fmp_payload_header *header;
void *capsule_payload;
efi_status_t status;
efi_uintn_t capsule_payload_size;
@@ -222,26 +262,104 @@ efi_status_t efi_firmware_capsule_authenticate(const
void **p_image,
debug("Updating capsule without authenticating.\n");
}
- fmp_hdr_signature = FMP_PAYLOAD_HDR_SIGNATURE;
- header = (void *)image;
-
- if (!memcmp(>signature, _hdr_signature,
- sizeof(fmp_hdr_signature))) {
- /*
-* When building the capsule with the scripts in
-* edk2, a FMP header is inserted above the capsule
-* payload. Compensate for this header to get the
-* actual payload that is to be updated.
-*/
- image += header->header_size;
- image_size -= header->header_size;
- }
-
*p_image = image;
*p_image_size = image_size;
return EFI_SUCCESS;
}
+/**
+ * efi_firmware_set_fmp_state_var - set FmpState variable
+ * @state: Pointer to
[PATCH v7 01/10] efi_loader: add the number of image entries in efi_capsule_update_info
The number of image array entries global variable is required
to support EFI capsule update. This information is exposed as a
num_image_type_guids variable, but this information
should be included in the efi_capsule_update_info structure.
This commit adds the num_images member in the
efi_capsule_update_info structure. All board files supporting
EFI capsule update are updated.
Signed-off-by: Masahisa Kojima
Reviewed-by: Ilias Apalodimas
---
No update since v6
Newly created in v6
arch/arm/mach-rockchip/board.c | 4 ++--
board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c| 2 +-
board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c | 2 +-
board/emulation/qemu-arm/qemu-arm.c| 2 +-
board/kontron/pitx_imx8m/pitx_imx8m.c | 2 +-
board/kontron/sl-mx8mm/sl-mx8mm.c | 2 +-
board/kontron/sl28/sl28.c | 2 +-
board/rockchip/evb_rk3399/evb-rk3399.c | 2 +-
board/sandbox/sandbox.c| 2 +-
board/socionext/developerbox/developerbox.c| 2 +-
board/st/stm32mp1/stm32mp1.c | 2 +-
board/xilinx/common/board.c| 2 +-
include/efi_loader.h | 3 ++-
lib/efi_loader/efi_firmware.c | 6 +++---
lib/fwu_updates/fwu.c | 2 +-
15 files changed, 19 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index f1f70c81d0..8daa74b3eb 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -41,7 +41,7 @@ static bool updatable_image(struct disk_partition *info)
uuid_str_to_bin(info->type_guid, image_type_guid.b,
UUID_STR_FORMAT_GUID);
- for (i = 0; i < num_image_type_guids; i++) {
+ for (i = 0; i < update_info.num_images; i++) {
if (!guidcmp(_images[i].image_type_id, _type_guid)) {
ret = true;
break;
@@ -59,7 +59,7 @@ static void set_image_index(struct disk_partition *info, int
index)
uuid_str_to_bin(info->type_guid, image_type_guid.b,
UUID_STR_FORMAT_GUID);
- for (i = 0; i < num_image_type_guids; i++) {
+ for (i = 0; i < update_info.num_images; i++) {
if (!guidcmp(_images[i].image_type_id, _type_guid)) {
fw_images[i].image_index = index;
break;
diff --git a/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c
b/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c
index 466174679e..b79a2380aa 100644
--- a/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c
+++ b/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c
@@ -54,10 +54,10 @@ struct efi_fw_image fw_images[] = {
struct efi_capsule_update_info update_info = {
.dfu_string = "mmc 2=flash-bin raw 0 0x1B00 mmcpart 1",
+ .num_images = ARRAY_SIZE(fw_images),
.images = fw_images,
};
-u8 num_image_type_guids = ARRAY_SIZE(fw_images);
#endif /* EFI_HAVE_CAPSULE_SUPPORT */
diff --git a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c
b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c
index b373e45df9..af070ec315 100644
--- a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c
+++ b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c
@@ -50,10 +50,10 @@ struct efi_fw_image fw_images[] = {
struct efi_capsule_update_info update_info = {
.dfu_string = "mmc 2=flash-bin raw 0x42 0x1D00 mmcpart 1",
+ .num_images = ARRAY_SIZE(fw_images),
.images = fw_images,
};
-u8 num_image_type_guids = ARRAY_SIZE(fw_images);
#endif /* EFI_HAVE_CAPSULE_SUPPORT */
int board_phys_sdram_size(phys_size_t *size)
diff --git a/board/emulation/qemu-arm/qemu-arm.c
b/board/emulation/qemu-arm/qemu-arm.c
index 34ed3e8ae6..dfea0d92a3 100644
--- a/board/emulation/qemu-arm/qemu-arm.c
+++ b/board/emulation/qemu-arm/qemu-arm.c
@@ -47,10 +47,10 @@ struct efi_fw_image fw_images[] = {
};
struct efi_capsule_update_info update_info = {
+ .num_images = ARRAY_SIZE(fw_images)
.images = fw_images,
};
-u8 num_image_type_guids = ARRAY_SIZE(fw_images);
#endif /* EFI_HAVE_CAPSULE_SUPPORT */
static struct mm_region qemu_arm64_mem_map[] = {
diff --git a/board/kontron/pitx_imx8m/pitx_imx8m.c
b/board/kontron/pitx_imx8m/pitx_imx8m.c
index fcda86bc1b..4548e7c1df 100644
--- a/board/kontron/pitx_imx8m/pitx_imx8m.c
+++ b/board/kontron/pitx_imx8m/pitx_imx8m.c
@@ -43,10 +43,10 @@ struct efi_fw_image fw_images[] = {
struct efi_capsule_update_info update_info = {
.dfu_string = "mmc 0=flash-bin raw 0x42 0x1000 mmcpart 1",
+ .num_images = ARRAY_SIZE(fw_images),
.images = fw_images,
};
-u8 num_image_type_guids = ARRAY_SIZE(fw_images);
#endif /* EFI_HAVE_CAPSULE_SUPPORT */
int board_early_init_f(void)
diff
[PATCH v7 00/10] FMP versioning support
Firmware version management is not implemented in the current FMP implementation. This series aims to add the versioning support in FMP. Currently, there is no way to know the current running firmware version through the EFI interface. FMP->GetImageInfo() returns always 0 for the version number. So a user can not know that expected firmware is running after the capsule update. EDK II reference implementation utilizes the FMP Payload Header inserted right before the capsule payload. U-Boot also follows the EDK II implementation. With this series applied, version number can be specified in the capsule file generation with mkeficapsule tool, then user can know the running firmware version through FMP->GetImageInfo() and ESRT. There is a design consideration for lowest supported version. If the backing storage is a file we can't trust any of that information since anyone can tamper with the file, although the variables are defined as RO. With that, we store the lowest supported version in the device tree. We can trust the information from dtb as long as the former stage boot loader verifies the image containing the dtb. The firmware version can not be stored in device tree because not all the capsule files do not have a device tree. Note that this series does not mandate the FMP Payload Header, compatible with boards that are already using the existing U-Boot FMP implementation. If no FMP Payload Header is found in the capsule file, fw_version, lowest supported version, last attempt version and last attempt status is set to 0 and this is the same behavior as existing FMP implementation. Major Changes in v7: - refactor the efi_capsule python test - add test cases for the FMP versioning Major Changes in v6: - change the location of fw_version and lowest supported version - fw_version is stored in FMP Payload Header in the capsule file - lowest_supported_version is stored in the device tree Major Changes in v5: - major design changes, versioning is implemented with device tree instead of EFI variable Major Changes in v4: - add python-based test Major Changes in v3: - exclude CONFIG_FWU_MULT Masahisa Kojima (10): efi_loader: add the number of image entries in efi_capsule_update_info efi_loader: store firmware version into FmpState variable efi_loader: versioning support in GetImageInfo efi_loader: get lowest supported version from device tree efi_loader: check lowest supported version mkeficapsule: add FMP Payload Header doc: uefi: add firmware versioning documentation doc: uefi: add anti-rollback documentation test: efi_capsule: refactor efi_capsule test test/py: efi_capsule: test for FMP versioning arch/arm/mach-rockchip/board.c| 4 +- .../imx8mp_rsb3720a1/imx8mp_rsb3720a1.c | 2 +- .../imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c | 2 +- board/emulation/qemu-arm/qemu-arm.c | 2 +- board/kontron/pitx_imx8m/pitx_imx8m.c | 2 +- board/kontron/sl-mx8mm/sl-mx8mm.c | 2 +- board/kontron/sl28/sl28.c | 2 +- board/rockchip/evb_rk3399/evb-rk3399.c| 2 +- board/sandbox/sandbox.c | 2 +- board/socionext/developerbox/developerbox.c | 2 +- board/st/stm32mp1/stm32mp1.c | 2 +- board/xilinx/common/board.c | 2 +- doc/develop/uefi/uefi.rst | 66 .../firmware/firmware-version.txt | 22 ++ doc/mkeficapsule.1| 10 + include/efi_loader.h | 3 +- lib/efi_loader/efi_firmware.c | 276 ++-- lib/fwu_updates/fwu.c | 2 +- .../tests/test_efi_capsule/capsule_common.py | 86 + test/py/tests/test_efi_capsule/conftest.py| 82 + .../test_capsule_firmware_fit.py | 213 ++--- .../test_capsule_firmware_raw.py | 301 +++--- .../test_capsule_firmware_signed_fit.py | 267 ++-- .../test_capsule_firmware_signed_raw.py | 274 ++-- test/py/tests/test_efi_capsule/version.dts| 24 ++ tools/eficapsule.h| 30 ++ tools/mkeficapsule.c | 37 ++- 27 files changed, 1046 insertions(+), 673 deletions(-) create mode 100644 doc/device-tree-bindings/firmware/firmware-version.txt create mode 100644 test/py/tests/test_efi_capsule/capsule_common.py create mode 100644 test/py/tests/test_efi_capsule/version.dts -- 2.34.1
Re: [PATCH v1 0/3] Add pcf2131 rtc support
On 5/30/2023 9:41 AM, Joy Zou wrote: Caution: This is an external email. Please take care when clicking links or opening attachments. When in doubt, report the message using the 'Report this email' button The patchset supports pcf2131 rtc. For the details, please check the patch commit log. Joy Zou (3): configs: Enable RTC pcf2131 support imx: imx93_evk: add rtc pcf2131 drivers: rtc: add pcf2131 rtc driver Please reorder your patches, with drivers as 1st, imx as 2nd, configs as 3rd to avoid bisect issue. Thanks, Peng. arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 8 + arch/arm/dts/imx93-11x11-evk.dts | 25 +++ arch/arm/dts/imx93.dtsi | 2 +- configs/imx93_11x11_evk_defconfig| 2 +- drivers/rtc/Kconfig | 10 ++ drivers/rtc/Makefile | 1 + drivers/rtc/pcf2131.c| 189 +++ 7 files changed, 235 insertions(+), 2 deletions(-) create mode 100644 drivers/rtc/pcf2131.c -- 2.37.1
Re: [PATCH v1 2/3] imx: imx93_evk: add rtc pcf2131
On 5/30/2023 9:41 AM, Joy Zou wrote:
Caution: This is an external email. Please take care when clicking links or
opening attachments. When in doubt, report the message using the 'Report this
email' button
support rtc pcf2131 for imx93.
Signed-off-by: Joy Zou
---
arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 8
arch/arm/dts/imx93-11x11-evk.dts | 25
arch/arm/dts/imx93.dtsi | 2 +-
3 files changed, 34 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
index 89e64344c6..4165a9b6b1 100644
--- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
@@ -113,6 +113,10 @@
bootph-pre-ram;
};
+ {
+ u-boot,dm-spl;
+};
Do you need rtc in SPL stage or only in U-Boot proper?
+
&{/soc@0/bus@4400/i2c@4435/pmic@25} {
bootph-pre-ram;
};
@@ -125,6 +129,10 @@
bootph-pre-ram;
};
+_lpi2c3 {
+ u-boot,dm-spl;
+};
Ditto.
+
{
phy-reset-gpios = < 16 GPIO_ACTIVE_LOW>;
phy-reset-duration = <15>;
diff --git a/arch/arm/dts/imx93-11x11-evk.dts b/arch/arm/dts/imx93-11x11-evk.dts
index b3a5a3d71e..421041757e 100644
--- a/arch/arm/dts/imx93-11x11-evk.dts
+++ b/arch/arm/dts/imx93-11x11-evk.dts
@@ -244,6 +244,24 @@
};
};
+ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <40>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_lpi2c3>;
+ pinctrl-1 = <_lpi2c3>;
+ status = "okay";
+
+ pcf2131: rtc@53 {
+ compatible = "nxp,pcf2131";
+ reg = <0x53>;
+ interrupt-parent = <>;
+ interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
+ status = "okay";
+ };
+};
+
{ /* console */
pinctrl-names = "default";
pinctrl-0 = <_uart1>;
@@ -461,6 +479,13 @@
>;
};
+ pinctrl_lpi2c3: lpi2c3grp {
+ fsl,pins = <
+ MX93_PAD_GPIO_IO28__LPI2C3_SDA
0x4b9e
+ MX93_PAD_GPIO_IO29__LPI2C3_SCL
0x4b9e
+ >;
+ };
+
pinctrl_pcal6524: pcal6524grp {
fsl,pins = <
MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e
diff --git a/arch/arm/dts/imx93.dtsi b/arch/arm/dts/imx93.dtsi
index 28026ccecc..ac4b81c02f 100644
--- a/arch/arm/dts/imx93.dtsi
+++ b/arch/arm/dts/imx93.dtsi
@@ -319,7 +319,7 @@
reg = <0x4253 0x1>;
interrupts = ;
clocks = < IMX93_CLK_LPI2C3_GATE>,
-< IMX93_CLK_LPI2C3_GATE>;
+< IMX93_CLK_BUS_WAKEUP>;
What is this change for?
Regards,
Peng.
clock-names = "per", "ipg";
status = "disabled";
};
--
2.37.1
Re: [PATCH v1 3/3] drivers: rtc: add pcf2131 rtc driver
On 5/30/2023 9:41 AM, Joy Zou wrote:
Caution: This is an external email. Please take care when clicking links or
opening attachments. When in doubt, report the message using the 'Report this
email' button
Adding support for pcf2131 RTC chip.
The pcf2131 is similar to the pcf2127. The driver support rtc register
read/write by using rtc cmd and rtc date set/get by using date cmd.
Signed-off-by: Joy Zou
---
drivers/rtc/Kconfig | 10 +++
drivers/rtc/Makefile | 1 +
drivers/rtc/pcf2131.c | 189 ++
3 files changed, 200 insertions(+)
create mode 100644 drivers/rtc/pcf2131.c
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 23173139e0..507dc6cbcb 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -64,6 +64,16 @@ config RTC_PCF2127
has a selectable I2C-bus or SPI-bus, a backup battery switch-over
circuit, a
programmable watchdog function, a timestamp function, and many other
features.
+config RTC_PCF2131
+ bool "Enable PCF2131 driver"
+ depends on DM_RTC
+ help
+ The PCF2131 is a CMOS Real Time Clock (RTC) and calendar with an
integrated
+ Temperature Compensated Crystal (Xtal) Oscillator (TCXO) and a 32.768
kHz quartz
+ crystal optimized for very high accuracy and very low power
consumption. The PCF2127
+ has a selectable I2C-bus or SPI-bus, a backup battery switch-over
circuit, a
+ programmable watchdog function, a timestamp function, and many other
features.
+
config RTC_DS1307
bool "Enable DS1307 driver"
depends on DM_RTC
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 308fab8da9..722f2be98f 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_RTC_MV) += mvrtc.o
obj-$(CONFIG_RTC_MXS) += mxsrtc.o
obj-$(CONFIG_RTC_PCF8563) += pcf8563.o
obj-$(CONFIG_RTC_PCF2127) += pcf2127.o
+obj-$(CONFIG_RTC_PCF2131) += pcf2131.o
obj-$(CONFIG_RTC_PL031) += pl031.o
obj-$(CONFIG_RTC_PT7C4338) += pt7c4338.o
obj-$(CONFIG_RTC_RV3028) += rv3028.o
diff --git a/drivers/rtc/pcf2131.c b/drivers/rtc/pcf2131.c
new file mode 100644
index 00..8b9c17a2c8
--- /dev/null
+++ b/drivers/rtc/pcf2131.c
@@ -0,0 +1,189 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * The NXP PCF2131 RTC uboot driver.
+ * Copyright 2023 NXP
+ * Date & Time support for PCF2131 RTC
+ */
+
+/* #define DEBUG */
Drop this line.
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define PCF2131_REG_CTRL1 0x00
+#define PCF2131_BIT_CTRL1_STOP BIT(5)
+#define PCF2131_BIT_CTRL1_100TH_S_DIS BIT(4)
+#define PCF2131_REG_CTRL2 0x01
+#define PCF2131_REG_CTRL3 0x02
+#define PCF2131_REG_SR_RESET0x05
+#define PCF2131_SR_VAL_Clr_Pres 0xa4
+#define PCF2131_REG_SC 0x07
+#define PCF2131_REG_MN 0x08
+#define PCF2131_REG_HR 0x09
+#define PCF2131_REG_DM 0x0a
+#define PCF2131_REG_DW 0x0b
+#define PCF2131_REG_MO 0x0c
+#define PCF2131_REG_YR 0x0d
+
+static int pcf2131_rtc_read(struct udevice *dev, uint offset, u8 *buffer, uint
len)
+{
+ struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
+ struct i2c_msg msg;
+ int ret;
+
+ /* Set the address of the start register to be read */
+ ret = dm_i2c_write(dev, offset, NULL, 0);
+ if (ret < 0)
+ return ret;
+
+ /* Read register's data */
+ msg.addr = chip->chip_addr;
+ msg.flags |= I2C_M_RD;
+ msg.len = len;
+ msg.buf = buffer;
+
+ return dm_i2c_xfer(dev, , 1);
+}
+
+static int pcf2131_rtc_lock(struct udevice *dev)
+{
+ int ret = 0;
+ uchar buf[6] = { PCF2131_REG_CTRL1 };
+
+ ret = pcf2131_rtc_read(dev, PCF2131_REG_CTRL1, buf, sizeof(buf));
+ if (ret < 0)
+ return ret;
+
+ buf[PCF2131_REG_CTRL1] |= PCF2131_BIT_CTRL1_STOP;
+ ret = dm_i2c_write(dev, PCF2131_REG_CTRL1, [PCF2131_REG_CTRL1], 1);
+ if (ret < 0)
+ return ret;
+
+ buf[PCF2131_REG_SR_RESET] = PCF2131_SR_VAL_Clr_Pres;
+ ret = dm_i2c_write(dev, PCF2131_REG_SR_RESET,
[PCF2131_REG_SR_RESET], 1);
+ return ret;
Just "return dm_i2c_write..." is ok.
+}
+
+static int pcf2131_rtc_unlock(struct udevice *dev)
+{
+ int ret = 0;
+ uchar buf[6] = { PCF2131_REG_CTRL1 };
+
+ ret = pcf2131_rtc_read(dev, PCF2131_REG_CTRL1, buf, sizeof(buf));
+ if (ret < 0)
+ return ret;
+
+ buf[PCF2131_REG_CTRL1] &= ~PCF2131_BIT_CTRL1_STOP;
+ ret = dm_i2c_write(dev, PCF2131_REG_CTRL1, [PCF2131_REG_CTRL1], 1);
+ return ret;
Ditto.
+}
+
+static int pcf2131_rtc_write(struct udevice *dev, uint offset,
+const u8 *buffer, uint len)
+{
+ int ret = 0;
+
+ ret =
Re: [PATCH 0/6] Add the 'net stats' command to dump network statistics
Hi Joe, Ramon I see this patchset is delegated to me, would you take care this patchset or let me handle? Thanks, Peng. On 5/23/2023 9:47 PM, Ioana Ciornei wrote: This patch set extends the 'net' command so that it can be used to dump network statistics on the available devices. The first user of this new API is the ldpaa_eth driver which, in the last patch, implements the 3 new callbacks added. Since the ldpaa_eth driver already had some debug printing of counters, the first 4 patches are there to extend the existing list of counters and to reorganize the code so that it fits better with the new eth_ops callbacks. Ioana Ciornei (6): net: ldpaa_eth: fix the memory layout of the dpmac_get_counters() API net: ldpaa_eth: transform dpni_statistics from a struct to a union net: ldpaa_eth: extend debug capabilities with DPNI statistics net: ldpaa_eth: extend debug capabilities with DPMAC statistics cmd: net: add a 'net stats' command to dump network statistics net: ldpaa_eth: export DPNI and DPMAC counters through 'net stats' cmd/net.c | 54 ++- drivers/net/fsl-mc/dpni.c | 2 +- drivers/net/ldpaa_eth/ldpaa_eth.c | 248 +++--- drivers/net/ldpaa_eth/ldpaa_eth.h | 64 include/fsl-mc/fsl_dpmac.h| 7 +- include/fsl-mc/fsl_dpni.h | 143 - include/net.h | 6 + 7 files changed, 353 insertions(+), 171 deletions(-) -- 2.25.1
[PATCH v2] test: bdinfo: Add test for command bdinfo
Add test for command bdinfo .
Signed-off-by: Marek Vasut
---
Cc: Jason Liu
Cc: Michal Simek
Cc: Ovidiu Panait
Cc: Simon Glass
---
V2: Fix build failure on snow, just iterate over all DRAM banks and test
them, no more macro hardcoding
---
include/test/suites.h | 1 +
test/cmd/Makefile | 1 +
test/cmd/bdinfo.c | 188 ++
test/cmd_ut.c | 6 ++
4 files changed, 196 insertions(+)
create mode 100644 test/cmd/bdinfo.c
diff --git a/include/test/suites.h b/include/test/suites.h
index 7349ce5aa60..1c7dc65966a 100644
--- a/include/test/suites.h
+++ b/include/test/suites.h
@@ -28,6 +28,7 @@ int cmd_ut_category(const char *name, const char *prefix,
int do_ut_addrmap(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[]);
+int do_ut_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const
argv[]);
int do_ut_bootm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
int do_ut_bootstd(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[]);
diff --git a/test/cmd/Makefile b/test/cmd/Makefile
index 055adc65a25..a3cf983739e 100644
--- a/test/cmd/Makefile
+++ b/test/cmd/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_CMD_PAUSE) += test_pause.o
endif
obj-y += exit.o mem.o
obj-$(CONFIG_CMD_ADDRMAP) += addrmap.o
+obj-$(CONFIG_CMD_BDI) += bdinfo.o
obj-$(CONFIG_CMD_FDT) += fdt.o
obj-$(CONFIG_CONSOLE_TRUETYPE) += font.o
obj-$(CONFIG_CMD_LOADM) += loadm.o
diff --git a/test/cmd/bdinfo.c b/test/cmd/bdinfo.c
new file mode 100644
index 000..9068df79c4f
--- /dev/null
+++ b/test/cmd/bdinfo.c
@@ -0,0 +1,188 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Tests for bdinfo command
+ *
+ * Copyright 2023 Marek Vasut
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Declare a new bdinfo test */
+#define BDINFO_TEST(_name, _flags) UNIT_TEST(_name, _flags, bdinfo_test)
+
+static void bdinfo_test_num_l(struct unit_test_state *uts,
+ const char *name, ulong value)
+{
+ ut_assert_nextline("%-12s= 0x%0*lx", name, 2 * (int)sizeof(value),
value);
+}
+
+static void bdinfo_test_num_ll(struct unit_test_state *uts,
+ const char *name, unsigned long long value)
+{
+ ut_assert_nextline("%-12s= 0x%.*llx", name, 2 * (int)sizeof(ulong),
value);
+}
+
+static void test_eth(struct unit_test_state *uts)
+{
+ const int idx = eth_get_dev_index();
+ uchar enetaddr[6];
+ char name[10];
+ int ret;
+
+ if (idx)
+ sprintf(name, "eth%iaddr", idx);
+ else
+ strcpy(name, "ethaddr");
+
+ ret = eth_env_get_enetaddr_by_index("eth", idx, enetaddr);
+
+ ut_assert_nextline("current eth = %s", eth_get_name());
+ if (!ret)
+ ut_assert_nextline("%-12s= (not set)", name);
+ else
+ ut_assert_nextline("%-12s= %pM", name, enetaddr);
+ ut_assert_nextline("IP addr = %s", env_get("ipaddr"));
+}
+
+static void test_video_info(struct unit_test_state *uts)
+{
+ const struct udevice *dev;
+ struct uclass *uc;
+
+ uclass_id_foreach_dev(UCLASS_VIDEO, dev, uc) {
+ ut_assert_nextline("%-12s= %s %sactive", "Video", dev->name,
+ device_active(dev) ? "" : "in");
+ if (device_active(dev)) {
+ struct video_priv *upriv = dev_get_uclass_priv(dev);
+ struct video_uc_plat *plat = dev_get_uclass_plat(dev);
+
+ bdinfo_test_num_ll(uts, "FB base", (ulong)upriv->fb);
+ if (upriv->copy_fb) {
+ bdinfo_test_num_ll(uts, "FB copy",
+ (ulong)upriv->copy_fb);
+ bdinfo_test_num_l(uts, " copy size",
+ plat->copy_size);
+ }
+ ut_assert_nextline("%-12s= %dx%dx%d", "FB size",
+ upriv->xsize, upriv->ysize,
+ 1 << upriv->bpix);
+ }
+ }
+}
+
+static void lmb_test_dump_region(struct unit_test_state *uts,
+struct lmb_region *rgn, char *name)
+{
+ unsigned long long base, size, end;
+ enum lmb_flags flags;
+ int i;
+
+ ut_assert_nextline(" %s.cnt = 0x%lx / max = 0x%lx", name, rgn->cnt,
rgn->max);
+
+ for (i = 0; i < rgn->cnt; i++) {
+ base = rgn->region[i].base;
+ size = rgn->region[i].size;
+ end = base + size - 1;
+ flags = rgn->region[i].flags;
+
+ ut_assert_nextline(" %s[%d]\t[0x%llx-0x%llx], 0x%08llx bytes
flags: %x",
[RFC PATCH 1/1] arm: add invalidate_dcache_all() after disable cache
From: Emanuele Ghidoli
On Cortex-R5 flushing and disabling cache is not enough to avoid
cache and memory incoherence.
In particular, when the cache is enabled after a disable, and if there
are entry in the cache the value from the cache is used instead of the
value from the memory. This, in particular, lead to stack corruption if
the stack is in a cached area.
The commit 44df5e8d30a2 ("arm: move flush_dcache_all() to just before disable
cache")
already states that following a cache disable an invalidate is expected
to be done but without coping with cache enable. So just add it explicitly.
Signed-off-by: Emanuele Ghidoli
---
arch/arm/lib/cache-cp15.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 0893915b3004..2921277d69e0 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -254,7 +254,15 @@ static void cache_disable(uint32_t cache_bit)
if (cache_bit == CR_C)
#endif
flush_dcache_all();
+
set_cr(reg & ~cache_bit);
+
+#ifdef CONFIG_SYS_ARM_MMU
+ if (cache_bit == (CR_C | CR_M))
+#elif defined(CONFIG_SYS_ARM_MPU)
+ if (cache_bit == CR_C)
+#endif
+ invalidate_dcache_all();
}
#endif
--
2.34.1
[RFC PATCH 0/1] Cache incoherent if re-enabled on Cortex-R(5)
From: Emanuele Ghidoli I want to propose this patch cause I experience weird behavior on AM62x Cortex-R U-boot spl. Seem that the stack is "restored" to the time dcache_disable was called. The effect is that the code between dcache_disable and dcache_enable is executed twice, but the second execution runs with wrong function parameters. Best regards, Emanuele Emanuele Ghidoli (1): arm: add invalidate_dcache_all() after disable cache arch/arm/lib/cache-cp15.c | 8 1 file changed, 8 insertions(+) -- 2.34.1
[PATCH] test: fix unit test build error for crc8
From: Emanuele Ghidoli
Build fail due to ENOSYS undeclared if CONFIG_SANDBOX_SDL is not defined.
Include errno.h before including test/lib.h.
Fixes: 3080ddf970b1 ("test: unit test for crc8")
Signed-off-by: Emanuele Ghidoli
---
test/lib/test_crc8.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/test/lib/test_crc8.c b/test/lib/test_crc8.c
index 0dac97bc5bfd..5037db806d09 100644
--- a/test/lib/test_crc8.c
+++ b/test/lib/test_crc8.c
@@ -5,6 +5,7 @@
* Unit test for crc8
*/
+#include
#include
#include
#include
--
2.34.1
Re: [PATCH 3/3] arm: dts: imx8mp: Sync with Linux 6.3
On Tue, May 30, 2023 at 7:35 PM Adam Ford wrote: > I have it working now. I need some time to clean my stuff and re-base > the imx8mp.dtsi file, but I can submit a patch which fixes the clocks > and re-sync's the device tree with the current stuff from kernel.org. > I should be able to get a patch series out tonight. Great work, Adam!
Re: [PATCH] arm: dts: imx8mp-beacon-kit: Enable USB Power domains
On Tue, May 30, 2023 at 7:49 PM Adam Ford wrote: > > The USB Power domains should not have been removed as it causes > the board to hang if the USB is started. > > Signed-off-by: Adam Ford Reviewed-by: Fabio Estevam
Re: [PATCH 2/2] arm: dts: imx8mp: Sync the DT with kernel 6.4-rc4
On Tue, May 30, 2023 at 7:46 PM Adam Ford wrote: > > Several changes have been made to the device tree > in the kernel, so update that as well as the > corresponding imx8mp-u-boot.dtsi files to prevent > breaking the booting. > > Signed-off-by: Adam Ford Reviewed-by: Fabio Estevam
Re: [PATCH 1/2] clk: imx8mp: Update clocks based on kernel 6.4-RC4
On Tue, May 30, 2023 at 7:46 PM Adam Ford wrote: > > There are some newer clocks added to the kernel recently, > so to fix prepare for resycing the device trees, update > the clock list. Since there are some minor changes to > the USB clocks, update which USB clocks are enabled > to match with the upstream kernel as well. > > Signed-off-by: Adam Ford Reviewed-by: Fabio Estevam
[PATCH] tools: relocate-rela: Fix typo
Position is written with one s, fix typo.
Signed-off-by: Marek Vasut
---
Cc: Michal Simek
Cc: Ovidiu Panait
Cc: Samuel Holland
---
tools/relocate-rela.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c
index fe8cd6bda98..f230ec5676c 100644
--- a/tools/relocate-rela.c
+++ b/tools/relocate-rela.c
@@ -521,7 +521,7 @@ static int rela_elf32(char **argv, FILE *f)
uint32_t pos = rela_start + sizeof(Elf32_Rela) * i;
uint32_t addr, pos_dyn;
- debug("\nPossition:\t%d/0x%x\n", i, pos);
+ debug("\nPosition:\t%d/0x%x\n", i, pos);
if (fseek(f, pos, SEEK_SET) < 0) {
fprintf(stderr, "%s: %s: seek to %" PRIx32
--
2.39.2
[PATCH] pinctrl: renesas: r8a779a0: Remove incorrect AVB[01] pinmux configuration
From: Hai Pham
AVB[01]_{MAGIC,MDC,MDIO,TXCREFCLK} are registered as both
PINMUX_SINGLE(fn) and PINMUX_IPSR_GPSR(fn) in the pinmux_data array.
The latter are correct, hence remove the former.
Without this fix, the Ethernet PHY is not operational on the MDIO bus.
Ported from Linux kernel commit a145c9a8674ac8fbfa1595276e1b6cbfc5139038 .
Signed-off-by: Hai Pham
Signed-off-by: LUU HOAI
Fixes: 741a7370fc3b8b54 ("pinctrl: renesas: Initial R8A779A0 (V3U) PFC support")
Signed-off-by: Geert Uytterhoeven
Link:
https://lore.kernel.org/r/6fd217b71e83ba9a8157513ed671a1fa218b23b6.1674824958.git.geert+rene...@glider.be
---
Cc: Geert Uytterhoeven
Cc: Hai Pham
Cc: LUU HOAI
Cc: Marek Vasut
---
drivers/pinctrl/renesas/pfc-r8a779a0.c | 8
1 file changed, 8 deletions(-)
diff --git a/drivers/pinctrl/renesas/pfc-r8a779a0.c
b/drivers/pinctrl/renesas/pfc-r8a779a0.c
index 544d7964442..0f570e4ea5e 100644
--- a/drivers/pinctrl/renesas/pfc-r8a779a0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779a0.c
@@ -699,16 +699,8 @@ static const u16 pinmux_data[] = {
PINMUX_SINGLE(PCIE0_CLKREQ_N),
PINMUX_SINGLE(AVB0_PHY_INT),
- PINMUX_SINGLE(AVB0_MAGIC),
- PINMUX_SINGLE(AVB0_MDC),
- PINMUX_SINGLE(AVB0_MDIO),
- PINMUX_SINGLE(AVB0_TXCREFCLK),
PINMUX_SINGLE(AVB1_PHY_INT),
- PINMUX_SINGLE(AVB1_MAGIC),
- PINMUX_SINGLE(AVB1_MDC),
- PINMUX_SINGLE(AVB1_MDIO),
- PINMUX_SINGLE(AVB1_TXCREFCLK),
PINMUX_SINGLE(AVB2_AVTP_PPS),
PINMUX_SINGLE(AVB2_AVTP_CAPTURE),
--
2.39.2
[PATCH 14/14] net: sh_eth: Fix RX error handling
From: Valentine Barshak
In case RX error occurs, and the RD_RFE bit is set, the descriptor
is never returned back to the queue. Make sh_eth_recv_start return
zero length in this case so that the descriptor can be released
and pushed back to the list. Also return the more appropriate
-EAGAIN instead of -EINVAL if the descriptor is not ready yet.
Signed-off-by: Valentine Barshak
Reviewed-by: Marek Vasut
---
Cc: Geert Uytterhoeven
Cc: Joe Hershberger
Cc: Michal Simek
Cc: Nishanth Menon
Cc: Ramon Fried
---
drivers/net/sh_eth.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 7314caadfdc..7b1f59dc498 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -129,11 +129,11 @@ static int sh_eth_recv_start(struct sh_eth_dev *eth)
/* Check if the rx descriptor is ready */
invalidate_cache(port_info->rx_desc_cur, sizeof(struct rx_desc_s));
if (port_info->rx_desc_cur->rd0 & RD_RACT)
- return -EINVAL;
+ return -EAGAIN;
/* Check for errors */
if (port_info->rx_desc_cur->rd0 & RD_RFE)
- return -EINVAL;
+ return 0;
return port_info->rx_desc_cur->rd1 & 0x;
}
@@ -556,15 +556,13 @@ static int sh_ether_recv(struct udevice *dev, int flags,
uchar **packetp)
*packetp = packet;
return len;
- } else {
- len = 0;
+ }
- /* Restart the receiver if disabled */
- if (!(sh_eth_read(port_info, EDRRR) & EDRRR_R))
- sh_eth_write(port_info, EDRRR_R, EDRRR);
+ /* Restart the receiver if disabled */
+ if (!(sh_eth_read(port_info, EDRRR) & EDRRR_R))
+ sh_eth_write(port_info, EDRRR_R, EDRRR);
- return -EAGAIN;
- }
+ return len;
}
static int sh_ether_free_pkt(struct udevice *dev, uchar *packet, int length)
--
2.39.2
[PATCH 13/14] net: sh_eth: Workaround cache issues
From: Valentine Barshak
U-Boot writes to RX packets when constructing replies.
This can cause stale cached data to be written to RX
buffer while we're receiving a packet. This causes RX
packet corruption because we invalidate the cache right
before processing the packet. Invalidate packet buffer
cache when preparing RX descriptor as well. This seems
to fix RX packet drops with high RX traffic.
While at it flush the descriptors right before enabling
RX/TX in sh_eth_tx_desc_init/sh_eth_rx_desc_init callbacks
when they are ready instead of flushing after allocation.
Signed-off-by: Valentine Barshak
Reviewed-by: Marek Vasut
---
Cc: Geert Uytterhoeven
Cc: Joe Hershberger
Cc: Michal Simek
Cc: Nishanth Menon
Cc: Ramon Fried
---
drivers/net/sh_eth.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 95042daade0..7314caadfdc 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -142,6 +142,8 @@ static void sh_eth_recv_finish(struct sh_eth_dev *eth)
{
struct sh_eth_info *port_info = >port_info[eth->port];
+ invalidate_cache(ADDR_TO_P2(port_info->rx_desc_cur->rd2), MAX_BUF_SIZE);
+
/* Make current descriptor available again */
if (port_info->rx_desc_cur->rd0 & RD_RDLE)
port_info->rx_desc_cur->rd0 = RD_RACT | RD_RDLE;
@@ -210,8 +212,6 @@ static int sh_eth_tx_desc_init(struct sh_eth_dev *eth)
goto err;
}
- flush_cache_wback(port_info->tx_desc_alloc, alloc_desc_size);
-
/* Make sure we use a P2 address (non-cacheable) */
port_info->tx_desc_base =
(struct tx_desc_s
*)ADDR_TO_P2((uintptr_t)port_info->tx_desc_alloc);
@@ -229,6 +229,7 @@ static int sh_eth_tx_desc_init(struct sh_eth_dev *eth)
cur_tx_desc--;
cur_tx_desc->td0 |= TD_TDLE;
+ flush_cache_wback(port_info->tx_desc_alloc, alloc_desc_size);
/*
* Point the controller to the tx descriptor list. Must use physical
* addresses
@@ -264,8 +265,6 @@ static int sh_eth_rx_desc_init(struct sh_eth_dev *eth)
goto err;
}
- flush_cache_wback(port_info->rx_desc_alloc, alloc_desc_size);
-
/* Make sure we use a P2 address (non-cacheable) */
port_info->rx_desc_base =
(struct rx_desc_s
*)ADDR_TO_P2((uintptr_t)port_info->rx_desc_alloc);
@@ -299,6 +298,9 @@ static int sh_eth_rx_desc_init(struct sh_eth_dev *eth)
cur_rx_desc--;
cur_rx_desc->rd0 |= RD_RDLE;
+ invalidate_cache(port_info->rx_buf_alloc, NUM_RX_DESC * MAX_BUF_SIZE);
+ flush_cache_wback(port_info->rx_desc_alloc, alloc_desc_size);
+
/* Point the controller to the rx descriptor list */
sh_eth_write(port_info, ADDR_TO_PHY(port_info->rx_desc_base), RDLAR);
#if defined(SH_ETH_TYPE_GETHER) || defined(SH_ETH_TYPE_RZ)
--
2.39.2
[PATCH 12/14] net: sh_eth: Drop reset GPIO handling in favor of common code
The common code is now capable of handling reset GPIO associated
with PHY. Drop the local ad-hoc code in favor of common code.
Signed-off-by: Marek Vasut
---
Cc: Geert Uytterhoeven
Cc: Joe Hershberger
Cc: Michal Simek
Cc: Nishanth Menon
Cc: Ramon Fried
---
drivers/net/Kconfig | 1 +
drivers/net/sh_eth.c | 17 -
2 files changed, 1 insertion(+), 17 deletions(-)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 48f9efcc94f..7d482cb7745 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -695,6 +695,7 @@ config SUN8I_EMAC
config SH_ETHER
bool "Renesas SH Ethernet MAC"
select PHYLIB
+ select PHY_ETHERNET_ID
help
This driver supports the Ethernet for Renesas SH and ARM SoCs.
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 14f7fd1bcc0..95042daade0 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -530,7 +530,6 @@ struct sh_ether_priv {
struct mii_dev *bus;
phys_addr_t iobase;
struct clk clk;
- struct gpio_descreset_gpio;
};
static int sh_ether_send(struct udevice *dev, void *packet, int len)
@@ -650,7 +649,6 @@ static int sh_ether_probe(struct udevice *udev)
struct eth_pdata *pdata = dev_get_plat(udev);
struct sh_ether_priv *priv = dev_get_priv(udev);
struct sh_eth_dev *eth = >shdev;
- struct ofnode_phandle_args phandle_args;
struct mii_dev *mdiodev;
int ret;
@@ -661,18 +659,6 @@ static int sh_ether_probe(struct udevice *udev)
if (ret < 0)
return ret;
#endif
-
- ret = dev_read_phandle_with_args(udev, "phy-handle", NULL, 0, 0,
_args);
- if (!ret) {
- gpio_request_by_name_nodev(phandle_args.node, "reset-gpios", 0,
- >reset_gpio, GPIOD_IS_OUT);
- }
-
- if (!dm_gpio_is_valid(>reset_gpio)) {
- gpio_request_by_name(udev, "reset-gpios", 0, >reset_gpio,
-GPIOD_IS_OUT);
- }
-
mdiodev = mdio_alloc();
if (!mdiodev) {
ret = -ENOMEM;
@@ -735,9 +721,6 @@ static int sh_ether_remove(struct udevice *udev)
mdio_unregister(priv->bus);
mdio_free(priv->bus);
- if (dm_gpio_is_valid(>reset_gpio))
- dm_gpio_free(udev, >reset_gpio);
-
return 0;
}
--
2.39.2
[PATCH 11/14] net: ravb: Drop reset GPIO handling in favor of common code
The common code is now capable of handling reset GPIO associated
with PHY. Drop the local ad-hoc code in favor of common code.
Signed-off-by: Marek Vasut
---
Cc: Geert Uytterhoeven
Cc: Joe Hershberger
Cc: Michal Simek
Cc: Nishanth Menon
Cc: Ramon Fried
---
drivers/net/Kconfig | 1 +
drivers/net/ravb.c | 22 --
2 files changed, 1 insertion(+), 22 deletions(-)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 09039a283eb..48f9efcc94f 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -764,6 +764,7 @@ config RENESAS_RAVB
bool "Renesas Ethernet AVB MAC"
depends on RCAR_64
select PHYLIB
+ select PHY_ETHERNET_ID
help
This driver implements support for the Ethernet AVB block in
Renesas M3 and H3 SoCs.
diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c
index c74c8a81f94..0bcd6cfd3f3 100644
--- a/drivers/net/ravb.c
+++ b/drivers/net/ravb.c
@@ -131,7 +131,6 @@ struct ravb_priv {
struct mii_dev *bus;
void __iomem*iobase;
struct clk_bulk clks;
- struct gpio_descreset_gpio;
};
static inline void ravb_flush_dcache(u32 addr, u32 len)
@@ -312,13 +311,6 @@ static int ravb_phy_config(struct udevice *dev)
struct phy_device *phydev;
int reg;
- if (dm_gpio_is_valid(>reset_gpio)) {
- dm_gpio_set_value(>reset_gpio, 1);
- mdelay(20);
- dm_gpio_set_value(>reset_gpio, 0);
- mdelay(1);
- }
-
phydev = phy_connect(eth->bus, -1, dev, pdata->phy_interface);
if (!phydev)
return -ENODEV;
@@ -503,7 +495,6 @@ static int ravb_probe(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_plat(dev);
struct ravb_priv *eth = dev_get_priv(dev);
- struct ofnode_phandle_args phandle_args;
struct mii_dev *mdiodev;
void __iomem *iobase;
int ret;
@@ -515,17 +506,6 @@ static int ravb_probe(struct udevice *dev)
if (ret < 0)
goto err_mdio_alloc;
- ret = dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
_args);
- if (!ret) {
- gpio_request_by_name_nodev(phandle_args.node, "reset-gpios", 0,
- >reset_gpio, GPIOD_IS_OUT);
- }
-
- if (!dm_gpio_is_valid(>reset_gpio)) {
- gpio_request_by_name(dev, "reset-gpios", 0, >reset_gpio,
-GPIOD_IS_OUT);
- }
-
mdiodev = mdio_alloc();
if (!mdiodev) {
ret = -ENOMEM;
@@ -576,8 +556,6 @@ static int ravb_remove(struct udevice *dev)
free(eth->phydev);
mdio_unregister(eth->bus);
mdio_free(eth->bus);
- if (dm_gpio_is_valid(>reset_gpio))
- dm_gpio_free(dev, >reset_gpio);
unmap_physmem(eth->iobase, MAP_NOCACHE);
return 0;
--
2.39.2
[PATCH 10/14] net: phy: Handle reset-delay-us/reset-post-delay-us properties
These two properties are used by various DTs in place of
current reset-assert-us/reset-deassert-us , handle both .
Signed-off-by: Marek Vasut
---
Cc: Geert Uytterhoeven
Cc: Joe Hershberger
Cc: Michal Simek
Cc: Nishanth Menon
Cc: Ramon Fried
---
drivers/net/eth-phy-uclass.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/net/eth-phy-uclass.c b/drivers/net/eth-phy-uclass.c
index 231bad66514..9d1e8d38ffa 100644
--- a/drivers/net/eth-phy-uclass.c
+++ b/drivers/net/eth-phy-uclass.c
@@ -144,6 +144,14 @@ static int eth_phy_of_to_plat(struct udevice *dev)
uc_priv->reset_assert_delay = dev_read_u32_default(dev,
"reset-assert-us", 0);
uc_priv->reset_deassert_delay = dev_read_u32_default(dev,
"reset-deassert-us", 0);
+ /* These are used by some DTs, try these as a fallback. */
+ if (!uc_priv->reset_assert_delay && !uc_priv->reset_deassert_delay) {
+ uc_priv->reset_assert_delay =
+ dev_read_u32_default(dev, "reset-delay-us", 0);
+ uc_priv->reset_deassert_delay =
+ dev_read_u32_default(dev, "reset-post-delay-us", 0);
+ }
+
return 0;
}
--
2.39.2
[PATCH 09/14] net: phy: Bind ETH_PHY uclass driver to each new PHY
In case a new PHY is created and DM_ETH_PHY is enabled, bind a
generic PHY driver from ETH_PHY uclass to the PHY to have a
matching DM representation of that PHY.
Signed-off-by: Marek Vasut
---
Cc: Geert Uytterhoeven
Cc: Joe Hershberger
Cc: Michal Simek
Cc: Nishanth Menon
Cc: Ramon Fried
---
drivers/net/phy/ethernet_id.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/net/phy/ethernet_id.c b/drivers/net/phy/ethernet_id.c
index a715e83db98..877a51c3d00 100644
--- a/drivers/net/phy/ethernet_id.c
+++ b/drivers/net/phy/ethernet_id.c
@@ -7,6 +7,8 @@
#include
#include
+#include
+#include
#include
#include
#include
@@ -17,6 +19,8 @@ struct phy_device *phy_connect_phy_id(struct mii_dev *bus,
struct udevice *dev,
struct phy_device *phydev;
struct ofnode_phandle_args phandle_args;
struct gpio_desc gpio;
+ const char *node_name;
+ struct udevice *pdev;
ofnode node;
u32 id, assert, deassert;
u16 vendor, device;
@@ -72,5 +76,18 @@ struct phy_device *phy_connect_phy_id(struct mii_dev *bus,
struct udevice *dev,
if (phydev)
phydev->node = node;
+ if (IS_ENABLED(CONFIG_DM_ETH_PHY) && ofnode_valid(node)) {
+ node_name = ofnode_get_name(node);
+ ret = device_bind_driver_to_node(dev, "eth_phy_generic_drv",
+node_name, node,
+);
+ if (ret)
+ return NULL;
+
+ ret = device_probe(pdev);
+ if (ret)
+ return NULL;
+ }
+
return phydev;
}
--
2.39.2
[PATCH 08/14] net: phy: Unpublish phy_connect_dev()
The phy_connect_dev() is legacy API, now that there are no users,
make it internal to phy.c and unpublish it from headers.
Signed-off-by: Marek Vasut
---
Cc: Geert Uytterhoeven
Cc: Joe Hershberger
Cc: Michal Simek
Cc: Nishanth Menon
Cc: Ramon Fried
---
drivers/net/phy/phy.c | 4 ++--
include/phy.h | 9 -
2 files changed, 2 insertions(+), 11 deletions(-)
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 0eeb0cb3a85..ae21acb059b 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -812,8 +812,8 @@ struct phy_device *phy_find_by_mask(struct mii_dev *bus,
uint phy_mask)
return get_phy_device_by_mask(bus, phy_mask);
}
-void phy_connect_dev(struct phy_device *phydev, struct udevice *dev,
-phy_interface_t interface)
+static void phy_connect_dev(struct phy_device *phydev, struct udevice *dev,
+ phy_interface_t interface)
{
/* Soft Reset the PHY */
phy_reset(phydev);
diff --git a/include/phy.h b/include/phy.h
index 247223d92be..f023a3c2685 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -223,15 +223,6 @@ static inline struct phy_device *fixed_phy_create(ofnode
node)
#endif
-/**
- * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
- * @phydev:PHY device
- * @dev: Ethernet device
- * @interface: type of MAC-PHY interface
- */
-void phy_connect_dev(struct phy_device *phydev, struct udevice *dev,
-phy_interface_t interface);
-
/**
* phy_connect() - Creates a PHY device for the Ethernet interface
* Creates a PHY device for the PHY at the given address, if one doesn't exist
--
2.39.2
[PATCH 07/14] net: sunxi_emac: Switch to new U-Boot PHY API
Use new U-Boot phy_connect() API which also supports fixed PHYs.
Signed-off-by: Marek Vasut
---
Cc: Geert Uytterhoeven
Cc: Joe Hershberger
Cc: Michal Simek
Cc: Nishanth Menon
Cc: Ramon Fried
---
drivers/net/sunxi_emac.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/net/sunxi_emac.c b/drivers/net/sunxi_emac.c
index ad9e1abd161..4c90d4b4981 100644
--- a/drivers/net/sunxi_emac.c
+++ b/drivers/net/sunxi_emac.c
@@ -248,10 +248,10 @@ static int emac_mdio_write(struct mii_dev *bus, int addr,
int devad, int reg,
static int sunxi_emac_init_phy(struct emac_eth_dev *priv, void *dev)
{
- int ret, mask = 0x;
+ int ret, mask = -1;
#ifdef CONFIG_PHY_ADDR
- mask = 1 << CONFIG_PHY_ADDR;
+ mask = CONFIG_PHY_ADDR;
#endif
priv->bus = mdio_alloc();
@@ -269,11 +269,10 @@ static int sunxi_emac_init_phy(struct emac_eth_dev *priv,
void *dev)
if (ret)
return ret;
- priv->phydev = phy_find_by_mask(priv->bus, mask);
+ priv->phydev = phy_connect(priv->bus, mask, dev,
PHY_INTERFACE_MODE_MII);
if (!priv->phydev)
return -ENODEV;
- phy_connect_dev(priv->phydev, dev, PHY_INTERFACE_MODE_MII);
phy_config(priv->phydev);
return 0;
--
2.39.2
[PATCH 06/14] net: sh_eth: Switch to new U-Boot PHY API
Use new U-Boot phy_connect() API which also supports fixed PHYs. Signed-off-by: Marek Vasut --- Cc: Geert Uytterhoeven Cc: Joe Hershberger Cc: Michal Simek Cc: Nishanth Menon Cc: Ramon Fried --- drivers/net/sh_eth.c | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 8f162ca58fb..14f7fd1bcc0 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -601,14 +601,11 @@ static int sh_eth_phy_config(struct udevice *dev) int ret = 0; struct sh_eth_info *port_info = >port_info[eth->port]; struct phy_device *phydev; - int mask = 0x; - phydev = phy_find_by_mask(priv->bus, mask); + phydev = phy_connect(priv->bus, -1, dev, pdata->phy_interface); if (!phydev) return -ENODEV; - phy_connect_dev(phydev, dev, pdata->phy_interface); - port_info->phydev = phydev; phy_config(phydev); -- 2.39.2
[PATCH 05/14] net: pch_gbe: Switch to new U-Boot PHY API
Use new U-Boot phy_connect() API which also supports fixed PHYs.
Signed-off-by: Marek Vasut
---
Cc: Geert Uytterhoeven
Cc: Joe Hershberger
Cc: Michal Simek
Cc: Nishanth Menon
Cc: Ramon Fried
---
drivers/net/pch_gbe.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/net/pch_gbe.c b/drivers/net/pch_gbe.c
index ad7b5b8e99b..ecf8c28fe41 100644
--- a/drivers/net/pch_gbe.c
+++ b/drivers/net/pch_gbe.c
@@ -414,16 +414,13 @@ static int pch_gbe_phy_init(struct udevice *dev)
struct pch_gbe_priv *priv = dev_get_priv(dev);
struct eth_pdata *plat = dev_get_plat(dev);
struct phy_device *phydev;
- int mask = 0x;
- phydev = phy_find_by_mask(priv->bus, mask);
+ phydev = phy_connect(priv->bus, -1, dev, plat->phy_interface);
if (!phydev) {
printf("pch_gbe: cannot find the phy\n");
return -1;
}
- phy_connect_dev(phydev, dev, plat->phy_interface);
-
phydev->supported &= PHY_GBIT_FEATURES;
phydev->advertising = phydev->supported;
--
2.39.2
[PATCH 03/14] net: ave: Switch to new U-Boot PHY API
Use new U-Boot phy_connect() API which also supports fixed PHYs.
Signed-off-by: Marek Vasut
---
Cc: Geert Uytterhoeven
Cc: Joe Hershberger
Cc: Michal Simek
Cc: Nishanth Menon
Cc: Ramon Fried
---
drivers/net/sni_ave.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/net/sni_ave.c b/drivers/net/sni_ave.c
index 014b070d9e5..f5a0d80af7a 100644
--- a/drivers/net/sni_ave.c
+++ b/drivers/net/sni_ave.c
@@ -391,14 +391,12 @@ static int ave_mdiobus_init(struct ave_private *priv,
const char *name)
static int ave_phy_init(struct ave_private *priv, void *dev)
{
struct phy_device *phydev;
- int mask = GENMASK(31, 0), ret;
+ int ret;
- phydev = phy_find_by_mask(priv->bus, mask);
+ phydev = phy_connect(priv->bus, -1, dev, priv->phy_mode);
if (!phydev)
return -ENODEV;
- phy_connect_dev(phydev, dev, priv->phy_mode);
-
phydev->supported &= PHY_GBIT_FEATURES;
if (priv->max_speed) {
ret = phy_set_supported(phydev, priv->max_speed);
--
2.39.2
[PATCH 04/14] net: ethoc: Switch to new U-Boot PHY API
Use new U-Boot phy_connect() API which also supports fixed PHYs.
Signed-off-by: Marek Vasut
---
Cc: Geert Uytterhoeven
Cc: Joe Hershberger
Cc: Michal Simek
Cc: Nishanth Menon
Cc: Ramon Fried
---
drivers/net/ethoc.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethoc.c b/drivers/net/ethoc.c
index 29067e9e949..13fad8119bb 100644
--- a/drivers/net/ethoc.c
+++ b/drivers/net/ethoc.c
@@ -608,18 +608,16 @@ static int ethoc_mdio_init(const char *name, struct ethoc
*priv)
static int ethoc_phy_init(struct ethoc *priv, void *dev)
{
struct phy_device *phydev;
- int mask = 0x;
+ int mask = -1;
#ifdef CONFIG_PHY_ADDR
- mask = 1 << CONFIG_PHY_ADDR;
+ mask = CONFIG_PHY_ADDR;
#endif
- phydev = phy_find_by_mask(priv->bus, mask);
+ phydev = phy_connect(priv->bus, mask, dev, PHY_INTERFACE_MODE_MII);
if (!phydev)
return -ENODEV;
- phy_connect_dev(phydev, dev, PHY_INTERFACE_MODE_MII);
-
phydev->supported &= PHY_BASIC_FEATURES;
phydev->advertising = phydev->supported;
--
2.39.2
[PATCH 02/14] net: altera_tsa: Switch to new U-Boot PHY API
Use new U-Boot phy_connect() API which also supports fixed PHYs.
Signed-off-by: Marek Vasut
---
Cc: Geert Uytterhoeven
Cc: Joe Hershberger
Cc: Michal Simek
Cc: Nishanth Menon
Cc: Ramon Fried
---
drivers/net/altera_tse.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/net/altera_tse.c b/drivers/net/altera_tse.c
index 912d28fca2e..e2340936fa6 100644
--- a/drivers/net/altera_tse.c
+++ b/drivers/net/altera_tse.c
@@ -430,17 +430,11 @@ static int tse_mdio_init(const char *name, struct
altera_tse_priv *priv)
static int tse_phy_init(struct altera_tse_priv *priv, void *dev)
{
struct phy_device *phydev;
- unsigned int mask = 0x;
- if (priv->phyaddr)
- mask = 1 << priv->phyaddr;
-
- phydev = phy_find_by_mask(priv->bus, mask);
+ phydev = phy_connect(priv->bus, -1, dev, priv->interface);
if (!phydev)
return -ENODEV;
- phy_connect_dev(phydev, dev, priv->interface);
-
phydev->supported &= PHY_GBIT_FEATURES;
phydev->advertising = phydev->supported;
--
2.39.2
[PATCH 01/14] net: eth-phy: staticize eth_phy_reset()
The eth_phy_reset() is not used outside of this file, staticize it.
No functional change.
Signed-off-by: Marek Vasut
---
Cc: Geert Uytterhoeven
Cc: Joe Hershberger
Cc: Michal Simek
Cc: Nishanth Menon
Cc: Ramon Fried
---
drivers/net/eth-phy-uclass.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/eth-phy-uclass.c b/drivers/net/eth-phy-uclass.c
index 27b77444a0c..231bad66514 100644
--- a/drivers/net/eth-phy-uclass.c
+++ b/drivers/net/eth-phy-uclass.c
@@ -147,7 +147,7 @@ static int eth_phy_of_to_plat(struct udevice *dev)
return 0;
}
-void eth_phy_reset(struct udevice *dev, int value)
+static void eth_phy_reset(struct udevice *dev, int value)
{
struct eth_phy_device_priv *uc_priv = dev_get_uclass_priv(dev);
u32 delay;
--
2.39.2
[PATCH] ARM: renesas: Enable DM_ETH_PHY and SMSC PHY driver
The board comes with SMSC LAN8710A PHY, enable matching driver. Enable DM_ETH_PHY in the process to start using DM drivers more. Signed-off-by: Marek Vasut --- Cc: Geert Uytterhoeven Cc: Joe Hershberger Cc: Michal Simek Cc: Nishanth Menon Cc: Ramon Fried --- configs/grpeach_defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/configs/grpeach_defconfig b/configs/grpeach_defconfig index 04edcf34f23..36925f3e47c 100644 --- a/configs/grpeach_defconfig +++ b/configs/grpeach_defconfig @@ -52,6 +52,9 @@ CONFIG_SPI_FLASH_MACRONIX=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_BITBANGMII=y CONFIG_BITBANGMII_MULTI=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_ETHERNET_ID=y +CONFIG_DM_ETH_PHY=y CONFIG_SH_ETHER=y CONFIG_PINCTRL=y CONFIG_DM_REGULATOR=y -- 2.39.2
[PATCH] ARM: dts: renesas: Add compatible properties to LAN8710A Ethernet PHYs
From: Geert Uytterhoeven
Add compatible values to Ethernet PHY subnodes representing SMSC
LAN8710A PHYs on RZ/A1 and R-Mobile A1 boards. This allows software to
identify the PHY model at any time, regardless of the state of the PHY
reset line.
Ported from Linux kernel commit 1c65ef1c71e473c00f2a7a1b9c140f0b4862f282 .
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Andrew Lunn
Link:
https://lore.kernel.org/r/247dc2074dae149af07b6d014985ad30eb362eda.1631174218.git.geert+rene...@glider.be
---
Cc: Geert Uytterhoeven
Cc: Joe Hershberger
Cc: Michal Simek
Cc: Nishanth Menon
Cc: Ramon Fried
---
arch/arm/dts/r7s72100-gr-peach.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/dts/r7s72100-gr-peach.dts
b/arch/arm/dts/r7s72100-gr-peach.dts
index fe1a4aa4d7c..70d034c26dd 100644
--- a/arch/arm/dts/r7s72100-gr-peach.dts
+++ b/arch/arm/dts/r7s72100-gr-peach.dts
@@ -126,6 +126,8 @@
phy-handle = <>;
phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-id0007.c0f0",
+"ethernet-phy-ieee802.3-c22";
reg = <0>;
reset-gpios = < 2 GPIO_ACTIVE_LOW>;
--
2.39.2
[PATCH] arm: dts: imx8mp-beacon-kit: Enable USB Power domains
The USB Power domains should not have been removed as it causes
the board to hang if the USB is started.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
index 5ca631e9d8..b56f3a2bd2 100644
--- a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
@@ -185,12 +185,10 @@
_0 {
dma-ranges = <0x4000 0x4000 0xc000>;
- /delete-property/ power-domains;
};
_1 {
dma-ranges = <0x4000 0x4000 0xc000>;
- /delete-property/ power-domains;
};
_dwc3_0 {
--
2.39.2
[PATCH 2/2] arm: dts: imx8mp: Sync the DT with kernel 6.4-rc4
Several changes have been made to the device tree
in the kernel, so update that as well as the
corresponding imx8mp-u-boot.dtsi files to prevent
breaking the booting.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/imx8mp-u-boot.dtsi b/arch/arm/dts/imx8mp-u-boot.dtsi
index 18d1728e1d..dfb747bb02 100644
--- a/arch/arm/dts/imx8mp-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-u-boot.dtsi
@@ -44,6 +44,9 @@
{
bootph-pre-ram;
+ spba-bus@3080 {
+ bootph-pre-ram;
+ };
};
{
diff --git a/arch/arm/dts/imx8mp.dtsi b/arch/arm/dts/imx8mp.dtsi
index bb916a0948..428c60462e 100644
--- a/arch/arm/dts/imx8mp.dtsi
+++ b/arch/arm/dts/imx8mp.dtsi
@@ -123,6 +123,7 @@
A53_L2: l2-cache0 {
compatible = "cache";
+ cache-unified;
cache-level = <2>;
cache-size = <0x8>;
cache-line-size = <64>;
@@ -379,6 +380,8 @@
compatible = "fsl,imx8mp-tmu";
reg = <0x3026 0x1>;
clocks = < IMX8MP_CLK_TSENSOR_ROOT>;
+ nvmem-cells = <_calib>;
+ nvmem-cell-names = "calib";
#thermal-sensor-cells = <1>;
};
@@ -406,12 +409,36 @@
status = "disabled";
};
+ gpt1: timer@302d {
+ compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+ reg = <0x302d 0x1>;
+ interrupts = ;
+ clocks = < IMX8MP_CLK_GPT1_ROOT>, <
IMX8MP_CLK_GPT1>;
+ clock-names = "ipg", "per";
+ };
+
+ gpt2: timer@302e {
+ compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+ reg = <0x302e 0x1>;
+ interrupts = ;
+ clocks = < IMX8MP_CLK_GPT2_ROOT>, <
IMX8MP_CLK_GPT2>;
+ clock-names = "ipg", "per";
+ };
+
+ gpt3: timer@302f {
+ compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+ reg = <0x302f 0x1>;
+ interrupts = ;
+ clocks = < IMX8MP_CLK_GPT3_ROOT>, <
IMX8MP_CLK_GPT3>;
+ clock-names = "ipg", "per";
+ };
+
iomuxc: pinctrl@3033 {
compatible = "fsl,imx8mp-iomuxc";
reg = <0x3033 0x1>;
};
- gpr: iomuxc-gpr@3034 {
+ gpr: syscon@3034 {
compatible = "fsl,imx8mp-iomuxc-gpr", "syscon";
reg = <0x3034 0x1>;
};
@@ -424,27 +451,44 @@
#address-cells = <1>;
#size-cells = <1>;
- imx8mp_uid: unique-id@420 {
+ /*
+* The register address below maps to the MX8M
+* Fusemap Description Table entries this way.
+* Assuming
+* reg = ;
+* then
+* Fuse Address = (ADDR * 4) + 0x400
+* Note that if SIZE is greater than 4, then
+* each subsequent fuse is located at offset
+* +0x10 in Fusemap Description Table (e.g.
+* reg = <0x8 0x8> describes fuses 0x420 and
+* 0x430).
+*/
+ imx8mp_uid: unique-id@8 { /* 0x420-0x430 */
reg = <0x8 0x8>;
};
- cpu_speed_grade: speed-grade@10 {
+ cpu_speed_grade: speed-grade@10 { /* 0x440 */
reg = <0x10 4>;
};
- eth_mac1: mac-address@90 {
+ eth_mac1: mac-address@90 { /* 0x640 */
reg = <0x90 6>;
};
- eth_mac2: mac-address@96 {
+ eth_mac2: mac-address@96 { /* 0x658 */
reg = <0x96 6>;
[PATCH 1/2] clk: imx8mp: Update clocks based on kernel 6.4-RC4
There are some newer clocks added to the kernel recently,
so to fix prepare for resycing the device trees, update
the clock list. Since there are some minor changes to
the USB clocks, update which USB clocks are enabled
to match with the upstream kernel as well.
Signed-off-by: Adam Ford
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index 09bef596f2..a21a3ce34b 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -337,7 +337,8 @@ static int imx8mp_clk_probe(struct udevice *dev)
clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk", "uart2",
base + 0x44a0, 0));
clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk", "uart3",
base + 0x44b0, 0));
clk_dm(IMX8MP_CLK_UART4_ROOT, imx_clk_gate4("uart4_root_clk", "uart4",
base + 0x44c0, 0));
- clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk",
"usb_core_ref", base + 0x44d0, 0));
+ clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate2("usb_root_clk", "hsio_axi",
base + 0x44d0, 0));
+ clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate2("usb_suspend_clk",
"clock-osc-24m", base + 0x44d0, 0));
clk_dm(IMX8MP_CLK_USB_PHY_ROOT, imx_clk_gate4("usb_phy_root_clk",
"usb_phy_ref", base + 0x44f0, 0));
clk_dm(IMX8MP_CLK_USDHC1_ROOT, imx_clk_gate4("usdhc1_root_clk",
"usdhc1", base + 0x4510, 0));
clk_dm(IMX8MP_CLK_USDHC2_ROOT, imx_clk_gate4("usdhc2_root_clk",
"usdhc2", base + 0x4520, 0));
diff --git a/include/dt-bindings/clock/imx8mp-clock.h
b/include/dt-bindings/clock/imx8mp-clock.h
index 9d5cc2ddde..3f28ce685f 100644
--- a/include/dt-bindings/clock/imx8mp-clock.h
+++ b/include/dt-bindings/clock/imx8mp-clock.h
@@ -324,8 +324,18 @@
#define IMX8MP_CLK_CLKOUT2_SEL 317
#define IMX8MP_CLK_CLKOUT2_DIV 318
#define IMX8MP_CLK_CLKOUT2 319
-
-#define IMX8MP_CLK_END 320
+#define IMX8MP_CLK_USB_SUSP320
+#define IMX8MP_CLK_AUDIO_AHB_ROOT IMX8MP_CLK_AUDIO_ROOT
+#define IMX8MP_CLK_AUDIO_AXI_ROOT 321
+#define IMX8MP_CLK_SAI1_ROOT 322
+#define IMX8MP_CLK_SAI2_ROOT 323
+#define IMX8MP_CLK_SAI3_ROOT 324
+#define IMX8MP_CLK_SAI5_ROOT 325
+#define IMX8MP_CLK_SAI6_ROOT 326
+#define IMX8MP_CLK_SAI7_ROOT 327
+#define IMX8MP_CLK_PDM_ROOT328
+#define IMX8MP_CLK_MEDIA_LDB_ROOT 329
+#define IMX8MP_CLK_END 330
#define IMX8MP_CLK_AUDIOMIX_SAI1_IPG 0
#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1 1
--
2.39.2
Re: [PATCH 3/3] arm: dts: imx8mp: Sync with Linux 6.3
On Tue, May 30, 2023 at 1:40 PM Tim Harvey wrote:
>
> On Tue, May 30, 2023 at 10:28 AM Adam Ford wrote:
> >
> > On Tue, May 30, 2023 at 12:23 PM Tim Harvey wrote:
> > >
> > > On Mon, May 29, 2023 at 10:45 AM Adam Ford wrote:
> > > >
> > > > On Wed, May 24, 2023 at 9:02 PM Fabio Estevam
> > > > wrote:
> > > > >
> > > > > Hi Tim,
> > > > >
> > > > > On Fri, May 19, 2023 at 8:00 PM Tim Harvey
> > > > > wrote:
> > > > >
> > > > > > Fabio,
> > > >
> > > > + Marek
> > > > I am adding Marek since he did the HSIO power domain driver.
> > > >
> > > > > >
> > > > > > There's more to be done here also. With this patch, and with the
> > > > > > spba-bus added to u-boot.dtsi, if you try to enable usb (usb start)
> > > > > > you get:
> > > > > > starting USB...
> > > > > > Bus usb@3820:
> > > > > > Enable clock-controller@3038 failed
> > > > > > probe failed, error -2
> > > > > > No working controllers found
> > > > >
> > > > > Does this help?
> > > >
> > > > A bit. I finally got some time to try to troubleshoot USB on my 8MP.
> > > >
> > > > >
> > > > > --- a/drivers/clk/imx/clk-imx8mp.c
> > > > > +++ b/drivers/clk/imx/clk-imx8mp.c
> > > > > @@ -337,8 +337,8 @@ static int imx8mp_clk_probe(struct udevice *dev)
> > > > > clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk",
> > > > > "uart2", base + 0x44a0, 0));
> > > > > clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk",
> > > > > "uart3", base + 0x44b0, 0));
> > > > > clk_dm(IMX8MP_CLK_UART4_ROOT, imx_clk_gate4("uart4_root_clk",
> > > > > "uart4", base + 0x44c0, 0));
> > > > > - clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk",
> > > > > "usb_core_ref", base + 0x44d0, 0));
> > > > > - clk_dm(IMX8MP_CLK_USB_PHY_ROOT,
> > > >
> > > > IMX8MP_CLK_USB_PHY_ROOT is also referenced in the device tree, so I
> > > > don't think we can delete it. I had keep IMX8MP_CLK_USB_ROOT, and
> > > > IMX8MP_CLK_USB_PHY_ROOT while also adding IMX8MP_CLK_USB_SUSP.
> > > >
> > > > > imx_clk_gate4("usb_phy_root_clk", "usb_phy_ref", base + 0x44f0, 0));
> > > > > + clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk",
> > > > > "hsio_axi", base + 0x44d0, 0));
> > > > > + clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate4("usb_suspend_clk",
> > > > > "osc_32k", base + 0x44d0, 0));
> > > > > clk_dm(IMX8MP_CLK_USDHC1_ROOT,
> > > > > imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0));
> > > > > clk_dm(IMX8MP_CLK_USDHC2_ROOT,
> > > > > imx_clk_gate4("usdhc2_root_clk", "usdhc2", base + 0x4520, 0));
> > > > > clk_dm(IMX8MP_CLK_WDOG1_ROOT, imx_clk_gate4("wdog1_root_clk",
> > > > > "wdog", base + 0x4530, 0));
> > > >
> > > > At this point, the missing clock errors go away, but it hangs. I
> > > > updated my 8MP USB clocks based on the latest Linux kernel so my
> > > > clocks looks like:
> > > >
> > > > clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate2("usb_root_clk", "hsio_axi",
> > > > base + 0x44d0, 0));
> > > > clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate2("usb_suspend_clk",
> > > > "clock-osc-24m", base + 0x44d0, 0));
> > > > clk_dm(IMX8MP_CLK_USB_PHY_ROOT, imx_clk_gate4("usb_phy_root_clk",
> > > > "usb_phy_ref", base + 0x44f0, 0));
> > > >
> > > > The linux kernel uses gate2 for USB_ROOT and USB_SUSP while gate4 is
> > > > used for IMX8MP_CLK_USB_PHY_ROOT. I didn't verify this against the
> > > > reference manual.
> > > >
> > > > With some debugging enabled, it looks to me like it might be
> > > > power-domain related, but I am not 100% certain.
> > > > When I start the USB, it appears to go through some clocks, and start
> > > > one power domain, but I think we have a power-domain chain where one
> > > > power domain starts another. I saw a patch on another thread for
> > > > enabling parent power-domains, but it didn't seem to help me.
> > > >
> > > > u-boot=> usb start
> > > > starting USB...
> > > > Bus usb@3820: ofnode_read_prop: maximum-speed:
> > > > ofnode_read_prop: dr_mode: host
> > > > dev_power_domain_on usb@32f10108
> > > > ofnode_read_prop: assigned-clock-rates:
> > > > Looking for clock-controller@3038
> > > > Looking for clock-controller@3038
> > > >- result for clock-controller@3038: clock-controller@3038
> > > > (ret=0)
> > > >- result for clock-controller@3038: clock-controller@3038
> > > > (ret=0)
> > > > Looking for clock-controller@3038
> > > > Looking for clock-controller@3038
> > > >- result for clock-controller@3038: clock-controller@3038
> > > > (ret=0)
> > > >- result for clock-controller@3038: clock-controller@3038
> > > > (ret=0)
> > > > ofnode_read_prop: dr_mode: host
> > > >
> > > >
> > > >
> > > > I added some debug code to the imx8mp_hsiomix_on in HSIOmix power
> > > > domain driver, and it doesn't appear to be getting called, yet
> > > > dev_power_domain_on usb@32f10108 should be invoking it.
> > > >
> > > > I am not positive it's a power domain issue, that's my first guess.
> > >
Re: [PATCH] arm: mach-k3: security: separate out validating binary logic
On Thu, May 18, 2023 at 12:44:17PM +0530, Manorit Chawdhry wrote:
> K3 GP devices allows booting the secure binaries on them by bypassing
> the x509 header on them.
>
> ATF and OPTEE firewalling required the rproc_load to be called before
> authentication. This change caused the failure for GP devices that
> strips off the headers. The boot vector had been set before the headers
> were stripped off causing the runtime stripping to fail and stripping
> becoming in-effective.
>
> Separate out the secure binary check on GP/HS devices so that the
> boot_vector could be stripped before calling rproc_load. This allows
> keeping the authentication later when the cluster is on along with
> allowing the stripping of the binaries in case of gp devices.
>
> Fixes: 1e00e9be62e5 ("arm: mach-k3: common: re-locate authentication for
> atf/optee")
>
> Signed-off-by: Manorit Chawdhry
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH tiU23.04 PATCH v7 4/4] arm: mach-k3: Increase SYSFW max image size
On Tue, May 16, 2023 at 10:24:37AM +0530, Manorit Chawdhry wrote: > From: Dave Gerlach > > When booting with HS silicon, the system firmware image is 278270, which > is slightly larger than currently allocated amount. > > This can cause unexpected behavior if this overlap interferes with other > things in memory, so increase this with a slightly margin added as well > to avoid any boot issues that can appear after system firmware gets > loaded. > > Signed-off-by: Dave Gerlach > Signed-off-by: Tero Kristo > Signed-off-by: Manorit Chawdhry > Reviewed-by: Dhruva Gole Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH tiU23.04 PATCH v7 3/4] Kconfig: j721e: Change K3_MCU_SCRATCHPAD_BASE to non firewalled region
On Tue, May 16, 2023 at 10:24:36AM +0530, Manorit Chawdhry wrote:
> In non-combined boot flow for K3, all the firewalls are locked by default
> until sysfw comes up. Rom configures some of the firewall for its usage
> along with the SRAM for R5 but the PSRAM region is still locked.
>
> The K3 MCU Scratchpad for j721e was set to a PSRAM region triggering the
> firewall exception before sysfw came up. The exception started happening
> after adding multi dtb support that accesses the scratchpad for reading
> EEPROM contents.
>
> The commit changes R5 MCU scratchpad for j721e to an SRAM region.
>
> Old Map:
> ┌─┐ 0x41c0
> │ SPL │
> ├─┤ 0x41c4 (approx)
> │STACK│
> ├─┤ 0x41c85b20
> │ Global data │
> │ sizeof(struct global_data) = 0xd8 │
> ├─┤ gd->malloc_base = 0x41c85bfc
> │HEAP │
> │ CONFIG_SYS_MALLOC_F_LEN = 0x7 │
> ├─┤ CONFIG_SPL_BSS_START_ADDR
> │ SPL BSS │ (0x41cf5bfc)
> │ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │
> └─┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX
> (0x41cffbfc)
>
> New Map:
> ┌─┐ 0x41c0
> │ SPL │
> ├─┤ 0x41c4 (approx)
> │EMPTY│
> ├─┤ 0x41c81920
> │STACK│
> │ SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 │
> ├─┤ 0x41c85920
> │ Global data │
> │ sizeof(struct global_data) = 0xd8 │
> ├─┤ gd->malloc_base = 0x41c859f0
> │HEAP │
> │ CONFIG_SYS_MALLOC_F_LEN = 0x7 │
> ├─┤ CONFIG_SPL_BSS_START_ADDR
> │ SPL BSS │ (0x41cf59f0)
> │ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │
> ├─┤ 0x41cff9fc
> │ NEW MCU SCRATCHPAD │
> │ SYS_K3_MCU_SCRATCHPAD_SIZE = 0x200 │
> └─┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX
> (0x41cffbfc)
>
> Fixes: ab977c8b91b4 ("configs: j721s2_evm_r5: Enable support for building
> multiple dtbs into FIT")
>
> Signed-off-by: Manorit Chawdhry
> [n-fran...@ti.com: SRAM allocation addressing diagram]
> Signed-off-by: Neha Francis
> Reviewed-by: Tom Rini
> Reviewed-by: Kamlesh Gurudasani
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH tiU23.04 PATCH v7 2/4] configs: j721e: Merge the HS and non-HS defconfigs
On Tue, May 16, 2023 at 10:24:35AM +0530, Manorit Chawdhry wrote: > K3 devices have runtime type board detection. Make the default defconfig > include the secure configuration. Then remove the HS specific config. > > Non-HS devices will continue to boot due to runtime device type detection. > If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS > devices these can be ignored. > > Reviewed-by: Bryan Brattlof > Reviewed-by: Neha Malcom Francis > Acked-by: Andrew Davis > Signed-off-by: Manorit Chawdhry Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH tiU23.04 PATCH v7 1/4] arm: k3: config.mk: Add missing dependencies on tispl.bin HS
On Tue, May 16, 2023 at 10:24:34AM +0530, Manorit Chawdhry wrote: > From: Andrew Davis > > When building for secure devices using non-buildman based image generation > the signed tispl.bin file is called tispl.bin_HS. Also build the unsigned > tispl.bin file as expected. > > Signed-off-by: Andrew Davis > Signed-off-by: Manorit Chawdhry Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/2] pci: apple: Add support for M2 Pro/Max
On Tue, May 02, 2023 at 09:30:41PM +0200, Mark Kettenis wrote: > The PCIe controller on the M2 Pro/Max is different from the one > found on earlier Apple SoCs. Some registers moved and te meaning > of the bits in some other registers changed. But they are still > similar enough to handle both controllers in the same driver. > > Signed-off-by: Mark Kettenis Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/2] arm: apple: Add initial Apple M2 Pro/Max support
On Tue, May 02, 2023 at 09:30:40PM +0200, Mark Kettenis wrote: > Apple's M2 Pro/Max SoC are somewhat similar to the M1 Pro/Max but > need a tweaked memory map. USB, NVMe, UART and WDT are working > with the existing drivers. > > Signed-off-by: Mark Kettenis Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] efi_loader: explicitly return EFI_UNSUPPORTED for TCG 1.0 compatibility
On 5/30/23 1:39 AM, Ilias Apalodimas wrote:
In the EFI TCG spec EFI_TCG2_BOOT_SERVICE_CAPABILITY struct is
versioned -- there are 1.0 and 1.1 versions of that struct.
The spec [0] describes:
"Version of the EFI_TCG2_BOOT_SERVICE_CAPABILITY
structure itself. For this version of the protocol, the Major version
SHALL be set to 1 and the Minor version SHALL be set to 1."
which is what we currently support.
The SCT tests perfromed By Arms SIE(Security interface extensions) [1]
perform a check for clients supporting the older 1.0 version of the
spec (Test 30.1.1.4). Given than this spec is 7 years old, there should
be no need for the older 1.0 version support. Instead of returning
EFI_BUFFER_TOO_SMALLL switch to EFI_UNSUPPORTED which is more
appropriate. It's worth noting that the spec doesn't explicitly
describe the return value at the moment.
[0]
https://trustedcomputinggroup.org/wp-content/uploads/EFI-Protocol-Specification-rev13-160330final.pdf
[1]
https://github.com/stuyod01/edk2-test/blob/master/uefi-sct/Doc/UEFI-SCT-Case-Spec/30_Protocols_TCG2_Test.md
Signed-off-by: Ilias Apalodimas
---
Heinrich, Stuart is investigating the chance of the spec getting updated
adding EFI_UNSUPPORTED. In any case I think the patch should be aplied since
the new return code makes more sense. If for some reason the spec change is
rejected, I can go back and add support for 1.0 structure versions.
lib/efi_loader/efi_tcg2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c
index a83ae7a46cf3..220c442bdf93 100644
--- a/lib/efi_loader/efi_tcg2.c
+++ b/lib/efi_loader/efi_tcg2.c
@@ -750,7 +750,7 @@ efi_tcg2_get_capability(struct efi_tcg2_protocol *this,
if (capability->size < sizeof(*capability)) {
capability->size = sizeof(*capability);
- efi_ret = EFI_BUFFER_TOO_SMALL;
+ efi_ret = EFI_UNSUPPORTED;
goto out;
}
Hi Ilias,
I don't think this is the right fix.
The struct looks like this:
struct tdEFI_TCG2_BOOT_SERVICE_CAPABILITY {
UINT8 Size;
EFI_TCG2_VERSION StructureVersion;
EFI_TCG2_VERSION ProtocolVersion;
EFI_TCG2_EVENT_ALGORITHM_BITMAP HashAlgorithmBitmap
EFI_TCG2_EVENT_LOG_BITMAP SupportedEventLogs
BOOLEAN TPMPresentFlag
UINT16 MaxCommandSize
UINT16 MaxResponseSize
UINT32 ManufacturerID
UINT32 NumberOfPcrBanks
EFI_TCG2_EVENT_ALGORITHM_BITMAP ActivePcrBanks
};
The intent in the TCG spec is for the caller to be able to
determine the size of the struct by passing in a small
buffer (e.g. 1 byte buffer), and then the firmware
should return sizeof(EFI_TCG2_BOOT_SERVICE_CAPABILITY) in the
1-byte "Size" field. And the return value should be
EFI_BUFFER_TOO_SMALL as per the spec.
In order to detect a 1.0 client, which you don't want to support,
I think you need a _new_ check that is something like this:
// detect 1.0 client
if (capability->size < sizeof(*capability) &&
capability->size >= offsetof(EFI_TCG2_BOOT_SERVICE_CAPABILITY,
NumberOfPcrBanks)) {
efi_ret = EFI_UNSUPPORTED;
goto out;
}
The last field in the 1.0 struct was ManufacturerID, so you should
be able to detect 1.0 clients that expect that based on the size they
pass in.
Thanks,
Stuart
[PATCH 1/1] python: Update requirements.txt for security issues
Per GitHub Dependabot: - Use setuptools 65.5.1 to avoid some DoS issue - Use requests 2.31.0 to avoid leaking some proxy information Signed-off-by: Tom Rini --- Cc: Simon Glass Cc: Heinrich Schuchardt --- doc/sphinx/requirements.txt | 2 +- test/py/requirements.txt| 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/doc/sphinx/requirements.txt b/doc/sphinx/requirements.txt index f9f6cc6e928b..aed449211711 100644 --- a/doc/sphinx/requirements.txt +++ b/doc/sphinx/requirements.txt @@ -11,7 +11,7 @@ packaging==21.3 Pygments==2.11.2 pyparsing==3.0.7 pytz==2022.1 -requests==2.27.1 +requests==2.31.0 six==1.16.0 snowballstemmer==2.2.0 Sphinx==3.4.3 diff --git a/test/py/requirements.txt b/test/py/requirements.txt index 86d6266053fd..f7e76bdb9181 100644 --- a/test/py/requirements.txt +++ b/test/py/requirements.txt @@ -20,8 +20,8 @@ pytest==6.2.5 pytest-xdist==2.5.0 python-mimeparse==1.6.0 python-subunit==1.3.0 -requests==2.27.1 -setuptools==58.3.0 +requests==2.31.0 +setuptools==65.5.1 six==1.16.0 testtools==2.3.0 traceback2==1.4.0 -- 2.34.1
Re: [PATCH 3/3] arm: dts: imx8mp: Sync with Linux 6.3
On Tue, May 30, 2023 at 10:28 AM Adam Ford wrote:
>
> On Tue, May 30, 2023 at 12:23 PM Tim Harvey wrote:
> >
> > On Mon, May 29, 2023 at 10:45 AM Adam Ford wrote:
> > >
> > > On Wed, May 24, 2023 at 9:02 PM Fabio Estevam wrote:
> > > >
> > > > Hi Tim,
> > > >
> > > > On Fri, May 19, 2023 at 8:00 PM Tim Harvey
> > > > wrote:
> > > >
> > > > > Fabio,
> > >
> > > + Marek
> > > I am adding Marek since he did the HSIO power domain driver.
> > >
> > > > >
> > > > > There's more to be done here also. With this patch, and with the
> > > > > spba-bus added to u-boot.dtsi, if you try to enable usb (usb start)
> > > > > you get:
> > > > > starting USB...
> > > > > Bus usb@3820:
> > > > > Enable clock-controller@3038 failed
> > > > > probe failed, error -2
> > > > > No working controllers found
> > > >
> > > > Does this help?
> > >
> > > A bit. I finally got some time to try to troubleshoot USB on my 8MP.
> > >
> > > >
> > > > --- a/drivers/clk/imx/clk-imx8mp.c
> > > > +++ b/drivers/clk/imx/clk-imx8mp.c
> > > > @@ -337,8 +337,8 @@ static int imx8mp_clk_probe(struct udevice *dev)
> > > > clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk",
> > > > "uart2", base + 0x44a0, 0));
> > > > clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk",
> > > > "uart3", base + 0x44b0, 0));
> > > > clk_dm(IMX8MP_CLK_UART4_ROOT, imx_clk_gate4("uart4_root_clk",
> > > > "uart4", base + 0x44c0, 0));
> > > > - clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk",
> > > > "usb_core_ref", base + 0x44d0, 0));
> > > > - clk_dm(IMX8MP_CLK_USB_PHY_ROOT,
> > >
> > > IMX8MP_CLK_USB_PHY_ROOT is also referenced in the device tree, so I
> > > don't think we can delete it. I had keep IMX8MP_CLK_USB_ROOT, and
> > > IMX8MP_CLK_USB_PHY_ROOT while also adding IMX8MP_CLK_USB_SUSP.
> > >
> > > > imx_clk_gate4("usb_phy_root_clk", "usb_phy_ref", base + 0x44f0, 0));
> > > > + clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk",
> > > > "hsio_axi", base + 0x44d0, 0));
> > > > + clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate4("usb_suspend_clk",
> > > > "osc_32k", base + 0x44d0, 0));
> > > > clk_dm(IMX8MP_CLK_USDHC1_ROOT,
> > > > imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0));
> > > > clk_dm(IMX8MP_CLK_USDHC2_ROOT,
> > > > imx_clk_gate4("usdhc2_root_clk", "usdhc2", base + 0x4520, 0));
> > > > clk_dm(IMX8MP_CLK_WDOG1_ROOT, imx_clk_gate4("wdog1_root_clk",
> > > > "wdog", base + 0x4530, 0));
> > >
> > > At this point, the missing clock errors go away, but it hangs. I
> > > updated my 8MP USB clocks based on the latest Linux kernel so my
> > > clocks looks like:
> > >
> > > clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate2("usb_root_clk", "hsio_axi",
> > > base + 0x44d0, 0));
> > > clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate2("usb_suspend_clk",
> > > "clock-osc-24m", base + 0x44d0, 0));
> > > clk_dm(IMX8MP_CLK_USB_PHY_ROOT, imx_clk_gate4("usb_phy_root_clk",
> > > "usb_phy_ref", base + 0x44f0, 0));
> > >
> > > The linux kernel uses gate2 for USB_ROOT and USB_SUSP while gate4 is
> > > used for IMX8MP_CLK_USB_PHY_ROOT. I didn't verify this against the
> > > reference manual.
> > >
> > > With some debugging enabled, it looks to me like it might be
> > > power-domain related, but I am not 100% certain.
> > > When I start the USB, it appears to go through some clocks, and start
> > > one power domain, but I think we have a power-domain chain where one
> > > power domain starts another. I saw a patch on another thread for
> > > enabling parent power-domains, but it didn't seem to help me.
> > >
> > > u-boot=> usb start
> > > starting USB...
> > > Bus usb@3820: ofnode_read_prop: maximum-speed:
> > > ofnode_read_prop: dr_mode: host
> > > dev_power_domain_on usb@32f10108
> > > ofnode_read_prop: assigned-clock-rates:
> > > Looking for clock-controller@3038
> > > Looking for clock-controller@3038
> > >- result for clock-controller@3038: clock-controller@3038
> > > (ret=0)
> > >- result for clock-controller@3038: clock-controller@3038
> > > (ret=0)
> > > Looking for clock-controller@3038
> > > Looking for clock-controller@3038
> > >- result for clock-controller@3038: clock-controller@3038
> > > (ret=0)
> > >- result for clock-controller@3038: clock-controller@3038
> > > (ret=0)
> > > ofnode_read_prop: dr_mode: host
> > >
> > >
> > >
> > > I added some debug code to the imx8mp_hsiomix_on in HSIOmix power
> > > domain driver, and it doesn't appear to be getting called, yet
> > > dev_power_domain_on usb@32f10108 should be invoking it.
> > >
> > > I am not positive it's a power domain issue, that's my first guess.
> > >
> > >
> > > Tim - have you had any success?
> > >
> >
> > Adam,
> >
> > No success here yet but I don't have any time to work on it for at
> > least another week.
>
> No worries. I'll try to spend some more time this week, and keep you
> informed of any progress. I'd like to see
Re: [PATCH] spl: Kconfig: fix trivial typo Suppport
On Mon, May 29, 2023 at 05:25:54PM +0300, Eugen Hristev wrote: > s/Suppport/Support > > Signed-off-by: Eugen Hristev > --- > common/spl/Kconfig | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/common/spl/Kconfig b/common/spl/Kconfig > index 2c042ad30668..c66b38ee676d 100644 > --- a/common/spl/Kconfig > +++ b/common/spl/Kconfig > @@ -1373,7 +1373,7 @@ config SYS_USB_FAT_BOOT_PARTITION > Partition on the USB storage device to load U-Boot from > > config SPL_USB_GADGET > - bool "Suppport USB Gadget drivers" > + bool "Support USB Gadget drivers" > help > Enable USB Gadget API which allows to enable USB device functions > in SPL. This has been fixed already in "next" where Marek also moved this option to be under drivers/usb/gadget/Kconfig. -- Tom signature.asc Description: PGP signature
Re: [PATCH 3/3] arm: dts: imx8mp: Sync with Linux 6.3
On Tue, May 30, 2023 at 12:23 PM Tim Harvey wrote:
>
> On Mon, May 29, 2023 at 10:45 AM Adam Ford wrote:
> >
> > On Wed, May 24, 2023 at 9:02 PM Fabio Estevam wrote:
> > >
> > > Hi Tim,
> > >
> > > On Fri, May 19, 2023 at 8:00 PM Tim Harvey wrote:
> > >
> > > > Fabio,
> >
> > + Marek
> > I am adding Marek since he did the HSIO power domain driver.
> >
> > > >
> > > > There's more to be done here also. With this patch, and with the
> > > > spba-bus added to u-boot.dtsi, if you try to enable usb (usb start)
> > > > you get:
> > > > starting USB...
> > > > Bus usb@3820:
> > > > Enable clock-controller@3038 failed
> > > > probe failed, error -2
> > > > No working controllers found
> > >
> > > Does this help?
> >
> > A bit. I finally got some time to try to troubleshoot USB on my 8MP.
> >
> > >
> > > --- a/drivers/clk/imx/clk-imx8mp.c
> > > +++ b/drivers/clk/imx/clk-imx8mp.c
> > > @@ -337,8 +337,8 @@ static int imx8mp_clk_probe(struct udevice *dev)
> > > clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk",
> > > "uart2", base + 0x44a0, 0));
> > > clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk",
> > > "uart3", base + 0x44b0, 0));
> > > clk_dm(IMX8MP_CLK_UART4_ROOT, imx_clk_gate4("uart4_root_clk",
> > > "uart4", base + 0x44c0, 0));
> > > - clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk",
> > > "usb_core_ref", base + 0x44d0, 0));
> > > - clk_dm(IMX8MP_CLK_USB_PHY_ROOT,
> >
> > IMX8MP_CLK_USB_PHY_ROOT is also referenced in the device tree, so I
> > don't think we can delete it. I had keep IMX8MP_CLK_USB_ROOT, and
> > IMX8MP_CLK_USB_PHY_ROOT while also adding IMX8MP_CLK_USB_SUSP.
> >
> > > imx_clk_gate4("usb_phy_root_clk", "usb_phy_ref", base + 0x44f0, 0));
> > > + clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk",
> > > "hsio_axi", base + 0x44d0, 0));
> > > + clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate4("usb_suspend_clk",
> > > "osc_32k", base + 0x44d0, 0));
> > > clk_dm(IMX8MP_CLK_USDHC1_ROOT,
> > > imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0));
> > > clk_dm(IMX8MP_CLK_USDHC2_ROOT,
> > > imx_clk_gate4("usdhc2_root_clk", "usdhc2", base + 0x4520, 0));
> > > clk_dm(IMX8MP_CLK_WDOG1_ROOT, imx_clk_gate4("wdog1_root_clk",
> > > "wdog", base + 0x4530, 0));
> >
> > At this point, the missing clock errors go away, but it hangs. I
> > updated my 8MP USB clocks based on the latest Linux kernel so my
> > clocks looks like:
> >
> > clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate2("usb_root_clk", "hsio_axi",
> > base + 0x44d0, 0));
> > clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate2("usb_suspend_clk",
> > "clock-osc-24m", base + 0x44d0, 0));
> > clk_dm(IMX8MP_CLK_USB_PHY_ROOT, imx_clk_gate4("usb_phy_root_clk",
> > "usb_phy_ref", base + 0x44f0, 0));
> >
> > The linux kernel uses gate2 for USB_ROOT and USB_SUSP while gate4 is
> > used for IMX8MP_CLK_USB_PHY_ROOT. I didn't verify this against the
> > reference manual.
> >
> > With some debugging enabled, it looks to me like it might be
> > power-domain related, but I am not 100% certain.
> > When I start the USB, it appears to go through some clocks, and start
> > one power domain, but I think we have a power-domain chain where one
> > power domain starts another. I saw a patch on another thread for
> > enabling parent power-domains, but it didn't seem to help me.
> >
> > u-boot=> usb start
> > starting USB...
> > Bus usb@3820: ofnode_read_prop: maximum-speed:
> > ofnode_read_prop: dr_mode: host
> > dev_power_domain_on usb@32f10108
> > ofnode_read_prop: assigned-clock-rates:
> > Looking for clock-controller@3038
> > Looking for clock-controller@3038
> >- result for clock-controller@3038: clock-controller@3038 (ret=0)
> >- result for clock-controller@3038: clock-controller@3038 (ret=0)
> > Looking for clock-controller@3038
> > Looking for clock-controller@3038
> >- result for clock-controller@3038: clock-controller@3038 (ret=0)
> >- result for clock-controller@3038: clock-controller@3038 (ret=0)
> > ofnode_read_prop: dr_mode: host
> >
> >
> >
> > I added some debug code to the imx8mp_hsiomix_on in HSIOmix power
> > domain driver, and it doesn't appear to be getting called, yet
> > dev_power_domain_on usb@32f10108 should be invoking it.
> >
> > I am not positive it's a power domain issue, that's my first guess.
> >
> >
> > Tim - have you had any success?
> >
>
> Adam,
>
> No success here yet but I don't have any time to work on it for at
> least another week.
No worries. I'll try to spend some more time this week, and keep you
informed of any progress. I'd like to see the USB working too.
adam
>
> Best Regards,
>
> Tim
Re: [PATCH 3/3] arm: dts: imx8mp: Sync with Linux 6.3
On Mon, May 29, 2023 at 10:45 AM Adam Ford wrote:
>
> On Wed, May 24, 2023 at 9:02 PM Fabio Estevam wrote:
> >
> > Hi Tim,
> >
> > On Fri, May 19, 2023 at 8:00 PM Tim Harvey wrote:
> >
> > > Fabio,
>
> + Marek
> I am adding Marek since he did the HSIO power domain driver.
>
> > >
> > > There's more to be done here also. With this patch, and with the
> > > spba-bus added to u-boot.dtsi, if you try to enable usb (usb start)
> > > you get:
> > > starting USB...
> > > Bus usb@3820:
> > > Enable clock-controller@3038 failed
> > > probe failed, error -2
> > > No working controllers found
> >
> > Does this help?
>
> A bit. I finally got some time to try to troubleshoot USB on my 8MP.
>
> >
> > --- a/drivers/clk/imx/clk-imx8mp.c
> > +++ b/drivers/clk/imx/clk-imx8mp.c
> > @@ -337,8 +337,8 @@ static int imx8mp_clk_probe(struct udevice *dev)
> > clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk",
> > "uart2", base + 0x44a0, 0));
> > clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk",
> > "uart3", base + 0x44b0, 0));
> > clk_dm(IMX8MP_CLK_UART4_ROOT, imx_clk_gate4("uart4_root_clk",
> > "uart4", base + 0x44c0, 0));
> > - clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk",
> > "usb_core_ref", base + 0x44d0, 0));
> > - clk_dm(IMX8MP_CLK_USB_PHY_ROOT,
>
> IMX8MP_CLK_USB_PHY_ROOT is also referenced in the device tree, so I
> don't think we can delete it. I had keep IMX8MP_CLK_USB_ROOT, and
> IMX8MP_CLK_USB_PHY_ROOT while also adding IMX8MP_CLK_USB_SUSP.
>
> > imx_clk_gate4("usb_phy_root_clk", "usb_phy_ref", base + 0x44f0, 0));
> > + clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk",
> > "hsio_axi", base + 0x44d0, 0));
> > + clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate4("usb_suspend_clk",
> > "osc_32k", base + 0x44d0, 0));
> > clk_dm(IMX8MP_CLK_USDHC1_ROOT,
> > imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0));
> > clk_dm(IMX8MP_CLK_USDHC2_ROOT,
> > imx_clk_gate4("usdhc2_root_clk", "usdhc2", base + 0x4520, 0));
> > clk_dm(IMX8MP_CLK_WDOG1_ROOT, imx_clk_gate4("wdog1_root_clk",
> > "wdog", base + 0x4530, 0));
>
> At this point, the missing clock errors go away, but it hangs. I
> updated my 8MP USB clocks based on the latest Linux kernel so my
> clocks looks like:
>
> clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate2("usb_root_clk", "hsio_axi",
> base + 0x44d0, 0));
> clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate2("usb_suspend_clk",
> "clock-osc-24m", base + 0x44d0, 0));
> clk_dm(IMX8MP_CLK_USB_PHY_ROOT, imx_clk_gate4("usb_phy_root_clk",
> "usb_phy_ref", base + 0x44f0, 0));
>
> The linux kernel uses gate2 for USB_ROOT and USB_SUSP while gate4 is
> used for IMX8MP_CLK_USB_PHY_ROOT. I didn't verify this against the
> reference manual.
>
> With some debugging enabled, it looks to me like it might be
> power-domain related, but I am not 100% certain.
> When I start the USB, it appears to go through some clocks, and start
> one power domain, but I think we have a power-domain chain where one
> power domain starts another. I saw a patch on another thread for
> enabling parent power-domains, but it didn't seem to help me.
>
> u-boot=> usb start
> starting USB...
> Bus usb@3820: ofnode_read_prop: maximum-speed:
> ofnode_read_prop: dr_mode: host
> dev_power_domain_on usb@32f10108
> ofnode_read_prop: assigned-clock-rates:
> Looking for clock-controller@3038
> Looking for clock-controller@3038
>- result for clock-controller@3038: clock-controller@3038 (ret=0)
>- result for clock-controller@3038: clock-controller@3038 (ret=0)
> Looking for clock-controller@3038
> Looking for clock-controller@3038
>- result for clock-controller@3038: clock-controller@3038 (ret=0)
>- result for clock-controller@3038: clock-controller@3038 (ret=0)
> ofnode_read_prop: dr_mode: host
>
>
>
> I added some debug code to the imx8mp_hsiomix_on in HSIOmix power
> domain driver, and it doesn't appear to be getting called, yet
> dev_power_domain_on usb@32f10108 should be invoking it.
>
> I am not positive it's a power domain issue, that's my first guess.
>
>
> Tim - have you had any success?
>
Adam,
No success here yet but I don't have any time to work on it for at
least another week.
Best Regards,
Tim
R: Fit Signature booting without public key
Hi, > Inviato: venerdì 26 maggio 2023 15:00 > Oggetto: Re: Fit Signature booting without public key > > On Fri, May 26, 2023 at 02:22:38PM +0530, Manorit Chawdhry wrote: > > Hi Tom, > > > > On 10:05-20230525, Tom Rini wrote: > > > On Thu, May 25, 2023 at 11:21:44AM +0530, Manorit Chawdhry wrote: > > > > Hi Tom, > > > > > > > > On 11:30-20230516, Tom Rini wrote: > > > > > On Tue, May 16, 2023 at 12:11:24PM +0530, Manorit Chawdhry wrote: > > > > > > > > > > > Hi All, > > > > > > > > > > > > I recently came upon a discussion that had happened a while back > [0]. > > > > > > I want to continue the discussion as I believe the issue still > > > > > > persists and the checks around fit signature booting are still > > > > > > the same, that allows booting the fit without changing the uboot > dtb. > > > > > > > > > > > > Allowing the signed fit image without this seems to be a > > > > > > bypass that is available and should not be allowed without any > > > > > > gate to it for people who'd like to enforce these signing > > > > > > checks. Let me know if there is a config already available for > > > > > > it and if not, are there any plans to enable such a config in > > > > > > future. Would like to hear your opinions on this as I believe this > should be fixed as soon as possible. > > > > > > > > > > > > [0]: > > > > > > https://u-boot.denx.narkive.com/dEClg9dW/signed-fit-image-boot > > > > > > s-without-public-key > > > > > > > > > > Yes, can you please reproduce the issue in question on the > > > > > current tree, with a supported platform and provide the > > > > > defconfig and steps you used for this issue? Thanks. > > > > > > > > > > -- > > > > > > > > I've created a branch with some custom patches to make the > > > > fitimage booting currently, please try with the branch and the > > > > fitimage that are also committed [0]. > > > > > > > > The devices that I've tested this with is j721e-hs-evm, the > > > > defconfig to use for the builds are j721e_evm_r5_defconfig and > > > > j721e_evm_a72_defconfig. Although not synced up with the latest > > > > changes but for reference the SDK documentation can help if required > [1]. > > > > > > > > Attached the logs for reference with the signed fitimage and an > > > > unsigned uboot without any modifications[2]. > > > > > > > > [0]: https://github.com/manorit2001/u-boot/tree/fit-image-poc > > > > [1]: > > > > https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-jacint > > > > o7/08_06_00_11/exports/docs/linux/Foundational_Components/U- > Boot/U > > > > G-General-Info.html > > > > [2]: > > > > https://gist.github.com/manorit2001/3c49cfc19bf937783efb75fd4cddc5 > > > > 8f > > > > > > I don't see the problem there, but please go and investigate what > > > problem you're seeing. The intention is that yes, with the > > > appropriate CONFIG settings, you can set U-Boot to only boot signed > > > FIT configurations and unsigned ones should not boot. > > > > > > > It boots with an unsigned fit too btw for reference [0]. The whole > > logic behind the authentication is that uboot stores the public key > > that is used for verification of the signed fit but apparantely if I > > haven't kept the public key in uboot dtb the fit images still boot > > whether signed or unsigned as that check is not guarded by anything if > > you see in the codebase[1]. Which uboot behaviour would you expect? If uboot is missing of the public key, it has no way to check signatures. Therefore either it boots everything (signed and unsigned) or it boots nothing (signed and unsigned). The second means it would be totally useless. So the first seems the only reasonable behaviour, IMO. Massimo > > [0]: > > https://gist.github.com/manorit2001/80c9242641141ac5bce0e335ea8a9f1a > > [1]: > > https://github.com/u-boot/u- > boot/blob/6dcee70692601bd3296c86ac07d0317b > > f06d2b7b/boot/image-fit-sig.c#L491-L496 > > Alright, please let us know what you find as indeed if you've set all the > right > options it's not supposed to boot unsigned images. > > -- > Tom
Re: [PATCH v1 2/3] drivers: meson: introduce secure power controller driver
On 22/05/2023 14:09, Alexey Romanov via groups.io wrote:
This patch adds Power controller driver support for Amlogic
A1 family using secure monitor calls. The power domains register
only can access in secure world.
Signed-off-by: Alexey Romanov
---
drivers/power/domain/Kconfig | 7 +
drivers/power/domain/Makefile | 1 +
drivers/power/domain/meson-secure-pwrc.c | 160 +
include/dt-bindings/power/meson-a1-power.h | 32 +
4 files changed, 200 insertions(+)
create mode 100644 drivers/power/domain/meson-secure-pwrc.c
create mode 100644 include/dt-bindings/power/meson-a1-power.h
diff --git a/drivers/power/domain/Kconfig b/drivers/power/domain/Kconfig
index 7e1b8c072fa..411c210756a 100644
--- a/drivers/power/domain/Kconfig
+++ b/drivers/power/domain/Kconfig
@@ -68,6 +68,13 @@ config MESON_EE_POWER_DOMAIN
Enable support for manipulating Amlogic Meson Everything-Else power
domains.
+config MESON_SECURE_POWER_DOMAIN
+ bool "Enable Amlogic Secure power domain driver"
+ depends on POWER_DOMAIN && ARCH_MESON && MESON_A1
+ help
+ Enable support for manipulating Amlogic Meson Secure power domains.
+ Support for Amlogic A1 series.
+
config SANDBOX_POWER_DOMAIN
bool "Enable the sandbox power domain test driver"
depends on POWER_DOMAIN && SANDBOX
diff --git a/drivers/power/domain/Makefile b/drivers/power/domain/Makefile
index e6244776216..aa5a4ba57cd 100644
--- a/drivers/power/domain/Makefile
+++ b/drivers/power/domain/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_IMX8MP_HSIOMIX_BLKCTRL) += imx8mp-hsiomix.o
obj-$(CONFIG_MTK_POWER_DOMAIN) += mtk-power-domain.o
obj-$(CONFIG_MESON_GX_VPU_POWER_DOMAIN) += meson-gx-pwrc-vpu.o
obj-$(CONFIG_MESON_EE_POWER_DOMAIN) += meson-ee-pwrc.o
+obj-$(CONFIG_MESON_SECURE_POWER_DOMAIN) += meson-secure-pwrc.o
obj-$(CONFIG_SANDBOX_POWER_DOMAIN) += sandbox-power-domain.o
obj-$(CONFIG_SANDBOX_POWER_DOMAIN) += sandbox-power-domain-test.o
obj-$(CONFIG_TEGRA186_POWER_DOMAIN) += tegra186-power-domain.o
diff --git a/drivers/power/domain/meson-secure-pwrc.c
b/drivers/power/domain/meson-secure-pwrc.c
new file mode 100644
index 000..f70f8e02423
--- /dev/null
+++ b/drivers/power/domain/meson-secure-pwrc.c
@@ -0,0 +1,160 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2023 SberDevices, Inc.
+ * Author: Alexey Romanov
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+struct meson_secure_pwrc_domain_desc {
+ char *name;
+ size_t index;
+};
+
+struct meson_secure_pwrc_domain_data {
+ unsigned int count;
+ struct meson_secure_pwrc_domain_desc *domains;
+};
+
+struct meson_secure_pwrc_priv {
+ const struct meson_secure_pwrc_domain_data *data;
+};
+
+static int meson_secure_pwrc_on(struct power_domain *power_domain)
+{
+ struct meson_secure_pwrc_priv *priv = dev_get_priv(power_domain->dev);
+ struct meson_secure_pwrc_domain_desc *pwrc_domain;
+ int err;
+
+ pwrc_domain = >data->domains[power_domain->id];
+
+ err = meson_sm_pwrdm_on(pwrc_domain->index);
+ if (err) {
+ pr_err("meson_sm_pwrdm_on() failed (%d)\n", err);
+ return err;
+ }
+
+ pr_debug("enable %s power domain\n", pwrc_domain->name);
+
+ return 0;
+}
+
+static int meson_secure_pwrc_off(struct power_domain *power_domain)
+{
+ struct meson_secure_pwrc_priv *priv = dev_get_priv(power_domain->dev);
+ struct meson_secure_pwrc_domain_desc *pwrc_domain;
+ int err;
+
+ pwrc_domain = >data->domains[power_domain->id];
+
+ err = meson_sm_pwrdm_off(pwrc_domain->index);
+ if (err) {
+ pr_err("meson_sm_pwrdm_off() failed (%d)\n", err);
+ return err;
+ }
+
+ pr_debug("disable %s power domain\n", pwrc_domain->name);
+
+ return 0;
+}
+
+static int meson_secure_pwrc_of_xlate(struct power_domain *power_domain,
+ struct ofnode_phandle_args *args)
+{
+ struct meson_secure_pwrc_priv *priv = dev_get_priv(power_domain->dev);
+ struct meson_secure_pwrc_domain_desc *pwrc_domain;
+
+ if (args->args_count < 1) {
+ pr_err("invalid args count: %d\n", args->args_count);
+ return -EINVAL;
+ }
+
+ power_domain->id = args->args[0];
+
+ if (power_domain->id >= priv->data->count) {
+ pr_err("domain with ID=%lu is invalid\n", power_domain->id);
+ return -EINVAL;
+ }
+
+ pwrc_domain = >data->domains[power_domain->id];
+
+ if (!pwrc_domain->name) {
+ pr_err("domain with ID=%lu is invalid\n", power_domain->id);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+#define SEC_PD(__name) \
+[PWRC_##__name##_ID] = \
+{ \
+ .name = #__name,\
+ .index =
Re: [PATCH v1 1/3] arch/arm: meson: sm: introduce power domain functions
On 22/05/2023 14:09, Alexey Romanov via groups.io wrote:
This commit adds functions to manage secure power domain for
Amlogic SoC's using smc functionality.
Signed-off-by: Alexey Romanov
---
arch/arm/include/asm/arch-meson/sm.h | 30
arch/arm/mach-meson/sm.c | 14 +
2 files changed, 44 insertions(+)
diff --git a/arch/arm/include/asm/arch-meson/sm.h
b/arch/arm/include/asm/arch-meson/sm.h
index 53b75176493..4b1d564bc48 100644
--- a/arch/arm/include/asm/arch-meson/sm.h
+++ b/arch/arm/include/asm/arch-meson/sm.h
@@ -58,4 +58,34 @@ enum {
*/
int meson_sm_get_reboot_reason(void);
+#define PWRDM_OFF 0
+#define PWRDM_ON 1
+
+/**
+ * meson_sm_pwrdm_set - do command at specified power domain.
+ *
+ * @index: power domain index.
+ * @cmd: command index.
+ * @return: zero on success or error code on failure.
+ */
+int meson_sm_pwrdm_set(size_t index, int cmd);
+
+/**
+ * meson_sm_pwrdm_off - disable specified power domain.
+ *
+ * @index: power domain index.
+ * @return: zero on success or error code on failure.
+ */
+#define meson_sm_pwrdm_off(index) \
+ meson_sm_pwrdm_set(index, PWRDM_OFF)
+
+/**
+ * meson_sm_pwrdm_on - enable specified power domain.
+ *
+ * @index: power domain index.
+ * @return: zero on success or error code on failure.
+ */
+#define meson_sm_pwrdm_on(index) \
+ meson_sm_pwrdm_set(index, PWRDM_ON)
+
#endif /* __MESON_SM_H__ */
diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c
index f2ca7e76932..d600c64d0be 100644
--- a/arch/arm/mach-meson/sm.c
+++ b/arch/arm/mach-meson/sm.c
@@ -24,6 +24,7 @@
#define FN_EFUSE_READ 0x8230
#define FN_EFUSE_WRITE0x8231
#define FN_CHIP_ID0x8244
+#define FN_PWRDM_SET 0x8293
static void *shmem_input;
static void *shmem_output;
@@ -137,3 +138,16 @@ int meson_sm_get_reboot_reason(void)
/* The SMC call is not used, we directly use AO_SEC_SD_CFG15 */
return FIELD_GET(REBOOT_REASON_MASK, reason);
}
+
+int meson_sm_pwrdm_set(size_t index, int cmd)
+{
+ struct pt_regs regs;
+
+ regs.regs[0] = FN_PWRDM_SET;
+ regs.regs[1] = index;
+ regs.regs[2] = cmd;
+
+ smc_call();
+
+ return regs.regs[0];
+}
Reviewed-by: Neil Armstrong
Re: [PATCH v1 3/3] arch/arm64: meson-a1: dts: move pwrc node to bus
Hi,
On 22/05/2023 14:09, Alexey Romanov via groups.io wrote:
This is necessary so that pwrc can be used together with
peripherals when described in a bus node. For example,
in the future, this will be USB.
Signed-off-by: Alexey Romanov
---
arch/arm/dts/meson-a1.dtsi | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/dts/meson-a1.dtsi b/arch/arm/dts/meson-a1.dtsi
index 9776b2d8798..f3560cbc3a4 100644
--- a/arch/arm/dts/meson-a1.dtsi
+++ b/arch/arm/dts/meson-a1.dtsi
@@ -65,12 +65,6 @@
sm: secure-monitor {
compatible = "amlogic,meson-gxbb-sm";
-
- pwrc: power-controller {
- compatible = "amlogic,meson-a1-pwrc";
- #power-domain-cells = <1>;
- status = "okay";
- };
};
soc {
@@ -161,6 +155,12 @@
#address-cells = <0>;
};
+ pwrc: power-controller {
+ compatible = "amlogic,meson-a1-pwrc";
+ #power-domain-cells = <1>;
+ status = "okay";
+ };
+
usb: usb@fe004400 {
compatible = "amlogic,meson-a1-usb-ctrl";
reg = <0x0 0xfe004400 0x0 0xa0>;
The DT should be the same as Linux, so there's no reason why this would be
moved out of the SM node.
Neil
Re: [PATCH v1] dt-bindings: riscv: deprecate riscv,isa
On Thu, May 18, 2023 at 10:42:34PM +0100, Conor Dooley wrote:
> On Thu, May 18, 2023 at 02:30:53PM -0400, Sean Anderson wrote:
> >
> > Why not just have something like
> >
> > mycpu {
> > ...
> > riscv,isa {
> > i;
> > m;
> > a;
> > zicsr;
> > ...
> > };
> > };
>
> Naming of the node aside (perhaps that could be riscv,isa-extensions)
> there's not something hitting me immediately as to why that is a no-no.
> If the size is a concern, this would certainly be more efficient & not
> like the probing would be anything other than trivial more difficult
> what I have in my proposal.
Having started messing around with this, one of the main advantages, to
me, of this approach is proper validation.
cpus.yaml has additionalProperties: true in it, which would have had to
be sorted out, or worked around, but creating a child-node with the
properties in it allows setting additionalProperties: false.
> Rob's AFK at the moment, and I was hoping that he would take a look at
> the idea, so I won't respin til he is back, but I'll give this a go in
> the interim.
Mechanically, the conversion of the patch isn't difficult, but I'll still
wait for Rob to come back before sending a v2. But that v2 will more
than likely implement your suggestion.
Cheers,
Conor.
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Description: PGP signature
Re: [PATCH v2 2/2] common/memsize.c: Fix get_ram_size() when cache is enabled
Hi
On Tue, May 30, 2023 at 3:49 PM Francesco Dolcini wrote:
>
> On Tue, May 30, 2023 at 03:42:18PM +0200, Michael Nazzareno Trimarchi wrote:
> > On Tue, May 30, 2023 at 3:34 PM Francesco Dolcini
> > wrote:
> > >
> > > From: Emanuele Ghidoli
> > >
> > > Ensure that every write is flushed to memory and afterward reads are
> > > from memory.
> > > Since the algorithm rely on the fact that accessing to not existent
> > > memory lead to write at addr / 2 without this modification accesses
> > > to aliased (not physically present) addresses are cached and
> > > wrong size is returned.
> > >
> > > This was discovered while working on a TI AM625 based board
> > > where cache is normally enabled, see commit c02712a74849 ("arm: mach-k3:
> > > Enable dcache in SPL").
> > >
> > > Signed-off-by: Emanuele Ghidoli
> > > Signed-off-by: Francesco Dolcini
> > > ---
> > > v2:
> > > * check if CONFIG_SYS_CACHELINE_SIZE is defined
> > > * do flush only when cache is enabled
> > > ---
> > > common/memsize.c | 24
> > > 1 file changed, 24 insertions(+)
> > >
> > > diff --git a/common/memsize.c b/common/memsize.c
> > > index 66d5be6a1ff3..d646df8b04cb 100644
> > > --- a/common/memsize.c
> > > +++ b/common/memsize.c
> > > @@ -7,9 +7,18 @@
> > > #include
> > > #include
> > > #include
> > > +#include
> > > +#include
> > >
> > > DECLARE_GLOBAL_DATA_PTR;
> > >
> > > +#ifdef CONFIG_SYS_CACHELINE_SIZE
> > > +# define MEMSIZE_CACHELINE_SIZE CONFIG_SYS_CACHELINE_SIZE
> > > +#else
> > > +/* Just use the greatest cache flush alignment requirement I'm aware of
> > > */
> > > +# define MEMSIZE_CACHELINE_SIZE 128
> > > +#endif
> > > +
> > > #ifdef __PPC__
> > > /*
> > > * At least on G2 PowerPC cores, sequential accesses to non-existent
> > > @@ -20,6 +29,15 @@ DECLARE_GLOBAL_DATA_PTR;
> > > # define sync()/* nothing */
> > > #endif
> > >
> > > +static void dcache_flush_invalidate(volatile long *p)
> > > +{
> > > + uintptr_t start, stop;
> > > + start = ALIGN_DOWN((uintptr_t)p, MEMSIZE_CACHELINE_SIZE);
> > > + stop = start + MEMSIZE_CACHELINE_SIZE;
> > > + flush_dcache_range(start, stop);
> > > + invalidate_dcache_range(start, stop);
> > > +}
> > > +
> > > /*
> > > * Check memory range for valid RAM. A simple memory test determines
> > > * the actually available RAM size between addresses `base' and
> > > @@ -34,6 +52,7 @@ long get_ram_size(long *base, long maxsize)
> > > long val;
> > > long size;
> > > inti = 0;
> > > + intdcache_en = dcache_status();
> > >
> > > for (cnt = (maxsize / sizeof(long)) >> 1; cnt > 0; cnt >>= 1) {
> > > addr = base + cnt; /* pointer arith! */
> > > @@ -41,6 +60,8 @@ long get_ram_size(long *base, long maxsize)
> > > save[i++] = *addr;
> > > sync();
> > > *addr = ~cnt;
> > > + if (dcache_en)
> > > + dcache_flush_invalidate(addr);
> >
> > Why this should be done on every increment if the invalidate keep a
> > range of address?
>
> We do invalidate/flush the current write, the granularity of the
> flush/invalidate is the page size.
>
> This is required since we need to ensure ordering of the writes. How
> would you know where the aliasing is going to happen if you flush all at
> once at the end?
>
I see, I read the code properly of get_mem_size now.
> > Can be possible just to enable/disable cache around memory test?
> In theory yes. In practice this proved some architecture to just crash
> badly because the stack was "corrupted" after re-enabling the cache.
>
> We'll submit a separate bug fix for that, bug given that this pattern
> (disable AND enable) is normally not done in U-Boot it seems like
> looking for trouble doing it in such a commonly used routine.
>
Thank you
Re: [PATCH v2 2/2] common/memsize.c: Fix get_ram_size() when cache is enabled
On Tue, May 30, 2023 at 03:42:18PM +0200, Michael Nazzareno Trimarchi wrote:
> On Tue, May 30, 2023 at 3:34 PM Francesco Dolcini
> wrote:
> >
> > From: Emanuele Ghidoli
> >
> > Ensure that every write is flushed to memory and afterward reads are
> > from memory.
> > Since the algorithm rely on the fact that accessing to not existent
> > memory lead to write at addr / 2 without this modification accesses
> > to aliased (not physically present) addresses are cached and
> > wrong size is returned.
> >
> > This was discovered while working on a TI AM625 based board
> > where cache is normally enabled, see commit c02712a74849 ("arm: mach-k3:
> > Enable dcache in SPL").
> >
> > Signed-off-by: Emanuele Ghidoli
> > Signed-off-by: Francesco Dolcini
> > ---
> > v2:
> > * check if CONFIG_SYS_CACHELINE_SIZE is defined
> > * do flush only when cache is enabled
> > ---
> > common/memsize.c | 24
> > 1 file changed, 24 insertions(+)
> >
> > diff --git a/common/memsize.c b/common/memsize.c
> > index 66d5be6a1ff3..d646df8b04cb 100644
> > --- a/common/memsize.c
> > +++ b/common/memsize.c
> > @@ -7,9 +7,18 @@
> > #include
> > #include
> > #include
> > +#include
> > +#include
> >
> > DECLARE_GLOBAL_DATA_PTR;
> >
> > +#ifdef CONFIG_SYS_CACHELINE_SIZE
> > +# define MEMSIZE_CACHELINE_SIZE CONFIG_SYS_CACHELINE_SIZE
> > +#else
> > +/* Just use the greatest cache flush alignment requirement I'm aware of */
> > +# define MEMSIZE_CACHELINE_SIZE 128
> > +#endif
> > +
> > #ifdef __PPC__
> > /*
> > * At least on G2 PowerPC cores, sequential accesses to non-existent
> > @@ -20,6 +29,15 @@ DECLARE_GLOBAL_DATA_PTR;
> > # define sync()/* nothing */
> > #endif
> >
> > +static void dcache_flush_invalidate(volatile long *p)
> > +{
> > + uintptr_t start, stop;
> > + start = ALIGN_DOWN((uintptr_t)p, MEMSIZE_CACHELINE_SIZE);
> > + stop = start + MEMSIZE_CACHELINE_SIZE;
> > + flush_dcache_range(start, stop);
> > + invalidate_dcache_range(start, stop);
> > +}
> > +
> > /*
> > * Check memory range for valid RAM. A simple memory test determines
> > * the actually available RAM size between addresses `base' and
> > @@ -34,6 +52,7 @@ long get_ram_size(long *base, long maxsize)
> > long val;
> > long size;
> > inti = 0;
> > + intdcache_en = dcache_status();
> >
> > for (cnt = (maxsize / sizeof(long)) >> 1; cnt > 0; cnt >>= 1) {
> > addr = base + cnt; /* pointer arith! */
> > @@ -41,6 +60,8 @@ long get_ram_size(long *base, long maxsize)
> > save[i++] = *addr;
> > sync();
> > *addr = ~cnt;
> > + if (dcache_en)
> > + dcache_flush_invalidate(addr);
>
> Why this should be done on every increment if the invalidate keep a
> range of address?
We do invalidate/flush the current write, the granularity of the
flush/invalidate is the page size.
This is required since we need to ensure ordering of the writes. How
would you know where the aliasing is going to happen if you flush all at
once at the end?
> Can be possible just to enable/disable cache around memory test?
In theory yes. In practice this proved some architecture to just crash
badly because the stack was "corrupted" after re-enabling the cache.
We'll submit a separate bug fix for that, bug given that this pattern
(disable AND enable) is normally not done in U-Boot it seems like
looking for trouble doing it in such a commonly used routine.
Francesco
Re: [PATCH v2 2/2] common/memsize.c: Fix get_ram_size() when cache is enabled
Hi
Few questions
On Tue, May 30, 2023 at 3:34 PM Francesco Dolcini wrote:
>
> From: Emanuele Ghidoli
>
> Ensure that every write is flushed to memory and afterward reads are
> from memory.
> Since the algorithm rely on the fact that accessing to not existent
> memory lead to write at addr / 2 without this modification accesses
> to aliased (not physically present) addresses are cached and
> wrong size is returned.
>
> This was discovered while working on a TI AM625 based board
> where cache is normally enabled, see commit c02712a74849 ("arm: mach-k3:
> Enable dcache in SPL").
>
> Signed-off-by: Emanuele Ghidoli
> Signed-off-by: Francesco Dolcini
> ---
> v2:
> * check if CONFIG_SYS_CACHELINE_SIZE is defined
> * do flush only when cache is enabled
> ---
> common/memsize.c | 24
> 1 file changed, 24 insertions(+)
>
> diff --git a/common/memsize.c b/common/memsize.c
> index 66d5be6a1ff3..d646df8b04cb 100644
> --- a/common/memsize.c
> +++ b/common/memsize.c
> @@ -7,9 +7,18 @@
> #include
> #include
> #include
> +#include
> +#include
>
> DECLARE_GLOBAL_DATA_PTR;
>
> +#ifdef CONFIG_SYS_CACHELINE_SIZE
> +# define MEMSIZE_CACHELINE_SIZE CONFIG_SYS_CACHELINE_SIZE
> +#else
> +/* Just use the greatest cache flush alignment requirement I'm aware of */
> +# define MEMSIZE_CACHELINE_SIZE 128
> +#endif
> +
> #ifdef __PPC__
> /*
> * At least on G2 PowerPC cores, sequential accesses to non-existent
> @@ -20,6 +29,15 @@ DECLARE_GLOBAL_DATA_PTR;
> # define sync()/* nothing */
> #endif
>
> +static void dcache_flush_invalidate(volatile long *p)
> +{
> + uintptr_t start, stop;
> + start = ALIGN_DOWN((uintptr_t)p, MEMSIZE_CACHELINE_SIZE);
> + stop = start + MEMSIZE_CACHELINE_SIZE;
> + flush_dcache_range(start, stop);
> + invalidate_dcache_range(start, stop);
> +}
> +
> /*
> * Check memory range for valid RAM. A simple memory test determines
> * the actually available RAM size between addresses `base' and
> @@ -34,6 +52,7 @@ long get_ram_size(long *base, long maxsize)
> long val;
> long size;
> inti = 0;
> + intdcache_en = dcache_status();
>
> for (cnt = (maxsize / sizeof(long)) >> 1; cnt > 0; cnt >>= 1) {
> addr = base + cnt; /* pointer arith! */
> @@ -41,6 +60,8 @@ long get_ram_size(long *base, long maxsize)
> save[i++] = *addr;
> sync();
> *addr = ~cnt;
> + if (dcache_en)
> + dcache_flush_invalidate(addr);
Why this should be done on every increment if the invalidate keep a
range of address?
> }
>
> addr = base;
> @@ -50,6 +71,9 @@ long get_ram_size(long *base, long maxsize)
> *addr = 0;
>
> sync();
> + if (dcache_en)
> + dcache_flush_invalidate(addr);
> +
> if ((val = *addr) != 0) {
> /* Restore the original data before leaving the function. */
> sync();
Can be possible just to enable/disable cache around memory test?
Michael
> --
> 2.25.1
>
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
mich...@amarulasolutions.com
__
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
i...@amarulasolutions.com
www.amarulasolutions.com
Re: [PATCH v3] cmd: sf/nand: Print and return failure when 0 length is passed
On 5/30/23 14:23, Michal Simek wrote: On 5/16/23 13:52, Ashok Reddy Soma wrote: For sf commands, when '0' length is passed for erase, update, write or read, there might be undesired results. Ideally '0' length means nothing to do. So print 'ERROR: Invalid size 0' and return cmd failure when length '0' is passed to sf commands. Same thing applies for nand commands also. Example: ZynqMP> sf erase 0 0 ERROR: Invalid size 0 ZynqMP> sf write 1 0 0 ERROR: Invalid size 0 ZynqMP> sf read 1 0 0 ERROR: Invalid size 0 ZynqMP> sf update 1000 1 0 ERROR: Invalid size 0 ZynqMP> Signed-off-by: Ashok Reddy Soma --- Applied it to my queue. If someone else wants to take please let me know and I will drop it from my queue. I believe Jagan should be picking SF patches ?
[PATCH v2 2/2] common/memsize.c: Fix get_ram_size() when cache is enabled
From: Emanuele Ghidoli
Ensure that every write is flushed to memory and afterward reads are
from memory.
Since the algorithm rely on the fact that accessing to not existent
memory lead to write at addr / 2 without this modification accesses
to aliased (not physically present) addresses are cached and
wrong size is returned.
This was discovered while working on a TI AM625 based board
where cache is normally enabled, see commit c02712a74849 ("arm: mach-k3: Enable
dcache in SPL").
Signed-off-by: Emanuele Ghidoli
Signed-off-by: Francesco Dolcini
---
v2:
* check if CONFIG_SYS_CACHELINE_SIZE is defined
* do flush only when cache is enabled
---
common/memsize.c | 24
1 file changed, 24 insertions(+)
diff --git a/common/memsize.c b/common/memsize.c
index 66d5be6a1ff3..d646df8b04cb 100644
--- a/common/memsize.c
+++ b/common/memsize.c
@@ -7,9 +7,18 @@
#include
#include
#include
+#include
+#include
DECLARE_GLOBAL_DATA_PTR;
+#ifdef CONFIG_SYS_CACHELINE_SIZE
+# define MEMSIZE_CACHELINE_SIZE CONFIG_SYS_CACHELINE_SIZE
+#else
+/* Just use the greatest cache flush alignment requirement I'm aware of */
+# define MEMSIZE_CACHELINE_SIZE 128
+#endif
+
#ifdef __PPC__
/*
* At least on G2 PowerPC cores, sequential accesses to non-existent
@@ -20,6 +29,15 @@ DECLARE_GLOBAL_DATA_PTR;
# define sync()/* nothing */
#endif
+static void dcache_flush_invalidate(volatile long *p)
+{
+ uintptr_t start, stop;
+ start = ALIGN_DOWN((uintptr_t)p, MEMSIZE_CACHELINE_SIZE);
+ stop = start + MEMSIZE_CACHELINE_SIZE;
+ flush_dcache_range(start, stop);
+ invalidate_dcache_range(start, stop);
+}
+
/*
* Check memory range for valid RAM. A simple memory test determines
* the actually available RAM size between addresses `base' and
@@ -34,6 +52,7 @@ long get_ram_size(long *base, long maxsize)
long val;
long size;
inti = 0;
+ intdcache_en = dcache_status();
for (cnt = (maxsize / sizeof(long)) >> 1; cnt > 0; cnt >>= 1) {
addr = base + cnt; /* pointer arith! */
@@ -41,6 +60,8 @@ long get_ram_size(long *base, long maxsize)
save[i++] = *addr;
sync();
*addr = ~cnt;
+ if (dcache_en)
+ dcache_flush_invalidate(addr);
}
addr = base;
@@ -50,6 +71,9 @@ long get_ram_size(long *base, long maxsize)
*addr = 0;
sync();
+ if (dcache_en)
+ dcache_flush_invalidate(addr);
+
if ((val = *addr) != 0) {
/* Restore the original data before leaving the function. */
sync();
--
2.25.1
[PATCH v2 1/2] sandbox: Add a dummy dcache_status() function
From: Emanuele Ghidoli
This adds dcache_status() so that code using it can build
without error on sandbox. This is required in preparation
of adding cache handling into get_ram_size function.
Signed-off-by: Emanuele Ghidoli
Signed-off-by: Francesco Dolcini
---
arch/sandbox/cpu/cpu.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c
index 51496338ad60..a1c5c7c4311a 100644
--- a/arch/sandbox/cpu/cpu.c
+++ b/arch/sandbox/cpu/cpu.c
@@ -286,6 +286,11 @@ void sandbox_set_enable_pci_map(int enable)
enable_pci_map = enable;
}
+int dcache_status(void)
+{
+ return 1;
+}
+
void flush_dcache_range(unsigned long start, unsigned long stop)
{
}
--
2.25.1
[PATCH v2 0/2] common/memsize.c: Fix get_ram_size() when cache is enabled
From: Francesco Dolcini
Ensure that every write is flushed to memory and afterward reads are
from memory.
Since the algorithm rely on the fact that accessing to not existent
memory lead to write at addr / 2 without this modification accesses
to aliased (not physically present) addresses are cached and
wrong size is returned.
This was discovered while working on a TI AM625 based board
where cache is normally enabled, see commit c02712a74849 ("arm: mach-k3: Enable
dcache in SPL").
Test results here: https://github.com/u-boot/u-boot/pull/293
v2:
* added additional patch to fix sandbox build
* ensure that the changes are fine with every arch/build,
check if cache is enabled and check for cache line size define
Emanuele Ghidoli (2):
sandbox: Add a dummy dcache_status() function
common/memsize.c: Fix get_ram_size() when cache is enabled
arch/sandbox/cpu/cpu.c | 5 +
common/memsize.c | 24
2 files changed, 29 insertions(+)
--
2.25.1
Re: [PATCH] global: Use proper project name U-Boot
On 5/22/23 10:16, Neil Armstrong wrote: On 17/05/2023 09:17, Michal Simek wrote: Use proper project name in comments, Kconfig, readmes. Signed-off-by: Michal Simek For amlogic changes: Reviewed-by: Neil Armstrong --- I am ignoring these for now because they can break automated scripts or user setting that's why they should be fixed separately. doc/board/amlogic/pre-generated-fip.rst:77:- bl33.bin: U-boot binary image You can add this change safely, Neil Applied. M
[PATCH 2/2] config: stm32mp15: remove CONFIG_FASTBOOT_CMD_OEM_FORMAT
Remove the support of the fastboot "oem format" command for STM32MP15x boards and removed the associated env variable "partitions". This command is not required; with fastboot tool, the GPT partition can be handle with "flash" command in "gpt" target (=CONFIG_FASTBOOT_GPT_NAME), for example: fastboot flash gpt gpt.bin This patch avoids to define the GPT partitioning in U-Boot environment, which is incompatible with planned modifications, for example to support TF-A firmware update. Signed-off-by: Patrick Delaunay --- configs/stm32mp15_basic_defconfig | 1 - configs/stm32mp15_defconfig | 1 - configs/stm32mp15_trusted_defconfig | 1 - include/configs/stm32mp15_common.h| 14 -- include/configs/stm32mp15_st_common.h | 1 - 5 files changed, 18 deletions(-) diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 174eb42d6447..dc67873d3934 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -109,7 +109,6 @@ CONFIG_FASTBOOT_MMC_BOOT1_NAME="mmc1boot0" CONFIG_FASTBOOT_MMC_BOOT2_NAME="mmc1boot1" CONFIG_FASTBOOT_MMC_USER_SUPPORT=y CONFIG_FASTBOOT_MMC_USER_NAME="mmc1" -CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_FASTBOOT_CMD_OEM_PARTCONF=y CONFIG_FASTBOOT_CMD_OEM_BOOTBUS=y CONFIG_GPIO_HOG=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index b25477c64d03..fd8c9121762e 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -82,7 +82,6 @@ CONFIG_FASTBOOT_MMC_BOOT1_NAME="mmc1boot0" CONFIG_FASTBOOT_MMC_BOOT2_NAME="mmc1boot1" CONFIG_FASTBOOT_MMC_USER_SUPPORT=y CONFIG_FASTBOOT_MMC_USER_NAME="mmc1" -CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_FASTBOOT_CMD_OEM_PARTCONF=y CONFIG_FASTBOOT_CMD_OEM_BOOTBUS=y CONFIG_GPIO_HOG=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index e93a66f867cf..ec6298a0cb4a 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -83,7 +83,6 @@ CONFIG_FASTBOOT_MMC_BOOT1_NAME="mmc1boot0" CONFIG_FASTBOOT_MMC_BOOT2_NAME="mmc1boot1" CONFIG_FASTBOOT_MMC_USER_SUPPORT=y CONFIG_FASTBOOT_MMC_USER_NAME="mmc1" -CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_FASTBOOT_CMD_OEM_PARTCONF=y CONFIG_FASTBOOT_CMD_OEM_BOOTBUS=y CONFIG_GPIO_HOG=y diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index 7db72a19ed95..29a1197b5ae2 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -92,19 +92,6 @@ "run distro_bootcmd;" \ "fi;\0" -#ifdef CONFIG_FASTBOOT_CMD_OEM_FORMAT -/* eMMC default partitions for fastboot command: oem format */ -#define STM32MP_PARTS_DEFAULT \ - "partitions=" \ - "name=ssbl,size=2M;" \ - "name=bootfs,size=64MB,bootable;" \ - "name=vendorfs,size=16M;" \ - "name=rootfs,size=746M;" \ - "name=userfs,size=-\0" -#else -#define STM32MP_PARTS_DEFAULT -#endif - #define STM32MP_EXTRA \ "env_check=if env info -p -d -q; then env save; fi\0" \ "boot_net_usb_start=true\0" @@ -138,7 +125,6 @@ #define CFG_EXTRA_ENV_SETTINGS \ STM32MP_MEM_LAYOUT \ STM32MP_BOOTCMD \ - STM32MP_PARTS_DEFAULT \ BOOTENV \ STM32MP_EXTRA \ STM32MP_BOARD_EXTRA_ENV diff --git a/include/configs/stm32mp15_st_common.h b/include/configs/stm32mp15_st_common.h index 866cd7a719f8..b45982a35b8c 100644 --- a/include/configs/stm32mp15_st_common.h +++ b/include/configs/stm32mp15_st_common.h @@ -47,7 +47,6 @@ #define CFG_EXTRA_ENV_SETTINGS \ STM32MP_MEM_LAYOUT \ ST_STM32MP1_BOOTCMD \ - STM32MP_PARTS_DEFAULT \ BOOTENV \ STM32MP_EXTRA \ STM32MP_BOARD_EXTRA_ENV -- 2.25.1
[PATCH 1/2] config: stm32mp15: remove CONFIG_FASTBOOT_USB_DEV
The CONFIG_FASTBOOT_USB_DEV is used to select USB OTG controller other
than 0 but it is not the case for STM32MP15 boards; it can be removed
to simplify the STM32MP15 defconfig files.
On STM32MP15x boards, we have only one USB device with instance 0,
so the device is hardcoded arch/arm/mach-stm32mp/cpu.c with
the command "fastboot 0" and this define is not used in config files
(include/configs/stm32mp15_st_common.h).
Fixes: 4633fd51c5d7 ("stm32mp1: activate FASTBOOT on eMMC")
Signed-off-by: Patrick Delaunay
---
configs/stm32mp15_basic_defconfig | 1 -
configs/stm32mp15_defconfig | 1 -
configs/stm32mp15_trusted_defconfig | 1 -
3 files changed, 3 deletions(-)
diff --git a/configs/stm32mp15_basic_defconfig
b/configs/stm32mp15_basic_defconfig
index 13355ebb4692..174eb42d6447 100644
--- a/configs/stm32mp15_basic_defconfig
+++ b/configs/stm32mp15_basic_defconfig
@@ -102,7 +102,6 @@ CONFIG_SET_DFU_ALT_INFO=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0xC000
CONFIG_FASTBOOT_BUF_SIZE=0x0200
-CONFIG_FASTBOOT_USB_DEV=1
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y
diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig
index 2669aae0f2f4..b25477c64d03 100644
--- a/configs/stm32mp15_defconfig
+++ b/configs/stm32mp15_defconfig
@@ -75,7 +75,6 @@ CONFIG_SET_DFU_ALT_INFO=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0xC000
CONFIG_FASTBOOT_BUF_SIZE=0x0200
-CONFIG_FASTBOOT_USB_DEV=1
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y
diff --git a/configs/stm32mp15_trusted_defconfig
b/configs/stm32mp15_trusted_defconfig
index 5f0fb4565105..e93a66f867cf 100644
--- a/configs/stm32mp15_trusted_defconfig
+++ b/configs/stm32mp15_trusted_defconfig
@@ -76,7 +76,6 @@ CONFIG_SET_DFU_ALT_INFO=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0xC000
CONFIG_FASTBOOT_BUF_SIZE=0x0200
-CONFIG_FASTBOOT_USB_DEV=1
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y
--
2.25.1
Re: [PATCH] board: xilinx: Add missing prototypes
On 5/23/23 07:56, Ashok Reddy Soma wrote: From: Algapally Santosh Sagar Add missing prototypes to fix the below sparse warnings 1. warning: no previous prototype for 'soc_name_decode' [-Wmissing-prototypes] 2. warning: no previous prototype for 'soc_detection' [-Wmissing-prototypes] 3. warning: no previous prototype for 'board_name_decode' [-Wmissing-prototypes] 4. warning: no previous prototype for 'board_detection' [-Wmissing-prototypes] Signed-off-by: Algapally Santosh Sagar Signed-off-by: Ashok Reddy Soma --- board/xilinx/common/board.h | 7 +++ 1 file changed, 7 insertions(+) diff --git a/board/xilinx/common/board.h b/board/xilinx/common/board.h index 69e642429b..922c9d557a 100644 --- a/board/xilinx/common/board.h +++ b/board/xilinx/common/board.h @@ -11,4 +11,11 @@ int board_late_init_xilinx(void); int xilinx_read_eeprom(void); +char *board_name_decode(void); + +bool board_detection(void); + +char *soc_name_decode(void); + +bool soc_detection(void); #endif /* BOARD_XILINX_COMMON_BOARD_H */ Applied. M
Re: [PATCH] xilinx: versal-net: Add new versalnet loadpdi command
On 5/22/23 15:21, Michal Simek wrote:
From: Algapally Santosh Sagar
Versal NET loadpdi command is used for loading secure & non-secure
pdi images.
Signed-off-by: Algapally Santosh Sagar
Signed-off-by: Michal Simek
---
board/xilinx/versal-net/Kconfig | 8
board/xilinx/versal-net/Makefile | 1 +
board/xilinx/versal-net/cmds.c | 81
3 files changed, 90 insertions(+)
create mode 100644 board/xilinx/versal-net/cmds.c
diff --git a/board/xilinx/versal-net/Kconfig b/board/xilinx/versal-net/Kconfig
index 8f94d2bb399a..2484429d3cb3 100644
--- a/board/xilinx/versal-net/Kconfig
+++ b/board/xilinx/versal-net/Kconfig
@@ -6,4 +6,12 @@
if ARCH_VERSAL_NET
+config CMD_VERSAL_NET
+ bool "Enable Versal NET specific commands"
+ default y
+ depends on ZYNQMP_FIRMWARE
+ help
+ Select this to enable Versal NET specific commands.
+ Commands like versalnet loadpdi are enabled by this.
+
endif
diff --git a/board/xilinx/versal-net/Makefile b/board/xilinx/versal-net/Makefile
index 2008d4e231c6..f9ff07c11c63 100644
--- a/board/xilinx/versal-net/Makefile
+++ b/board/xilinx/versal-net/Makefile
@@ -7,3 +7,4 @@
#
obj-y := board.o
+obj-$(CONFIG_CMD_VERSAL_NET) += cmds.o
diff --git a/board/xilinx/versal-net/cmds.c b/board/xilinx/versal-net/cmds.c
new file mode 100644
index ..b18a71fe52c0
--- /dev/null
+++ b/board/xilinx/versal-net/cmds.c
@@ -0,0 +1,81 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023, Advanced Micro Devices, Inc.
+ *
+ * Michal Simek
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/**
+ * do_versalnet_load_pdi - Handle the "versalnet load pdi" command-line command
+ * @cmdtp: Command data struct pointer
+ * @flag: Command flag
+ * @argc: Command-line argument count
+ * @argv: Array of command-line arguments
+ *
+ * Processes the Versal NET load pdi command
+ *
+ * Return: return 0 on success, Error value if command fails.
+ * CMD_RET_USAGE incase of incorrect/missing parameters.
+ */
+static int do_versalnet_load_pdi(struct cmd_tbl *cmdtp, int flag, int argc,
+char * const argv[])
+{
+ u32 buf_lo, buf_hi;
+ u32 ret_payload[PAYLOAD_ARG_CNT];
+ ulong addr, *pdi_buf;
+ size_t len;
+ int ret;
+
+ if (argc != cmdtp->maxargs) {
+ debug("pdi_load: incorrect parameters passed\n");
+ return CMD_RET_USAGE;
+ }
+
+ addr = simple_strtol(argv[1], NULL, 16);
+ if (!addr) {
+ debug("pdi_load: zero pdi_data address\n");
+ return CMD_RET_USAGE;
+ }
+
+ len = hextoul(argv[2], NULL);
+ if (!len) {
+ debug("pdi_load: zero size\n");
+ return CMD_RET_USAGE;
+ }
+
+ pdi_buf = (ulong *)ALIGN((ulong)addr, ARCH_DMA_MINALIGN);
+ if ((ulong)addr != (ulong)pdi_buf) {
+ memcpy((void *)pdi_buf, (void *)addr, len);
+ debug("Pdi addr:0x%lx aligned to 0x%lx\n",
+ addr, (ulong)pdi_buf);
+ }
+
+ flush_dcache_range((ulong)pdi_buf, (ulong)pdi_buf + len);
+
+ buf_lo = lower_32_bits((ulong)pdi_buf);
+ buf_hi = upper_32_bits((ulong)pdi_buf);
+
+ ret = xilinx_pm_request(VERSAL_PM_LOAD_PDI, VERSAL_PM_PDI_TYPE, buf_lo,
+ buf_hi, 0, ret_payload);
+ if (ret)
+ printf("PDI load failed with err: 0x%08x\n", ret);
+
+ return cmd_process_error(cmdtp, ret);
+}
+
+static char versalnet_help_text[] =
+ "loadpdi addr len - Load pdi image\n"
+ "load pdi image at ddr address 'addr' with pdi image size 'len'\n"
+;
+
+U_BOOT_CMD_WITH_SUBCMDS(versalnet, "Versal NET sub-system",
versalnet_help_text,
+ U_BOOT_SUBCMD_MKENT(loadpdi, 3, 1,
+ do_versalnet_load_pdi));
Applied.
M
Re: [PATCH] mmc: zynq: Sync with upstream DT binding
On 5/17/23 10:22, Michal Simek wrote:
Versal NET is not in production yet that's why no need to keep backward
compatible with previously used compatible string.
Signed-off-by: Michal Simek
Link:
https://lore.kernel.org/r/20230403102551.3763054-2-sai.krishna.potth...@amd.com
---
drivers/mmc/zynq_sdhci.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index e44868aaec51..e779251ce34f 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -873,7 +873,7 @@ static int arasan_sdhci_set_tapdelay(struct sdhci_host
*host)
if (ret)
return ret;
} else if (IS_ENABLED(CONFIG_ARCH_VERSAL_NET) &&
- device_is_compatible(dev, "xlnx,versal-net-5.1-emmc")) {
+ device_is_compatible(dev, "xlnx,versal-net-emmc")) {
if (mmc->clock >= MIN_PHY_CLK_HZ)
if (iclk_phase ==
VERSAL_NET_EMMC_ICLK_PHASE_DDR52_DLY_CHAIN)
iclk_phase =
VERSAL_NET_EMMC_ICLK_PHASE_DDR52_DLL;
@@ -948,7 +948,7 @@ static void arasan_dt_parse_clk_phases(struct udevice *dev)
}
if (IS_ENABLED(CONFIG_ARCH_VERSAL_NET) &&
- device_is_compatible(dev, "xlnx,versal-net-5.1-emmc")) {
+ device_is_compatible(dev, "xlnx,versal-net-emmc")) {
for (i = 0; i <= MMC_TIMING_MMC_HS400; i++) {
clk_data->clk_phase_in[i] =
versal_net_emmc_iclk_phases[i];
clk_data->clk_phase_out[i] =
versal_net_emmc_oclk_phases[i];
@@ -1102,7 +1102,7 @@ static int arasan_sdhci_probe(struct udevice *dev)
}
}
#endif
- if (device_is_compatible(dev, "xlnx,versal-net-5.1-emmc"))
+ if (device_is_compatible(dev, "xlnx,versal-net-emmc"))
priv->internal_phy_reg = true;
ret = clk_get_by_index(dev, 0, );
@@ -1136,7 +1136,7 @@ static int arasan_sdhci_probe(struct udevice *dev)
host->quirks |= SDHCI_QUIRK_NO_1_8_V;
if (CONFIG_IS_ENABLED(ARCH_VERSAL_NET) &&
- device_is_compatible(dev, "xlnx,versal-net-5.1-emmc"))
+ device_is_compatible(dev, "xlnx,versal-net-emmc"))
host->quirks |= SDHCI_QUIRK_CAPS_BIT63_FOR_HS400;
plat->cfg.f_max = CONFIG_ZYNQ_SDHCI_MAX_FREQ;
@@ -1219,7 +1219,7 @@ static int arasan_sdhci_bind(struct udevice *dev)
static const struct udevice_id arasan_sdhci_ids[] = {
{ .compatible = "arasan,sdhci-8.9a" },
- { .compatible = "xlnx,versal-net-5.1-emmc" },
+ { .compatible = "xlnx,versal-net-emmc" },
{ }
};
Applied.
M
Re: [PATCH] arm64: versal-net: Add support for SPP production version
On 5/17/23 10:21, Michal Simek wrote:
Production version restarting platform version field from 0 that's why add
new calculation to be able to use different DT for these platforms.
Requested DT names for production silicons for IPP/SPP and EMU platform are
versal-net-ipp-rev2.0.dts and versal-net-emu-rev2.0.dts.
If platform version increase numbers revision can be even higher.
As of today platform version is 2 that's why expected is rev2.2.
Signed-off-by: Michal Simek
---
.../mach-versal-net/include/mach/hardware.h | 1 +
board/xilinx/versal-net/board.c | 35 +--
2 files changed, 25 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-versal-net/include/mach/hardware.h
b/arch/arm/mach-versal-net/include/mach/hardware.h
index c5e4e22040e2..3de9d439bc5c 100644
--- a/arch/arm/mach-versal-net/include/mach/hardware.h
+++ b/arch/arm/mach-versal-net/include/mach/hardware.h
@@ -44,6 +44,7 @@ struct iou_scntrs_regs {
#define PMC_TAP_VERSION (PMC_TAP + 0x4)
# define PMC_VERSION_MASK GENMASK(7, 0)
# define PS_VERSION_MASK GENMASK(15, 8)
+# define PS_VERSION_PRODUCTION 0x20
# define RTL_VERSION_MASK GENMASK(23, 16)
# define PLATFORM_MASKGENMASK(27, 24)
# define PLATFORM_VERSION_MASKGENMASK(31, 28)
diff --git a/board/xilinx/versal-net/board.c b/board/xilinx/versal-net/board.c
index 6724c7290f8e..0e1321734f32 100644
--- a/board/xilinx/versal-net/board.c
+++ b/board/xilinx/versal-net/board.c
@@ -74,32 +74,45 @@ char *soc_name_decode(void)
bool soc_detection(void)
{
- u32 version;
+ u32 version, ps_version;
version = readl(PMC_TAP_VERSION);
platform_id = FIELD_GET(PLATFORM_MASK, version);
+ ps_version = FIELD_GET(PS_VERSION_MASK, version);
debug("idcode %x, version %x, usercode %x\n",
readl(PMC_TAP_IDCODE), version,
readl(PMC_TAP_USERCODE));
- debug("pmc_ver %lx, ps version %lx, rtl version %lx\n",
+ debug("pmc_ver %lx, ps version %x, rtl version %lx\n",
FIELD_GET(PMC_VERSION_MASK, version),
- FIELD_GET(PS_VERSION_MASK, version),
+ ps_version,
FIELD_GET(RTL_VERSION_MASK, version));
platform_version = FIELD_GET(PLATFORM_VERSION_MASK, version);
if (platform_id == VERSAL_NET_SPP ||
platform_id == VERSAL_NET_EMU) {
- /*
-* 9 is diff for
-* 0 means 0.9 version
-* 1 means 1.0 version
-* 2 means 1.1 version
-* etc,
-*/
- platform_version += 9;
+ if (ps_version == PS_VERSION_PRODUCTION) {
+ /*
+* ES1 version ends at 1.9 version where there was +9
+* used because of IPP/SPP conversion. Production
+* version have platform_version started from 0 again
+* that's why adding +20 to continue with the same line.
+* It means the last ES1 version ends at 1.9 version and
+* new PRODUCTION line starts at 2.0.
+*/
+ platform_version += 20;
+ } else {
+ /*
+* 9 is diff for
+* 0 means 0.9 version
+* 1 means 1.0 version
+* 2 means 1.1 version
+* etc,
+*/
+ platform_version += 9;
+ }
}
debug("Platform id: %d version: %d.%d\n", platform_id,
Applied.
M
Re: [PATCH v3] cmd: sf/nand: Print and return failure when 0 length is passed
On 5/16/23 13:52, Ashok Reddy Soma wrote: For sf commands, when '0' length is passed for erase, update, write or read, there might be undesired results. Ideally '0' length means nothing to do. So print 'ERROR: Invalid size 0' and return cmd failure when length '0' is passed to sf commands. Same thing applies for nand commands also. Example: ZynqMP> sf erase 0 0 ERROR: Invalid size 0 ZynqMP> sf write 1 0 0 ERROR: Invalid size 0 ZynqMP> sf read 1 0 0 ERROR: Invalid size 0 ZynqMP> sf update 1000 1 0 ERROR: Invalid size 0 ZynqMP> Signed-off-by: Ashok Reddy Soma --- Applied it to my queue. If someone else wants to take please let me know and I will drop it from my queue. Thanks, Michal
BTRFS Support btrload, btrls
Hi Everybody,
I am currently evaluating filesystems that can be used reliable on eMMC
storage, which support transparent compression.
I see that U-Boot supports btrfs. But I don't understand how to load for
example a kernel image from the fs, I was expecting 'btrload' as an analog to
'ext4load' or 'fatload'.
Is there a reason why this commands are not implemented?
When I do patch the file cmd/btfs.c to add 'btrload' I do get a working U-Boot
capable of loading DT and kernal image from btrfs.
'''
char subvolname[1];
int do_btr_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
subvolname[0] = '\0';
return do_load(cmdtp, flag, argc, argv, FS_TYPE_BTRFS);
}
U_BOOT_CMD(
btrload,7, 0, do_btr_fsload,
"load binary file from a btr filesystem",
" [] \n"
"- Load binary file 'filename' from 'dev' on 'interface'\n"
" to address 'addr' from better filesystem.\n"
" the load stops on end of file.\n"
" All numeric parameters are assumed to be hex."
);
'''
Are there any known stability issues, why 'btrload' and 'btrfs' are not
included in the current U-Boot?
Or is there an alternative to 'btrload' to load a kernelimage from fs to ram?
thanks,
Georg
Georg Ottinger
Software Engineer
RESEARCH & DEVELOPMENT
ABATEC GmbH
[https://abatec.at/email/phone.jpg]
+43767227720532
[https://abatec.at/email/email.jpg]
g.ottin...@abatec.at
[https://abatec.at/email/site.jpg]
www.abatec.at
[PATCH 5/5] rockchip: rk3568: Use dwc3-generic driver
Change RK3568 devices to use the newer dwc3-generic driver instead of the old xhci-dwc3 driver for USB 3.0 support. Signed-off-by: Jonas Karlman --- configs/radxa-cm3-io-rk3566_defconfig | 2 +- configs/rock-3a-rk3568_defconfig | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/radxa-cm3-io-rk3566_defconfig b/configs/radxa-cm3-io-rk3566_defconfig index 56802d85cc25..e1b3602d24db 100644 --- a/configs/radxa-cm3-io-rk3566_defconfig +++ b/configs/radxa-cm3-io-rk3566_defconfig @@ -74,8 +74,8 @@ CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_ERRNO_STR=y diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig index 616499f2f82b..ea72a8c9f6b3 100644 --- a/configs/rock-3a-rk3568_defconfig +++ b/configs/rock-3a-rk3568_defconfig @@ -84,10 +84,10 @@ CONFIG_ROCKCHIP_SFC=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_ERRNO_STR=y -- 2.40.1
[PATCH 4/5] usb: dwc3-generic: Add rk3568 support
RK3568 share glue and ctrl in a single node. Use glue_get_ctrl_dev to
return the the glue node as the ctrl node.
Signed-off-by: Jonas Karlman
---
drivers/usb/dwc3/dwc3-generic.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index f7859a530280..0d30657da319 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -406,6 +406,22 @@ struct dwc3_glue_ops ti_ops = {
.glue_configure = dwc3_ti_glue_configure,
};
+static int dwc3_rk_glue_get_ctrl_dev(struct udevice *dev, ofnode *node)
+{
+ if (!device_is_compatible(dev, "snps,dwc3"))
+ return -EINVAL;
+
+ *node = dev_ofnode(dev);
+ if (!ofnode_valid(*node))
+ return -EINVAL;
+
+ return 0;
+}
+
+struct dwc3_glue_ops rk_ops = {
+ .glue_get_ctrl_dev = dwc3_rk_glue_get_ctrl_dev,
+};
+
static int dwc3_glue_bind_common(struct udevice *parent, ofnode node)
{
const char *name = ofnode_get_name(node);
@@ -607,6 +623,7 @@ static const struct udevice_id dwc3_glue_ids[] = {
{ .compatible = "ti,am654-dwc3" },
{ .compatible = "rockchip,rk3328-dwc3" },
{ .compatible = "rockchip,rk3399-dwc3" },
+ { .compatible = "rockchip,rk3568-dwc3", .data = (ulong)_ops },
{ .compatible = "qcom,dwc3" },
{ .compatible = "fsl,imx8mp-dwc3", .data = (ulong)_ops },
{ .compatible = "fsl,imx8mq-dwc3" },
--
2.40.1
[PATCH 3/5] usb: dwc3-generic: Relax unsupported dr_mode check
When dr_mode is peripheral or otg and U-Boot has not been built with
DM_USB_GADGET support, booting such device may end up with:
dwc3_glue_bind_common: subnode name: usb@fcc0
Error binding driver 'dwc3-generic-wrapper': -6
Some drivers failed to bind
initcall sequence effbca08 failed at call 00a217c8 (err=-6)
### ERROR ### Please RESET the board ###
Instead fail gracfully with ENODEV to allow board continue booting.
dwc3_glue_bind_common: subnode name: usb@fcc0
dwc3_glue_bind_common: unsupported dr_mode
Signed-off-by: Jonas Karlman
---
drivers/usb/dwc3/dwc3-generic.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index c28ad47bddd8..f7859a530280 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -422,13 +422,13 @@ static int dwc3_glue_bind_common(struct udevice *parent,
ofnode node)
dr_mode = usb_get_dr_mode(node);
switch (dr_mode) {
+#if CONFIG_IS_ENABLED(DM_USB_GADGET)
case USB_DR_MODE_PERIPHERAL:
case USB_DR_MODE_OTG:
-#if CONFIG_IS_ENABLED(DM_USB_GADGET)
debug("%s: dr_mode: OTG or Peripheral\n", __func__);
driver = "dwc3-generic-peripheral";
-#endif
break;
+#endif
#if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD)
case USB_DR_MODE_HOST:
debug("%s: dr_mode: HOST\n", __func__);
--
2.40.1
[PATCH 2/5] usb: dwc3-generic: Return early when there is no child node
The call to device_find_first_child always return 0, change to return
early when there is no child node.
Signed-off-by: Jonas Karlman
---
drivers/usb/dwc3/dwc3-generic.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 66da5a8d6f8c..c28ad47bddd8 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -558,9 +558,9 @@ int dwc3_glue_probe(struct udevice *dev)
return ret;
}
- ret = device_find_first_child(dev, );
- if (ret)
- return ret;
+ device_find_first_child(dev, );
+ if (!child)
+ return 0;
if (glue->clks.count == 0) {
ret = dwc3_glue_clk_init(child, glue);
--
2.40.1
[PATCH 1/5] Revert "arm: dts: rockchip: radxa-cm3-io, rock-3a: enable regulators for usb"
Remove regulator-boot-on prop from regulators now that the phy core has
support for phy-supply after commit c57e0dcd9384 "phy: add support for
phy-supply".
This reverts commit 7911f409ff20dce5995cc1b703a6e30c94022f6b.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
---
arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi | 4
arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 8
2 files changed, 12 deletions(-)
diff --git a/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
b/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
index f91740c1c0c8..57b77151c57c 100644
--- a/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
+++ b/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
@@ -77,7 +77,3 @@
bootph-all;
status = "okay";
};
-
-_usb30 {
- regulator-boot-on;
-};
diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
index bbf54f888fa0..ecbbdeee32f8 100644
--- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
@@ -110,11 +110,3 @@
bootph-all;
status = "okay";
};
-
-_usb_host {
- regulator-boot-on;
-};
-
-_usb_hub {
- regulator-boot-on;
-};
--
2.40.1
[PATCH 0/5] rockchip: rk3568: Use dwc3-generic driver
This series add support for rk3568 in dwc3-generic driver and change to use the dwc3-generic driver for rk3568 devices having usb enabled. After these changes it should be possible to support usb gadget on rk3568 with e.g.: # CONFIG_USB_FUNCTION_FASTBOOT is not set CONFIG_DM_USB_GADGET=y CONFIG_USB_GADGET=y Patch 1 reverts addition of now unnecessary regulator-boot-on props. Patch 2 improve support for childless glue/ctrl dt node. Patch 3 relax a hard error when usb gadget support is not enabled. Patch 4 add support for the glue/ctrl dt node used by rk3568. Patch 5 change rk3568 devices to use dwc3-generic driver. This series is also available at [1] [1] https://github.com/Kwiboo/u-boot-rockchip/commits/rk3568-dwc3-generic-v1 Jonas Karlman (5): Revert "arm: dts: rockchip: radxa-cm3-io, rock-3a: enable regulators for usb" usb: dwc3-generic: Return early when there is no child node usb: dwc3-generic: Relax unsupported dr_mode check usb: dwc3-generic: Add rk3568 support rockchip: rk3568: Use dwc3-generic driver arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi | 4 --- arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 8 -- configs/radxa-cm3-io-rk3566_defconfig| 2 +- configs/rock-3a-rk3568_defconfig | 2 +- drivers/usb/dwc3/dwc3-generic.c | 27 5 files changed, 24 insertions(+), 19 deletions(-) -- 2.40.1
[PATCH] ARM: at91: armv7: don't initialize clocks if scmi clock driver is enabled
From: Clément Léger
Because clock devices are initialized by the SCMI server, if
CONFIG_CLK_SCMI is defined.
Signed-off-by: Clément Léger
Signed-off-by: Thomas Perrot
---
arch/arm/mach-at91/armv7/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/armv7/cpu.c b/arch/arm/mach-at91/armv7/cpu.c
index 616621a1f9de..5ea7e2609f59 100644
--- a/arch/arm/mach-at91/armv7/cpu.c
+++ b/arch/arm/mach-at91/armv7/cpu.c
@@ -24,7 +24,7 @@
int arch_cpu_init(void)
{
-#if defined(CONFIG_CLK_CCF)
+#if defined(CONFIG_CLK_CCF) || defined(CONFIG_CLK_SCMI)
return 0;
#else
return at91_clock_init(CFG_SYS_AT91_MAIN_CLOCK);
--
2.40.1
[PATCH v3 2/2] rockchip: rk3568: Add support for FriendlyARM NanoPi R5C
FriendlyARM NanoPi R5C is an open-sourced mini IoT gateway device.
Specification:
- Rockchip RK3568
- 1/4GB LPDDR4X RAM
- 8/32GB eMMC
- SD card slot
- M.2 Connector
- 2x USB 3.0 Port
- 2x 2500 Base-T (PCIe, r8125)
- HDMI 2.0
- MIPI DSI/CSI
- USB Type C 5V
The device tree is taken from kernel v6.4-rc1.
Reviewed-by: Kever Yang
Signed-off-by: Tianling Shen
---
Changes since v2:
* https://lore.kernel.org/u-boot/20230529045954.21689-2-cns...@gmail.com/
* Collected Reviewed-by tag
* Removed unused configs, reordered
Changes since v1:
* https://lore.kernel.org/u-boot/20230528094017.2949-2-cns...@gmail.com/
* Added dtb to Makefile
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi | 3 +
arch/arm/dts/rk3568-nanopi-r5c.dts | 112 +
board/rockchip/evb_rk3568/MAINTAINERS | 7 ++
configs/nanopi-r5c-rk3568_defconfig| 85
5 files changed, 208 insertions(+)
create mode 100644 arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3568-nanopi-r5c.dts
create mode 100644 configs/nanopi-r5c-rk3568_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index e2eda3ffcb..507bfb512a 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -169,6 +169,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
rk3566-anbernic-rgxx3.dtb \
rk3566-radxa-cm3-io.dtb \
rk3568-evb.dtb \
+ rk3568-nanopi-r5c.dtb \
rk3568-nanopi-r5s.dtb \
rk3568-rock-3a.dtb
diff --git a/arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi
b/arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi
new file mode 100644
index 00..fe5bc6af47
--- /dev/null
+++ b/arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi
@@ -0,0 +1,3 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "rk3568-nanopi-r5s-u-boot.dtsi"
diff --git a/arch/arm/dts/rk3568-nanopi-r5c.dts
b/arch/arm/dts/rk3568-nanopi-r5c.dts
new file mode 100644
index 00..f70ca9f047
--- /dev/null
+++ b/arch/arm/dts/rk3568-nanopi-r5c.dts
@@ -0,0 +1,112 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
+ * (http://www.friendlyelec.com)
+ *
+ * Copyright (c) 2023 Tianling Shen
+ */
+
+/dts-v1/;
+#include "rk3568-nanopi-r5s.dtsi"
+
+/ {
+ model = "FriendlyElec NanoPi R5C";
+ compatible = "friendlyarm,nanopi-r5c", "rockchip,rk3568";
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <_button_pin>;
+
+ button-reset {
+ debounce-interval = <50>;
+ gpios = < RK_PB7 GPIO_ACTIVE_LOW>;
+ label = "reset";
+ linux,code = ;
+ };
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <_led_pin>, <_led_pin>, <_led_pin>,
<_led_pin>;
+
+ led-lan {
+ color = ;
+ function = LED_FUNCTION_LAN;
+ gpios = < RK_PA3 GPIO_ACTIVE_HIGH>;
+ };
+
+ power_led: led-power {
+ color = ;
+ function = LED_FUNCTION_POWER;
+ linux,default-trigger = "heartbeat";
+ gpios = < RK_PA2 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-wan {
+ color = ;
+ function = LED_FUNCTION_WAN;
+ gpios = < RK_PA4 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-wlan {
+ color = ;
+ function = LED_FUNCTION_WLAN;
+ gpios = < RK_PA5 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_reset_pin>;
+ reset-gpios = < RK_PC1 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+ {
+ num-lanes = <1>;
+ reset-gpios = < RK_PA0 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <_pcie>;
+ status = "okay";
+};
+
+ {
+ num-lanes = <1>;
+ reset-gpios = < RK_PB6 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <_pcie>;
+ status = "okay";
+};
+
+ {
+ gpio-leds {
+ lan_led_pin: lan-led-pin {
+ rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO _pull_none>;
+ };
+
+ power_led_pin: power-led-pin {
+ rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO _pull_none>;
+ };
+
+ wan_led_pin: wan-led-pin {
+ rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO _pull_none>;
+ };
+
+ wlan_led_pin: wlan-led-pin {
+ rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO _pull_none>;
+ };
+ };
+
+ pcie {
+ pcie20_reset_pin:
[PATCH v3 1/2] rockchip: rk3568: Add support for FriendlyARM NanoPi R5S
FriendlyARM NanoPi R5S is an open-sourced mini IoT gateway device.
Board Specifications
- Rockchip RK3568
- 2 or 4GB LPDDR4X
- 8GB or 16GB eMMC, SD card slot
- GbE LAN (Native)
- 2x 2.5G LAN (PCIe)
- M.2 Connector
- HDMI 2.0, MIPI DSI/CSI
- 2xUSB 3.0 Host
- USB Type C PD, 5V/9V/12V
- GPIO: 12-pin 0.5mm FPC connector
The device tree is taken from kernel v6.4-rc1.
Reviewed-by: Kever Yang
Signed-off-by: Tianling Shen
---
Changes since v2:
* https://lore.kernel.org/u-boot/20230529045954.21689-1-cns...@gmail.com/
* Added more supported emmc modes and pinctrl to sdhci node
* Collected Reviewed-by tag
* Removed sdmmc node
* Removed unused configs, reordered
* Switched to use bootph-all for uart
* Huge thanks to Jonas for suggestions
Changes since v1:
* https://lore.kernel.org/u-boot/20230528094017.2949-1-cns...@gmail.com/
* No changes
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi | 31 ++
arch/arm/dts/rk3568-nanopi-r5s.dts | 136 +
arch/arm/dts/rk3568-nanopi-r5s.dtsi| 590 +
board/rockchip/evb_rk3568/MAINTAINERS | 8 +
configs/nanopi-r5s-rk3568_defconfig| 85 +++
6 files changed, 851 insertions(+)
create mode 100644 arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3568-nanopi-r5s.dts
create mode 100644 arch/arm/dts/rk3568-nanopi-r5s.dtsi
create mode 100644 configs/nanopi-r5s-rk3568_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 480269fa60..e2eda3ffcb 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -169,6 +169,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
rk3566-anbernic-rgxx3.dtb \
rk3566-radxa-cm3-io.dtb \
rk3568-evb.dtb \
+ rk3568-nanopi-r5s.dtb \
rk3568-rock-3a.dtb
dtb-$(CONFIG_ROCKCHIP_RK3588) += \
diff --git a/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
b/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
new file mode 100644
index 00..0ecca85b20
--- /dev/null
+++ b/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
+ * (http://www.friendlyelec.com)
+ *
+ * Copyright (c) 2023 Tianling Shen
+ */
+
+#include "rk356x-u-boot.dtsi"
+
+/ {
+ chosen {
+ stdout-path =
+ u-boot,spl-boot-order = "same-as-spl", ,
+ };
+};
+
+ {
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ pinctrl-0 = <_bus8 _clk _cmd _datastrobe>;
+};
+
+ {
+ clock-frequency = <2400>;
+ bootph-all;
+ status = "okay";
+};
diff --git a/arch/arm/dts/rk3568-nanopi-r5s.dts
b/arch/arm/dts/rk3568-nanopi-r5s.dts
new file mode 100644
index 00..b6ad8328c7
--- /dev/null
+++ b/arch/arm/dts/rk3568-nanopi-r5s.dts
@@ -0,0 +1,136 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
+ * (http://www.friendlyelec.com)
+ *
+ * Copyright (c) 2023 Tianling Shen
+ */
+
+/dts-v1/;
+#include "rk3568-nanopi-r5s.dtsi"
+
+/ {
+ model = "FriendlyElec NanoPi R5S";
+ compatible = "friendlyarm,nanopi-r5s", "rockchip,rk3568";
+
+ aliases {
+ ethernet0 =
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <_led_pin>, <_led_pin>, <_led_pin>,
<_led_pin>;
+
+ led-lan1 {
+ color = ;
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <1>;
+ gpios = < RK_PD6 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-lan2 {
+ color = ;
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <2>;
+ gpios = < RK_PD7 GPIO_ACTIVE_HIGH>;
+ };
+
+ power_led: led-power {
+ color = ;
+ function = LED_FUNCTION_POWER;
+ linux,default-trigger = "heartbeat";
+ gpios = < RK_PD2 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-wan {
+ color = ;
+ function = LED_FUNCTION_WAN;
+ gpios = < RK_PC1 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+ {
+ assigned-clocks = < SCLK_GMAC0_RX_TX>, < SCLK_GMAC0>;
+ assigned-clock-parents = < SCLK_GMAC0_RGMII_SPEED>, <
CLK_MAC0_2TOP>;
+ assigned-clock-rates = <0>, <12500>;
+ clock_in_out = "output";
+ phy-handle = <_phy0>;
+ phy-mode = "rgmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <_miim
+_tx_bus2
+_rx_bus2
+_rgmii_clk
+_rgmii_bus>;
+
[PATCH] efi_loader: explicitly return EFI_UNSUPPORTED for TCG 1.0 compatibility
In the EFI TCG spec EFI_TCG2_BOOT_SERVICE_CAPABILITY struct is
versioned -- there are 1.0 and 1.1 versions of that struct.
The spec [0] describes:
"Version of the EFI_TCG2_BOOT_SERVICE_CAPABILITY
structure itself. For this version of the protocol, the Major version
SHALL be set to 1 and the Minor version SHALL be set to 1."
which is what we currently support.
The SCT tests perfromed By Arms SIE(Security interface extensions) [1]
perform a check for clients supporting the older 1.0 version of the
spec (Test 30.1.1.4). Given than this spec is 7 years old, there should
be no need for the older 1.0 version support. Instead of returning
EFI_BUFFER_TOO_SMALLL switch to EFI_UNSUPPORTED which is more
appropriate. It's worth noting that the spec doesn't explicitly
describe the return value at the moment.
[0]
https://trustedcomputinggroup.org/wp-content/uploads/EFI-Protocol-Specification-rev13-160330final.pdf
[1]
https://github.com/stuyod01/edk2-test/blob/master/uefi-sct/Doc/UEFI-SCT-Case-Spec/30_Protocols_TCG2_Test.md
Signed-off-by: Ilias Apalodimas
---
Heinrich, Stuart is investigating the chance of the spec getting updated
adding EFI_UNSUPPORTED. In any case I think the patch should be aplied since
the new return code makes more sense. If for some reason the spec change is
rejected, I can go back and add support for 1.0 structure versions.
lib/efi_loader/efi_tcg2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c
index a83ae7a46cf3..220c442bdf93 100644
--- a/lib/efi_loader/efi_tcg2.c
+++ b/lib/efi_loader/efi_tcg2.c
@@ -750,7 +750,7 @@ efi_tcg2_get_capability(struct efi_tcg2_protocol *this,
if (capability->size < sizeof(*capability)) {
capability->size = sizeof(*capability);
- efi_ret = EFI_BUFFER_TOO_SMALL;
+ efi_ret = EFI_UNSUPPORTED;
goto out;
}
--
2.39.2
[PATCH] tpm: Make 'tpm init' to call tpm_auto_start()
For a TPM device to be operational we need to initialize it and
perform its startup sequence. The 'tpm init' command currently calls
tpm_init() which ends up calling the ->open() per-device callback and
performs the initial hardware configuration as well as requesting
locality 0 for the caller. There no code that currently calls
tpm_init() without following up with a tpm_startup() and tpm_self_test_full()
or tpm_continue_self_test().
So let's wire up the 'tpm init' command and call tpm_auto_start() which
leaves the device in an operational state and adjust any defconfigs
using 'tpm init'.
It's worth noting that calling tpm_init() only, doesn't allow a someone
to use the TPM since the startup sequence is mandatory. We always
repeat the pattern of calling
- tpm_init()
- tpm_startup()
- tpm_self_test_full() or tpm_continue_self_test()
as a result we don't expect any regression or boot delays with the current
change.
While at it fix the identation of test_tpm_autostart() comments as well.
Signed-off-by: Ilias Apalodimas
---
This is a split and resend of
https://lore.kernel.org/u-boot/20230510074359.2837818-9-ilias.apalodi...@linaro.org/
Since Simon some had concerns I decided to split this off the series and send it
as a single patch for further discussion.
cmd/tpm-common.c | 3 ++-
configs/chromebook_coral_defconfig | 2 +-
test/dm/tpm.c | 9 +
test/py/tests/test_tpm2.py | 9 -
4 files changed, 8 insertions(+), 15 deletions(-)
diff --git a/cmd/tpm-common.c b/cmd/tpm-common.c
index d0c63cadf413..9b1ad0b371df 100644
--- a/cmd/tpm-common.c
+++ b/cmd/tpm-common.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
#include "tpm-user-utils.h"
static struct udevice *tpm_dev;
@@ -364,7 +365,7 @@ int do_tpm_init(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
if (rc)
return rc;
- return report_return_code(tpm_init(dev));
+ return report_return_code(tpm_auto_start(dev));
}
int do_tpm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
diff --git a/configs/chromebook_coral_defconfig
b/configs/chromebook_coral_defconfig
index f5995f22004e..8b4c1228a1fc 100644
--- a/configs/chromebook_coral_defconfig
+++ b/configs/chromebook_coral_defconfig
@@ -33,7 +33,7 @@ CONFIG_BOOTSTAGE_STASH=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS_SUBST=y
CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="tpm init; tpm startup TPM2_SU_CLEAR; read mmc 0:2 10 0
80; setexpr loader *001004f0; setexpr size *00100518; setexpr blocks $size /
200; read mmc 0:2 10 80 $blocks; setexpr setup $loader - 1000; setexpr
cmdline_ptr $loader - 2000; setexpr.s cmdline *$cmdline_ptr; setexpr cmdline
gsub %U ${uuid}; if part uuid mmc 0:2 uuid; then zboot start 10 0 0 0
$setup cmdline; zboot load; zboot setup; zboot dump; zboot go;fi"
+CONFIG_BOOTCOMMAND="tpm init; read mmc 0:2 10 0 80; setexpr loader
*001004f0; setexpr size *00100518; setexpr blocks $size / 200; read mmc 0:2
10 80 $blocks; setexpr setup $loader - 1000; setexpr cmdline_ptr $loader -
2000; setexpr.s cmdline *$cmdline_ptr; setexpr cmdline gsub %U ${uuid}; if
part uuid mmc 0:2 uuid; then zboot start 10 0 0 0 $setup cmdline; zboot
load; zboot setup; zboot dump; zboot go;fi"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_LAST_STAGE_INIT=y
diff --git a/test/dm/tpm.c b/test/dm/tpm.c
index 3defb3c3da1f..cde933ab2848 100644
--- a/test/dm/tpm.c
+++ b/test/dm/tpm.c
@@ -98,10 +98,11 @@ static int test_tpm_autostart(struct unit_test_state *uts,
if (reinit)
ut_assertok(tpm_init(dev));
-/*
- * tpm_auto_start will rerun tpm_init() if reinit, but handles the
- * -EBUSY return code internally.
- */
+
+ /*
+* tpm_auto_start will rerun tpm_init() if reinit, but handles the
+* -EBUSY return code internally.
+*/
ut_assertok(tpm_auto_start(dev));
return 0;
diff --git a/test/py/tests/test_tpm2.py b/test/py/tests/test_tpm2.py
index d2ad6f9e73c0..6f9b1dd89258 100644
--- a/test/py/tests/test_tpm2.py
+++ b/test/py/tests/test_tpm2.py
@@ -44,8 +44,6 @@ def force_init(u_boot_console, force=False):
output = u_boot_console.run_command('tpm2 init')
if force or not 'Error' in output:
u_boot_console.run_command('echo --- start of init ---')
-u_boot_console.run_command('tpm2 startup TPM2_SU_CLEAR')
-u_boot_console.run_command('tpm2 self_test full')
u_boot_console.run_command('tpm2 clear TPM2_RH_LOCKOUT')
output = u_boot_console.run_command('echo $?')
if not output.endswith('0'):
@@ -90,13 +88,6 @@ def tpm2_sandbox_init(u_boot_console):
skip_test = u_boot_console.config.env.get('env__tpm_device_test_skip',
False)
if skip_test:
pytest.skip('skip TPM device test')
-u_boot_console.run_command('tpm2 startup TPM2_SU_CLEAR')
-output =
