Re: [PATCH v4 0/6] rpi5: initial support
Hi, > Am 19.01.2024 um 06:29 schrieb Ivan T. Ivanov : > > On 01-18 18:18, Jens Maus wrote: >> >>> I am afraid you will have to connect that UART debug cable and share >>> what is the memory map on your device :-) >> >> No problem. > > Thanks, but could you apply attached patch and send me > the logs when there is HDMI monitor connected to the board > and one when cable is unplugged. I applied that patch, but unfortunately no U-Boot specific output on the special debug UART of the rpi5 at all. As I have shown in my earlier email, the output ends with the „NOTICE: BL31…“ messages and there is no single line coming from U-boot at all. Also tried to add „#define DEBUG“ to the fdtdec.c file and added CONFIG_LOG=y as well as raising the maximum debug level to 9 to the U-boot build. This for some reason this does not end up in any additional U-boot debug line output on the RPi debug probe connected to the special UART of the rpi5. I even tried to connect the debug probe to the UART pins of the GPIO but also there no U-Boot debug output at all, I am afraid. So where should that U-Boot debug output actually appear with your u-boot.bin patched version? Best Regards, jens -- Jens Maus, Dresden/Germany http://jens-maus.de/
Re: [PATCH] Add Phytec i.MX93 support
Hello Mathieu As a heads-up: you need to rebase as am62 (doc) got applied by Tom. On Wed, 2024-01-17 at 08:52 +0100, Mathieu Othacehe wrote: > Add support for the Phytec i.MX93 Segin evaluation kit. The SoM consists > of an NXP i.MX93 dual A55 CPU. The SoM is mounted on a Phytec Segin SBC. > > Signed-off-by: Mathieu Othacehe > --- > arch/arm/dts/Makefile | 3 +- > arch/arm/dts/imx93-phycore-segin-u-boot.dtsi | 274 +++ > arch/arm/dts/imx93-phycore-segin.dts | 95 + > arch/arm/dts/imx93-phycore-som.dtsi | 64 + > arch/arm/mach-imx/imx9/Kconfig | 6 + > board/phytec/common/mmc.c | 49 + > board/phytec/imx93_phycore/Kconfig | 21 + > board/phytec/imx93_phycore/MAINTAINERS | 10 + > board/phytec/imx93_phycore/Makefile | 16 + > board/phytec/imx93_phycore/imx93_phycore.c | 89 + > board/phytec/imx93_phycore/imx93_phycore.env | 96 + > .../phytec/imx93_phycore/lpddr4_timing_1GB.c | 1546 + > board/phytec/imx93_phycore/spl.c | 181 ++ > configs/imx93_phycore_defconfig | 147 ++ > doc/board/phytec/imx93_phycore.rst | 68 + > doc/board/phytec/index.rst | 1 + > include/configs/imx93_phycore.h | 47 + > 17 files changed, 2712 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/dts/imx93-phycore-segin-u-boot.dtsi > create mode 100644 arch/arm/dts/imx93-phycore-segin.dts > create mode 100644 arch/arm/dts/imx93-phycore-som.dtsi > create mode 100644 board/phytec/common/mmc.c > create mode 100644 board/phytec/imx93_phycore/Kconfig > create mode 100644 board/phytec/imx93_phycore/MAINTAINERS > create mode 100644 board/phytec/imx93_phycore/Makefile > create mode 100644 board/phytec/imx93_phycore/imx93_phycore.c > create mode 100644 board/phytec/imx93_phycore/imx93_phycore.env > create mode 100644 board/phytec/imx93_phycore/lpddr4_timing_1GB.c > create mode 100644 board/phytec/imx93_phycore/spl.c > create mode 100644 configs/imx93_phycore_defconfig > create mode 100644 doc/board/phytec/imx93_phycore.rst > create mode 100644 include/configs/imx93_phycore.h > > > > diff --git a/doc/board/phytec/imx93_phycore.rst > b/doc/board/phytec/imx93_phycore.rst > new file mode 100644 > index 000..f9b87691cdc > --- /dev/null > +++ b/doc/board/phytec/imx93_phycore.rst > @@ -0,0 +1,68 @@ > +.. SPDX-License-Identifier: GPL-2.0+ > + > +imx93_phytec > + rename it to phyCORE-i.MX 93 please, as this is the official name. See https://www.phytec.eu/en/produkte/system-on-modules/phycore-imx-91-93/ > + > +U-Boot for the NXP i.MX93 Phytec SoM of a Segin board Same here; Use official naming, please. > + > +Quick Start > +--- > + > +- Get and Build the ARM Trusted firmware > +- Get the DDR firmware > +- Get ahab-container.img > +- Build U-Boot > +- Boot > + > +Get and Build the ARM Trusted firmware > +-- > + > +Note: srctree is U-Boot source directory > +Get ATF from: https://github.com/nxp-imx/imx-atf/ Is the trusted-firmware-a upstream version working? If so, please use that instead. > +branch: lf_v2.8 > + > +.. code-block:: bash > + > + $ unset LDFLAGS > + $ make PLAT=imx93 bl31 > + $ cp build/imx93/release/bl31.bin $(srctree) > + > +Get the DDR firmware > + > + > +.. code-block:: bash > + > + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.21.bin > + $ chmod +x firmware-imx-8.21.bin > + $ ./firmware-imx-8.21.bin > + $ cp firmware-imx-8.21/firmware/ddr/synopsys/lpddr4*.bin $(srctree) > + > +Get ahab-container.img > +--- > + > +.. code-block:: bash > + > + $ wget > https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-sentinel-0.10.bin > + $ chmod +x firmware-sentinel-0.10.bin > + $ ./firmware-sentinel-0.10.bin > + $ cp firmware-sentinel-0.10/mx93a0-ahab-container.img $(srctree) > + > +Build U-Boot > + > + > +.. code-block:: bash > + > + $ export CROSS_COMPILE=aarch64-poky-linux- Leave this as generic as possible please. ARM toolchain should be sufficient. > + $ make imx93_phytec_defconfig > + $ make > + > +Burn the flash.bin to MicroSD card offset 32KB: > + > +.. code-block:: bash > + > + $ dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc > + > +Boot > + > + > +Set Boot switch to SD boot Add info to what position(s) the boot switches must be set. > diff --git a/doc/board/phytec/index.rst b/doc/board/phytec/index.rst > index 9996bce9741..a740f0cbae4 100644 > --- a/doc/board/phytec/index.rst > +++ b/doc/board/phytec/index.rst > @@ -7,5 +7,6 @@ PHYTEC > :maxdepth: 2 > > imx8mm-phygate-tauri-l > + imx93_phycore > phycore-imx8mm > phycore-imx8mp > diff --git a/include/configs/imx93_phycore.h b/include/configs/imx93_phycore.h > new file mode 100644 > index 000..ee1322c9b
Re: [Upstream] [PATCH] Add Phytec i.MX93 support
Hi Mathieu On Thu, 2024-01-18 at 12:04 +0100, Mathieu Othacehe wrote: > > Hi, > > Thanks for the review! > > > s/imx93_phycore/phycore_imx93 > > > > To fit into existing PHYTEC boards already in tree. > > I deliberately picked that order so that it is aligned with most imx > boards already supported by u-boot. > > The supported imx93 boards follow that pattern: > > - imx93_var_som > - imx93_evk > > So it felt natural to have: > > - imx93_phycore > > Plus the kernel device-trees are also following that order: > > - imx93-phycore-xxx > > On the other hand, it is true that the existing phycore boards use the > phytec_* pattern: > > - phycore_am335x_r2 > - phycore_imx8mm > - phycore_imx8mp > - phycore_rk3288/ > > So that will be confusing no matter the option that we choose. > > I will come up with a v2 fixing your other remarks, but I think that > this should be addressed beforehand. We decided not to alter the names after the fact, but for imx8 product family we noticed the same problem. Anyway, to avoid this whole issue, please name the defconfig and the device tree to imx93-phyboard- segin. This avoids the challenge of naming configs when you have multiple carrier boards supported for the same SoM. Further, for the board/phytec/ dir, only phytec board code is in there, so you may stick to the phytec naming convention (i.e. phycore_imx93 as Primoz suggested). This also allows to reuse the phycore code (see imx8mm-phygate-tauri-l for reference). Yannic > > Thanks, > > Mathieu > ___ > upstream mailing list > upstr...@lists.phytec.de > http://lists.phytec.de/cgi-bin/mailman/listinfo/upstream
[PATCH] test/py: gpio: Add gpio pins generic test
Add gpio pins generic test for the set of gpio pin list to test various
gpio related functionality, such as the input, set, clear, and toggle,
it also tests the input and output functionality for shorted gpio pins.
This test depends on boardenv* configuration to define gpio pins names.
Signed-off-by: Love Kumar
---
test/py/tests/test_gpio.py | 90 ++
1 file changed, 90 insertions(+)
diff --git a/test/py/tests/test_gpio.py b/test/py/tests/test_gpio.py
index 0af186f23602..3e16e6365743 100644
--- a/test/py/tests/test_gpio.py
+++ b/test/py/tests/test_gpio.py
@@ -85,6 +85,13 @@ env__gpio_dev_config = {
'gpio_ip_pin_clear':'66',
'gpio_clear_value': 'value is 0',
'gpio_set_value': 'value is 1',
+# GPIO pin list to test gpio functionality for each pins, pin should be
+# pin names (str)
+'gpio_pin_list': ['gpio@131', 'gpio@132', 'gpio@2033'],
+# GPIO input output list for shorted gpio pins to test gpio
+# functionality for each of pairs, where the first element is
+# configured as input and second as output
+'gpio_ip_op_list': [['gpio0', 'gpio1'], ['gpio2', 'gpio3']],
}
"""
@@ -223,3 +230,86 @@ def test_gpio_input_generic(u_boot_console):
response = u_boot_console.run_command(cmd)
good_response = gpio_set_value
assert good_response in response
+
+@pytest.mark.buildconfigspec('cmd_gpio')
+def test_gpio_pins_generic(u_boot_console):
+"""Test various gpio related functionality, such as the input, set, clear,
+ and toggle for the set of gpio pin list.
+
+ Specific set of gpio pins (by mentioning gpio pin name) configured as
+ input (mentioned as 'gpio_pin_list') to be tested for multiple gpio
+ commands.
+"""
+
+f = u_boot_console.config.env.get('env__gpio_dev_config', False)
+if not f:
+pytest.skip('gpio not configured')
+
+gpio_pins = f.get('gpio_pin_list', None)
+if not gpio_pins:
+pytest.skip('gpio pin list are not configured')
+
+for gpin in gpio_pins:
+# gpio input
+u_boot_console.run_command(f'gpio input {gpin}')
+expected_response = f'{gpin}: input:'
+response = u_boot_console.run_command(f'gpio status -a {gpin}')
+assert expected_response in response
+
+# gpio set
+u_boot_console.run_command(f'gpio set {gpin}')
+expected_response = f'{gpin}: output: 1'
+response = u_boot_console.run_command(f'gpio status -a {gpin}')
+assert expected_response in response
+
+# gpio clear
+u_boot_console.run_command(f'gpio clear {gpin}')
+expected_response = f'{gpin}: output: 0'
+response = u_boot_console.run_command(f'gpio status -a {gpin}')
+assert expected_response in response
+
+# gpio toggle
+u_boot_console.run_command(f'gpio toggle {gpin}')
+expected_response = f'{gpin}: output: 1'
+response = u_boot_console.run_command(f'gpio status -a {gpin}')
+assert expected_response in response
+
+@pytest.mark.buildconfigspec('cmd_gpio')
+def test_gpio_pins_input_output_generic(u_boot_console):
+"""Test gpio related functionality such as input and output for the list of
+ shorted gpio pins provided as a pair of input and output pins. This test
+ will fail, if the gpio pins are not shorted properly.
+
+ Specific set of shorted gpio pins (by mentioning gpio pin name)
+ configured as input and output (mentioned as 'gpio_ip_op_list') as a
+ pair to be tested for gpio input output case.
+"""
+
+f = u_boot_console.config.env.get('env__gpio_dev_config', False)
+if not f:
+pytest.skip('gpio not configured')
+
+gpio_pins = f.get('gpio_ip_op_list', None)
+if not gpio_pins:
+pytest.skip('gpio pin list for input and output are not configured')
+
+for gpins in gpio_pins:
+u_boot_console.run_command(f'gpio input {gpins[0]}')
+expected_response = f'{gpins[0]}: input:'
+response = u_boot_console.run_command(f'gpio status -a {gpins[0]}')
+assert expected_response in response
+
+u_boot_console.run_command(f'gpio set {gpins[1]}')
+expected_response = f'{gpins[1]}: output:'
+response = u_boot_console.run_command(f'gpio status -a {gpins[1]}')
+assert expected_response in response
+
+u_boot_console.run_command(f'gpio clear {gpins[1]}')
+expected_response = f'{gpins[0]}: input: 0'
+response = u_boot_console.run_command(f'gpio status -a {gpins[0]}')
+assert expected_response in response
+
+u_boot_console.run_command(f'gpio set {gpins[1]}')
+expected_response = f'{gpins[0]}: input: 1'
+response = u_boot_console.run_command(f'gpio status -a {gpins[0]}')
+assert expected_response in response
--
2.25.1
[PATCH] test/py: zynqmp_rpu: Add test for loading RPU apps
Add testcases for loading RPU applications in split and lockstep mode
including the negative one for AMD's ZynqMP SoC.
Signed-off-by: Love Kumar
---
test/py/tests/test_zynqmp_rpu.py | 208 +++
1 file changed, 208 insertions(+)
create mode 100644 test/py/tests/test_zynqmp_rpu.py
diff --git a/test/py/tests/test_zynqmp_rpu.py b/test/py/tests/test_zynqmp_rpu.py
new file mode 100644
index ..479a612b4ec2
--- /dev/null
+++ b/test/py/tests/test_zynqmp_rpu.py
@@ -0,0 +1,208 @@
+# SPDX-License-Identifier: GPL-2.0
+# (C) Copyright 2023, Advanced Micro Devices, Inc.
+
+import pytest
+import random
+import string
+import test_net
+
+"""
+Note: This test relies on boardenv_* containing configuration values to define
+RPU applications information for AMD's ZynqMP SoC which contains, application
+names, processors, address where it is built, expected output and the tftp load
+addresses. This test will be automatically skipped without this.
+
+It also relies on dhcp or setup_static net test to support tftp to load
+application on DDR. All the environment parameters are stored sequentially.
+The length of all parameters values should be same. For example, if 2 app_names
+are defined in a list as a value of parameter 'app_name' then the other
+parameters value also should have a list with 2 items.
+It will run RPU cases for all the applications defined in boardenv_*
+configuration file.
+
+Example:
+env__zynqmp_rpu_apps = {
+'app_name': ['hello_world_r5_0_ddr.elf', 'hello_world_r5_1_ddr.elf'],
+'proc': ['rpu0', 'rpu1'],
+'cpu_num': [4, 5],
+'addr': [0xA0, 0xB0],
+'output': ['Successfully ran Hello World application on DDR from RPU0',
+ 'Successfully ran Hello World application on DDR from RPU1'],
+'tftp_addr': [0x10, 0x20],
+}
+"""
+
+# Get rpu apps params from env
+def get_rpu_apps_env(u_boot_console):
+rpu_apps = u_boot_console.config.env.get('env__zynqmp_rpu_apps', False)
+if not rpu_apps:
+pytest.skip('ZynqMP RPU application info not defined!')
+
+apps = rpu_apps.get('app_name', None)
+if not apps:
+pytest.skip('No RPU application found!')
+
+procs = rpu_apps.get('proc', None)
+if not procs:
+pytest.skip('No RPU application processor provided!')
+
+cpu_nums = rpu_apps.get('cpu_num', None)
+if not cpu_nums:
+pytest.skip('No CPU number for respective processor provided!')
+
+addrs = rpu_apps.get('addr', None)
+if not addrs:
+pytest.skip('No RPU application build address found!')
+
+outputs = rpu_apps.get('output', None)
+if not outputs:
+pytest.skip('Expected output not found!')
+
+tftp_addrs = rpu_apps.get('tftp_addr', None)
+if not tftp_addrs:
+pytest.skip('TFTP address to load application not found!')
+
+return apps, procs, cpu_nums, addrs, outputs, tftp_addrs
+
+# Check return code
+def ret_code(u_boot_console):
+return u_boot_console.run_command('echo $?')
+
+# Initialize tcm
+def tcminit(u_boot_console, rpu_mode):
+output = u_boot_console.run_command('zynqmp tcminit %s' % rpu_mode)
+assert 'Initializing TCM overwrites TCM content' in output
+return ret_code(u_boot_console)
+
+# Load application in DDR
+def load_app_ddr(u_boot_console, tftp_addr, app):
+output = u_boot_console.run_command('tftpboot %x %s' % (tftp_addr, app))
+assert 'TIMEOUT' not in output
+assert 'Bytes transferred = ' in output
+
+# Load elf
+u_boot_console.run_command('bootelf -p %x' % tftp_addr)
+assert ret_code(u_boot_console).endswith('0')
+
+# Disable cpus
+def disable_cpus(u_boot_console, cpu_nums):
+for num in cpu_nums:
+u_boot_console.run_command(f'cpu {num} disable')
+
+# Load apps on RPU cores
+def rpu_apps_load(u_boot_console, rpu_mode):
+apps, procs, cpu_nums, addrs, outputs, tftp_addrs = get_rpu_apps_env(
+u_boot_console)
+test_net.test_net_dhcp(u_boot_console)
+if not test_net.net_set_up:
+test_net.test_net_setup_static(u_boot_console)
+
+try:
+assert tcminit(u_boot_console, rpu_mode).endswith('0')
+
+for i in range(len(apps)):
+if rpu_mode == 'lockstep' and procs[i] != 'rpu0':
+continue
+
+load_app_ddr(u_boot_console, tftp_addrs[i], apps[i])
+rel_addr = int(addrs[i] + 0x3C)
+
+# Release cpu at app load address
+cpu_num = cpu_nums[i]
+cmd = 'cpu %d release %x %s' % (cpu_num, rel_addr, rpu_mode)
+output = u_boot_console.run_command(cmd)
+exp_op = f'Using TCM jump trampoline for address {hex(rel_addr)}'
+assert exp_op in output
+assert f'R5 {rpu_mode} mode' in output
+u_boot_console.wait_for(outputs[i])
+assert ret_code(u_boot_console).endswith('0')
+finally:
+disable_cpus(u_boot_console, cpu_nums)
+
+@pytest.mark.buildconfigspec('cmd_zynqmp')
+def test_zynqmp
[PATCH v2] mtd: nand: arasan: Print warning for unsupported ecc modes
Currently only hw ecc is supported in U-Boot. If any other ecc mode is
given in DT, it simply ignores and switches to hw ecc. So better print
what is being done.
Revert this patch once soft ecc support is fixed in future.
Signed-off-by: Ashok Reddy Soma
Signed-off-by: Venkatesh Yadav Abbarapu
---
Changes in v2:
- Added the ecc mode check in the arasan driver itself.
---
drivers/mtd/nand/raw/arasan_nfc.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/mtd/nand/raw/arasan_nfc.c
b/drivers/mtd/nand/raw/arasan_nfc.c
index 14766401bf..8e5eef0881 100644
--- a/drivers/mtd/nand/raw/arasan_nfc.c
+++ b/drivers/mtd/nand/raw/arasan_nfc.c
@@ -1233,6 +1233,7 @@ static int arasan_probe(struct udevice *dev)
struct mtd_info *mtd;
ofnode child;
int err = -1;
+ const char *str;
info->reg = dev_read_addr_ptr(dev);
mtd = nand_to_mtd(nand_chip);
@@ -1263,6 +1264,10 @@ static int arasan_probe(struct udevice *dev)
goto fail;
}
+ str = ofnode_read_string(nand_chip->flash_node, "nand-ecc-mode");
+ if (strcmp(str, "hw"))
+ printf("%s ecc is not supported, switch to hw ecc\n", str);
+
nand_chip->ecc.mode = NAND_ECC_HW;
nand_chip->ecc.hwctl = NULL;
nand_chip->ecc.read_page = arasan_nand_read_page_hwecc;
--
2.25.1
Re: Re: [PATCH v4 0/6] rpi5: initial support
On 01-18 18:18, Jens Maus wrote:
>
> > I am afraid you will have to connect that UART debug cable and share
> > what is the memory map on your device :-)
>
> No problem.
Thanks, but could you apply attached patch and send me
the logs when there is HDMI monitor connected to the board
and one when cable is unplugged.
Regards,
Ivan
>From f9e039d3febbb046fe06f72731e7ba558927aa55 Mon Sep 17 00:00:00 2001
From: "Ivan T. Ivanov"
Date: Fri, 19 Jan 2024 07:22:39 +0200
Subject: [PATCH] fdtdec: hack: Show DRAM size parameters
---
lib/fdtdec.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index b2c59ab381..84cbd82cdb 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1107,7 +1107,7 @@ int fdtdec_setup_memory_banksize(void)
gd->bd->bi_dram[bank].size =
(phys_size_t)(res.end - res.start + 1);
- debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
+ printf("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
__func__, bank,
(unsigned long long)gd->bd->bi_dram[bank].start,
(unsigned long long)gd->bd->bi_dram[bank].size);
--
2.35.3
[PATCH] wdt: add HiSilicon watchdog driver support
From: Yang Xiwen
This watchdog core is found on many HiSilicon SoCs. Add support for it.
Signed-off-by: Yang Xiwen
---
drivers/watchdog/Kconfig| 10 +++
drivers/watchdog/Makefile | 1 +
drivers/watchdog/hisi_wdt.c | 196
3 files changed, 207 insertions(+)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 569726119c..ddf44f63d2 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -32,6 +32,7 @@ config WATCHDOG_TIMEOUT_MSECS
default 16000 if ARCH_SUNXI
default 5376 if ULP_WATCHDOG
default 15000 if ARCH_BCM283X
+ range 500 18 if ARCH_HISI
default 6
help
Watchdog timeout in msec
@@ -171,6 +172,15 @@ config WDT_GPIO
doc/device-tree-bindings/watchdog/gpio-wdt.txt for
information on how to describe the watchdog in device tree.
+config WDT_HISI
+ bool "HiSilicon watchdog timer support"
+ depends on WDT
+ depends on CLK && DM_RESET
+ imply WATCHDOG
+ help
+ Select this to enable HiSilicon watchdog timer.
+ Currently supports Hi3798MV200 only.
+
config WDT_MAX6370
bool "MAX6370 watchdog timer support"
depends on WDT
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 5520d3d9ae..3436aa6389 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -30,6 +30,7 @@ obj-$(CONFIG_WDT_ORION) += orion_wdt.o
obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
obj-$(CONFIG_WDT_FTWDT010) += ftwdt010_wdt.o
obj-$(CONFIG_WDT_GPIO) += gpio_wdt.o
+obj-$(CONFIG_WDT_HISI) += hisi_wdt.o
obj-$(CONFIG_WDT_MAX6370) += max6370_wdt.o
obj-$(CONFIG_WDT_MCF) += mcf_wdt.o
obj-$(CONFIG_WDT_MESON_GXBB) += meson_gxbb_wdt.o
diff --git a/drivers/watchdog/hisi_wdt.c b/drivers/watchdog/hisi_wdt.c
new file mode 100644
index 00..5be9e90865
--- /dev/null
+++ b/drivers/watchdog/hisi_wdt.c
@@ -0,0 +1,196 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Watchdog driver for HiSilicon SoCs
+ *
+ * Copyright 2024 (r) Yang Xiwen
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* CONTROL register definitions */
+#define HISI_WDG_RES_ENBIT(1)
+#define HISI_WDG_INT_ENBIT(0)
+
+/* RIS(Raw Interrupt Status) register definitions */
+#define HISI_WDG_RIS BIT(0)
+
+/* MIS(Masked Interrupt Status) register definitions*/
+#define HISI_WDG_MIS BIT(0)
+
+/* LOCK register magic */
+// Write this value to unlock watchdog
+#define HISI_WDG_LOCK_MAGIC0x1ACCE551
+// Read values
+#define HISI_WDG_LOCK_WA 0x0
+#define HISI_WDG_LOCK_RO 0x1
+
+struct hisi_wdg_reg {
+ u32 load; // 0x
+ u32 value; // 0x0004
+ u32 control; // 0x0008
+ u32 intclr; // 0x000c
+ u32 ris; // 0x0010
+ u32 mis; // 0x0014
+ u32 reserved[762]; // 0x0018
+ u32 lock; // 0x0c00
+};
+
+struct hisi_wdt_priv {
+ struct hisi_wdg_reg __iomem *reg;
+ struct clk *clk;
+ struct reset_ctl *rst;
+};
+
+static inline void hisi_wdt_unlock(struct hisi_wdg_reg __iomem *reg)
+{
+ reg->lock = HISI_WDG_LOCK_MAGIC;
+}
+
+static inline void hisi_wdt_lock(struct hisi_wdg_reg __iomem *reg)
+{
+ // Any value other than HISI_WDG_LOCK_MAGIC would lock the registers
+ reg->lock = 0;
+}
+
+static int hisi_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags)
+{
+ struct hisi_wdt_priv *priv = dev_get_priv(dev);
+ u64 rate;
+ u64 val;
+
+ rate = clk_get_rate(priv->clk);
+
+ /* This may overflow */
+ val = mul_u64_u32_div(timeout_ms, rate, 1000);
+ if (val > UINT32_MAX) {
+ dev_warn(dev, "timeout_ms too large, using maximum.\n");
+ val = UINT32_MAX;
+ }
+
+ hisi_wdt_unlock(priv->reg);
+
+ priv->reg->load = (u32) val;
+ priv->reg->control |= (HISI_WDG_RES_EN | HISI_WDG_INT_EN);
+
+ hisi_wdt_lock(priv->reg);
+
+ return 0;
+}
+
+static int hisi_wdt_stop(struct udevice *dev)
+{
+ struct hisi_wdt_priv *priv = dev_get_priv(dev);
+
+ hisi_wdt_unlock(priv->reg);
+ // disabling interrupt also disables counting
+ priv->reg->control &= ~HISI_WDG_INT_EN;
+
+ hisi_wdt_lock(priv->reg);
+
+ return 0;
+}
+
+static int hisi_wdt_reset(struct udevice *dev)
+{
+ struct hisi_wdt_priv *priv = dev_get_priv(dev);
+
+ hisi_wdt_unlock(priv->reg);
+
+ // any value written to INTCLR would result a counter reload
+ priv->reg->intclr = 0;
+
+ hisi_wdt_lock(priv->reg);
+
+ return 0;
+}
+
+static int hisi_wdt_expire_now(struct udevice *dev, ulong flags)
+{
+ return hisi_wdt_start(dev, 1, flags);
+}
+
+static const struct wdt_ops hisi_wdt_ops = {
+ .start = hisi_wdt_start,
+ .stop = hisi_wdt_stop,
+ .reset = hisi_wdt_reset,
+ .expire
[PATCH v3 3/3] efi_loader: return immediately in UCLASS_EFI_LOADER removal
In case of UCLASS_EFI_LOADER, EFI handles are managed by
EFI application/driver, we must not delete EFI handles.
Signed-off-by: Masahisa Kojima
---
lib/efi_loader/efi_disk.c | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index e2edc69fcf..b1739d9920 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -731,8 +731,14 @@ int efi_disk_remove(void *ctx, struct event *event)
switch (id) {
case UCLASS_BLK:
desc = dev_get_uclass_plat(dev);
- if (desc && desc->uclass_id != UCLASS_EFI_LOADER)
- diskobj = (struct efi_disk_obj *)handle;
+ if (desc && desc->uclass_id == UCLASS_EFI_LOADER)
+ /*
+* EFI application/driver manages the EFI handle,
+* no need to delete EFI handle.
+*/
+ return 0;
+
+ diskobj = (struct efi_disk_obj *)handle;
break;
case UCLASS_PARTITION:
diskobj = (struct efi_disk_obj *)handle;
@@ -744,10 +750,8 @@ int efi_disk_remove(void *ctx, struct event *event)
return 0;
}
- if (diskobj) {
- dp = diskobj->dp;
- volume = diskobj->volume;
- }
+ dp = diskobj->dp;
+ volume = diskobj->volume;
ret = efi_delete_handle(handle);
/* Do not delete DM device if there are still EFI drivers attached. */
--
2.34.1
[PATCH v3 2/3] efi_loader: create common function to free struct efi_disk_obj
Current error handling of creating raw disk/partition has
following issues.
- duplicate free for EFI handle, EFI handle is already freed
in efi_delete_handle()
- missing free for struct efi_device_path and
struct efi_simple_file_system_protocol in some error paths
To address those issues, this commit creates the common function
to free the struct efi_disk_obj resources and calls it in case
of error.
Signed-off-by: Masahisa Kojima
Reviewed-by: Ilias Apalodimas
---
lib/efi_loader/efi_disk.c | 26 +++---
1 file changed, 19 insertions(+), 7 deletions(-)
diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index 105f080125..e2edc69fcf 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -371,6 +371,20 @@ static int efi_fs_exists(struct blk_desc *desc, int part)
return 1;
}
+static void efi_disk_free_diskobj(struct efi_disk_obj *diskobj)
+{
+ struct efi_device_path *dp = diskobj->dp;
+ struct efi_simple_file_system_protocol *volume = diskobj->volume;
+
+ /*
+* ignore error of efi_delete_handle() since this function
+* is expected to be called in error path.
+*/
+ efi_delete_handle(&diskobj->header);
+ efi_free_pool(dp);
+ free(volume);
+}
+
/**
* efi_disk_add_dev() - create a handle for a partition or disk
*
@@ -528,9 +542,7 @@ static efi_status_t efi_disk_add_dev(
}
return EFI_SUCCESS;
error:
- efi_delete_handle(&diskobj->header);
- free(diskobj->volume);
- free(diskobj);
+ efi_disk_free_diskobj(diskobj);
return ret;
}
@@ -569,8 +581,7 @@ static int efi_disk_create_raw(struct udevice *dev,
efi_handle_t agent_handle)
return ret;
}
if (efi_link_dev(&disk->header, dev)) {
- efi_free_pool(disk->dp);
- efi_delete_handle(&disk->header);
+ efi_disk_free_diskobj(disk);
return -EINVAL;
}
@@ -624,8 +635,9 @@ static int efi_disk_create_part(struct udevice *dev,
efi_handle_t agent_handle)
return -1;
}
if (efi_link_dev(&disk->header, dev)) {
- efi_free_pool(disk->dp);
- efi_delete_handle(&disk->header);
+ efi_disk_free_diskobj(disk);
+
+ /* TODO: closing the parent EFI_BLOCK_IO_PROTOCOL is missing. */
return -1;
}
--
2.34.1
[PATCH v3 1/3] efi_loader: avoid pointer access after calling efi_delete_handle
efi_delete_handle() calls efi_purge_handle(), then it finally
frees the EFI handle.
Both diskobj and handle variables in efi_disk_remove() have
the same pointer, we can not access diskobj->dp after calling
efi_delete_handle().
This commit saves the struct efi_device_path pointer before
calling efi_delete_handle(). This commit also fixes the
missing free for volume member in struct efi_disk_obj.
This commit also removes the container_of() calls, and
adds the TODO comment of missing efi_close_protocol() call
for the parent EFI_BLOCK_IO_PROTOCOL.
Signed-off-by: Masahisa Kojima
Reviewed-by: Ilias Apalodimas
---
lib/efi_loader/efi_disk.c | 20 ++--
1 file changed, 14 insertions(+), 6 deletions(-)
diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index 013842f077..105f080125 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -707,7 +707,9 @@ int efi_disk_remove(void *ctx, struct event *event)
struct udevice *dev = event->data.dm.dev;
efi_handle_t handle;
struct blk_desc *desc;
+ struct efi_device_path *dp = NULL;
struct efi_disk_obj *diskobj = NULL;
+ struct efi_simple_file_system_protocol *volume = NULL;
efi_status_t ret;
if (dev_tag_get_ptr(dev, DM_TAG_EFI, (void **)&handle))
@@ -718,24 +720,30 @@ int efi_disk_remove(void *ctx, struct event *event)
case UCLASS_BLK:
desc = dev_get_uclass_plat(dev);
if (desc && desc->uclass_id != UCLASS_EFI_LOADER)
- diskobj = container_of(handle, struct efi_disk_obj,
- header);
+ diskobj = (struct efi_disk_obj *)handle;
break;
case UCLASS_PARTITION:
- diskobj = container_of(handle, struct efi_disk_obj, header);
+ diskobj = (struct efi_disk_obj *)handle;
+
+ /* TODO: closing the parent EFI_BLOCK_IO_PROTOCOL is missing. */
+
break;
default:
return 0;
}
+ if (diskobj) {
+ dp = diskobj->dp;
+ volume = diskobj->volume;
+ }
+
ret = efi_delete_handle(handle);
/* Do not delete DM device if there are still EFI drivers attached. */
if (ret != EFI_SUCCESS)
return -1;
- if (diskobj)
- efi_free_pool(diskobj->dp);
-
+ efi_free_pool(dp);
+ free(volume);
dev_tag_del(dev, DM_TAG_EFI);
return 0;
--
2.34.1
[PATCH v3 0/3] fix and refactoring of efi_disk.c
This series fixes the memory leak issue in lib/efi_loader/efi_disk.c and refactor the efi_disk_remove() implementation. [Changelog] v2 -> v3 - remove unnecessary NULL check v1 -> v2 - remove already merged patch - remove container_of() calls - add TODO comments - return immediately in UCLASS_EFI_LOADER removal Masahisa Kojima (3): efi_loader: avoid pointer access after calling efi_delete_handle efi_loader: create common function to free struct efi_disk_obj efi_loader: return immediately in UCLASS_EFI_LOADER removal lib/efi_loader/efi_disk.c | 52 --- 1 file changed, 38 insertions(+), 14 deletions(-) -- 2.34.1
[PATCH] ARM: imx: Configure GIC clock parent on Data Modul i.MX8M Plus eDM SBC
The CONFIG_SPL_BOARD_INIT lets SPL common code call spl_board_init()
during the SPL start up. On this particular system, spl_board_init()
is used to reconfigure GIC clock parent to PLL2 500M, which is the
configuration expected by the Linux kernel. Enable SPL_BOARD_INIT
and fill in the GIC clock configuration code.
Signed-off-by: Marek Vasut
---
Cc: Fabio Estevam
Cc: Stefano Babic
---
board/data_modul/imx8mp_edm_sbc/spl.c | 13 +
configs/imx8mp_data_modul_edm_sbc_defconfig | 1 +
2 files changed, 14 insertions(+)
diff --git a/board/data_modul/imx8mp_edm_sbc/spl.c
b/board/data_modul/imx8mp_edm_sbc/spl.c
index a3600c8568a..cc2d253e391 100644
--- a/board/data_modul/imx8mp_edm_sbc/spl.c
+++ b/board/data_modul/imx8mp_edm_sbc/spl.c
@@ -80,6 +80,19 @@ int data_modul_imx_edm_sbc_board_power_init(void)
return 0;
}
+void spl_board_init(void)
+{
+ /*
+* Set GIC clock to 500 MHz for OD VDD_SOC. Kernel driver does not
+* allow to change it. Should set the clock after PMIC setting done.
+* Default is 400 MHz (system_pll1_800m with div = 2) set by ROM for
+* ND VDD_SOC.
+*/
+ clock_enable(CCGR_GIC, 0);
+ clock_set_target_val(GIC_CLK_ROOT, CLK_ROOT_ON |
CLK_ROOT_SOURCE_SEL(5));
+ clock_enable(CCGR_GIC, 1);
+}
+
int spl_board_boot_device(enum boot_device boot_dev_spl)
{
if (boot_dev_spl == SPI_NOR_BOOT) /* SPI NOR */
diff --git a/configs/imx8mp_data_modul_edm_sbc_defconfig
b/configs/imx8mp_data_modul_edm_sbc_defconfig
index a55630c1a6d..d29bc986267 100644
--- a/configs/imx8mp_data_modul_edm_sbc_defconfig
+++ b/configs/imx8mp_data_modul_edm_sbc_defconfig
@@ -56,6 +56,7 @@ CONFIG_SPL_MAX_SIZE=0x25000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x96fc00
CONFIG_SPL_BSS_MAX_SIZE=0x400
+CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
--
2.43.0
[PATCH] ARM: imx: Enable SPL_BOARD_INIT on DH i.MX8M Plus DHCOM
The CONFIG_SPL_BOARD_INIT lets SPL common code call spl_board_init() during the SPL start up. On this particular system, spl_board_init() is used to reconfigure GIC clock parent to PLL2 500M, which is the configuration expected by the Linux kernel. Enable SPL_BOARD_INIT . Signed-off-by: Marek Vasut --- Cc: Fabio Estevam Cc: Stefano Babic Cc: u-b...@dh-electronics.com --- configs/imx8mp_dhcom_pdk2_defconfig | 1 + configs/imx8mp_dhcom_pdk3_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig index dc482abad85..4f907ce00d0 100644 --- a/configs/imx8mp_dhcom_pdk2_defconfig +++ b/configs/imx8mp_dhcom_pdk2_defconfig @@ -54,6 +54,7 @@ CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x96fc00 CONFIG_SPL_BSS_MAX_SIZE=0x400 +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8mp_dhcom_pdk3_defconfig b/configs/imx8mp_dhcom_pdk3_defconfig index 3442af6f00e..9972e2d96b6 100644 --- a/configs/imx8mp_dhcom_pdk3_defconfig +++ b/configs/imx8mp_dhcom_pdk3_defconfig @@ -55,6 +55,7 @@ CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x96fc00 CONFIG_SPL_BSS_MAX_SIZE=0x400 +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -- 2.43.0
Re: [PATCH v2 RESEND 2/2] nvme: Update nvme_scan_namespace to keep trying on busy
On Tue, Jan 9, 2024 at 9:05 PM Moritz Fischer wrote:
>
> A busy controller shouldn't be game-over for all controllers,
> so keep trying on hitting -EBUSY.
>
> This change brings the actual behavior of the routine in line
> with what the descriptions says.
>
> Fixes: 982388eaa991 ("nvme: Add NVM Express driver support")
> Reviewed-by: Simon Glass
> Signed-off-by: Moritz Fischer
> ---
> drivers/nvme/nvme.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
> index ec45f831a3..59a139baa0 100644
> --- a/drivers/nvme/nvme.c
> +++ b/drivers/nvme/nvme.c
> @@ -695,7 +695,9 @@ int nvme_scan_namespace(void)
> if (ret) {
> log_err("Failed to probe '%s': err=%dE\n", dev->name,
> ret);
> - return ret;
> + /* Bail if we ran out of memory, else keep trying */
> + if (ret != -EBUSY)
> + return ret;
> }
> }
>
> --
> 2.43.0.472.g3155946c3a-goog
>
Gently ping on this. Is anything wrong with this series or why does it
keep falling through the cracks?
- Moritz
Re: [PATCH v2 RESEND 2/2] nvme: Update nvme_scan_namespace to keep trying on busy
On Thu, Jan 18, 2024 at 02:29:11PM -0800, Moritz Fischer wrote:
> On Tue, Jan 9, 2024 at 9:05 PM Moritz Fischer wrote:
> >
> > A busy controller shouldn't be game-over for all controllers,
> > so keep trying on hitting -EBUSY.
> >
> > This change brings the actual behavior of the routine in line
> > with what the descriptions says.
> >
> > Fixes: 982388eaa991 ("nvme: Add NVM Express driver support")
> > Reviewed-by: Simon Glass
> > Signed-off-by: Moritz Fischer
> > ---
> > drivers/nvme/nvme.c | 4 +++-
> > 1 file changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
> > index ec45f831a3..59a139baa0 100644
> > --- a/drivers/nvme/nvme.c
> > +++ b/drivers/nvme/nvme.c
> > @@ -695,7 +695,9 @@ int nvme_scan_namespace(void)
> > if (ret) {
> > log_err("Failed to probe '%s': err=%dE\n",
> > dev->name,
> > ret);
> > - return ret;
> > + /* Bail if we ran out of memory, else keep trying */
> > + if (ret != -EBUSY)
> > + return ret;
> > }
> > }
> >
> > --
> > 2.43.0.472.g3155946c3a-goog
> >
>
> Gently ping on this. Is anything wrong with this series or why does it
> keep falling through the cracks?
Randomly, I'm testing this (and your other patches, and some others) at
the moment. Sorry for the delay.
--
Tom
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Description: PGP signature
Re: [PATCH 0/2] rockchip: Fix ethernet on Radxa ROCK Pi E v1.21
Hi Jonas, On Thu 2024-01-18 @ 07:19:44 AM, Jonas Karlman wrote: > Ethernet on a Radxa ROCK Pi E v1.21 with a RTL8211F ethernet PHY > currently fails with the following message: > > Could not get PHY for ethernet@ff54: addr -1 > > This happens because the ethernet PHY is never reset before a phy-id is > read back from the MDIO bus. > > This series fixes this issue by calling eth_phy_set_mdio_bus() from the > designware ethernet driver to issue a PHY reset before the phy_connect() > call. > > With the driver change and DM_ETH_PHY and PHY_REALTEK enabled the PHY > can be identified and etherent works: > > => mdio list > ethernet@ff54: > 1 - RealTek RTL8211F <--> ethernet@ff54 > > This was tested with and without the DM_MDIO option enabled. Decided to > leave it disabled in this series. This works great, thank you! As you suspected, both boards/PHYs work fine now work under Linux (in addition to U-Boot). Tested-By: Trevor Woerner > Jonas Karlman (2): > net: designware: Reset eth phy before phy connect > rockchip: rk3328-rock-pi-e: Enable DM_ETH_PHY and PHY_REALTEK > > configs/rock-pi-e-rk3328_defconfig | 2 ++ > drivers/net/designware.c | 7 +++ > 2 files changed, 9 insertions(+) > > -- > 2.43.0 >
Re: [PATCH v1 4/4] board: verdin-am62: set cpu core voltage depending on speed grade
On Thu, Jan 18, 2024 at 05:31:20PM +0100, Max Krummenacher wrote: > On Thu, Jan 18, 2024 at 10:50:07AM +0100, Max Krummenacher wrote: > > On Wed, Jan 17, 2024 at 11:16:49AM +0100, Max Krummenacher wrote: > > > From: Max Krummenacher > > > > > > Speed grade T requires the VDD_CORE voltage to be 0.85V if using > > > the maximum core frequency. > > > > > > Speed grades G, K, S allow the VDD_CORE voltage to be 0.75V up to the > > > maximum core frequency but allow to run at 0.85V. > > > > > > For efficiency in manufacturing and code maintenance we use 0.85V for > > > the PMIC defaults and device tree settings and dynamically adjust the > > > voltage in the PMIC and device tree to 0.75V for lower speed SKU to > > > gain more than 100mW power consumption reduction. > > > > > > Signed-off-by: Max Krummenacher > > > --- > > > > > > board/toradex/verdin-am62/verdin-am62.c | 47 + > > > 1 file changed, 47 insertions(+) > > > > > > diff --git a/board/toradex/verdin-am62/verdin-am62.c > > > b/board/toradex/verdin-am62/verdin-am62.c > > > index 4e912b5f32f..8b9db224069 100644 > > > --- a/board/toradex/verdin-am62/verdin-am62.c > > > +++ b/board/toradex/verdin-am62/verdin-am62.c > > > @@ -13,10 +13,13 @@ > > > #include > > > #include > > > #include > > > +#include > > > > In the !DM_REGULATOR case regulator.h assumes errno.h to be already > > included. > > This happens when compiling the R5 SPL. > > > > Will fix this in a v2 of the series. > > Actually we can go on with the series. While it is true that errno.h is not > included in regulator.h, the required header is included and its definitions > available. > > I will create a separate patch which cleans up the headers, so that they > become self contained. FTR, https://lore.kernel.org/all/20240118181106.4133924-1-max.oss...@gmail.com/ As Max wrote this series does not require that cleanup. Francesco
Re: [PATCH] headers: don't depend on errno.h being available
On Thu, Jan 18, 2024 at 07:10:47PM +0100, max.oss...@gmail.com wrote:
> From: Max Krummenacher
>
> These headers follow the pattern:
>
> | #if CONFIG_IS_ENABLED(FANCY_FEATURE)
> | void foo(void);
> | #else
> | static inline void foo(void) { return -ENOSYS; }
> | #endif
>
> In the #else path ENOSYS is used, however linux/errno.h is not included.
> If errno.h has not been included already the compiler errors out even
> if the inline function is not referenced.
>
> Make those headers self contained.
>
> Signed-off-by: Max Krummenacher
Reviewed-by: Francesco Dolcini
Re: [PATCH 2/2] arm: imx: imx8m: Enable the SError exception
On Thu, Jan 18, 2024 at 4:08 PM Marek Vasut wrote:
>
> On 1/18/24 16:06, Fabio Estevam wrote:
> > From: Ye Li
> >
> > To work with commit 2f3c92060dcd ("imx8m: workaround ROM serror")
> > we need to enable the SError exception and install vector in SPL.
>
> This really does need better commit message, sorry.
>
> Details, please.
>
> What does trigger the SError ?
Ye Li, please improve the commit message and send a v2.
Thanks
Re: [PATCH v3 07/11] lib: vsprintf: enable '%pbl' format specifier
On Wed, Jan 10, 2024 at 10:10:33AM +0100, lukas.funke-...@weidmueller.com wrote: > From: Lukas Funke > > The commit enables vsprintf() to handle the '%pbl' format specifier > in order to print bitmaps and its derivatives such as cpumask and > nodemask [1]. This can be used to derive kernel boot parameters from > bitmaks such as 'isolcpu' or 'nohz_full' [2]. > > [1] https://www.kernel.org/doc/Documentation/printk-formats.txt > [2] https://www.kernel.org/doc/html/latest/admin-guide/kernel-parameters.html > > Signed-off-by: Lukas Funke This breaks building ARC platforms, and possibly others. Note that tools/buildman/buildman is happy to fetch toolchains for you, and in this case it's also just the current kernel.org cross-toolchain. Please see https://docs.u-boot.org/en/latest/develop/ci_testing.html about how to trigger a CI run prior to sending v4, thanks. -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 06/32] serial: msm: add debug UART
On Tue, Dec 19, 2023 at 6:04 PM Caleb Connolly
wrote:
>
> Introduce support for early debugging.
>
> Signed-off-by: Caleb Connolly
> ---
> drivers/serial/Kconfig | 8
> drivers/serial/serial_msm.c | 32
> 2 files changed, 40 insertions(+)
>
> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> index 81fdac047824..20713812c839 100644
> --- a/drivers/serial/Kconfig
> +++ b/drivers/serial/Kconfig
> @@ -304,6 +304,14 @@ config DEBUG_UART_S5P
> will need to provide parameters to make this work. The driver will
> be available until the real driver-model serial is running.
>
> +config DEBUG_UART_MSM
> + bool "Qualcomm QUP UART debug"
What is QUP ?
> + depends on ARCH_SNAPDRAGON
> + help
> + Select this to enable a debug UART using the serial_msm driver. You
> + will need to provide parameters to make this work. The driver will
> + be available until the real driver-model serial is running.
> +
> config DEBUG_UART_MSM_GENI
> bool "Qualcomm snapdragon"
> depends on ARCH_SNAPDRAGON
> diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
> index a22623c316ed..19a5a3a788f7 100644
> --- a/drivers/serial/serial_msm.c
> +++ b/drivers/serial/serial_msm.c
> @@ -253,3 +253,35 @@ U_BOOT_DRIVER(serial_msm) = {
> .probe = msm_serial_probe,
> .ops= &msm_serial_ops,
> };
> +
> +#ifdef CONFIG_DEBUG_UART_MSM
> +
> +static struct msm_serial_data init_serial_data = {
> + .base = CONFIG_VAL(DEBUG_UART_BASE),
> + .clk_bit_rate = UART_DM_CLK_RX_TX_BIT_RATE,
> +};
> +
> +#include
> +
> +static inline void _debug_uart_init(void)
> +{
> + uart_dm_init(&init_serial_data);
> +}
> +
> +static inline void _debug_uart_putc(int ch)
> +{
> + struct msm_serial_data *priv = &init_serial_data;
> +
> + while (!(readl(priv->base + UARTDM_SR) & UARTDM_SR_TX_EMPTY) &&
> + !(readl(priv->base + UARTDM_ISR) & UARTDM_ISR_TX_READY))
> + ;
> +
> + writel(UARTDM_CR_CMD_RESET_TX_READY, priv->base + UARTDM_CR);
> +
> + writel(1, priv->base + UARTDM_NCF_TX);
> + writel(ch, priv->base + UARTDM_TF);
> +}
> +
> +DEBUG_UART_FUNCS
> +
> +#endif
>
> --
> 2.42.1
>
Re: [PATCH v2 03/32] mmc: msm_sdhci: use modern clock handling
On Tue, Dec 19, 2023 at 6:04 PM Caleb Connolly
wrote:
>
> Use the clk_* helper functions and the correct property name for clocks.
>
> Signed-off-by: Caleb Connolly
> ---
> drivers/mmc/msm_sdhci.c | 69
> -
> 1 file changed, 46 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c
> index 604f9c3ff99c..863e6007a905 100644
> --- a/drivers/mmc/msm_sdhci.c
> +++ b/drivers/mmc/msm_sdhci.c
> @@ -44,6 +44,7 @@ struct msm_sdhc_plat {
> struct msm_sdhc {
> struct sdhci_host host;
> void *base;
> + struct clk_bulk clks;
> };
>
> struct msm_sdhc_variant_info {
> @@ -54,36 +55,56 @@ DECLARE_GLOBAL_DATA_PTR;
>
> static int msm_sdc_clk_init(struct udevice *dev)
> {
> - int node = dev_of_offset(dev);
> - uint clk_rate = fdtdec_get_uint(gd->fdt_blob, node, "clock-frequency",
> - 40);
> - uint clkd[2]; /* clk_id and clk_no */
> - int clk_offset;
> - struct udevice *clk_dev;
> - struct clk clk;
> - int ret;
> + struct msm_sdhc *prv = dev_get_priv(dev);
> + ofnode node = dev_ofnode(dev);
> + uint clk_rate;
> + int ret, i = 0, n_clks;
> + const char *clk_name;
>
> - ret = fdtdec_get_int_array(gd->fdt_blob, node, "clock", clkd, 2);
> + ret = ofnode_read_u32(node, "clock-frequency", &clk_rate);
> if (ret)
> - return ret;
> + clk_rate = 40;
>
> - clk_offset = fdt_node_offset_by_phandle(gd->fdt_blob, clkd[0]);
> - if (clk_offset < 0)
> - return clk_offset;
> -
> - ret = uclass_get_device_by_of_offset(UCLASS_CLK, clk_offset,
> &clk_dev);
> - if (ret)
> + ret = clk_get_bulk(dev, &prv->clks);
> + if (ret) {
> + debug("Couldn't get mmc clocks: %d\n", ret);
> return ret;
> + }
>
> - clk.id = clkd[1];
> - ret = clk_request(clk_dev, &clk);
> - if (ret < 0)
> + ret = clk_enable_bulk(&prv->clks);
> + if (ret) {
> + debug("Couldn't enable mmc clocks: %d\n", ret);
> return ret;
> + }
>
> - ret = clk_set_rate(&clk, clk_rate);
> - clk_free(&clk);
> - if (ret < 0)
> - return ret;
> + /* If clock-names is unspecified, then the first clock is the core
> clock */
> + if (!ofnode_get_property(node, "clock-names", &n_clks)) {
> + if (!clk_set_rate(&prv->clks.clks[0], clk_rate)) {
> + printf("Couldn't set core clock rate: %d\n", ret);
> + return -EINVAL;
> + }
> + }
> +
> + /* Find the index of the "core" clock */
> + while (i < n_clks) {
> + ofnode_read_string_index(node, "clock-names", i, &clk_name);
> + if (!strcmp(clk_name, "core"))
> + break;
> + i++;
> + }
> +
> + if (i >= prv->clks.count) {
> + printf("Couldn't find core clock (index %d but only have %d
> clocks)\n", i,
> + prv->clks.count);
> + return -EINVAL;
> + }
> +
> + /* The clock is already enabled by the clk_bulk above */
> + ret = clk_set_rate(&prv->clks.clks[i], clk_rate);
> + if (!ret) {
> + printf("Couldn't set core clock rate: %d\n", ret);
> + return -EINVAL;
> + }
>
> return 0;
> }
> @@ -188,6 +209,8 @@ static int msm_sdc_remove(struct udevice *dev)
> if (!var_info->mci_removed)
> writel(0, priv->base + SDCC_MCI_HC_MODE);
>
> + clk_release_bulk(&priv->clks);
> +
> return 0;
> }
>
>
> --
> 2.42.1
>
Reviewed-by: Ramon Fried
Re: [PATCH v2 13/32] board: dragonboard410c: import board code from mach-snapdragon
On Tue, Dec 19, 2023 at 6:04 PM Caleb Connolly
wrote:
>
> Some of the db410c board support code was written to be generic and
> placed in mach-snapdragon. However, as the db410c is the only board
> using this, move the code out of mach-snapdragon. This makes is more
> obvious what code is relevant for which targets and helps tidy things up
> a little more.
>
> Signed-off-by: Caleb Connolly
> ---
> arch/arm/mach-snapdragon/Makefile | 2 -
> arch/arm/mach-snapdragon/include/mach/dram.h | 12 -
> arch/arm/mach-snapdragon/misc.c| 55
> --
> board/qualcomm/dragonboard410c/Makefile| 3 +-
> board/qualcomm/dragonboard410c/dragonboard410c.c | 4 +-
> .../qualcomm/dragonboard410c/misc.c| 51 +++-
> .../mach => board/qualcomm/dragonboard410c}/misc.h | 1 +
> 7 files changed, 54 insertions(+), 74 deletions(-)
>
> diff --git a/arch/arm/mach-snapdragon/Makefile
> b/arch/arm/mach-snapdragon/Makefile
> index 3a3a297c1768..d02432df8b04 100644
> --- a/arch/arm/mach-snapdragon/Makefile
> +++ b/arch/arm/mach-snapdragon/Makefile
> @@ -6,6 +6,4 @@ obj-$(CONFIG_SDM845) += sysmap-sdm845.o
> obj-$(CONFIG_SDM845) += init_sdm845.o
> obj-$(CONFIG_TARGET_DRAGONBOARD820C) += sysmap-apq8096.o
> obj-$(CONFIG_TARGET_DRAGONBOARD410C) += sysmap-apq8016.o
> -obj-y += misc.o
> -obj-y += dram.o
> obj-$(CONFIG_TARGET_QCS404EVB) += sysmap-qcs404.o
> diff --git a/arch/arm/mach-snapdragon/include/mach/dram.h
> b/arch/arm/mach-snapdragon/include/mach/dram.h
> deleted file mode 100644
> index 0a9eedda414c..
> --- a/arch/arm/mach-snapdragon/include/mach/dram.h
> +++ /dev/null
> @@ -1,12 +0,0 @@
> -/* SPDX-License-Identifier: GPL-2.0+ */
> -/*
> - * Snapdragon DRAM
> - * Copyright (C) 2018 Ramon Fried
> - */
> -
> -#ifndef DRAM_H
> -#define DRAM_H
> -
> -int msm_fixup_memory(void *blob);
> -
> -#endif
> diff --git a/arch/arm/mach-snapdragon/misc.c b/arch/arm/mach-snapdragon/misc.c
> deleted file mode 100644
> index 7d452f4529b7..
> --- a/arch/arm/mach-snapdragon/misc.c
> +++ /dev/null
> @@ -1,55 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0+
> -/*
> - * Miscellaneous Snapdragon functionality
> - *
> - * (C) Copyright 2018 Ramon Fried
> - *
> - */
> -
> -#include
> -#include
> -#include
> -#include
> -
> -/* UNSTUFF_BITS macro taken from Linux Kernel: drivers/mmc/core/sd.c */
> -#define UNSTUFF_BITS(resp, start, size) \
> - ({ \
> - const int __size = size; \
> - const u32 __mask = (__size < 32 ? 1 << __size : 0) - 1; \
> - const int __off = 3 - ((start) / 32); \
> - const int __shft = (start) & 31; \
> - u32 __res; \
> - \
> - __res = resp[__off] >> __shft; \
> - if (__size + __shft > 32) \
> - __res |= resp[__off - 1] << ((32 - __shft) % 32); \
> - __res & __mask; \
> - })
> -
> -u32 msm_board_serial(void)
> -{
> - struct mmc *mmc_dev;
> -
> - mmc_dev = find_mmc_device(0);
> - if (!mmc_dev)
> - return 0;
> -
> - if (mmc_init(mmc_dev))
> - return 0;
> -
> - return UNSTUFF_BITS(mmc_dev->cid, 16, 32);
> -}
> -
> -void msm_generate_mac_addr(u8 *mac)
> -{
> - /* use locally adminstrated pool */
> - mac[0] = 0x02;
> - mac[1] = 0x00;
> -
> - /*
> -* Put the 32-bit serial number in the last 32-bit of the MAC address.
> -* Use big endian order so it is consistent with the serial number
> -* written as a hexadecimal string, e.g. 0x1234abcd ->
> 02:00:12:34:ab:cd
> -*/
> - put_unaligned_be32(msm_board_serial(), &mac[2]);
> -}
> diff --git a/board/qualcomm/dragonboard410c/Makefile
> b/board/qualcomm/dragonboard410c/Makefile
> index 1b99c8b0efef..a3ae1a5f9136 100644
> --- a/board/qualcomm/dragonboard410c/Makefile
> +++ b/board/qualcomm/dragonboard410c/Makefile
> @@ -2,4 +2,5 @@
> #
> # (C) Copyright 2015 Mateusz Kulikowski
>
> -obj-y := dragonboard410c.o
> +obj-y += dragonboard410c.o
> +obj-y += misc.o
> diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.c
> b/board/qualcomm/dragonboard410c/dragonboard410c.c
> index 1adac07569ae..eea603a4148d 100644
> --- a/board/qualcomm/dragonboard410c/dragonboard410c.c
> +++ b/board/qualcomm/dragonboard410c/dragonboard410c.c
> @@ -18,10 +18,10 @@
> #include
> #include
> #include
> -#include
> -#include
> #include
>
> +#include "misc.h"
> +
> DECLARE_GLOBAL_DATA_PTR;
>
> #define USB_HUB_RESET_GPIO 2
> diff --git a/arch/arm/mach-snapdragon/dram.c
> b/board/qualcomm/dragonboard410c/misc.c
> similarity index 64%
> rename from arch/arm/mach-snapdragon/dram.c
> rename to board/qualcomm/dragonboard410c/misc.c
> index 499dfdf0da6e..27d51ef78914 100644
> --- a/arch/arm/mach-snapdragon/dram.c
> +++ b/board/qualcomm/dragonboard410c/misc.c
> @@ -1,6 +1,6 @
Re: [PATCH v2 00/32] Qualcomm generic board support
On Tue, Jan 9, 2024 at 1:33 PM Caleb Connolly wrote:
>
>
>
> On 09/01/2024 06:07, Sumit Garg wrote:
> > On Fri, 5 Jan 2024 at 19:15, Caleb Connolly
> > wrote:
> >>
> >>
> >>
> >> On 05/01/2024 13:14, Sumit Garg wrote:
> >>> Hi Caleb,
> >>
> >> Hi Sumit,
> >>
> >> [snip]
> >>
> ---
> I have tested this series on the Dragonboard410c, Dragonboard820c, and
> >>>
> >>> This series fails to boot (without any U-Boot console print) on
> >>> db410c. I even added below pinctrl change but without any success:
> >>
> >> Are you chainloading from aboot? Or flashing over it?
> >>
> >
> > I am using the default mode where U-Boot acts as the first stage
> > bootloader. I suppose it worked for you since LK enabled drivers which
> > were just reused by U-Boot.
>
> + Stephan, could you maybe give this a try at some point?
>
> Right, although the lack of any output probably indicates that U-Boot
> code isn't getting run for some reason. Could you check if disabling
> LINUX_KERNEL_IMAGE_HEADER (remove the select in arch/arm/Kconfig) helps?
> It was *theorised* that this shouldn't cause any issues but not tested.
>
> Oh yeah, you should also hardcode the memory layout in DTS, this got
> lost when moving to upstream DT and it's needed for the case where we
> don't have ABL/LK to fill it in for us.
> >
> >> I have only been able to validate the chainloading method, following the
> >> steps in doc/board/qualcomm/board.rst and generating the config with
> >>
> >> make dragonboard410c_defconfig chainloaded.config
> >>
> >> do you get any output at all?
> >
> > No output from U-Boot. Last prints from SBL1:
> >
> >
> > D -299022 - SBL1, Delta
> > S - Flash Throughput, 81000 KB/s (1537656 Bytes, 18940 us)
> > S - DDR Frequency, 400 MHz
> >
> >> Can you try enabling debug UART output as
> >> documented in doc/board/qualcomm/debugging.rst?
> >
> > I did but it didn't help.
>
> Hmm, I doubt SBL turns off the UART clock, so the DEBUG_UART ought to
> work - but this has not been tested so there could be something missing.
> Maybe you can try calling msm_uart_clk_init() from _debug_uart_init().
If I recall correctly when I initially started working on the direct
boot, SBL closes all the clocks and everything must be re-initialized.
> >
> >>
> >> The pinctrl fix shouldn't be needed to boot to a shell.
> >
> > While at it, I noticed another pinctrl issue which should be fixed by
> > following diff:
> >
> > diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
> > index 0148ddb54df..6fe7bdd1dca 100644
> > --- a/drivers/serial/serial_msm.c
> > +++ b/drivers/serial/serial_msm.c
> > @@ -204,7 +204,7 @@ static int msm_serial_probe(struct udevice *dev)
> > if (ret)
> > return ret;
> >
> > - pinctrl_select_state(dev, "uart");
> > + pinctrl_select_state(dev, "default");
> > uart_dm_init(priv);
> >
> > return 0;
> >
> > But this still didn't fix the boot problem. As you have the board in
> > your hand, I would suggest you to debug to avoid this back and forth.
>
> I don't have the board unfortunately, only remote access - hence I can
> only debug the chainloaded U-Boot and not "u-boot1st" (or however we
> call it :P). Sorry.
> >
> > -Sumit
> >
> >>
> >> Thanks,
> >>>
> >>> diff --git a/drivers/pinctrl/qcom/pinctrl-apq8016.c
> >>> b/drivers/pinctrl/qcom/pinctrl-apq8016.c
> >>> index 8e698085d78..88518845952 100644
> >>> --- a/drivers/pinctrl/qcom/pinctrl-apq8016.c
> >>> +++ b/drivers/pinctrl/qcom/pinctrl-apq8016.c
> >>> @@ -42,7 +42,7 @@ static const char *apq8016_get_pin_name(struct udevice
> >>> *dev,
> >>> unsigned int selector)
> >>> {
> >>> if (selector < 122) {
> >>> - snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector);
> >>> + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
> >>> return pin_name;
> >>> } else {
> >>> return msm_pinctrl_pins[selector - 122];
> >>>
> >>>
> Dragonboard845c. I unfortunately don't have access to a QCS404 EVB board
> to test.
> >>>
> >>> db820c and qcs404 require a similar pinctrl change though.
> >>>
> >>> -Sumit
> >>>
>
> This series is based on the qcom-next branch [1] and depends on my PMIC
> fixes series [2], an integration branch for testing can be found at [3].
> The non-qualcomm-specific changes (patches 1 and 2) don't have any
> dependencies.
>
> [1]: https://source.denx.de/u-boot/custodians/u-boot-snapdragon
> [2]:
> https://lore.kernel.org/u-boot/20231114-b4-qcom-dt-compat-v3-0-88a92f8f0...@linaro.org/
> [3]:
> https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/tree/b4/qcom-common-target
>
> ---
> Changes in v2:
> - Split DTS changes to reduce patch size.
> - Import full board DTS files from Linux too, and introduce -u-boot.dtsi
> files where necessary to make any U-Boot specific c
Bootflows produce gibberish instead of readable output
Hello Simon, The output below is taken from the sandbox. It seems somebody intended to write a table. But with all these messages that don't belong into the table the output is not very helpful. Scanning for bootflows in all bootdevs Seq Method State UclassPart Name Filename --- --- -- Scanning global bootmeth 'firmware0': Hunting with: simple_bus Found 2 extension board(s). Scanning bootdev 'mmc2.bootdev': Can't map file 'mmc1.img': Invalid argument mmc1: Unable to map file 'mmc1.img' --- --- -- (0 bootflows, 0 valid) If there is no bootflow, why is there a table output? We cannot write a proper table if any other message interferes. Why do we have so many messages with log level 6 = info. Such as "Hunting with: simple bus". Please, provide messages that clearly convey a meaning: "Hunting with: simple bus" Do you mean 'Scanning simple_bus for boot device'? Best regards Heinrich
Re: [PATCH 2/2] arm: imx: imx8m: Enable the SError exception
On 1/18/24 16:06, Fabio Estevam wrote:
From: Ye Li
To work with commit 2f3c92060dcd ("imx8m: workaround ROM serror")
we need to enable the SError exception and install vector in SPL.
This really does need better commit message, sorry.
Details, please.
What does trigger the SError ?
Re: [PATCH 1/2] imx8m: Enable LTO by default
On 1/18/24 16:06, Fabio Estevam wrote: From: Fabio Estevam In an attempt to select ARMV8_SPL_EXCEPTION_VECTORS, the SPL size could not fit into the internal SRAM of some imx8m targets: aarch64: + imx8mm_phg +aarch64-linux-ld.bfd: u-boot-spl section `__u_boot_list' will not fit in region `.sram' +aarch64-linux-ld.bfd: region `.sram' overflowed by 1824 bytes Select LTO to prevent that. Signed-off-by: Fabio Estevam Reviewed-by: Marek Vasut I wouldn't mind seeing LTO enabled for all of ARM64 eventually, but that's for another patch.
Re: [PATCH RFC 4/6] efi_selftest: Add international characters test
On 1/17/24 23:24, Janne Grunau via B4 Relay wrote:
From: Andre Przywara
UEFI relies entirely on unicode output, which actual fonts displayed on
the screen might not be ready for.
Add a test displaying some international characters, to reveal missing
glyphs, especially in our builtin fonts.
How would I detect missing Bengali and Gujarati glyphs with this test?
What might help would be an output of the Unicode entries in the font in
parallel with the glyph.
U+0040, @
U+0041, A
U+0A85. અ
U+0A86. આ
U+0A87. ઇ
U+0A88. ઈ
U+0A89. ઉ
This would require some new command but not an EFI test.
Best regards
Heinrich
This would be needed to be manually checked on the screen for
correctness.
Signed-off-by: Andre Przywara
Suggested-by: Heinrich Schuchardt
Signed-off-by: Janne Grunau
---
lib/efi_selftest/efi_selftest_textoutput.c | 8
1 file changed, 8 insertions(+)
diff --git a/lib/efi_selftest/efi_selftest_textoutput.c
b/lib/efi_selftest/efi_selftest_textoutput.c
index cc44b38bc2..2aa81b0a80 100644
--- a/lib/efi_selftest/efi_selftest_textoutput.c
+++ b/lib/efi_selftest/efi_selftest_textoutput.c
@@ -30,6 +30,9 @@ static int execute(void)
0xD804, 0xDC05,
0xD804, 0xDC22,
0};
+ const u16 text[] =
+u"\u00d6sterreich Edelwei\u00df Sm\u00f8rrebr\u00f8d Sm\u00f6rg"
+u"\u00e5s Ni\u00f1o Ren\u00e9 >\u1f19\u03bb\u03bb\u03ac\u03c2<\n";
/* SetAttribute */
efi_st_printf("\nColor palette\n");
@@ -118,6 +121,11 @@ static int execute(void)
efi_st_printf("Unicode not handled properly\n");
return EFI_ST_FAILURE;
}
+ ret = con_out->output_string(con_out, text);
+ if (ret != EFI_ST_SUCCESS) {
+ efi_st_error("OutputString failed for international chars\n");
+ return EFI_ST_FAILURE;
+ }
efi_st_printf("\n");
return EFI_ST_SUCCESS;
Re: [PATCH RFC 3/6] lib/charset: Map cp437 low chars (0x01 - 0x1f) from unicode
On 1/17/24 23:24, Janne Grunau via B4 Relay wrote:
From: Janne Grunau
Add mappings for code points 1 - 31 as those code points in code page 437
are graphics.
Thios fixes rendering issues of various EFI boot loaders (grub2,
%s/Thios/This/
sd-boot, ...) using EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL.
Could you, please, explain the reason for the change a bit more in depth.
The applications above produce UTF-16. A Truetype font should not have
symbols for positions 0x00-0x1f. Codepage 437 is only relevant for FAT
file names that might use this character set.
Why do you want to translate well define Unicode code points to
characters 0x00-0x1f?
Best regards
Heinrich
Signed-off-by: Janne Grunau
---
include/charset.h | 2 +-
include/cp1250.h | 12 ++--
include/cp437.h| 12 ++--
lib/charset.c | 9 ++---
lib/efi_loader/efi_unicode_collation.c | 2 +-
5 files changed, 28 insertions(+), 9 deletions(-)
diff --git a/include/charset.h b/include/charset.h
index 714382e1c1..c51c29235f 100644
--- a/include/charset.h
+++ b/include/charset.h
@@ -16,7 +16,7 @@
/*
* codepage_437 - Unicode to codepage 437 translation table
*/
-extern const u16 codepage_437[128];
+extern const u16 codepage_437[160];
/**
* console_read_unicode() - read Unicode code point from console
diff --git a/include/cp1250.h b/include/cp1250.h
index adacf8a958..b762c78d9f 100644
--- a/include/cp1250.h
+++ b/include/cp1250.h
@@ -1,10 +1,18 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Constant CP1250 contains the Unicode code points for characters 0x80 - 0xff
- * of the code page 1250.
+ * Constant CP1250 contains the Unicode code points for characters 0x00 - 0x1f
+ * and 0x80 - 0xff of the code page 1250.
*/
#define CP1250 { \
+ 0x, 0x, 0x, 0x, \
+ 0x, 0x, 0x, 0x, \
+ 0x, 0x, 0x, 0x, \
+ 0x, 0x, 0x, 0x, \
+ 0x, 0x, 0x, 0x, \
+ 0x, 0x, 0x, 0x, \
+ 0x, 0x, 0x, 0x, \
+ 0x, 0x, 0x, 0x, \
0x20ac, 0x, 0x201a, 0x, \
0x201e, 0x2026, 0x2020, 0x2021, \
0x, 0x2030, 0x0160, 0x2039, \
diff --git a/include/cp437.h b/include/cp437.h
index 0b2b97132e..5093130f5e 100644
--- a/include/cp437.h
+++ b/include/cp437.h
@@ -1,10 +1,18 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Constant CP437 contains the Unicode code points for characters 0x80 - 0xff
- * of the code page 437.
+ * Constant CP437 contains the Unicode code points for characters 0x00 - 0x1f
+ * and 0x80 - 0xff of the code page 437.
*/
#define CP437 { \
+ 0x, 0x263a, 0x263b, 0x2665, \
+ 0x2666, 0x2663, 0x2660, 0x2022, \
+ 0x25d8, 0x25cb, 0x25d9, 0x2642, \
+ 0x2640, 0x266a, 0x266b, 0x263c, \
+ 0x25ba, 0x25c4, 0x2195, 0x203c, \
+ 0x00b6, 0x00a7, 0x25ac, 0x21a8, \
+ 0x2191, 0x2193, 0x2192, 0x2190, \
+ 0x221f, 0x2194, 0x25b2, 0x25bc, \
0x00c7, 0x00fc, 0x00e9, 0x00e2, \
0x00e4, 0x00e0, 0x00e5, 0x00e7, \
0x00ea, 0x00eb, 0x00e8, 0x00ef, \
diff --git a/lib/charset.c b/lib/charset.c
index 5e4c4f948a..1f8480150a 100644
--- a/lib/charset.c
+++ b/lib/charset.c
@@ -16,7 +16,7 @@
/**
* codepage_437 - Unicode to codepage 437 translation table
*/
-const u16 codepage_437[128] = CP437;
+const u16 codepage_437[160] = CP437;
static struct capitalization_table capitalization_table[] =
#ifdef CONFIG_EFI_UNICODE_CAPITALIZATION
@@ -517,9 +517,12 @@ int utf_to_cp(s32 *c, const u16 *codepage)
int j;
/* Look up codepage translation */
- for (j = 0; j < 0x80; ++j) {
+ for (j = 0; j < 0xA0; ++j) {
if (*c == codepage[j]) {
- *c = j + 0x80;
+ if (j < 0x20)
+ *c = j;
+ else
+ *c = j + 0x60;
return 0;
}
}
diff --git a/lib/efi_loader/efi_unicode_collation.c
b/lib/efi_loader/efi_unicode_collation.c
index c4c7572063..4b2c52918a 100644
--- a/lib/efi_loader/efi_unicode_collation.c
+++ b/lib/efi_loader/efi_unicode_collation.c
@@ -257,7 +257,7 @@ static void EFIAPI efi_fat_to_str(struct
efi_unicode_collation_protocol *this,
for (i = 0; i < fat_size; ++i) {
c = (unsigned char)fat[i];
if (c > 0x80)
- c = codepage[c - 0x80];
+ c = codepage[c - 0x60];
string[i] = c;
if (!c)
break;
Re: [PATCH RFC 2/6] video: console: Parse UTF-8 character sequences
On 1/18/24 14:57, Andre Przywara wrote:
On Wed, 17 Jan 2024 23:24:28 +0100
Janne Grunau via B4 Relay wrote:
Hi,
From: Janne Grunau
efi_console / UEFI applications (grub2, sd-boot, ...) pass UTF-8
character sequences to vidconsole which results in wrong glyphs for code
points outside of ASCII. The truetype console expects Unicode code
points and bitmap font based consoles expect code page 437 code points.
To support both convert UTF-8 to UTF-32 and pass Unicode code points in
vidconsole_ops.putc_xy(). These can be used directly in console_truetype
and after conversion to code page 437 in console_{normal,rotate}.
This fixes rendering of international, symbol and box drawing characters
used by UEFI applications.
Signed-off-by: Janne Grunau
---
drivers/video/console_normal.c | 6 --
drivers/video/console_rotate.c | 16 ++--
drivers/video/console_truetype.c| 8
drivers/video/vidconsole-uclass.c | 18 +-
drivers/video/vidconsole_internal.h | 15 +++
include/video_console.h | 10 ++
6 files changed, 52 insertions(+), 21 deletions(-)
diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c
index a0231293f3..34ef5a5229 100644
--- a/drivers/video/console_normal.c
+++ b/drivers/video/console_normal.c
@@ -7,6 +7,7 @@
*/
#include
+#include
#include
#include
#include
@@ -63,7 +64,7 @@ static int console_move_rows(struct udevice *dev, uint rowdst,
return 0;
}
-static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, char ch)
+static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, int cp)
{
struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev);
struct udevice *vid = dev->parent;
@@ -73,8 +74,9 @@ static int console_putc_xy(struct udevice *dev, uint x_frac,
uint y, char ch)
int pbytes = VNBYTES(vid_priv->bpix);
int x, linenum, ret;
void *start, *line;
+ u8 ch = console_utf_to_cp437(cp);
uchar *pfont = fontdata->video_fontdata +
- (u8)ch * fontdata->char_pixel_bytes;
+ ch * fontdata->char_pixel_bytes;
if (x_frac + VID_TO_POS(vc_priv->x_charsize) > vc_priv->xsize_frac)
return -EAGAIN;
diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c
index 65358a1c6e..e4303dfb36 100644
--- a/drivers/video/console_rotate.c
+++ b/drivers/video/console_rotate.c
@@ -7,6 +7,7 @@
*/
#include
+#include
#include
#include
#include
@@ -67,7 +68,7 @@ static int console_move_rows_1(struct udevice *dev, uint
rowdst, uint rowsrc,
return 0;
}
-static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, char ch)
+static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, int cp)
{
struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev);
struct udevice *vid = dev->parent;
@@ -77,8 +78,9 @@ static int console_putc_xy_1(struct udevice *dev, uint
x_frac, uint y, char ch)
int pbytes = VNBYTES(vid_priv->bpix);
int x, linenum, ret;
void *start, *line;
+ u8 ch = console_utf_to_cp437(cp);
uchar *pfont = fontdata->video_fontdata +
- (u8)ch * fontdata->char_pixel_bytes;
+ ch * fontdata->char_pixel_bytes;
if (x_frac + VID_TO_POS(vc_priv->x_charsize) > vc_priv->xsize_frac)
return -EAGAIN;
@@ -145,7 +147,7 @@ static int console_move_rows_2(struct udevice *dev, uint
rowdst, uint rowsrc,
return 0;
}
-static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, char ch)
+static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, int cp)
{
struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev);
struct udevice *vid = dev->parent;
@@ -155,8 +157,9 @@ static int console_putc_xy_2(struct udevice *dev, uint
x_frac, uint y, char ch)
int pbytes = VNBYTES(vid_priv->bpix);
int linenum, x, ret;
void *start, *line;
+ u8 ch = console_utf_to_cp437(cp);
uchar *pfont = fontdata->video_fontdata +
- (u8)ch * fontdata->char_pixel_bytes;
+ ch * fontdata->char_pixel_bytes;
if (x_frac + VID_TO_POS(vc_priv->x_charsize) > vc_priv->xsize_frac)
return -EAGAIN;
@@ -227,7 +230,7 @@ static int console_move_rows_3(struct udevice *dev, uint
rowdst, uint rowsrc,
return 0;
}
-static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, char ch)
+static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, int cp)
{
struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev);
struct udevice *vid = dev->parent;
@@ -237,8 +240,9 @@ static int console_putc_xy_3(struct udevice *dev, uint
x_frac, uint y, char ch)
int pbytes = VNBYTES(vid_priv->bpix);
int linenum, x, ret;
[PATCH] headers: don't depend on errno.h being available
From: Max Krummenacher
These headers follow the pattern:
| #if CONFIG_IS_ENABLED(FANCY_FEATURE)
| void foo(void);
| #else
| static inline void foo(void) { return -ENOSYS; }
| #endif
In the #else path ENOSYS is used, however linux/errno.h is not included.
If errno.h has not been included already the compiler errors out even
if the inline function is not referenced.
Make those headers self contained.
Signed-off-by: Max Krummenacher
---
include/dfu.h | 1 +
include/dm/pinctrl.h | 2 ++
include/hwspinlock.h | 2 ++
include/i2c_eeprom.h | 2 ++
include/nvmem.h | 2 ++
include/power-domain.h| 2 ++
include/power/regulator.h | 2 ++
include/remoteproc.h | 1 +
include/soc.h | 2 ++
include/spi-mem.h | 2 ++
include/sysinfo.h | 2 ++
include/tlv_eeprom.h | 2 ++
12 files changed, 22 insertions(+)
diff --git a/include/dfu.h b/include/dfu.h
index 2f42781888a..fa1918cd663 100644
--- a/include/dfu.h
+++ b/include/dfu.h
@@ -10,6 +10,7 @@
#ifndef __DFU_ENTITY_H_
#define __DFU_ENTITY_H_
+#include
#include
#include
#include
diff --git a/include/dm/pinctrl.h b/include/dm/pinctrl.h
index 70d8cc5ecac..e41baea6200 100644
--- a/include/dm/pinctrl.h
+++ b/include/dm/pinctrl.h
@@ -6,6 +6,8 @@
#ifndef __PINCTRL_H
#define __PINCTRL_H
+#include
+
#define PINNAME_SIZE 10
#define PINMUX_SIZE90
diff --git a/include/hwspinlock.h b/include/hwspinlock.h
index d8556c0b4b4..dd5135442ec 100644
--- a/include/hwspinlock.h
+++ b/include/hwspinlock.h
@@ -6,6 +6,8 @@
#ifndef _HWSPINLOCK_H_
#define _HWSPINLOCK_H_
+#include
+
/**
* Implement a hwspinlock uclass.
* Hardware spinlocks are used to perform hardware protection of
diff --git a/include/i2c_eeprom.h b/include/i2c_eeprom.h
index 32dcb034973..cba991e3574 100644
--- a/include/i2c_eeprom.h
+++ b/include/i2c_eeprom.h
@@ -6,6 +6,8 @@
#ifndef __I2C_EEPROM
#define __I2C_EEPROM
+#include
+
struct udevice;
struct i2c_eeprom_ops {
diff --git a/include/nvmem.h b/include/nvmem.h
index 822e698bdd4..e6a8a98828b 100644
--- a/include/nvmem.h
+++ b/include/nvmem.h
@@ -6,6 +6,8 @@
#ifndef NVMEM_H
#define NVMEM_H
+#include
+
/**
* DOC: Design
*
diff --git a/include/power-domain.h b/include/power-domain.h
index 2ff6c77cd76..18525073e5e 100644
--- a/include/power-domain.h
+++ b/include/power-domain.h
@@ -6,6 +6,8 @@
#ifndef _POWER_DOMAIN_H
#define _POWER_DOMAIN_H
+#include
+
/**
* A power domain is a portion of an SoC or chip that is powered by a
* switchable source of power. In many cases, software has control over the
diff --git a/include/power/regulator.h b/include/power/regulator.h
index 200652cb3d7..bb07a814c79 100644
--- a/include/power/regulator.h
+++ b/include/power/regulator.h
@@ -7,6 +7,8 @@
#ifndef _INCLUDE_REGULATOR_H_
#define _INCLUDE_REGULATOR_H_
+#include
+
struct udevice;
/**
diff --git a/include/remoteproc.h b/include/remoteproc.h
index a11dc8a9b6c..91a88791a47 100644
--- a/include/remoteproc.h
+++ b/include/remoteproc.h
@@ -14,6 +14,7 @@
* platforms have moved to dm/fdt.
*/
#include/* For platform data support - non dt world */
+#include
/**
* struct fw_rsc_hdr - firmware resource entry header
diff --git a/include/soc.h b/include/soc.h
index 850db28b76a..b8cfc507706 100644
--- a/include/soc.h
+++ b/include/soc.h
@@ -7,6 +7,8 @@
#ifndef __SOC_H
#define __SOC_H
+#include
+
#define SOC_MAX_STR_SIZE 128
struct udevice;
diff --git a/include/spi-mem.h b/include/spi-mem.h
index b07cf2ed83d..3c8e95b6f53 100644
--- a/include/spi-mem.h
+++ b/include/spi-mem.h
@@ -11,6 +11,8 @@
#ifndef __UBOOT_SPI_MEM_H
#define __UBOOT_SPI_MEM_H
+#include
+
struct udevice;
#define SPI_MEM_OP_CMD(__opcode, __buswidth) \
diff --git a/include/sysinfo.h b/include/sysinfo.h
index f2c1aa29d18..524c7d6b223 100644
--- a/include/sysinfo.h
+++ b/include/sysinfo.h
@@ -7,6 +7,8 @@
#ifndef __SYSINFO_H__
#define __SYSINFO_H__
+#include
+
struct udevice;
/*
diff --git a/include/tlv_eeprom.h b/include/tlv_eeprom.h
index fd45e5f6ebb..2b1e19b2bdd 100644
--- a/include/tlv_eeprom.h
+++ b/include/tlv_eeprom.h
@@ -7,6 +7,8 @@
#ifndef __TLV_EEPROM_H_
#define __TLV_EEPROM_H_
+#include
+
/*
* The Definition of the TlvInfo EEPROM format can be found at onie.org or
* github.com/onie
--
2.42.0
Re: [PATCH RFC 1/6] lib: charset: Fix utf8_to_utf32_stream() return value doc string
On 1/17/24 23:24, Janne Grunau via B4 Relay wrote:
From: Janne Grunau
The comment appears to be copied from utf8_to_cp437_stream() but was not
updated.
Fixes: e91789e2f661 ("lib/charset: UTF-8 stream conversion")
Signed-off-by: Janne Grunau
---
include/charset.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/charset.h b/include/charset.h
index 44034c71d3..714382e1c1 100644
--- a/include/charset.h
+++ b/include/charset.h
@@ -328,7 +328,7 @@ int utf8_to_cp437_stream(u8 c, char *buffer);
Without a further description it is unclear what this function is
intended to do. How about:
"This function can be used to convert a UTF-8 byte-stream to Unicode
code-points.
The function is called for each byte @c in a UTF-8 stream. The byte is
appended to the temporary storage @buffer until the UTF-8 stream in
@buffer describes a Unicode code point.
When a new code point has been decoded it is returned and buffer[0] is
set to '\0', otherwise the return value is 0.
The buffer must be at least 5 characters long. Before the first function
invocation buffer[0] must be set to '\0'."
*
* @c:next UTF-8 character to convert
* @buffer: buffer, at least 5 characters
- * Return: next codepage 437 character or 0
+ * Return: next Unicode code point or 0
%s/next//g
*/
int utf8_to_utf32_stream(u8 c, char *buffer);
Best regards
Heinrich
[PATCH 1/1] test: enhance unicode_test_utf8_to_utf32_stream()
Additionally test a UTF-8 string where each code point translates to three
UTF-8 bytes.
Signed-off-by: Heinrich Schuchardt
---
test/unicode_ut.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/test/unicode_ut.c b/test/unicode_ut.c
index 1d0d90c2d7..47c3f52774 100644
--- a/test/unicode_ut.c
+++ b/test/unicode_ut.c
@@ -752,9 +752,10 @@ static int unicode_test_utf8_to_utf32_stream(struct
unit_test_state *uts)
const u32 u1[] = {0x55, 0x2D, 0x42, 0x6F, 0x6F, 0x74, 0x};
const u32 u2[] = {0x6B, 0x61, 0x66, 0x62, 0xE1, 0x74, 0x75, 0x72, 0x00};
- const u32 u3[] = {0x0392, 0x20, 0x69, 0x73, 0x20, 0x6E, 0x6F, 0x74,
- 0x20, 0x42, 0x00};
+ const u32 u3[] = {0x6f5c, 0x6c34, 0x8266};
const u32 u4[] = {0x6A, 0x32, 0x6C, 0x00};
+ const u32 u5[] = {0x0392, 0x20, 0x69, 0x73, 0x20, 0x6E, 0x6F, 0x74,
+ 0x20, 0x42, 0x00};
memset(buf, 0, sizeof(buf));
utf8_to_utf32_stream_helper(d1, buf);
@@ -765,9 +766,13 @@ static int unicode_test_utf8_to_utf32_stream(struct
unit_test_state *uts)
ut_asserteq_mem(u2, buf, sizeof(u2));
memset(buf, 0, sizeof(buf));
- utf8_to_utf32_stream_helper(d5, buf);
+ utf8_to_utf32_stream_helper(d3, buf);
ut_asserteq_mem(u3, buf, sizeof(u3));
+ memset(buf, 0, sizeof(buf));
+ utf8_to_utf32_stream_helper(d5, buf);
+ ut_asserteq_mem(u5, buf, sizeof(u5));
+
memset(buf, 0, sizeof(buf));
utf8_to_utf32_stream_helper(j2, buf);
ut_asserteq_mem(u4, buf, sizeof(u4));
--
2.43.0
Re: [PATCH v2] configs: Transpeed 8K618-T: Add Transpeed 8K618-T board support
On Thu, 18 Jan 2024 11:45:08 -0500 Nick Alilovic wrote: Hi Nick, > This is a Chinese TV box based on Allwinner H618 SoC. > > The DRAM parameters were derived from the values found in a firmware update. > > Signed-off-by: Nick Alilovic Thanks for the fixes, looks good now: Reviewed-by: Andre Przywara I will queue this after the DT files have been merged. Cheers, Andre > --- > This defconfig relies on the synced sun50i-h618-transpeed-8k618-t.dts file. > > configs/transpeed-8k618-t_defconfig | 27 +++ > 1 file changed, 27 insertions(+) > create mode 100644 configs/transpeed-8k618-t_defconfig > > diff --git a/configs/transpeed-8k618-t_defconfig > b/configs/transpeed-8k618-t_defconfig > new file mode 100644 > index 00..020d3974af > --- /dev/null > +++ b/configs/transpeed-8k618-t_defconfig > @@ -0,0 +1,27 @@ > +CONFIG_ARM=y > +CONFIG_ARCH_SUNXI=y > +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h618-transpeed-8k618-t" > +CONFIG_SPL=y > +CONFIG_DRAM_SUN50I_H616_DX_ODT=0x03030303 > +CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e > +CONFIG_DRAM_SUN50I_H616_CA_DRI=0x1f12 > +CONFIG_DRAM_SUN50I_H616_TPR0=0xc0001002 > +CONFIG_DRAM_SUN50I_H616_TPR10=0x2f1107 > +CONFIG_DRAM_SUN50I_H616_TPR11=0x > +CONFIG_DRAM_SUN50I_H616_TPR12=0xeddc7665 > +CONFIG_MACH_SUN50I_H616=y > +CONFIG_SUNXI_DRAM_H616_DDR3_1333=y > +CONFIG_DRAM_CLK=648 > +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 > +CONFIG_R_I2C_ENABLE=y > +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set > +CONFIG_SPL_I2C=y > +CONFIG_SPL_SYS_I2C_LEGACY=y > +CONFIG_SYS_I2C_MVTWSI=y > +CONFIG_SYS_I2C_SLAVE=0x7f > +CONFIG_SYS_I2C_SPEED=40 > +CONFIG_SUPPORT_EMMC_BOOT=y > +CONFIG_AXP313_POWER=y > +CONFIG_AXP_DCDC3_VOLT=1360 > +CONFIG_USB_EHCI_HCD=y > +CONFIG_USB_OHCI_HCD=y
Re: [PATCH RFC 0/6] video: Add UTF-8 support for UEFI applications
Hej Heinrich, On Thu, Jan 18, 2024, at 17:47, Heinrich Schuchardt wrote: > On 1/17/24 23:24, Janne Grunau via B4 Relay wrote: >> Andre submitted 2 years ago DM_VIDEO improvements for UEFI applications >> using UEFI's EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL but did not follow with >> suggested changes. This series takes care of the UTF-8 support which >> required to draw symbol and box drawing characters used by UEFI >> applications like grub2 and sd-boot correctly. >> >> Compared to Andre's version this version has the following changes: >> - use and extend existing conversion functions from lib/charset.c >> - convert first to UTF-32 to support the truetype console as well >> - conversion is conditional on CONFIG_EFI_LOADER >> - use escape sequences in tests as proposed by Heinrich > > Hello Janne, > > to correctly render GRUB I think you need the following: > > * Use truetype a truetype font is not necessary, the arrow glyphs used by grub are in codepage 437 (code points 0x10 - 0x1f, see https://en.wikipedia.org/wiki/Code_page_437#Character_set ). grub2 and sd-boot render correctly with this patchset and bitmap fonts. > * Add a mono-spaced Truetype font which has all the needed characters. > * A bunch of code fixed. > > This is the font I once suggested. > > [PATCH v2 1/1] video: add DejaVu Mono font > https://lore.kernel.org/u-boot/20210301181534.7618-1-xypron.g...@gmx.de/ > > Which font have you been using for testing? The 8x16 and 16x32 bitmap fonts and the included Anker/Coder Narrow truetype font. All render the grub menu correctly but the bitmap fonts are missing some of the glyphs in the international character efi_selftest by Andre and you. > At the time these additional patches were needed. > > [PATCH 0/6] efi_loader: Unicode output in UEFI applications > https://lore.kernel.org/u-boot/20210227130840.166193-1-xypron.g...@gmx.de/#r That is functionally identical to this patchset except for the Unicode mapping for code page 437 code points 0x01 to 0x1f (Patch 3/6 "lib/charset: Map cp437 low chars (0x01 - 0x1f) from unicode"). I wasn't aware of this and stopped looking after Andre's patches. It looks like patches 5 and 6 were never merged. Was there a reason for that? best regards Janne >> >> Link: >> https://lore.kernel.org/u-boot/20220110005638.21599-1-andre.przyw...@arm.com/ >> Signed-off-by: Janne Grunau >> --- >> Andre Przywara (2): >>efi_selftest: Add international characters test >>efi_selftest: Add box drawing character selftest >> >> Janne Grunau (4): >>lib: charset: Fix utf8_to_utf32_stream() return value doc string >>video: console: Parse UTF-8 character sequences >>lib/charset: Map cp437 low chars (0x01 - 0x1f) from unicode >>efi_selftest: Add symbol character selftest >> >> drivers/video/console_normal.c | 6 +++-- >> drivers/video/console_rotate.c | 16 +- >> drivers/video/console_truetype.c | 8 +++ >> drivers/video/vidconsole-uclass.c | 18 ++- >> drivers/video/vidconsole_internal.h| 15 + >> include/charset.h | 4 ++-- >> include/cp1250.h | 12 -- >> include/cp437.h| 12 -- >> include/video_console.h| 10 + >> lib/charset.c | 9 +--- >> lib/efi_loader/efi_unicode_collation.c | 2 +- >> lib/efi_selftest/efi_selftest_textoutput.c | 35 >> ++ >> 12 files changed, 116 insertions(+), 31 deletions(-) >> --- >> base-commit: 866ca972d6c3cabeaf6dbac431e8e08bb30b3c8e >> change-id: 20240117-vidconsole-utf8-uefi-fa23b4ac65d6 >> >> Best regards,
[PATCH 1/1] lib: add comment in utf8_to_utf32_stream()
The logic of utf8_to_utf32_stream() is not easy to understand. Add a comment. Signed-off-by: Heinrich Schuchardt --- lib/charset.c | 4 1 file changed, 4 insertions(+) diff --git a/lib/charset.c b/lib/charset.c index 89057ef7ce..2b43175b1d 100644 --- a/lib/charset.c +++ b/lib/charset.c @@ -570,6 +570,10 @@ int utf8_to_utf32_stream(u8 c, char *buffer) } if (pos == end) return 0; + /* +* Appending the byte lead to an invalid UTF-8 byte sequence. +* Consider it as the start of a new code sequence. +*/ *buffer = 0; } } -- 2.43.0
Re: [PATCH 1/1] boot: boot_flow_iter_set() called with uninitialized methods_flag
On Sun, Jan 07, 2024 at 09:56:07AM +0100, Heinrich Schuchardt wrote:
> Some code paths do not initialize methods_flag before using it.
> Initialize it to 0 in the definition line.
>
> Addresses-Coverity-ID: ("467057 Uninitialized scalar variable")
> Signed-off-by: Heinrich Schuchardt
> ---
> boot/bootflow.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/boot/bootflow.c b/boot/bootflow.c
> index 05484fd5b1..4b32d74fe1 100644
> --- a/boot/bootflow.c
> +++ b/boot/bootflow.c
> @@ -241,7 +241,7 @@ static int iter_incr(struct bootflow_iter *iter)
> if (iter->flags & BOOTFLOWIF_SINGLE_DEV) {
> ret = -ENOENT;
> } else {
> - int method_flags;
> + int method_flags = 0;
>
> ret = 0;
> dev = iter->dev;
> @@ -260,7 +260,6 @@ static int iter_incr(struct bootflow_iter *iter)
> } else if (IS_ENABLED(CONFIG_BOOTSTD_FULL) &&
> iter->flags & BOOTFLOWIF_SINGLE_MEDIA) {
> log_debug("next in single\n");
> - method_flags = 0;
> do {
> /*
>* Move to the next bootdev child of this media
> @@ -302,7 +301,6 @@ static int iter_incr(struct bootflow_iter *iter)
> }
> } else {
> ret = bootdev_next_prio(iter, &dev);
> - method_flags = 0;
> }
> }
> log_debug("ret=%d, dev=%p %s\n", ret, dev,
So this leads to test failure:
== FAILURES
===
___ test_ut[ut_bootstd_bootdev_test_order]
test/py/tests/test_ut.py:510: in test_ut
assert output.endswith('Failures: 0')
E AssertionError: assert False
E+ where False = ('Failures: 0')
E+where =
'Test: bootdev_test_order: bootdev.c\r\r\nstarting USB...\r\r\nBus usb@1:
scanning bus usb@1 for devices... 5 USB Devi...rder(): 5 == iter.num_devs:
Expected 0x5 (5), got 0x4 (4)\r\r\nTest bootdev_test_order failed 2
times\r\r\nFailures: 2'.endswith
Captured stdout call
-
=> ut bootstd bootdev_test_order
Test: bootdev_test_order: bootdev.c
starting USB...
Bus usb@1: scanning bus usb@1 for devices... 5 USB Device(s) found
scanning usb for storage devices... 27 Storage Device(s) found
test/boot/bootdev.c:228, bootdev_test_order(): 5 == iter.num_devs: Expected 0x5
(5), got 0x4 (4)
Test: bootdev_test_order: bootdev.c (flat tree)
starting USB...
Bus usb@1: scanning bus usb@1 for devices... 5 USB Device(s) found
scanning usb for storage devices... 30 Storage Device(s) found
test/boot/bootdev.c:228, bootdev_test_order(): 5 == iter.num_devs: Expected 0x5
(5), got 0x4 (4)
Test bootdev_test_order failed 2 times
Failures: 2
=>
=== short test summary info
===
FAILED test/py/tests/test_ut.py::test_ut[ut_bootstd_bootdev_test_order] -
AssertionError: as...
!! stopping after 1 failures
!!
== 1 failed, 123 passed, 89 skipped, 21 deselected in 25.70s
==
Which is in turn test/boot/bootdev.c::bootdev_test_order() and looking
at that code, I don't really understand why we expect 5 to be the
expected value, nor why it becomes 4 now.
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH v4 0/6] rpi5: initial support
Hi, > Am 18.01.2024 um 09:33 schrieb Ivan T. Ivanov : > >> I actually just did that. Installed a fresh Tumbleweed on a microSD card, >> booted it up with a rpi4 and after installing all necessary build tools I >> applied your patches to u-boot 2024.01 sources, and then executed these two >> commands to let it compile a u-boot.bin file which I then put in /boot/efi >> to replace the u-boot.bin which is/was already there. Then I pulled the SD >> card and moved it over to the RaspberryPi5 in trying to get it booted up. >> However, again no HDMI output at all and unfortunately also the serial >> output on the debug probe does not show U-boot popping up at all. >> Interestingly, using the patched u-boot.bin with a RaspberryPi4 still works >> and it boots up perfectly fine, but not with the RaspberryPi5 I have here. >> >> Any idea why this might be the case here while you report that the above >> mentioned procedure works for you? In fact, the RaspberryPi5 I have here is >> a 8GB model and with the rpi-eeprom version from 2024/01/05 [1] in case this >> might be relevant. > > EEPROM version on mine device is older[1], but I suspect that size of > the RAM is what make a difference, mine have only 4GB of RAM. This can be also of course the reason why it works for you while it doesn’t for me. > I am afraid you will have to connect that UART debug cable and share > what is the memory map on your device :-) No problem. Here is the output of the RPI bootloader boot up until the system stalls: — cut here — RPi: BOOTSYS release VERSION:30cc5f37 DATE: 2024/01/05 TIME: 15:57:40 BOOTMODE: 0x06 partition 0 build-ts BUILD_TIMESTAMP=1704470260 serial 9127ae99 boardrev d04170 stc 923866 AON_RESET: 0003 PM_RSTS 1000 RP1_BOOT chip ID: 0x20001927 PM_RSTS: 0x1000 part reset_info PMIC reset-event rtc alarm enabled 0 uSD voltage 3.3V Initialising SDRAM 'Micron' 32Gb x2 total-size: 64 Gbit 4267 DDR 4267 1 0 64 152 RP1_BOOT chip ID: 0x20001927 RP1_BOOT chip ID: 0x20001927 RP1_BOOT: fw size 25968 PCI2 init PCI2 reset PCIe scan 1de4:0001 RP1_CHIP_INFO 20001927 RPi: BOOTLOADER release VERSION:30cc5f37 DATE: 2024/01/05 TIME: 15:57:40 BOOTMODE: 0x06 partition 0 build-ts BUILD_TIMESTAMP=1704470260 serial 9127ae99 boardrev d04170 stc 3892985 AON_RESET: 0003 PM_RSTS 1000 M.2 PCIe HAT not detected. usb_pd_init status 3 USB_PD CONFIG 0 41 Boot mode: SD (01) order f4 SD HOST: 2 CTL0: 0x0080 BUS: 40 Hz actual: 390625 HZ div: 512 (256) status: 0x1fff delay: 276 SD HOST: 2 CTL0: 0x00800f00 BUS: 40 Hz actual: 390625 HZ div: 512 (256) status: 0x1fff delay: 276 OCR c0ff8000 [291] CID: 00035344534536344780519441cb0123 CSD: 400e00325b590001dbd37f800a404000 SD: bus-width: 4 spec: 2 SCR: 0x02458443 0x SD HOST: 2 CTL0: 0x00800f04 BUS: 5000 Hz actual: 5000 HZ div: 4 (2) status: 0x1fff delay: 2 MBR: 0x2000, 131072 type: 0x0c MBR: 0x00022000, 1024000 type: 0x82 MBR: 0x0011c000,123572224 type: 0x83 MBR: 0x, 0 type: 0x00 USB-PD: src-cap PDO object1 0x0a0191f4 Current 5000 mA Voltage 5000 mV USB-PD: src-cap PDO object2 0x0002d12c Current 3000 mA Voltage 9000 mV USB-PD: src-cap PDO object3 0x0003c0e1 Current 2250 mA Voltage 12000 mV USB-PD: src-cap PDO object4 0x0004b0b4 Current 1800 mA Voltage 15000 mV Trying partition: 0 type: 16 lba: 8192 'mkfs.fat' ' V ^ ' clusters 32695 (4) rsc 4 fat-sectors 128 root dir cluster 1 sectors 32 entries 512 FAT16 clusters 32695 [sdcard] autoboot.txt not found Select partition rsts 0 C(boot_partition) 0 EEPROM config 0 result 0 Trying partition: 0 type: 16 lba: 8192 'mkfs.fat' ' V ^ ' clusters 32695 (4) rsc 4 fat-sectors 128 root dir cluster 1 sectors 32 entries 512 FAT16 clusters 32695 Read config.txt bytes 3046 hnd 0x123c Read ubootconfig.txt bytes 35 hnd 0x468 [sdcard] extraconfig.txt not found [sdcard] pieeprom.upd not found usb_max_current_enable default 0 max-current 5000 Read bcm2712-rpi-5-b.dtb bytes79357 hnd 0x139f dt-match: compatible: raspberrypi,5-model-b match: brcm,bcm2712 dt-match: compatible: brcm,bcm2712 match: brcm,bcm2712 NOTICE: BL31: v2.6(release):v2.6-239-g2a9ede0bd NOTICE: BL31: Built : 14:26:57, Jun 22 2023 — cut here — Best Regards, Jens -- Jens Maus, Dresden/Germany http://jens-maus.de/
[PATCH] docker: Add tools/buildman/requirements.txt to the cache
As we have had this file for a while now, we should include installing and populating our pip cache from here as well. Signed-off-by: Tom Rini --- tools/docker/Dockerfile | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/tools/docker/Dockerfile b/tools/docker/Dockerfile index 0e2dd0a6a946..6122776bc64d 100644 --- a/tools/docker/Dockerfile +++ b/tools/docker/Dockerfile @@ -240,12 +240,14 @@ USER uboot:uboot # COPY / ADD directives don't work as we need them to. RUN wget -O /tmp/pytest-requirements.txt https://source.denx.de/u-boot/u-boot/-/raw/master/test/py/requirements.txt RUN wget -O /tmp/sphinx-requirements.txt https://source.denx.de/u-boot/u-boot/-/raw/master/doc/sphinx/requirements.txt +RUN wget -O /tmp/buildman-requirements.txt https://source.denx.de/u-boot/u-boot/-/raw/master/tools/buildman/requirements.txt RUN virtualenv -p /usr/bin/python3 /tmp/venv && \ . /tmp/venv/bin/activate && \ pip install -r /tmp/pytest-requirements.txt \ - -r /tmp/sphinx-requirements.txt && \ + -r /tmp/sphinx-requirements.txt \ + -r /tmp/buildman-requirements.txt && \ deactivate && \ - rm -rf /tmp/venv /tmp/pytest-requirements.txt /tmp/sphinx-requirements.txt + rm -rf /tmp/venv /tmp/*-requirements.txt # Create the buildman config file RUN /bin/echo -e "[toolchain]\nroot = /usr" > ~/.buildman -- 2.34.1
[PATCH v2] configs: Transpeed 8K618-T: Add Transpeed 8K618-T board support
This is a Chinese TV box based on Allwinner H618 SoC. The DRAM parameters were derived from the values found in a firmware update. Signed-off-by: Nick Alilovic --- This defconfig relies on the synced sun50i-h618-transpeed-8k618-t.dts file. configs/transpeed-8k618-t_defconfig | 27 +++ 1 file changed, 27 insertions(+) create mode 100644 configs/transpeed-8k618-t_defconfig diff --git a/configs/transpeed-8k618-t_defconfig b/configs/transpeed-8k618-t_defconfig new file mode 100644 index 00..020d3974af --- /dev/null +++ b/configs/transpeed-8k618-t_defconfig @@ -0,0 +1,27 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h618-transpeed-8k618-t" +CONFIG_SPL=y +CONFIG_DRAM_SUN50I_H616_DX_ODT=0x03030303 +CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e +CONFIG_DRAM_SUN50I_H616_CA_DRI=0x1f12 +CONFIG_DRAM_SUN50I_H616_TPR0=0xc0001002 +CONFIG_DRAM_SUN50I_H616_TPR10=0x2f1107 +CONFIG_DRAM_SUN50I_H616_TPR11=0x +CONFIG_DRAM_SUN50I_H616_TPR12=0xeddc7665 +CONFIG_MACH_SUN50I_H616=y +CONFIG_SUNXI_DRAM_H616_DDR3_1333=y +CONFIG_DRAM_CLK=648 +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_R_I2C_ENABLE=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_I2C=y +CONFIG_SPL_SYS_I2C_LEGACY=y +CONFIG_SYS_I2C_MVTWSI=y +CONFIG_SYS_I2C_SLAVE=0x7f +CONFIG_SYS_I2C_SPEED=40 +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_AXP313_POWER=y +CONFIG_AXP_DCDC3_VOLT=1360 +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y -- 2.34.1
Re: [PATCH RFC 0/6] video: Add UTF-8 support for UEFI applications
On 1/17/24 23:24, Janne Grunau via B4 Relay wrote: Andre submitted 2 years ago DM_VIDEO improvements for UEFI applications using UEFI's EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL but did not follow with suggested changes. This series takes care of the UTF-8 support which required to draw symbol and box drawing characters used by UEFI applications like grub2 and sd-boot correctly. Compared to Andre's version this version has the following changes: - use and extend existing conversion functions from lib/charset.c - convert first to UTF-32 to support the truetype console as well - conversion is conditional on CONFIG_EFI_LOADER - use escape sequences in tests as proposed by Heinrich Hello Janne, to correctly render GRUB I think you need the following: * Use truetype * Add a mono-spaced Truetype font which has all the needed characters. * A bunch of code fixed. This is the font I once suggested. [PATCH v2 1/1] video: add DejaVu Mono font https://lore.kernel.org/u-boot/20210301181534.7618-1-xypron.g...@gmx.de/ Which font have you been using for testing? At the time these additional patches were needed. [PATCH 0/6] efi_loader: Unicode output in UEFI applications https://lore.kernel.org/u-boot/20210227130840.166193-1-xypron.g...@gmx.de/#r Best regards Heinrich Link: https://lore.kernel.org/u-boot/20220110005638.21599-1-andre.przyw...@arm.com/ Signed-off-by: Janne Grunau --- Andre Przywara (2): efi_selftest: Add international characters test efi_selftest: Add box drawing character selftest Janne Grunau (4): lib: charset: Fix utf8_to_utf32_stream() return value doc string video: console: Parse UTF-8 character sequences lib/charset: Map cp437 low chars (0x01 - 0x1f) from unicode efi_selftest: Add symbol character selftest drivers/video/console_normal.c | 6 +++-- drivers/video/console_rotate.c | 16 +- drivers/video/console_truetype.c | 8 +++ drivers/video/vidconsole-uclass.c | 18 ++- drivers/video/vidconsole_internal.h| 15 + include/charset.h | 4 ++-- include/cp1250.h | 12 -- include/cp437.h| 12 -- include/video_console.h| 10 + lib/charset.c | 9 +--- lib/efi_loader/efi_unicode_collation.c | 2 +- lib/efi_selftest/efi_selftest_textoutput.c | 35 ++ 12 files changed, 116 insertions(+), 31 deletions(-) --- base-commit: 866ca972d6c3cabeaf6dbac431e8e08bb30b3c8e change-id: 20240117-vidconsole-utf8-uefi-fa23b4ac65d6 Best regards,
Re: [PATCH v1 4/4] board: verdin-am62: set cpu core voltage depending on speed grade
On Thu, Jan 18, 2024 at 10:50:07AM +0100, Max Krummenacher wrote:
> On Wed, Jan 17, 2024 at 11:16:49AM +0100, Max Krummenacher wrote:
> > From: Max Krummenacher
> >
> > Speed grade T requires the VDD_CORE voltage to be 0.85V if using
> > the maximum core frequency.
> >
> > Speed grades G, K, S allow the VDD_CORE voltage to be 0.75V up to the
> > maximum core frequency but allow to run at 0.85V.
> >
> > For efficiency in manufacturing and code maintenance we use 0.85V for
> > the PMIC defaults and device tree settings and dynamically adjust the
> > voltage in the PMIC and device tree to 0.75V for lower speed SKU to
> > gain more than 100mW power consumption reduction.
> >
> > Signed-off-by: Max Krummenacher
> > ---
> >
> > board/toradex/verdin-am62/verdin-am62.c | 47 +
> > 1 file changed, 47 insertions(+)
> >
> > diff --git a/board/toradex/verdin-am62/verdin-am62.c
> > b/board/toradex/verdin-am62/verdin-am62.c
> > index 4e912b5f32f..8b9db224069 100644
> > --- a/board/toradex/verdin-am62/verdin-am62.c
> > +++ b/board/toradex/verdin-am62/verdin-am62.c
> > @@ -13,10 +13,13 @@
> > #include
> > #include
> > #include
> > +#include
>
> In the !DM_REGULATOR case regulator.h assumes errno.h to be already included.
> This happens when compiling the R5 SPL.
>
> Will fix this in a v2 of the series.
Actually we can go on with the series. While it is true that errno.h is not
included in regulator.h, the required header is included and its definitions
available.
I will create a separate patch which cleans up the headers, so that they
become self contained.
Max
>
> Max
>
> > #include
> >
> > #include "../common/tdx-cfg-block.h"
> >
> > +#define VDD_CORE_REG "buck1"
> > +
> > DECLARE_GLOBAL_DATA_PTR;
> >
> > int board_init(void)
> > @@ -49,9 +52,37 @@ int board_fit_config_name_match(const char *name)
> > }
> > #endif
> >
> > +static u32 get_vdd_core_nominal(void)
> > +{
> > + int core_uvolt;
> > +
> > + switch (k3_get_speed_grade()) {
> > + case 'G':
> > + case 'K':
> > + case 'S':
> > + core_uvolt = 75;
> > + break;
> > + case 'T':
> > + default:
> > + core_uvolt = 85;
> > + break;
> > + }
> > + return core_uvolt;
> > +}
> > +
> > #if IS_ENABLED(CONFIG_OF_LIBFDT) && IS_ENABLED(CONFIG_OF_BOARD_SETUP)
> > int ft_board_setup(void *blob, struct bd_info *bd)
> > {
> > + int core_uvolt;
> > +
> > + core_uvolt = get_vdd_core_nominal();
> > + if (core_uvolt != 85) {
> > + do_fixup_by_path_u32(blob,
> > "/bus@f/i2c@2000/pmic@30/regulators/buck1",
> > +"regulator-max-microvolt", core_uvolt, 0);
> > + do_fixup_by_path_u32(blob,
> > "/bus@f/i2c@2000/pmic@30/regulators/buck1",
> > +"regulator-min-microvolt", core_uvolt, 0);
> > + }
> > +
> > return ft_common_board_setup(blob, bd);
> > }
> > #endif
> > @@ -86,6 +117,22 @@ static void select_dt_from_module_version(void)
> >
> > int board_late_init(void)
> > {
> > + int ret;
> > + int core_uvolt;
> > + struct udevice *dev = NULL;
> > +
> > + core_uvolt = get_vdd_core_nominal();
> > + if (core_uvolt != 85) {
> > + /* Set CPU core voltage to 0.75V for slower speed grades */
> > + ret = regulator_get_by_devname(VDD_CORE_REG, &dev);
> > + if (ret)
> > + pr_err("VDD CORE Regulator get error: %d\n", ret);
> > +
> > + ret = regulator_set_value_force(dev, core_uvolt);
> > + if (ret)
> > + pr_err("VDD CORE Regulator value setting error: %d\n",
> > ret);
> > + }
> > +
> > select_dt_from_module_version();
> >
> > return 0;
> > --
> > 2.42.0
> >
Re: [PATCH v4 0/6] board: siemens: clean up subfolders
On Wed, Jan 03, 2024 at 02:31:48PM +0100, Enrico Leto wrote: > This serie depends on the serie: > [PATCH 0/6] siemens,am335x: clean up the draco board family Is this not applied already? If not, where is it? Can you please repost it? > > The common folder was initialially created for the common parts of > the products based on draco-am355x board family. We have the > product lines 'pxm2', 'rut' and the base line unfortunately named > 'draco'! Adding the new capricorn-imx8 board family, the files > were enhanced without cleanup. > > Simplify first EEPROM probe and access that implements both i2c > with & without driver model. Use abstraction functions for this. > > Move all am355x specifics to a new file 'board_am335x'. > > Clean-up includes, config checks, maintainer. > > Signed-off-by: Enrico Leto The problem is that I see: > --- >rm: + draco-etamin +(draco-etamin) board/siemens/draco/../common/board.c: In function 'board_init': +(draco-etamin) board/siemens/draco/../common/board.c:88:9: error: implicit declaration of function 'board_nand_cs_init' [-Werror=implicit-function-declaration] +(draco-etamin)88 | board_nand_cs_init(); +(draco-etamin) | ^~ +(draco-etamin) cc1: all warnings being treated as errors +(draco-etamin) make[2]: *** [scripts/Makefile.build:257: board/siemens/draco/../common/board.o] Error 1 +(draco-etamin) make[1]: *** [Makefile:1859: board/siemens/draco] Error 2 +(draco-etamin) make: *** [Makefile:177: sub-make] Error 2 aarch64: + deneb +(deneb) WARNING 'ahab-container.img' not found, resulting binary is not-functional +(deneb) aarch64-linux-ld.bfd: board/siemens/capricorn/../common/factoryset.o: in function `factoryset_read_eeprom': +(deneb) board/siemens/capricorn/../common/factoryset.c:149:(.text.factoryset_read_eeprom+0x2c): undefined reference to `siemens_ee_read_data' +(deneb) aarch64-linux-ld.bfd: board/siemens/capricorn/../common/factoryset.c:177:(.text.factoryset_read_eeprom+0xb4): undefined reference to `siemens_ee_read_data' +(deneb) aarch64-linux-ld.bfd: board/siemens/capricorn/../common/factoryset.c:172:(.text.factoryset_read_eeprom+0x264): undefined reference to `siemens_ee_read_data' +(deneb) make[1]: *** [Makefile:1766: u-boot] Error 139 +(deneb) make[1]: *** Deleting file 'u-boot' +(deneb) make: *** [Makefile:177: sub-make] Error 2 aarch64: + giedi +(giedi) WARNING 'ahab-container.img' not found, resulting binary is not-functional +(giedi) aarch64-linux-ld.bfd: board/siemens/capricorn/../common/factoryset.o: in function `factoryset_read_eeprom': +(giedi) board/siemens/capricorn/../common/factoryset.c:149:(.text.factoryset_read_eeprom+0x2c): undefined reference to `siemens_ee_read_data' +(giedi) aarch64-linux-ld.bfd: board/siemens/capricorn/../common/factoryset.c:177:(.text.factoryset_read_eeprom+0xb4): undefined reference to `siemens_ee_read_data' +(giedi) aarch64-linux-ld.bfd: board/siemens/capricorn/../common/factoryset.c:172:(.text.factoryset_read_eeprom+0x264): undefined reference to `siemens_ee_read_data' +(giedi) make[1]: *** [Makefile:1766: u-boot] Error 139 +(giedi) make[1]: *** Deleting file 'u-boot' +(giedi) make: *** [Makefile:177: sub-make] Error 2 When building. -- Tom signature.asc Description: PGP signature
Re: [PATCH v2] boot: add support for button commands
On 2024-01-18 16:11, Michael Walle wrote: Using CONFIG_EXTRA_ENV_SETTINGS should be good enough to provide the fallback defaults. However, the users can still mess the things up, but again, they can do that already in many places. I disagree. In my case that is a last resort recovery. And it should work in any case. Even if the user has messed up anything (except from erasing the bootloader in the SPI flash ;)). Maybe the solution could be another compile-time option to "lock down" the built-in defaults provided through CONFIG_EXTRA_ENV_SETTINGS? If that new option is selected, changes to the environment would make no changes to the built-in defaults, i.e. those parts of the environment would actually be ignored. Not sure locking down the whole environment is a good idea. Not the entire environment, just the default button-command associations supplied through CONFIG_EXTRA_ENV_SETTINGS. I'm sorry if I didn't write it clearly before. In summary, the registered (compiled-in) command should always take precedence. If one wants to supply a default command which can be changed later, that can go via the (compiled-in) default environment. Sorry, this is a bit confusing to me. Didn't you write above that the users should be able to change the associated commands through the environment variables? I had two kinds of button commands in mind: immutable ones and mutable ones. The first can be achieved with compiled-in commands, the second with a default environment and environment variables. Also, whether a command is a mutable one or not is the decision of the developer (or the one who's compiling/configuring u-boot), not the user. I believe that the additional compile-time option, which I proposed above, could be extended to specify which of the built-in default button-command associations are immutable, and which are allowed to be modified through the environment variables. IIRC there is already a mechanism for that. Environment hooks or something like that. But I'm not sure that has other implications and qualify as simple and lightweight for this use-case. Anyway, we digress. I just wanted to make you aware of another use-case, which btw. is already done today in the lsxl board for example.
Re: [PATCH v2] boot: add support for button commands
Using CONFIG_EXTRA_ENV_SETTINGS should be good enough to provide the fallback defaults. However, the users can still mess the things up, but again, they can do that already in many places. I disagree. In my case that is a last resort recovery. And it should work in any case. Even if the user has messed up anything (except from erasing the bootloader in the SPI flash ;)). Maybe the solution could be another compile-time option to "lock down" the built-in defaults provided through CONFIG_EXTRA_ENV_SETTINGS? If that new option is selected, changes to the environment would make no changes to the built-in defaults, i.e. those parts of the environment would actually be ignored. Not sure locking down the whole environment is a good idea. In summary, the registered (compiled-in) command should always take precedence. If one wants to supply a default command which can be changed later, that can go via the (compiled-in) default environment. Sorry, this is a bit confusing to me. Didn't you write above that the users should be able to change the associated commands through the environment variables? I had two kinds of button commands in mind: immutable ones and mutable ones. The first can be achieved with compiled-in commands, the second with a default environment and environment variables. Also, whether a command is a mutable one or not is the decision of the developer (or the one who's compiling/configuring u-boot), not the user. I believe that the additional compile-time option, which I proposed above, could be extended to specify which of the built-in default button-command associations are immutable, and which are allowed to be modified through the environment variables. IIRC there is already a mechanism for that. Environment hooks or something like that. But I'm not sure that has other implications and qualify as simple and lightweight for this use-case. Anyway, we digress. I just wanted to make you aware of another use-case, which btw. is already done today in the lsxl board for example. -michael
[PATCH 2/2] arm: imx: imx8m: Enable the SError exception
From: Ye Li
To work with commit 2f3c92060dcd ("imx8m: workaround ROM serror")
we need to enable the SError exception and install vector in SPL.
Signed-off-by: Ye Li
Reviewed-by: Peng Fan
Reported-by: Thomas Schaefer
Reviewed-by: Fabio Estevam
Signed-off-by: Fabio Estevam
---
arch/arm/mach-imx/imx8m/Kconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index 328c3e388051..eb0488a9e8bf 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -13,14 +13,17 @@ config IMX8MQ
bool
select IMX8M
select CLK_IMX8MQ
+ select ARMV8_SPL_EXCEPTION_VECTORS
config IMX8MM
bool
select IMX8M
+ select ARMV8_SPL_EXCEPTION_VECTORS
config IMX8MN
bool
select IMX8M
+ select ARMV8_SPL_EXCEPTION_VECTORS
config IMX8MP
bool
--
2.34.1
[PATCH 1/2] imx8m: Enable LTO by default
From: Fabio Estevam In an attempt to select ARMV8_SPL_EXCEPTION_VECTORS, the SPL size could not fit into the internal SRAM of some imx8m targets: aarch64: + imx8mm_phg +aarch64-linux-ld.bfd: u-boot-spl section `__u_boot_list' will not fit in region `.sram' +aarch64-linux-ld.bfd: region `.sram' overflowed by 1824 bytes Select LTO to prevent that. Signed-off-by: Fabio Estevam --- arch/arm/mach-imx/imx8m/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig index b1937198402f..328c3e388051 100644 --- a/arch/arm/mach-imx/imx8m/Kconfig +++ b/arch/arm/mach-imx/imx8m/Kconfig @@ -5,6 +5,7 @@ config IMX8M select BINMAN select GICV3 if ARMV8_PSCI select HAS_CAAM + select LTO select ROM_UNIFIED_SECTIONS select ARMV8_CRYPTO -- 2.34.1
Re: [PATCH V4 3/7] rockchip: boot_mode: Allow rockchip_dnl_key_pressed() in SPL
On Thu, Jan 18, 2024 at 03:20:52PM +0800, Kever Yang wrote:
> Hi Chris,
>
> On 2024/1/2 23:46, Chris Morgan wrote:
> > From: Chris Morgan
> >
> > Update the rockchip_dnl_key_pressed() so that it can run in
> > SPL. Also change the ADC channel to a define that can be
> > overridden by a board specific option.
>
> I should ask this earlier.
>
> Why you have to enable the download key in SPL?
>
> This works for a long time in U-Boot proper, both mainline and downstream
> vendor U-Boot,
>
> no one is detect this download key in SPL.
>
> In theory the SPL can implement all the feature which is available in U-Boot
> proper,
>
> but it would be better to make the SPL focus on the job it should be done
> and keep as small as possible.
>
I wanted this code to run as soon as possible in the event of a bad
write. I have some devices which lack a way to bypass the eMMC in the
boot path; the fear is that if an SPL stage is written with a good
header but a bad payload (or if the A-TF does something wrong) the
device will become unbootable. If we can't do it this way for
all Rockchip boards that's fine, but I REALLY want to at least do
it this way for the Powkiddy X55 board and the Anbernic RGxx3 board.
While I have you, I have a related question I hope you can help with.
Is there any way to utilize the boot partitions of an eMMC device? I
don't know if the BROM of an RK3568 or RK3588 is capable, but I'd love
to have the SPL and U-Boot stages written to the eMMC boot partitions
instead of the user partition if I can.
Thank you.
>
> Thanks,
>
> - Kever
>
> >
> > Signed-off-by: Chris Morgan
> > ---
> > arch/arm/mach-rockchip/Makefile| 4 ++--
> > arch/arm/mach-rockchip/boot_mode.c | 11 ++-
> > 2 files changed, 12 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/arm/mach-rockchip/Makefile
> > b/arch/arm/mach-rockchip/Makefile
> > index 1dc92066bb..ff089ae949 100644
> > --- a/arch/arm/mach-rockchip/Makefile
> > +++ b/arch/arm/mach-rockchip/Makefile
> > @@ -15,13 +15,13 @@ obj-tpl-$(CONFIG_ROCKCHIP_PX30) += px30-board-tpl.o
> > obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
> > -ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
> > -
> > # Always include boot_mode.o, as we bypass it (i.e. turn it off)
> > # inside of boot_mode.c when CONFIG_ROCKCHIP_BOOT_MODE_REG is 0. This
> > way,
> > # we can have the preprocessor correctly recognise both 0x0 and 0
> > # meaning "turn it off".
> > obj-y += boot_mode.o
> > +
> > +ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
> > obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o
> > obj-$(CONFIG_MISC_INIT_R) += misc.o
> > endif
> > diff --git a/arch/arm/mach-rockchip/boot_mode.c
> > b/arch/arm/mach-rockchip/boot_mode.c
> > index eb8f65ae4e..d2308768be 100644
> > --- a/arch/arm/mach-rockchip/boot_mode.c
> > +++ b/arch/arm/mach-rockchip/boot_mode.c
> > @@ -38,6 +38,10 @@ void set_back_to_bootrom_dnl_flag(void)
> > #define KEY_DOWN_MIN_VAL 0
> > #define KEY_DOWN_MAX_VAL 30
> > +#ifndef RK_DNL_ADC_CHAN
> > +#define RK_DNL_ADC_CHAN1
> > +#endif
> > +
> > __weak int rockchip_dnl_key_pressed(void)
> > {
> > unsigned int val;
> > @@ -52,7 +56,8 @@ __weak int rockchip_dnl_key_pressed(void)
> > ret = -ENODEV;
> > uclass_foreach_dev(dev, uc) {
> > if (!strncmp(dev->name, "saradc", 6)) {
> > - ret = adc_channel_single_shot(dev->name, 1, &val);
> > + ret = adc_channel_single_shot(dev->name,
> > + RK_DNL_ADC_CHAN, &val);
> > break;
> > }
> > }
> > @@ -73,11 +78,13 @@ __weak int rockchip_dnl_key_pressed(void)
> > void rockchip_dnl_mode_check(void)
> > {
> > +#if CONFIG_IS_ENABLED(ADC)
> > if (rockchip_dnl_key_pressed()) {
> > printf("download key pressed, entering download mode...");
> > set_back_to_bootrom_dnl_flag();
> > do_reset(NULL, 0, 0, NULL);
> > }
> > +#endif
> > }
> > int setup_boot_mode(void)
> > @@ -90,6 +97,7 @@ int setup_boot_mode(void)
> > boot_mode = readl(reg);
> > debug("%s: boot mode 0x%08x\n", __func__, boot_mode);
> > +#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
> > /* Clear boot mode */
> > writel(BOOT_NORMAL, reg);
> > @@ -103,6 +111,7 @@ int setup_boot_mode(void)
> > env_set("preboot", "setenv preboot; ums mmc 0");
> > break;
> > }
> > +#endif
> > return 0;
> > }
Re: [PATCH V2] board: rockchip: add Powkiddy X55
On Thu, Jan 18, 2024 at 02:37:04PM +0800, Kever Yang wrote:
> Hi Chris,
>
> On 2023/12/15 02:24, Chris Morgan wrote:
> > From: Chris Morgan
> >
> > The Powkiddy X55 is a Rockchip RK3566 based handheld gaming device.
> > UART, ADC, eMMC, and SDMMC are tested to work in U-Boot and this
> > successfully boots mainline Linux.
> Pls add info about where is the main dts from.
The main DTS is from mainline Linux; I'll include that in the notes for
the next revision, and move the changelog to below the dashes.
Thank you.
> >
> > Changes since V1:
> This info should not be part of the commit message.
> > - Built on top of this patch series [1] which makes the ADC detect
> > function more generic and also moves the board_rng_seed to a more
> > generic location.
> > - Updated U-Boot specific devicetree to drop redundant values and
> > add nodes required for ADC detection in SPL.
> > - Updated defconfig to add additional options for SPL ADC detection
> > logic as well as drop some drivers that are not needed. Note that
> > CONFIG_DM_PMIC_FAN53555 is used by the tcs,tcs4525 regulator on
> > i2c0 at 0x1c. Additionally the code fails to compile without
> > selecting CONFIG_SPL_ROCKCHIP_BACK_TO_BROM.
> >
> > [1]
> > https://lore.kernel.org/u-boot/20231211232125.171438-1-macroalph...@gmail.com/
> >
> > Signed-off-by: Chris Morgan
> > ---
> > arch/arm/dts/Makefile| 1 +
> > arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi | 67 ++
> > arch/arm/dts/rk3566-powkiddy-x55.dts | 926 +++
> > arch/arm/mach-rockchip/rk3568/Kconfig| 6 +
> > board/powkiddy/x55/Kconfig | 15 +
> > board/powkiddy/x55/MAINTAINERS | 9 +
> > board/powkiddy/x55/Makefile | 6 +
> > board/powkiddy/x55/x55.c | 42 +
> > configs/powkiddy-x55-rk3566_defconfig| 92 ++
> > doc/board/index.rst | 1 +
> > doc/board/powkiddy/index.rst | 9 +
> > doc/board/powkiddy/x55.rst | 25 +
> > doc/board/rockchip/rockchip.rst | 1 +
> > include/configs/powkiddy-x55-rk3566.h| 14 +
> > 14 files changed, 1214 insertions(+)
> > create mode 100644 arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi
> > create mode 100644 arch/arm/dts/rk3566-powkiddy-x55.dts
> > create mode 100644 board/powkiddy/x55/Kconfig
> > create mode 100644 board/powkiddy/x55/MAINTAINERS
> > create mode 100644 board/powkiddy/x55/Makefile
> > create mode 100644 board/powkiddy/x55/x55.c
> > create mode 100644 configs/powkiddy-x55-rk3566_defconfig
> > create mode 100644 doc/board/powkiddy/index.rst
> > create mode 100644 doc/board/powkiddy/x55.rst
> > create mode 100644 include/configs/powkiddy-x55-rk3566.h
> >
> > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> > index 5fc888680b..6e5cb7c3e9 100644
> > --- a/arch/arm/dts/Makefile
> > +++ b/arch/arm/dts/Makefile
> > @@ -172,6 +172,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
> > dtb-$(CONFIG_ROCKCHIP_RK3568) += \
> > rk3566-anbernic-rgxx3.dtb \
> > + rk3566-powkiddy-x55.dtb \
> > rk3566-quartz64-a.dtb \
> > rk3566-quartz64-b.dtb \
> > rk3566-radxa-cm3-io.dtb \
> > diff --git a/arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi
> > b/arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi
> > new file mode 100644
> > index 00..1a3089b598
> > --- /dev/null
> > +++ b/arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi
> > @@ -0,0 +1,67 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +
> > +#include "rk356x-u-boot.dtsi"
> > +
> > +/ {
> > + chosen {
> > + stdout-path = &uart2;
> > + };
> > +
> > + rng: rng@fe388000 {
> > + compatible = "rockchip,cryptov2-rng";
> > + reg = <0x0 0xfe388000 0x0 0x2000>;
> > + status = "okay";
> > + };
> > +};
> > +
> > +&cru {
> > + assigned-clocks =
> > + <&pmucru CLK_RTC_32K>, <&pmucru PLL_PPLL>,
> > + <&pmucru PCLK_PMU>, <&cru PLL_CPLL>,
> > + <&cru PLL_GPLL>, <&cru PLL_VPLL>,
> > + <&cru ACLK_BUS>, <&cru PCLK_BUS>,
> > + <&cru ACLK_TOP_HIGH>, <&cru ACLK_TOP_LOW>,
> > + <&cru HCLK_TOP>, <&cru PCLK_TOP>,
> > + <&cru ACLK_PERIMID>, <&cru HCLK_PERIMID>,
> > + <&cru CPLL_500M>, <&cru CPLL_333M>,
> > + <&cru CPLL_250M>, <&cru CPLL_125M>,
> > + <&cru CPLL_100M>, <&cru CPLL_62P5M>,
> > + <&cru CPLL_50M>, <&cru CPLL_25M>;
> > + assigned-clock-rates =
> > + <32768>, <2>,
> > + <1>, <10>,
> > + <12>, <12640>,
> > + <15000>, <1>,
> > + <5>, <4>,
> > + <15000>, <1>,
> > +
Fwd: New Defects reported by Coverity Scan for Das U-Boot
Here's the current set of new issues since I last ran Coverity. -- Forwarded message - From: Date: Thu, Jan 18, 2024 at 9:20 AM Subject: New Defects reported by Coverity Scan for Das U-Boot To: Hi, Please find the latest report on new defect(s) introduced to Das U-Boot found with Coverity Scan. 2 new defect(s) introduced to Das U-Boot found with Coverity Scan. 16 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 2 of 2 defect(s) ** CID 478334: Memory - corruptions (OVERRUN) *** CID 478334: Memory - corruptions (OVERRUN) /cmd/eficonfig.c: 534 in eficonfig_create_device_path() 528 p += fp_size; 529 *((struct efi_device_path *)p) = END; 530 531 dp = efi_dp_shorten(dp_volume); 532 if (!dp) 533 dp = dp_volume; >>> CID 478334: Memory - corruptions (OVERRUN) >>> Overrunning struct type efi_device_path of 4 bytes by passing it to a >>> function which accesses it at byte offset 5 using argument "fp->dp.length" >>> (which evaluates to 6). 534 dp = efi_dp_concat(dp, &fp->dp, false); 535 free(buf); 536 537 return dp; 538 } 539 ** CID 478333: Error handling issues (CHECKED_RETURN) /lib/efi_loader/efi_firmware.c: 413 in efi_firmware_set_fmp_state_var() *** CID 478333: Error handling issues (CHECKED_RETURN) /lib/efi_loader/efi_firmware.c: 413 in efi_firmware_set_fmp_state_var() 407 /* 408 * GetVariable may fail, EFI_NOT_FOUND is returned if FmpState 409 * variable has not been set yet. 410 * Ignore the error here since the correct FmpState variable 411 * is set later. 412 */ >>> CID 478333: Error handling issues (CHECKED_RETURN) >>> Calling "efi_get_variable_int" without checking return value (as is >>> done elsewhere 29 out of 33 times). 413 efi_get_variable_int(varname, image_type_id, NULL, &size, var_state, 414 NULL); 415 416 /* 417 * Only the fw_version is set here. 418 * lowest_supported_version in FmpState variable is ignored since -- Tom signature.asc Description: PGP signature
Re: [PATCH v2] boot: add support for button commands
On 2024-01-18 08:59, Michael Walle wrote: Using CONFIG_EXTRA_ENV_SETTINGS should be good enough to provide the fallback defaults. However, the users can still mess the things up, but again, they can do that already in many places. I disagree. In my case that is a last resort recovery. And it should work in any case. Even if the user has messed up anything (except from erasing the bootloader in the SPI flash ;)). Maybe the solution could be another compile-time option to "lock down" the built-in defaults provided through CONFIG_EXTRA_ENV_SETTINGS? If that new option is selected, changes to the environment would make no changes to the built-in defaults, i.e. those parts of the environment would actually be ignored. In summary, the registered (compiled-in) command should always take precedence. If one wants to supply a default command which can be changed later, that can go via the (compiled-in) default environment. Sorry, this is a bit confusing to me. Didn't you write above that the users should be able to change the associated commands through the environment variables? I had two kinds of button commands in mind: immutable ones and mutable ones. The first can be achieved with compiled-in commands, the second with a default environment and environment variables. Also, whether a command is a mutable one or not is the decision of the developer (or the one who's compiling/configuring u-boot), not the user. I believe that the additional compile-time option, which I proposed above, could be extended to specify which of the built-in default button-command associations are immutable, and which are allowed to be modified through the environment variables.
Re: [UBOOT PATCH v4] test/py: net: Add dhcp abort test
On 1/18/24 15:06, Tom Rini wrote:
On Thu, Jan 18, 2024 at 09:56:58AM +0100, neil.armstr...@linaro.org wrote:
Hi,
On 21/11/2023 14:02, Love Kumar wrote:
Abort the dhcp request in the middle by pressing ctrl + c on u-boot
prompt and validate the abort status.
Signed-off-by: Love Kumar
---
Changes in v2:
- Mark CMD_MII command dependency
Changes in v3:
- Skip the test if PHY device not present
Changes in v4:
- Setup the network configuration by running dhcp test at the end of
test
- Add option to skip the test if it is not desired or possible
---
test/py/tests/test_net.py | 57 +++
1 file changed, 57 insertions(+)
diff --git a/test/py/tests/test_net.py b/test/py/tests/test_net.py
index b2241ae6a482..e0749125fd53 100644
--- a/test/py/tests/test_net.py
+++ b/test/py/tests/test_net.py
@@ -7,6 +7,7 @@
import pytest
import u_boot_utils
import uuid
+import re
"""
Note: This test relies on boardenv_* containing configuration values to
define
@@ -30,6 +31,11 @@ env__net_uses_pci = True
# set to False.
env__net_dhcp_server = True
+# False or omitted if a DHCP server is attached to the network, and dhcp abort
+# case should be tested.
+# If DHCP abort testing is not possible or desired, set this variable to True.
+env__dhcp_abort_test_skip = True
+
# True if a DHCPv6 server is attached to the network, and should be tested.
# If DHCPv6 testing is not possible or desired, this variable may be omitted
or
# set to False.
@@ -115,6 +121,57 @@ def test_net_dhcp(u_boot_console):
global net_set_up
net_set_up = True
+@pytest.mark.buildconfigspec("cmd_dhcp")
+@pytest.mark.buildconfigspec("cmd_mii")
+def test_net_dhcp_abort(u_boot_console):
+"""Test the dhcp command by pressing ctrl+c in the middle of dhcp request
+
+The boardenv_* file may be used to enable/disable this test; see the
+comment at the beginning of this file.
+"""
+
+test_dhcp = u_boot_console.config.env.get("env__net_dhcp_server", False)
+if not test_dhcp:
+pytest.skip("No DHCP server available")
+
+if u_boot_console.config.env.get("env__dhcp_abort_test_skip", False):
+pytest.skip("DHCP abort test is not enabled!")
+
+u_boot_console.run_command("setenv autoload no")
+
+# Phy reset before running dhcp command
+output = u_boot_console.run_command("mii device")
+if not re.search(r"Current device: '(.+?)'", output):
+pytest.skip("PHY device does not exist!")
+eth_num = re.search(r"Current device: '(.+?)'", output).groups()[0]
+u_boot_console.run_command(f"mii device {eth_num}")
+output = u_boot_console.run_command("mii info")
+eth_addr = hex(int(re.search(r"PHY (.+?):", output).groups()[0], 16))
+u_boot_console.run_command(f"mii modify {eth_addr} 0 0x8000 0x8000")
+
+u_boot_console.run_command("dhcp", wait_for_prompt=False)
+try:
+u_boot_console.wait_for("Waiting for PHY auto negotiation to complete")
+except:
+pytest.skip("Timeout waiting for PHY auto negotiation to complete")
+
+u_boot_console.wait_for("done")
+
+# Sending Ctrl-C
+output = u_boot_console.run_command(
+chr(3), wait_for_echo=False, send_nl=False
+)
+
+assert "TIMEOUT" not in output
+assert "DHCP client bound to address " not in output
+assert "Abort" in output
+
+# Provide a time to recover from Abort - if it is not performed
+# There is message like: ethernet@ff0e: No link.
+u_boot_console.run_command("sleep 1")
+# Run the dhcp test to setup the network configuration
+test_net_dhcp(u_boot_console)
+
@pytest.mark.buildconfigspec('cmd_dhcp6')
def test_net_dhcp6(u_boot_console):
"""Test the dhcp6 command.
This test fails on the BPI-M2S and BPI-M5 boards:
Section: test_net_dhcp_abort
TIME: NOW: 2024/01/18 08:43:48.152149
TIME: SINCE-PREV: 0:00:00.000629
TIME: SINCE-START: 0:02:17.928462
Stream: console
=> setenv autoload no
=>
End stream: console
TIME: NOW: 2024/01/18 08:43:48.232597
TIME: SINCE-PREV: 0:00:00.080448
TIME: SINCE-START: 0:02:18.008910
Stream: console
=> mii device
MII devices: 'mdio' 'mdio@0'
Current device: 'mdio'
=>
End stream: console
TIME: NOW: 2024/01/18 08:43:48.277449
TIME: SINCE-PREV: 0:00:00.044852
TIME: SINCE-START: 0:02:18.053762
Stream: console
=> mii device mdio
=>
End stream: console
TIME: NOW: 2024/01/18 08:43:48.318273
TIME: SINCE-PREV: 0:00:00.040824
TIME: SINCE-START: 0:02:18.094586
Stream: console
=> mii info
PHY 0x00: OUI = 0x0732, Model = 0x11, Rev = 0x06, 100baseT, FDX
PHY 0x01: OUI = 0x0732, Model = 0x11, Rev = 0x06, 100baseT, FDX
=>
End stream: console
TIME: NOW: 2024/01/18 08:43:48.370420
TIME: SINCE-PREV: 0:00:00.052147
TIME: SINCE-START: 0:02:18.146733
Stream: console
=> mii modify 0x0 0 0x8000 0x8000
=>
End stream: console
TIME: NOW: 2024/01/18 08:43:48.451550
TIME: SINCE-PREV: 0:00:00.081130
TIME: SINCE-START: 0:02:18.227863
Stream: console
=> dhcp
End stream:
Re: [PATCH v13 00/24] Modernize U-Boot shell
On Thu, Jan 18, 2024 at 08:05:15AM +0100, Patrice CHOTARD wrote:
>
>
> On 1/17/24 18:39, Francesco Dolcini wrote:
> > On Thu, Jan 18, 2024 at 12:30:42AM +0700, Francis Laniel wrote:
> >> Le mercredi 17 janvier 2024, 17:05:28 +07 Patrice CHOTARD a écrit :
> >>> On 1/16/24 18:25, Francis Laniel wrote:
> Le mardi 16 janvier 2024, 00:34:24 +07 Patrice CHOTARD a écrit :
> > On 1/11/24 18:04, Francesco Dolcini wrote:
> >> On Fri, Dec 29, 2023 at 07:55:37PM +0100, Francis Laniel wrote:
> >>> Le jeudi 28 décembre 2023, 21:58:59 CET Tom Rini a écrit :
> On Fri, 22 Dec 2023 22:02:20 +0100, Francis Laniel wrote:
> > During 2021 summer, Sean Anderson wrote a contribution to add a new
> > shell,
> > based on LIL, to U-Boot [1, 2].
> > While one of the goals of this contribution was to address the fact
> > actual
> > U-Boot shell, which is based on Busybox hush, is old there was a
> > discussion
> > about adding a new shell versus updating the actual one [3, 4].
> >
> > So, in this series, with Harald Seiler, we updated the actual U-Boot
> > shell
> > to reflect what is currently in Busybox source code.
> > Basically, this contribution is about taking a snapshot of Busybox
> > shell/hush.c file (as it exists in commit 37460f5da) and adapt it to
> > suit
> > U-Boot needs.
> >
> > [...]
>
> Applied to u-boot/next, thanks!
> >>>
> >>> Thank you for the merge!
> >>> If there is any problem, do not hesitate to mail me and I will take
> >>> care
> >>> of
> >>> it!
> >>
> >> This change, specifically setting the modern hush shell as default, is
> >> breaking our boot script, just noticed since the current U-Boot master
> >> has a regression for us.
> >>
> >> We still need to figure out the exact details, here [1] you can find
> >> the
> >> boot script (that has some placeholder that is replaced during build).
> >>
> >> and the error is something like:
> >>
> >> ```
> >> ## Executing script at 9028
> >> Loading DeviceTree: k3-am625-verdin-nonwifi-dev.dtb
> >> 69025 bytes read in 11 ms (6 MiB/s)
> >> 82 bytes read in 9 ms (8.8 KiB/s)
> >> Working FDT set to 9020
> >> syntax error at 'done'HUSH died!
> >> resetting ...
> >> ```
> >>
> >> that I _assume_ comes from this line
> >>
> >> env set set_apply_overlays 'env set apply_overlays "for
> >> overlay_file
> >> in \\${fdt_overlays}; do echo Applying Overlay: \\${overlay_file}
> >> &&
> >> ${load_cmd} \\${loadaddr} \\${overlays_prefix}\\${overlay_file} &&
> >> fdt apply \\${loadaddr}; env set overlay_file; done; true"'>
> >>
> >> [1]
> >> https://git.toradex.com/cgit/meta-toradex-bsp-common.git/tree/recipes-bs
> >> p
> >> /u-boot/u-boot-distro-boot/boot.cmd.in
> >>
> >> Francesco
> >
> > Hi all
> >
> > I observed a similar issue with STM32MP157c-DK2 board.
> > Since commit 78912cfde281 ("cmd: Set modern hush as default shell")
> > U-Boot
> > crashes :
> >
> >
> > U-Boot 2024.01-00486-g697758e7c81-dirty (Jan 15 2024 - 18:23:52 +0100)
> >
> > CPU: STM32MP157CAC Rev.B
> > Model: STMicroelectronics STM32MP157C-DK2 Discovery Board
> > Board: stm32mp1 in trusted mode (st,stm32mp157c-dk2)
> > Board: MB1272 Var2.0 Rev.C-01
> > DRAM: 512 MiB
> > Clocks:
> > - MPU : 650 MHz
> > - MCU : 208.878 MHz
> > - AXI : 266.500 MHz
> > - PER : 24 MHz
> > - DDR : 533 MHz
> > optee optee: OP-TEE: revision 4.0 (e92de4ca)
> > I/TC: Reserved shared memory is disabled
> > I/TC: Dynamic shared memory is enabled
> > I/TC: Normal World virtualization support is disabled
> > I/TC: Asynchronous notifications are disabled
> > Core: 311 devices, 40 uclasses, devicetree: board
> > WDT: Started watchdog@5a002000 with servicing every 1000ms (32s
> > timeout)
> > NAND: 0 MiB
> > MMC: STM32 SD/MMC: 0
> > Loading Environment from MMC... OK
> > In:No input devices available!
> > Out: No output devices available!
> > Err: No error devices available!
> > Net: eth0: ethernet@5800a000
> > Hit any key to stop autoboot: 0
> > Boot over mmc0!
> > switch to partitions #0, OK
> > mmc0 is current device
> > Scanning mmc 0:8...
> > data abort
> > pc : [] lr : []
> > reloc pc : []lr : []
> > sp : dbafc848 ip : ddbfc578 fp : ddbedf18
> > r10: r9 : dbb15e70 r8 :
> > r7 : dbb5bf98 r6 : dbb5de10 r5 : dbb5bf98 r4 : ddbeda78
> > r3 : dbb5dc08 r2 : 33f8 r1 : 0071 r0 : ddbede00
> > Flags: nzcv IRQs off FIQs off Mode SVC_32 (T)
> > Code: 3138 1c48 f854 0030 (eb04) 05c1
> > Resett
Re: [UBOOT PATCH v4] test/py: net: Add dhcp abort test
On Thu, Jan 18, 2024 at 09:56:58AM +0100, neil.armstr...@linaro.org wrote:
> Hi,
>
> On 21/11/2023 14:02, Love Kumar wrote:
> > Abort the dhcp request in the middle by pressing ctrl + c on u-boot
> > prompt and validate the abort status.
> >
> > Signed-off-by: Love Kumar
> > ---
> > Changes in v2:
> > - Mark CMD_MII command dependency
> >
> > Changes in v3:
> > - Skip the test if PHY device not present
> >
> > Changes in v4:
> > - Setup the network configuration by running dhcp test at the end of
> > test
> > - Add option to skip the test if it is not desired or possible
> > ---
> > test/py/tests/test_net.py | 57 +++
> > 1 file changed, 57 insertions(+)
> >
> > diff --git a/test/py/tests/test_net.py b/test/py/tests/test_net.py
> > index b2241ae6a482..e0749125fd53 100644
> > --- a/test/py/tests/test_net.py
> > +++ b/test/py/tests/test_net.py
> > @@ -7,6 +7,7 @@
> > import pytest
> > import u_boot_utils
> > import uuid
> > +import re
> > """
> > Note: This test relies on boardenv_* containing configuration values to
> > define
> > @@ -30,6 +31,11 @@ env__net_uses_pci = True
> > # set to False.
> > env__net_dhcp_server = True
> > +# False or omitted if a DHCP server is attached to the network, and dhcp
> > abort
> > +# case should be tested.
> > +# If DHCP abort testing is not possible or desired, set this variable to
> > True.
> > +env__dhcp_abort_test_skip = True
> > +
> > # True if a DHCPv6 server is attached to the network, and should be
> > tested.
> > # If DHCPv6 testing is not possible or desired, this variable may be
> > omitted or
> > # set to False.
> > @@ -115,6 +121,57 @@ def test_net_dhcp(u_boot_console):
> > global net_set_up
> > net_set_up = True
> > +@pytest.mark.buildconfigspec("cmd_dhcp")
> > +@pytest.mark.buildconfigspec("cmd_mii")
> > +def test_net_dhcp_abort(u_boot_console):
> > +"""Test the dhcp command by pressing ctrl+c in the middle of dhcp
> > request
> > +
> > +The boardenv_* file may be used to enable/disable this test; see the
> > +comment at the beginning of this file.
> > +"""
> > +
> > +test_dhcp = u_boot_console.config.env.get("env__net_dhcp_server",
> > False)
> > +if not test_dhcp:
> > +pytest.skip("No DHCP server available")
> > +
> > +if u_boot_console.config.env.get("env__dhcp_abort_test_skip", False):
> > +pytest.skip("DHCP abort test is not enabled!")
> > +
> > +u_boot_console.run_command("setenv autoload no")
> > +
> > +# Phy reset before running dhcp command
> > +output = u_boot_console.run_command("mii device")
> > +if not re.search(r"Current device: '(.+?)'", output):
> > +pytest.skip("PHY device does not exist!")
> > +eth_num = re.search(r"Current device: '(.+?)'", output).groups()[0]
> > +u_boot_console.run_command(f"mii device {eth_num}")
> > +output = u_boot_console.run_command("mii info")
> > +eth_addr = hex(int(re.search(r"PHY (.+?):", output).groups()[0], 16))
> > +u_boot_console.run_command(f"mii modify {eth_addr} 0 0x8000 0x8000")
> > +
> > +u_boot_console.run_command("dhcp", wait_for_prompt=False)
> > +try:
> > +u_boot_console.wait_for("Waiting for PHY auto negotiation to
> > complete")
> > +except:
> > +pytest.skip("Timeout waiting for PHY auto negotiation to complete")
> > +
> > +u_boot_console.wait_for("done")
> > +
> > +# Sending Ctrl-C
> > +output = u_boot_console.run_command(
> > +chr(3), wait_for_echo=False, send_nl=False
> > +)
> > +
> > +assert "TIMEOUT" not in output
> > +assert "DHCP client bound to address " not in output
> > +assert "Abort" in output
> > +
> > +# Provide a time to recover from Abort - if it is not performed
> > +# There is message like: ethernet@ff0e: No link.
> > +u_boot_console.run_command("sleep 1")
> > +# Run the dhcp test to setup the network configuration
> > +test_net_dhcp(u_boot_console)
> > +
> > @pytest.mark.buildconfigspec('cmd_dhcp6')
> > def test_net_dhcp6(u_boot_console):
> > """Test the dhcp6 command.
>
> This test fails on the BPI-M2S and BPI-M5 boards:
>
> Section: test_net_dhcp_abort
> TIME: NOW: 2024/01/18 08:43:48.152149
> TIME: SINCE-PREV: 0:00:00.000629
> TIME: SINCE-START: 0:02:17.928462
> Stream: console
> => setenv autoload no
> =>
> End stream: console
> TIME: NOW: 2024/01/18 08:43:48.232597
> TIME: SINCE-PREV: 0:00:00.080448
> TIME: SINCE-START: 0:02:18.008910
> Stream: console
> => mii device
> MII devices: 'mdio' 'mdio@0'
> Current device: 'mdio'
> =>
> End stream: console
> TIME: NOW: 2024/01/18 08:43:48.277449
> TIME: SINCE-PREV: 0:00:00.044852
> TIME: SINCE-START: 0:02:18.053762
> Stream: console
> => mii device mdio
> =>
> End stream: console
> TIME: NOW: 2024/01/18 08:43:48.318273
> TIME: SINCE-PREV: 0:00:00.040824
> TIME: SINCE-START: 0:02:18.094586
> Stream: console
> => mii info
> PHY 0x00: OUI = 0x0732, Model =
Re: [PATCH] test: test_trace.py: Have trace-cmd report always use -l
On Wed, 17 Jan 2024 17:12:36 -0500, Tom Rini wrote: > With newer versions of trace-cmd the report subcommand will have > different output from before if we do or do not pass -l. However, with > the -l flag passed our put is consistent here. This updates our regular > expressions and comments for this as well now. > > Applied to u-boot/master, thanks! -- Tom
Re: [PATCH] test/py/requirements.txt: Update packaging requirement
On Wed, 17 Jan 2024 15:06:54 -0500, Tom Rini wrote: > Update packaging to be version 23.2 to match our Sphinx requirements. > This will let us build a pip cache out of both of our requirements.txt > files. > > Applied to u-boot/master, thanks! -- Tom
Re: [PATCH] CI: Move to latest Ubuntu "Jammy" tag
On Wed, 17 Jan 2024 15:04:50 -0500, Tom Rini wrote: > Move to the latest "Jammy" tag from Ubuntu. > > Applied to u-boot/master, thanks! -- Tom
Re: [PATCH 1/1] docker: build QEMU v8.2.0
On Fri, 12 Jan 2024 03:17:57 +0100, Heinrich Schuchardt wrote:
> ACPI support for RISC-V requires a recent QEMU.
>
> Upgrade the used QEMU to v8.2.0.
>
> QEMU commit 0c7ffc977195 ("hw/net: cadence_gem: Fix MDIO_OP_xxx values")
> is needed to fix the Ethernet PHY driver used by the emulated SiFive
> Unleashed Board emulation.
>
> [...]
Applied to u-boot/master, thanks!
--
Tom
Re: [PATCH RFC 1/6] lib: charset: Fix utf8_to_utf32_stream() return value doc string
On Wed, 17 Jan 2024 23:24:27 +0100 Janne Grunau via B4 Relay wrote: > From: Janne Grunau > > The comment appears to be copied from utf8_to_cp437_stream() but was not > updated. > > Signed-off-by: Janne Grunau Reviewed-by: Andre Przywara Cheers, Andre > --- > include/charset.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/charset.h b/include/charset.h > index 44034c71d3..714382e1c1 100644 > --- a/include/charset.h > +++ b/include/charset.h > @@ -328,7 +328,7 @@ int utf8_to_cp437_stream(u8 c, char *buffer); > * > * @c: next UTF-8 character to convert > * @buffer: buffer, at least 5 characters > - * Return: next codepage 437 character or 0 > + * Return: next Unicode code point or 0 > */ > int utf8_to_utf32_stream(u8 c, char *buffer); > >
Re: [PATCH RFC 2/6] video: console: Parse UTF-8 character sequences
On Wed, 17 Jan 2024 23:24:28 +0100
Janne Grunau via B4 Relay wrote:
Hi,
> From: Janne Grunau
>
> efi_console / UEFI applications (grub2, sd-boot, ...) pass UTF-8
> character sequences to vidconsole which results in wrong glyphs for code
> points outside of ASCII. The truetype console expects Unicode code
> points and bitmap font based consoles expect code page 437 code points.
> To support both convert UTF-8 to UTF-32 and pass Unicode code points in
> vidconsole_ops.putc_xy(). These can be used directly in console_truetype
> and after conversion to code page 437 in console_{normal,rotate}.
>
> This fixes rendering of international, symbol and box drawing characters
> used by UEFI applications.
>
> Signed-off-by: Janne Grunau
> ---
> drivers/video/console_normal.c | 6 --
> drivers/video/console_rotate.c | 16 ++--
> drivers/video/console_truetype.c| 8
> drivers/video/vidconsole-uclass.c | 18 +-
> drivers/video/vidconsole_internal.h | 15 +++
> include/video_console.h | 10 ++
> 6 files changed, 52 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c
> index a0231293f3..34ef5a5229 100644
> --- a/drivers/video/console_normal.c
> +++ b/drivers/video/console_normal.c
> @@ -7,6 +7,7 @@
> */
>
> #include
> +#include
> #include
> #include
> #include
> @@ -63,7 +64,7 @@ static int console_move_rows(struct udevice *dev, uint
> rowdst,
> return 0;
> }
>
> -static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, char ch)
> +static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, int cp)
> {
> struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev);
> struct udevice *vid = dev->parent;
> @@ -73,8 +74,9 @@ static int console_putc_xy(struct udevice *dev, uint
> x_frac, uint y, char ch)
> int pbytes = VNBYTES(vid_priv->bpix);
> int x, linenum, ret;
> void *start, *line;
> + u8 ch = console_utf_to_cp437(cp);
> uchar *pfont = fontdata->video_fontdata +
> - (u8)ch * fontdata->char_pixel_bytes;
> + ch * fontdata->char_pixel_bytes;
>
> if (x_frac + VID_TO_POS(vc_priv->x_charsize) > vc_priv->xsize_frac)
> return -EAGAIN;
> diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c
> index 65358a1c6e..e4303dfb36 100644
> --- a/drivers/video/console_rotate.c
> +++ b/drivers/video/console_rotate.c
> @@ -7,6 +7,7 @@
> */
>
> #include
> +#include
> #include
> #include
> #include
> @@ -67,7 +68,7 @@ static int console_move_rows_1(struct udevice *dev, uint
> rowdst, uint rowsrc,
> return 0;
> }
>
> -static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, char
> ch)
> +static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, int
> cp)
> {
> struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev);
> struct udevice *vid = dev->parent;
> @@ -77,8 +78,9 @@ static int console_putc_xy_1(struct udevice *dev, uint
> x_frac, uint y, char ch)
> int pbytes = VNBYTES(vid_priv->bpix);
> int x, linenum, ret;
> void *start, *line;
> + u8 ch = console_utf_to_cp437(cp);
> uchar *pfont = fontdata->video_fontdata +
> - (u8)ch * fontdata->char_pixel_bytes;
> + ch * fontdata->char_pixel_bytes;
>
> if (x_frac + VID_TO_POS(vc_priv->x_charsize) > vc_priv->xsize_frac)
> return -EAGAIN;
> @@ -145,7 +147,7 @@ static int console_move_rows_2(struct udevice *dev, uint
> rowdst, uint rowsrc,
> return 0;
> }
>
> -static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, char
> ch)
> +static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, int
> cp)
> {
> struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev);
> struct udevice *vid = dev->parent;
> @@ -155,8 +157,9 @@ static int console_putc_xy_2(struct udevice *dev, uint
> x_frac, uint y, char ch)
> int pbytes = VNBYTES(vid_priv->bpix);
> int linenum, x, ret;
> void *start, *line;
> + u8 ch = console_utf_to_cp437(cp);
> uchar *pfont = fontdata->video_fontdata +
> - (u8)ch * fontdata->char_pixel_bytes;
> + ch * fontdata->char_pixel_bytes;
>
> if (x_frac + VID_TO_POS(vc_priv->x_charsize) > vc_priv->xsize_frac)
> return -EAGAIN;
> @@ -227,7 +230,7 @@ static int console_move_rows_3(struct udevice *dev, uint
> rowdst, uint rowsrc,
> return 0;
> }
>
> -static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, char
> ch)
> +static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, int
> cp)
> {
> struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev);
> struct udevice *vid = dev->parent;
> @@ -237,8 +240,9 @@ static int console_putc_xy_
[PATCH v5 6/6] rockchip: rk3128: remove noop file
From: Quentin Schulz
arch_cpu_init is already returning 0 in its weak definition in
common/board_f.c so let's just remove the file entirely since nothing
else is done in it.
Cc: Quentin Schulz
Reviewed-by: Kever Yang
Signed-off-by: Quentin Schulz
---
arch/arm/mach-rockchip/rk3128/Makefile | 1 -
arch/arm/mach-rockchip/rk3128/rk3128.c | 13 -
2 files changed, 14 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3128/Makefile
b/arch/arm/mach-rockchip/rk3128/Makefile
index 50e11175423..8df1a60a348 100644
--- a/arch/arm/mach-rockchip/rk3128/Makefile
+++ b/arch/arm/mach-rockchip/rk3128/Makefile
@@ -4,6 +4,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += rk3128.o
obj-y += syscon_rk3128.o
obj-y += clk_rk3128.o
diff --git a/arch/arm/mach-rockchip/rk3128/rk3128.c
b/arch/arm/mach-rockchip/rk3128/rk3128.c
deleted file mode 100644
index 8f8f4951bae..000
--- a/arch/arm/mach-rockchip/rk3128/rk3128.c
+++ /dev/null
@@ -1,13 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2017 Rockchip Electronics Co., Ltd
- */
-#include
-#include
-
-int arch_cpu_init(void)
-{
- /* We do some SoC one time setting here. */
-
- return 0;
-}
--
2.43.0
[PATCH v5 2/6] rockchip: px30: simplify logic for getting SPL boot medium DT node
From: Quentin Schulz
In preparation of moving spl_perform_fixups to spl-boot-order.c, let's
simplify the logic around mapping the BOOT_DEVICE_x enum index to a DT
node by using an instantiated array of chars instead of creating a new
data structure on the fly.
This will make it easier to factor out the code handling the SPL boot
medium detection by having spl_decode_boot_device common to all SoCs.
Cc: Quentin Schulz
Reviewed-by: Kever Yang
Signed-off-by: Quentin Schulz
---
arch/arm/mach-rockchip/px30/px30.c | 28
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-rockchip/px30/px30.c
b/arch/arm/mach-rockchip/px30/px30.c
index 3bca25c609f..8937677d79e 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -445,22 +445,26 @@ void board_debug_uart_init(void)
#endif /* CONFIG_DEBUG_UART_BOARD_INIT */
#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
+const char * const spl_boot_devices[BOOT_DEVICE_NONE + 1] = {
+ [BOOT_DEVICE_MMC2] = "/mmc@ff37",
+ [BOOT_DEVICE_MMC1] = "/mmc@ff39",
+};
+
const char *spl_decode_boot_device(u32 boot_device)
{
- int i;
- static const struct {
- u32 boot_device;
- const char *ofpath;
- } spl_boot_devices_tbl[] = {
- { BOOT_DEVICE_MMC2, "/mmc@ff37" },
- { BOOT_DEVICE_MMC1, "/mmc@ff39" },
- };
+ const char *spl_bootdevice_ofpath = NULL;
+
+ if (boot_device < ARRAY_SIZE(spl_boot_devices))
+ spl_bootdevice_ofpath = spl_boot_devices[boot_device];
- for (i = 0; i < ARRAY_SIZE(spl_boot_devices_tbl); ++i)
- if (spl_boot_devices_tbl[i].boot_device == boot_device)
- return spl_boot_devices_tbl[i].ofpath;
+ if (spl_bootdevice_ofpath)
+ debug("%s: spl_bootdevice_id %x maps to '%s'\n",
+ __func__, boot_device, spl_bootdevice_ofpath);
+ else
+ debug("%s: failed to resolve spl_bootdevice_id %x\n",
+ __func__, boot_device);
- return NULL;
+ return spl_bootdevice_ofpath;
}
void spl_perform_fixups(struct spl_image_info *spl_image)
--
2.43.0
[PATCH v5 4/6] rockchip: find U-boot proper boot device by inverting the logic that sets it
From: Quentin Schulz
BOOT_DEVICE_* is set by spl_node_to_boot_device() depending on the block
device number associated with the MMC device the SPL used to load U-Boot
proper from. It is NOT related to the mmc alias in the Device Tree.
For SPI flashes, all SPI flashes will return BOOT_DEVICE_SPI so there's
currently no way to know from which one the SPL loaded U-Boot proper
from. Therefore, let's just find the first valid candidate in
/chosen/u-boot,spl-boot-order that is a SPI flash and return that path.
This is a best effort.
While the original implementation may have worked, using the exact same
mechanism but in inverted fashion makes it less likely to have
surprising corner-cases or side-effects.
A nice side-effect is that all existing and future Rockchip SoCs now
automatically have their /chosen/u-boot,spl-boot-device set.
Cc: Quentin Schulz
Reviewed-by: Kever Yang
Signed-off-by: Quentin Schulz
---
arch/arm/mach-rockchip/px30/px30.c | 7 ---
arch/arm/mach-rockchip/rk3399/rk3399.c | 6 --
arch/arm/mach-rockchip/spl-boot-order.c | 98 +++--
3 files changed, 80 insertions(+), 31 deletions(-)
diff --git a/arch/arm/mach-rockchip/px30/px30.c
b/arch/arm/mach-rockchip/px30/px30.c
index 7676adcb044..fc7456e680c 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -443,10 +443,3 @@ void board_debug_uart_init(void)
#endif /* CONFIG_DEBUG_UART_BASE && CONFIG_DEBUG_UART_BASE == ... */
}
#endif /* CONFIG_DEBUG_UART_BOARD_INIT */
-
-#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
-const char * const spl_boot_devices[BOOT_DEVICE_NONE + 1] = {
- [BOOT_DEVICE_MMC2] = "/mmc@ff37",
- [BOOT_DEVICE_MMC1] = "/mmc@ff39",
-};
-#endif
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c
b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 6929de5603c..801a4a6662e 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -175,12 +175,6 @@ void board_debug_uart_init(void)
#endif
#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
-const char * const spl_boot_devices[BOOT_DEVICE_NONE + 1] = {
- [BOOT_DEVICE_MMC2] = "/mmc@fe32",
- [BOOT_DEVICE_MMC1] = "/mmc@fe33",
- [BOOT_DEVICE_SPI] = "/spi@ff1d/flash@0",
-};
-
static void rk3399_force_power_on_reset(void)
{
ofnode node;
diff --git a/arch/arm/mach-rockchip/spl-boot-order.c
b/arch/arm/mach-rockchip/spl-boot-order.c
index 0cd3da20c95..2c39a215c10 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#if CONFIG_IS_ENABLED(OF_LIBFDT)
/**
@@ -163,30 +164,91 @@ void board_boot_order(u32 *spl_boot_list)
spl_boot_list[0] = spl_boot_device();
}
-__weak const char * const spl_boot_devices[BOOT_DEVICE_NONE + 1] = {};
-
-const char *spl_decode_boot_device(u32 boot_device)
+int spl_decode_boot_device(u32 boot_device, char *buf, size_t buflen)
{
- const char *spl_bootdevice_ofpath = NULL;
+ struct udevice *dev;
+#if CONFIG_IS_ENABLED(BLK)
+ int dev_num;
+#endif
+ int ret;
+
+ if (boot_device == BOOT_DEVICE_SPI) {
+ /* Revert spl_node_to_boot_device() logic to find appropriate
SPI flash device */
+
+ /*
+* Devices with multiple SPI flash devices will take the first
SPI flash found in
+* /chosen/u-boot,spl-boot-order.
+*/
+ const void *blob = gd->fdt_blob;
+ int chosen_node = fdt_path_offset(blob, "/chosen");
+ int elem;
+ int node;
+ const char *conf;
+
+ if (chosen_node < 0) {
+ debug("%s: /chosen not found\n", __func__);
+ return -ENODEV;
+ }
+
+ for (elem = 0;
+(conf = fdt_stringlist_get(blob, chosen_node,
+ "u-boot,spl-boot-order", elem,
NULL));
+elem++) {
+ const char *alias;
+
+ /* Handle the case of 'same device the SPL was loaded
from' */
+ if (strncmp(conf, "same-as-spl", 11) == 0) {
+ conf = board_spl_was_booted_from();
+ if (!conf)
+ continue;
+ }
+
+ /* First check if the list element is an alias */
+ alias = fdt_get_alias(blob, conf);
+ if (alias)
+ conf = alias;
+
+ /* Try to resolve the config item (or alias) as a path
*/
+ node = fdt_path_offset(blob, conf);
+ if (node < 0) {
+ debug("%s: could not find %s in FDT\n",
__func__,
[PATCH v5 5/6] rockchip: remove unused global data ptr
From: Quentin Schulz
Remove leftover import and global data ptr from files since they aren't
used anymore.
Cc: Quentin Schulz
Reviewed-by: Kever Yang
Signed-off-by: Quentin Schulz
---
arch/arm/mach-rockchip/board.c | 3 ---
arch/arm/mach-rockchip/rk3128/rk3128.c | 3 ---
arch/arm/mach-rockchip/rk3308/rk3308.c | 3 ---
arch/arm/mach-rockchip/rk3328/rk3328.c | 3 ---
arch/arm/mach-rockchip/rk3368/rk3368.c | 3 ---
arch/arm/mach-rockchip/rk3399/rk3399.c | 3 ---
arch/arm/mach-rockchip/rk3588/rk3588.c | 2 --
7 files changed, 20 deletions(-)
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 57f08e0be0e..6a9d297e6ff 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -16,7 +16,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -24,8 +23,6 @@
#include
#include
-DECLARE_GLOBAL_DATA_PTR;
-
#if defined(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && defined(CONFIG_EFI_PARTITION)
#define DFU_ALT_BUF_LENSZ_1K
diff --git a/arch/arm/mach-rockchip/rk3128/rk3128.c
b/arch/arm/mach-rockchip/rk3128/rk3128.c
index 01dbfa75cb2..8f8f4951bae 100644
--- a/arch/arm/mach-rockchip/rk3128/rk3128.c
+++ b/arch/arm/mach-rockchip/rk3128/rk3128.c
@@ -4,9 +4,6 @@
*/
#include
#include
-#include
-
-DECLARE_GLOBAL_DATA_PTR;
int arch_cpu_init(void)
{
diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c
b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 5763604dc3e..6f121bf1304 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -5,7 +5,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -14,8 +13,6 @@
#include
#include
-DECLARE_GLOBAL_DATA_PTR;
-
#include
static struct mm_region rk3308_mem_map[] = {
{
diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c
b/arch/arm/mach-rockchip/rk3328/rk3328.c
index de17b886827..02821c9e51d 100644
--- a/arch/arm/mach-rockchip/rk3328/rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
@@ -10,11 +10,8 @@
#include
#include
#include
-#include
#include
-DECLARE_GLOBAL_DATA_PTR;
-
#define CRU_BASE 0xFF44
#define GRF_BASE 0xFF10
#define UART2_BASE 0xFF13
diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c
b/arch/arm/mach-rockchip/rk3368/rk3368.c
index d0a6107e5e0..d009b8758e5 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -8,7 +8,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -18,8 +17,6 @@
#include
#include
-DECLARE_GLOBAL_DATA_PTR;
-
#define IMEM_BASE 0xFF8C
/* Max MCU's SRAM value is 8K, begin at (IMEM_BASE + 4K) */
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c
b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 801a4a6662e..a1aa0e3e8b5 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -11,7 +11,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -23,8 +22,6 @@
#include
#include
-DECLARE_GLOBAL_DATA_PTR;
-
#define GRF_EMMCCORE_CON11 0xff77f02c
#define GRF_BASE 0xff77
diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c
b/arch/arm/mach-rockchip/rk3588/rk3588.c
index b1f535fad50..00e3da40d9a 100644
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -12,8 +12,6 @@
#include
#include
-DECLARE_GLOBAL_DATA_PTR;
-
#define FIREWALL_DDR_BASE 0xfe03
#define FW_DDR_MST5_REG0x54
#define FW_DDR_MST13_REG 0x74
--
2.43.0
[PATCH v5 3/6] rockchip: factor out spl_perform_fixups into common spl-boot-order
From: Quentin Schulz
All SoCs are susceptible to wanting to know which storage medium was
used to load U-Boot SPL. So instead of reimplementing the same functions
in SoCs over and over again (here just rk3399 and px30 but rk3588 is
coming), let's just put all this in common into spl-boot-order.c
allowing to support a new SoC just by defining the spl_boot_devices
array in the appropriate SoC file.
Note that spl_perform_fixups() now calls spl_image_fdt_addr() to get the
address of the fdt instead of directly reading the
spl_image_info->fdt_addr member, because that member is not guaranteed
to be present (guarded with compile flags). This is essential because we
move the logic away from px30 and rk3399 which had those compile flags
enabled to code run for all Rockchip SoCs.
Cc: Quentin Schulz
Reviewed-by: Kever Yang
Signed-off-by: Quentin Schulz
---
arch/arm/mach-rockchip/px30/px30.c | 46 ---
arch/arm/mach-rockchip/rk3399/rk3399.c | 46 ---
arch/arm/mach-rockchip/spl-boot-order.c | 49 +
3 files changed, 49 insertions(+), 92 deletions(-)
diff --git a/arch/arm/mach-rockchip/px30/px30.c
b/arch/arm/mach-rockchip/px30/px30.c
index 8937677d79e..7676adcb044 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -449,50 +449,4 @@ const char * const spl_boot_devices[BOOT_DEVICE_NONE + 1]
= {
[BOOT_DEVICE_MMC2] = "/mmc@ff37",
[BOOT_DEVICE_MMC1] = "/mmc@ff39",
};
-
-const char *spl_decode_boot_device(u32 boot_device)
-{
- const char *spl_bootdevice_ofpath = NULL;
-
- if (boot_device < ARRAY_SIZE(spl_boot_devices))
- spl_bootdevice_ofpath = spl_boot_devices[boot_device];
-
- if (spl_bootdevice_ofpath)
- debug("%s: spl_bootdevice_id %x maps to '%s'\n",
- __func__, boot_device, spl_bootdevice_ofpath);
- else
- debug("%s: failed to resolve spl_bootdevice_id %x\n",
- __func__, boot_device);
-
- return spl_bootdevice_ofpath;
-}
-
-void spl_perform_fixups(struct spl_image_info *spl_image)
-{
- void *blob = spl_image->fdt_addr;
- const char *boot_ofpath;
- int chosen;
-
- /*
-* Inject the ofpath of the device the full U-Boot (or Linux in
-* Falcon-mode) was booted from into the FDT, if a FDT has been
-* loaded at the same time.
-*/
- if (!blob)
- return;
-
- boot_ofpath = spl_decode_boot_device(spl_image->boot_device);
- if (!boot_ofpath) {
- pr_err("%s: could not map boot_device to ofpath\n", __func__);
- return;
- }
-
- chosen = fdt_find_or_add_subnode(blob, 0, "chosen");
- if (chosen < 0) {
- pr_err("%s: could not find/create '/chosen'\n", __func__);
- return;
- }
- fdt_setprop_string(blob, chosen,
- "u-boot,spl-boot-device", boot_ofpath);
-}
#endif
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c
b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 60d95c81cd2..6929de5603c 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -181,52 +181,6 @@ const char * const spl_boot_devices[BOOT_DEVICE_NONE + 1]
= {
[BOOT_DEVICE_SPI] = "/spi@ff1d/flash@0",
};
-const char *spl_decode_boot_device(u32 boot_device)
-{
- const char *spl_bootdevice_ofpath = NULL;
-
- if (boot_device < ARRAY_SIZE(spl_boot_devices))
- spl_bootdevice_ofpath = spl_boot_devices[boot_device];
-
- if (spl_bootdevice_ofpath)
- debug("%s: spl_bootdevice_id %x maps to '%s'\n",
- __func__, boot_device, spl_bootdevice_ofpath);
- else
- debug("%s: failed to resolve spl_bootdevice_id %x\n",
- __func__, boot_device);
-
- return spl_bootdevice_ofpath;
-}
-
-void spl_perform_fixups(struct spl_image_info *spl_image)
-{
- void *blob = spl_image->fdt_addr;
- const char *boot_ofpath;
- int chosen;
-
- /*
-* Inject the ofpath of the device the full U-Boot (or Linux in
-* Falcon-mode) was booted from into the FDT, if a FDT has been
-* loaded at the same time.
-*/
- if (!blob)
- return;
-
- boot_ofpath = spl_decode_boot_device(spl_image->boot_device);
- if (!boot_ofpath) {
- pr_err("%s: could not map boot_device to ofpath\n", __func__);
- return;
- }
-
- chosen = fdt_find_or_add_subnode(blob, 0, "chosen");
- if (chosen < 0) {
- pr_err("%s: could not find/create '/chosen'\n", __func__);
- return;
- }
- fdt_setprop_string(blob, chosen,
- "u-boot,spl-boot-device", boot_ofpath);
-}
-
static void rk3399_force_power_on_reset(void)
{
ofnode no
[PATCH v5 0/6] rockchip: add vendor-wide support for detecting U-Boot proper boot medium
It is possible to boot U-Boot proper from a different storage medium than the one used by the BOOTROM to load the SPL. This information is stored in the u-boot,spl-boot-device Device Tree property and is accessible from U-Boot proper so that it has knowledge at runtime where it was loaded from. This is already supported on rk3399 and px30 but with duplicated code, so this patch series also factor out all of this into spl-boot-order of Rockchip platforms. Finally, let's invert the logic used to define the BOOT_DEVICE_ value in a different function so that /chosen/u-boot,spl-boot-device can be transparently added without any further work for existing and future SoCs. While at it, let's do some cleanups for Rockchip platforms. Tested on RK3399 Puma, PX30 Ringneck and (upcoming) RK3588 Jaguar. Signed-off-by: Quentin Schulz --- Changes in v5: - guard blk_find_device use with ifdef check on BLK symbol to fix build issues on some Aarch32 Rockchip platforms, - Link to v4: https://lore.kernel.org/r/20240118-rk3588-spl-boot-dev-v4-0-23a97c82c...@theobroma-systems.com Changes in v4: - use spl_image_fdt_addr() instead of accessing (possibly non-existing) fdt_addr member of spl_image_info to fix build issues on some Aarch32 Rockchip platforms, - add Rbs - Link to v3: https://lore.kernel.org/r/20240117-rk3588-spl-boot-dev-v3-0-72cb989e6...@theobroma-systems.com Changes in v3: - revamp spl_decode_boot_device to not necessitate hardcoded arrays, instead, the info is gotten from the inverted logic from spl_node_to_boot_device where the BOOT_DEVICE_* is set - add Rbs - Link to v2: https://lore.kernel.org/r/20231108-rk3588-spl-boot-dev-v2-0-e67e26202...@theobroma-systems.com Changes in v2: - add factoring into spl-boot-order - rework rk3588 support to use the factored out function - add global data ptr cleanup - remove rk3128 main SoC file (useless content) - Link to v1: https://lore.kernel.org/r/20230502-rk3588-spl-boot-dev-v1-1-071722a85...@theobroma-systems.com --- Quentin Schulz (6): rockchip: rk3399: simplify logic for getting SPL boot medium DT node rockchip: px30: simplify logic for getting SPL boot medium DT node rockchip: factor out spl_perform_fixups into common spl-boot-order rockchip: find U-boot proper boot device by inverting the logic that sets it rockchip: remove unused global data ptr rockchip: rk3128: remove noop file arch/arm/mach-rockchip/board.c | 3 - arch/arm/mach-rockchip/px30/px30.c | 49 -- arch/arm/mach-rockchip/rk3128/Makefile | 1 - arch/arm/mach-rockchip/rk3128/rk3128.c | 16 - arch/arm/mach-rockchip/rk3308/rk3308.c | 3 - arch/arm/mach-rockchip/rk3328/rk3328.c | 3 - arch/arm/mach-rockchip/rk3368/rk3368.c | 3 - arch/arm/mach-rockchip/rk3399/rk3399.c | 51 --- arch/arm/mach-rockchip/rk3588/rk3588.c | 2 - arch/arm/mach-rockchip/spl-boot-order.c | 111 10 files changed, 111 insertions(+), 131 deletions(-) --- base-commit: 106332d6cc583c4339e07020989d09b567900a59 change-id: 20230502-rk3588-spl-boot-dev-efa2777cc21b Best regards, -- Quentin Schulz
[PATCH v5 1/6] rockchip: rk3399: simplify logic for getting SPL boot medium DT node
From: Quentin Schulz
In preparation of moving spl_perform_fixups to spl-boot-order.c, let's
simplify the logic around mapping the BOOT_DEVICE_x enum index to a DT
node by using an instantiated array of chars instead of creating a new
data structure on the fly.
This will make it easier to factor out the code handling the SPL boot
medium detection by having spl_decode_boot_device common to all SoCs.
Cc: Quentin Schulz
Reviewed-by: Kever Yang
Signed-off-by: Quentin Schulz
---
arch/arm/mach-rockchip/rk3399/rk3399.c | 34 +++---
1 file changed, 19 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c
b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 14565d2ed9f..60d95c81cd2 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -175,23 +175,27 @@ void board_debug_uart_init(void)
#endif
#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
+const char * const spl_boot_devices[BOOT_DEVICE_NONE + 1] = {
+ [BOOT_DEVICE_MMC2] = "/mmc@fe32",
+ [BOOT_DEVICE_MMC1] = "/mmc@fe33",
+ [BOOT_DEVICE_SPI] = "/spi@ff1d/flash@0",
+};
+
const char *spl_decode_boot_device(u32 boot_device)
{
- int i;
- static const struct {
- u32 boot_device;
- const char *ofpath;
- } spl_boot_devices_tbl[] = {
- { BOOT_DEVICE_MMC2, "/mmc@fe32" },
- { BOOT_DEVICE_MMC1, "/mmc@fe33" },
- { BOOT_DEVICE_SPI, "/spi@ff1d/flash@0" },
- };
-
- for (i = 0; i < ARRAY_SIZE(spl_boot_devices_tbl); ++i)
- if (spl_boot_devices_tbl[i].boot_device == boot_device)
- return spl_boot_devices_tbl[i].ofpath;
-
- return NULL;
+ const char *spl_bootdevice_ofpath = NULL;
+
+ if (boot_device < ARRAY_SIZE(spl_boot_devices))
+ spl_bootdevice_ofpath = spl_boot_devices[boot_device];
+
+ if (spl_bootdevice_ofpath)
+ debug("%s: spl_bootdevice_id %x maps to '%s'\n",
+ __func__, boot_device, spl_bootdevice_ofpath);
+ else
+ debug("%s: failed to resolve spl_bootdevice_id %x\n",
+ __func__, boot_device);
+
+ return spl_bootdevice_ofpath;
}
void spl_perform_fixups(struct spl_image_info *spl_image)
--
2.43.0
Re: [PATCH RFC 0/6] video: Add UTF-8 support for UEFI applications
On Wed, 17 Jan 2024 23:24:26 +0100 Janne Grunau via B4 Relay wrote: Hi Janne, > Andre submitted 2 years ago DM_VIDEO improvements for UEFI applications > using UEFI's EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL but did not follow with > suggested changes. This series takes care of the UTF-8 support which > required to draw symbol and box drawing characters used by UEFI > applications like grub2 and sd-boot correctly. > > Compared to Andre's version this version has the following changes: > - use and extend existing conversion functions from lib/charset.c > - convert first to UTF-32 to support the truetype console as well > - conversion is conditional on CONFIG_EFI_LOADER > - use escape sequences in tests as proposed by Heinrich many thanks for picking this up, much appreciated! In general this looks good, I will test this later this week, and have a closer look, once I am on a device with video output. Cheers, Andre > > Link: > https://lore.kernel.org/u-boot/20220110005638.21599-1-andre.przyw...@arm.com/ > Signed-off-by: Janne Grunau > --- > Andre Przywara (2): > efi_selftest: Add international characters test > efi_selftest: Add box drawing character selftest > > Janne Grunau (4): > lib: charset: Fix utf8_to_utf32_stream() return value doc string > video: console: Parse UTF-8 character sequences > lib/charset: Map cp437 low chars (0x01 - 0x1f) from unicode > efi_selftest: Add symbol character selftest > > drivers/video/console_normal.c | 6 +++-- > drivers/video/console_rotate.c | 16 +- > drivers/video/console_truetype.c | 8 +++ > drivers/video/vidconsole-uclass.c | 18 ++- > drivers/video/vidconsole_internal.h| 15 + > include/charset.h | 4 ++-- > include/cp1250.h | 12 -- > include/cp437.h| 12 -- > include/video_console.h| 10 + > lib/charset.c | 9 +--- > lib/efi_loader/efi_unicode_collation.c | 2 +- > lib/efi_selftest/efi_selftest_textoutput.c | 35 > ++ > 12 files changed, 116 insertions(+), 31 deletions(-) > --- > base-commit: 866ca972d6c3cabeaf6dbac431e8e08bb30b3c8e > change-id: 20240117-vidconsole-utf8-uefi-fa23b4ac65d6 > > Best regards,
Re: [PATCH] arm: imx: imx8m: Enable the SError exception
On Fri, Jan 12, 2024 at 3:00 PM Fabio Estevam wrote: > > Hi Ye Li, > > On Fri, Jan 12, 2024 at 4:07 AM Ye Li wrote: > > > > To work with commit 2f3c920(imx8m: workaround ROM serror), > > we need to enable the SError exception and install vector in SPL. > > > > Signed-off-by: Ye Li > > Reviewed-by: Peng Fan > > This causes an image increase that makes SPL to not fit into the > internal SRAM on some boards: > > https://source.denx.de/u-boot/custodians/u-boot-imx/-/jobs/769422 To fix this problem, what if we enable LTO for all imx8m platforms? diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig index b1937198402f..6617a631b4d6 100644 --- a/arch/arm/mach-imx/imx8m/Kconfig +++ b/arch/arm/mach-imx/imx8m/Kconfig @@ -7,19 +7,23 @@ config IMX8M select HAS_CAAM select ROM_UNIFIED_SECTIONS select ARMV8_CRYPTO + select LTO config IMX8MQ What do you think?
AW: [PATCH] arm: imx: imx8m: Enable the SError exception
Hi Ye Li, I can confirm that our i.MX8MNano LPD4 EVK with field return fuse blown can boot to u-boot prompt after applying your patch. Thank you for your support. Best regards, Thomas -Ursprüngliche Nachricht- Von: Fabio Estevam Gesendet: Freitag, 12. Januar 2024 19:01 An: Ye Li Cc: sba...@denx.de; u-boot@lists.denx.de; peng@nxp.com; uboot-...@nxp.com; Thomas Schaefer Betreff: Re: [PATCH] arm: imx: imx8m: Enable the SError exception Hi Ye Li, On Fri, Jan 12, 2024 at 4:07 AM Ye Li wrote: > > To work with commit 2f3c920(imx8m: workaround ROM serror), we need to > enable the SError exception and install vector in SPL. > > Signed-off-by: Ye Li > Reviewed-by: Peng Fan This causes an image increase that makes SPL to not fit into the internal SRAM on some boards: https://source.denx.de/u-boot/custodians/u-boot-imx/-/jobs/769422
Re: [PATCH v2 2/4] cmd: provide command to display SMBIOS information
On Thu, 18 Jan 2024 at 14:54, Heinrich Schuchardt
wrote:
>
> On 1/18/24 13:39, Ilias Apalodimas wrote:
> > Hi Heinrich,
> >
> > A few nits below
> >
> > On Wed, Jan 17, 2024 at 04:33:45PM +0100, Heinrich Schuchardt wrote:
> >> U-Boot can either generated an SMBIOS table or copy it from a prior boot
> >> stage, e.g. QEMU.
> >>
> >> Provide a command to display the SMBIOS information.
> >>
> >> Currently only type 1 and 2 are translated to human readable text.
> >> Other types may be added later. Currently only a hexdump and the list of
> >> strings is provided for these.
> >>
> >> Signed-off-by: Heinrich Schuchardt
> >> Reviewed-by: Simon Glass
> >> ---
> >> v2:
> >
> > [...]
> >
> >> email address updated
> >> +static struct smbios_header *next_table(struct smbios_header *table)
> >> +{
> >> +const char *str;
> >> +
> >> +if (table->type == SMBIOS_END_OF_TABLE)
> >> +return NULL;
> >> +
> >> +str = smbios_get_string(table, 0);
> >> +return (struct smbios_header *)(++str);
> >
> > That can lead to unaligned access when we dereference that pointer, do we
> > care?
>
> SMBIOS tables are always byte aligned. This is why struct smbios_header
> is marked as packed. The GCCj documentation has this sentence:
>
> "The packed attribute specifies that a variable or structure field
> should have the smallest possible alignment - one byte for a variable,
> and one bit for a field, unless you specify a larger value with the
> aligned attribute."
>
> So shouldn't the compiler care about non-alignment? If there were a
> problematic usage, GCC would throw -Waddress-of-packed-member.
I don't think we have the strict alignment enabled in our makefiles.
But, that won't be a problem, I missed the packed attribute in the
smbios header.
with or without the change in smbios_print_generic()
Reviewed-by: Ilias Apalodimas
Re: [PATCH v2 2/4] cmd: provide command to display SMBIOS information
On 1/18/24 13:39, Ilias Apalodimas wrote:
Hi Heinrich,
A few nits below
On Wed, Jan 17, 2024 at 04:33:45PM +0100, Heinrich Schuchardt wrote:
U-Boot can either generated an SMBIOS table or copy it from a prior boot
stage, e.g. QEMU.
Provide a command to display the SMBIOS information.
Currently only type 1 and 2 are translated to human readable text.
Other types may be added later. Currently only a hexdump and the list of
strings is provided for these.
Signed-off-by: Heinrich Schuchardt
Reviewed-by: Simon Glass
---
v2:
[...]
email address updated
+static struct smbios_header *next_table(struct smbios_header *table)
+{
+ const char *str;
+
+ if (table->type == SMBIOS_END_OF_TABLE)
+ return NULL;
+
+ str = smbios_get_string(table, 0);
+ return (struct smbios_header *)(++str);
That can lead to unaligned access when we dereference that pointer, do we
care?
SMBIOS tables are always byte aligned. This is why struct smbios_header
is marked as packed. The GCCj documentation has this sentence:
"The packed attribute specifies that a variable or structure field
should have the smallest possible alignment - one byte for a variable,
and one bit for a field, unless you specify a larger value with the
aligned attribute."
So shouldn't the compiler care about non-alignment? If there were a
problematic usage, GCC would throw -Waddress-of-packed-member.
Best regards
Heinrich
+}
+
+static void smbios_print_generic(struct smbios_header *table)
+{
+ char *str = (char *)table + table->length;
+
Do we want the header below printed if there are no strings?
IOW can we exit early if (!*str) ?
+ if (CONFIG_IS_ENABLED(HEXDUMP)) {
+ printf("Header and Data:\n");
+ print_hex_dump("\t", DUMP_PREFIX_OFFSET, 16, 1,
+ table, table->length, false);
+ }
+ if (*str) {
+ printf("Strings:\n");
+ for (int index = 1; *str; ++index) {
+ printf("\tString %u: %s\n", index, str);
+ str += strlen(str) + 1;
+ }
+ }
+}
+
+void smbios_print_str(const char *label, void *table, u8 index)
+{
+ printf("\t%s: %s\n", label, smbios_get_string(table, index));
+}
+
Other than that, LGTM
Thanks
/Ilias
Re: [PATCH] Add Phytec i.MX93 support
Hi, Thanks for the review! > s/imx93_phycore/phycore_imx93 > > To fit into existing PHYTEC boards already in tree. I deliberately picked that order so that it is aligned with most imx boards already supported by u-boot. The supported imx93 boards follow that pattern: - imx93_var_som - imx93_evk So it felt natural to have: - imx93_phycore Plus the kernel device-trees are also following that order: - imx93-phycore-xxx On the other hand, it is true that the existing phycore boards use the phytec_* pattern: - phycore_am335x_r2 - phycore_imx8mm - phycore_imx8mp - phycore_rk3288/ So that will be confusing no matter the option that we choose. I will come up with a v2 fixing your other remarks, but I think that this should be addressed beforehand. Thanks, Mathieu
Re: Could you please help me in resolving the "arch/arm/lib/vectors.S:87: Error: no such instruction: `b reset' ?"
Hi Fabio, Thank you. Will do. Sincerely, Liu Wang > On Jan 17, 2024, at 5:33 PM, Fabio Estevam wrote: > > [CAUTION: External Mail] > >> On Wed, Jan 17, 2024 at 10:26 PM Liu Wang wrote: >> >> Hi Fabio, >> >> Thank you for your help. >> >> Switching to "arm-gnu-toolchain-13.2.Rel1-x86-64-arm-none-eabi" seems a fix >> for : >> ...gnueabihf-gcc: cannot execute binary file: Exec format error... > > I would suggest installing the default arm toolchain from Ubuntu. > > As for the build error, you would need to ask to whoever provided you > with the code. > > Since this is not a mainline U-Boot, we cannot help.
Re: [PATCH v2 2/4] cmd: provide command to display SMBIOS information
Hi Heinrich,
A few nits below
On Wed, Jan 17, 2024 at 04:33:45PM +0100, Heinrich Schuchardt wrote:
> U-Boot can either generated an SMBIOS table or copy it from a prior boot
> stage, e.g. QEMU.
>
> Provide a command to display the SMBIOS information.
>
> Currently only type 1 and 2 are translated to human readable text.
> Other types may be added later. Currently only a hexdump and the list of
> strings is provided for these.
>
> Signed-off-by: Heinrich Schuchardt
> Reviewed-by: Simon Glass
> ---
> v2:
[...]
> email address updated
> +static struct smbios_header *next_table(struct smbios_header *table)
> +{
> + const char *str;
> +
> + if (table->type == SMBIOS_END_OF_TABLE)
> + return NULL;
> +
> + str = smbios_get_string(table, 0);
> + return (struct smbios_header *)(++str);
That can lead to unaligned access when we dereference that pointer, do we
care?
> +}
> +
> +static void smbios_print_generic(struct smbios_header *table)
> +{
> + char *str = (char *)table + table->length;
> +
Do we want the header below printed if there are no strings?
IOW can we exit early if (!*str) ?
> + if (CONFIG_IS_ENABLED(HEXDUMP)) {
> + printf("Header and Data:\n");
> + print_hex_dump("\t", DUMP_PREFIX_OFFSET, 16, 1,
> +table, table->length, false);
> + }
> + if (*str) {
> + printf("Strings:\n");
> + for (int index = 1; *str; ++index) {
> + printf("\tString %u: %s\n", index, str);
> + str += strlen(str) + 1;
> + }
> + }
> +}
> +
> +void smbios_print_str(const char *label, void *table, u8 index)
> +{
> + printf("\t%s: %s\n", label, smbios_get_string(table, index));
> +}
> +
Other than that, LGTM
Thanks
/Ilias
Re: [PATCH v2 4/4] test: unit test for smbios command
On Thu, Jan 18, 2024 at 01:33:15PM +0100, Heinrich Schuchardt wrote:
> On 1/18/24 12:51, Ilias Apalodimas wrote:
> > Hi Heinrich,
> >
> > On Wed, 17 Jan 2024 at 17:34, Heinrich Schuchardt
> > wrote:
> > >
> > > Provide a unit test for the smbios command.
> > >
> > > Provide different test functions for QEMU, sandbox, and other systems.
> > >
> > > Signed-off-by: Heinrich Schuchardt
> > > ---
> > > v2:
> > > for generic boards we only can assume that a type 127 table
> > > exists
> > > email address updated
> > > ---
> > > test/py/tests/test_smbios.py | 41
> > > 1 file changed, 41 insertions(+)
> > > create mode 100644 test/py/tests/test_smbios.py
> > >
> > > diff --git a/test/py/tests/test_smbios.py b/test/py/tests/test_smbios.py
> > > new file mode 100644
> > > index 000..82b0b689830
> > > --- /dev/null
> > > +++ b/test/py/tests/test_smbios.py
> > > @@ -0,0 +1,41 @@
> > > +# SPDX-License-Identifier: GPL-2.0-or-later
> > > +
> > > +"""Test smbios command"""
> > > +
> > > +import pytest
> > > +
> > > +@pytest.mark.buildconfigspec('cmd_smbios')
> > > +@pytest.mark.notbuildconfigspec('qfw_smbios')
> > > +@pytest.mark.notbuildconfigspec('sandbox')
> > > +def test_cmd_smbios(u_boot_console):
> > > +"""Run the smbios command"""
> > > +output = u_boot_console.run_command('smbios')
> > > +assert 'DMI type 127,' in output
> > > +
> > > +@pytest.mark.buildconfigspec('cmd_smbios')
> > > +@pytest.mark.buildconfigspec('qfw_smbios')
> > > +@pytest.mark.notbuildconfigspec('sandbox')
> > > +# TODO:
> > > +# QEMU v8.2.0 lacks SMBIOS support for RISC-V
> > > +# Once support is available in our Docker image we can remove the
> > > constraint.
> > > +@pytest.mark.notbuildconfigspec('riscv')
> > > +def test_cmd_smbios_qemu(u_boot_console):
> > > +"""Run the smbios command on QEMU"""
> > > +output = u_boot_console.run_command('smbios')
> > > +assert 'DMI type 1,' in output
> > > +assert 'Manufacturer: QEMU' in output
> > > +assert 'DMI type 127,' in output
> >
> > Is there an easy way to run this test with and without the SMBIOS
> > tables provided by QEMU? We could test the u-boot generated ones that
> > way
>
> We already test the sandbox without QFW. I would not want to duplicated QEMU
> defconfigs.
>
Ah fair enough, I can add the generic tests in that one
Reviewed-by: Ilias Apalodimas
> Best regards
>
> Heinrich
>
> >
> > Thanks
> > /Ilias
> > > +
> > > +@pytest.mark.buildconfigspec('cmd_smbios')
> > > +@pytest.mark.buildconfigspec('sandbox')
> > > +def test_cmd_smbios_sandbox(u_boot_console):
> > > +"""Run the smbios command on the sandbox"""
> > > +output = u_boot_console.run_command('smbios')
> > > +assert 'DMI type 0,' in output
> > > +assert 'String 1: U-Boot' in output
> > > +assert 'DMI type 1,' in output
> > > +assert 'Manufacturer: sandbox' in output
> > > +assert 'DMI type 2,' in output
> > > +assert 'DMI type 3,' in output
> > > +assert 'DMI type 4,' in output
> > > +assert 'DMI type 127,' in output
> > > --
> > > 2.43.0
> > >
>
Re: [PATCH v2 4/4] test: unit test for smbios command
On 1/18/24 12:51, Ilias Apalodimas wrote:
Hi Heinrich,
On Wed, 17 Jan 2024 at 17:34, Heinrich Schuchardt
wrote:
Provide a unit test for the smbios command.
Provide different test functions for QEMU, sandbox, and other systems.
Signed-off-by: Heinrich Schuchardt
---
v2:
for generic boards we only can assume that a type 127 table exists
email address updated
---
test/py/tests/test_smbios.py | 41
1 file changed, 41 insertions(+)
create mode 100644 test/py/tests/test_smbios.py
diff --git a/test/py/tests/test_smbios.py b/test/py/tests/test_smbios.py
new file mode 100644
index 000..82b0b689830
--- /dev/null
+++ b/test/py/tests/test_smbios.py
@@ -0,0 +1,41 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+"""Test smbios command"""
+
+import pytest
+
+@pytest.mark.buildconfigspec('cmd_smbios')
+@pytest.mark.notbuildconfigspec('qfw_smbios')
+@pytest.mark.notbuildconfigspec('sandbox')
+def test_cmd_smbios(u_boot_console):
+"""Run the smbios command"""
+output = u_boot_console.run_command('smbios')
+assert 'DMI type 127,' in output
+
+@pytest.mark.buildconfigspec('cmd_smbios')
+@pytest.mark.buildconfigspec('qfw_smbios')
+@pytest.mark.notbuildconfigspec('sandbox')
+# TODO:
+# QEMU v8.2.0 lacks SMBIOS support for RISC-V
+# Once support is available in our Docker image we can remove the constraint.
+@pytest.mark.notbuildconfigspec('riscv')
+def test_cmd_smbios_qemu(u_boot_console):
+"""Run the smbios command on QEMU"""
+output = u_boot_console.run_command('smbios')
+assert 'DMI type 1,' in output
+assert 'Manufacturer: QEMU' in output
+assert 'DMI type 127,' in output
Is there an easy way to run this test with and without the SMBIOS
tables provided by QEMU? We could test the u-boot generated ones that
way
We already test the sandbox without QFW. I would not want to duplicated
QEMU defconfigs.
Best regards
Heinrich
Thanks
/Ilias
+
+@pytest.mark.buildconfigspec('cmd_smbios')
+@pytest.mark.buildconfigspec('sandbox')
+def test_cmd_smbios_sandbox(u_boot_console):
+"""Run the smbios command on the sandbox"""
+output = u_boot_console.run_command('smbios')
+assert 'DMI type 0,' in output
+assert 'String 1: U-Boot' in output
+assert 'DMI type 1,' in output
+assert 'Manufacturer: sandbox' in output
+assert 'DMI type 2,' in output
+assert 'DMI type 3,' in output
+assert 'DMI type 4,' in output
+assert 'DMI type 127,' in output
--
2.43.0
Re: [PATCH v1 1/1] net: ti: am65-cpsw-nuss: Remove incorrect RGMII_ID bit functionality
Hi Ken,
On 16/01/2024 22:01, Ken Sloat wrote:
> The CPSW implementations on the AM6x platforms do not support the
> selectable RGMII TX clk delay functionality via the RGMII_ID_MODE bit as
> the earlier platforms did. According to various TI datasheets, reference
> manuals, hardware design guides and TI forum posts from TI, this bit is
> "not timed, tested, or characterized. RGMII_ID is enabled by default and
> the register bit reserved."
>
> The driver implementation today however, will incorrectly set this bit
> whenever the interface mode is in RGMII_ID or RGMII_TXID.
>
> To fix this, remove any statement setting this bit, and moreover, mask
> bits 31:4 as these are all reserved.
>
> See:
> https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1211306/am625-enet1_ctrl_rgmii_id-_mode
> https://www.ti.com/lit/pdf/spruiv7 (Rev. B Figure 14-1717>
> https://www.ti.com/lit/gpn/am625 (Rev. B Figure 7-31 Note A)
> https://www.ti.com/lit/an/sprad05b/sprad05b.pdf (Rev. B Section 7.4)
>
Thanks for the patch. Some comments below.
> Signed-off-by: Ken Sloat
> ---
> drivers/net/ti/am65-cpsw-nuss.c | 10 +++---
> 1 file changed, 3 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
> index 18a33c4c0e..51c432408f 100644
> --- a/drivers/net/ti/am65-cpsw-nuss.c
> +++ b/drivers/net/ti/am65-cpsw-nuss.c
> @@ -256,7 +256,6 @@ static int am65_cpsw_gmii_sel_k3(struct am65_cpsw_priv
> *priv,
> {
> struct udevice *dev = priv->dev;
> u32 offset, reg, phandle;
> - bool rgmii_id = false;
> fdt_addr_t gmii_sel;
> u32 mode = 0;
> ofnode node;
> @@ -296,7 +295,6 @@ static int am65_cpsw_gmii_sel_k3(struct am65_cpsw_priv
> *priv,
> case PHY_INTERFACE_MODE_RGMII_ID:
> case PHY_INTERFACE_MODE_RGMII_TXID:
> mode = AM65_GMII_SEL_MODE_RGMII;
> - rgmii_id = true;
> break;
>
> case PHY_INTERFACE_MODE_SGMII:
> @@ -313,15 +311,13 @@ static int am65_cpsw_gmii_sel_k3(struct am65_cpsw_priv
> *priv,
> break;
> };
>
> - if (rgmii_id)
> - mode |= AM65_GMII_SEL_RGMII_IDMODE;
> -
> - reg = mode;
> + /* bits 31:4 are reserved */
Updated documentation is still wrong. Reserved bits should be Read only and
should
always read 0. In updated TRM it doesn't show reserved bits as read-only and
states
read value is 1.
Bit 4 is clearly read/write so it cannot be treated as reserved. But setting it
to 1 is not supported.
If bootROM or some other software set it to 1 then it will remain 1 and we
cannot
rely on it to be always 0. That's why it shouldn't be treated as reserved.
On AM65 bits 31:5 and 3:2 are reserved (read only 0).
Bit 4 is still r/w but setting 1 is not supported.
> + reg = (GENMASK(31, 4) & reg) | mode;
As reserved bits will always read 0 this mask is not required.
What we do need to do is always clear bit 4.
So
#define AM6X_GMII_SEL_MODE_SEL_MASK GENMASK(2:0)
/* RGMII_ID_MODE = 1 is not supported */
reg &= ~AM65_GMII_SEL_RGMII_IDMODE;
reg &= ~AM6X_GMII_SEL_MODE_SEL_MASK;
reg |= mode;
Or simply this would have worked as we don't really set bit 4 in mode.
reg = mode;
> dev_dbg(dev, "gmii_sel PHY mode: %u, new gmii_sel: %08x\n",
> phy_mode, reg);
> writel(reg, gmii_sel);
>
> - reg = readl(gmii_sel);
> + reg = GENMASK(3, 0) & readl(gmii_sel);
should be GENMASK(2, 0);
but now we can use AM6X_GMII_SEL_MODE_SEL_MASK here instead.
> if (reg != mode) {
> dev_err(dev,
> "gmii_sel PHY mode NOT SET!: requested: %08x, gmii_sel:
> %08x\n",
--
cheers,
-roger
Re: [PATCH v2 4/4] test: unit test for smbios command
Hi Heinrich,
On Wed, 17 Jan 2024 at 17:34, Heinrich Schuchardt
wrote:
>
> Provide a unit test for the smbios command.
>
> Provide different test functions for QEMU, sandbox, and other systems.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> v2:
> for generic boards we only can assume that a type 127 table exists
> email address updated
> ---
> test/py/tests/test_smbios.py | 41
> 1 file changed, 41 insertions(+)
> create mode 100644 test/py/tests/test_smbios.py
>
> diff --git a/test/py/tests/test_smbios.py b/test/py/tests/test_smbios.py
> new file mode 100644
> index 000..82b0b689830
> --- /dev/null
> +++ b/test/py/tests/test_smbios.py
> @@ -0,0 +1,41 @@
> +# SPDX-License-Identifier: GPL-2.0-or-later
> +
> +"""Test smbios command"""
> +
> +import pytest
> +
> +@pytest.mark.buildconfigspec('cmd_smbios')
> +@pytest.mark.notbuildconfigspec('qfw_smbios')
> +@pytest.mark.notbuildconfigspec('sandbox')
> +def test_cmd_smbios(u_boot_console):
> +"""Run the smbios command"""
> +output = u_boot_console.run_command('smbios')
> +assert 'DMI type 127,' in output
> +
> +@pytest.mark.buildconfigspec('cmd_smbios')
> +@pytest.mark.buildconfigspec('qfw_smbios')
> +@pytest.mark.notbuildconfigspec('sandbox')
> +# TODO:
> +# QEMU v8.2.0 lacks SMBIOS support for RISC-V
> +# Once support is available in our Docker image we can remove the constraint.
> +@pytest.mark.notbuildconfigspec('riscv')
> +def test_cmd_smbios_qemu(u_boot_console):
> +"""Run the smbios command on QEMU"""
> +output = u_boot_console.run_command('smbios')
> +assert 'DMI type 1,' in output
> +assert 'Manufacturer: QEMU' in output
> +assert 'DMI type 127,' in output
Is there an easy way to run this test with and without the SMBIOS
tables provided by QEMU? We could test the u-boot generated ones that
way
Thanks
/Ilias
> +
> +@pytest.mark.buildconfigspec('cmd_smbios')
> +@pytest.mark.buildconfigspec('sandbox')
> +def test_cmd_smbios_sandbox(u_boot_console):
> +"""Run the smbios command on the sandbox"""
> +output = u_boot_console.run_command('smbios')
> +assert 'DMI type 0,' in output
> +assert 'String 1: U-Boot' in output
> +assert 'DMI type 1,' in output
> +assert 'Manufacturer: sandbox' in output
> +assert 'DMI type 2,' in output
> +assert 'DMI type 3,' in output
> +assert 'DMI type 4,' in output
> +assert 'DMI type 127,' in output
> --
> 2.43.0
>
[PATCH v4 2/6] rockchip: px30: simplify logic for getting SPL boot medium DT node
From: Quentin Schulz
In preparation of moving spl_perform_fixups to spl-boot-order.c, let's
simplify the logic around mapping the BOOT_DEVICE_x enum index to a DT
node by using an instantiated array of chars instead of creating a new
data structure on the fly.
This will make it easier to factor out the code handling the SPL boot
medium detection by having spl_decode_boot_device common to all SoCs.
Cc: Quentin Schulz
Reviewed-by: Kever Yang
Signed-off-by: Quentin Schulz
---
arch/arm/mach-rockchip/px30/px30.c | 28
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-rockchip/px30/px30.c
b/arch/arm/mach-rockchip/px30/px30.c
index 3bca25c609f..8937677d79e 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -445,22 +445,26 @@ void board_debug_uart_init(void)
#endif /* CONFIG_DEBUG_UART_BOARD_INIT */
#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
+const char * const spl_boot_devices[BOOT_DEVICE_NONE + 1] = {
+ [BOOT_DEVICE_MMC2] = "/mmc@ff37",
+ [BOOT_DEVICE_MMC1] = "/mmc@ff39",
+};
+
const char *spl_decode_boot_device(u32 boot_device)
{
- int i;
- static const struct {
- u32 boot_device;
- const char *ofpath;
- } spl_boot_devices_tbl[] = {
- { BOOT_DEVICE_MMC2, "/mmc@ff37" },
- { BOOT_DEVICE_MMC1, "/mmc@ff39" },
- };
+ const char *spl_bootdevice_ofpath = NULL;
+
+ if (boot_device < ARRAY_SIZE(spl_boot_devices))
+ spl_bootdevice_ofpath = spl_boot_devices[boot_device];
- for (i = 0; i < ARRAY_SIZE(spl_boot_devices_tbl); ++i)
- if (spl_boot_devices_tbl[i].boot_device == boot_device)
- return spl_boot_devices_tbl[i].ofpath;
+ if (spl_bootdevice_ofpath)
+ debug("%s: spl_bootdevice_id %x maps to '%s'\n",
+ __func__, boot_device, spl_bootdevice_ofpath);
+ else
+ debug("%s: failed to resolve spl_bootdevice_id %x\n",
+ __func__, boot_device);
- return NULL;
+ return spl_bootdevice_ofpath;
}
void spl_perform_fixups(struct spl_image_info *spl_image)
--
2.43.0
[PATCH v4 6/6] rockchip: rk3128: remove noop file
From: Quentin Schulz
arch_cpu_init is already returning 0 in its weak definition in
common/board_f.c so let's just remove the file entirely since nothing
else is done in it.
Cc: Quentin Schulz
Reviewed-by: Kever Yang
Signed-off-by: Quentin Schulz
---
arch/arm/mach-rockchip/rk3128/Makefile | 1 -
arch/arm/mach-rockchip/rk3128/rk3128.c | 13 -
2 files changed, 14 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3128/Makefile
b/arch/arm/mach-rockchip/rk3128/Makefile
index 50e11175423..8df1a60a348 100644
--- a/arch/arm/mach-rockchip/rk3128/Makefile
+++ b/arch/arm/mach-rockchip/rk3128/Makefile
@@ -4,6 +4,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += rk3128.o
obj-y += syscon_rk3128.o
obj-y += clk_rk3128.o
diff --git a/arch/arm/mach-rockchip/rk3128/rk3128.c
b/arch/arm/mach-rockchip/rk3128/rk3128.c
deleted file mode 100644
index 8f8f4951bae..000
--- a/arch/arm/mach-rockchip/rk3128/rk3128.c
+++ /dev/null
@@ -1,13 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2017 Rockchip Electronics Co., Ltd
- */
-#include
-#include
-
-int arch_cpu_init(void)
-{
- /* We do some SoC one time setting here. */
-
- return 0;
-}
--
2.43.0
[PATCH v4 3/6] rockchip: factor out spl_perform_fixups into common spl-boot-order
From: Quentin Schulz
All SoCs are susceptible to wanting to know which storage medium was
used to load U-Boot SPL. So instead of reimplementing the same functions
in SoCs over and over again (here just rk3399 and px30 but rk3588 is
coming), let's just put all this in common into spl-boot-order.c
allowing to support a new SoC just by defining the spl_boot_devices
array in the appropriate SoC file.
Note that spl_perform_fixups() now calls spl_image_fdt_addr() to get the
address of the fdt instead of directly reading the
spl_image_info->fdt_addr member, because that member is not guaranteed
to be present (guarded with compile flags). This is essential because we
move the logic away from px30 and rk3399 which had those compile flags
enabled to code run for all Rockchip SoCs.
Cc: Quentin Schulz
Reviewed-by: Kever Yang
Signed-off-by: Quentin Schulz
---
arch/arm/mach-rockchip/px30/px30.c | 46 ---
arch/arm/mach-rockchip/rk3399/rk3399.c | 46 ---
arch/arm/mach-rockchip/spl-boot-order.c | 49 +
3 files changed, 49 insertions(+), 92 deletions(-)
diff --git a/arch/arm/mach-rockchip/px30/px30.c
b/arch/arm/mach-rockchip/px30/px30.c
index 8937677d79e..7676adcb044 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -449,50 +449,4 @@ const char * const spl_boot_devices[BOOT_DEVICE_NONE + 1]
= {
[BOOT_DEVICE_MMC2] = "/mmc@ff37",
[BOOT_DEVICE_MMC1] = "/mmc@ff39",
};
-
-const char *spl_decode_boot_device(u32 boot_device)
-{
- const char *spl_bootdevice_ofpath = NULL;
-
- if (boot_device < ARRAY_SIZE(spl_boot_devices))
- spl_bootdevice_ofpath = spl_boot_devices[boot_device];
-
- if (spl_bootdevice_ofpath)
- debug("%s: spl_bootdevice_id %x maps to '%s'\n",
- __func__, boot_device, spl_bootdevice_ofpath);
- else
- debug("%s: failed to resolve spl_bootdevice_id %x\n",
- __func__, boot_device);
-
- return spl_bootdevice_ofpath;
-}
-
-void spl_perform_fixups(struct spl_image_info *spl_image)
-{
- void *blob = spl_image->fdt_addr;
- const char *boot_ofpath;
- int chosen;
-
- /*
-* Inject the ofpath of the device the full U-Boot (or Linux in
-* Falcon-mode) was booted from into the FDT, if a FDT has been
-* loaded at the same time.
-*/
- if (!blob)
- return;
-
- boot_ofpath = spl_decode_boot_device(spl_image->boot_device);
- if (!boot_ofpath) {
- pr_err("%s: could not map boot_device to ofpath\n", __func__);
- return;
- }
-
- chosen = fdt_find_or_add_subnode(blob, 0, "chosen");
- if (chosen < 0) {
- pr_err("%s: could not find/create '/chosen'\n", __func__);
- return;
- }
- fdt_setprop_string(blob, chosen,
- "u-boot,spl-boot-device", boot_ofpath);
-}
#endif
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c
b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 60d95c81cd2..6929de5603c 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -181,52 +181,6 @@ const char * const spl_boot_devices[BOOT_DEVICE_NONE + 1]
= {
[BOOT_DEVICE_SPI] = "/spi@ff1d/flash@0",
};
-const char *spl_decode_boot_device(u32 boot_device)
-{
- const char *spl_bootdevice_ofpath = NULL;
-
- if (boot_device < ARRAY_SIZE(spl_boot_devices))
- spl_bootdevice_ofpath = spl_boot_devices[boot_device];
-
- if (spl_bootdevice_ofpath)
- debug("%s: spl_bootdevice_id %x maps to '%s'\n",
- __func__, boot_device, spl_bootdevice_ofpath);
- else
- debug("%s: failed to resolve spl_bootdevice_id %x\n",
- __func__, boot_device);
-
- return spl_bootdevice_ofpath;
-}
-
-void spl_perform_fixups(struct spl_image_info *spl_image)
-{
- void *blob = spl_image->fdt_addr;
- const char *boot_ofpath;
- int chosen;
-
- /*
-* Inject the ofpath of the device the full U-Boot (or Linux in
-* Falcon-mode) was booted from into the FDT, if a FDT has been
-* loaded at the same time.
-*/
- if (!blob)
- return;
-
- boot_ofpath = spl_decode_boot_device(spl_image->boot_device);
- if (!boot_ofpath) {
- pr_err("%s: could not map boot_device to ofpath\n", __func__);
- return;
- }
-
- chosen = fdt_find_or_add_subnode(blob, 0, "chosen");
- if (chosen < 0) {
- pr_err("%s: could not find/create '/chosen'\n", __func__);
- return;
- }
- fdt_setprop_string(blob, chosen,
- "u-boot,spl-boot-device", boot_ofpath);
-}
-
static void rk3399_force_power_on_reset(void)
{
ofnode no
[PATCH v4 4/6] rockchip: find U-boot proper boot device by inverting the logic that sets it
From: Quentin Schulz
BOOT_DEVICE_* is set by spl_node_to_boot_device() depending on the block
device number associated with the MMC device the SPL used to load U-Boot
proper from. It is NOT related to the mmc alias in the Device Tree.
For SPI flashes, all SPI flashes will return BOOT_DEVICE_SPI so there's
currently no way to know from which one the SPL loaded U-Boot proper
from. Therefore, let's just find the first valid candidate in
/chosen/u-boot,spl-boot-order that is a SPI flash and return that path.
This is a best effort.
While the original implementation may have worked, using the exact same
mechanism but in inverted fashion makes it less likely to have
surprising corner-cases or side-effects.
A nice side-effect is that all existing and future Rockchip SoCs now
automatically have their /chosen/u-boot,spl-boot-device set.
Cc: Quentin Schulz
Reviewed-by: Kever Yang
Signed-off-by: Quentin Schulz
---
arch/arm/mach-rockchip/px30/px30.c | 7 ---
arch/arm/mach-rockchip/rk3399/rk3399.c | 6 ---
arch/arm/mach-rockchip/spl-boot-order.c | 91 ++---
3 files changed, 73 insertions(+), 31 deletions(-)
diff --git a/arch/arm/mach-rockchip/px30/px30.c
b/arch/arm/mach-rockchip/px30/px30.c
index 7676adcb044..fc7456e680c 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -443,10 +443,3 @@ void board_debug_uart_init(void)
#endif /* CONFIG_DEBUG_UART_BASE && CONFIG_DEBUG_UART_BASE == ... */
}
#endif /* CONFIG_DEBUG_UART_BOARD_INIT */
-
-#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
-const char * const spl_boot_devices[BOOT_DEVICE_NONE + 1] = {
- [BOOT_DEVICE_MMC2] = "/mmc@ff37",
- [BOOT_DEVICE_MMC1] = "/mmc@ff39",
-};
-#endif
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c
b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 6929de5603c..801a4a6662e 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -175,12 +175,6 @@ void board_debug_uart_init(void)
#endif
#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
-const char * const spl_boot_devices[BOOT_DEVICE_NONE + 1] = {
- [BOOT_DEVICE_MMC2] = "/mmc@fe32",
- [BOOT_DEVICE_MMC1] = "/mmc@fe33",
- [BOOT_DEVICE_SPI] = "/spi@ff1d/flash@0",
-};
-
static void rk3399_force_power_on_reset(void)
{
ofnode node;
diff --git a/arch/arm/mach-rockchip/spl-boot-order.c
b/arch/arm/mach-rockchip/spl-boot-order.c
index 0cd3da20c95..fcc23151d3a 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#if CONFIG_IS_ENABLED(OF_LIBFDT)
/**
@@ -163,30 +164,84 @@ void board_boot_order(u32 *spl_boot_list)
spl_boot_list[0] = spl_boot_device();
}
-__weak const char * const spl_boot_devices[BOOT_DEVICE_NONE + 1] = {};
-
-const char *spl_decode_boot_device(u32 boot_device)
+int spl_decode_boot_device(u32 boot_device, char *buf, size_t buflen)
{
- const char *spl_bootdevice_ofpath = NULL;
+ struct udevice *dev;
+ int dev_num, ret;
+
+ if (boot_device == BOOT_DEVICE_SPI) {
+ /* Revert spl_node_to_boot_device() logic to find appropriate
SPI flash device */
+
+ /*
+* Devices with multiple SPI flash devices will take the first
SPI flash found in
+* /chosen/u-boot,spl-boot-order.
+*/
+ const void *blob = gd->fdt_blob;
+ int chosen_node = fdt_path_offset(blob, "/chosen");
+ int elem;
+ int node;
+ const char *conf;
+
+ if (chosen_node < 0) {
+ debug("%s: /chosen not found\n", __func__);
+ return -ENODEV;
+ }
+
+ for (elem = 0;
+(conf = fdt_stringlist_get(blob, chosen_node,
+ "u-boot,spl-boot-order", elem,
NULL));
+elem++) {
+ const char *alias;
+
+ /* Handle the case of 'same device the SPL was loaded
from' */
+ if (strncmp(conf, "same-as-spl", 11) == 0) {
+ conf = board_spl_was_booted_from();
+ if (!conf)
+ continue;
+ }
+
+ /* First check if the list element is an alias */
+ alias = fdt_get_alias(blob, conf);
+ if (alias)
+ conf = alias;
+
+ /* Try to resolve the config item (or alias) as a path
*/
+ node = fdt_path_offset(blob, conf);
+ if (node < 0) {
+ debug("%s: could not find %s in FDT\n",
__func__, conf);
+ continu
[PATCH v4 5/6] rockchip: remove unused global data ptr
From: Quentin Schulz
Remove leftover import and global data ptr from files since they aren't
used anymore.
Cc: Quentin Schulz
Reviewed-by: Kever Yang
Signed-off-by: Quentin Schulz
---
arch/arm/mach-rockchip/board.c | 3 ---
arch/arm/mach-rockchip/rk3128/rk3128.c | 3 ---
arch/arm/mach-rockchip/rk3308/rk3308.c | 3 ---
arch/arm/mach-rockchip/rk3328/rk3328.c | 3 ---
arch/arm/mach-rockchip/rk3368/rk3368.c | 3 ---
arch/arm/mach-rockchip/rk3399/rk3399.c | 3 ---
arch/arm/mach-rockchip/rk3588/rk3588.c | 2 --
7 files changed, 20 deletions(-)
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 57f08e0be0e..6a9d297e6ff 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -16,7 +16,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -24,8 +23,6 @@
#include
#include
-DECLARE_GLOBAL_DATA_PTR;
-
#if defined(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && defined(CONFIG_EFI_PARTITION)
#define DFU_ALT_BUF_LENSZ_1K
diff --git a/arch/arm/mach-rockchip/rk3128/rk3128.c
b/arch/arm/mach-rockchip/rk3128/rk3128.c
index 01dbfa75cb2..8f8f4951bae 100644
--- a/arch/arm/mach-rockchip/rk3128/rk3128.c
+++ b/arch/arm/mach-rockchip/rk3128/rk3128.c
@@ -4,9 +4,6 @@
*/
#include
#include
-#include
-
-DECLARE_GLOBAL_DATA_PTR;
int arch_cpu_init(void)
{
diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c
b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 5763604dc3e..6f121bf1304 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -5,7 +5,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -14,8 +13,6 @@
#include
#include
-DECLARE_GLOBAL_DATA_PTR;
-
#include
static struct mm_region rk3308_mem_map[] = {
{
diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c
b/arch/arm/mach-rockchip/rk3328/rk3328.c
index de17b886827..02821c9e51d 100644
--- a/arch/arm/mach-rockchip/rk3328/rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
@@ -10,11 +10,8 @@
#include
#include
#include
-#include
#include
-DECLARE_GLOBAL_DATA_PTR;
-
#define CRU_BASE 0xFF44
#define GRF_BASE 0xFF10
#define UART2_BASE 0xFF13
diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c
b/arch/arm/mach-rockchip/rk3368/rk3368.c
index d0a6107e5e0..d009b8758e5 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -8,7 +8,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -18,8 +17,6 @@
#include
#include
-DECLARE_GLOBAL_DATA_PTR;
-
#define IMEM_BASE 0xFF8C
/* Max MCU's SRAM value is 8K, begin at (IMEM_BASE + 4K) */
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c
b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 801a4a6662e..a1aa0e3e8b5 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -11,7 +11,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -23,8 +22,6 @@
#include
#include
-DECLARE_GLOBAL_DATA_PTR;
-
#define GRF_EMMCCORE_CON11 0xff77f02c
#define GRF_BASE 0xff77
diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c
b/arch/arm/mach-rockchip/rk3588/rk3588.c
index b1f535fad50..00e3da40d9a 100644
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -12,8 +12,6 @@
#include
#include
-DECLARE_GLOBAL_DATA_PTR;
-
#define FIREWALL_DDR_BASE 0xfe03
#define FW_DDR_MST5_REG0x54
#define FW_DDR_MST13_REG 0x74
--
2.43.0
[PATCH v4 0/6] rockchip: add vendor-wide support for detecting U-Boot proper boot medium
It is possible to boot U-Boot proper from a different storage medium than the one used by the BOOTROM to load the SPL. This information is stored in the u-boot,spl-boot-device Device Tree property and is accessible from U-Boot proper so that it has knowledge at runtime where it was loaded from. This is already supported on rk3399 and px30 but with duplicated code, so this patch series also factor out all of this into spl-boot-order of Rockchip platforms. Finally, let's invert the logic used to define the BOOT_DEVICE_ value in a different function so that /chosen/u-boot,spl-boot-device can be transparently added without any further work for existing and future SoCs. While at it, let's do some cleanups for Rockchip platforms. Tested on RK3399 Puma, PX30 Ringneck and (upcoming) RK3588 Jaguar. Signed-off-by: Quentin Schulz --- Changes in v4: - use spl_image_fdt_addr() instead of accessing (possibly non-existing) fdt_addr member of spl_image_info to fix build issues on some Aarch32 Rockchip platforms, - add Rbs - Link to v3: https://lore.kernel.org/r/20240117-rk3588-spl-boot-dev-v3-0-72cb989e6...@theobroma-systems.com Changes in v3: - revamp spl_decode_boot_device to not necessitate hardcoded arrays, instead, the info is gotten from the inverted logic from spl_node_to_boot_device where the BOOT_DEVICE_* is set - add Rbs - Link to v2: https://lore.kernel.org/r/20231108-rk3588-spl-boot-dev-v2-0-e67e26202...@theobroma-systems.com Changes in v2: - add factoring into spl-boot-order - rework rk3588 support to use the factored out function - add global data ptr cleanup - remove rk3128 main SoC file (useless content) - Link to v1: https://lore.kernel.org/r/20230502-rk3588-spl-boot-dev-v1-1-071722a85...@theobroma-systems.com --- Quentin Schulz (6): rockchip: rk3399: simplify logic for getting SPL boot medium DT node rockchip: px30: simplify logic for getting SPL boot medium DT node rockchip: factor out spl_perform_fixups into common spl-boot-order rockchip: find U-boot proper boot device by inverting the logic that sets it rockchip: remove unused global data ptr rockchip: rk3128: remove noop file arch/arm/mach-rockchip/board.c | 3 - arch/arm/mach-rockchip/px30/px30.c | 49 --- arch/arm/mach-rockchip/rk3128/Makefile | 1 - arch/arm/mach-rockchip/rk3128/rk3128.c | 16 - arch/arm/mach-rockchip/rk3308/rk3308.c | 3 - arch/arm/mach-rockchip/rk3328/rk3328.c | 3 - arch/arm/mach-rockchip/rk3368/rk3368.c | 3 - arch/arm/mach-rockchip/rk3399/rk3399.c | 51 arch/arm/mach-rockchip/rk3588/rk3588.c | 2 - arch/arm/mach-rockchip/spl-boot-order.c | 104 10 files changed, 104 insertions(+), 131 deletions(-) --- base-commit: 106332d6cc583c4339e07020989d09b567900a59 change-id: 20230502-rk3588-spl-boot-dev-efa2777cc21b Best regards, -- Quentin Schulz
[PATCH v4 1/6] rockchip: rk3399: simplify logic for getting SPL boot medium DT node
From: Quentin Schulz
In preparation of moving spl_perform_fixups to spl-boot-order.c, let's
simplify the logic around mapping the BOOT_DEVICE_x enum index to a DT
node by using an instantiated array of chars instead of creating a new
data structure on the fly.
This will make it easier to factor out the code handling the SPL boot
medium detection by having spl_decode_boot_device common to all SoCs.
Cc: Quentin Schulz
Reviewed-by: Kever Yang
Signed-off-by: Quentin Schulz
---
arch/arm/mach-rockchip/rk3399/rk3399.c | 34 +++---
1 file changed, 19 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c
b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 14565d2ed9f..60d95c81cd2 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -175,23 +175,27 @@ void board_debug_uart_init(void)
#endif
#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
+const char * const spl_boot_devices[BOOT_DEVICE_NONE + 1] = {
+ [BOOT_DEVICE_MMC2] = "/mmc@fe32",
+ [BOOT_DEVICE_MMC1] = "/mmc@fe33",
+ [BOOT_DEVICE_SPI] = "/spi@ff1d/flash@0",
+};
+
const char *spl_decode_boot_device(u32 boot_device)
{
- int i;
- static const struct {
- u32 boot_device;
- const char *ofpath;
- } spl_boot_devices_tbl[] = {
- { BOOT_DEVICE_MMC2, "/mmc@fe32" },
- { BOOT_DEVICE_MMC1, "/mmc@fe33" },
- { BOOT_DEVICE_SPI, "/spi@ff1d/flash@0" },
- };
-
- for (i = 0; i < ARRAY_SIZE(spl_boot_devices_tbl); ++i)
- if (spl_boot_devices_tbl[i].boot_device == boot_device)
- return spl_boot_devices_tbl[i].ofpath;
-
- return NULL;
+ const char *spl_bootdevice_ofpath = NULL;
+
+ if (boot_device < ARRAY_SIZE(spl_boot_devices))
+ spl_bootdevice_ofpath = spl_boot_devices[boot_device];
+
+ if (spl_bootdevice_ofpath)
+ debug("%s: spl_bootdevice_id %x maps to '%s'\n",
+ __func__, boot_device, spl_bootdevice_ofpath);
+ else
+ debug("%s: failed to resolve spl_bootdevice_id %x\n",
+ __func__, boot_device);
+
+ return spl_bootdevice_ofpath;
}
void spl_perform_fixups(struct spl_image_info *spl_image)
--
2.43.0
Re: [PATCH] Add Phytec i.MX93 support
Hi Mathieu,
I already gave my review on the kernel mailing list.
As first step, naming scheme is not compatible with PHYTEC naming
convention. Please fix it across the entire patch. Maybe reference
downstream u-boot for that?
Please also use "phyBOARD-Segin-i.MX93" when referencing the board as
this is the official board name.
On 17. 01. 24 08:52, Mathieu Othacehe wrote:
> Add support for the Phytec i.MX93 Segin evaluation kit. The SoM consists
> of an NXP i.MX93 dual A55 CPU. The SoM is mounted on a Phytec Segin SBC.
>
> Signed-off-by: Mathieu Othacehe
> ---
> arch/arm/dts/Makefile |3 +-
> arch/arm/dts/imx93-phycore-segin-u-boot.dtsi | 274 +++
> arch/arm/dts/imx93-phycore-segin.dts | 95 +>
> arch/arm/dts/imx93-phycore-som.dtsi | 64 +
> arch/arm/mach-imx/imx9/Kconfig|6 +
> board/phytec/common/mmc.c | 49 +
> board/phytec/imx93_phycore/Kconfig| 21 +
> board/phytec/imx93_phycore/MAINTAINERS| 10 +
> board/phytec/imx93_phycore/Makefile | 16 +
> board/phytec/imx93_phycore/imx93_phycore.c| 89 +
> board/phytec/imx93_phycore/imx93_phycore.env | 96 +
s/imx93_phycore/phycore_imx93
To fit into existing PHYTEC boards already in tree.
> .../phytec/imx93_phycore/lpddr4_timing_1GB.c | 1546 +
Remove _1GB suffix.
PHYTEC DRAM auto-detection will follow later.
> board/phytec/imx93_phycore/spl.c | 181 ++
> configs/imx93_phycore_defconfig | 147 ++
should be phycore-imx93_defconfig
> doc/board/phytec/imx93_phycore.rst| 68 +
> doc/board/phytec/index.rst|1 +
> include/configs/imx93_phycore.h | 47 +
> 17 files changed, 2712 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/dts/imx93-phycore-segin-u-boot.dtsi
> create mode 100644 arch/arm/dts/imx93-phycore-segin.dts
> create mode 100644 arch/arm/dts/imx93-phycore-som.dtsi
> create mode 100644 board/phytec/common/mmc.c
> create mode 100644 board/phytec/imx93_phycore/Kconfig
> create mode 100644 board/phytec/imx93_phycore/MAINTAINERS
> create mode 100644 board/phytec/imx93_phycore/Makefile
> create mode 100644 board/phytec/imx93_phycore/imx93_phycore.c
> create mode 100644 board/phytec/imx93_phycore/imx93_phycore.env
> create mode 100644 board/phytec/imx93_phycore/lpddr4_timing_1GB.c
> create mode 100644 board/phytec/imx93_phycore/spl.c
> create mode 100644 configs/imx93_phycore_defconfig
> create mode 100644 doc/board/phytec/imx93_phycore.rst
> create mode 100644 include/configs/imx93_phycore.h
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index d456a524b36..4a23e2a2f49 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -1127,7 +1127,8 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
>
> dtb-$(CONFIG_ARCH_IMX9) += \
> imx93-11x11-evk.dtb \
> - imx93-var-som-symphony.dtb
> + imx93-var-som-symphony.dtb \
> + imx93-phycore-segin.dtb
s/imx93-phycore-segin/imx93-phyboard-segin
>
> dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb \
> imxrt1020-evk.dtb \
> diff --git a/arch/arm/dts/imx93-phycore-segin-u-boot.dtsi
> b/arch/arm/dts/imx93-phycore-segin-u-boot.dtsi
> new file mode 100644
> index 000..6d75f1985aa
> --- /dev/null
> +++ b/arch/arm/dts/imx93-phycore-segin-u-boot.dtsi
> @@ -0,0 +1,274 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (C) 2023 PHYTEC Messtechnik GmbH
> + * Christoph Stoidner
> + *
> + * Product homepage:
> + * phyBOARD-Segin carrier board is reused for the i.MX93 design.
> + *
> https://www.phytec.de/produkte/single-board-computer/phyboard-segin-imx6ul/
> + */
> +
Please sync header with what you have sent to linux mailing lists.
> +#include "imx93-u-boot.dtsi"
> +
> +/ {
> + wdt-reboot {
> + compatible = "wdt-reboot";
> + wdt = <&wdog3>;
> + bootph-pre-ram;
> + bootph-some-ram;
> + };
> +
> + aliases {
> + ethernet0 = &eqos;> + ethernet1 = &fec;
> + };
> +
> + firmware {
> + optee {
> + compatible = "linaro,optee-tz";
> + method = "smc";
> + };
> + };
> +};
> +
> +&{/soc@0} {
> + bootph-all;
> + bootph-pre-ram;
> +};
> +
> +&aips1 {
> + bootph-pre-ram;
> + bootph-all;
> +};
> +
> +&aips2 {
> + bootph-pre-ram;
> + bootph-some-ram;
> +};
> +
> +&aips3 {
> + bootph-pre-ram;
> + bootph-some-ram;
> +};
> +
> +&iomuxc {
> + bootph-pre-ram;
> + bootph-some-ram;
> +};
> +
> +®_usdhc2_vmmc {
> + u-boot,off-on-delay-us = <2>;
> + bootph-pre-ram;
> + bootph-some-ram;
> +};
> +
> +&pinctrl_reg_usdhc2_vmmc {
> + bootph-pre-ram;
> +};
> +
> +&pinctrl_uart1 {
> + bootph-pre-ram;
> + bootph-some-ram;
> +};
> +
> +&pinctrl_usdhc2 {
> + bootph-pre-ram;
> + bootph-some-ram
Re: [PATCH v3 4/6] rockchip: find U-boot proper boot device by inverting the logic that sets it
Hi Quentin,
On 2024/1/18 01:22, Quentin Schulz wrote:
From: Quentin Schulz
BOOT_DEVICE_* is set by spl_node_to_boot_device() depending on the block
device number associated with the MMC device the SPL used to load U-Boot
proper from. It is NOT related to the mmc alias in the Device Tree.
For SPI flashes, all SPI flashes will return BOOT_DEVICE_SPI so there's
currently no way to know from which one the SPL loaded U-Boot proper
from. Therefore, let's just find the first valid candidate in
/chosen/u-boot,spl-boot-order that is a SPI flash and return that path.
This is a best effort.
While the original implementation may have worked, using the exact same
mechanism but in inverted fashion makes it less likely to have
surprising corner-cases or side-effects.
A nice side-effect is that all existing and future Rockchip SoCs now
automatically have their /chosen/u-boot,spl-boot-device set.
Error happen in some 32bit SoC:
+arch/arm/mach-rockchip/spl-boot-order.c: In function 'spl_perform_fixups':
+arch/arm/mach-rockchip/spl-boot-order.c:242:31: error: 'struct
spl_image_info' has no member named 'fdt_addr'
+ 242 | void *blob = spl_image->fdt_addr;
+ | ^~
+make[3]: *** [scripts/Makefile.build:257:
spl/arch/arm/mach-rockchip/spl-boot-order.o] Error 1
Please add an option for this feature so that different SoC can have
their choice.
Thanks,
- Kever
Cc: Quentin Schulz
Signed-off-by: Quentin Schulz
---
arch/arm/mach-rockchip/px30/px30.c | 7 ---
arch/arm/mach-rockchip/rk3399/rk3399.c | 6 ---
arch/arm/mach-rockchip/spl-boot-order.c | 91 ++---
3 files changed, 73 insertions(+), 31 deletions(-)
diff --git a/arch/arm/mach-rockchip/px30/px30.c
b/arch/arm/mach-rockchip/px30/px30.c
index 7676adcb044..fc7456e680c 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -443,10 +443,3 @@ void board_debug_uart_init(void)
#endif /* CONFIG_DEBUG_UART_BASE && CONFIG_DEBUG_UART_BASE == ... */
}
#endif /* CONFIG_DEBUG_UART_BOARD_INIT */
-
-#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
-const char * const spl_boot_devices[BOOT_DEVICE_NONE + 1] = {
- [BOOT_DEVICE_MMC2] = "/mmc@ff37",
- [BOOT_DEVICE_MMC1] = "/mmc@ff39",
-};
-#endif
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c
b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 6929de5603c..801a4a6662e 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -175,12 +175,6 @@ void board_debug_uart_init(void)
#endif
#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
-const char * const spl_boot_devices[BOOT_DEVICE_NONE + 1] = {
- [BOOT_DEVICE_MMC2] = "/mmc@fe32",
- [BOOT_DEVICE_MMC1] = "/mmc@fe33",
- [BOOT_DEVICE_SPI] = "/spi@ff1d/flash@0",
-};
-
static void rk3399_force_power_on_reset(void)
{
ofnode node;
diff --git a/arch/arm/mach-rockchip/spl-boot-order.c
b/arch/arm/mach-rockchip/spl-boot-order.c
index 55d0976fb0a..f2cb17224e8 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#if CONFIG_IS_ENABLED(OF_LIBFDT)
/**
@@ -163,30 +164,84 @@ void board_boot_order(u32 *spl_boot_list)
spl_boot_list[0] = spl_boot_device();
}
-__weak const char * const spl_boot_devices[BOOT_DEVICE_NONE + 1] = {};
-
-const char *spl_decode_boot_device(u32 boot_device)
+int spl_decode_boot_device(u32 boot_device, char *buf, size_t buflen)
{
- const char *spl_bootdevice_ofpath = NULL;
+ struct udevice *dev;
+ int dev_num, ret;
+
+ if (boot_device == BOOT_DEVICE_SPI) {
+ /* Revert spl_node_to_boot_device() logic to find appropriate
SPI flash device */
+
+ /*
+* Devices with multiple SPI flash devices will take the first
SPI flash found in
+* /chosen/u-boot,spl-boot-order.
+*/
+ const void *blob = gd->fdt_blob;
+ int chosen_node = fdt_path_offset(blob, "/chosen");
+ int elem;
+ int node;
+ const char *conf;
+
+ if (chosen_node < 0) {
+ debug("%s: /chosen not found\n", __func__);
+ return -ENODEV;
+ }
+
+ for (elem = 0;
+(conf = fdt_stringlist_get(blob, chosen_node,
+ "u-boot,spl-boot-order", elem,
NULL));
+elem++) {
+ const char *alias;
+
+ /* Handle the case of 'same device the SPL was loaded
from' */
+ if (strncmp(conf, "same-as-spl", 11) == 0) {
+ conf = board_spl_was_booted_from();
+ if (!conf)
+
Re: [PATCH v1 4/4] board: verdin-am62: set cpu core voltage depending on speed grade
On Wed, Jan 17, 2024 at 11:16:49AM +0100, Max Krummenacher wrote:
> From: Max Krummenacher
>
> Speed grade T requires the VDD_CORE voltage to be 0.85V if using
> the maximum core frequency.
>
> Speed grades G, K, S allow the VDD_CORE voltage to be 0.75V up to the
> maximum core frequency but allow to run at 0.85V.
>
> For efficiency in manufacturing and code maintenance we use 0.85V for
> the PMIC defaults and device tree settings and dynamically adjust the
> voltage in the PMIC and device tree to 0.75V for lower speed SKU to
> gain more than 100mW power consumption reduction.
>
> Signed-off-by: Max Krummenacher
> ---
>
> board/toradex/verdin-am62/verdin-am62.c | 47 +
> 1 file changed, 47 insertions(+)
>
> diff --git a/board/toradex/verdin-am62/verdin-am62.c
> b/board/toradex/verdin-am62/verdin-am62.c
> index 4e912b5f32f..8b9db224069 100644
> --- a/board/toradex/verdin-am62/verdin-am62.c
> +++ b/board/toradex/verdin-am62/verdin-am62.c
> @@ -13,10 +13,13 @@
> #include
> #include
> #include
> +#include
In the !DM_REGULATOR case regulator.h assumes errno.h to be already included.
This happens when compiling the R5 SPL.
Will fix this in a v2 of the series.
Max
> #include
>
> #include "../common/tdx-cfg-block.h"
>
> +#define VDD_CORE_REG "buck1"
> +
> DECLARE_GLOBAL_DATA_PTR;
>
> int board_init(void)
> @@ -49,9 +52,37 @@ int board_fit_config_name_match(const char *name)
> }
> #endif
>
> +static u32 get_vdd_core_nominal(void)
> +{
> + int core_uvolt;
> +
> + switch (k3_get_speed_grade()) {
> + case 'G':
> + case 'K':
> + case 'S':
> + core_uvolt = 75;
> + break;
> + case 'T':
> + default:
> + core_uvolt = 85;
> + break;
> + }
> + return core_uvolt;
> +}
> +
> #if IS_ENABLED(CONFIG_OF_LIBFDT) && IS_ENABLED(CONFIG_OF_BOARD_SETUP)
> int ft_board_setup(void *blob, struct bd_info *bd)
> {
> + int core_uvolt;
> +
> + core_uvolt = get_vdd_core_nominal();
> + if (core_uvolt != 85) {
> + do_fixup_by_path_u32(blob,
> "/bus@f/i2c@2000/pmic@30/regulators/buck1",
> + "regulator-max-microvolt", core_uvolt, 0);
> + do_fixup_by_path_u32(blob,
> "/bus@f/i2c@2000/pmic@30/regulators/buck1",
> + "regulator-min-microvolt", core_uvolt, 0);
> + }
> +
> return ft_common_board_setup(blob, bd);
> }
> #endif
> @@ -86,6 +117,22 @@ static void select_dt_from_module_version(void)
>
> int board_late_init(void)
> {
> + int ret;
> + int core_uvolt;
> + struct udevice *dev = NULL;
> +
> + core_uvolt = get_vdd_core_nominal();
> + if (core_uvolt != 85) {
> + /* Set CPU core voltage to 0.75V for slower speed grades */
> + ret = regulator_get_by_devname(VDD_CORE_REG, &dev);
> + if (ret)
> + pr_err("VDD CORE Regulator get error: %d\n", ret);
> +
> + ret = regulator_set_value_force(dev, core_uvolt);
> + if (ret)
> + pr_err("VDD CORE Regulator value setting error: %d\n",
> ret);
> + }
> +
> select_dt_from_module_version();
>
> return 0;
> --
> 2.42.0
>
Re: [UBOOT PATCH v4] test/py: net: Add dhcp abort test
Hi,
On 21/11/2023 14:02, Love Kumar wrote:
Abort the dhcp request in the middle by pressing ctrl + c on u-boot
prompt and validate the abort status.
Signed-off-by: Love Kumar
---
Changes in v2:
- Mark CMD_MII command dependency
Changes in v3:
- Skip the test if PHY device not present
Changes in v4:
- Setup the network configuration by running dhcp test at the end of
test
- Add option to skip the test if it is not desired or possible
---
test/py/tests/test_net.py | 57 +++
1 file changed, 57 insertions(+)
diff --git a/test/py/tests/test_net.py b/test/py/tests/test_net.py
index b2241ae6a482..e0749125fd53 100644
--- a/test/py/tests/test_net.py
+++ b/test/py/tests/test_net.py
@@ -7,6 +7,7 @@
import pytest
import u_boot_utils
import uuid
+import re
"""
Note: This test relies on boardenv_* containing configuration values to define
@@ -30,6 +31,11 @@ env__net_uses_pci = True
# set to False.
env__net_dhcp_server = True
+# False or omitted if a DHCP server is attached to the network, and dhcp abort
+# case should be tested.
+# If DHCP abort testing is not possible or desired, set this variable to True.
+env__dhcp_abort_test_skip = True
+
# True if a DHCPv6 server is attached to the network, and should be tested.
# If DHCPv6 testing is not possible or desired, this variable may be omitted
or
# set to False.
@@ -115,6 +121,57 @@ def test_net_dhcp(u_boot_console):
global net_set_up
net_set_up = True
+@pytest.mark.buildconfigspec("cmd_dhcp")
+@pytest.mark.buildconfigspec("cmd_mii")
+def test_net_dhcp_abort(u_boot_console):
+"""Test the dhcp command by pressing ctrl+c in the middle of dhcp request
+
+The boardenv_* file may be used to enable/disable this test; see the
+comment at the beginning of this file.
+"""
+
+test_dhcp = u_boot_console.config.env.get("env__net_dhcp_server", False)
+if not test_dhcp:
+pytest.skip("No DHCP server available")
+
+if u_boot_console.config.env.get("env__dhcp_abort_test_skip", False):
+pytest.skip("DHCP abort test is not enabled!")
+
+u_boot_console.run_command("setenv autoload no")
+
+# Phy reset before running dhcp command
+output = u_boot_console.run_command("mii device")
+if not re.search(r"Current device: '(.+?)'", output):
+pytest.skip("PHY device does not exist!")
+eth_num = re.search(r"Current device: '(.+?)'", output).groups()[0]
+u_boot_console.run_command(f"mii device {eth_num}")
+output = u_boot_console.run_command("mii info")
+eth_addr = hex(int(re.search(r"PHY (.+?):", output).groups()[0], 16))
+u_boot_console.run_command(f"mii modify {eth_addr} 0 0x8000 0x8000")
+
+u_boot_console.run_command("dhcp", wait_for_prompt=False)
+try:
+u_boot_console.wait_for("Waiting for PHY auto negotiation to complete")
+except:
+pytest.skip("Timeout waiting for PHY auto negotiation to complete")
+
+u_boot_console.wait_for("done")
+
+# Sending Ctrl-C
+output = u_boot_console.run_command(
+chr(3), wait_for_echo=False, send_nl=False
+)
+
+assert "TIMEOUT" not in output
+assert "DHCP client bound to address " not in output
+assert "Abort" in output
+
+# Provide a time to recover from Abort - if it is not performed
+# There is message like: ethernet@ff0e: No link.
+u_boot_console.run_command("sleep 1")
+# Run the dhcp test to setup the network configuration
+test_net_dhcp(u_boot_console)
+
@pytest.mark.buildconfigspec('cmd_dhcp6')
def test_net_dhcp6(u_boot_console):
"""Test the dhcp6 command.
This test fails on the BPI-M2S and BPI-M5 boards:
Section: test_net_dhcp_abort
TIME: NOW: 2024/01/18 08:43:48.152149
TIME: SINCE-PREV: 0:00:00.000629
TIME: SINCE-START: 0:02:17.928462
Stream: console
=> setenv autoload no
=>
End stream: console
TIME: NOW: 2024/01/18 08:43:48.232597
TIME: SINCE-PREV: 0:00:00.080448
TIME: SINCE-START: 0:02:18.008910
Stream: console
=> mii device
MII devices: 'mdio' 'mdio@0'
Current device: 'mdio'
=>
End stream: console
TIME: NOW: 2024/01/18 08:43:48.277449
TIME: SINCE-PREV: 0:00:00.044852
TIME: SINCE-START: 0:02:18.053762
Stream: console
=> mii device mdio
=>
End stream: console
TIME: NOW: 2024/01/18 08:43:48.318273
TIME: SINCE-PREV: 0:00:00.040824
TIME: SINCE-START: 0:02:18.094586
Stream: console
=> mii info
PHY 0x00: OUI = 0x0732, Model = 0x11, Rev = 0x06, 100baseT, FDX
PHY 0x01: OUI = 0x0732, Model = 0x11, Rev = 0x06, 100baseT, FDX
=>
End stream: console
TIME: NOW: 2024/01/18 08:43:48.370420
TIME: SINCE-PREV: 0:00:00.052147
TIME: SINCE-START: 0:02:18.146733
Stream: console
=> mii modify 0x0 0 0x8000 0x8000
=>
End stream: console
TIME: NOW: 2024/01/18 08:43:48.451550
TIME: SINCE-PREV: 0:00:00.081130
TIME: SINCE-START: 0:02:18.227863
Stream: console
=> dhcp
End stream: console
TIME: NOW: 2024/01/18 08:43:48.493680
TIME: SINCE-PREV: 0:00:00.042130
TIME: SINCE-START: 0:02:18.269993
Stream: con
Re: [PATCH v4 0/6] rpi5: initial support
Hi, > On 18 Jan 2024, at 1:06, Jens Maus wrote: > > Hi, > >> Am 17.01.2024 um 17:45 schrieb Ivan T. Ivanov : >> >> I have aarch64 based machine at hand running openSUSE, >> thus I am building U-boot “natively”, no cross-compiling. >> >> $ make rpi_arm64_defconfig >> $ make > >> I just dumped latest Tumbleweed[1] to uSD card and copied >> u-boot.bin to EFI. I can see the HDMI output. > > I actually just did that. Installed a fresh Tumbleweed on a microSD card, > booted it up with a rpi4 and after installing all necessary build tools I > applied your patches to u-boot 2024.01 sources, and then executed these two > commands to let it compile a u-boot.bin file which I then put in /boot/efi to > replace the u-boot.bin which is/was already there. Then I pulled the SD card > and moved it over to the RaspberryPi5 in trying to get it booted up. However, > again no HDMI output at all and unfortunately also the serial output on the > debug probe does not show U-boot popping up at all. Interestingly, using the > patched u-boot.bin with a RaspberryPi4 still works and it boots up perfectly > fine, but not with the RaspberryPi5 I have here. > > Any idea why this might be the case here while you report that the above > mentioned procedure works for you? In fact, the RaspberryPi5 I have here is a > 8GB model and with the rpi-eeprom version from 2024/01/05 [1] in case this > might be relevant. EEPROM version on mine device is older[1], but I suspect that size of the RAM is what make a difference, mine have only 4GB of RAM. I am afraid you will have to connect that UART debug cable and share what is the memory map on your device :-) Regards, Ivan [1] RPi: BOOTSYS release VERSION:30de0ba5 DATE: 2023/10/30 TIME: 16:45:10
Re: [PATCH v2 1/2] configs: rockchip: Use dwc3-generic driver on RK3328 and RK3399
On 2023/11/13 01:48, Jonas Karlman wrote: Complete the transition away from xhci-dwc3 and dwc3-of-simple drivers and change to use the dwc3-generic driver on remaining RK3328 and RK3399 boards. MISC, USB_DWC3 and USB_DWC3_GENERIC is enabled on boards that used to enable USB_XHCI_DWC3. USB_XHCI_DWC3 is dropped from updated boards along with the default y of USB_XHCI_DWC3_OF_SIMPLE. There is no intended change in functionality with this changes, USB 3.0 is expected to continue same as before this change. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang Thanks, - Kever --- v2: - Update commit message - Drop CONFIG_DM_USB_GADGET changes configs/chromebook_bob_defconfig | 2 +- configs/chromebook_kevin_defconfig| 2 +- configs/eaidk-610-rk3399_defconfig| 4 +++- configs/evb-rk3399_defconfig | 1 - configs/firefly-rk3399_defconfig | 1 - configs/khadas-edge-captain-rk3399_defconfig | 4 +++- configs/khadas-edge-rk3399_defconfig | 4 +++- configs/khadas-edge-v-rk3399_defconfig| 4 +++- configs/leez-rk3399_defconfig | 4 +++- configs/nanopc-t4-rk3399_defconfig| 3 ++- configs/nanopi-m4-2gb-rk3399_defconfig| 4 +++- configs/nanopi-m4-rk3399_defconfig| 4 +++- configs/nanopi-m4b-rk3399_defconfig | 4 +++- configs/nanopi-neo4-rk3399_defconfig | 4 +++- configs/nanopi-r4s-rk3399_defconfig | 3 ++- configs/orangepi-r1-plus-lts-rk3328_defconfig | 3 ++- configs/orangepi-r1-plus-rk3328_defconfig | 3 ++- configs/orangepi-rk3399_defconfig | 4 +++- configs/pinebook-pro-rk3399_defconfig | 1 - configs/pinephone-pro-rk3399_defconfig| 1 - configs/puma-rk3399_defconfig | 1 - configs/roc-pc-mezzanine-rk3399_defconfig | 1 - configs/roc-pc-rk3399_defconfig | 1 - configs/rock-4c-plus-rk3399_defconfig | 1 - configs/rock-4se-rk3399_defconfig | 1 - configs/rock-pi-4-rk3399_defconfig| 1 - configs/rock-pi-4c-rk3399_defconfig | 1 - configs/rock-pi-n10-rk3399pro_defconfig | 1 - configs/rock960-rk3399_defconfig | 3 ++- configs/rockpro64-rk3399_defconfig| 1 - drivers/usb/host/Kconfig | 1 - 31 files changed, 42 insertions(+), 31 deletions(-) diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig index 1807e838223a..b5a5ae737e52 100644 --- a/configs/chromebook_bob_defconfig +++ b/configs/chromebook_bob_defconfig @@ -98,12 +98,12 @@ CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_KEYBOARD=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig index 638beee2c6d3..20913d2cf0fe 100644 --- a/configs/chromebook_kevin_defconfig +++ b/configs/chromebook_kevin_defconfig @@ -99,12 +99,12 @@ CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_KEYBOARD=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y diff --git a/configs/eaidk-610-rk3399_defconfig b/configs/eaidk-610-rk3399_defconfig index 77edbdbf9597..22ad98b95ad3 100644 --- a/configs/eaidk-610-rk3399_defconfig +++ b/configs/eaidk-610-rk3399_defconfig @@ -40,6 +40,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y @@ -56,8 +57,9 @@ CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_SPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 5740ffc38f6c..d6140527b752 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -66,7 +66,6 @@ CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_DWC3=y diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index b4660a051dfd..b7c8e95b7b89 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -66,7 +66,6 @@ CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFI
Re: [PATCH v2 2/2] rockchip: board: Remove dwc3 usb init and gadget handler functions
On 2023/11/13 01:48, Jonas Karlman wrote:
Remove board_usb_init() and dm_usb_gadget_handle_interrupts() functions
related to dwc3, they use e.g. a hard-coded reg address for RK3399 and
are obsolete with use of DM_USB_GADGET.
Use of DM_USB_GADGET, USB_DWC3_GENERIC and USB_DWC3_GADGET have replaced
same feature provided by the removed functions on RK3399 boards.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2:
- Set DM_USB_GADGET for ARCH_ROCKCHIP when USB_DWC3_GADGET is enabled
to ensure same functionality is provided
- Remove DM_USB_GADGET from a few more defconfig files
arch/arm/Kconfig | 1 +
arch/arm/mach-rockchip/board.c | 30 +---
configs/nanopc-t6-rk3588_defconfig | 1 -
configs/orangepi-5-plus-rk3588_defconfig | 1 -
configs/orangepi-5-rk3588s_defconfig | 1 -
configs/rock5a-rk3588s_defconfig | 1 -
configs/rock5b-rk3588_defconfig | 1 -
7 files changed, 2 insertions(+), 34 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d812685c9842..c39ae40335a0 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1974,6 +1974,7 @@ config ARCH_ROCKCHIP
select DM_SERIAL
select DM_SPI
select DM_SPI_FLASH
+ select DM_USB_GADGET if USB_DWC3_GADGET
select ENABLE_ARM_SOC_BOOT0_HOOK
select OF_CONTROL
select SPI
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 57f08e0be0e9..38a2a4b95ec0 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -208,10 +208,8 @@ void enable_caches(void)
}
#endif
-#if defined(CONFIG_USB_GADGET)
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
#include
-
-#if defined(CONFIG_USB_GADGET_DWC2_OTG)
#include
#include
@@ -287,32 +285,6 @@ int board_usb_cleanup(int index, enum usb_init_type init)
}
#endif /* CONFIG_USB_GADGET_DWC2_OTG */
-#if defined(CONFIG_USB_DWC3_GADGET) && !defined(CONFIG_DM_USB_GADGET)
-#include
-
-static struct dwc3_device dwc3_device_data = {
- .maximum_speed = USB_SPEED_HIGH,
- .base = 0xfe80,
- .dr_mode = USB_DR_MODE_PERIPHERAL,
- .index = 0,
- .dis_u2_susphy_quirk = 1,
- .hsphy_mode = USBPHY_INTERFACE_MODE_UTMIW,
-};
-
-int dm_usb_gadget_handle_interrupts(struct udevice *dev)
-{
- dwc3_uboot_handle_interrupt(dev);
- return 0;
-}
-
-int board_usb_init(int index, enum usb_init_type init)
-{
- return dwc3_uboot_init(&dwc3_device_data);
-}
-#endif /* CONFIG_USB_DWC3_GADGET */
-
-#endif /* CONFIG_USB_GADGET */
-
#if IS_ENABLED(CONFIG_FASTBOOT)
int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason)
{
diff --git a/configs/nanopc-t6-rk3588_defconfig
b/configs/nanopc-t6-rk3588_defconfig
index 070399ce2a86..62f307a3f361 100644
--- a/configs/nanopc-t6-rk3588_defconfig
+++ b/configs/nanopc-t6-rk3588_defconfig
@@ -91,7 +91,6 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SFC=y
CONFIG_SYSRESET=y
CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
diff --git a/configs/orangepi-5-plus-rk3588_defconfig
b/configs/orangepi-5-plus-rk3588_defconfig
index 04736996217e..9ebb8c2244c5 100644
--- a/configs/orangepi-5-plus-rk3588_defconfig
+++ b/configs/orangepi-5-plus-rk3588_defconfig
@@ -94,7 +94,6 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SFC=y
CONFIG_SYSRESET=y
CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
diff --git a/configs/orangepi-5-rk3588s_defconfig
b/configs/orangepi-5-rk3588s_defconfig
index feb45a53853b..4b5803dce9be 100644
--- a/configs/orangepi-5-rk3588s_defconfig
+++ b/configs/orangepi-5-rk3588s_defconfig
@@ -91,7 +91,6 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SFC=y
CONFIG_SYSRESET=y
CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
diff --git a/configs/rock5a-rk3588s_defconfig b/configs/rock5a-rk3588s_defconfig
index a6471a519514..efa7bcbdcda6 100644
--- a/configs/rock5a-rk3588s_defconfig
+++ b/configs/rock5a-rk3588s_defconfig
@@ -75,7 +75,6 @@ CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig
index 0595325e8107..6135af04feef 100644
--- a/configs/rock5b-rk3588_defconfig
+++ b/configs/rock5b-rk3588_defconfig
@@ -99,7 +99,6 @@ CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SFC=y
CONFIG_SYSRESET=y
CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
