[PATCH v4 0/5] FSL/Layerscape gen 3: export serdes cfg to env

2020-01-10 Thread Alex Marginean
Exports the serdes configuration as an environment variable for LS gen 3
SoCs, so it can be used in u-boot command line.  It should particularly be
useful for applying Linux DT overlays for the given serdes configuration.
First 4 patches free up arch_misc_init, which is now implemented in
arch/arm/cpu/armv8/fsl-layerscape/cpu.c.  For LS1028A and LX2 the
board_mux_init code is now under misc_init_r.  MISC_INIT_R is now enabled
for the relavant boards.

Changes in v4:
  - Fix a variable unused warning, I missed it in v3.

Changes in v3:
  - Only revert serdes number for SoCs that encode the protocol on each lane
(LS1028 and LS1088).  For the others (LS2, LX2) leave the number unchanged.
In previous versions for instance LX2 serdes read 9000 instead of 9.

Changes in v2:
  - s/emtpy/empty/ in description of two of the patches

This set replaces v2:
  https://patchwork.ozlabs.org/project/uboot/list/?series=146468
and v3:
  https://patchwork.ozlabs.org/project/uboot/list/?series=152569

Alex Marginean (5):
  board: fsl: lx2160a: free up arch_misc_init
  board: fsl: ls2080a/ls2081a: remove empty arch_misc_init
  board: fsl: ls1088a: remove empty arch_misc_init
  board: fsl: ls1028a: free up arch_misc_init
  arch: armv8: fsl-layerscape: export serdes config to environment

 arch/arm/Kconfig  | 10 -
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig |  1 +
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c   | 14 +++
 .../armv8/fsl-layerscape/fsl_lsch3_serdes.c   | 42 +++
 board/freescale/ls1028a/ls1028a.c |  4 +-
 board/freescale/ls1088a/ls1088a.c |  7 
 board/freescale/ls2080a/ls2080a.c |  7 
 board/freescale/ls2080aqds/ls2080aqds.c   |  7 
 board/freescale/ls2080ardb/ls2080ardb.c   |  7 
 board/freescale/lx2160a/lx2160a.c |  4 +-
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig  |  1 +
 configs/ls1028aqds_tfa_defconfig  |  1 +
 configs/lx2160aqds_tfa_SECURE_BOOT_defconfig  |  1 +
 configs/lx2160aqds_tfa_defconfig  |  1 +
 configs/lx2160ardb_tfa_SECURE_BOOT_defconfig  |  1 +
 configs/lx2160ardb_tfa_defconfig  |  1 +
 16 files changed, 67 insertions(+), 42 deletions(-)

-- 
2.17.1



[PATCH v4 1/5] board: fsl: lx2160a: free up arch_misc_init

2020-01-10 Thread Alex Marginean
Currently LX2 board code uses arch_misc_init to set up the board mux on
RDB and QDS.  Move this code to misc_init_r.  This is consistent with LS
gen 2 and T series SoCs/boards.

Signed-off-by: Alex Marginean 
---
 arch/arm/Kconfig | 2 --
 board/freescale/lx2160a/lx2160a.c| 4 ++--
 configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 +
 configs/lx2160aqds_tfa_defconfig | 1 +
 configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 +
 configs/lx2160ardb_tfa_defconfig | 1 +
 6 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 76365ef313..45498180c1 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1192,7 +1192,6 @@ config TARGET_LS2081ARDB
 config TARGET_LX2160ARDB
bool "Support lx2160ardb"
select ARCH_LX2160A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1206,7 +1205,6 @@ config TARGET_LX2160ARDB
 config TARGET_LX2160AQDS
bool "Support lx2160aqds"
select ARCH_LX2160A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
diff --git a/board/freescale/lx2160a/lx2160a.c 
b/board/freescale/lx2160a/lx2160a.c
index e5b7fec9a4..084ee162f0 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -579,8 +579,8 @@ void detail_board_ddr_info(void)
print_ddr_info(0);
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
 {
config_board_mux();
 
diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig 
b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
index 4858f666da..2b45132103 100644
--- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
@@ -16,6 +16,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m 
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
 # CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_GPT=y
diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig
index 167c517050..0ea22a912d 100644
--- a/configs/lx2160aqds_tfa_defconfig
+++ b/configs/lx2160aqds_tfa_defconfig
@@ -17,6 +17,7 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m 
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
 # CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_GPT=y
diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig 
b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
index 87459dd383..379763c28e 100644
--- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
@@ -17,6 +17,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m 
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
 # CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_GPT=y
diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig
index f6cf1aca8e..cf9678e7e1 100644
--- a/configs/lx2160ardb_tfa_defconfig
+++ b/configs/lx2160ardb_tfa_defconfig
@@ -18,6 +18,7 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m 
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
 # CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_GPT=y
-- 
2.17.1



[PATCH v4 5/5] arch: armv8: fsl-layerscape: export serdes config to environment

2020-01-10 Thread Alex Marginean
Exports the serdes configuration as an environment variable for LS gen 3
SoCs, so it can be used in u-boot command line.  It should particularly
be useful for applying Linux DT overlays for the given serdes
configuration.
This code is called from arch_misc_init and not from the existing
serdes_init function because it depends on U-Boot environment being set
up.

Signed-off-by: Alex Marginean 
---
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig |  1 +
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c   | 14 +
 .../armv8/fsl-layerscape/fsl_lsch3_serdes.c   | 59 +++
 .../include/asm/arch-fsl-layerscape/config.h  |  2 +
 4 files changed, 76 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index ed478ddd48..e2b92f0eab 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -242,6 +242,7 @@ config FSL_LSCH2
select SYS_FSL_SEC_BE
 
 config FSL_LSCH3
+   select ARCH_MISC_INIT
bool
 
 config NXP_LSCH3_2
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c 
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 639f531649..58fe36f3f1 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -1630,3 +1630,17 @@ __weak int dram_init(void)
 
return 0;
 }
+
+#ifdef CONFIG_ARCH_MISC_INIT
+__weak int serdes_misc_init(void)
+{
+   return 0;
+}
+
+int arch_misc_init(void)
+{
+   serdes_misc_init();
+
+   return 0;
+}
+#endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c 
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
index 1a747a9e3d..d143864af1 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
@@ -600,3 +600,62 @@ void fsl_serdes_init(void)
serdes3_prtcl_map);
 #endif
 }
+
+int serdes_set_env(int sd, int rcwsr, int sd_prctl_mask, int sd_prctl_shift)
+{
+   struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+   char scfg[16], snum[16];
+   int cfgr = 0;
+   u32 cfg;
+
+   cfg = gur_in32(&gur->rcwsr[rcwsr - 1]) & sd_prctl_mask;
+   cfg >>= sd_prctl_shift;
+   cfg = serdes_get_number(sd, cfg);
+
+#if defined(SRDS_BITS_PER_LANE)
+   /*
+* reverse lanes, lane 0 should be printed first so it must be moved to
+* high order bits.
+* For example bb58 should read 85bb, lane 0 being protocol 8.
+* This only applies to SoCs that define SRDS_BITS_PER_LANE and have
+* independent per-lane protocol configuration, at this time LS1028A and
+* LS1088A. LS2 and LX2 SoCs encode the full protocol mix across all
+* lanes as a single value.
+*/
+   for (int i = 0; i < SRDS_MAX_LANES; i++) {
+   int tmp;
+
+   tmp = cfg >> (i * SRDS_BITS_PER_LANE);
+   tmp &= GENMASK(SRDS_BITS_PER_LANE - 1, 0);
+   tmp <<= (SRDS_MAX_LANES - i - 1) * SRDS_BITS_PER_LANE;
+   cfgr |= tmp;
+   }
+#endif /* SRDS_BITS_PER_LANE */
+
+   snprintf(snum, 16, "serdes%d", sd);
+   snprintf(scfg, 16, "%x", cfgr);
+   env_set(snum, scfg);
+
+   return 0;
+}
+
+int serdes_misc_init(void)
+{
+#ifdef CONFIG_SYS_FSL_SRDS_1
+   serdes_set_env(FSL_SRDS_1, FSL_CHASSIS3_SRDS1_REGSR,
+  FSL_CHASSIS3_SRDS1_PRTCL_MASK,
+  FSL_CHASSIS3_SRDS1_PRTCL_SHIFT);
+#endif
+#ifdef CONFIG_SYS_FSL_SRDS_2
+   serdes_set_env(FSL_SRDS_2, FSL_CHASSIS3_SRDS2_REGSR,
+  FSL_CHASSIS3_SRDS2_PRTCL_MASK,
+  FSL_CHASSIS3_SRDS2_PRTCL_SHIFT);
+#endif
+#ifdef CONFIG_SYS_NXP_SRDS_3
+   serdes_set_env(NXP_SRDS_3, FSL_CHASSIS3_SRDS3_REGSR,
+  FSL_CHASSIS3_SRDS3_PRTCL_MASK,
+  FSL_CHASSIS3_SRDS3_PRTCL_SHIFT);
+#endif
+
+   return 0;
+}
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h 
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index a83c70ece2..ddd9390df4 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -123,6 +123,7 @@
 #define CONFIG_SYS_PAGE_SIZE   0x1
 
 #defineSRDS_MAX_LANES  4
+#defineSRDS_BITS_PER_LANE  4
 
 /* TZ Protection Controller Definitions */
 #define TZPC_BASE  0x0220
@@ -252,6 +253,7 @@
 #define TZPCDECPROT_2_CLR_BASE (TZPC_BASE + 0x820)
 
 #defineSRDS_MAX_LANES  4
+#defineSRDS_BITS_PER_LANE  4
 
 #define CONFIG_SYS_FSL_OCRAM_BASE  0x1800 /* initial RAM */
 #define SYS_FSL_OCRAM_SPACE_SIZE   0x0020 /* 2M */
-- 
2.17.1



[PATCH v4 4/5] board: fsl: ls1028a: free up arch_misc_init

2020-01-10 Thread Alex Marginean
Currently LS1028A board code uses arch_misc_init to set up the board mux
on QDS.  Move this code to misc_init_r.  This is consistent with LS gen 2
and T series SoCs/boards.

Signed-off-by: Alex Marginean 
---
 arch/arm/Kconfig | 1 -
 board/freescale/ls1028a/ls1028a.c| 4 ++--
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 +
 configs/ls1028aqds_tfa_defconfig | 1 +
 4 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 82bef4fa15..8c850d729d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1321,7 +1321,6 @@ config TARGET_LS1028AQDS
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
select BOARD_LATE_INIT
-   select ARCH_MISC_INIT
help
  Support for Freescale LS1028AQDS platform
  The LS1028A Development System (QDS) is a high-performance
diff --git a/board/freescale/ls1028a/ls1028a.c 
b/board/freescale/ls1028a/ls1028a.c
index 1151e77531..7e55c25192 100644
--- a/board/freescale/ls1028a/ls1028a.c
+++ b/board/freescale/ls1028a/ls1028a.c
@@ -108,8 +108,8 @@ int board_eth_init(bd_t *bis)
return pci_eth_init(bis);
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
 {
config_board_mux();
 
diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index 31e3b5a9b6..2da6bbf5b0 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -17,6 +17,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x200 default_hugepagesz=2m 
hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index 72922120e9..f3cc9c460b 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -18,6 +18,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x200 default_hugepagesz=2m 
hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
-- 
2.17.1



[PATCH v4 3/5] board: fsl: ls1088a: remove empty arch_misc_init

2020-01-10 Thread Alex Marginean
The arch_misc_init function is empty on LS108x SoCs/boards, remove it.

Signed-off-by: Alex Marginean 
---
 arch/arm/Kconfig  | 2 --
 board/freescale/ls1088a/ls1088a.c | 7 ---
 2 files changed, 9 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 38bf420feb..82bef4fa15 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1122,7 +1122,6 @@ config TARGET_LS2080A_SIMU
 config TARGET_LS1088AQDS
bool "Support ls1088aqds"
select ARCH_LS1088A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1344,7 +1343,6 @@ config TARGET_LS1028ARDB
 config TARGET_LS1088ARDB
bool "Support ls1088ardb"
select ARCH_LS1088A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
diff --git a/board/freescale/ls1088a/ls1088a.c 
b/board/freescale/ls1088a/ls1088a.c
index 4ecf6dce68..0bd397a0be 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -811,13 +811,6 @@ void detail_board_ddr_info(void)
print_ddr_info(0);
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
-   return 0;
-}
-#endif
-
 #ifdef CONFIG_FSL_MC_ENET
 void board_quiesce_devices(void)
 {
-- 
2.17.1



[PATCH v4 2/5] board: fsl: ls2080a/ls2081a: remove empty arch_misc_init

2020-01-10 Thread Alex Marginean
The arch_misc_init function is empty on LS2 SoCs/boards, remove it.

Signed-off-by: Alex Marginean 
---
 arch/arm/Kconfig| 5 -
 board/freescale/ls2080a/ls2080a.c   | 7 ---
 board/freescale/ls2080aqds/ls2080aqds.c | 7 ---
 board/freescale/ls2080ardb/ls2080ardb.c | 7 ---
 4 files changed, 26 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 45498180c1..38bf420feb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1098,7 +1098,6 @@ config TARGET_VEXPRESS64_JUNO
 config TARGET_LS2080A_EMU
bool "Support ls2080a_emu"
select ARCH_LS2080A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select FSL_DDR_SYNC_REFRESH
@@ -,7 +1110,6 @@ config TARGET_LS2080A_EMU
 config TARGET_LS2080A_SIMU
bool "Support ls2080a_simu"
select ARCH_LS2080A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select BOARD_LATE_INIT
@@ -1140,7 +1138,6 @@ config TARGET_LS1088AQDS
 config TARGET_LS2080AQDS
bool "Support ls2080aqds"
select ARCH_LS2080A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1159,7 +1156,6 @@ config TARGET_LS2080AQDS
 config TARGET_LS2080ARDB
bool "Support ls2080ardb"
select ARCH_LS2080A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1178,7 +1174,6 @@ config TARGET_LS2080ARDB
 config TARGET_LS2081ARDB
bool "Support ls2081ardb"
select ARCH_LS2080A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select BOARD_LATE_INIT
diff --git a/board/freescale/ls2080a/ls2080a.c 
b/board/freescale/ls2080a/ls2080a.c
index 413a698511..bc68f99625 100644
--- a/board/freescale/ls2080a/ls2080a.c
+++ b/board/freescale/ls2080a/ls2080a.c
@@ -48,13 +48,6 @@ void detail_board_ddr_info(void)
 #endif
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
-   return 0;
-}
-#endif
-
 int board_eth_init(bd_t *bis)
 {
int error = 0;
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c 
b/board/freescale/ls2080aqds/ls2080aqds.c
index 5792a564bc..4034bdee28 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -289,13 +289,6 @@ void detail_board_ddr_info(void)
 #endif
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
-   return 0;
-}
-#endif
-
 #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
 void fdt_fixup_board_enet(void *fdt)
 {
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c 
b/board/freescale/ls2080ardb/ls2080ardb.c
index 6a1b8e3f53..282aaf47fb 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -318,13 +318,6 @@ void detail_board_ddr_info(void)
 #endif
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
-   return 0;
-}
-#endif
-
 #ifdef CONFIG_FSL_MC_ENET
 void fdt_fixup_board_enet(void *fdt)
 {
-- 
2.17.1



[PATCH v3 5/5] arch: armv8: fsl-layerscape: export serdes config to environment

2020-01-10 Thread Alex Marginean
Exports the serdes configuration as an environment variable for LS gen 3
SoCs, so it can be used in u-boot command line.  It should particularly
be useful for applying Linux DT overlays for the given serdes
configuration.
This code is called from arch_misc_init and not from the existing
serdes_init function because it depends on U-Boot environment being set
up.

Signed-off-by: Alex Marginean 
---
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig |  1 +
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c   | 14 +
 .../armv8/fsl-layerscape/fsl_lsch3_serdes.c   | 57 +++
 .../include/asm/arch-fsl-layerscape/config.h  |  2 +
 4 files changed, 74 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index ed478ddd48..e2b92f0eab 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -242,6 +242,7 @@ config FSL_LSCH2
select SYS_FSL_SEC_BE
 
 config FSL_LSCH3
+   select ARCH_MISC_INIT
bool
 
 config NXP_LSCH3_2
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c 
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 639f531649..58fe36f3f1 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -1630,3 +1630,17 @@ __weak int dram_init(void)
 
return 0;
 }
+
+#ifdef CONFIG_ARCH_MISC_INIT
+__weak int serdes_misc_init(void)
+{
+   return 0;
+}
+
+int arch_misc_init(void)
+{
+   serdes_misc_init();
+
+   return 0;
+}
+#endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c 
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
index 1a747a9e3d..b5ce83b77c 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
@@ -600,3 +600,60 @@ void fsl_serdes_init(void)
serdes3_prtcl_map);
 #endif
 }
+
+int serdes_set_env(int sd, int rcwsr, int sd_prctl_mask, int sd_prctl_shift)
+{
+   struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+   char scfg[16], snum[16];
+   int i, cfgr = 0, tmp;
+   u32 cfg;
+
+   cfg = gur_in32(&gur->rcwsr[rcwsr - 1]) & sd_prctl_mask;
+   cfg >>= sd_prctl_shift;
+   cfg = serdes_get_number(sd, cfg);
+
+#if defined(SRDS_BITS_PER_LANE)
+   /*
+* reverse lanes, lane 0 should be printed first so it must be moved to
+* high order bits.
+* For example bb58 should read 85bb, lane 0 being protocol 8.
+* This only applies to SoCs that define SRDS_BITS_PER_LANE and have
+* independent per-lane protocol configuration, at this time LS1028A and
+* LS1088A. LS2 and LX2 SoCs encode the full protocol mix across all
+* lanes as a single value.
+*/
+   for (i = 0; i < SRDS_MAX_LANES; i++) {
+   tmp = cfg >> (i * SRDS_BITS_PER_LANE);
+   tmp &= GENMASK(SRDS_BITS_PER_LANE - 1, 0);
+   tmp <<= (SRDS_MAX_LANES - i - 1) * SRDS_BITS_PER_LANE;
+   cfgr |= tmp;
+   }
+#endif /* SRDS_BITS_PER_LANE */
+
+   snprintf(snum, 16, "serdes%d", sd);
+   snprintf(scfg, 16, "%x", cfgr);
+   env_set(snum, scfg);
+
+   return 0;
+}
+
+int serdes_misc_init(void)
+{
+#ifdef CONFIG_SYS_FSL_SRDS_1
+   serdes_set_env(FSL_SRDS_1, FSL_CHASSIS3_SRDS1_REGSR,
+  FSL_CHASSIS3_SRDS1_PRTCL_MASK,
+  FSL_CHASSIS3_SRDS1_PRTCL_SHIFT);
+#endif
+#ifdef CONFIG_SYS_FSL_SRDS_2
+   serdes_set_env(FSL_SRDS_2, FSL_CHASSIS3_SRDS2_REGSR,
+  FSL_CHASSIS3_SRDS2_PRTCL_MASK,
+  FSL_CHASSIS3_SRDS2_PRTCL_SHIFT);
+#endif
+#ifdef CONFIG_SYS_NXP_SRDS_3
+   serdes_set_env(NXP_SRDS_3, FSL_CHASSIS3_SRDS3_REGSR,
+  FSL_CHASSIS3_SRDS3_PRTCL_MASK,
+  FSL_CHASSIS3_SRDS3_PRTCL_SHIFT);
+#endif
+
+   return 0;
+}
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h 
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index a83c70ece2..ddd9390df4 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -123,6 +123,7 @@
 #define CONFIG_SYS_PAGE_SIZE   0x1
 
 #defineSRDS_MAX_LANES  4
+#defineSRDS_BITS_PER_LANE  4
 
 /* TZ Protection Controller Definitions */
 #define TZPC_BASE  0x0220
@@ -252,6 +253,7 @@
 #define TZPCDECPROT_2_CLR_BASE (TZPC_BASE + 0x820)
 
 #defineSRDS_MAX_LANES  4
+#defineSRDS_BITS_PER_LANE  4
 
 #define CONFIG_SYS_FSL_OCRAM_BASE  0x1800 /* initial RAM */
 #define SYS_FSL_OCRAM_SPACE_SIZE   0x0020 /* 2M */
-- 
2.17.1



[PATCH v3 4/5] board: fsl: ls1028a: free up arch_misc_init

2020-01-10 Thread Alex Marginean
Currently LS1028A board code uses arch_misc_init to set up the board mux
on QDS.  Move this code to misc_init_r.  This is consistent with LS gen 2
and T series SoCs/boards.

Signed-off-by: Alex Marginean 
---
 arch/arm/Kconfig | 1 -
 board/freescale/ls1028a/ls1028a.c| 4 ++--
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 +
 configs/ls1028aqds_tfa_defconfig | 1 +
 4 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 82bef4fa15..8c850d729d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1321,7 +1321,6 @@ config TARGET_LS1028AQDS
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
select BOARD_LATE_INIT
-   select ARCH_MISC_INIT
help
  Support for Freescale LS1028AQDS platform
  The LS1028A Development System (QDS) is a high-performance
diff --git a/board/freescale/ls1028a/ls1028a.c 
b/board/freescale/ls1028a/ls1028a.c
index 1151e77531..7e55c25192 100644
--- a/board/freescale/ls1028a/ls1028a.c
+++ b/board/freescale/ls1028a/ls1028a.c
@@ -108,8 +108,8 @@ int board_eth_init(bd_t *bis)
return pci_eth_init(bis);
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
 {
config_board_mux();
 
diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index 31e3b5a9b6..2da6bbf5b0 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -17,6 +17,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x200 default_hugepagesz=2m 
hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index 72922120e9..f3cc9c460b 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -18,6 +18,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x200 default_hugepagesz=2m 
hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
-- 
2.17.1



[PATCH v3 2/5] board: fsl: ls2080a/ls2081a: remove empty arch_misc_init

2020-01-10 Thread Alex Marginean
The arch_misc_init function is empty on LS2 SoCs/boards, remove it.

Signed-off-by: Alex Marginean 
---
 arch/arm/Kconfig| 5 -
 board/freescale/ls2080a/ls2080a.c   | 7 ---
 board/freescale/ls2080aqds/ls2080aqds.c | 7 ---
 board/freescale/ls2080ardb/ls2080ardb.c | 7 ---
 4 files changed, 26 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 45498180c1..38bf420feb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1098,7 +1098,6 @@ config TARGET_VEXPRESS64_JUNO
 config TARGET_LS2080A_EMU
bool "Support ls2080a_emu"
select ARCH_LS2080A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select FSL_DDR_SYNC_REFRESH
@@ -,7 +1110,6 @@ config TARGET_LS2080A_EMU
 config TARGET_LS2080A_SIMU
bool "Support ls2080a_simu"
select ARCH_LS2080A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select BOARD_LATE_INIT
@@ -1140,7 +1138,6 @@ config TARGET_LS1088AQDS
 config TARGET_LS2080AQDS
bool "Support ls2080aqds"
select ARCH_LS2080A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1159,7 +1156,6 @@ config TARGET_LS2080AQDS
 config TARGET_LS2080ARDB
bool "Support ls2080ardb"
select ARCH_LS2080A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1178,7 +1174,6 @@ config TARGET_LS2080ARDB
 config TARGET_LS2081ARDB
bool "Support ls2081ardb"
select ARCH_LS2080A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select BOARD_LATE_INIT
diff --git a/board/freescale/ls2080a/ls2080a.c 
b/board/freescale/ls2080a/ls2080a.c
index 413a698511..bc68f99625 100644
--- a/board/freescale/ls2080a/ls2080a.c
+++ b/board/freescale/ls2080a/ls2080a.c
@@ -48,13 +48,6 @@ void detail_board_ddr_info(void)
 #endif
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
-   return 0;
-}
-#endif
-
 int board_eth_init(bd_t *bis)
 {
int error = 0;
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c 
b/board/freescale/ls2080aqds/ls2080aqds.c
index 5792a564bc..4034bdee28 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -289,13 +289,6 @@ void detail_board_ddr_info(void)
 #endif
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
-   return 0;
-}
-#endif
-
 #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
 void fdt_fixup_board_enet(void *fdt)
 {
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c 
b/board/freescale/ls2080ardb/ls2080ardb.c
index 6a1b8e3f53..282aaf47fb 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -318,13 +318,6 @@ void detail_board_ddr_info(void)
 #endif
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
-   return 0;
-}
-#endif
-
 #ifdef CONFIG_FSL_MC_ENET
 void fdt_fixup_board_enet(void *fdt)
 {
-- 
2.17.1



[PATCH v3 3/5] board: fsl: ls1088a: remove empty arch_misc_init

2020-01-10 Thread Alex Marginean
The arch_misc_init function is empty on LS108x SoCs/boards, remove it.

Signed-off-by: Alex Marginean 
---
 arch/arm/Kconfig  | 2 --
 board/freescale/ls1088a/ls1088a.c | 7 ---
 2 files changed, 9 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 38bf420feb..82bef4fa15 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1122,7 +1122,6 @@ config TARGET_LS2080A_SIMU
 config TARGET_LS1088AQDS
bool "Support ls1088aqds"
select ARCH_LS1088A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1344,7 +1343,6 @@ config TARGET_LS1028ARDB
 config TARGET_LS1088ARDB
bool "Support ls1088ardb"
select ARCH_LS1088A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
diff --git a/board/freescale/ls1088a/ls1088a.c 
b/board/freescale/ls1088a/ls1088a.c
index 4ecf6dce68..0bd397a0be 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -811,13 +811,6 @@ void detail_board_ddr_info(void)
print_ddr_info(0);
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
-   return 0;
-}
-#endif
-
 #ifdef CONFIG_FSL_MC_ENET
 void board_quiesce_devices(void)
 {
-- 
2.17.1



[PATCH v3 1/5] board: fsl: lx2160a: free up arch_misc_init

2020-01-10 Thread Alex Marginean
Currently LX2 board code uses arch_misc_init to set up the board mux on
RDB and QDS.  Move this code to misc_init_r.  This is consistent with LS
gen 2 and T series SoCs/boards.

Signed-off-by: Alex Marginean 
---
 arch/arm/Kconfig | 2 --
 board/freescale/lx2160a/lx2160a.c| 4 ++--
 configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 +
 configs/lx2160aqds_tfa_defconfig | 1 +
 configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 +
 configs/lx2160ardb_tfa_defconfig | 1 +
 6 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 76365ef313..45498180c1 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1192,7 +1192,6 @@ config TARGET_LS2081ARDB
 config TARGET_LX2160ARDB
bool "Support lx2160ardb"
select ARCH_LX2160A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1206,7 +1205,6 @@ config TARGET_LX2160ARDB
 config TARGET_LX2160AQDS
bool "Support lx2160aqds"
select ARCH_LX2160A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
diff --git a/board/freescale/lx2160a/lx2160a.c 
b/board/freescale/lx2160a/lx2160a.c
index e5b7fec9a4..084ee162f0 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -579,8 +579,8 @@ void detail_board_ddr_info(void)
print_ddr_info(0);
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
 {
config_board_mux();
 
diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig 
b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
index 4858f666da..2b45132103 100644
--- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
@@ -16,6 +16,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m 
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
 # CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_GPT=y
diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig
index 167c517050..0ea22a912d 100644
--- a/configs/lx2160aqds_tfa_defconfig
+++ b/configs/lx2160aqds_tfa_defconfig
@@ -17,6 +17,7 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m 
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
 # CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_GPT=y
diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig 
b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
index 87459dd383..379763c28e 100644
--- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
@@ -17,6 +17,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m 
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
 # CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_GPT=y
diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig
index f6cf1aca8e..cf9678e7e1 100644
--- a/configs/lx2160ardb_tfa_defconfig
+++ b/configs/lx2160ardb_tfa_defconfig
@@ -18,6 +18,7 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m 
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
 # CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_GPT=y
-- 
2.17.1



[PATCH v3 0/5] FSL/Layerscape gen 3: export serdes cfg to env

2020-01-10 Thread Alex Marginean
Exports the serdes configuration as an environment variable for LS gen 3
SoCs, so it can be used in u-boot command line.  It should particularly be
useful for applying Linux DT overlays for the given serdes configuration.
First 4 patches free up arch_misc_init, which is now implemented in
arch/arm/cpu/armv8/fsl-layerscape/cpu.c.  For LS1028A and LX2 the
board_mux_init code is now under misc_init_r.  MISC_INIT_R is now enabled
for the relavant boards.

Changes in v2:
  - s/emtpy/empty/ in description of two of the patches

Changes in v3:
  - Only revert serdes number for SoCs that encode the protocol on each lane
(LS1028 and LS1088).  For the others (LS2, LX2) leave the number unchanged.
In previous versions for instance LX2 serdes read 9000 instead of 9.

This set replaces v2:
  https://patchwork.ozlabs.org/project/uboot/list/?series=146468

Alex Marginean (5):
  board: fsl: lx2160a: free up arch_misc_init
  board: fsl: ls2080a/ls2081a: remove empty arch_misc_init
  board: fsl: ls1088a: remove empty arch_misc_init
  board: fsl: ls1028a: free up arch_misc_init
  arch: armv8: fsl-layerscape: export serdes config to environment

 arch/arm/Kconfig  | 10 -
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig |  1 +
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c   | 14 +++
 .../armv8/fsl-layerscape/fsl_lsch3_serdes.c   | 42 +++
 board/freescale/ls1028a/ls1028a.c |  4 +-
 board/freescale/ls1088a/ls1088a.c |  7 
 board/freescale/ls2080a/ls2080a.c |  7 
 board/freescale/ls2080aqds/ls2080aqds.c   |  7 
 board/freescale/ls2080ardb/ls2080ardb.c   |  7 
 board/freescale/lx2160a/lx2160a.c |  4 +-
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig  |  1 +
 configs/ls1028aqds_tfa_defconfig  |  1 +
 configs/lx2160aqds_tfa_SECURE_BOOT_defconfig  |  1 +
 configs/lx2160aqds_tfa_defconfig  |  1 +
 configs/lx2160ardb_tfa_SECURE_BOOT_defconfig  |  1 +
 configs/lx2160ardb_tfa_defconfig  |  1 +
 16 files changed, 67 insertions(+), 42 deletions(-)

-- 
2.17.1



[PATCH v2] armv8: ls1028a_serdes: add a few missing serdes protocols to supported list

2020-01-10 Thread Alex Marginean
These protocols are supported and functional but they trigger a warning
in U-Boot console at boot because they are not on this list.

Signed-off-by: Alex Marginean 
---

Changes in v2:
 - added one more, 65bb
 - changed subject

This patch replaces v1:
 https://patchwork.ozlabs.org/patch/1220248/

 arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c 
b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
index 313f3f1e8a..80d2910f67 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
@@ -35,6 +35,10 @@ static struct serdes_config serdes1_cfg_tbl[] = {
{0xEB58, {SGMII_T1, QSGMII_B, PCIE2, SATA1} },
{0xEB8B, {PCIE1, SGMII_T1, PCIE2, SATA1} },
{0xE8CC, {PCIE1, PCIE1, SGMII_T1, SATA1} },
+   {0x, {SGMII1, SGMII2, SGMII3, SGMII4} },
+   {0x, {SGMII1, SGMII2, SGMII3, SGMII4} },
+   {0xb998, {SGMII_T1, SGMII2, SGMII3, PCIE1} },
+   {0xbb56, {SGMII_T1, QSGMII_B, PCIE2, PCIE1} },
{}
 };
 
-- 
2.17.1



[PATCH] drivers: net: fsl_enetc: fix SXGMII MAC configuration

2020-01-10 Thread Alex Marginean
Separate MAC and serdes configuration, MAC configuration must be applied
at each enetc_start() as FLR clears it.
This restores traffic for ENETC interfaces in USXGMII mode.

Signed-off-by: Alex Marginean 
---
 drivers/net/fsl_enetc.c | 36 +---
 1 file changed, 25 insertions(+), 11 deletions(-)

diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c
index 02c1ee70d9..a6ed0f3b3c 100644
--- a/drivers/net/fsl_enetc.c
+++ b/drivers/net/fsl_enetc.c
@@ -122,16 +122,34 @@ static int enetc_init_rgmii(struct udevice *dev)
return 0;
 }
 
-/* set up MAC and serdes for SXGMII */
-static int enetc_init_sxgmii(struct udevice *dev)
+/* set up MAC configuration for the given interface type */
+static void enetc_setup_mac_iface(struct udevice *dev)
 {
struct enetc_priv *priv = dev_get_priv(dev);
u32 if_mode;
 
-   /* set ifmode to (US)XGMII */
-   if_mode = enetc_read_port(priv, ENETC_PM_IF_MODE);
-   if_mode &= ~ENETC_PM_IF_IFMODE_MASK;
-   enetc_write_port(priv, ENETC_PM_IF_MODE, if_mode);
+   switch (priv->if_type) {
+   case PHY_INTERFACE_MODE_RGMII:
+   case PHY_INTERFACE_MODE_RGMII_ID:
+   case PHY_INTERFACE_MODE_RGMII_RXID:
+   case PHY_INTERFACE_MODE_RGMII_TXID:
+   enetc_init_rgmii(dev);
+   break;
+   case PHY_INTERFACE_MODE_XGMII:
+   case PHY_INTERFACE_MODE_USXGMII:
+   case PHY_INTERFACE_MODE_XFI:
+   /* set ifmode to (US)XGMII */
+   if_mode = enetc_read_port(priv, ENETC_PM_IF_MODE);
+   if_mode &= ~ENETC_PM_IF_IFMODE_MASK;
+   enetc_write_port(priv, ENETC_PM_IF_MODE, if_mode);
+   break;
+   };
+}
+
+/* set up serdes for SXGMII */
+static int enetc_init_sxgmii(struct udevice *dev)
+{
+   struct enetc_priv *priv = dev_get_priv(dev);
 
if (!enetc_has_imdio(dev))
return 0;
@@ -425,11 +443,7 @@ static int enetc_start(struct udevice *dev)
enetc_setup_tx_bdr(dev);
enetc_setup_rx_bdr(dev);
 
-   if (priv->if_type == PHY_INTERFACE_MODE_RGMII ||
-   priv->if_type == PHY_INTERFACE_MODE_RGMII_ID ||
-   priv->if_type == PHY_INTERFACE_MODE_RGMII_RXID ||
-   priv->if_type == PHY_INTERFACE_MODE_RGMII_TXID)
-   enetc_init_rgmii(dev);
+   enetc_setup_mac_iface(dev);
 
if (priv->phy)
phy_startup(priv->phy);
-- 
2.17.1



[PATCH] armv8: ls1028a_serdes: add 7777, 9999, 899b to the list of serdes protocols

2020-01-09 Thread Alex Marginean
These protocols are supported and functional but they trigger a warning
in U-Boot console at boot because they are not on this list.

Signed-off-by: Alex Marginean 
---
 arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c 
b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
index 313f3f1e8a..e2aaa23f69 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
@@ -35,6 +35,9 @@ static struct serdes_config serdes1_cfg_tbl[] = {
{0xEB58, {SGMII_T1, QSGMII_B, PCIE2, SATA1} },
{0xEB8B, {PCIE1, SGMII_T1, PCIE2, SATA1} },
{0xE8CC, {PCIE1, PCIE1, SGMII_T1, SATA1} },
+   {0x, {SGMII1, SGMII2, SGMII3, SGMII4} },
+   {0x, {SGMII1, SGMII2, SGMII3, SGMII4} },
+   {0xb998, {SGMII_T1, SGMII2, SGMII3, PCIE1} },
{}
 };
 
-- 
2.17.1



[PATCH v2] net: phy: add XFI, USXGMII types to is_10g_interface() helper

2020-01-09 Thread Alex Marginean
The helper is used to reset PHYs on connect and it determines the clause
to use (C22/C45) based on interface type.  This fixes 'PHY reset timed out'
warnings in console for USXGMII/XFI PHYs.

Signed-off-by: Alex Marginean 
---

Changes in v2:
 - updated helper comment, I missed that in v1

replaces v1:
https://patchwork.ozlabs.org/patch/1219697/

 include/phy.h | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/include/phy.h b/include/phy.h
index 6ace9b3a0c..876b4a9c8e 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -246,10 +246,15 @@ static inline int phy_write_mmd(struct phy_device 
*phydev, int devad,
 #ifdef CONFIG_PHYLIB_10G
 extern struct phy_driver gen10g_driver;
 
-/* For now, XGMII is the only 10G interface */
+/*
+ * List all 10G interfaces here, the assumption being that PHYs on these
+ * interfaces are C45
+ */
 static inline int is_10g_interface(phy_interface_t interface)
 {
-   return interface == PHY_INTERFACE_MODE_XGMII;
+   return interface == PHY_INTERFACE_MODE_XGMII ||
+  interface == PHY_INTERFACE_MODE_USXGMII ||
+  interface == PHY_INTERFACE_MODE_XFI;
 }
 
 #endif
-- 
2.17.1



[PATCH] net: phy: add XFI, USXGMII types to is_10g_interface helper

2020-01-08 Thread Alex Marginean
The helper is used to reset PHYs on connect and it determines the clause
to use (c22/c45) based on interface type.  This fixes 'PHY reset timed out'
warnings in console for USXGMII/XFI PHYs.

Signed-off-by: Alex Marginean 
---
 include/phy.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/include/phy.h b/include/phy.h
index 6ace9b3a0c..8debb28fad 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -249,7 +249,9 @@ extern struct phy_driver gen10g_driver;
 /* For now, XGMII is the only 10G interface */
 static inline int is_10g_interface(phy_interface_t interface)
 {
-   return interface == PHY_INTERFACE_MODE_XGMII;
+   return interface == PHY_INTERFACE_MODE_XGMII ||
+  interface == PHY_INTERFACE_MODE_USXGMII ||
+  interface == PHY_INTERFACE_MODE_XFI;
 }
 
 #endif
-- 
2.17.1



[PATCH] drivers: net: bcm-sf2: pass -1 to phy_connect()

2019-12-19 Thread Alex Marginean
Passing 0 to PHY connect used to trigger a MDIO scan due to a bug fixed in
the meantime.  It's unclear if bcm-sf2 wants to connect to PHY @ addr 0 or
is scanning the bus, passing -1 here should keep it functional either way.

Signed-off-by: Alex Marginean 
Cc: Jiandong Zheng 
---
 drivers/net/bcm-sf2-eth.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/bcm-sf2-eth.c b/drivers/net/bcm-sf2-eth.c
index 615037f1a3..11f937032f 100644
--- a/drivers/net/bcm-sf2-eth.c
+++ b/drivers/net/bcm-sf2-eth.c
@@ -50,7 +50,7 @@ static int bcm_sf2_eth_init(struct eth_device *dev)
eth->port_num = 0;
debug("Connecting PHY 0...\n");
phydev = phy_connect(miiphy_get_dev_by_name(dev->name),
-0, dev, eth->phy_interface);
+-1, dev, eth->phy_interface);
if (phydev != NULL) {
eth->port[0] = phydev;
eth->port_num += 1;
-- 
2.17.1



[PATCH v2] drivers: net: fsl_enetc: Pass on primary MAC address to Linux

2019-12-10 Thread Alex Marginean
Passes on the primary address used by u-boot to Linux.  The code does a DT
fix-up for ENETC PFs and sets the primary MAC address in IERB.  The address
in IERB is restored on ENETC PCI functions at FLR.

Signed-off-by: Alex Marginean 
---

The code is called fom ft_board_setup in board/freescale/ls1028a/ls1028a.c
mostly for consistency with other LS parts.  I'm open to suggestions though.

Changes in v2:
 - fixed warning for fdt_fixup_enetc_mac being implicitly declared

 board/freescale/ls1028a/ls1028a.c |  5 +++
 drivers/net/fsl_enetc.c   | 65 ++-
 drivers/net/fsl_enetc.h   |  3 ++
 3 files changed, 72 insertions(+), 1 deletion(-)

diff --git a/board/freescale/ls1028a/ls1028a.c 
b/board/freescale/ls1028a/ls1028a.c
index a9606b8865..1a82c95402 100644
--- a/board/freescale/ls1028a/ls1028a.c
+++ b/board/freescale/ls1028a/ls1028a.c
@@ -25,6 +25,7 @@
 #include 
 #include 
 #include "../common/qixis.h"
+#include "../drivers/net/fsl_enetc.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -150,6 +151,10 @@ int ft_board_setup(void *blob, bd_t *bd)
 
fdt_fixup_icid(blob);
 
+#ifdef CONFIG_FSL_ENETC
+   fdt_fixup_enetc_mac(blob);
+#endif
+
return 0;
 }
 #endif
diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c
index 0ca7e838a8..3c043888db 100644
--- a/drivers/net/fsl_enetc.c
+++ b/drivers/net/fsl_enetc.c
@@ -14,6 +14,69 @@
 
 #include "fsl_enetc.h"
 
+#define ENETC_DRIVER_NAME  "enetc_eth"
+
+/*
+ * sets the MAC address in IERB registers, this setting is persistent and
+ * carried over to Linux.
+ */
+static void enetc_set_ierb_primary_mac(struct udevice *dev, int devfn,
+  const u8 *enetaddr)
+{
+#ifdef CONFIG_ARCH_LS1028A
+/*
+ * LS1028A is the only part with IERB at this time and there are plans to 
change
+ * its structure, keep this LS1028A specific for now
+ */
+#define IERB_BASE  0x1f080ULL
+#define IERB_PFMAC(pf, vf, n)  (IERB_BASE + 0x8000 + (pf) * 0x100 + (vf) * 8 \
++ (n) * 4)
+
+static int ierb_fn_to_pf[] = {0, 1, 2, -1, -1, -1, 3};
+
+   u16 lower = *(const u16 *)(enetaddr + 4);
+   u32 upper = *(const u32 *)enetaddr;
+
+   if (ierb_fn_to_pf[devfn] < 0)
+   return;
+
+   out_le32(IERB_PFMAC(ierb_fn_to_pf[devfn], 0, 0), upper);
+   out_le32(IERB_PFMAC(ierb_fn_to_pf[devfn], 0, 1), (u32)lower);
+#endif
+}
+
+/* sets up primary MAC addresses in DT/IERB */
+void fdt_fixup_enetc_mac(void *blob)
+{
+   struct pci_child_platdata *ppdata;
+   struct eth_pdata *pdata;
+   struct udevice *dev;
+   struct uclass *uc;
+   char path[256];
+   int offset;
+   int devfn;
+
+   uclass_get(UCLASS_ETH, &uc);
+   uclass_foreach_dev(dev, uc) {
+   if (!dev->driver || !dev->driver->name ||
+   strcmp(dev->driver->name, ENETC_DRIVER_NAME))
+   continue;
+
+   pdata = dev_get_platdata(dev);
+   ppdata = dev_get_parent_platdata(dev);
+   devfn = PCI_FUNC(ppdata->devfn);
+
+   enetc_set_ierb_primary_mac(dev, devfn, pdata->enetaddr);
+
+   snprintf(path, 256, "/soc/pcie@1f000/ethernet@%x,%x",
+PCI_DEV(ppdata->devfn), PCI_FUNC(ppdata->devfn));
+   offset = fdt_path_offset(blob, path);
+   if (offset < 0)
+   continue;
+   fdt_setprop(blob, offset, "mac-address", pdata->enetaddr, 6);
+   }
+}
+
 /*
  * Bind the device:
  * - set a more explicit name on the interface
@@ -583,7 +646,7 @@ static const struct eth_ops enetc_ops = {
 };
 
 U_BOOT_DRIVER(eth_enetc) = {
-   .name   = "enetc_eth",
+   .name   = ENETC_DRIVER_NAME,
.id = UCLASS_ETH,
.bind   = enetc_bind,
.probe  = enetc_probe,
diff --git a/drivers/net/fsl_enetc.h b/drivers/net/fsl_enetc.h
index 0bb4cdff47..e441891468 100644
--- a/drivers/net/fsl_enetc.h
+++ b/drivers/net/fsl_enetc.h
@@ -226,4 +226,7 @@ int enetc_mdio_read_priv(struct enetc_mdio_priv *priv, int 
addr, int devad,
 int enetc_mdio_write_priv(struct enetc_mdio_priv *priv, int addr, int devad,
  int reg, u16 val);
 
+/* sets up primary MAC addresses in DT/IERB */
+void fdt_fixup_enetc_mac(void *blob);
+
 #endif /* _ENETC_H */
-- 
2.17.1



[PATCH] drivers: net: fsl_enetc: Pass on primary MAC address to Linux

2019-12-10 Thread Alex Marginean
Passes on the primary address used by u-boot to Linux.  The code does a DT
fix-up for ENETC PFs and sets the primary MAC address in IERB.  The address
in IERB is restored on ENETC PCI functions at FLR.

Signed-off-by: Alex Marginean 
---

The code is called fom ft_board_setup in board/freescale/ls1028a/ls1028a.c
mostly for consistency with other LS parts.  I'm open to suggestions though.

 board/freescale/ls1028a/ls1028a.c |  4 ++
 drivers/net/fsl_enetc.c   | 65 ++-
 2 files changed, 68 insertions(+), 1 deletion(-)

diff --git a/board/freescale/ls1028a/ls1028a.c 
b/board/freescale/ls1028a/ls1028a.c
index 3977ecf896..fac03f55e9 100644
--- a/board/freescale/ls1028a/ls1028a.c
+++ b/board/freescale/ls1028a/ls1028a.c
@@ -150,6 +150,10 @@ int ft_board_setup(void *blob, bd_t *bd)
 
fdt_fixup_icid(blob);
 
+#ifdef CONFIG_FSL_ENETC
+   fdt_fixup_enetc_mac(blob);
+#endif
+
return 0;
 }
 #endif
diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c
index 02c1ee70d9..f8fe7d4d8d 100644
--- a/drivers/net/fsl_enetc.c
+++ b/drivers/net/fsl_enetc.c
@@ -14,6 +14,69 @@
 
 #include "fsl_enetc.h"
 
+#define ENETC_DRIVER_NAME  "enetc_eth"
+
+/*
+ * sets the MAC address in IERB registers, this setting is persistent and
+ * carried over to Linux.
+ */
+static void enetc_set_ierb_primary_mac(struct udevice *dev, int devfn,
+  const u8 *enetaddr)
+{
+#ifdef CONFIG_ARCH_LS1028A
+/*
+ * LS1028A is the only part with IERB at this time and there are plans to 
change
+ * its structure, keep this LS1028A specific for now
+ */
+#define IERB_BASE  0x1f080ULL
+#define IERB_PFMAC(pf, vf, n)  (IERB_BASE + 0x8000 + (pf) * 0x100 + (vf) * 8 \
++ (n) * 4)
+
+static int ierb_fn_to_pf[] = {0, 1, 2, -1, -1, -1, 3};
+
+   u16 lower = *(const u16 *)(enetaddr + 4);
+   u32 upper = *(const u32 *)enetaddr;
+
+   if (ierb_fn_to_pf[devfn] < 0)
+   return;
+
+   out_le32(IERB_PFMAC(ierb_fn_to_pf[devfn], 0, 0), upper);
+   out_le32(IERB_PFMAC(ierb_fn_to_pf[devfn], 0, 1), (u32)lower);
+#endif
+}
+
+/* sets up primary MAC addresses in DT/IERB */
+void fdt_fixup_enetc_mac(void *blob)
+{
+   struct pci_child_platdata *ppdata;
+   struct eth_pdata *pdata;
+   struct udevice *dev;
+   struct uclass *uc;
+   char path[256];
+   int offset;
+   int devfn;
+
+   uclass_get(UCLASS_ETH, &uc);
+   uclass_foreach_dev(dev, uc) {
+   if (!dev->driver || !dev->driver->name ||
+   strcmp(dev->driver->name, ENETC_DRIVER_NAME))
+   continue;
+
+   pdata = dev_get_platdata(dev);
+   ppdata = dev_get_parent_platdata(dev);
+   devfn = PCI_FUNC(ppdata->devfn);
+
+   enetc_set_ierb_primary_mac(dev, devfn, pdata->enetaddr);
+
+   snprintf(path, 256, "/soc/pcie@1f000/ethernet@%x,%x",
+PCI_DEV(ppdata->devfn), PCI_FUNC(ppdata->devfn));
+   offset = fdt_path_offset(blob, path);
+   if (offset < 0)
+   continue;
+   fdt_setprop(blob, offset, "mac-address", pdata->enetaddr, 6);
+   }
+}
+
 /*
  * Bind the device:
  * - set a more explicit name on the interface
@@ -551,7 +614,7 @@ static const struct eth_ops enetc_ops = {
 };
 
 U_BOOT_DRIVER(eth_enetc) = {
-   .name   = "enetc_eth",
+   .name   = ENETC_DRIVER_NAME,
.id = UCLASS_ETH,
.bind   = enetc_bind,
.probe  = enetc_probe,
-- 
2.17.1



[PATCH v2 5/5] arch: armv8: fsl-layerscape: export serdes config to environment

2019-12-04 Thread Alex Marginean
Exports the serdes configuration as an environment variable for LS gen 3
SoCs, so it can be used in u-boot command line.  It should particularly
be useful for applying Linux DT overlays for the given serdes
configuration.
This code is called from arch_misc_init and not from the existing
serdes_init function because it depends on U-Boot environment being set
up.

Signed-off-by: Alex Marginean 
---
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig |  1 +
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c   | 14 ++
 .../armv8/fsl-layerscape/fsl_lsch3_serdes.c   | 43 +++
 3 files changed, 58 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index f1578b10bc..40cbea0e12 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -241,6 +241,7 @@ config FSL_LSCH2
select SYS_FSL_SEC_BE
 
 config FSL_LSCH3
+   select ARCH_MISC_INIT
bool
 
 config NXP_LSCH3_2
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c 
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index c6490556e6..ddbc07037f 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -1627,3 +1627,17 @@ __weak int dram_init(void)
 
return 0;
 }
+
+#ifdef CONFIG_ARCH_MISC_INIT
+__weak int serdes_misc_init(void)
+{
+   return 0;
+}
+
+int arch_misc_init(void)
+{
+   serdes_misc_init();
+
+   return 0;
+}
+#endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c 
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
index 1a747a9e3d..8b9f5a4e29 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
@@ -600,3 +600,46 @@ void fsl_serdes_init(void)
serdes3_prtcl_map);
 #endif
 }
+
+int serdes_set_env(int sd, int rcwsr, int sd_prctl_mask, int sd_prctl_shift)
+{
+   struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+   char scfg[16], snum[16];
+   int i, cfgr = 0;
+   u32 cfg;
+
+   cfg = gur_in32(&gur->rcwsr[rcwsr - 1]) & sd_prctl_mask;
+   cfg >>= sd_prctl_shift;
+   cfg = serdes_get_number(sd, cfg);
+
+   /* reverse lanes, lane 0 should be printed first */
+   for (i = 0; i < SRDS_MAX_LANES; i++)
+   cfgr |= (cfg >> (i * 4) & 0xf) << (SRDS_MAX_LANES - i - 1) * 4;
+
+   snprintf(snum, 16, "serdes%d", sd);
+   snprintf(scfg, 16, "%x", cfgr);
+   env_set(snum, scfg);
+
+   return 0;
+}
+
+int serdes_misc_init(void)
+{
+#ifdef CONFIG_SYS_FSL_SRDS_1
+   serdes_set_env(FSL_SRDS_1, FSL_CHASSIS3_SRDS1_REGSR,
+  FSL_CHASSIS3_SRDS1_PRTCL_MASK,
+  FSL_CHASSIS3_SRDS1_PRTCL_SHIFT);
+#endif
+#ifdef CONFIG_SYS_FSL_SRDS_2
+   serdes_set_env(FSL_SRDS_2, FSL_CHASSIS3_SRDS2_REGSR,
+  FSL_CHASSIS3_SRDS2_PRTCL_MASK,
+  FSL_CHASSIS3_SRDS2_PRTCL_SHIFT);
+#endif
+#ifdef CONFIG_SYS_NXP_SRDS_3
+   serdes_set_env(NXP_SRDS_3, FSL_CHASSIS3_SRDS3_REGSR,
+  FSL_CHASSIS3_SRDS3_PRTCL_MASK,
+  FSL_CHASSIS3_SRDS3_PRTCL_SHIFT);
+#endif
+
+   return 0;
+}
-- 
2.17.1



[PATCH 2/2] drivers: net: phy: aquantia: make it less verbose

2019-12-04 Thread Alex Marginean
The driver now unconditionally prints some information that's not
universally useful.  Replace printf with debug.

Signed-off-by: Alex Marginean 
---
 drivers/net/phy/aquantia.c | 24 
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c
index 2af09907a1..aa0deb1f78 100644
--- a/drivers/net/phy/aquantia.c
+++ b/drivers/net/phy/aquantia.c
@@ -409,9 +409,9 @@ int aquantia_config(struct phy_device *phydev)
fault = phy_read(phydev, MDIO_MMD_VEND1, GLOBAL_FAULT);
 
if (id != 0)
-   printf("%s running firmware version %X.%X.%X\n",
-  phydev->dev->name, (id >> 8), id & 0xff,
-  (rstatus >> 4) & 0xf);
+   debug("%s running firmware version %X.%X.%X\n",
+ phydev->dev->name, (id >> 8), id & 0xff,
+ (rstatus >> 4) & 0xf);
 
if (fault != 0)
printf("%s fault 0x%04x detected\n", phydev->dev->name, fault);
@@ -492,12 +492,12 @@ int aquantia_config(struct phy_device *phydev)
 
if (usx_an) {
reg_val1 |= AQUANTIA_USX_AUTONEG_CONTROL_ENA;
-   printf("%s: system interface USXGMII\n",
-  phydev->dev->name);
+   debug("%s: system interface USXGMII\n",
+ phydev->dev->name);
} else {
reg_val1 &= ~AQUANTIA_USX_AUTONEG_CONTROL_ENA;
-   printf("%s: system interface XFI\n",
-  phydev->dev->name);
+   debug("%s: system interface XFI\n",
+ phydev->dev->name);
}
 
phy_write(phydev, MDIO_MMD_PHYXS,
@@ -524,11 +524,11 @@ int aquantia_config(struct phy_device *phydev)
val = phy_read(phydev, MDIO_MMD_VEND1, AQUANTIA_RESERVED_STATUS);
reg_val1 = phy_read(phydev, MDIO_MMD_VEND1, AQUANTIA_FIRMWARE_ID);
 
-   printf("%s: %s Firmware Version %x.%x.%x\n", phydev->dev->name,
-  phydev->drv->name,
-  (reg_val1 & AQUANTIA_FIRMWARE_MAJOR_MASK) >> 8,
-  reg_val1 & AQUANTIA_FIRMWARE_MINOR_MASK,
-  (val & AQUANTIA_FIRMWARE_BUILD_MASK) >> 4);
+   debug("%s: %s Firmware Version %x.%x.%x\n", phydev->dev->name,
+ phydev->drv->name,
+ (reg_val1 & AQUANTIA_FIRMWARE_MAJOR_MASK) >> 8,
+ reg_val1 & AQUANTIA_FIRMWARE_MINOR_MASK,
+ (val & AQUANTIA_FIRMWARE_BUILD_MASK) >> 4);
 
return 0;
 }
-- 
2.17.1



[PATCH 1/2] drivers: net: phy: aquantia: drop XGMII as a valid system interface proto

2019-12-04 Thread Alex Marginean
Use either USXGMII or XFI in aquantia_set_proto and drop XGMII as a valid
protocol configuration.  The PHY doesn't support it, it's just used as an
alias for one of the other two protocols.

Signed-off-by: Florin Chiculita 
Signed-off-by: Alex Marginean 
---

Depends on:
https://patchwork.ozlabs.org/project/uboot/list/?series=142879

 drivers/net/phy/aquantia.c | 17 +
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c
index 7817d3cb8d..2af09907a1 100644
--- a/drivers/net/phy/aquantia.c
+++ b/drivers/net/phy/aquantia.c
@@ -303,30 +303,29 @@ struct {
   AQUANTIA_VND1_GSTART_RATE_1G},
[PHY_INTERFACE_MODE_SGMII_2500] = {0x144, AQUANTIA_VND1_GSYSCFG_2_5G,
   AQUANTIA_VND1_GSTART_RATE_2_5G},
-   [PHY_INTERFACE_MODE_XGMII] =  {0x100, AQUANTIA_VND1_GSYSCFG_10G,
-  AQUANTIA_VND1_GSTART_RATE_10G},
[PHY_INTERFACE_MODE_XFI] ={0x100, AQUANTIA_VND1_GSYSCFG_10G,
   AQUANTIA_VND1_GSTART_RATE_10G},
[PHY_INTERFACE_MODE_USXGMII] ={0x080, AQUANTIA_VND1_GSYSCFG_10G,
   AQUANTIA_VND1_GSTART_RATE_10G},
 };
 
-static int aquantia_set_proto(struct phy_device *phydev)
+static int aquantia_set_proto(struct phy_device *phydev,
+ phy_interface_t interface)
 {
int i;
 
-   if (!aquantia_syscfg[phydev->interface].cnt)
+   if (!aquantia_syscfg[interface].cnt)
return 0;
 
/* set the default rate to enable the SI link */
phy_write(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GSTART_RATE,
- aquantia_syscfg[phydev->interface].start_rate);
+ aquantia_syscfg[interface].start_rate);
 
/* set selected protocol for all relevant line side link speeds */
-   for (i = 0; i <= aquantia_syscfg[phydev->interface].cnt; i++)
+   for (i = 0; i <= aquantia_syscfg[interface].cnt; i++)
phy_write(phydev, MDIO_MMD_VEND1,
  AQUANTIA_VND1_GSYSCFG_BASE + i,
- aquantia_syscfg[phydev->interface].syscfg);
+ aquantia_syscfg[interface].syscfg);
return 0;
 }
 
@@ -429,6 +428,8 @@ int aquantia_config(struct phy_device *phydev)
 * on FW config
 */
if (interface == PHY_INTERFACE_MODE_XGMII) {
+   debug("use XFI or USXGMII SI protos, XGMII is not valid\n");
+
reg_val1 = phy_read(phydev, MDIO_MMD_PHYXS,
AQUANTIA_SYSTEM_INTERFACE_SR);
if ((reg_val1 & AQUANTIA_SI_IN_USE_MASK) == AQUANTIA_SI_USXGMII)
@@ -451,7 +452,7 @@ int aquantia_config(struct phy_device *phydev)
mdelay(10);
 
/* configure protocol based on phydev->interface */
-   aquantia_set_proto(phydev);
+   aquantia_set_proto(phydev, interface);
/* apply custom configuration based on DT */
aquantia_dts_config(phydev);
 
-- 
2.17.1



[PATCH v2 2/5] board: fsl: ls2080a/ls2081a: remove empty arch_misc_init

2019-12-04 Thread Alex Marginean
The arch_misc_init function is empty on LS2 SoCs/boards, remove it.

Signed-off-by: Alex Marginean 
---
 arch/arm/Kconfig| 5 -
 board/freescale/ls2080a/ls2080a.c   | 7 ---
 board/freescale/ls2080aqds/ls2080aqds.c | 7 ---
 board/freescale/ls2080ardb/ls2080ardb.c | 7 ---
 4 files changed, 26 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3a3d77b04f..459876b543 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1096,7 +1096,6 @@ config TARGET_VEXPRESS64_JUNO
 config TARGET_LS2080A_EMU
bool "Support ls2080a_emu"
select ARCH_LS2080A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select FSL_DDR_SYNC_REFRESH
@@ -1109,7 +1108,6 @@ config TARGET_LS2080A_EMU
 config TARGET_LS2080A_SIMU
bool "Support ls2080a_simu"
select ARCH_LS2080A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select BOARD_LATE_INIT
@@ -1138,7 +1136,6 @@ config TARGET_LS1088AQDS
 config TARGET_LS2080AQDS
bool "Support ls2080aqds"
select ARCH_LS2080A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1157,7 +1154,6 @@ config TARGET_LS2080AQDS
 config TARGET_LS2080ARDB
bool "Support ls2080ardb"
select ARCH_LS2080A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1176,7 +1172,6 @@ config TARGET_LS2080ARDB
 config TARGET_LS2081ARDB
bool "Support ls2081ardb"
select ARCH_LS2080A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select BOARD_LATE_INIT
diff --git a/board/freescale/ls2080a/ls2080a.c 
b/board/freescale/ls2080a/ls2080a.c
index 413a698511..bc68f99625 100644
--- a/board/freescale/ls2080a/ls2080a.c
+++ b/board/freescale/ls2080a/ls2080a.c
@@ -48,13 +48,6 @@ void detail_board_ddr_info(void)
 #endif
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
-   return 0;
-}
-#endif
-
 int board_eth_init(bd_t *bis)
 {
int error = 0;
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c 
b/board/freescale/ls2080aqds/ls2080aqds.c
index 25e80c8ac6..fce433461a 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -289,13 +289,6 @@ void detail_board_ddr_info(void)
 #endif
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
-   return 0;
-}
-#endif
-
 #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
 void fdt_fixup_board_enet(void *fdt)
 {
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c 
b/board/freescale/ls2080ardb/ls2080ardb.c
index 6a1b8e3f53..282aaf47fb 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -318,13 +318,6 @@ void detail_board_ddr_info(void)
 #endif
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
-   return 0;
-}
-#endif
-
 #ifdef CONFIG_FSL_MC_ENET
 void fdt_fixup_board_enet(void *fdt)
 {
-- 
2.17.1



[PATCH v2 4/5] board: fsl: ls1028a: free up arch_misc_init

2019-12-04 Thread Alex Marginean
Currently LS1028A board code uses arch_misc_init to set up the board mux
on QDS.  Move this code to misc_init_r.  This is consistent with LS gen 2
and T series SoCs/boards.

Signed-off-by: Alex Marginean 
---
 arch/arm/Kconfig | 1 -
 board/freescale/ls1028a/ls1028a.c| 4 ++--
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 +
 configs/ls1028aqds_tfa_defconfig | 1 +
 4 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 8a190bab8c..77a5ed5a40 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1319,7 +1319,6 @@ config TARGET_LS1028AQDS
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
select BOARD_LATE_INIT
-   select ARCH_MISC_INIT
help
  Support for Freescale LS1028AQDS platform
  The LS1028A Development System (QDS) is a high-performance
diff --git a/board/freescale/ls1028a/ls1028a.c 
b/board/freescale/ls1028a/ls1028a.c
index a9606b8865..3977ecf896 100644
--- a/board/freescale/ls1028a/ls1028a.c
+++ b/board/freescale/ls1028a/ls1028a.c
@@ -96,8 +96,8 @@ int board_eth_init(bd_t *bis)
return pci_eth_init(bis);
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
 {
config_board_mux();
 
diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index b5dceb4471..77860a568b 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -16,6 +16,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x200 default_hugepagesz=2m 
hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index e75d140e94..75871e5569 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -17,6 +17,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x200 default_hugepagesz=2m 
hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
-- 
2.17.1



[PATCH v2 1/5] board: fsl: lx2160a: free up arch_misc_init

2019-12-04 Thread Alex Marginean
Currently LX2 board code uses arch_misc_init to set up the board mux on
RDB and QDS.  Move this code to misc_init_r.  This is consistent with LS
gen 2 and T series SoCs/boards.

Signed-off-by: Alex Marginean 
---
 arch/arm/Kconfig | 2 --
 board/freescale/lx2160a/lx2160a.c| 4 ++--
 configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 +
 configs/lx2160aqds_tfa_defconfig | 1 +
 configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 +
 configs/lx2160ardb_tfa_defconfig | 1 +
 6 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f96841c777..3a3d77b04f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1190,7 +1190,6 @@ config TARGET_LS2081ARDB
 config TARGET_LX2160ARDB
bool "Support lx2160ardb"
select ARCH_LX2160A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1204,7 +1203,6 @@ config TARGET_LX2160ARDB
 config TARGET_LX2160AQDS
bool "Support lx2160aqds"
select ARCH_LX2160A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
diff --git a/board/freescale/lx2160a/lx2160a.c 
b/board/freescale/lx2160a/lx2160a.c
index eff12747b4..413aaa6baf 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -579,8 +579,8 @@ void detail_board_ddr_info(void)
print_ddr_info(0);
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
 {
config_board_mux();
 
diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig 
b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
index 4ab7582fc7..43a2b8328d 100644
--- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
@@ -15,6 +15,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m 
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
 # CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_GPT=y
diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig
index a35f1cc38d..06ed9ba83d 100644
--- a/configs/lx2160aqds_tfa_defconfig
+++ b/configs/lx2160aqds_tfa_defconfig
@@ -16,6 +16,7 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m 
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
 # CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_GPT=y
diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig 
b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
index 87c54b00f6..40ccc1f569 100644
--- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
@@ -16,6 +16,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m 
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
 # CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_GPT=y
diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig
index 18057b20b1..8478404dd6 100644
--- a/configs/lx2160ardb_tfa_defconfig
+++ b/configs/lx2160ardb_tfa_defconfig
@@ -17,6 +17,7 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m 
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
 # CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_GPT=y
-- 
2.17.1



[PATCH v2 3/5] board: fsl: ls1088a: remove empty arch_misc_init

2019-12-04 Thread Alex Marginean
The arch_misc_init function is empty on LS108x SoCs/boards, remove it.

Signed-off-by: Alex Marginean 
---
 arch/arm/Kconfig  | 2 --
 board/freescale/ls1088a/ls1088a.c | 7 ---
 2 files changed, 9 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 459876b543..8a190bab8c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1120,7 +1120,6 @@ config TARGET_LS2080A_SIMU
 config TARGET_LS1088AQDS
bool "Support ls1088aqds"
select ARCH_LS1088A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1342,7 +1341,6 @@ config TARGET_LS1028ARDB
 config TARGET_LS1088ARDB
bool "Support ls1088ardb"
select ARCH_LS1088A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
diff --git a/board/freescale/ls1088a/ls1088a.c 
b/board/freescale/ls1088a/ls1088a.c
index 4ecf6dce68..0bd397a0be 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -811,13 +811,6 @@ void detail_board_ddr_info(void)
print_ddr_info(0);
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
-   return 0;
-}
-#endif
-
 #ifdef CONFIG_FSL_MC_ENET
 void board_quiesce_devices(void)
 {
-- 
2.17.1



[PATCH v2 0/5] FSL/Layerscape gen 3: export serdes cfg to env

2019-12-04 Thread Alex Marginean
Exports the serdes configuration as an environment variable for LS gen 3
SoCs, so it can be used in u-boot command line.  It should particularly be
useful for applying Linux DT overlays for the given serdes configuration.
First 4 patches free up arch_misc_init, which is now implemented in
arch/arm/cpu/armv8/fsl-layerscape/cpu.c.  For LS1028A and LX2 the
board_mux_init code is now under misc_init_r.  MISC_INIT_R is now enabled
for the relavant boards.

Changes in v2:
  - s/emtpy/empty/ in description of two of the patches

This set replaces v1:
https://patchwork.ozlabs.org/project/uboot/list/?series=146202

Alex Marginean (5):
  board: fsl: lx2160a: free up arch_misc_init
  board: fsl: ls2080a/ls2081a: remove empty arch_misc_init
  board: fsl: ls1088a: remove empty arch_misc_init
  board: fsl: ls1028a: free up arch_misc_init
  arch: armv8: fsl-layerscape: export serdes config to environment

 arch/arm/Kconfig  | 10 -
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig |  1 +
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c   | 14 +++
 .../armv8/fsl-layerscape/fsl_lsch3_serdes.c   | 42 +++
 board/freescale/ls1028a/ls1028a.c |  4 +-
 board/freescale/ls1088a/ls1088a.c |  7 
 board/freescale/ls2080a/ls2080a.c |  7 
 board/freescale/ls2080aqds/ls2080aqds.c   |  7 
 board/freescale/ls2080ardb/ls2080ardb.c   |  7 
 board/freescale/lx2160a/lx2160a.c |  4 +-
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig  |  1 +
 configs/ls1028aqds_tfa_defconfig  |  1 +
 configs/lx2160aqds_tfa_SECURE_BOOT_defconfig  |  1 +
 configs/lx2160aqds_tfa_defconfig  |  1 +
 configs/lx2160ardb_tfa_SECURE_BOOT_defconfig  |  1 +
 configs/lx2160ardb_tfa_defconfig  |  1 +
 16 files changed, 67 insertions(+), 42 deletions(-)

-- 
2.17.1



[PATCH v3 3/6] test: dm: add a simple unit test for DSA class

2019-12-03 Thread Alex Marginean
The test pings the local IP address though different ports of a sandbox
DSA device.  Port traffic is filtered and the test verifies that ping
works only on enabled ports.
The additional interfaces require MAC addresses, these have been added
to sandbox default environment.

Signed-off-by: Alex Marginean 
---
 arch/Kconfig  |  1 +
 arch/sandbox/dts/test.dts | 49 +
 include/configs/sandbox.h |  4 +++
 test/dm/Makefile  |  1 +
 test/dm/dsa.c | 58 +++
 test/dm/test-fdt.c|  2 +-
 6 files changed, 114 insertions(+), 1 deletion(-)
 create mode 100644 test/dm/dsa.c

diff --git a/arch/Kconfig b/arch/Kconfig
index 141e48bc43..70907d69a1 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -133,6 +133,7 @@ config SANDBOX
imply PHYLIB
imply DM_MDIO
imply DM_MDIO_MUX
+   imply DM_DSA
 
 config SH
bool "SuperH architecture"
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index fdb08f2111..0f565f066a 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -40,6 +40,10 @@
usb2 = &usb_2;
axi0 = &axi;
osd0 = "/osd";
+   eth8 = &swp_0;
+   eth9 = &swp_1;
+   eth10 = &swp_2;
+   eth11 = &dsa_eth0;
};
 
audio: audio-codec {
@@ -889,6 +893,51 @@
mdio: mdio-test {
compatible = "sandbox,mdio";
};
+
+   dsa_eth0: dsa-test-eth {
+   compatible = "sandbox,dsa-eth";
+   };
+
+   dsa-test {
+   compatible = "sandbox,dsa";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   swp_0: port@0 {
+   reg = <0>;
+   label = "lan0";
+   };
+
+   swp_1: port@1 {
+   reg = <1>;
+   label = "lan1";
+   phy-mode = "rgmii-txid";
+   fixed-link {
+   speed = <1000>;
+   full-duplex;
+   };
+   };
+
+   swp_2: port@2 {
+   reg = <2>;
+   label = "lan2";
+   fixed-link {
+   speed = <100>;
+   full-duplex;
+   };
+   };
+
+   port@3 {
+   reg = <3>;
+   ethernet = <&dsa_eth0>;
+   fixed-link {
+   speed = <100>;
+   full-duplex;
+   };
+   };
+   };
+   };
 };
 
 #include "sandbox_pmic.dtsi"
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index 1c13055cdc..35a5676eb9 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -100,6 +100,10 @@
"eth1addr=00:00:11:22:33:45\0" \
"eth3addr=00:00:11:22:33:46\0" \
"eth5addr=00:00:11:22:33:47\0" \
+   "eth8addr=00:00:11:22:33:48\0" \
+   "eth9addr=00:00:11:22:33:49\0" \
+   "eth10addr=00:00:11:22:33:4a\0" \
+   "eth11addr=00:00:11:22:33:4b\0" \
"ipaddr=1.2.3.4\0"
 
 #define MEM_LAYOUT_ENV_SETTINGS \
diff --git a/test/dm/Makefile b/test/dm/Makefile
index 0c2fd5cb5e..69e9feed91 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -65,4 +65,5 @@ obj-$(CONFIG_VIRTIO_SANDBOX) += virtio.o
 obj-$(CONFIG_DMA) += dma.o
 obj-$(CONFIG_DM_MDIO) += mdio.o
 obj-$(CONFIG_DM_MDIO_MUX) += mdio_mux.o
+obj-$(CONFIG_DM_DSA) += dsa.o
 endif
diff --git a/test/dm/dsa.c b/test/dm/dsa.c
new file mode 100644
index 00..5aa3847fe5
--- /dev/null
+++ b/test/dm/dsa.c
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 NXP
+ */
+
+#include 
+#include 
+#include 
+
+extern int dsa_sandbox_port_mask;
+
+/* this test sends ping requests with the local address through each DSA port
+ * via the dummy DSA master Eth.
+ * The dummy Eth filters traffic based on DSA port used to Tx and 

[PATCH v3 0/6] Introduce DSA Ethernet switch class and Felix driver

2019-12-03 Thread Alex Marginean
DSA stands for Distributed Switch Architecture and it is a subsystem
introduced in the Linux kernel to support switches that:
- have an Ethernet link up to the CPU
- use some form of tagging to identify the source/destination port for
  Rx/Tx
- may be cascaded in tree-like structures.

DSA is described in depth here:
https://www.kernel.org/doc/Documentation/networking/dsa/dsa.txt

>From the doc:

Summarized, this is basically how DSA looks like from a network device
perspective:


|---
| CPU network device (eth0)|

|  |
||
| Switch driver  |
||
|||| ||
|---|  |---|  |---|
| sw0p0 |  | sw0p1 |  | sw0p2 |
|---|  |---|  |---|

This patch set introduces a DSA class in U-Boot to support drivers of such
switches.  DSA drivers have to implement the following ops:
- enable/disable of switch ports,
- insert a tag in frames being transmitted, used by the switch to select
  the egress port,
- parse a tag in frames being received, used for Rx traffic.

DSA class code deals with presentation of switch ports as Ethernet
interfaces, deals with the master Ethernet device for I/O and helps with
parsing of the DT assuming the structure follows the DSA kernel binding.

Support for switch cascading is not included yet.

This patch set also introduces a driver for the Ethernet switch integrated
into NXP LS1028A, called Felix.  The switch has 4 front panel ports, I/O
to/fom it is done though an ENETC Ethernet interface and meta-data is
carried between the switch and the driver though an additional header
pre-pended to the original frame.
Network commands like tftp can be used on these front panel ports.  The
ports are disabled unless used so they do not cause issues on network
topologies that include loops.

Felix as seen on LS1028A RDB:
=> dm tree
 Class Index  Probed  DriverName
---
..
 dsa   0  [ + ]   felix-switch  |   |-- felix-switch
 eth   4  [ + ]   dsa-port  |   |   |-- swp0
 eth   5  [ + ]   dsa-port  |   |   |-- swp1
 eth   6  [ + ]   dsa-port  |   |   |-- swp2
 eth   7  [ + ]   dsa-port  |   |   `-- swp3

=> mdio list
..
10 - Vitesse VSC8514 <--> swp0
11 - Vitesse VSC8514 <--> swp1
12 - Vitesse VSC8514 <--> swp2
13 - Vitesse VSC8514 <--> swp3

=> tftp 8000 test
Using swp2 device
TFTP from server 192.168.100.1; our IP address is 192.168.100.100
Filename 'test'.
Load address: 0x8000
Loading: #
 #
 
 6.8 MiB/s
done
Bytes transferred = 949880 (e7e78 hex)

Changes in v3:
 - fix Felix platdata size
 - move include/dsa.h to include/net/dsa.h
 - updated TODO in dsa.h
 - other minor fixes

Changes in v2:
 - Don't use NULL PHY in Felix driver
 - guard dsa.h with #ifndef __DSA__H__, somehow I missed that in v1
 - added a TODO for setting master Eth in promiscuous mode
 - Minor fixes in patch descriptions, API comments
 - Added address/size-cells to LS1028A DT ports node

This patch set replaces v2:
https://patchwork.ozlabs.org/project/uboot/list/?series=144912
and depends on:
https://patchwork.ozlabs.org/project/uboot/list/?series=144907
https://patchwork.ozlabs.org/project/uboot/list/?series=142879

Alex Marginean (6):
  net: introduce DSA class for Ethernet switches
  drivers: net: add a DSA sandbox driver
  test: dm: add a simple unit test for DSA class
  drivers: net: add Felix DSA switch driver
  arm: dts: ls1028a: adds Ethernet switch node and its dependencies
  configs: ls1028a: enable the Ethernet switch driver in defconfig

 arch/Kconfig |   1 +
 arch/arm/dts/fsl-ls1028a-rdb.dts |  36 ++
 arch/arm/dts/fsl-ls1028a.dtsi|  44 +-
 arch/sandbox/dts/test.dts|  49 ++
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig |   3 +-
 configs/ls1028aqds_tfa_defconfig |   3 +-
 configs/ls1028ardb_tfa_SECURE_BOOT_defconfig |   3 +-
 configs/ls1028ardb_tfa_defconfig |   3 +-
 drivers/net/Kconfig  |  21 +
 drivers/net/Makefile |   1 +
 drivers/net/dsa_sandbox.c| 272 +++
 drivers/net/fsl_enetc.h  |   5 +
 drivers/net/mscc_eswitch/Kconfig |   8 +
 drivers/net/mscc_eswitch/Ma

[PATCH v3 2/6] drivers: net: add a DSA sandbox driver

2019-12-03 Thread Alex Marginean
The DSA sandbox driver is used for DSA unit testing.  It implements a
simple 4 port switch that uses a very simple tag to identify the ports.
The DSA driver comes paired with an Ethernet driver that loops packets
back and can selectively filter traffic on DSA switch ports.

Signed-off-by: Alex Marginean 
---
 drivers/net/Kconfig   |   8 ++
 drivers/net/Makefile  |   1 +
 drivers/net/dsa_sandbox.c | 272 ++
 3 files changed, 281 insertions(+)
 create mode 100644 drivers/net/dsa_sandbox.c

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index a4157cb122..ac420cb474 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -70,6 +70,14 @@ config MDIO_MUX_SANDBOX
 
  This driver is used for testing in test/dm/mdio.c
 
+config DSA_SANDBOX
+   depends on DM_DSA && SANDBOX
+   default y
+   bool "Sandbox: Mocked DSA driver"
+   help
+ This driver implements a dummy switch and a dummy Ethernet device used
+ to test DSA class code.
+
 menuconfig NETDEVICES
bool "Network device support"
depends on NET
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 30991834ec..8be49f6335 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -82,3 +82,4 @@ obj-y += mscc_eswitch/
 obj-$(CONFIG_HIGMACV300_ETH) += higmacv300.o
 obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o
 obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o
+obj-$(CONFIG_DSA_SANDBOX) += dsa_sandbox.o
diff --git a/drivers/net/dsa_sandbox.c b/drivers/net/dsa_sandbox.c
new file mode 100644
index 00..66882ed7de
--- /dev/null
+++ b/drivers/net/dsa_sandbox.c
@@ -0,0 +1,272 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 NXP
+ */
+
+#include 
+
+#define DSA_SANDBOX_MAGIC  0x00415344
+#define DSA_SANDBOX_TAG_LENsizeof(struct dsa_sandbox_tag)
+/*
+ * This global flag is used to enable DSA just for DSA test so it doesn't 
affect
+ * the existing eth unit test.
+ */
+int dsa_sandbox_port_mask;
+
+struct dsa_sandbox_priv {
+   int enabled;
+   int port_enabled;
+};
+
+struct dsa_sandbox_tag {
+   u32 magic;
+   u32 port;
+};
+
+static int dsa_sandbox_port_enable(struct udevice *dev, int port,
+  struct phy_device *phy)
+{
+   struct dsa_sandbox_priv *priv = dev->priv;
+
+   if (!priv->enabled)
+   return -EFAULT;
+
+   priv->port_enabled |= BIT(port);
+
+   return 0;
+}
+
+static void dsa_sandbox_port_disable(struct udevice *dev, int port,
+struct phy_device *phy)
+{
+   struct dsa_sandbox_priv *priv = dev->priv;
+
+   if (!priv->enabled)
+   return;
+
+   priv->port_enabled &= ~BIT(port);
+}
+
+static int dsa_sandbox_xmit(struct udevice *dev, int port, void *packet,
+   int length)
+{
+   struct dsa_sandbox_priv *priv = dev->priv;
+   struct dsa_sandbox_tag *tag = packet;
+
+   if (!priv->enabled)
+   return -EFAULT;
+
+   if (!(priv->port_enabled & BIT(port)))
+   return -EFAULT;
+
+   tag->magic = DSA_SANDBOX_MAGIC;
+   tag->port = port;
+
+   return 0;
+}
+
+static int dsa_sandbox_rcv(struct udevice *dev, int *port, void *packet,
+  int length)
+{
+   struct dsa_sandbox_priv *priv = dev->priv;
+   struct dsa_sandbox_tag *tag = packet;
+
+   if (!priv->enabled)
+   return -EFAULT;
+
+   if (tag->magic != DSA_SANDBOX_MAGIC)
+   return -EFAULT;
+
+   *port = tag->port;
+   if (!(priv->port_enabled & BIT(*port)))
+   return -EFAULT;
+
+   return 0;
+}
+
+static const struct dsa_ops dsa_sandbox_ops = {
+   .port_enable = dsa_sandbox_port_enable,
+   .port_disable = dsa_sandbox_port_disable,
+   .xmit = dsa_sandbox_xmit,
+   .rcv = dsa_sandbox_rcv,
+};
+
+static int dsa_sandbox_bind(struct udevice *dev)
+{
+   struct dsa_perdev_platdata *pdata = dev->platdata;
+
+   /* must be at least 4 to match sandbox test DT */
+   pdata->num_ports = 4;
+   pdata->headroom = DSA_SANDBOX_TAG_LEN;
+
+   return 0;
+}
+
+static int dsa_sandbox_probe(struct udevice *dev)
+{
+   struct dsa_sandbox_priv *priv = dev_get_priv(dev);
+
+   /*
+* return error if DSA is not being tested so we don't break existing
+* eth test.
+*/
+   if (!dsa_sandbox_port_mask)
+   return -EINVAL;
+
+   priv->enabled = 1;
+
+   return 0;
+}
+
+static int dsa_sandbox_remove(struct udevice *dev)
+{
+   struct dsa_sandbox_priv *priv = dev_get_priv(dev);
+
+   priv->enabled = 0;
+
+   return 0;
+}
+
+static const struct udevice_id dsa_sandbox_ids[] = {
+   { .compatible = "sandbox,dsa" },
+   { }
+};
+
+U_BOOT_DRIVER(dsa_sandbox) =

[PATCH v3 4/6] drivers: net: add Felix DSA switch driver

2019-12-03 Thread Alex Marginean
This driver is used for the Ethernet switch integrated into LS1028A NXP.
Felix on LS1028A has 4 front panel ports and two internal ports, I/O
to/from the switch is done through an ENETC Ethernet interface.
The 4 front panel ports are available as Ethernet interfaces and can be
used with the typical network commands like tftp.

Signed-off-by: Alex Marginean 
Tested-by: Michael Walle 
---
 drivers/net/fsl_enetc.h |   5 +
 drivers/net/mscc_eswitch/Kconfig|   8 +
 drivers/net/mscc_eswitch/Makefile   |   1 +
 drivers/net/mscc_eswitch/felix_switch.c | 454 
 4 files changed, 468 insertions(+)
 create mode 100644 drivers/net/mscc_eswitch/felix_switch.c

diff --git a/drivers/net/fsl_enetc.h b/drivers/net/fsl_enetc.h
index 9a36cdad80..29e7781b5e 100644
--- a/drivers/net/fsl_enetc.h
+++ b/drivers/net/fsl_enetc.h
@@ -200,6 +200,11 @@ struct enetc_priv {
 /* PCS replicator block for USXGMII */
 #define ENETC_PCS_DEVAD_REPL   0x1f
 
+#define ENETC_PCS_REPL_LINK_TIMER_10x12
+#define  ENETC_PCS_REPL_LINK_TIMER_1_DEF   0x0003
+#define ENETC_PCS_REPL_LINK_TIMER_20x13
+#define  ENETC_PCS_REPL_LINK_TIMER_2_DEF   0x06a0
+
 /* ENETC external MDIO registers */
 #define ENETC_MDIO_BASE0x1c00
 #define ENETC_MDIO_CFG 0x00
diff --git a/drivers/net/mscc_eswitch/Kconfig b/drivers/net/mscc_eswitch/Kconfig
index 80dd22f98b..11fb08edaa 100644
--- a/drivers/net/mscc_eswitch/Kconfig
+++ b/drivers/net/mscc_eswitch/Kconfig
@@ -36,3 +36,11 @@ config MSCC_SERVAL_SWITCH
select PHYLIB
help
  This driver supports the Serval network switch device.
+
+config MSCC_FELIX_SWITCH
+   bool "Felix switch driver"
+   depends on DM_DSA && DM_PCI
+   select FSL_ENETC
+   help
+ This driver supports the Ethernet switch integrated in LS1028A NXP
+ SoC.
diff --git a/drivers/net/mscc_eswitch/Makefile 
b/drivers/net/mscc_eswitch/Makefile
index d583fe9fc4..22342ed114 100644
--- a/drivers/net/mscc_eswitch/Makefile
+++ b/drivers/net/mscc_eswitch/Makefile
@@ -4,3 +4,4 @@ obj-$(CONFIG_MSCC_LUTON_SWITCH) += luton_switch.o mscc_xfer.o 
mscc_mac_table.o m
 obj-$(CONFIG_MSCC_JR2_SWITCH) += jr2_switch.o mscc_xfer.o mscc_miim.o
 obj-$(CONFIG_MSCC_SERVALT_SWITCH) += servalt_switch.o mscc_xfer.o mscc_miim.o
 obj-$(CONFIG_MSCC_SERVAL_SWITCH) += serval_switch.o mscc_xfer.o 
mscc_mac_table.o mscc_miim.o
+obj-$(CONFIG_MSCC_FELIX_SWITCH) += felix_switch.o
diff --git a/drivers/net/mscc_eswitch/felix_switch.c 
b/drivers/net/mscc_eswitch/felix_switch.c
new file mode 100644
index 00..3723aad4b4
--- /dev/null
+++ b/drivers/net/mscc_eswitch/felix_switch.c
@@ -0,0 +1,454 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Felix Ethernet switch driver
+ * Copyright 2018-2019 NXP
+ */
+
+/*
+ * This driver is used for the Ethernet switch integrated into LS1028A NXP.
+ * Felix switch is derived from Microsemi Ocelot but there are several NXP
+ * adaptations that makes the two U-Boot drivers largely incompatible.
+ *
+ * Felix on LS1028A has 4 front panel ports and two internal ports, connected
+ * to ENETC interfaces.  We're using one of the ENETC interfaces to push 
traffic
+ * into the switch.  Injection/extraction headers are used to identify
+ * egress/ingress ports in the switch for Tx/Rx.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* defines especially around PCS are reused from enetc */
+#include "../fsl_enetc.h"
+
+#define PCI_DEVICE_ID_FELIX_ETHSW  0xEEF0
+
+/* Felix has in fact 6 ports, but we don't use the last internal one */
+#define FELIX_PORT_COUNT   5
+/* Front panel port mask */
+#define FELIX_FP_PORT_MASK 0xf
+
+/* Register map for BAR4 */
+#define FELIX_SYS  0x01
+#define FELIX_ES0  0x04
+#define FELIX_IS1  0x05
+#define FELIX_IS2  0x06
+#define FELIX_GMII(port)   (0x10 + (port) * 0x1)
+#define FELIX_QSYS 0x20
+
+#define FELIX_SYS_SYSTEM   (FELIX_SYS + 0x0E00)
+#define  FELIX_SYS_SYSTEM_EN   BIT(0)
+#define FELIX_SYS_RAM_CTRL (FELIX_SYS + 0x0F24)
+#define  FELIX_SYS_RAM_CTRL_INIT   BIT(1)
+#define FELIX_SYS_SYSTEM_PORT_MODE(a)  (FELIX_SYS_SYSTEM + 0xC + (a) * 4)
+#define  FELIX_SYS_SYSTEM_PORT_MODE_CPU0x001e
+
+#define FELIX_ES0_TCAM_CTRL(FELIX_ES0 + 0x03C0)
+#define  FELIX_ES0_TCAM_CTRL_ENBIT(0)
+#define FELIX_IS1_TCAM_CTRL(FELIX_IS1 + 0x03C0)
+#define  FELIX_IS1_TCAM_CTRL_ENBIT(0)
+#define FELIX_IS2_TCAM_CTRL(FELIX_IS2 + 0x03C0)
+#define  FELIX_IS2_TCAM_CTRL_ENBIT(0)
+
+#define FELIX_GMII_CLOCK_CFG(port) (FELIX_GMII(port) + 0x)
+#define  FELIX_GMII_CLOCK_CFG_LINK_1G  1
+#define  FELIX_GMII_CLOCK_CFG_LINK_100M2
+#d

[PATCH v3 6/6] configs: ls1028a: enable the Ethernet switch driver in defconfig

2019-12-03 Thread Alex Marginean
The switch driver for LS1028A Ethernet switch is now compiled in for
both LS1028A boards.

Signed-off-by: Alex Marginean 
---
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 3 ++-
 configs/ls1028aqds_tfa_defconfig | 3 ++-
 configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 3 ++-
 configs/ls1028ardb_tfa_defconfig | 3 ++-
 4 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index 4a01cd6715..65e467817e 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -50,8 +50,9 @@ CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_VITESSE=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
+CONFIG_DM_DSA=y
 CONFIG_E1000=y
-CONFIG_FSL_ENETC=y
+CONFIG_MSCC_FELIX_SWITCH=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index 1307f0d951..40d259d907 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -56,8 +56,9 @@ CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_VITESSE=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
+CONFIG_DM_DSA=y
 CONFIG_E1000=y
-CONFIG_FSL_ENETC=y
+CONFIG_MSCC_FELIX_SWITCH=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
index d0a3310a4c..f54a6da31b 100644
--- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
@@ -49,9 +49,10 @@ CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_VITESSE=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
+CONFIG_DM_DSA=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
-CONFIG_FSL_ENETC=y
+CONFIG_MSCC_FELIX_SWITCH=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig
index 4ec7ed0920..e018e5a50e 100644
--- a/configs/ls1028ardb_tfa_defconfig
+++ b/configs/ls1028ardb_tfa_defconfig
@@ -56,9 +56,10 @@ CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_VITESSE=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
+CONFIG_DM_DSA=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
-CONFIG_FSL_ENETC=y
+CONFIG_MSCC_FELIX_SWITCH=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
-- 
2.17.1



[PATCH v3 5/6] arm: dts: ls1028a: adds Ethernet switch node and its dependencies

2019-12-03 Thread Alex Marginean
The definition follows the DSA binding in kernel and describes the switch,
its ports and PHYs.
ENETC PF6 is the 2nd Eth controller linked to the switch on LS1028A, it is
not used in U-Boot and was disabled.

Signed-off-by: Alex Marginean 
Tested-by: Michael Walle 
---
 arch/arm/dts/fsl-ls1028a-rdb.dts | 36 ++
 arch/arm/dts/fsl-ls1028a.dtsi| 44 +++-
 2 files changed, 79 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/fsl-ls1028a-rdb.dts b/arch/arm/dts/fsl-ls1028a-rdb.dts
index 3d5e8ade21..700fc067a4 100644
--- a/arch/arm/dts/fsl-ls1028a-rdb.dts
+++ b/arch/arm/dts/fsl-ls1028a-rdb.dts
@@ -114,9 +114,45 @@
phy-handle = <&rdb_phy0>;
 };
 
+ðsw_ports {
+   port@0 {
+   status = "okay";
+   phy-mode = "qsgmii";
+   phy-handle = <&sw_phy0>;
+   };
+   port@1 {
+   status = "okay";
+   phy-mode = "qsgmii";
+   phy-handle = <&sw_phy1>;
+   };
+   port@2 {
+   status = "okay";
+   phy-mode = "qsgmii";
+   phy-handle = <&sw_phy2>;
+   };
+   port@3 {
+   status = "okay";
+   phy-mode = "qsgmii";
+   phy-handle = <&sw_phy3>;
+   };
+};
+
 &mdio0 {
status = "okay";
rdb_phy0: phy@2 {
reg = <2>;
};
+
+   sw_phy0: phy@10 {
+   reg = <0x10>;
+   };
+   sw_phy1: phy@11 {
+   reg = <0x11>;
+   };
+   sw_phy2: phy@12 {
+   reg = <0x12>;
+   };
+   sw_phy3: phy@13 {
+   reg = <0x13>;
+   };
 };
diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
index 43a154e8e7..97c7d4de4d 100644
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@@ -136,9 +136,51 @@
reg = <0x000300 0 0 0 0>;
status = "disabled";
};
+   ethsw: pci@0,5 {
+   #address-cells=<0>;
+   #size-cells=<1>;
+   reg = <0x000500 0 0 0 0>;
+
+   ethsw_ports: ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   status = "disabled";
+   label = "swp0";
+   };
+   port@1 {
+   reg = <1>;
+   status = "disabled";
+   label = "swp1";
+   };
+   port@2 {
+   reg = <2>;
+   status = "disabled";
+   label = "swp2";
+   };
+   port@3 {
+   reg = <3>;
+   status = "disabled";
+   label = "swp3";
+   };
+   port@4 {
+   reg = <4>;
+   phy-mode = "internal";
+   status = "okay";
+   ethernet = <&enetc2>;
+   };
+   port@5 {
+   reg = <5>;
+   phy-mode = "internal";
+   status = "disabled";
+   };
+   };
+   };
enetc6: pci@0,6 {
reg = <0x000600 0 0 0 0>;
-   status = "okay";
+   status = "disabled";
phy-mode = "internal";
};
};
-- 
2.17.1



[PATCH v3 1/6] net: introduce DSA class for Ethernet switches

2019-12-03 Thread Alex Marginean
DSA stands for Distributed Switch Architecture and it covers switches that
are connected to the CPU through an Ethernet link and generally use frame
tags to pass information about the source/destination ports to/from CPU.
Front panel ports are presented as regular ethernet devices in U-Boot and
they are expected to support the typical networking commands.
DSA switches may be cascaded, DSA class code does not currently support
this.

Signed-off-by: Alex Marginean 
---
 drivers/net/Kconfig|  13 ++
 include/dm/uclass-id.h |   1 +
 include/net/dsa.h  | 141 
 net/Makefile   |   1 +
 net/dsa-uclass.c   | 369 +
 5 files changed, 525 insertions(+)
 create mode 100644 include/net/dsa.h
 create mode 100644 net/dsa-uclass.c

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 4182897d89..a4157cb122 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -37,6 +37,19 @@ config DM_MDIO_MUX
  This is currently implemented in net/mdio-mux-uclass.c
  Look in include/miiphy.h for details.
 
+config DM_DSA
+   bool "Enable Driver Model for DSA switches"
+   depends on DM_ETH && DM_MDIO
+   help
+ Enable Driver Model for DSA switches
+
+ Adds UCLASS_DSA class supporting switches that follow the Distributed
+ Switch Architecture (DSA).  These switches rely on the presence of a
+ management switch port connected to an Ethernet controller capable of
+ receiving frames from the switch.  This host Ethernet controller is
+ called "master" and "cpu" in DSA terminology.
+ This is currently implemented in net/dsa-uclass.c
+
 config MDIO_SANDBOX
depends on DM_MDIO && SANDBOX
default y
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 0c563d898b..8f37a91488 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -42,6 +42,7 @@ enum uclass_id {
UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */
UCLASS_DSI_HOST,/* Display Serial Interface host */
UCLASS_DMA, /* Direct Memory Access */
+   UCLASS_DSA, /* Distributed (Ethernet) Switch Architecture */
UCLASS_EFI, /* EFI managed devices */
UCLASS_ETH, /* Ethernet device */
UCLASS_FIRMWARE,/* Firmware */
diff --git a/include/net/dsa.h b/include/net/dsa.h
new file mode 100644
index 00..2387419b9d
--- /dev/null
+++ b/include/net/dsa.h
@@ -0,0 +1,141 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2019 NXP
+ */
+
+#ifndef __DSA_H__
+#define __DSA_H__
+
+#include 
+#include 
+#include 
+
+/**
+ * DSA stands for Distributed Switch Architecture and it is infrastructure
+ * intended to support drivers for Switches that rely on an intermediary
+ * Ethernet device for I/O.  These switches may support cascading allowing
+ * them to be arranged as a tree.
+ * DSA is documented in detail in the Linux kernel documentation under
+ * Documentation/networking/dsa/dsa.txt
+ * The network layout of such a switch is shown below:
+ *
+ * |---
+ * | CPU network device (eth0)|
+ * 
+ * |  |
+ * ||
+ * | Switch driver  |
+ * ||
+ * |||| ||
+ * |---|  |---|  |---|
+ * | sw0p0 |  | sw0p1 |  | sw0p2 |
+ * |---|  |---|  |---|
+ *
+ * In U-Boot the intent is to allow access to front panel ports (shown at the
+ * bottom of the picture) though the master Ethernet port (eth0 in the 
picture).
+ * Front panel ports are presented as regular Ethernet devices in U-Boot and
+ * they are expected to support the typical networking commands.
+ * In general DSA switches require the use of tags, extra headers added both by
+ * software on Tx and by the switch on Rx.  These tags carry at a minimum port
+ * information and switch information for cascaded set-ups.
+ * In U-Boot these tags are inserted and parsed by the DSA switch driver, the
+ * class code helps with headroom/tailroom for the extra headers.
+ *
+ * TODO:
+ * - handle switch cascading, for now U-Boot only supports stand-alone 
switches.
+ * - propagate the master Eth MAC address to switch ports, this is used in
+ * Linux to avoid using additional MAC addresses on master Eth.
+ * - Add support to probe DSA switches connected to a MDIO bus, this is needed
+ * to convert switch drivers that are now under drivers/net/phy.
+ */
+
+#define DSA_PORT_NAME_LENGTH   16
+
+/* Maximum number of ports each DSA device can have */
+#define DSA_MAX_PORTS  12
+/* Used to size internal buffers, no support for jumbo yet */
+#define DSA_MAX_FRAME_SIZE 2048
+
+/**
+ * struct dsa_ops - DSA operati

[U-Boot] [PATCH 3/5] board: fsl: ls1088a: remove empty arch_misc_init

2019-12-03 Thread Alex Marginean
The arch_misc_init function is emtpy on LS108x SoCs/boards, remove it.

Signed-off-by: Alex Marginean 
---
 arch/arm/Kconfig  | 2 --
 board/freescale/ls1088a/ls1088a.c | 7 ---
 2 files changed, 9 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 459876b543..8a190bab8c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1120,7 +1120,6 @@ config TARGET_LS2080A_SIMU
 config TARGET_LS1088AQDS
bool "Support ls1088aqds"
select ARCH_LS1088A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1342,7 +1341,6 @@ config TARGET_LS1028ARDB
 config TARGET_LS1088ARDB
bool "Support ls1088ardb"
select ARCH_LS1088A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
diff --git a/board/freescale/ls1088a/ls1088a.c 
b/board/freescale/ls1088a/ls1088a.c
index 4ecf6dce68..0bd397a0be 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -811,13 +811,6 @@ void detail_board_ddr_info(void)
print_ddr_info(0);
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
-   return 0;
-}
-#endif
-
 #ifdef CONFIG_FSL_MC_ENET
 void board_quiesce_devices(void)
 {
-- 
2.17.1

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[U-Boot] [PATCH 0/5] FSL/Layerscape gen 3: export serdes cfg to env

2019-12-03 Thread Alex Marginean
Exports the serdes configuration as an environment variable for LS gen 3
SoCs, so it can be used in u-boot command line.  It should particularly be
useful for applying Linux DT overlays for the given serdes configuration.
First 4 patches free up arch_misc_init, which is now implemented in
arch/arm/cpu/armv8/fsl-layerscape/cpu.c.  For LS1028A and LX2 the
board_mux_init code is now under misc_init_r.  MISC_INIT_R is now enabled
for the relavant boards.

Alex Marginean (5):
  board: fsl: lx2160a: free up arch_misc_init
  board: fsl: ls2080a/ls2081a: remove empty arch_misc_init
  board: fsl: ls1088a: remove empty arch_misc_init
  board: fsl: ls1028a: free up arch_misc_init
  arch: armv8: fsl-layerscape: export serdes config to environment

 arch/arm/Kconfig  | 10 -
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig |  1 +
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c   | 14 +++
 .../armv8/fsl-layerscape/fsl_lsch3_serdes.c   | 42 +++
 board/freescale/ls1028a/ls1028a.c |  4 +-
 board/freescale/ls1088a/ls1088a.c |  7 
 board/freescale/ls2080a/ls2080a.c |  7 
 board/freescale/ls2080aqds/ls2080aqds.c   |  7 
 board/freescale/ls2080ardb/ls2080ardb.c   |  7 
 board/freescale/lx2160a/lx2160a.c |  4 +-
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig  |  1 +
 configs/ls1028aqds_tfa_defconfig  |  1 +
 configs/lx2160aqds_tfa_SECURE_BOOT_defconfig  |  1 +
 configs/lx2160aqds_tfa_defconfig  |  1 +
 configs/lx2160ardb_tfa_SECURE_BOOT_defconfig  |  1 +
 configs/lx2160ardb_tfa_defconfig  |  1 +
 16 files changed, 67 insertions(+), 42 deletions(-)

-- 
2.17.1

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[U-Boot] [PATCH 5/5] arch: armv8: fsl-layerscape: export serdes config to environment

2019-12-03 Thread Alex Marginean
Exports the serdes configuration as an environment variable for LS gen 3
SoCs, so it can be used in u-boot command line.  It should particularly
be useful for applying Linux DT overlays for the given serdes
configuration.
This code is called from arch_misc_init and not from the existing
serdes_init function because it depends on U-Boot environment being set
up.

Signed-off-by: Alex Marginean 
---
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig |  1 +
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c   | 14 ++
 .../armv8/fsl-layerscape/fsl_lsch3_serdes.c   | 43 +++
 3 files changed, 58 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index f1578b10bc..40cbea0e12 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -241,6 +241,7 @@ config FSL_LSCH2
select SYS_FSL_SEC_BE
 
 config FSL_LSCH3
+   select ARCH_MISC_INIT
bool
 
 config NXP_LSCH3_2
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c 
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index c6490556e6..ddbc07037f 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -1627,3 +1627,17 @@ __weak int dram_init(void)
 
return 0;
 }
+
+#ifdef CONFIG_ARCH_MISC_INIT
+__weak int serdes_misc_init(void)
+{
+   return 0;
+}
+
+int arch_misc_init(void)
+{
+   serdes_misc_init();
+
+   return 0;
+}
+#endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c 
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
index 1a747a9e3d..8b9f5a4e29 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
@@ -600,3 +600,46 @@ void fsl_serdes_init(void)
serdes3_prtcl_map);
 #endif
 }
+
+int serdes_set_env(int sd, int rcwsr, int sd_prctl_mask, int sd_prctl_shift)
+{
+   struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+   char scfg[16], snum[16];
+   int i, cfgr = 0;
+   u32 cfg;
+
+   cfg = gur_in32(&gur->rcwsr[rcwsr - 1]) & sd_prctl_mask;
+   cfg >>= sd_prctl_shift;
+   cfg = serdes_get_number(sd, cfg);
+
+   /* reverse lanes, lane 0 should be printed first */
+   for (i = 0; i < SRDS_MAX_LANES; i++)
+   cfgr |= (cfg >> (i * 4) & 0xf) << (SRDS_MAX_LANES - i - 1) * 4;
+
+   snprintf(snum, 16, "serdes%d", sd);
+   snprintf(scfg, 16, "%x", cfgr);
+   env_set(snum, scfg);
+
+   return 0;
+}
+
+int serdes_misc_init(void)
+{
+#ifdef CONFIG_SYS_FSL_SRDS_1
+   serdes_set_env(FSL_SRDS_1, FSL_CHASSIS3_SRDS1_REGSR,
+  FSL_CHASSIS3_SRDS1_PRTCL_MASK,
+  FSL_CHASSIS3_SRDS1_PRTCL_SHIFT);
+#endif
+#ifdef CONFIG_SYS_FSL_SRDS_2
+   serdes_set_env(FSL_SRDS_2, FSL_CHASSIS3_SRDS2_REGSR,
+  FSL_CHASSIS3_SRDS2_PRTCL_MASK,
+  FSL_CHASSIS3_SRDS2_PRTCL_SHIFT);
+#endif
+#ifdef CONFIG_SYS_NXP_SRDS_3
+   serdes_set_env(NXP_SRDS_3, FSL_CHASSIS3_SRDS3_REGSR,
+  FSL_CHASSIS3_SRDS3_PRTCL_MASK,
+  FSL_CHASSIS3_SRDS3_PRTCL_SHIFT);
+#endif
+
+   return 0;
+}
-- 
2.17.1

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[U-Boot] [PATCH 2/5] board: fsl: ls2080a/ls2081a: remove empty arch_misc_init

2019-12-03 Thread Alex Marginean
The arch_misc_init function is emtpy on LS2 SoCs/boards, remove it.

Signed-off-by: Alex Marginean 
---
 arch/arm/Kconfig| 5 -
 board/freescale/ls2080a/ls2080a.c   | 7 ---
 board/freescale/ls2080aqds/ls2080aqds.c | 7 ---
 board/freescale/ls2080ardb/ls2080ardb.c | 7 ---
 4 files changed, 26 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3a3d77b04f..459876b543 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1096,7 +1096,6 @@ config TARGET_VEXPRESS64_JUNO
 config TARGET_LS2080A_EMU
bool "Support ls2080a_emu"
select ARCH_LS2080A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select FSL_DDR_SYNC_REFRESH
@@ -1109,7 +1108,6 @@ config TARGET_LS2080A_EMU
 config TARGET_LS2080A_SIMU
bool "Support ls2080a_simu"
select ARCH_LS2080A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select BOARD_LATE_INIT
@@ -1138,7 +1136,6 @@ config TARGET_LS1088AQDS
 config TARGET_LS2080AQDS
bool "Support ls2080aqds"
select ARCH_LS2080A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1157,7 +1154,6 @@ config TARGET_LS2080AQDS
 config TARGET_LS2080ARDB
bool "Support ls2080ardb"
select ARCH_LS2080A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1176,7 +1172,6 @@ config TARGET_LS2080ARDB
 config TARGET_LS2081ARDB
bool "Support ls2081ardb"
select ARCH_LS2080A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select BOARD_LATE_INIT
diff --git a/board/freescale/ls2080a/ls2080a.c 
b/board/freescale/ls2080a/ls2080a.c
index 413a698511..bc68f99625 100644
--- a/board/freescale/ls2080a/ls2080a.c
+++ b/board/freescale/ls2080a/ls2080a.c
@@ -48,13 +48,6 @@ void detail_board_ddr_info(void)
 #endif
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
-   return 0;
-}
-#endif
-
 int board_eth_init(bd_t *bis)
 {
int error = 0;
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c 
b/board/freescale/ls2080aqds/ls2080aqds.c
index 25e80c8ac6..fce433461a 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -289,13 +289,6 @@ void detail_board_ddr_info(void)
 #endif
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
-   return 0;
-}
-#endif
-
 #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
 void fdt_fixup_board_enet(void *fdt)
 {
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c 
b/board/freescale/ls2080ardb/ls2080ardb.c
index 6a1b8e3f53..282aaf47fb 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -318,13 +318,6 @@ void detail_board_ddr_info(void)
 #endif
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
-   return 0;
-}
-#endif
-
 #ifdef CONFIG_FSL_MC_ENET
 void fdt_fixup_board_enet(void *fdt)
 {
-- 
2.17.1

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[U-Boot] [PATCH 4/5] board: fsl: ls1028a: free up arch_misc_init

2019-12-03 Thread Alex Marginean
Currently LS1028A board code uses arch_misc_init to set up the board mux
on QDS.  Move this code to misc_init_r.  This is consistent with LS gen 2
and T series SoCs/boards.

Signed-off-by: Alex Marginean 
---
 arch/arm/Kconfig | 1 -
 board/freescale/ls1028a/ls1028a.c| 4 ++--
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 +
 configs/ls1028aqds_tfa_defconfig | 1 +
 4 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 8a190bab8c..77a5ed5a40 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1319,7 +1319,6 @@ config TARGET_LS1028AQDS
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
select BOARD_LATE_INIT
-   select ARCH_MISC_INIT
help
  Support for Freescale LS1028AQDS platform
  The LS1028A Development System (QDS) is a high-performance
diff --git a/board/freescale/ls1028a/ls1028a.c 
b/board/freescale/ls1028a/ls1028a.c
index a9606b8865..3977ecf896 100644
--- a/board/freescale/ls1028a/ls1028a.c
+++ b/board/freescale/ls1028a/ls1028a.c
@@ -96,8 +96,8 @@ int board_eth_init(bd_t *bis)
return pci_eth_init(bis);
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
 {
config_board_mux();
 
diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index b5dceb4471..77860a568b 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -16,6 +16,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x200 default_hugepagesz=2m 
hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index e75d140e94..75871e5569 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -17,6 +17,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x200 default_hugepagesz=2m 
hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
-- 
2.17.1

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[U-Boot] [PATCH 1/5] board: fsl: lx2160a: free up arch_misc_init

2019-12-03 Thread Alex Marginean
Currently LX2 board code uses arch_misc_init to set up the board mux on
RDB and QDS.  Move this code to misc_init_r.  This is consistent with LS
gen 2 and T series SoCs/boards.

Signed-off-by: Alex Marginean 
---
 arch/arm/Kconfig | 2 --
 board/freescale/lx2160a/lx2160a.c| 4 ++--
 configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 +
 configs/lx2160aqds_tfa_defconfig | 1 +
 configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 +
 configs/lx2160ardb_tfa_defconfig | 1 +
 6 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f96841c777..3a3d77b04f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1190,7 +1190,6 @@ config TARGET_LS2081ARDB
 config TARGET_LX2160ARDB
bool "Support lx2160ardb"
select ARCH_LX2160A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1204,7 +1203,6 @@ config TARGET_LX2160ARDB
 config TARGET_LX2160AQDS
bool "Support lx2160aqds"
select ARCH_LX2160A
-   select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
diff --git a/board/freescale/lx2160a/lx2160a.c 
b/board/freescale/lx2160a/lx2160a.c
index eff12747b4..413aaa6baf 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -579,8 +579,8 @@ void detail_board_ddr_info(void)
print_ddr_info(0);
 }
 
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
 {
config_board_mux();
 
diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig 
b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
index 4ab7582fc7..43a2b8328d 100644
--- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
@@ -15,6 +15,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m 
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
 # CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_GPT=y
diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig
index a35f1cc38d..06ed9ba83d 100644
--- a/configs/lx2160aqds_tfa_defconfig
+++ b/configs/lx2160aqds_tfa_defconfig
@@ -16,6 +16,7 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m 
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
 # CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_GPT=y
diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig 
b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
index 87c54b00f6..40ccc1f569 100644
--- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
@@ -16,6 +16,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m 
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
 # CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_GPT=y
diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig
index 18057b20b1..8478404dd6 100644
--- a/configs/lx2160ardb_tfa_defconfig
+++ b/configs/lx2160ardb_tfa_defconfig
@@ -17,6 +17,7 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m 
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
 # CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_GPT=y
-- 
2.17.1

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[U-Boot] [PATCH] configs: ls1028aqds: enable mdio muxing by default

2019-12-02 Thread Alex Marginean
LS1028A QDS boards have a MDIO MUX and they require the driver for it for
PHYs to work.

Signed-off-by: Alex Marginean 
---
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 2 ++
 configs/ls1028aqds_tfa_defconfig | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index 65e467817e..b5dceb4471 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -50,9 +50,11 @@ CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_VITESSE=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
+CONFIG_DM_MDIO_MUX=y
 CONFIG_DM_DSA=y
 CONFIG_E1000=y
 CONFIG_MSCC_FELIX_SWITCH=y
+CONFIG_MDIO_MUX_I2CREG=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index 40d259d907..e75d140e94 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -56,9 +56,11 @@ CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_VITESSE=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
+CONFIG_DM_MDIO_MUX=y
 CONFIG_DM_DSA=y
 CONFIG_E1000=y
 CONFIG_MSCC_FELIX_SWITCH=y
+CONFIG_MDIO_MUX_I2CREG=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
-- 
2.17.1

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[U-Boot] [PATCH v2] ls1028a: Configure stream IDs for integrated PCI and fix up Linux DT

2019-11-27 Thread Alex Marginean
Hardware comes out of reset with implicit values, but these are outside
the accepted range for Layerscape gen 3 chassis spec used on LS1028A.
Allocate different IDs and fix up Linux DT to use them.

Signed-off-by: Alex Marginean 
Reviewed-by: Bin Meng 
---

Changes in v2:
 - moved code under arm/cpu from board as it's in fact SoC related
 
Replaces v1 and this earlier patch:
https://patchwork.ozlabs.org/patch/1144486/

 arch/arm/cpu/armv8/fsl-layerscape/cpu.c   |  9 ++
 arch/arm/cpu/armv8/fsl-layerscape/fdt.c   |  9 ++
 .../arm/cpu/armv8/fsl-layerscape/ls1028_ids.c | 93 +++
 .../asm/arch-fsl-layerscape/stream_id_lsch3.h |  8 ++
 4 files changed, 119 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c 
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 83a3319321..c6490556e6 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -1098,6 +1098,12 @@ static void config_core_prefetch(void)
}
 }
 
+#ifdef CONFIG_PCIE_ECAM_GENERIC
+__weak void set_ecam_icids(void)
+{
+}
+#endif
+
 int arch_early_init_r(void)
 {
 #ifdef CONFIG_SYS_FSL_ERRATUM_A009635
@@ -1149,6 +1155,9 @@ int arch_early_init_r(void)
 #endif
 #ifdef CONFIG_SYS_DPAA_QBMAN
setup_qbman_portals();
+#endif
+#ifdef CONFIG_PCIE_ECAM_GENERIC
+   set_ecam_icids();
 #endif
return 0;
 }
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c 
b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index e993209593..1e7e46e88a 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -421,6 +421,12 @@ static void fdt_disable_multimedia(void *blob, unsigned 
int svr)
 }
 #endif
 
+#ifdef CONFIG_PCIE_ECAM_GENERIC
+__weak void fdt_fixup_ecam(void *blob)
+{
+}
+#endif
+
 void ft_cpu_setup(void *blob, bd_t *bd)
 {
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
@@ -485,4 +491,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 #ifdef CONFIG_ARCH_LS1028A
fdt_disable_multimedia(blob, svr);
 #endif
+#ifdef CONFIG_PCIE_ECAM_GENERIC
+   fdt_fixup_ecam(blob);
+#endif
 }
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c 
b/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c
index 9462298fbf..8110412da6 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c
@@ -33,3 +33,96 @@ struct icid_id_table icid_tbl[] = {
 };
 
 int icid_tbl_sz = ARRAY_SIZE(icid_tbl);
+
+/* integrated PCI is handled separately as it's not part of CCSR/SCFG */
+#ifdef CONFIG_PCIE_ECAM_GENERIC
+
+#define ECAM_IERB_BASE 0x1f080ULL
+#define ECAM_IERB_OFFSET_NA-1
+#define ECAM_IERB_FUNC_CNT ARRAY_SIZE(ierb_offset)
+/* cache related transaction attributes for PCIe functions */
+#define ECAM_IERB_MSICAR   (ECAM_IERB_BASE + 0xa400)
+#define ECAM_IERB_MSICAR_VALUE 0x30
+
+/* offset of IERB config register per PCI function */
+static int ierb_offset[] = {
+   0x0800,
+   0x1800,
+   0x2800,
+   0x3800,
+   0x4800,
+   0x5800,
+   0x6800,
+   ECAM_IERB_OFFSET_NA,
+   0x0804,
+   0x0808,
+   0x1804,
+   0x1808,
+};
+
+/*
+ * Use a custom function for LS1028A, for now this is the only SoC with IERB
+ * and we're currently considering reorganizing IERB for future SoCs.
+ */
+void set_ecam_icids(void)
+{
+   int i;
+
+   out_le32(ECAM_IERB_MSICAR, ECAM_IERB_MSICAR_VALUE);
+
+   for (i = 0; i < ECAM_IERB_FUNC_CNT; i++) {
+   if (ierb_offset[i] == ECAM_IERB_OFFSET_NA)
+   continue;
+
+   out_le32(ECAM_IERB_BASE + ierb_offset[i],
+FSL_ECAM_STREAM_ID_START + i);
+   }
+}
+
+static int fdt_setprop_inplace_idx_u32(void *fdt, int nodeoffset,
+  const char *name, uint32_t idx, u32 val)
+{
+   val = cpu_to_be32(val);
+   return fdt_setprop_inplace_namelen_partial(fdt, nodeoffset, name,
+  strlen(name),
+  idx * sizeof(val), &val,
+  sizeof(val));
+}
+
+static int fdt_getprop_len(void *fdt, int nodeoffset, const char *name)
+{
+   int len;
+
+   if (fdt_getprop_namelen(fdt, nodeoffset, name, strlen(name), &len))
+   return len;
+
+   return 0;
+}
+
+void fdt_fixup_ecam(void *blob)
+{
+   int off;
+
+   off = fdt_node_offset_by_compatible(blob, 0, "pci-host-ecam-generic");
+   if (off < 0) {
+   debug("ECAM node not found\n");
+   return;
+   }
+
+   if (fdt_getprop_len(blob, off, "msi-map") != 16 ||
+   fdt_getprop_len(blob, off, "iommu-map") != 16) {
+   log_err("invalid msi/iommu-map propertly size in ECAM node\n");
+   

[U-Boot] [PATCH] ls1028a: Configure stream IDs for integrated PCI and fix up Linux DT

2019-11-27 Thread Alex Marginean
Hardware comes out of reset with implicit values, but these are outside
the accepted range for Layerscape gen 3 chassis spec used on LS1028A.
Allocate different IDs and fix up Linux DT to use them.

Signed-off-by: Alex Marginean 
---
 arch/arm/cpu/armv8/fsl-layerscape/fdt.c   |   9 ++
 .../asm/arch-fsl-layerscape/stream_id_lsch3.h |   8 ++
 board/freescale/ls1028a/ls1028a.c | 106 ++
 3 files changed, 123 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c 
b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index e993209593..1e7e46e88a 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -421,6 +421,12 @@ static void fdt_disable_multimedia(void *blob, unsigned 
int svr)
 }
 #endif
 
+#ifdef CONFIG_PCIE_ECAM_GENERIC
+__weak void fdt_fixup_ecam(void *blob)
+{
+}
+#endif
+
 void ft_cpu_setup(void *blob, bd_t *bd)
 {
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
@@ -485,4 +491,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 #ifdef CONFIG_ARCH_LS1028A
fdt_disable_multimedia(blob, svr);
 #endif
+#ifdef CONFIG_PCIE_ECAM_GENERIC
+   fdt_fixup_ecam(blob);
+#endif
 }
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h 
b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
index 94ea99a349..01d362d183 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
@@ -42,6 +42,10 @@
  * -the MC is responsible for allocating and setting up 'isolation context
  *  IDs (ICIDs) based on the allocated stream IDs for all DPAA2 devices.
  *
+ *  - ECAM (integrated PCI)
+ * - U-Boot applies the value here to HW and does DT fix-up for both
+ *   'iommu-map' and 'msi-map'
+ *
  * On Chasis-3 SoCs stream IDs are programmed in AMQ registers (32-bits) for
  * each of the different bus masters.  The relationship between
  * the AMQ registers and stream IDs is defined in the table below:
@@ -98,6 +102,10 @@
 #define FSL_DPAA2_STREAM_ID_START  23
 #define FSL_DPAA2_STREAM_ID_END63
 
+/* PCI IEPs, this overlaps DPAA2 but these two are exclusive at least for now 
*/
+#define FSL_ECAM_STREAM_ID_START   32
+#define FSL_ECAM_STREAM_ID_END 63
+
 #define FSL_SEC_STREAM_ID  64
 #define FSL_SEC_JR1_STREAM_ID  65
 #define FSL_SEC_JR2_STREAM_ID  66
diff --git a/board/freescale/ls1028a/ls1028a.c 
b/board/freescale/ls1028a/ls1028a.c
index a9606b8865..1f5dc0d0b2 100644
--- a/board/freescale/ls1028a/ls1028a.c
+++ b/board/freescale/ls1028a/ls1028a.c
@@ -28,6 +28,52 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_PCIE_ECAM_GENERIC
+
+#define ECAM_IERB_BASE 0x1f080ULL
+#define ECAM_IERB_OFFSET_NA-1
+#define ECAM_IERB_FUNC_CNT ARRAY_SIZE(ierb_offset)
+/* cache related transaction attributes for PCIe functions */
+#define ECAM_IERB_MSICAR   (ECAM_IERB_BASE + 0xa400)
+#define ECAM_IERB_MSICAR_VALUE 0x30
+
+/* offset of IERB config register per PCI function */
+static int ierb_offset[] = {
+   0x0800,
+   0x1800,
+   0x2800,
+   0x3800,
+   0x4800,
+   0x5800,
+   0x6800,
+   ECAM_IERB_OFFSET_NA,
+   0x0804,
+   0x0808,
+   0x1804,
+   0x1808,
+};
+
+/*
+ * Use a custom function for LS1028A, for now this is the only SoC with IERB
+ * and we're currently considering reorganizing IERB for future SoCs.
+ */
+static void set_ecam_icids(void)
+{
+   int i;
+
+   out_le32(ECAM_IERB_MSICAR, ECAM_IERB_MSICAR_VALUE);
+
+   for (i = 0; i < ECAM_IERB_FUNC_CNT; i++) {
+   if (ierb_offset[i] == ECAM_IERB_OFFSET_NA)
+   continue;
+
+   out_le32(ECAM_IERB_BASE + ierb_offset[i],
+FSL_ECAM_STREAM_ID_START + i);
+   }
+}
+
+#endif /* CONFIG_PCIE_ECAM_GENERIC */
+
 int config_board_mux(void)
 {
 #if defined(CONFIG_TARGET_LS1028AQDS) && defined(CONFIG_FSL_QIXIS)
@@ -88,6 +134,16 @@ int board_init(void)
 #endif
 
 #endif
+
+   /*
+* ICIDs for other hardware blocks are set really early on, before MMU
+* is set up.  For integrated PCI we need access to IERB which is not
+* part of CCSR, so we have to wait for MMU mappings to be applied
+*/
+#ifdef CONFIG_PCIE_ECAM_GENERIC
+   set_ecam_icids();
+#endif
+
return 0;
 }
 
@@ -244,3 +300,53 @@ int checkboard(void)
return 0;
 }
 #endif
+
+#ifdef CONFIG_PCIE_ECAM_GENERIC
+
+static int fdt_setprop_inplace_idx_u32(void *fdt, int nodeoffset,
+  const char *name, uint32_t idx, u32 val)
+{
+   val = cpu_to_be32(val);
+   return fdt_setprop_inplace_namelen_partial(fdt, nodeoffset, name,
+  strlen(name),
+

[U-Boot] [PATCH] drivers: net: fsl_enetc: register internal MDIO bus

2019-11-25 Thread Alex Marginean
This bus is used to access internal SoC PHYs.  These PHYs are configured
by the ENETC driver directly, but it's useful to have command line access
to this MDIO to debug the system especially when using new external PHYs.

Signed-off-by: Alex Marginean 
---
 drivers/net/fsl_enetc.c | 15 +++
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c
index e86f3dddb5..02c1ee70d9 100644
--- a/drivers/net/fsl_enetc.c
+++ b/drivers/net/fsl_enetc.c
@@ -156,19 +156,14 @@ static void enetc_start_pcs(struct udevice *dev)
 
priv->if_type = PHY_INTERFACE_MODE_NONE;
 
-   /* check internal mdio capability, not all ports need it */
+   /* register internal MDIO for debug purposes */
if (enetc_read_port(priv, ENETC_PCAPR0) & ENETC_PCAPRO_MDIO) {
-   /*
-* set up internal MDIO, this is part of ETH PCI function and is
-* used to access serdes / internal SoC PHYs.
-* We don't currently register it as a MDIO bus as it goes away
-* when the interface is removed, so it can't practically be
-* used in the console.
-*/
priv->imdio.read = enetc_mdio_read;
priv->imdio.write = enetc_mdio_write;
priv->imdio.priv = priv->port_regs + ENETC_PM_IMDIO_BASE;
strncpy(priv->imdio.name, dev->name, MDIO_NAME_LEN);
+   if (!miiphy_get_dev_by_name(priv->imdio.name))
+   mdio_register(&priv->imdio);
}
 
if (!ofnode_valid(dev->node)) {
@@ -451,6 +446,10 @@ static void enetc_stop(struct udevice *dev)
 {
/* FLR is sufficient to quiesce the device */
dm_pci_flr(dev);
+   /* leave the BARs accessible after we stop, this is needed to use
+* internal MDIO in command line.
+*/
+   dm_pci_clrset_config16(dev, PCI_COMMAND, 0, PCI_COMMAND_MEMORY);
 }
 
 /*
-- 
2.17.1

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[U-Boot] [PATCH v2 6/6] configs: ls1028a: enable the Ethernet switch driver in defconfig

2019-11-25 Thread Alex Marginean
The switch driver for LS1028A Ethernet switch is now compiled in for
both LS1028A boards.

Signed-off-by: Alex Marginean 
---
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 3 ++-
 configs/ls1028aqds_tfa_defconfig | 3 ++-
 configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 3 ++-
 configs/ls1028ardb_tfa_defconfig | 3 ++-
 4 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index 713a088e42..931c78ab46 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -49,8 +49,9 @@ CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_VITESSE=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
+CONFIG_DM_DSA=y
 CONFIG_E1000=y
-CONFIG_FSL_ENETC=y
+CONFIG_MSCC_FELIX_SWITCH=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index b5eb872148..ad5c783e16 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -52,8 +52,9 @@ CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_VITESSE=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
+CONFIG_DM_DSA=y
 CONFIG_E1000=y
-CONFIG_FSL_ENETC=y
+CONFIG_MSCC_FELIX_SWITCH=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
index dc07a0a4d7..e30fb96344 100644
--- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
@@ -48,9 +48,10 @@ CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_VITESSE=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
+CONFIG_DM_DSA=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
-CONFIG_FSL_ENETC=y
+CONFIG_MSCC_FELIX_SWITCH=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig
index 644c5ac6bb..87e4fdd18e 100644
--- a/configs/ls1028ardb_tfa_defconfig
+++ b/configs/ls1028ardb_tfa_defconfig
@@ -52,9 +52,10 @@ CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_VITESSE=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
+CONFIG_DM_DSA=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
-CONFIG_FSL_ENETC=y
+CONFIG_MSCC_FELIX_SWITCH=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
-- 
2.17.1

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[U-Boot] [PATCH v2 3/6] test: dm: add a simple unit test for DSA class

2019-11-25 Thread Alex Marginean
The test pings the local IP address though different ports of a sandbox
DSA device.  Port traffic is filtered and the test verifies that ping
works only on enabled ports.
The additional interfaces require MAC addresses, these have been added
to sandbox default environment.

Signed-off-by: Alex Marginean 
---
 arch/Kconfig  |  1 +
 arch/sandbox/dts/test.dts | 49 +
 include/configs/sandbox.h |  4 +++
 test/dm/Makefile  |  1 +
 test/dm/dsa.c | 58 +++
 test/dm/test-fdt.c|  2 +-
 6 files changed, 114 insertions(+), 1 deletion(-)
 create mode 100644 test/dm/dsa.c

diff --git a/arch/Kconfig b/arch/Kconfig
index 141e48bc43..70907d69a1 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -133,6 +133,7 @@ config SANDBOX
imply PHYLIB
imply DM_MDIO
imply DM_MDIO_MUX
+   imply DM_DSA
 
 config SH
bool "SuperH architecture"
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index fdb08f2111..0f565f066a 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -40,6 +40,10 @@
usb2 = &usb_2;
axi0 = &axi;
osd0 = "/osd";
+   eth8 = &swp_0;
+   eth9 = &swp_1;
+   eth10 = &swp_2;
+   eth11 = &dsa_eth0;
};
 
audio: audio-codec {
@@ -889,6 +893,51 @@
mdio: mdio-test {
compatible = "sandbox,mdio";
};
+
+   dsa_eth0: dsa-test-eth {
+   compatible = "sandbox,dsa-eth";
+   };
+
+   dsa-test {
+   compatible = "sandbox,dsa";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   swp_0: port@0 {
+   reg = <0>;
+   label = "lan0";
+   };
+
+   swp_1: port@1 {
+   reg = <1>;
+   label = "lan1";
+   phy-mode = "rgmii-txid";
+   fixed-link {
+   speed = <1000>;
+   full-duplex;
+   };
+   };
+
+   swp_2: port@2 {
+   reg = <2>;
+   label = "lan2";
+   fixed-link {
+   speed = <100>;
+   full-duplex;
+   };
+   };
+
+   port@3 {
+   reg = <3>;
+   ethernet = <&dsa_eth0>;
+   fixed-link {
+   speed = <100>;
+   full-duplex;
+   };
+   };
+   };
+   };
 };
 
 #include "sandbox_pmic.dtsi"
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index 5d75021ed6..a586a93415 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -102,6 +102,10 @@
"eth1addr=00:00:11:22:33:45\0" \
"eth3addr=00:00:11:22:33:46\0" \
"eth5addr=00:00:11:22:33:47\0" \
+   "eth8addr=00:00:11:22:33:48\0" \
+   "eth9addr=00:00:11:22:33:49\0" \
+   "eth10addr=00:00:11:22:33:4a\0" \
+   "eth11addr=00:00:11:22:33:4b\0" \
"ipaddr=1.2.3.4\0"
 
 #define MEM_LAYOUT_ENV_SETTINGS \
diff --git a/test/dm/Makefile b/test/dm/Makefile
index 0c2fd5cb5e..69e9feed91 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -65,4 +65,5 @@ obj-$(CONFIG_VIRTIO_SANDBOX) += virtio.o
 obj-$(CONFIG_DMA) += dma.o
 obj-$(CONFIG_DM_MDIO) += mdio.o
 obj-$(CONFIG_DM_MDIO_MUX) += mdio_mux.o
+obj-$(CONFIG_DM_DSA) += dsa.o
 endif
diff --git a/test/dm/dsa.c b/test/dm/dsa.c
new file mode 100644
index 00..c8e76be16f
--- /dev/null
+++ b/test/dm/dsa.c
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 NXP
+ */
+
+#include 
+#include 
+#include 
+
+extern int dsa_sandbox_port_mask;
+
+/* this test sends ping requests with the local address through each DSA port
+ * via the dummy DSA master Eth.
+ * The dummy Eth filters traffic based on DSA port used to Tx and 

[U-Boot] [PATCH v2 5/6] arm: dts: ls1028a: adds Ethernet switch node and its dependencies

2019-11-25 Thread Alex Marginean
The definition follows the DSA binding in kernel and describes the switch,
its ports and PHYs.
ENETC PF6 is the 2nd Eth controller linked to the switch on LS1028A, it is
not used in U-Boot and was disabled.

Signed-off-by: Alex Marginean 
Tested-by: Michael Walle 
---
 arch/arm/dts/fsl-ls1028a-rdb.dts | 36 ++
 arch/arm/dts/fsl-ls1028a.dtsi| 44 +++-
 2 files changed, 79 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/fsl-ls1028a-rdb.dts b/arch/arm/dts/fsl-ls1028a-rdb.dts
index 3d5e8ade21..700fc067a4 100644
--- a/arch/arm/dts/fsl-ls1028a-rdb.dts
+++ b/arch/arm/dts/fsl-ls1028a-rdb.dts
@@ -114,9 +114,45 @@
phy-handle = <&rdb_phy0>;
 };
 
+ðsw_ports {
+   port@0 {
+   status = "okay";
+   phy-mode = "qsgmii";
+   phy-handle = <&sw_phy0>;
+   };
+   port@1 {
+   status = "okay";
+   phy-mode = "qsgmii";
+   phy-handle = <&sw_phy1>;
+   };
+   port@2 {
+   status = "okay";
+   phy-mode = "qsgmii";
+   phy-handle = <&sw_phy2>;
+   };
+   port@3 {
+   status = "okay";
+   phy-mode = "qsgmii";
+   phy-handle = <&sw_phy3>;
+   };
+};
+
 &mdio0 {
status = "okay";
rdb_phy0: phy@2 {
reg = <2>;
};
+
+   sw_phy0: phy@10 {
+   reg = <0x10>;
+   };
+   sw_phy1: phy@11 {
+   reg = <0x11>;
+   };
+   sw_phy2: phy@12 {
+   reg = <0x12>;
+   };
+   sw_phy3: phy@13 {
+   reg = <0x13>;
+   };
 };
diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
index 43a154e8e7..97c7d4de4d 100644
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@@ -136,9 +136,51 @@
reg = <0x000300 0 0 0 0>;
status = "disabled";
};
+   ethsw: pci@0,5 {
+   #address-cells=<0>;
+   #size-cells=<1>;
+   reg = <0x000500 0 0 0 0>;
+
+   ethsw_ports: ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   status = "disabled";
+   label = "swp0";
+   };
+   port@1 {
+   reg = <1>;
+   status = "disabled";
+   label = "swp1";
+   };
+   port@2 {
+   reg = <2>;
+   status = "disabled";
+   label = "swp2";
+   };
+   port@3 {
+   reg = <3>;
+   status = "disabled";
+   label = "swp3";
+   };
+   port@4 {
+   reg = <4>;
+   phy-mode = "internal";
+   status = "okay";
+   ethernet = <&enetc2>;
+   };
+   port@5 {
+   reg = <5>;
+   phy-mode = "internal";
+   status = "disabled";
+   };
+   };
+   };
enetc6: pci@0,6 {
reg = <0x000600 0 0 0 0>;
-   status = "okay";
+   status = "disabled";
phy-mode = "internal";
};
};
-- 
2.17.1

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[U-Boot] [PATCH v2 4/6] drivers: net: add Felix DSA switch driver

2019-11-25 Thread Alex Marginean
This driver is used for the Ethernet switch integrated into LS1028A NXP.
Felix on LS1028A has 4 front panel ports and two internal ports, I/O
to/from the switch is done through an ENETC Ethernet interface.
The 4 front panel ports are available as Ethernet interfaces and can be
used with the typical network commands like tftp.

Signed-off-by: Alex Marginean 
Tested-by: Michael Walle 
---
 drivers/net/fsl_enetc.h |   5 +
 drivers/net/mscc_eswitch/Kconfig|   8 +
 drivers/net/mscc_eswitch/Makefile   |   1 +
 drivers/net/mscc_eswitch/felix_switch.c | 454 
 4 files changed, 468 insertions(+)
 create mode 100644 drivers/net/mscc_eswitch/felix_switch.c

diff --git a/drivers/net/fsl_enetc.h b/drivers/net/fsl_enetc.h
index 9a36cdad80..29e7781b5e 100644
--- a/drivers/net/fsl_enetc.h
+++ b/drivers/net/fsl_enetc.h
@@ -200,6 +200,11 @@ struct enetc_priv {
 /* PCS replicator block for USXGMII */
 #define ENETC_PCS_DEVAD_REPL   0x1f
 
+#define ENETC_PCS_REPL_LINK_TIMER_10x12
+#define  ENETC_PCS_REPL_LINK_TIMER_1_DEF   0x0003
+#define ENETC_PCS_REPL_LINK_TIMER_20x13
+#define  ENETC_PCS_REPL_LINK_TIMER_2_DEF   0x06a0
+
 /* ENETC external MDIO registers */
 #define ENETC_MDIO_BASE0x1c00
 #define ENETC_MDIO_CFG 0x00
diff --git a/drivers/net/mscc_eswitch/Kconfig b/drivers/net/mscc_eswitch/Kconfig
index 80dd22f98b..11fb08edaa 100644
--- a/drivers/net/mscc_eswitch/Kconfig
+++ b/drivers/net/mscc_eswitch/Kconfig
@@ -36,3 +36,11 @@ config MSCC_SERVAL_SWITCH
select PHYLIB
help
  This driver supports the Serval network switch device.
+
+config MSCC_FELIX_SWITCH
+   bool "Felix switch driver"
+   depends on DM_DSA && DM_PCI
+   select FSL_ENETC
+   help
+ This driver supports the Ethernet switch integrated in LS1028A NXP
+ SoC.
diff --git a/drivers/net/mscc_eswitch/Makefile 
b/drivers/net/mscc_eswitch/Makefile
index d583fe9fc4..22342ed114 100644
--- a/drivers/net/mscc_eswitch/Makefile
+++ b/drivers/net/mscc_eswitch/Makefile
@@ -4,3 +4,4 @@ obj-$(CONFIG_MSCC_LUTON_SWITCH) += luton_switch.o mscc_xfer.o 
mscc_mac_table.o m
 obj-$(CONFIG_MSCC_JR2_SWITCH) += jr2_switch.o mscc_xfer.o mscc_miim.o
 obj-$(CONFIG_MSCC_SERVALT_SWITCH) += servalt_switch.o mscc_xfer.o mscc_miim.o
 obj-$(CONFIG_MSCC_SERVAL_SWITCH) += serval_switch.o mscc_xfer.o 
mscc_mac_table.o mscc_miim.o
+obj-$(CONFIG_MSCC_FELIX_SWITCH) += felix_switch.o
diff --git a/drivers/net/mscc_eswitch/felix_switch.c 
b/drivers/net/mscc_eswitch/felix_switch.c
new file mode 100644
index 00..120973bda2
--- /dev/null
+++ b/drivers/net/mscc_eswitch/felix_switch.c
@@ -0,0 +1,454 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Felix Ethernet switch driver
+ * Copyright 2018-2019 NXP
+ */
+
+/*
+ * This driver is used for the Ethernet switch integrated into LS1028A NXP.
+ * Felix switch is derived from Microsemi Ocelot but there are several NXP
+ * adaptations that makes the two U-Boot drivers largely incompatible.
+ *
+ * Felix on LS1028A has 4 front panel ports and two internal ports, connected
+ * to ENETC interfaces.  We're using one of the ENETC interfaces to push 
traffic
+ * into the switch.  Injection/extraction headers are used to identify
+ * egress/ingress ports in the switch for Tx/Rx.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* defines especially around PCS are reused from enetc */
+#include "../fsl_enetc.h"
+
+#define PCI_DEVICE_ID_FELIX_ETHSW  0xEEF0
+
+/* Felix has in fact 6 ports, but we don't use the last internal one */
+#define FELIX_PORT_COUNT   5
+/* Front panel port mask */
+#define FELIX_FP_PORT_MASK 0xf
+
+/* Register map for BAR4 */
+#define FELIX_SYS  0x01
+#define FELIX_ES0  0x04
+#define FELIX_IS1  0x05
+#define FELIX_IS2  0x06
+#define FELIX_GMII(port)   (0x10 + (port) * 0x1)
+#define FELIX_QSYS 0x20
+
+#define FELIX_SYS_SYSTEM   (FELIX_SYS + 0x0E00)
+#define  FELIX_SYS_SYSTEM_EN   BIT(0)
+#define FELIX_SYS_RAM_CTRL (FELIX_SYS + 0x0F24)
+#define  FELIX_SYS_RAM_CTRL_INIT   BIT(1)
+#define FELIX_SYS_SYSTEM_PORT_MODE(a)  (FELIX_SYS_SYSTEM + 0xC + (a) * 4)
+#define  FELIX_SYS_SYSTEM_PORT_MODE_CPU0x001e
+
+#define FELIX_ES0_TCAM_CTRL(FELIX_ES0 + 0x03C0)
+#define  FELIX_ES0_TCAM_CTRL_ENBIT(0)
+#define FELIX_IS1_TCAM_CTRL(FELIX_IS1 + 0x03C0)
+#define  FELIX_IS1_TCAM_CTRL_ENBIT(0)
+#define FELIX_IS2_TCAM_CTRL(FELIX_IS2 + 0x03C0)
+#define  FELIX_IS2_TCAM_CTRL_ENBIT(0)
+
+#define FELIX_GMII_CLOCK_CFG(port) (FELIX_GMII(port) + 0x)
+#define  FELIX_GMII_CLOCK_CFG_LINK_1G  1
+#define  FELIX_GMII_CLOCK_CFG_LINK_100M2
+#d

[U-Boot] [PATCH v2 2/6] drivers: net: add a DSA sandbox driver

2019-11-25 Thread Alex Marginean
The DSA sandbox driver is used for DSA unit testing.  It implements a
simple 4 port switch that uses a very simple tag to identify the ports.
The DSA driver comes paired with an Ethernet driver that loops packets
back and can selectively filter traffic on DSA switch ports.

Signed-off-by: Alex Marginean 
---
 drivers/net/Kconfig   |   8 ++
 drivers/net/Makefile  |   1 +
 drivers/net/dsa_sandbox.c | 272 ++
 3 files changed, 281 insertions(+)
 create mode 100644 drivers/net/dsa_sandbox.c

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index a4157cb122..ac420cb474 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -70,6 +70,14 @@ config MDIO_MUX_SANDBOX
 
  This driver is used for testing in test/dm/mdio.c
 
+config DSA_SANDBOX
+   depends on DM_DSA && SANDBOX
+   default y
+   bool "Sandbox: Mocked DSA driver"
+   help
+ This driver implements a dummy switch and a dummy Ethernet device used
+ to test DSA class code.
+
 menuconfig NETDEVICES
bool "Network device support"
depends on NET
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 30991834ec..8be49f6335 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -82,3 +82,4 @@ obj-y += mscc_eswitch/
 obj-$(CONFIG_HIGMACV300_ETH) += higmacv300.o
 obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o
 obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o
+obj-$(CONFIG_DSA_SANDBOX) += dsa_sandbox.o
diff --git a/drivers/net/dsa_sandbox.c b/drivers/net/dsa_sandbox.c
new file mode 100644
index 00..07230eb033
--- /dev/null
+++ b/drivers/net/dsa_sandbox.c
@@ -0,0 +1,272 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 NXP
+ */
+
+#include 
+
+#define DSA_SANDBOX_MAGIC  0x00415344
+#define DSA_SANDBOX_TAG_LENsizeof(struct dsa_sandbox_tag)
+/*
+ * This global flag is used to enable DSA just for DSA test so it doesn't 
affect
+ * the existing eth unit test.
+ */
+int dsa_sandbox_port_mask;
+
+struct dsa_sandbox_priv {
+   int enabled;
+   int port_enabled;
+};
+
+struct dsa_sandbox_tag {
+   u32 magic;
+   u32 port;
+};
+
+static int dsa_sandbox_port_enable(struct udevice *dev, int port,
+  struct phy_device *phy)
+{
+   struct dsa_sandbox_priv *priv = dev->priv;
+
+   if (!priv->enabled)
+   return -EFAULT;
+
+   priv->port_enabled |= BIT(port);
+
+   return 0;
+}
+
+static void dsa_sandbox_port_disable(struct udevice *dev, int port,
+struct phy_device *phy)
+{
+   struct dsa_sandbox_priv *priv = dev->priv;
+
+   if (!priv->enabled)
+   return;
+
+   priv->port_enabled &= ~BIT(port);
+}
+
+static int dsa_sandbox_xmit(struct udevice *dev, int port, void *packet,
+   int length)
+{
+   struct dsa_sandbox_priv *priv = dev->priv;
+   struct dsa_sandbox_tag *tag = packet;
+
+   if (!priv->enabled)
+   return -EFAULT;
+
+   if (!(priv->port_enabled & BIT(port)))
+   return -EFAULT;
+
+   tag->magic = DSA_SANDBOX_MAGIC;
+   tag->port = port;
+
+   return 0;
+}
+
+static int dsa_sandbox_rcv(struct udevice *dev, int *port, void *packet,
+  int length)
+{
+   struct dsa_sandbox_priv *priv = dev->priv;
+   struct dsa_sandbox_tag *tag = packet;
+
+   if (!priv->enabled)
+   return -EFAULT;
+
+   if (tag->magic != DSA_SANDBOX_MAGIC)
+   return -EFAULT;
+
+   *port = tag->port;
+   if (!(priv->port_enabled & BIT(*port)))
+   return -EFAULT;
+
+   return 0;
+}
+
+static const struct dsa_ops dsa_sandbox_ops = {
+   .port_enable = dsa_sandbox_port_enable,
+   .port_disable = dsa_sandbox_port_disable,
+   .xmit = dsa_sandbox_xmit,
+   .rcv = dsa_sandbox_rcv,
+};
+
+static int dsa_sandbox_bind(struct udevice *dev)
+{
+   struct dsa_perdev_platdata *pdata = dev->platdata;
+
+   /* must be at least 4 to match sandbox test DT */
+   pdata->num_ports = 4;
+   pdata->headroom = DSA_SANDBOX_TAG_LEN;
+
+   return 0;
+}
+
+static int dsa_sandbox_probe(struct udevice *dev)
+{
+   struct dsa_sandbox_priv *priv = dev_get_priv(dev);
+
+   /*
+* return error if DSA is not being tested so we don't break existing
+* eth test.
+*/
+   if (!dsa_sandbox_port_mask)
+   return -EINVAL;
+
+   priv->enabled = 1;
+
+   return 0;
+}
+
+static int dsa_sandbox_remove(struct udevice *dev)
+{
+   struct dsa_sandbox_priv *priv = dev_get_priv(dev);
+
+   priv->enabled = 0;
+
+   return 0;
+}
+
+static const struct udevice_id dsa_sandbox_ids[] = {
+   { .compatible = "sandbox,dsa" },
+   { }
+};
+
+U_BOOT_DRIVER(dsa_sandbox) =

[U-Boot] [PATCH v2 0/6] Introduce DSA Ethernet switch class and Felix driver

2019-11-25 Thread Alex Marginean
DSA stands for Distributed Switch Architecture and it is a subsystem
introduced in the Linux kernel to support switches that:
- have an Ethernet link up to the CPU
- use some form of tagging to identify the source/destination port for
  Rx/Tx
- may be cascaded in tree-like structures.

DSA is described in depth here:
https://www.kernel.org/doc/Documentation/networking/dsa/dsa.txt

From the doc:

Summarized, this is basically how DSA looks like from a network device
perspective:


|---
| CPU network device (eth0)|

|  |
||
| Switch driver  |
||
|||| ||
|---|  |---|  |---|
| sw0p0 |  | sw0p1 |  | sw0p2 |
|---|  |---|  |---|

This patch set introduces a DSA class in U-Boot to support drivers of such
switches.  DSA drivers have to implement the following ops:
- enable/disable of switch ports,
- insert a tag in frames being transmitted, used by the switch to select
  the egress port,
- parse a tag in frames being received, used for Rx traffic.

DSA class code deals with presentation of switch ports as Ethernet
interfaces, deals with the master Ethernet device for I/O and helps with
parsing of the DT assuming the structure follows the DSA kernel binding.

Support for switch cascading is not included yet.

This patch set also introduces a driver for the Ethernet switch integrated
into NXP LS1028A, called Felix.  The switch has 4 front panel ports, I/O
to/fom it is done though an ENETC Ethernet interface and meta-data is
carried between the switch and the driver though an additional header
pre-pended to the original frame.
Network commands like tftp can be used on these front panel ports.  The
ports are disabled unless used so they do not cause issues on network
topologies that include loops.

Felix as seen on LS1028A RDB:
=> dm tree
 Class Index  Probed  DriverName
---
..
 dsa   0  [ + ]   felix-switch  |   |-- felix-switch
 eth   4  [ + ]   dsa-port  |   |   |-- swp0
 eth   5  [ + ]   dsa-port  |   |   |-- swp1
 eth   6  [ + ]   dsa-port  |   |   |-- swp2
 eth   7  [ + ]   dsa-port  |   |   `-- swp3

=> mdio list
..
10 - Vitesse VSC8514 <--> swp0
11 - Vitesse VSC8514 <--> swp1
12 - Vitesse VSC8514 <--> swp2
13 - Vitesse VSC8514 <--> swp3

=> tftp 8000 test
Using swp2 device
TFTP from server 192.168.100.1; our IP address is 192.168.100.100
Filename 'test'.
Load address: 0x8000
Loading: #
 #
 
 6.8 MiB/s
done
Bytes transferred = 949880 (e7e78 hex)

Changes in v2:
 - Don't use NULL PHY in Felix driver
 - guard dsa.h with #ifndef __DSA__H__, somehow I missed that in v1
 - added a TODO for setting master Eth in promiscuous mode
 - Minor fixes in patch descriptions, API comments
 - Added address/size-cells to LS1028A DT ports node

This patch set replaces v1:
https://patchwork.ozlabs.org/project/uboot/list/?series=18
and depends on:
https://patchwork.ozlabs.org/project/uboot/list/?series=144907
https://patchwork.ozlabs.org/project/uboot/list/?series=142879

Alex Marginean (6):
  net: introduce DSA class for Ethernet switches
  drivers: net: add a DSA sandbox driver
  test: dm: add a simple unit test for DSA class
  drivers: net: add Felix DSA switch driver
  arm: dts: ls1028a: adds Ethernet switch node and its dependencies
  configs: ls1028a: enable the Ethernet switch driver in defconfig

 arch/Kconfig |   1 +
 arch/arm/dts/fsl-ls1028a-rdb.dts |  36 ++
 arch/arm/dts/fsl-ls1028a.dtsi|  44 +-
 arch/sandbox/dts/test.dts|  49 ++
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig |   3 +-
 configs/ls1028aqds_tfa_defconfig |   3 +-
 configs/ls1028ardb_tfa_SECURE_BOOT_defconfig |   3 +-
 configs/ls1028ardb_tfa_defconfig |   3 +-
 drivers/net/Kconfig  |  21 +
 drivers/net/Makefile |   1 +
 drivers/net/dsa_sandbox.c| 272 +++
 drivers/net/fsl_enetc.h  |   5 +
 drivers/net/mscc_eswitch/Kconfig |   8 +
 drivers/net/mscc_eswitch/Makefile|   1 +
 drivers/net/mscc_eswitch/felix_switch.c  | 454 +++
 include/configs/sandbox.h   

[U-Boot] [PATCH v2 1/6] net: introduce DSA class for Ethernet switches

2019-11-25 Thread Alex Marginean
DSA stands for Distributed Switch Architecture and it covers switches that
are connected to the CPU through an Ethernet link and generally use frame
tags to pass information about the source/destination ports to/from CPU.
Front panel ports are presented as regular ethernet devices in U-Boot and
they are expected to support the typical networking commands.
DSA switches may be cascaded, DSA class code does not currently support
this.

Signed-off-by: Alex Marginean 
---
 drivers/net/Kconfig|  13 ++
 include/dm/uclass-id.h |   1 +
 include/dsa.h  | 140 
 net/Makefile   |   1 +
 net/dsa-uclass.c   | 369 +
 5 files changed, 524 insertions(+)
 create mode 100644 include/dsa.h
 create mode 100644 net/dsa-uclass.c

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 4182897d89..a4157cb122 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -37,6 +37,19 @@ config DM_MDIO_MUX
  This is currently implemented in net/mdio-mux-uclass.c
  Look in include/miiphy.h for details.
 
+config DM_DSA
+   bool "Enable Driver Model for DSA switches"
+   depends on DM_ETH && DM_MDIO
+   help
+ Enable Driver Model for DSA switches
+
+ Adds UCLASS_DSA class supporting switches that follow the Distributed
+ Switch Architecture (DSA).  These switches rely on the presence of a
+ management switch port connected to an Ethernet controller capable of
+ receiving frames from the switch.  This host Ethernet controller is
+ called "master" and "cpu" in DSA terminology.
+ This is currently implemented in net/dsa-uclass.c
+
 config MDIO_SANDBOX
depends on DM_MDIO && SANDBOX
default y
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 0c563d898b..8f37a91488 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -42,6 +42,7 @@ enum uclass_id {
UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */
UCLASS_DSI_HOST,/* Display Serial Interface host */
UCLASS_DMA, /* Direct Memory Access */
+   UCLASS_DSA, /* Distributed (Ethernet) Switch Architecture */
UCLASS_EFI, /* EFI managed devices */
UCLASS_ETH, /* Ethernet device */
UCLASS_FIRMWARE,/* Firmware */
diff --git a/include/dsa.h b/include/dsa.h
new file mode 100644
index 00..707a1d7e6f
--- /dev/null
+++ b/include/dsa.h
@@ -0,0 +1,140 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2019 NXP
+ */
+
+#ifndef __DSA_H__
+#define __DSA_H__
+
+#include 
+#include 
+#include 
+
+/**
+ * DSA stands for Distributed Switch Architecture and it is infrastructure
+ * intended to support drivers for Switches that rely on an intermediary
+ * Ethernet device for I/O.  These switches may support cascading allowing
+ * them to be arranged as a tree.
+ * DSA is documented in detail in the Linux kernel documentation under
+ * Documentation/networking/dsa/dsa.txt
+ * The network layout of such a switch is shown below:
+ *
+ * |---
+ * | CPU network device (eth0)|
+ * 
+ * |  |
+ * ||
+ * | Switch driver  |
+ * ||
+ * |||| ||
+ * |---|  |---|  |---|
+ * | sw0p0 |  | sw0p1 |  | sw0p2 |
+ * |---|  |---|  |---|
+ *
+ * In U-Boot the intent is to allow acces to front panel ports (shown at the
+ * bottom of the picture) though the master Ethernet port (eth0 in the 
picture).
+ * Front panel ports are presented as regular ethernet devices in U-Boot and
+ * they are expected to support the typical networking commands.
+ * In general DSA switches require the use of tags, extra headers added both by
+ * software on Tx and by the switch on Rx.  These tags carry at a minimum port
+ * information and switch information for cascaded set-ups.
+ * In U-Boot these tags are inserted and parsed by the DSA switch driver, the
+ * class code helps with headroom/tailroom for the extra headers.
+ *
+ * TODO:
+ * - handle switch cascading, for now U-Boot only supports stand-alone 
switches.
+ * - put master Eth in promisc mode, this isn't needed right now but will be
+ *   sooner or later.
+ *
+ */
+
+#define DSA_PORT_NAME_LENGTH   16
+
+/* Maximum number of ports each DSA device can have */
+#define DSA_MAX_PORTS  12
+/* Used to size internal buffers, no support for jumbo yet */
+#define DSA_MAX_FRAME_SIZE 2048
+
+/**
+ * struct dsa_ops - DSA operations
+ *
+ * @port_enable:  Initialize a switch port for I/O
+ * @port_disable: Disable a port
+ * @xmit: Insert the DSA tag for transmission
+ *DSA dri

[U-Boot] [PATCH v5 1/3] net: mdio-uclass: rename arguments of dm_mdio_phy_connect for clarity

2019-11-25 Thread Alex Marginean
Renamed dm_mdio_phy_connect arguments dev to mdiodev and addr to phyaddr
for a bit more clarity and consistency with the following patches.
Also use NULL instead of 0 on error return path.

Signed-off-by: Alex Marginean 
---
 include/miiphy.h  |  6 +++---
 net/mdio-uclass.c | 10 +-
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/include/miiphy.h b/include/miiphy.h
index 9b97d09f18..94bf0da24a 100644
--- a/include/miiphy.h
+++ b/include/miiphy.h
@@ -154,14 +154,14 @@ void dm_mdio_probe_devices(void);
 /**
  * dm_mdio_phy_connect - Wrapper over phy_connect for DM MDIO
  *
- * @dev: mdio dev
- * @addr: PHY address on MDIO bus
+ * @mdiodev: mdio device the PHY is accesible on
+ * @phyaddr: PHY address on MDIO bus
  * @ethdev: ethernet device to connect to the PHY
  * @interface: MAC-PHY protocol
  *
  * @return pointer to phy_device, or 0 on error
  */
-struct phy_device *dm_mdio_phy_connect(struct udevice *dev, int addr,
+struct phy_device *dm_mdio_phy_connect(struct udevice *mdiodev, int phyaddr,
   struct udevice *ethdev,
   phy_interface_t interface);
 
diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c
index 6f922e80b6..7a5f1d6dcc 100644
--- a/net/mdio-uclass.c
+++ b/net/mdio-uclass.c
@@ -104,16 +104,16 @@ static int dm_mdio_pre_remove(struct udevice *dev)
return 0;
 }
 
-struct phy_device *dm_mdio_phy_connect(struct udevice *dev, int addr,
+struct phy_device *dm_mdio_phy_connect(struct udevice *mdiodev, int phyaddr,
   struct udevice *ethdev,
   phy_interface_t interface)
 {
-   struct mdio_perdev_priv *pdata = dev_get_uclass_priv(dev);
+   struct mdio_perdev_priv *pdata = dev_get_uclass_priv(mdiodev);
 
-   if (device_probe(dev))
-   return 0;
+   if (device_probe(mdiodev))
+   return NULL;
 
-   return phy_connect(pdata->mii_bus, addr, ethdev, interface);
+   return phy_connect(pdata->mii_bus, phyaddr, ethdev, interface);
 }
 
 UCLASS_DRIVER(mdio) = {
-- 
2.17.1

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[U-Boot] [PATCH v5 2/3] net: mdio-uclass: add dm_eth_phy_connect helper function

2019-11-25 Thread Alex Marginean
The function connects an ethernet device to a PHY using DT information.
This API is only available for eth devices with an associated device tree
node.

Signed-off-by: Alex Marginean 
---
 include/miiphy.h  | 12 +++
 net/mdio-uclass.c | 91 +++
 2 files changed, 103 insertions(+)

diff --git a/include/miiphy.h b/include/miiphy.h
index 94bf0da24a..61c136b114 100644
--- a/include/miiphy.h
+++ b/include/miiphy.h
@@ -165,6 +165,18 @@ struct phy_device *dm_mdio_phy_connect(struct udevice 
*mdiodev, int phyaddr,
   struct udevice *ethdev,
   phy_interface_t interface);
 
+/**
+ * dm_eth_phy_connect - Connect an Eth device to a PHY based on device tree
+ *
+ * Picks up the DT phy-handle and phy-mode from ethernet device node and
+ * connects the ethernet device to the linked PHY.
+ *
+ * @ethdev: ethernet device
+ *
+ * @return pointer to phy_device, or 0 on error
+ */
+struct phy_device *dm_eth_phy_connect(struct udevice *ethdev);
+
 #endif
 
 #ifdef CONFIG_DM_MDIO_MUX
diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c
index 7a5f1d6dcc..b15d15470d 100644
--- a/net/mdio-uclass.c
+++ b/net/mdio-uclass.c
@@ -10,6 +10,17 @@
 #include 
 #include 
 
+/* DT node properties for MAC-PHY interface */
+#define PHY_MODE_STR_CNT   2
+static const char *phy_mode_str[PHY_MODE_STR_CNT] = { "phy-mode",
+ "phy-connection-type" };
+/* DT node properties that reference a PHY node */
+#define PHY_HANDLE_STR_CNT 3
+const char *phy_handle_str[PHY_HANDLE_STR_CNT] = { "phy-handle",
+  "phy",
+  "phy-device" };
+
+
 void dm_mdio_probe_devices(void)
 {
struct udevice *it;
@@ -116,6 +127,86 @@ struct phy_device *dm_mdio_phy_connect(struct udevice 
*mdiodev, int phyaddr,
return phy_connect(pdata->mii_bus, phyaddr, ethdev, interface);
 }
 
+static struct phy_device *dm_eth_connect_phy_handle(struct udevice *ethdev,
+   phy_interface_t interface)
+{
+   u32 phy_addr;
+   struct udevice *mdiodev;
+   struct phy_device *phy;
+   struct ofnode_phandle_args phandle = {.node = ofnode_null()};
+   int i;
+
+   for (i = 0; i < PHY_HANDLE_STR_CNT; i++)
+   if (!dev_read_phandle_with_args(ethdev, phy_handle_str[i], NULL,
+   0, 0, &phandle))
+   break;
+
+   if (!ofnode_valid(phandle.node)) {
+   dev_dbg(dev, "can't find PHY node\n");
+   return NULL;
+   }
+
+   /*
+* reading 'reg' directly should be fine.  This is a PHY node, the
+* address is always size 1 and requires no translation
+*/
+   if (ofnode_read_u32(phandle.node, "reg", &phy_addr)) {
+   dev_dbg(ethdev, "missing reg property in phy node\n");
+   return NULL;
+   }
+
+   if (uclass_get_device_by_ofnode(UCLASS_MDIO,
+   ofnode_get_parent(phandle.node),
+   &mdiodev)) {
+   dev_dbg(dev, "can't find MDIO bus for node %s\n",
+   ofnode_get_name(ofnode_get_parent(phandle.node)));
+   return NULL;
+   }
+
+   phy = dm_mdio_phy_connect(mdiodev, phy_addr, ethdev, interface);
+
+   if (phy)
+   phy->node = phandle.node;
+
+   return phy;
+}
+
+/* Connect to a PHY linked in eth DT node */
+struct phy_device *dm_eth_phy_connect(struct udevice *ethdev)
+{
+   const char *if_str;
+   phy_interface_t interface;
+   struct phy_device *phy;
+   int i;
+
+   if (!ofnode_valid(ethdev->node)) {
+   debug("%s: supplied eth dev has no DT node!\n", ethdev->name);
+   return NULL;
+   }
+
+   interface = PHY_INTERFACE_MODE_NONE;
+   for (i = 0; i < PHY_MODE_STR_CNT; i++) {
+   if_str = ofnode_read_string(ethdev->node, phy_mode_str[i]);
+   if (if_str) {
+   interface = phy_get_interface_by_name(if_str);
+   break;
+   }
+   }
+   if (interface < 0)
+   interface = PHY_INTERFACE_MODE_NONE;
+   if (interface == PHY_INTERFACE_MODE_NONE)
+   dev_dbg(ethdev, "can't find interface mode, default to NONE\n");
+
+   phy = dm_eth_connect_phy_handle(ethdev, interface);
+
+   if (!phy)
+   return NULL;
+
+   phy->interface = interface;
+
+   return phy;
+}
+
 UCLASS_DRIVER(mdio) = {
.id = UCLASS_MDIO,
.name = "mdio",
-- 
2.17.1

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[U-Boot] [PATCH v5 3/3] drivers: net: fsl_enetc: use the new MDIO DM helper functions

2019-11-25 Thread Alex Marginean
Uses the new dm_eth_phy_connect helper to connect to the PHY to simplify
the code.

Signed-off-by: Alex Marginean 
---
 drivers/net/fsl_enetc.c | 53 +++--
 drivers/net/fsl_enetc.h |  1 +
 2 files changed, 10 insertions(+), 44 deletions(-)

diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c
index 0ca7e838a8..e1713a3337 100644
--- a/drivers/net/fsl_enetc.c
+++ b/drivers/net/fsl_enetc.c
@@ -203,57 +203,20 @@ static void enetc_start_pcs(struct udevice *dev)
 }
 
 /* Configure the actual/external ethernet PHY, if one is found */
-static void enetc_start_phy(struct udevice *dev)
+static void enetc_config_phy(struct udevice *dev)
 {
struct enetc_priv *priv = dev_get_priv(dev);
-   struct udevice *miidev;
-   struct phy_device *phy;
-   u32 phandle, phy_id;
-   ofnode phy_node;
int supported;
 
-   if (!ofnode_valid(dev->node)) {
-   enetc_dbg(dev, "no enetc ofnode found, skipping PHY set-up\n");
-   return;
-   }
-
-   if (ofnode_read_u32(dev->node, "phy-handle", &phandle)) {
-   enetc_dbg(dev, "phy-handle not found, skipping PHY set-up\n");
-   return;
-   }
-
-   phy_node = ofnode_get_by_phandle(phandle);
-   if (!ofnode_valid(phy_node)) {
-   enetc_dbg(dev, "invalid phy node, skipping PHY set-up\n");
-   return;
-   }
-   enetc_dbg(dev, "phy node: %s\n", ofnode_get_name(phy_node));
+   priv->phy = dm_eth_phy_connect(dev);
 
-   if (ofnode_read_u32(phy_node, "reg", &phy_id)) {
-   enetc_dbg(dev,
- "missing reg in PHY node, skipping PHY set-up\n");
+   if (!priv->phy)
return;
-   }
-
-   if (uclass_get_device_by_ofnode(UCLASS_MDIO,
-   ofnode_get_parent(phy_node),
-   &miidev)) {
-   enetc_dbg(dev, "can't find MDIO bus for node %s\n",
- ofnode_get_name(ofnode_get_parent(phy_node)));
-   return;
-   }
-
-   phy = dm_mdio_phy_connect(miidev, phy_id, dev, priv->if_type);
-   if (!phy) {
-   enetc_dbg(dev, "dm_mdio_phy_connect returned null\n");
-   return;
-   }
 
supported = GENMASK(6, 0); /* speeds up to 1G & AN */
-   phy->advertising = phy->supported & supported;
-   phy->node = phy_node;
-   phy_config(phy);
-   phy_startup(phy);
+   priv->phy->advertising = priv->phy->supported & supported;
+
+   phy_config(priv->phy);
 }
 
 /*
@@ -468,7 +431,9 @@ static int enetc_start(struct udevice *dev)
enetc_setup_rx_bdr(dev);
 
enetc_start_pcs(dev);
-   enetc_start_phy(dev);
+   enetc_config_phy(dev);
+   if (priv->phy)
+   phy_startup(priv->phy);
 
return 0;
 }
diff --git a/drivers/net/fsl_enetc.h b/drivers/net/fsl_enetc.h
index 0bb4cdff47..9a36cdad80 100644
--- a/drivers/net/fsl_enetc.h
+++ b/drivers/net/fsl_enetc.h
@@ -154,6 +154,7 @@ struct enetc_priv {
 
int if_type;
struct mii_dev imdio;
+   struct phy_device *phy;
 };
 
 /* register accessors */
-- 
2.17.1

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[U-Boot] [PATCH v5 0/3] Add helper function for linking a DM Eth device to a PHY

2019-11-25 Thread Alex Marginean
The patch set introduces dm_eth_phy_connect which takes in an ethernet device
and uses DT information to find the associated PHY and connect the Ethernet
interface to it.  This should simplify similar code in ethernet drivers.

I've dropped the new binding for scanning an MDIO bus, I'll look into reworking
that to match the behavior in Linux.  The changes are more extensive though and
I plan to do that in a separate submission.

Finally the patch set updates fsl_enetc driver to use the new helper function
reducing the code by about 30 lines.

This patch set supersedes v3 series:
https://patchwork.ozlabs.org/project/uboot/list/?series=140114
and v4 series:
https://patchwork.ozlabs.org/project/uboot/list/?series=142858

Changes in v5:
 - drop mdio-handle binding
 - support alternative/obsolete bindings (like 'phy', 'phy-device')

Changes in v4:
 - rebased on current head

Changes in v3:
 - added cover letter
 - check for null PHY pointer before using it in dm_eth_connect_phy_handle
 - moved the code dealing with MDIO scanning into a separate patch
 - renames several arguments and variables for a bit more clarity and
   consistency

Changes in v2:
- Moved MDIO scan code into dm_mdio_phy_scan which is also exported
- Use interface instead of if_type for consistency
- don't use phy pointer if NULL in fsl_enetc code


Alex Marginean (3):
  net: mdio-uclass: rename arguments of dm_mdio_phy_connect for clarity
  net: mdio-uclass: add dm_eth_phy_connect helper function
  drivers: net: fsl_enetc: use the new MDIO DM helper functions

 drivers/net/fsl_enetc.c |  53 -
 drivers/net/fsl_enetc.h |   1 +
 include/miiphy.h|  18 +--
 net/mdio-uclass.c   | 102 ++--
 4 files changed, 122 insertions(+), 52 deletions(-)

-- 
2.17.1

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[U-Boot] [PATCH v2] configs: ls1028a: enable CMD_DM

2019-11-22 Thread Alex Marginean
Since at least some of the drivers relevant to LS1028A are now following
DM, it's useful to have dm command enabled by default.

Signed-off-by: Alex Marginean 
---

Changes in v2: fixed checkpatch warning

 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 +
 configs/ls1028aqds_tfa_defconfig | 1 +
 configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 1 +
 configs/ls1028ardb_tfa_defconfig | 1 +
 4 files changed, 4 insertions(+)

diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index e2fed911b1..fadb13d469 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -16,6 +16,7 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x200 default_hugepagesz=2m 
hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
 CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index 67c9a82bcd..b690e24c7f 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -15,6 +15,7 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x200 default_hugepagesz=2m 
hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
 CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
index 6b87c57ec3..cbbe649485 100644
--- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
@@ -16,6 +16,7 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x200 default_hugepagesz=2m 
hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
 CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig
index 1fd38ca3d4..35c46d4dd7 100644
--- a/configs/ls1028ardb_tfa_defconfig
+++ b/configs/ls1028ardb_tfa_defconfig
@@ -15,6 +15,7 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x200 default_hugepagesz=2m 
hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
 CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-- 
2.17.1

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[U-Boot] [PATCH 4/6] drivers: net: add Felix DSA switch driver

2019-11-21 Thread Alex Marginean
This driver is used for the Ethernet switch integrated into LS1028A NXP.
Felix on LS1028A has 4 front panel ports and two internal ports, I/O
to/from the switch is done through an ENETC Ethernet interface.
The 4 front panel ports are available as Ethernet interfaces and can be
used with the typical network commands like tftp.

Signed-off-by: Alex Marginean 
---
 drivers/net/fsl_enetc.h |   5 +
 drivers/net/mscc_eswitch/Kconfig|   8 +
 drivers/net/mscc_eswitch/Makefile   |   1 +
 drivers/net/mscc_eswitch/felix_switch.c | 453 
 4 files changed, 467 insertions(+)
 create mode 100644 drivers/net/mscc_eswitch/felix_switch.c

diff --git a/drivers/net/fsl_enetc.h b/drivers/net/fsl_enetc.h
index 9a36cdad80..29e7781b5e 100644
--- a/drivers/net/fsl_enetc.h
+++ b/drivers/net/fsl_enetc.h
@@ -200,6 +200,11 @@ struct enetc_priv {
 /* PCS replicator block for USXGMII */
 #define ENETC_PCS_DEVAD_REPL   0x1f
 
+#define ENETC_PCS_REPL_LINK_TIMER_10x12
+#define  ENETC_PCS_REPL_LINK_TIMER_1_DEF   0x0003
+#define ENETC_PCS_REPL_LINK_TIMER_20x13
+#define  ENETC_PCS_REPL_LINK_TIMER_2_DEF   0x06a0
+
 /* ENETC external MDIO registers */
 #define ENETC_MDIO_BASE0x1c00
 #define ENETC_MDIO_CFG 0x00
diff --git a/drivers/net/mscc_eswitch/Kconfig b/drivers/net/mscc_eswitch/Kconfig
index 80dd22f98b..11fb08edaa 100644
--- a/drivers/net/mscc_eswitch/Kconfig
+++ b/drivers/net/mscc_eswitch/Kconfig
@@ -36,3 +36,11 @@ config MSCC_SERVAL_SWITCH
select PHYLIB
help
  This driver supports the Serval network switch device.
+
+config MSCC_FELIX_SWITCH
+   bool "Felix switch driver"
+   depends on DM_DSA && DM_PCI
+   select FSL_ENETC
+   help
+ This driver supports the Ethernet switch integrated in LS1028A NXP
+ SoC.
diff --git a/drivers/net/mscc_eswitch/Makefile 
b/drivers/net/mscc_eswitch/Makefile
index d583fe9fc4..22342ed114 100644
--- a/drivers/net/mscc_eswitch/Makefile
+++ b/drivers/net/mscc_eswitch/Makefile
@@ -4,3 +4,4 @@ obj-$(CONFIG_MSCC_LUTON_SWITCH) += luton_switch.o mscc_xfer.o 
mscc_mac_table.o m
 obj-$(CONFIG_MSCC_JR2_SWITCH) += jr2_switch.o mscc_xfer.o mscc_miim.o
 obj-$(CONFIG_MSCC_SERVALT_SWITCH) += servalt_switch.o mscc_xfer.o mscc_miim.o
 obj-$(CONFIG_MSCC_SERVAL_SWITCH) += serval_switch.o mscc_xfer.o 
mscc_mac_table.o mscc_miim.o
+obj-$(CONFIG_MSCC_FELIX_SWITCH) += felix_switch.o
diff --git a/drivers/net/mscc_eswitch/felix_switch.c 
b/drivers/net/mscc_eswitch/felix_switch.c
new file mode 100644
index 00..8df0e8e4b7
--- /dev/null
+++ b/drivers/net/mscc_eswitch/felix_switch.c
@@ -0,0 +1,453 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Felix Ethernet switch driver
+ * Copyright 2018-2019 NXP
+ */
+
+/*
+ * This driver is used for the Ethernet switch integrated into LS1028A NXP.
+ * Felix switch is derived from Microsemi Ocelot but there are several NXP
+ * adaptations that makes the two U-Boot drivers largely incompatible.
+ *
+ * Felix on LS1028A has 4 front panel ports and two internal ports, connected
+ * to ENETC interfaces.  We're using one of the ENETC interfaces to push 
traffic
+ * into the switch.  Injection/extraction headers are used to identify
+ * egress/ingress ports in the switch for Tx/Rx.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* defines especially around PCS are reused from enetc */
+#include "../fsl_enetc.h"
+
+#define PCI_DEVICE_ID_FELIX_ETHSW  0xEEF0
+
+/* Felix has in fact 6 ports, but we don't use the last internal one */
+#define FELIX_PORT_COUNT   5
+/* Front panel port mask */
+#define FELIX_FP_PORT_MASK 0xf
+
+/* Register map for BAR4 */
+#define FELIX_SYS  0x01
+#define FELIX_ES0  0x04
+#define FELIX_IS1  0x05
+#define FELIX_IS2  0x06
+#define FELIX_GMII(port)   (0x10 + (port) * 0x1)
+#define FELIX_QSYS 0x20
+
+#define FELIX_SYS_SYSTEM   (FELIX_SYS + 0x0E00)
+#define  FELIX_SYS_SYSTEM_EN   BIT(0)
+#define FELIX_SYS_RAM_CTRL (FELIX_SYS + 0x0F24)
+#define  FELIX_SYS_RAM_CTRL_INIT   BIT(1)
+#define FELIX_SYS_SYSTEM_PORT_MODE(a)  (FELIX_SYS_SYSTEM + 0xC + (a) * 4)
+#define  FELIX_SYS_SYSTEM_PORT_MODE_CPU0x001e
+
+#define FELIX_ES0_TCAM_CTRL(FELIX_ES0 + 0x03C0)
+#define  FELIX_ES0_TCAM_CTRL_ENBIT(0)
+#define FELIX_IS1_TCAM_CTRL(FELIX_IS1 + 0x03C0)
+#define  FELIX_IS1_TCAM_CTRL_ENBIT(0)
+#define FELIX_IS2_TCAM_CTRL(FELIX_IS2 + 0x03C0)
+#define  FELIX_IS2_TCAM_CTRL_ENBIT(0)
+
+#define FELIX_GMII_CLOCK_CFG(port) (FELIX_GMII(port) + 0x)
+#define  FELIX_GMII_CLOCK_CFG_LINK_1G  1
+#define  FELIX_GMII_CLOCK_CFG_LINK_100M2
+#define  FE

[U-Boot] [PATCH 3/6] test: dm: add a simple unit test for DSA class

2019-11-21 Thread Alex Marginean
The test pings the local IP address though different ports of a sandbox
DSA device.  Port traffic is filtered and the test verifies that ping
works only on enabled ports.
The additional interfaces require MAC addresses, these have been added
to sandbox default environment.

Signed-off-by: Alex Marginean 
---
 arch/Kconfig  |  1 +
 arch/sandbox/dts/test.dts | 49 +
 include/configs/sandbox.h |  4 +++
 test/dm/Makefile  |  1 +
 test/dm/dsa.c | 58 +++
 test/dm/test-fdt.c|  2 +-
 6 files changed, 114 insertions(+), 1 deletion(-)
 create mode 100644 test/dm/dsa.c

diff --git a/arch/Kconfig b/arch/Kconfig
index 141e48bc43..70907d69a1 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -133,6 +133,7 @@ config SANDBOX
imply PHYLIB
imply DM_MDIO
imply DM_MDIO_MUX
+   imply DM_DSA
 
 config SH
bool "SuperH architecture"
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index fdb08f2111..0f565f066a 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -40,6 +40,10 @@
usb2 = &usb_2;
axi0 = &axi;
osd0 = "/osd";
+   eth8 = &swp_0;
+   eth9 = &swp_1;
+   eth10 = &swp_2;
+   eth11 = &dsa_eth0;
};
 
audio: audio-codec {
@@ -889,6 +893,51 @@
mdio: mdio-test {
compatible = "sandbox,mdio";
};
+
+   dsa_eth0: dsa-test-eth {
+   compatible = "sandbox,dsa-eth";
+   };
+
+   dsa-test {
+   compatible = "sandbox,dsa";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   swp_0: port@0 {
+   reg = <0>;
+   label = "lan0";
+   };
+
+   swp_1: port@1 {
+   reg = <1>;
+   label = "lan1";
+   phy-mode = "rgmii-txid";
+   fixed-link {
+   speed = <1000>;
+   full-duplex;
+   };
+   };
+
+   swp_2: port@2 {
+   reg = <2>;
+   label = "lan2";
+   fixed-link {
+   speed = <100>;
+   full-duplex;
+   };
+   };
+
+   port@3 {
+   reg = <3>;
+   ethernet = <&dsa_eth0>;
+   fixed-link {
+   speed = <100>;
+   full-duplex;
+   };
+   };
+   };
+   };
 };
 
 #include "sandbox_pmic.dtsi"
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index 5d75021ed6..a586a93415 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -102,6 +102,10 @@
"eth1addr=00:00:11:22:33:45\0" \
"eth3addr=00:00:11:22:33:46\0" \
"eth5addr=00:00:11:22:33:47\0" \
+   "eth8addr=00:00:11:22:33:48\0" \
+   "eth9addr=00:00:11:22:33:49\0" \
+   "eth10addr=00:00:11:22:33:4a\0" \
+   "eth11addr=00:00:11:22:33:4b\0" \
"ipaddr=1.2.3.4\0"
 
 #define MEM_LAYOUT_ENV_SETTINGS \
diff --git a/test/dm/Makefile b/test/dm/Makefile
index 0c2fd5cb5e..69e9feed91 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -65,4 +65,5 @@ obj-$(CONFIG_VIRTIO_SANDBOX) += virtio.o
 obj-$(CONFIG_DMA) += dma.o
 obj-$(CONFIG_DM_MDIO) += mdio.o
 obj-$(CONFIG_DM_MDIO_MUX) += mdio_mux.o
+obj-$(CONFIG_DM_DSA) += dsa.o
 endif
diff --git a/test/dm/dsa.c b/test/dm/dsa.c
new file mode 100644
index 00..c8e76be16f
--- /dev/null
+++ b/test/dm/dsa.c
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 NXP
+ */
+
+#include 
+#include 
+#include 
+
+extern int dsa_sandbox_port_mask;
+
+/* this test sends ping requests with the local address through each DSA port
+ * via the dummy DSA master Eth.
+ * The dummy Eth filters traffic based on DSA port used to Tx and 

[U-Boot] [PATCH 5/6] arm: dts: ls1028a: adds Ethernet switch node and its dependencies

2019-11-21 Thread Alex Marginean
The definition follows the DSA binding in kernel and describes the switch,
its ports and PHYs.
ENETC PF6 is the 2nd Eth controller linked to the switch on LS1028, it is
not used in U-Boot and was disabled.

Signed-off-by: Alex Marginean 
---
 arch/arm/dts/fsl-ls1028a-rdb.dts | 36 
 arch/arm/dts/fsl-ls1028a.dtsi| 41 +++-
 2 files changed, 76 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/fsl-ls1028a-rdb.dts b/arch/arm/dts/fsl-ls1028a-rdb.dts
index 3d5e8ade21..700fc067a4 100644
--- a/arch/arm/dts/fsl-ls1028a-rdb.dts
+++ b/arch/arm/dts/fsl-ls1028a-rdb.dts
@@ -114,9 +114,45 @@
phy-handle = <&rdb_phy0>;
 };
 
+ðsw_ports {
+   port@0 {
+   status = "okay";
+   phy-mode = "qsgmii";
+   phy-handle = <&sw_phy0>;
+   };
+   port@1 {
+   status = "okay";
+   phy-mode = "qsgmii";
+   phy-handle = <&sw_phy1>;
+   };
+   port@2 {
+   status = "okay";
+   phy-mode = "qsgmii";
+   phy-handle = <&sw_phy2>;
+   };
+   port@3 {
+   status = "okay";
+   phy-mode = "qsgmii";
+   phy-handle = <&sw_phy3>;
+   };
+};
+
 &mdio0 {
status = "okay";
rdb_phy0: phy@2 {
reg = <2>;
};
+
+   sw_phy0: phy@10 {
+   reg = <0x10>;
+   };
+   sw_phy1: phy@11 {
+   reg = <0x11>;
+   };
+   sw_phy2: phy@12 {
+   reg = <0x12>;
+   };
+   sw_phy3: phy@13 {
+   reg = <0x13>;
+   };
 };
diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
index 43a154e8e7..a442fba4d0 100644
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@@ -136,9 +136,48 @@
reg = <0x000300 0 0 0 0>;
status = "disabled";
};
+   ethsw: pci@0,5 {
+   #address-cells=<0>;
+   #size-cells=<1>;
+   reg = <0x000500 0 0 0 0>;
+
+   ethsw_ports: ports {
+   port@0 {
+   reg = <0>;
+   status = "disabled";
+   label = "swp0";
+   };
+   port@1 {
+   reg = <1>;
+   status = "disabled";
+   label = "swp1";
+   };
+   port@2 {
+   reg = <2>;
+   status = "disabled";
+   label = "swp2";
+   };
+   port@3 {
+   reg = <3>;
+   status = "disabled";
+   label = "swp3";
+   };
+   port@4 {
+   reg = <4>;
+   phy-mode = "internal";
+   status = "okay";
+   ethernet = <&enetc2>;
+   };
+   port@5 {
+   reg = <5>;
+   phy-mode = "internal";
+   status = "disabled";
+   };
+   };
+   };
enetc6: pci@0,6 {
reg = <0x000600 0 0 0 0>;
-   status = "okay";
+   status = "disabled";
phy-mode = "internal";
};
};
-- 
2.17.1

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[U-Boot] [PATCH 6/6] configs: ls1028a: enable the Ethernet switch driver in defconfig

2019-11-21 Thread Alex Marginean
The switch driver for LS1028A Ethernet switch is now compiled in for
both LS1028A boards.

Signed-off-by: Alex Marginean 
---
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 3 ++-
 configs/ls1028aqds_tfa_defconfig | 3 ++-
 configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 3 ++-
 configs/ls1028ardb_tfa_defconfig | 3 ++-
 4 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index 713a088e42..931c78ab46 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -49,8 +49,9 @@ CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_VITESSE=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
+CONFIG_DM_DSA=y
 CONFIG_E1000=y
-CONFIG_FSL_ENETC=y
+CONFIG_MSCC_FELIX_SWITCH=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index b5eb872148..ad5c783e16 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -52,8 +52,9 @@ CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_VITESSE=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
+CONFIG_DM_DSA=y
 CONFIG_E1000=y
-CONFIG_FSL_ENETC=y
+CONFIG_MSCC_FELIX_SWITCH=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
index dc07a0a4d7..e30fb96344 100644
--- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
@@ -48,9 +48,10 @@ CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_VITESSE=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
+CONFIG_DM_DSA=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
-CONFIG_FSL_ENETC=y
+CONFIG_MSCC_FELIX_SWITCH=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig
index 644c5ac6bb..87e4fdd18e 100644
--- a/configs/ls1028ardb_tfa_defconfig
+++ b/configs/ls1028ardb_tfa_defconfig
@@ -52,9 +52,10 @@ CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_VITESSE=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
+CONFIG_DM_DSA=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
-CONFIG_FSL_ENETC=y
+CONFIG_MSCC_FELIX_SWITCH=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
-- 
2.17.1

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[U-Boot] [PATCH 2/6] drivers: net: add a DSA sandbox driver

2019-11-21 Thread Alex Marginean
The DSA sandbox driver is used for DSA unit testing.  It implements a
simple 4 port switch that uses a very simple tag to identify the ports.
The DSA driver comes paired with an Ethernet driver that loops packets
back and can selectively filter traffic on DSA switch ports.

Signed-off-by: Alex Marginean 
---
 drivers/net/Kconfig   |   8 ++
 drivers/net/Makefile  |   1 +
 drivers/net/dsa_sandbox.c | 272 ++
 3 files changed, 281 insertions(+)
 create mode 100644 drivers/net/dsa_sandbox.c

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index a4157cb122..ac420cb474 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -70,6 +70,14 @@ config MDIO_MUX_SANDBOX
 
  This driver is used for testing in test/dm/mdio.c
 
+config DSA_SANDBOX
+   depends on DM_DSA && SANDBOX
+   default y
+   bool "Sandbox: Mocked DSA driver"
+   help
+ This driver implements a dummy switch and a dummy Ethernet device used
+ to test DSA class code.
+
 menuconfig NETDEVICES
bool "Network device support"
depends on NET
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 30991834ec..8be49f6335 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -82,3 +82,4 @@ obj-y += mscc_eswitch/
 obj-$(CONFIG_HIGMACV300_ETH) += higmacv300.o
 obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o
 obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o
+obj-$(CONFIG_DSA_SANDBOX) += dsa_sandbox.o
diff --git a/drivers/net/dsa_sandbox.c b/drivers/net/dsa_sandbox.c
new file mode 100644
index 00..07230eb033
--- /dev/null
+++ b/drivers/net/dsa_sandbox.c
@@ -0,0 +1,272 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 NXP
+ */
+
+#include 
+
+#define DSA_SANDBOX_MAGIC  0x00415344
+#define DSA_SANDBOX_TAG_LENsizeof(struct dsa_sandbox_tag)
+/*
+ * This global flag is used to enable DSA just for DSA test so it doesn't 
affect
+ * the existing eth unit test.
+ */
+int dsa_sandbox_port_mask;
+
+struct dsa_sandbox_priv {
+   int enabled;
+   int port_enabled;
+};
+
+struct dsa_sandbox_tag {
+   u32 magic;
+   u32 port;
+};
+
+static int dsa_sandbox_port_enable(struct udevice *dev, int port,
+  struct phy_device *phy)
+{
+   struct dsa_sandbox_priv *priv = dev->priv;
+
+   if (!priv->enabled)
+   return -EFAULT;
+
+   priv->port_enabled |= BIT(port);
+
+   return 0;
+}
+
+static void dsa_sandbox_port_disable(struct udevice *dev, int port,
+struct phy_device *phy)
+{
+   struct dsa_sandbox_priv *priv = dev->priv;
+
+   if (!priv->enabled)
+   return;
+
+   priv->port_enabled &= ~BIT(port);
+}
+
+static int dsa_sandbox_xmit(struct udevice *dev, int port, void *packet,
+   int length)
+{
+   struct dsa_sandbox_priv *priv = dev->priv;
+   struct dsa_sandbox_tag *tag = packet;
+
+   if (!priv->enabled)
+   return -EFAULT;
+
+   if (!(priv->port_enabled & BIT(port)))
+   return -EFAULT;
+
+   tag->magic = DSA_SANDBOX_MAGIC;
+   tag->port = port;
+
+   return 0;
+}
+
+static int dsa_sandbox_rcv(struct udevice *dev, int *port, void *packet,
+  int length)
+{
+   struct dsa_sandbox_priv *priv = dev->priv;
+   struct dsa_sandbox_tag *tag = packet;
+
+   if (!priv->enabled)
+   return -EFAULT;
+
+   if (tag->magic != DSA_SANDBOX_MAGIC)
+   return -EFAULT;
+
+   *port = tag->port;
+   if (!(priv->port_enabled & BIT(*port)))
+   return -EFAULT;
+
+   return 0;
+}
+
+static const struct dsa_ops dsa_sandbox_ops = {
+   .port_enable = dsa_sandbox_port_enable,
+   .port_disable = dsa_sandbox_port_disable,
+   .xmit = dsa_sandbox_xmit,
+   .rcv = dsa_sandbox_rcv,
+};
+
+static int dsa_sandbox_bind(struct udevice *dev)
+{
+   struct dsa_perdev_platdata *pdata = dev->platdata;
+
+   /* must be at least 4 to match sandbox test DT */
+   pdata->num_ports = 4;
+   pdata->headroom = DSA_SANDBOX_TAG_LEN;
+
+   return 0;
+}
+
+static int dsa_sandbox_probe(struct udevice *dev)
+{
+   struct dsa_sandbox_priv *priv = dev_get_priv(dev);
+
+   /*
+* return error if DSA is not being tested so we don't break existing
+* eth test.
+*/
+   if (!dsa_sandbox_port_mask)
+   return -EINVAL;
+
+   priv->enabled = 1;
+
+   return 0;
+}
+
+static int dsa_sandbox_remove(struct udevice *dev)
+{
+   struct dsa_sandbox_priv *priv = dev_get_priv(dev);
+
+   priv->enabled = 0;
+
+   return 0;
+}
+
+static const struct udevice_id dsa_sandbox_ids[] = {
+   { .compatible = "sandbox,dsa" },
+   { }
+};
+
+U_BOOT_DRIVER(dsa_sandbox) =

[U-Boot] [PATCH 1/6] net: introduce DSA class for Ethernet switches

2019-11-21 Thread Alex Marginean
DSA stands for Distributed Switch Architecture and it covers switches that
are connected to the CPU through an Ethernet link and generally use frame
tags to pass information about the source/destination ports to/from CPU.
Front panel ports are presented as regular ethernet devices in U-Boot and
they are expected to support the typical networking commands.
DSA switches may be cascaded, DSA class code does not currently support
this.

Signed-off-by: Alex Marginean 
---
 drivers/net/Kconfig|  13 ++
 include/dm/uclass-id.h |   1 +
 include/dsa.h  | 132 +++
 net/Makefile   |   1 +
 net/dsa-uclass.c   | 369 +
 5 files changed, 516 insertions(+)
 create mode 100644 include/dsa.h
 create mode 100644 net/dsa-uclass.c

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 4182897d89..a4157cb122 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -37,6 +37,19 @@ config DM_MDIO_MUX
  This is currently implemented in net/mdio-mux-uclass.c
  Look in include/miiphy.h for details.
 
+config DM_DSA
+   bool "Enable Driver Model for DSA switches"
+   depends on DM_ETH && DM_MDIO
+   help
+ Enable Driver Model for DSA switches
+
+ Adds UCLASS_DSA class supporting switches that follow the Distributed
+ Switch Architecture (DSA).  These switches rely on the presence of a
+ management switch port connected to an Ethernet controller capable of
+ receiving frames from the switch.  This host Ethernet controller is
+ called "master" and "cpu" in DSA terminology.
+ This is currently implemented in net/dsa-uclass.c
+
 config MDIO_SANDBOX
depends on DM_MDIO && SANDBOX
default y
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 0c563d898b..8f37a91488 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -42,6 +42,7 @@ enum uclass_id {
UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */
UCLASS_DSI_HOST,/* Display Serial Interface host */
UCLASS_DMA, /* Direct Memory Access */
+   UCLASS_DSA, /* Distributed (Ethernet) Switch Architecture */
UCLASS_EFI, /* EFI managed devices */
UCLASS_ETH, /* Ethernet device */
UCLASS_FIRMWARE,/* Firmware */
diff --git a/include/dsa.h b/include/dsa.h
new file mode 100644
index 00..72a2e6abaa
--- /dev/null
+++ b/include/dsa.h
@@ -0,0 +1,132 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2019 NXP
+ */
+
+#include 
+#include 
+#include 
+
+/**
+ * DSA stands for Distributed Switch Architecture and it is infrastructure
+ * intended to support drivers for Switches that rely on an intermediary
+ * Ethernet device for I/O.  These switches may support cascading allowing
+ * them to be arranged as a tree.
+ * DSA is documented in detail in the Linux kernel documentation under
+ * Documentation/networking/dsa/dsa.txt
+ * The network layout of such a switch is shown below:
+ *
+ * |---
+ * | CPU network device (eth0)|
+ * 
+ * |  |
+ * ||
+ * | Switch driver  |
+ * ||
+ * |||| ||
+ * |---|  |---|  |---|
+ * | sw0p0 |  | sw0p1 |  | sw0p2 |
+ * |---|  |---|  |---|
+ *
+ * In U-Boot the intent is to allow acces to front panel ports (shown at the
+ * bottom of the picture) though the master Ethernet port (eth0 in the 
picture).
+ * Front panel ports are presented as regular ethernet devices in U-Boot and
+ * they are expected to support the typical networking commands.
+ * In general DSA switches require the use of tags, extra headers added both by
+ * software on Tx and by the switch on Rx.  These tags carry at a minimum port
+ * information and switch information for cascaded set-ups.
+ * In U-Boot these tags are inserted and parsed by the DSA switch driver, the
+ * class code helps with headroom/tailroom for the extra headers.
+ *
+ * TODO: handle switch cascading, for now U-Boot only supports stand-alone
+ * switches.
+ */
+
+#define DSA_PORT_NAME_LENGTH   16
+
+/* Maximum number of ports each DSA device can have */
+#define DSA_MAX_PORTS  12
+/* Used to size internal buffers, no support for jumbo yet */
+#define DSA_MAX_FRAME_SIZE 2048
+
+/**
+ * struct dsa_ops - DSA operations
+ *
+ * @port_enable:  Initialize a switch port for I/O
+ * @port_disable: Disable a port
+ * @xmit: Insert the DSA tag for transmission
+ *DSA drivers receive a copy of the packet with headroom and
+ *tailroom reserved and set to 0.
+ *Packet points to headroom and length is updated t

[U-Boot] [PATCH 0/6] Introduce DSA Ethernet switch class and Felix driver

2019-11-21 Thread Alex Marginean
DSA stands for Distributed Switch Architecture and it is a subsystem introduced
in the Linux kernel to support switches that:
- have an Ethernet link up to the CPU
- use some form of tagging to identify the source/destination port for Rx/Tx
- may be cascaded in tree-like structures.

DSA is described in depth here:
https://www.kernel.org/doc/Documentation/networking/dsa/dsa.txt

From the doc:

Summarized, this is basically how DSA looks like from a network device
perspective:


|---
| CPU network device (eth0)|

|  |
||
| Switch driver  |
||
|||| ||
|---|  |---|  |---|
| sw0p0 |  | sw0p1 |  | sw0p2 |
|---|  |---|  |---|

This patch set introduces a DSA class in U-Boot to support drivers of such
switches.  DSA drivers have to implement the following ops:
- enable/disable of switch ports,
- insert a tag in frames being transmitted, used by the switch to select the
  egress port,
- parse a tag in frames being received, used for Rx traffic.

DSA class code deals with presentation of switch ports as Ethernet interfaces,
deals with the master Ethernet device for I/O and helps with parsing of the DT
assuming the structure follows the DSA kernel binding.

Support for switch cascading is not included yet.

This patch set also introduces a driver for the Ethernet switch integrated into
NXP LS1028A, called Felix.  The switch has 4 front panel ports, I/O to/fom it is
done though an ENETC Ethernet interface and meta-data is carried between the
switch and the driver though an additional header pre-pended to the original
frame.
Network commands like tftp can be used on these front panel ports.  The ports
are disabled unless used so they do not cause issues on network topologies that
include loops.

Felix as seen on LS1028A RDB:
=> dm tree
 Class Index  Probed  DriverName
---
..
 dsa   0  [ + ]   felix-switch  |   |-- felix-switch
 eth   4  [ + ]   dsa-port  |   |   |-- swp0
 eth   5  [ + ]   dsa-port  |   |   |-- swp1
 eth   6  [ + ]   dsa-port  |   |   |-- swp2
 eth   7  [ + ]   dsa-port  |   |   `-- swp3

=> mdio list
..
10 - Vitesse VSC8514 <--> swp0
11 - Vitesse VSC8514 <--> swp1
12 - Vitesse VSC8514 <--> swp2
13 - Vitesse VSC8514 <--> swp3

=> tftp 8000 test
Using swp2 device
TFTP from server 192.168.100.1; our IP address is 192.168.100.100
Filename 'test'.
Load address: 0x8000
Loading: #
 #
 
 6.8 MiB/s
done
Bytes transferred = 949880 (e7e78 hex)



This patch set replaces this previous submission of the Felix driver:
https://patchwork.ozlabs.org/project/uboot/list/?series=143126&state=*
and depends on:
https://patchwork.ozlabs.org/project/uboot/list/?series=142858
https://patchwork.ozlabs.org/project/uboot/list/?series=142879

Alex Marginean (6):
  net: introduce DSA class for Ethernet switches
  drivers: net: add a DSA sandbox driver
  test: dm: add a simple unit test for DSA class
  drivers: net: add Felix DSA switch driver
  arm: dts: ls1028a: adds Ethernet switch node and its dependencies
  configs: ls1028a: enable the Ethernet switch driver in defconfig

 arch/Kconfig |   1 +
 arch/arm/dts/fsl-ls1028a-rdb.dts |  36 ++
 arch/arm/dts/fsl-ls1028a.dtsi|  41 +-
 arch/sandbox/dts/test.dts|  49 ++
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig |   3 +-
 configs/ls1028aqds_tfa_defconfig |   3 +-
 configs/ls1028ardb_tfa_SECURE_BOOT_defconfig |   3 +-
 configs/ls1028ardb_tfa_defconfig |   3 +-
 drivers/net/Kconfig  |  21 +
 drivers/net/Makefile |   1 +
 drivers/net/dsa_sandbox.c| 272 +++
 drivers/net/fsl_enetc.h  |   5 +
 drivers/net/mscc_eswitch/Kconfig |   8 +
 drivers/net/mscc_eswitch/Makefile|   1 +
 drivers/net/mscc_eswitch/felix_switch.c  | 453 +++
 include/configs/sandbox.h|   4 +
 include/dm/uclass-id.h   |   1 +
 include/dsa.h| 132 ++
 net/Makefile |   1 +
 net/dsa-uclass.c 

[U-Boot] [RFC PATCH v3 2/3] arm: dts: ls1028a: add node for the integrated Ethernet switch

2019-11-15 Thread Alex Marginean
Adds a device tree node to ls1028a dtsi that describes the Ethernet switch
integrated in LS1028A SoC.

Signed-off-by: Alex Marginean 
---
 arch/arm/dts/fsl-ls1028a-rdb.dts | 36 
 arch/arm/dts/fsl-ls1028a.dtsi| 31 +++
 2 files changed, 67 insertions(+)

diff --git a/arch/arm/dts/fsl-ls1028a-rdb.dts b/arch/arm/dts/fsl-ls1028a-rdb.dts
index 3d5e8ade21..e1e8e135e2 100644
--- a/arch/arm/dts/fsl-ls1028a-rdb.dts
+++ b/arch/arm/dts/fsl-ls1028a-rdb.dts
@@ -114,9 +114,45 @@
phy-handle = <&rdb_phy0>;
 };
 
+ðsw {
+   port@0 {
+   status = "okay";
+   phy-mode = "qsgmii";
+   phy-handle = <&sw_phy0>;
+   };
+   port@1 {
+   status = "okay";
+   phy-mode = "qsgmii";
+   phy-handle = <&sw_phy1>;
+   };
+   port@2 {
+   status = "okay";
+   phy-mode = "qsgmii";
+   phy-handle = <&sw_phy2>;
+   };
+   port@3 {
+   status = "okay";
+   phy-mode = "qsgmii";
+   phy-handle = <&sw_phy3>;
+   };
+};
+
 &mdio0 {
status = "okay";
rdb_phy0: phy@2 {
reg = <2>;
};
+
+   sw_phy0: phy@10 {
+   reg = <0x10>;
+   };
+   sw_phy1: phy@11 {
+   reg = <0x11>;
+   };
+   sw_phy2: phy@12 {
+   reg = <0x12>;
+   };
+   sw_phy3: phy@13 {
+   reg = <0x13>;
+   };
 };
diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
index 43a154e8e7..21595713df 100644
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@@ -136,6 +136,37 @@
reg = <0x000300 0 0 0 0>;
status = "disabled";
};
+   ethsw: pci@0,5 {
+   #address-cells=<0>;
+   #size-cells=<1>;
+   reg = <0x000500 0 0 0 0>;
+   port@0 {
+   reg = <0>;
+   status = "disabled";
+   };
+   port@1 {
+   reg = <1>;
+   status = "disabled";
+   };
+   port@2 {
+   reg = <2>;
+   status = "disabled";
+   };
+   port@3 {
+   reg = <3>;
+   status = "disabled";
+   };
+   port@4 {
+   reg = <4>;
+   phy-mode = "internal";
+   status = "okay";
+   };
+   port@5 {
+   reg = <5>;
+   phy-mode = "internal";
+   status = "okay";
+   };
+   };
enetc6: pci@0,6 {
reg = <0x000600 0 0 0 0>;
status = "okay";
-- 
2.17.1

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[U-Boot] [RFC PATCH v3 1/3] drivers: net: Add a driver for the Felix Ethernet switch on NXP LS1028A

2019-11-15 Thread Alex Marginean
The driver sets up the switch at probe allowing traffic though.  Both the
switch as a whole and the ports are registered as network devices in
U-Boot, although neither supports direct I/O in this version.  Traffic can
originate from SoC though one of the internally linked ENETC interfaces,
external ports can also be used in basic switching mode too.

Signed-off-by: Alex Marginean 
---
 drivers/net/Kconfig |   7 +
 drivers/net/Makefile|   1 +
 drivers/net/fsl_enetc.h |   5 +
 drivers/net/fsl_felix.c | 421 
 4 files changed, 434 insertions(+)
 create mode 100644 drivers/net/fsl_felix.c

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 4182897d89..7bbad24f85 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -615,4 +615,11 @@ config MVMDIO
 
  This driver is used by the MVPP2 and MVNETA drivers.
 
+config FSL_FELIX
+   bool "LS1028 Felix Ethernet switch"
+   depends on DM_PCI && DM_ETH && DM_MDIO
+   help
+ This driver supports the Ethernet switch integrated in LS1028A NXP
+ SoC.
+
 endif # NETDEVICES
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 30991834ec..886f77d745 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -82,3 +82,4 @@ obj-y += mscc_eswitch/
 obj-$(CONFIG_HIGMACV300_ETH) += higmacv300.o
 obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o
 obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o
+obj-$(CONFIG_FSL_FELIX) += fsl_felix.o
diff --git a/drivers/net/fsl_enetc.h b/drivers/net/fsl_enetc.h
index 9a36cdad80..29e7781b5e 100644
--- a/drivers/net/fsl_enetc.h
+++ b/drivers/net/fsl_enetc.h
@@ -200,6 +200,11 @@ struct enetc_priv {
 /* PCS replicator block for USXGMII */
 #define ENETC_PCS_DEVAD_REPL   0x1f
 
+#define ENETC_PCS_REPL_LINK_TIMER_10x12
+#define  ENETC_PCS_REPL_LINK_TIMER_1_DEF   0x0003
+#define ENETC_PCS_REPL_LINK_TIMER_20x13
+#define  ENETC_PCS_REPL_LINK_TIMER_2_DEF   0x06a0
+
 /* ENETC external MDIO registers */
 #define ENETC_MDIO_BASE0x1c00
 #define ENETC_MDIO_CFG 0x00
diff --git a/drivers/net/fsl_felix.c b/drivers/net/fsl_felix.c
new file mode 100644
index 00..ebb84ef55f
--- /dev/null
+++ b/drivers/net/fsl_felix.c
@@ -0,0 +1,421 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Felix ethernet switch driver
+ * Copyright 2018-2019 NXP
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* defines especially around PCS are reused from enetc */
+#include "fsl_enetc.h"
+
+#define FELIX_PORT_DRV_NAME"felix-port"
+
+#define PCI_DEVICE_ID_FELIX_ETHSW  0xEEF0
+#define FELIX_PM_IMDIO_BASE0x8030
+
+/* Max port count, including any internal ports */
+#define FELIX_PORT_COUNT   6
+
+/* Register map for BAR4 */
+#define FELIX_SYS  0x01
+#define FELIX_ES0  0x04
+#define FELIX_IS1  0x05
+#define FELIX_IS2  0x06
+#define FELIX_GMII(port)   (0x10 + (port) * 0x1)
+#define FELIX_QSYS 0x20
+
+#define FELIX_SYS_SYSTEM   (FELIX_SYS + 0x0E00)
+#define  FELIX_SYS_SYSTEM_EN   BIT(0)
+#define FELIX_SYS_RAM_CTRL (FELIX_SYS + 0x0F24)
+#define  FELIX_SYS_RAM_CTRL_INIT   BIT(1)
+
+#define FELIX_ES0_TCAM_CTRL(FELIX_ES0 + 0x03C0)
+#define  FELIX_ES0_TCAM_CTRL_ENBIT(0)
+#define FELIX_IS1_TCAM_CTRL(FELIX_IS1 + 0x03C0)
+#define  FELIX_IS1_TCAM_CTRL_ENBIT(0)
+#define FELIX_IS2_TCAM_CTRL(FELIX_IS2 + 0x03C0)
+#define  FELIX_IS2_TCAM_CTRL_ENBIT(0)
+
+#define FELIX_GMII_CLOCK_CFG(port) (FELIX_GMII(port) + 0x)
+#define  FELIX_GMII_CLOCK_CFG_LINK_1G  1
+#define  FELIX_GMII_CLOCK_CFG_LINK_100M2
+#define  FELIX_GMII_CLOCK_CFG_LINK_10M 3
+#define FELIX_GMII_MAC_ENA_CFG(port)   (FELIX_GMII(port) + 0x001C)
+#define  FELIX_GMII_MAX_ENA_CFG_TX BIT(0)
+#define  FELIX_GMII_MAX_ENA_CFG_RX BIT(4)
+#define FELIX_GMII_MAC_IFG_CFG(port)   (FELIX_GMII(port) + 0x001C + 0x14)
+#define  FELIX_GMII_MAC_IFG_CFG_DEF0x515
+
+#define FELIX_QSYS_SYSTEM  (FELIX_QSYS + 0xF460)
+#define FELIX_QSYS_SYSTEM_SW_PORT_MODE(port)   \
+   (FELIX_QSYS_SYSTEM + 0x20 + (port) * 4)
+#define  FELIX_QSYS_SYSTEM_SW_PORT_ENA BIT(14)
+#define  FELIX_QSYS_SYSTEM_SW_PORT_LOSSY   BIT(9)
+#define  FELIX_QSYS_SYSTEM_SW_PORT_SCH(a)  (((a) & 0x3800) << 11)
+
+/* internal MDIO in BAR0 */
+#define FELIX_PM_IMDIO_BASE0x8030
+
+/* Serdes block on LS1028A */
+#define FELIX_SERDES_BASE  0x1eaL
+#define FELIX_SERDES_LNATECR0(lane)(FELIX_SERDES_BASE + 0x818 + \
+(lane) * 0x40)
+#d

[U-Boot] [RFC PATCH v3 3/3] configs: ls1028a: enable FSL_FELIX switch driver

2019-11-15 Thread Alex Marginean
Enable by default the driver for the Ethernet switch integrated in the SoC.

Signed-off-by: Alex Marginean 
---
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 +
 configs/ls1028aqds_tfa_defconfig | 1 +
 configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 1 +
 configs/ls1028ardb_tfa_defconfig | 1 +
 4 files changed, 4 insertions(+)

diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index 713a088e42..f70b451ed6 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -51,6 +51,7 @@ CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_FSL_ENETC=y
+CONFIG_FSL_FELIX=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index b5eb872148..2c200ab31d 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -54,6 +54,7 @@ CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_FSL_ENETC=y
+CONFIG_FSL_FELIX=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
index dc07a0a4d7..43dba1fba5 100644
--- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
@@ -51,6 +51,7 @@ CONFIG_DM_MDIO=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FSL_ENETC=y
+CONFIG_FSL_FELIX=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig
index 644c5ac6bb..460e107e05 100644
--- a/configs/ls1028ardb_tfa_defconfig
+++ b/configs/ls1028ardb_tfa_defconfig
@@ -55,6 +55,7 @@ CONFIG_DM_MDIO=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FSL_ENETC=y
+CONFIG_FSL_FELIX=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
-- 
2.17.1

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[U-Boot] [RFC PATCH v3 0/3] Felix Eth switch driver and questions on DSA switches

2019-11-15 Thread Alex Marginean
The driver sets up the switch during probe making external and internal ports
available to use.  It does not support direct I/O through these switch ports
in this version, instead ENETC ethernet interfaces that are internally linked to
the switch can be used after the switch is set up.

This is where the RFC part comes in.  Both the switch as a device and its ports
are probed as ethernet devices.  That's handy as accessors to connect to the PHY
can be used on switch ports, but otherwise they are useless as the user can't
ping to these interfaces directly.  We're not running STP in U-Boot either, so
turning on the switch is a problem if there are loops in the network.
The Linux driver for this piece of HW is now moving under DSA and this leads to
my question.  Does anyone here think that DSA support is something useful in
U-Boot?

DSA is described here:
https://www.kernel.org/doc/Documentation/networking/dsa/dsa.txt

From the doc:

Summarized, this is basically how DSA looks like from a network device
perspective:


|---
| CPU network device (eth0)|

|  |
||
| Switch driver  |
||
|||| ||
|---|  |---|  |---|
| sw0p0 |  | sw0p1 |  | sw0p2 |
|---|  |---|  |---|


If we do DSA in U-Boot we would use the same bindings as in Linux.  The switch
would be associated with a master network device which is a regular ethernet,
this is part of the DSA binding in Linux.
Whenever the user pings through swp0pN in background that would _start swp0pN,
the switch port connected to the master network device and the master network
device (eth0 in the picture above).  Any frames sent through a switch port would
have the DSA tag inserted and then actually sent though the mater network
device.  Similarly for Rx, polling swp0pN would in fact poll on the master
network device and for any frame received the DSA code would check and remove
the DSA tag.
Switching between switch ports would be by default disabled.
This kind of switch drivers should go under a new class, DSA or ETH_DSA, or
something along those lines.

I'd like to get some feedback from networking people on this list, if adding DSA
support in U-Boot is something that could be useful, or the existing support is
good enough.  Currently U-Boot does support a few switches either as PHYs or
as ETH devices with various limitations.  Feel free to share any thoughts on
this topic. 

With these patches applied the switch on LS1028A looks like this:

=> dm tree
 Class Index  Probed  DriverName
---

 pci  2  [ + ]   pci_generic_ecam  |-- pcie@1f000
 eth  1  [ + ]   enetc_eth |   |-- enetc-0
 eth  2  [ + ]   enetc_eth |   |-- enetc-1
 eth  3  [ + ]   enetc_eth |   |-- enetc-2
 mdio 5  [ + ]   enetc_mdio|   |-- emdio-3
 pci_generi   0  [   ]   pci_generic_drv   |   |-- pci_3:0.4
 eth  4  [ + ]   felix_ethsw   |   |-- felix_ethsw
 eth  6  [ + ]   felix-port|   |   |-- port@0
 eth  7  [ + ]   felix-port|   |   |-- port@1
 eth  8  [ + ]   felix-port|   |   |-- port@2
 eth  9  [ + ]   felix-port|   |   |-- port@3
 eth 10  [ + ]   felix-port|   |   |-- port@4
 eth 11  [ + ]   felix-port|   |   `-- port@5
 eth  5  [ + ]   enetc_eth |   |-- enetc-6
 pci_generi   1  [   ]   pci_generic_drv   |   `-- pci_3:1f.0

=> mdio list
felix_ethsw:
emdio-3:
mdio@50:
0 - Aquantia AQR412 <--> port@0
1 - Aquantia AQR412 <--> port@1
2 - Aquantia AQR412 <--> port@2
3 - Aquantia AQR412 <--> port@3
mdio@00:
5 - AR8035 <--> enetc-1
mdio@40:
2 - Aquantia AQR112 <--> enetc-0
mdio@60:
mdio@70:

Any feedback is welcome, of course 


This patch set replaces this v2 series:
https://patchwork.ozlabs.org/project/uboot/list/?series=126977&state=*
and depends on:
https://patchwork.ozlabs.org/project/uboot/list/?series=142858
https://patchwork.ozlabs.org/project/uboot/list/?series=142879

Thank you!


Alex Marginean (3):
  drivers: net: Add a driver for the Felix Ethernet switch on NXP
LS1028A
  arm: dts: ls1028a: add node for the integrated Ethernet switch
  configs: ls1028a: enable FSL_FELIX switch driver

 arch/arm/dts/fsl-ls1028a-rdb.dts |  36 ++
 arch/arm/dts/fsl-ls1028a.dtsi|  31 ++
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig |   

[U-Boot] [PATCH 3/3] drivers: net: fsl_enetc_mdio: return with time-out if HW is stuck

2019-11-14 Thread Alex Marginean
On some boards MDIO may get stuck if it detects echo on the line.  This is
a know hardware issue, there is a board fix for it.  In case we're running
on a board that doesn't have the fix, we don't want to loop here forever
and freeze U-Boot.

Signed-off-by: Alex Marginean 
---
 drivers/net/fsl_enetc_mdio.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/net/fsl_enetc_mdio.c b/drivers/net/fsl_enetc_mdio.c
index b4463a58a5..47257a6cf6 100644
--- a/drivers/net/fsl_enetc_mdio.c
+++ b/drivers/net/fsl_enetc_mdio.c
@@ -17,8 +17,13 @@
 
 static void enetc_mdio_wait_bsy(struct enetc_mdio_priv *priv)
 {
-   while (enetc_read(priv, ENETC_MDIO_CFG) & ENETC_EMDIO_CFG_BSY)
+   int to = 1;
+
+   while ((enetc_read(priv, ENETC_MDIO_CFG) & ENETC_EMDIO_CFG_BSY) &&
+  --to)
cpu_relax();
+   if (!to)
+   printf("T");
 }
 
 int enetc_mdio_read_priv(struct enetc_mdio_priv *priv, int addr, int devad,
-- 
2.17.1

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[U-Boot] [PATCH 2/3] drivers: net: fsl_enetc: move PCS and PHY config to probe

2019-11-14 Thread Alex Marginean
This reduces the time needed to establish a link as we don't reset the link
each time the interface is used.  Our Link capabilities do not change at
run-time so there is no need to re-apply PHY configuration each time.

Signed-off-by: Alex Marginean 
---

I have these patches on top of the following two patch sets, they don't apply
cleanly without them:
https://patchwork.ozlabs.org/project/uboot/list/?series=142879
https://patchwork.ozlabs.org/project/uboot/list/?series=142858

 drivers/net/fsl_enetc.c | 17 +
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c
index 64dc244da2..e86f3dddb5 100644
--- a/drivers/net/fsl_enetc.c
+++ b/drivers/net/fsl_enetc.c
@@ -190,12 +190,6 @@ static void enetc_start_pcs(struct udevice *dev)
case PHY_INTERFACE_MODE_SGMII_2500:
enetc_init_sgmii(dev);
break;
-   case PHY_INTERFACE_MODE_RGMII:
-   case PHY_INTERFACE_MODE_RGMII_ID:
-   case PHY_INTERFACE_MODE_RGMII_RXID:
-   case PHY_INTERFACE_MODE_RGMII_TXID:
-   enetc_init_rgmii(dev);
-   break;
case PHY_INTERFACE_MODE_XGMII:
case PHY_INTERFACE_MODE_USXGMII:
case PHY_INTERFACE_MODE_XFI:
@@ -258,6 +252,9 @@ static int enetc_probe(struct udevice *dev)
 
dm_pci_clrset_config16(dev, PCI_COMMAND, 0, PCI_COMMAND_MEMORY);
 
+   enetc_start_pcs(dev);
+   enetc_config_phy(dev);
+
return 0;
 }
 
@@ -433,8 +430,12 @@ static int enetc_start(struct udevice *dev)
enetc_setup_tx_bdr(dev);
enetc_setup_rx_bdr(dev);
 
-   enetc_start_pcs(dev);
-   enetc_config_phy(dev);
+   if (priv->if_type == PHY_INTERFACE_MODE_RGMII ||
+   priv->if_type == PHY_INTERFACE_MODE_RGMII_ID ||
+   priv->if_type == PHY_INTERFACE_MODE_RGMII_RXID ||
+   priv->if_type == PHY_INTERFACE_MODE_RGMII_TXID)
+   enetc_init_rgmii(dev);
+
if (priv->phy)
phy_startup(priv->phy);
 
-- 
2.17.1

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[U-Boot] [PATCH 1/3] drivers: net: fsl_enetc: Add 2.5Gbps to supported link speeds

2019-11-14 Thread Alex Marginean
The original code enabled link speeds up to 1Gbps, but the interface can
go up to 2.5G, enable that speed to in PHY AN mask.

Signed-off-by: Alex Marginean 
---

I have these patches on top of the following two patch sets, they don't apply
cleanly without them:
https://patchwork.ozlabs.org/project/uboot/list/?series=142879
https://patchwork.ozlabs.org/project/uboot/list/?series=142858

 drivers/net/fsl_enetc.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c
index c94ba240f8..64dc244da2 100644
--- a/drivers/net/fsl_enetc.c
+++ b/drivers/net/fsl_enetc.c
@@ -215,8 +215,9 @@ static void enetc_config_phy(struct udevice *dev)
if (!priv->phy)
return;
 
-   supported = GENMASK(6, 0); /* speeds up to 1G & AN */
-   priv->phy->advertising = priv->phy->supported & supported;
+   supported = PHY_GBIT_FEATURES | SUPPORTED_2500baseX_Full;
+   priv->phy->supported &= supported;
+   priv->phy->advertising &= supported;
 
phy_config(priv->phy);
 }
-- 
2.17.1

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[U-Boot] [PATCH v3 04/11] drivers: net: aquantia: add PHY generation information

2019-11-14 Thread Alex Marginean
Uses the data field in phy_driver structure to identify the PHY generation.
This is useful for custom configuration as non-generic PHY registers are
not 100% compatible between generations.

Signed-off-by: Alex Marginean 
---
 drivers/net/phy/aquantia.c | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c
index 7be1a40608..c4f11f2860 100644
--- a/drivers/net/phy/aquantia.c
+++ b/drivers/net/phy/aquantia.c
@@ -69,6 +69,12 @@
 #define VERSION_STRING_OFFSET 0x0200
 #define HEADER_OFFSET 0x300
 
+/* driver private data */
+#define AQUANTIA_NA0
+#define AQUANTIA_GEN1  1
+#define AQUANTIA_GEN2  2
+#define AQUANTIA_GEN3  3
+
 #pragma pack(1)
 struct fw_header {
u8 padding[4];
@@ -452,6 +458,7 @@ struct phy_driver aqr105_driver = {
.config = &aquantia_config,
.startup = &aquantia_startup,
.shutdown = &gen10g_shutdown,
+   .data = AQUANTIA_GEN1,
 };
 
 struct phy_driver aqr106_driver = {
@@ -478,6 +485,7 @@ struct phy_driver aqr107_driver = {
.config = &aquantia_config,
.startup = &aquantia_startup,
.shutdown = &gen10g_shutdown,
+   .data = AQUANTIA_GEN2,
 };
 
 struct phy_driver aqr112_driver = {
@@ -491,6 +499,7 @@ struct phy_driver aqr112_driver = {
.config = &aquantia_config,
.startup = &aquantia_startup,
.shutdown = &gen10g_shutdown,
+   .data = AQUANTIA_GEN3,
 };
 
 struct phy_driver aqr405_driver = {
@@ -504,6 +513,7 @@ struct phy_driver aqr405_driver = {
.config = &aquantia_config,
.startup = &aquantia_startup,
.shutdown = &gen10g_shutdown,
+   .data = AQUANTIA_GEN1,
 };
 
 struct phy_driver aqr412_driver = {
@@ -517,6 +527,7 @@ struct phy_driver aqr412_driver = {
.config = &aquantia_config,
.startup = &aquantia_startup,
.shutdown = &gen10g_shutdown,
+   .data = AQUANTIA_GEN3,
 };
 
 int phy_aquantia_init(void)
-- 
2.17.1

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[U-Boot] [PATCH v3 07/11] drivers: net: aquantia: set SMBus addr based on DT property

2019-11-14 Thread Alex Marginean
Aquantia PHYs have a SMBus interface mostly used for debug.  The addresses
on this interface are normally set up by PHY firmware, but depending on the
board they may end up not being unique.  Add an optional DT property used
to change SMBus address if needed.

Signed-off-by: Alex Marginean 
---
 drivers/net/phy/aquantia.c | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c
index 06532c51d5..151e0ee9e9 100644
--- a/drivers/net/phy/aquantia.c
+++ b/drivers/net/phy/aquantia.c
@@ -91,6 +91,9 @@
 #define AQUANTIA_VND1_GSYSCFG_5G   3
 #define AQUANTIA_VND1_GSYSCFG_10G  4
 
+#define AQUANTIA_VND1_SMBUS0   0xc485
+#define AQUANTIA_VND1_SMBUS1   0xc495
+
 /* addresses of memory segments in the phy */
 #define DRAM_BASE_ADDR 0x3FFE
 #define IRAM_BASE_ADDR 0x4000
@@ -352,6 +355,18 @@ static int aquantia_dts_config(struct phy_device *phydev)
phy_write(phydev, MDIO_MMD_PMAPMD, AQUANTIA_PMA_RX_VENDOR_P1,
  reg);
}
+   if (!ofnode_read_u32(node, "smb-addr", &prop)) {
+   debug("smb-addr = %x\n", (int)prop);
+   /*
+* there are two addresses here, normally just one bus would
+* be in use so we're setting both regs using the same DT
+* property.
+*/
+   phy_write(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_SMBUS0,
+ (u16)(prop << 1));
+   phy_write(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_SMBUS1,
+ (u16)(prop << 1));
+   }
 
 #endif
return 0;
-- 
2.17.1

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[U-Boot] [PATCH v3 08/11] drivers: net: aquantia: check system interface too when checking for link up

2019-11-14 Thread Alex Marginean
In some cases the link on the system interface of the aquantia PHY comes up
after the link on line interface.  The link state loop only checks the line
side, which may result in first packet sent being lost.
Use aquantia_link_is_up instead, which checks both system and line side on
gen 2/3 PHYs to avoid losing the 1st packet.

Signed-off-by: Alex Marginean 
---
 drivers/net/phy/aquantia.c | 7 ++-
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c
index 151e0ee9e9..7817d3cb8d 100644
--- a/drivers/net/phy/aquantia.c
+++ b/drivers/net/phy/aquantia.c
@@ -540,17 +540,14 @@ int aquantia_startup(struct phy_device *phydev)
phydev->duplex = DUPLEX_FULL;
 
/* if the AN is still in progress, wait till timeout. */
-   phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1);
-   reg = phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1);
-   if (!(reg & MDIO_AN_STAT1_COMPLETE)) {
+   if (!aquantia_link_is_up(phydev)) {
printf("%s Waiting for PHY auto negotiation to complete",
   phydev->dev->name);
do {
udelay(1000);
-   reg = phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1);
if ((i++ % 500) == 0)
printf(".");
-   } while (!(reg & MDIO_AN_STAT1_COMPLETE) &&
+   } while (!aquantia_link_is_up(phydev) &&
 i < (4 * PHY_ANEG_TIMEOUT));
 
if (i > PHY_ANEG_TIMEOUT)
-- 
2.17.1

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[U-Boot] [PATCH v3 09/11] doc: bindings: add bindings document for PHY nodes

2019-11-14 Thread Alex Marginean
It defines that PHY nodes must be children on MDIO bus nodes and defines
the only required property in U-Boot, reg.  This property along with the
example provided are copied over from Linux.

Signed-off-by: Alex Marginean 
---
 doc/device-tree-bindings/net/phy.txt | 24 
 1 file changed, 24 insertions(+)
 create mode 100644 doc/device-tree-bindings/net/phy.txt

diff --git a/doc/device-tree-bindings/net/phy.txt 
b/doc/device-tree-bindings/net/phy.txt
new file mode 100644
index 00..6599c667b5
--- /dev/null
+++ b/doc/device-tree-bindings/net/phy.txt
@@ -0,0 +1,24 @@
+PHY nodes
+
+If the device tree is used to describe networking interfaces, U-Boot expects a
+node for each PHY.  Parent node for such a PHY node is expected to correspond 
to
+a MDIO bus and the bus is used to access the PHY.
+
+Required properties:
+
+ - reg : The ID number for the phy, usually a small integer
+
+Example:
+
+ethernet-phy@0 {
+   compatible = "ethernet-phy-id0141.0e90", "ethernet-phy-ieee802.3-c22";
+   interrupt-parent = <&PIC>;
+   interrupts = <35 IRQ_TYPE_EDGE_RISING>;
+   reg = <0>;
+
+   resets = <&rst 8>;
+   reset-names = "phy";
+   reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+   reset-assert-us = <1000>;
+   reset-deassert-us = <2000>;
+};
-- 
2.17.1

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[U-Boot] [PATCH v3 03/11] drivers: net: aquantia: use XFI, USXGMII interface types

2019-11-14 Thread Alex Marginean
The PHY supports XFI and USXGMII, the notable difference being that USX AN
is enabled for USXGMII.  Legacy code uses XGMII for any 10G proto and
detects whether USX AN should be enabled or not using a PHY status
register.  Keep that functionality too, so we don't break existing drivers.

Signed-off-by: Razvan Ionut Cirjan 
Signed-off-by: Alex Marginean 
---
 drivers/net/phy/aquantia.c | 47 ++
 1 file changed, 33 insertions(+), 14 deletions(-)

diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c
index 465ec2d342..7be1a40608 100644
--- a/drivers/net/phy/aquantia.c
+++ b/drivers/net/phy/aquantia.c
@@ -256,8 +256,10 @@ static int aquantia_upload_firmware(struct phy_device 
*phydev)
 
 int aquantia_config(struct phy_device *phydev)
 {
+   int interface = phydev->interface;
u32 val, id, rstatus, fault;
u32 reg_val1 = 0;
+   int usx_an = 0;
 
id = phy_read(phydev, MDIO_MMD_VEND1, GLOBAL_FIRMWARE_ID);
rstatus = phy_read(phydev, MDIO_MMD_VEND1, GLOBAL_RSTATUS_1);
@@ -278,17 +280,34 @@ int aquantia_config(struct phy_device *phydev)
if (ret != 0)
return ret;
}
+   /*
+* for backward compatibility convert XGMII into either XFI or USX based
+* on FW config
+*/
+   if (interface == PHY_INTERFACE_MODE_XGMII) {
+   reg_val1 = phy_read(phydev, MDIO_MMD_PHYXS,
+   AQUANTIA_SYSTEM_INTERFACE_SR);
+   if ((reg_val1 & AQUANTIA_SI_IN_USE_MASK) == AQUANTIA_SI_USXGMII)
+   interface = PHY_INTERFACE_MODE_USXGMII;
+   else
+   interface = PHY_INTERFACE_MODE_XFI;
+   }
 
val = phy_read(phydev, MDIO_MMD_PMAPMD, MII_BMCR);
 
-   if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
+   switch (interface) {
+   case PHY_INTERFACE_MODE_SGMII:
/* 1000BASE-T mode */
phydev->advertising = SUPPORTED_1000baseT_Full;
phydev->supported = phydev->advertising;
 
val = (val & ~AQUNTIA_SPEED_LSB_MASK) | AQUNTIA_SPEED_MSB_MASK;
phy_write(phydev, MDIO_MMD_PMAPMD, MII_BMCR, val);
-   } else if (phydev->interface == PHY_INTERFACE_MODE_XGMII) {
+   break;
+   case PHY_INTERFACE_MODE_USXGMII:
+   usx_an = 1;
+   /* FALLTHROUGH */
+   case PHY_INTERFACE_MODE_XFI:
/* 10GBASE-T mode */
phydev->advertising = SUPPORTED_1baseT_Full;
phydev->supported = phydev->advertising;
@@ -299,40 +318,40 @@ int aquantia_config(struct phy_device *phydev)
  AQUNTIA_SPEED_LSB_MASK |
  AQUNTIA_SPEED_MSB_MASK);
 
-   val = phy_read(phydev, MDIO_MMD_PHYXS,
-  AQUANTIA_SYSTEM_INTERFACE_SR);
/* If SI is USXGMII then start USXGMII autoneg */
-   if ((val & AQUANTIA_SI_IN_USE_MASK) == AQUANTIA_SI_USXGMII) {
-   reg_val1 =  phy_read(phydev, MDIO_MMD_PHYXS,
-AQUANTIA_VENDOR_PROVISIONING_REG);
+   reg_val1 =  phy_read(phydev, MDIO_MMD_PHYXS,
+AQUANTIA_VENDOR_PROVISIONING_REG);
 
+   if (usx_an) {
reg_val1 |= AQUANTIA_USX_AUTONEG_CONTROL_ENA;
-
-   phy_write(phydev, MDIO_MMD_PHYXS,
- AQUANTIA_VENDOR_PROVISIONING_REG,
- reg_val1);
printf("%s: system interface USXGMII\n",
   phydev->dev->name);
} else {
+   reg_val1 &= ~AQUANTIA_USX_AUTONEG_CONTROL_ENA;
printf("%s: system interface XFI\n",
   phydev->dev->name);
}
 
-   } else if (phydev->interface == PHY_INTERFACE_MODE_SGMII_2500) {
+   phy_write(phydev, MDIO_MMD_PHYXS,
+ AQUANTIA_VENDOR_PROVISIONING_REG, reg_val1);
+   break;
+   case PHY_INTERFACE_MODE_SGMII_2500:
/* 2.5GBASE-T mode */
phydev->advertising = SUPPORTED_1000baseT_Full;
phydev->supported = phydev->advertising;
 
phy_write(phydev, MDIO_MMD_AN, AQUNTIA_10G_CTL, 1);
phy_write(phydev, MDIO_MMD_AN, AQUNTIA_VENDOR_P1, 0x9440);
-   } else if (phydev->interface == PHY_INTERFACE_MODE_MII) {
+   break;
+   case PHY_INTERFACE_MODE_MII:
/* 100BASE-TX mode */
phydev->advertising = SUPPORTED_100baseT_Full;
phydev->supported = phydev->advertising;
 
val = (val & ~AQUNTI

[U-Boot] [PATCH v3 10/11] doc: bindings: Aquantia PHY node binding

2019-11-14 Thread Alex Marginean
A couple of optional properties have been introduced for Aquantia PHY
allowing the driver to set up wiring related configuration points that
are otherwise driven by firmware.

Signed-off-by: Alex Marginean 
---
 doc/device-tree-bindings/net/aquantia-phy.txt | 25 +++
 1 file changed, 25 insertions(+)
 create mode 100644 doc/device-tree-bindings/net/aquantia-phy.txt

diff --git a/doc/device-tree-bindings/net/aquantia-phy.txt 
b/doc/device-tree-bindings/net/aquantia-phy.txt
new file mode 100644
index 00..89ce61e05b
--- /dev/null
+++ b/doc/device-tree-bindings/net/aquantia-phy.txt
@@ -0,0 +1,25 @@
+PHY nodes for Aquantia devices.
+
+This text describes properties that are applicable to Aquantia PHY nodes in
+addition to the bindings in phy.txt.
+
+Aquantia PHYs allow some flexibility in the way they are wired in a system,
+they allow MDI pins to be reversed, LEDs linked up in different weays, have an
+I2C slave interface that can be used for debug.  Normally the configuration
+corresponding to these is driven by the PHY firmware with the downside that
+a custom firmware is needed for each integration of a PHY.
+Several optional bindings are defined that allow these configuration points to
+be driven by the PHY driver and reduce dependency on specific FW versions.
+
+Optional properties:
+mdi-reversal: 0 or 1 indicating that reversal must be disabled/enabled.
+  Firmware default is used if the property is missing.
+smb-addr: I2C/SMBus address to use, firmware default is used if the 
property
+  is missing.
+
+Example node:
+phy@00 {
+   reg = <0x00>;
+   mdi-reversal = <1>;
+   smb-addr = <0x25>;
+};
-- 
2.17.1

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[U-Boot] [PATCH v3 06/11] drivers: net: aquantia: set MDI reversal based on DT property

2019-11-14 Thread Alex Marginean
MDI pins up to the RJ45 connector may be reversed on the board and the
default PHY configuration applied by firmware may or may not match that.
Add an optional DT property to configure MDI reversal for this case.

Signed-off-by: Alex Marginean 
---
 drivers/net/phy/aquantia.c | 39 ++
 1 file changed, 39 insertions(+)

diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c
index 97f202afd4..06532c51d5 100644
--- a/drivers/net/phy/aquantia.c
+++ b/drivers/net/phy/aquantia.c
@@ -64,6 +64,13 @@
 #define UP_RUN_STALL_OVERRIDE BIT(6)
 #define UP_RUN_STALL BIT(0)
 
+#define AQUANTIA_PMA_RX_VENDOR_P1  0xe400
+#define  AQUANTIA_PMA_RX_VENDOR_P1_MDI_MSK GENMASK(1, 0)
+/* MDI reversal configured through registers */
+#define  AQUANTIA_PMA_RX_VENDOR_P1_MDI_CFG BIT(1)
+/* MDI reversal enabled */
+#define  AQUANTIA_PMA_RX_VENDOR_P1_MDI_REV BIT(0)
+
 /*
  * global start rate, the protocol associated with this speed is used by 
default
  * on SI.
@@ -320,6 +327,36 @@ static int aquantia_set_proto(struct phy_device *phydev)
return 0;
 }
 
+static int aquantia_dts_config(struct phy_device *phydev)
+{
+#ifdef CONFIG_DM_ETH
+   ofnode node = phydev->node;
+   u32 prop;
+   u16 reg;
+
+   /* this code only works on gen2 and gen3 PHYs */
+   if (phydev->drv->data != AQUANTIA_GEN2 &&
+   phydev->drv->data != AQUANTIA_GEN3)
+   return -ENOTSUPP;
+
+   if (!ofnode_valid(node))
+   return 0;
+
+   if (!ofnode_read_u32(node, "mdi-reversal", &prop)) {
+   debug("mdi-reversal = %d\n", (int)prop);
+   reg =  phy_read(phydev, MDIO_MMD_PMAPMD,
+   AQUANTIA_PMA_RX_VENDOR_P1);
+   reg &= ~AQUANTIA_PMA_RX_VENDOR_P1_MDI_MSK;
+   reg |= AQUANTIA_PMA_RX_VENDOR_P1_MDI_CFG;
+   reg |= prop ? AQUANTIA_PMA_RX_VENDOR_P1_MDI_REV : 0;
+   phy_write(phydev, MDIO_MMD_PMAPMD, AQUANTIA_PMA_RX_VENDOR_P1,
+ reg);
+   }
+
+#endif
+   return 0;
+}
+
 static bool aquantia_link_is_up(struct phy_device *phydev)
 {
u16 reg, regmask;
@@ -400,6 +437,8 @@ int aquantia_config(struct phy_device *phydev)
 
/* configure protocol based on phydev->interface */
aquantia_set_proto(phydev);
+   /* apply custom configuration based on DT */
+   aquantia_dts_config(phydev);
 
/* wake PHY back up */
phy_write(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GLOBAL_SC, 0);
-- 
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[U-Boot] [PATCH v3 11/11] drivers: net: fsl_enetc: use XFI, USXGMII interface type macros

2019-11-14 Thread Alex Marginean
Apply 10G PCS init for USXGMII, XFI interface types.

Signed-off-by: Alex Marginean 
---
 drivers/net/fsl_enetc.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c
index e1713a3337..c94ba240f8 100644
--- a/drivers/net/fsl_enetc.c
+++ b/drivers/net/fsl_enetc.c
@@ -197,6 +197,8 @@ static void enetc_start_pcs(struct udevice *dev)
enetc_init_rgmii(dev);
break;
case PHY_INTERFACE_MODE_XGMII:
+   case PHY_INTERFACE_MODE_USXGMII:
+   case PHY_INTERFACE_MODE_XFI:
enetc_init_sxgmii(dev);
break;
};
-- 
2.17.1

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[U-Boot] [PATCH v3 05/11] drivers: net: aquantia: set up SI protocol based on interface type

2019-11-14 Thread Alex Marginean
If PHY is not ready for data by the time _config is called, reconfigure the
PHY system interface to use the proper protocol based on phydev->interface,
just in case the defaults set by PHY firmware don't match current
configuration.

Signed-off-by: Florin Laurentiu Chiculita 
Signed-off-by: Alex Marginean 
---
 drivers/net/phy/aquantia.c | 107 +
 1 file changed, 107 insertions(+)

diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c
index c4f11f2860..97f202afd4 100644
--- a/drivers/net/phy/aquantia.c
+++ b/drivers/net/phy/aquantia.c
@@ -21,6 +21,7 @@
 #define AQUNTIA_SPEED_MSB_MASK 0x40
 
 #define AQUANTIA_SYSTEM_INTERFACE_SR 0xe812
+#define  AQUANTIA_SYSTEM_INTERFACE_SR_READYBIT(0)
 #define AQUANTIA_VENDOR_PROVISIONING_REG 0xC441
 #define AQUANTIA_FIRMWARE_ID0x20
 #define AQUANTIA_RESERVED_STATUS0xc885
@@ -33,6 +34,9 @@
 #define AQUANTIA_SI_USXGMII  0x0018
 
 /* registers in MDIO_MMD_VEND1 region */
+#define AQUANTIA_VND1_GLOBAL_SC0x000
+#define  AQUANTIA_VND1_GLOBAL_SC_LPBIT(0xb)
+
 #define GLOBAL_FIRMWARE_ID 0x20
 #define GLOBAL_FAULT 0xc850
 #define GLOBAL_RSTATUS_1 0xc885
@@ -60,6 +64,26 @@
 #define UP_RUN_STALL_OVERRIDE BIT(6)
 #define UP_RUN_STALL BIT(0)
 
+/*
+ * global start rate, the protocol associated with this speed is used by 
default
+ * on SI.
+ */
+#define AQUANTIA_VND1_GSTART_RATE  0x31a
+#define  AQUANTIA_VND1_GSTART_RATE_OFF 0
+#define  AQUANTIA_VND1_GSTART_RATE_100M1
+#define  AQUANTIA_VND1_GSTART_RATE_1G  2
+#define  AQUANTIA_VND1_GSTART_RATE_10G 3
+#define  AQUANTIA_VND1_GSTART_RATE_2_5G4
+#define  AQUANTIA_VND1_GSTART_RATE_5G  5
+
+/* SYSCFG registers for 100M, 1G, 2.5G, 5G, 10G */
+#define AQUANTIA_VND1_GSYSCFG_BASE 0x31b
+#define AQUANTIA_VND1_GSYSCFG_100M 0
+#define AQUANTIA_VND1_GSYSCFG_1G   1
+#define AQUANTIA_VND1_GSYSCFG_2_5G 2
+#define AQUANTIA_VND1_GSYSCFG_5G   3
+#define AQUANTIA_VND1_GSYSCFG_10G  4
+
 /* addresses of memory segments in the phy */
 #define DRAM_BASE_ADDR 0x3FFE
 #define IRAM_BASE_ADDR 0x4000
@@ -260,6 +284,68 @@ static int aquantia_upload_firmware(struct phy_device 
*phydev)
 }
 #endif
 
+struct {
+   u16 syscfg;
+   int cnt;
+   u16 start_rate;
+} aquantia_syscfg[PHY_INTERFACE_MODE_COUNT] = {
+   [PHY_INTERFACE_MODE_SGMII] =  {0x04b, AQUANTIA_VND1_GSYSCFG_1G,
+  AQUANTIA_VND1_GSTART_RATE_1G},
+   [PHY_INTERFACE_MODE_SGMII_2500] = {0x144, AQUANTIA_VND1_GSYSCFG_2_5G,
+  AQUANTIA_VND1_GSTART_RATE_2_5G},
+   [PHY_INTERFACE_MODE_XGMII] =  {0x100, AQUANTIA_VND1_GSYSCFG_10G,
+  AQUANTIA_VND1_GSTART_RATE_10G},
+   [PHY_INTERFACE_MODE_XFI] ={0x100, AQUANTIA_VND1_GSYSCFG_10G,
+  AQUANTIA_VND1_GSTART_RATE_10G},
+   [PHY_INTERFACE_MODE_USXGMII] ={0x080, AQUANTIA_VND1_GSYSCFG_10G,
+  AQUANTIA_VND1_GSTART_RATE_10G},
+};
+
+static int aquantia_set_proto(struct phy_device *phydev)
+{
+   int i;
+
+   if (!aquantia_syscfg[phydev->interface].cnt)
+   return 0;
+
+   /* set the default rate to enable the SI link */
+   phy_write(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GSTART_RATE,
+ aquantia_syscfg[phydev->interface].start_rate);
+
+   /* set selected protocol for all relevant line side link speeds */
+   for (i = 0; i <= aquantia_syscfg[phydev->interface].cnt; i++)
+   phy_write(phydev, MDIO_MMD_VEND1,
+ AQUANTIA_VND1_GSYSCFG_BASE + i,
+ aquantia_syscfg[phydev->interface].syscfg);
+   return 0;
+}
+
+static bool aquantia_link_is_up(struct phy_device *phydev)
+{
+   u16 reg, regmask;
+   int devad, regnum;
+
+   /*
+* On Gen 2 and 3 we have a bit that indicates that both system and
+* line side are ready for data, use that if possible.
+*/
+   if (phydev->drv->data == AQUANTIA_GEN2 ||
+   phydev->drv->data == AQUANTIA_GEN3) {
+   devad = MDIO_MMD_PHYXS;
+   regnum = AQUANTIA_SYSTEM_INTERFACE_SR;
+   regmask = AQUANTIA_SYSTEM_INTERFACE_SR_READY;
+   } else {
+   devad = MDIO_MMD_AN;
+   regnum = MDIO_STAT1;
+   regmask = MDIO_AN_STAT1_COMPLETE;
+   }
+   /* the register should be latched, do a double read */
+   phy_read(phydev, devad, regnum);
+   reg = phy_read(phydev, devad, regnum);
+
+   return !!(reg & regmask);
+}
+
 int aquantia_config(struct phy_device *phydev)
 {
int interface = phydev->interface;
@@ -299,6 +385,27 @@ int

[U-Boot] [PATCH v3 01/11] include: phy: define XFI and USXGMII interface types

2019-11-14 Thread Alex Marginean
Drivers currently use XGMII for XFI and USXGMII and, where needed, use
other information to identify the actual protocol on the board.  With these
two defined drivers can now rely on DT phy-mode property.

Signed-off-by: Alex Marginean 
---
 include/phy_interface.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/include/phy_interface.h b/include/phy_interface.h
index c6823189f8..73f3a3679c 100644
--- a/include/phy_interface.h
+++ b/include/phy_interface.h
@@ -31,6 +31,8 @@ typedef enum {
PHY_INTERFACE_MODE_XLAUI,
PHY_INTERFACE_MODE_CAUI2,
PHY_INTERFACE_MODE_CAUI4,
+   PHY_INTERFACE_MODE_XFI,
+   PHY_INTERFACE_MODE_USXGMII,
PHY_INTERFACE_MODE_NONE,/* Must be last */
 
PHY_INTERFACE_MODE_COUNT,
@@ -58,6 +60,8 @@ static const char * const phy_interface_strings[] = {
[PHY_INTERFACE_MODE_XLAUI]  = "xlaui4",
[PHY_INTERFACE_MODE_CAUI2]  = "caui2",
[PHY_INTERFACE_MODE_CAUI4]  = "caui4",
+   [PHY_INTERFACE_MODE_XFI]= "xfi",
+   [PHY_INTERFACE_MODE_USXGMII]= "usxgmii",
[PHY_INTERFACE_MODE_NONE]   = "",
 };
 
-- 
2.17.1

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[U-Boot] [PATCH v3 00/11] Add XFI, USXGMII net protocols, use them in Aquantia driver

2019-11-14 Thread Alex Marginean
There are several plaforms that use XFI and/or USXGMII protocols but declare
them as XGMII in U-Boot because that's already defined.  These protocols are not
identical and in some cases specific configuration has to be applied for each
of them.
This patch series introduces XFI and USXGMII and updates the Aquantia PHY driver
to use them, in addition to the existing XGMII.

Currently AQR PHYs rely exclusively on firmware to configure system side
protocols as well as a few other parameters, which means that FW has to be
replaced on the PHY when switching between SGMII, SGMII-2.5G, XFI, USXGMII.
This patch set adds support to the driver to reconfigure the system interface
protocol based on the interface selected by the ethernet driver (typically
picked up from DT).  Additional configuration (mdi-reversal, smb-addr) is
also picked up by Aquantia driver from the PHY DT node, if present from a couple
of newly defined properties.

The new aquantia DT attributes are documented in a new binding document.  Also
added a generic PHY node binding document using content from Linux.

And last, update ENETC to use the new interface types.

This patch set supersedes v2:
https://patchwork.ozlabs.org/project/uboot/list/?series=124595


Changes in v3:
- It seems some Gen1 Aquantia PHYs don't behave well when put in low power
  and we're not even reconfiguring Gen1 PHYs anyway, so just leave them
  alone.
- Changed subject and description in cover letter.
- Other minor changes.

Changes in v2:
- Flip USX AN bit both ways as needed, in v1 it was only set for USXGMII
  but not reset for XFI
- Use CONFIG_DM_ETH instead of CONFIG_OF_CONTROL around the codeu using
  phydev->node
- Use variable name interface instead of if_type for consistency with
  the rest of the code.

Alex Marginean (11):
  include: phy: define XFI and USXGMII interface types
  include: phy: add data field for private driver data
  drivers: net: aquantia: use XFI, USXGMII interface types
  drivers: net: aquantia: add PHY generation information
  drivers: net: aquantia: set up SI protocol based on interface type
  drivers: net: aquantia: set MDI reversal based on DT property
  drivers: net: aquantia: set SMBus addr based on DT property
  drivers: net: aquantia: check system interface too when checking for
link up
  doc: bindings: add bindings document for PHY nodes
  doc: bindings: Aquantia PHY node binding
  drivers: net: fsl_enetc: use XFI, USXGMII interface type macros

 doc/device-tree-bindings/net/aquantia-phy.txt |  25 ++
 doc/device-tree-bindings/net/phy.txt  |  24 ++
 drivers/net/fsl_enetc.c   |   2 +
 drivers/net/phy/aquantia.c| 226 --
 include/phy.h |   3 +
 include/phy_interface.h   |   4 +
 6 files changed, 265 insertions(+), 19 deletions(-)
 create mode 100644 doc/device-tree-bindings/net/aquantia-phy.txt
 create mode 100644 doc/device-tree-bindings/net/phy.txt

-- 
2.17.1

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[U-Boot] [PATCH v3 02/11] include: phy: add data field for private driver data

2019-11-14 Thread Alex Marginean
This is useful to carry custom information between the driver structure
associated with a specific HW and the driver code.

Signed-off-by: Alex Marginean 
---
 include/phy.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/phy.h b/include/phy.h
index e50f56b6eb..6ace9b3a0c 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -115,6 +115,9 @@ struct phy_driver {
 u16 val);
 
struct list_head list;
+
+   /* driver private data */
+   ulong data;
 };
 
 struct phy_device {
-- 
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[U-Boot] [PATCH v4 5/5] drivers: net: fsl_enetc: use the new MDIO DM helper functions

2019-11-14 Thread Alex Marginean
Uses the new dm_eth_phy_connect helper to connect to the PHY to simplify
the code.

Signed-off-by: Alex Marginean 
---
 drivers/net/fsl_enetc.c | 53 +++--
 drivers/net/fsl_enetc.h |  1 +
 2 files changed, 10 insertions(+), 44 deletions(-)

diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c
index 0ca7e838a8..e1713a3337 100644
--- a/drivers/net/fsl_enetc.c
+++ b/drivers/net/fsl_enetc.c
@@ -203,57 +203,20 @@ static void enetc_start_pcs(struct udevice *dev)
 }
 
 /* Configure the actual/external ethernet PHY, if one is found */
-static void enetc_start_phy(struct udevice *dev)
+static void enetc_config_phy(struct udevice *dev)
 {
struct enetc_priv *priv = dev_get_priv(dev);
-   struct udevice *miidev;
-   struct phy_device *phy;
-   u32 phandle, phy_id;
-   ofnode phy_node;
int supported;
 
-   if (!ofnode_valid(dev->node)) {
-   enetc_dbg(dev, "no enetc ofnode found, skipping PHY set-up\n");
-   return;
-   }
-
-   if (ofnode_read_u32(dev->node, "phy-handle", &phandle)) {
-   enetc_dbg(dev, "phy-handle not found, skipping PHY set-up\n");
-   return;
-   }
-
-   phy_node = ofnode_get_by_phandle(phandle);
-   if (!ofnode_valid(phy_node)) {
-   enetc_dbg(dev, "invalid phy node, skipping PHY set-up\n");
-   return;
-   }
-   enetc_dbg(dev, "phy node: %s\n", ofnode_get_name(phy_node));
+   priv->phy = dm_eth_phy_connect(dev);
 
-   if (ofnode_read_u32(phy_node, "reg", &phy_id)) {
-   enetc_dbg(dev,
- "missing reg in PHY node, skipping PHY set-up\n");
+   if (!priv->phy)
return;
-   }
-
-   if (uclass_get_device_by_ofnode(UCLASS_MDIO,
-   ofnode_get_parent(phy_node),
-   &miidev)) {
-   enetc_dbg(dev, "can't find MDIO bus for node %s\n",
- ofnode_get_name(ofnode_get_parent(phy_node)));
-   return;
-   }
-
-   phy = dm_mdio_phy_connect(miidev, phy_id, dev, priv->if_type);
-   if (!phy) {
-   enetc_dbg(dev, "dm_mdio_phy_connect returned null\n");
-   return;
-   }
 
supported = GENMASK(6, 0); /* speeds up to 1G & AN */
-   phy->advertising = phy->supported & supported;
-   phy->node = phy_node;
-   phy_config(phy);
-   phy_startup(phy);
+   priv->phy->advertising = priv->phy->supported & supported;
+
+   phy_config(priv->phy);
 }
 
 /*
@@ -468,7 +431,9 @@ static int enetc_start(struct udevice *dev)
enetc_setup_rx_bdr(dev);
 
enetc_start_pcs(dev);
-   enetc_start_phy(dev);
+   enetc_config_phy(dev);
+   if (priv->phy)
+   phy_startup(priv->phy);
 
return 0;
 }
diff --git a/drivers/net/fsl_enetc.h b/drivers/net/fsl_enetc.h
index 0bb4cdff47..9a36cdad80 100644
--- a/drivers/net/fsl_enetc.h
+++ b/drivers/net/fsl_enetc.h
@@ -154,6 +154,7 @@ struct enetc_priv {
 
int if_type;
struct mii_dev imdio;
+   struct phy_device *phy;
 };
 
 /* register accessors */
-- 
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[U-Boot] [PATCH v4 2/5] net: mdio-uclass: add dm_eth_phy_connect helper function

2019-11-14 Thread Alex Marginean
The function connects an ethernet device to a PHY using DT information.
This API is only available for eth devices with an associated device tree
node.

Signed-off-by: Alex Marginean 
---
 include/miiphy.h  | 12 
 net/mdio-uclass.c | 72 +++
 2 files changed, 84 insertions(+)

diff --git a/include/miiphy.h b/include/miiphy.h
index 94bf0da24a..e591d93416 100644
--- a/include/miiphy.h
+++ b/include/miiphy.h
@@ -165,6 +165,18 @@ struct phy_device *dm_mdio_phy_connect(struct udevice 
*mdiodev, int phyaddr,
   struct udevice *ethdev,
   phy_interface_t interface);
 
+/**
+ * dm_eth_phy_connect - Connect an Eth device to a PHY based on device tree
+ *
+ * Picks up the DT phy-handle/mdio-handle and phy-mode from ethernet device 
node
+ * and connects the ethernet device to the linked PHY.
+ *
+ * @ethdev: ethernet device
+ *
+ * @return pointer to phy_device, or 0 on error
+ */
+struct phy_device *dm_eth_phy_connect(struct udevice *ethdev);
+
 #endif
 
 #ifdef CONFIG_DM_MDIO_MUX
diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c
index 7a5f1d6dcc..cf736a3ae5 100644
--- a/net/mdio-uclass.c
+++ b/net/mdio-uclass.c
@@ -116,6 +116,78 @@ struct phy_device *dm_mdio_phy_connect(struct udevice 
*mdiodev, int phyaddr,
return phy_connect(pdata->mii_bus, phyaddr, ethdev, interface);
 }
 
+static struct phy_device *dm_eth_connect_phy_handle(struct udevice *ethdev,
+   phy_interface_t interface)
+{
+   u32 phy_phandle, phy_addr;
+   struct udevice *mdiodev;
+   struct phy_device *phy;
+   ofnode phy_node;
+
+   if (ofnode_read_u32(ethdev->node, "phy-handle", &phy_phandle)) {
+   dev_dbg(dev, "phy-handle missing in ethernet node\n");
+   return NULL;
+   }
+
+   phy_node = ofnode_get_by_phandle(phy_phandle);
+   if (!ofnode_valid(phy_node)) {
+   dev_dbg(dev, "invalid phy node\n");
+   return NULL;
+   }
+
+   if (ofnode_read_u32(phy_node, "reg", &phy_addr)) {
+   dev_dbg(ethdev, "missing reg property in phy node\n");
+   return NULL;
+   }
+
+   if (uclass_get_device_by_ofnode(UCLASS_MDIO,
+   ofnode_get_parent(phy_node),
+   &mdiodev)) {
+   dev_dbg(dev, "can't find MDIO bus for node %s\n",
+   ofnode_get_name(ofnode_get_parent(phy_node)));
+   return NULL;
+   }
+
+   phy = dm_mdio_phy_connect(mdiodev, phy_addr, ethdev, interface);
+
+   if (phy)
+   phy->node = phy_node;
+
+   return phy;
+}
+
+/* Connect to a PHY linked in eth DT node */
+struct phy_device *dm_eth_phy_connect(struct udevice *ethdev)
+{
+   const char *if_str;
+   phy_interface_t interface;
+   struct phy_device *phy;
+
+   if (!ofnode_valid(ethdev->node)) {
+   debug("%s: supplied eth dev has no DT node!\n", ethdev->name);
+   return NULL;
+   }
+
+   interface = PHY_INTERFACE_MODE_NONE;
+   if_str = ofnode_read_string(ethdev->node, "phy-mode");
+   if (if_str)
+   interface = phy_get_interface_by_name(if_str);
+   if (interface < 0)
+   interface = PHY_INTERFACE_MODE_NONE;
+
+   if (interface == PHY_INTERFACE_MODE_NONE)
+   dev_dbg(ethdev, "can't find interface mode, default to NONE\n");
+
+   phy = dm_eth_connect_phy_handle(ethdev, interface);
+
+   if (!phy)
+   return NULL;
+
+   phy->interface = interface;
+
+   return phy;
+}
+
 UCLASS_DRIVER(mdio) = {
.id = UCLASS_MDIO,
.name = "mdio",
-- 
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[U-Boot] [PATCH v4 4/5] doc: bindings: add mdio-handle property to ethernet nodes

2019-11-14 Thread Alex Marginean
Adds an optional mdio-handle property which identifies a MDIO bus which can
be scanned to find the relevant PHY.  The property is ignored if phy-handle
is also present.

Signed-off-by: Alex Marginean 
---
 doc/device-tree-bindings/net/ethernet.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/doc/device-tree-bindings/net/ethernet.txt 
b/doc/device-tree-bindings/net/ethernet.txt
index 3fc360523b..9f9629f8d6 100644
--- a/doc/device-tree-bindings/net/ethernet.txt
+++ b/doc/device-tree-bindings/net/ethernet.txt
@@ -9,6 +9,8 @@ The following properties are common to the Ethernet controllers:
 - max-speed: number, specifies maximum speed in Mbit/s supported by the device;
 - max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather than
   the maximum frame size (there's contradiction in ePAPR).
+- mdio-handle: phandle, specifies a reference to a MDIO bus to be scanned to
+  find the PHY device.  Ignored if phy-handle is also present.
 - phy-mode: string, operation mode of the PHY interface; supported values are
   "mii", "gmii", "sgmii", "qsgmii", "tbi", "rev-mii", "rmii", "rgmii", 
"rgmii-id",
   "rgmii-rxid", "rgmii-txid", "rtbi", "smii", "xgmii"; this is now a de-facto
-- 
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[U-Boot] [PATCH v4 3/5] net: mdio-uclass: Add helper functions for scanning the MDIO bus

2019-11-14 Thread Alex Marginean
The patch introduces dm_mdio_phy_scan which is a DM wrapper over
phy_find_by_mask.  It also updates dm_eth_phy_connect to scan a MDIO bus
for PHYs if the ethernet node contains a mdio-handle property.

Signed-off-by: Alex Marginean 
---
 include/miiphy.h  | 14 
 net/mdio-uclass.c | 57 +++
 2 files changed, 71 insertions(+)

diff --git a/include/miiphy.h b/include/miiphy.h
index e591d93416..a5bdc29a47 100644
--- a/include/miiphy.h
+++ b/include/miiphy.h
@@ -165,6 +165,20 @@ struct phy_device *dm_mdio_phy_connect(struct udevice 
*mdiodev, int phyaddr,
   struct udevice *ethdev,
   phy_interface_t interface);
 
+/**
+ * dm_mdio_phy_scan - Scan for a PHY on the given MDIO bus
+ *
+ * @mdiodev: mdio device to scan
+ * @ethdev: ethernet device to connect to the PHY
+ * @interface: MAC-PHY protocol
+ * @addrmask: bitmask of PHY addresses to scan, use all Fs to scan all 
addresses
+ *
+ * @return pointer to phy_device, or 0 on error
+ */
+struct phy_device *dm_mdio_phy_scan(struct udevice *mdiodev,
+   struct udevice *ethdev,
+   phy_interface_t interface, uint addrmask);
+
 /**
  * dm_eth_phy_connect - Connect an Eth device to a PHY based on device tree
  *
diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c
index cf736a3ae5..9ca462edb2 100644
--- a/net/mdio-uclass.c
+++ b/net/mdio-uclass.c
@@ -116,6 +116,24 @@ struct phy_device *dm_mdio_phy_connect(struct udevice 
*mdiodev, int phyaddr,
return phy_connect(pdata->mii_bus, phyaddr, ethdev, interface);
 }
 
+struct phy_device *dm_mdio_phy_scan(struct udevice *mdiodev,
+   struct udevice *ethdev,
+   phy_interface_t interface, uint addrmask)
+{
+   struct mdio_perdev_priv *pdata;
+   struct phy_device *phy;
+
+   pdata = dev_get_uclass_priv(mdiodev);
+
+   phy = phy_find_by_mask(pdata->mii_bus, addrmask, interface);
+   if (phy)
+   phy_connect_dev(phy, ethdev);
+   else
+   dev_dbg(mdiodev, "no PHY detected on bus\n");
+
+   return phy;
+}
+
 static struct phy_device *dm_eth_connect_phy_handle(struct udevice *ethdev,
phy_interface_t interface)
 {
@@ -156,6 +174,34 @@ static struct phy_device *dm_eth_connect_phy_handle(struct 
udevice *ethdev,
return phy;
 }
 
+static struct phy_device *dm_eth_connect_mdio_handle(struct udevice *ethdev,
+phy_interface_t interface)
+{
+   u32 mdio_phandle;
+   ofnode mdio_node;
+   struct udevice *mdiodev;
+   uint mask = 0x;
+
+   if (ofnode_read_u32(ethdev->node, "mdio-handle", &mdio_phandle)) {
+   dev_dbg(ethdev, "mdio-handle missing in ethernet node\n");
+   return NULL;
+   }
+
+   mdio_node = ofnode_get_by_phandle(mdio_phandle);
+   if (!ofnode_valid(mdio_node)) {
+   dev_dbg(dev, "invalid mdio node\n");
+   return NULL;
+   }
+
+   if (uclass_get_device_by_ofnode(UCLASS_MDIO, mdio_node, &mdiodev)) {
+   dev_dbg(ethdev, "can't find MDIO bus for node %s\n",
+   ofnode_get_name(mdio_node));
+   return NULL;
+   }
+
+   return dm_mdio_phy_scan(mdiodev, ethdev, interface, mask);
+}
+
 /* Connect to a PHY linked in eth DT node */
 struct phy_device *dm_eth_phy_connect(struct udevice *ethdev)
 {
@@ -178,8 +224,19 @@ struct phy_device *dm_eth_phy_connect(struct udevice 
*ethdev)
if (interface == PHY_INTERFACE_MODE_NONE)
dev_dbg(ethdev, "can't find interface mode, default to NONE\n");
 
+   /*
+* The sequence is:
+* - if there is a phy-handle property, follow that,
+* - if there is a mdio-handle property, follow that and scan for the
+*   PHY,
+* - if the above came out empty, return NULL.
+*/
+
phy = dm_eth_connect_phy_handle(ethdev, interface);
 
+   if (!phy)
+   phy = dm_eth_connect_mdio_handle(ethdev, interface);
+
if (!phy)
return NULL;
 
-- 
2.17.1

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[U-Boot] [PATCH v4 1/5] net: mdio-uclass: rename arguments of dm_mdio_phy_connect for clarity

2019-11-14 Thread Alex Marginean
Renamed dm_mdio_phy_connect arguments dev to mdiodev and addr to phyaddr
for a bit more clarity and consistency with the following patches.
Also use NULL instead of 0 on error return path.

Signed-off-by: Alex Marginean 
---
 include/miiphy.h  |  6 +++---
 net/mdio-uclass.c | 10 +-
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/include/miiphy.h b/include/miiphy.h
index 9b97d09f18..94bf0da24a 100644
--- a/include/miiphy.h
+++ b/include/miiphy.h
@@ -154,14 +154,14 @@ void dm_mdio_probe_devices(void);
 /**
  * dm_mdio_phy_connect - Wrapper over phy_connect for DM MDIO
  *
- * @dev: mdio dev
- * @addr: PHY address on MDIO bus
+ * @mdiodev: mdio device the PHY is accesible on
+ * @phyaddr: PHY address on MDIO bus
  * @ethdev: ethernet device to connect to the PHY
  * @interface: MAC-PHY protocol
  *
  * @return pointer to phy_device, or 0 on error
  */
-struct phy_device *dm_mdio_phy_connect(struct udevice *dev, int addr,
+struct phy_device *dm_mdio_phy_connect(struct udevice *mdiodev, int phyaddr,
   struct udevice *ethdev,
   phy_interface_t interface);
 
diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c
index 6f922e80b6..7a5f1d6dcc 100644
--- a/net/mdio-uclass.c
+++ b/net/mdio-uclass.c
@@ -104,16 +104,16 @@ static int dm_mdio_pre_remove(struct udevice *dev)
return 0;
 }
 
-struct phy_device *dm_mdio_phy_connect(struct udevice *dev, int addr,
+struct phy_device *dm_mdio_phy_connect(struct udevice *mdiodev, int phyaddr,
   struct udevice *ethdev,
   phy_interface_t interface)
 {
-   struct mdio_perdev_priv *pdata = dev_get_uclass_priv(dev);
+   struct mdio_perdev_priv *pdata = dev_get_uclass_priv(mdiodev);
 
-   if (device_probe(dev))
-   return 0;
+   if (device_probe(mdiodev))
+   return NULL;
 
-   return phy_connect(pdata->mii_bus, addr, ethdev, interface);
+   return phy_connect(pdata->mii_bus, phyaddr, ethdev, interface);
 }
 
 UCLASS_DRIVER(mdio) = {
-- 
2.17.1

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[U-Boot] [PATCH v4 0/5] Add helper function for linking a DM Eth device to a PHY

2019-11-14 Thread Alex Marginean
The patch set introduces dm_eth_phy_connect which takes in an ethernet device
and uses DT information to find the associated PHY and connect the Ethernet
interface to it.  This should simplify similar code in ethernet drivers.
A new binding is introduced for scanning an MDIO bus, useful if the bus is
private to the Ethernet interface.  We're going to try to get this binding
accepted in Linux too.
Finally the patch set updates fsl_enetc driver to use the new helper function.


This patch set supersedes v2 series:
https://patchwork.ozlabs.org/project/uboot/list/?series=124537
and v3 series:
https://patchwork.ozlabs.org/project/uboot/list/?series=140114

Changes in v4:
 - rebased on current head

Changes in v3:
 - added cover letter
 - check for null PHY pointer before using it in dm_eth_connect_phy_handle
 - moved the code dealing with MDIO scanning into a separate patch
 - renames several arguments and variables for a bit more clarity and
   consistency

Changes in v2:
- Moved MDIO scan code into dm_mdio_phy_scan which is also exported
- Use interface instead of if_type for consistency
- don't use phy pointer if NULL in fsl_enetc code

Alex Marginean (5):
  net: mdio-uclass: rename arguments of dm_mdio_phy_connect for
consistency
  net: mdio-uclass: add dm_eth_phy_connect helper function
  net: mdio-uclass: Add helper functions for scanning the MDIO bus
  doc: bindings: add mdio-handle property to ethernet nodes
  drivers: net: fsl_enetc: use the new MDIO DM helper functions

 doc/device-tree-bindings/net/ethernet.txt |   2 +
 drivers/net/fsl_enetc.c   |  52 ++--
 drivers/net/fsl_enetc.h   |   1 +
 include/miiphy.h  |  32 -
 net/mdio-uclass.c | 139 +-
 5 files changed, 175 insertions(+), 51 deletions(-)

-- 
2.17.1

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[U-Boot] [PATCH] configs: ls1028a: enable OF_LIBFDT_OVERLAY

2019-11-14 Thread Alex Marginean
LS1028A QDS board supports multiple combinations of SerDes protocols and
multiple add-on cards with Ethernet PHYs.  Some of them require specific
configuration in Linux DT, and the plan is to use DT overlays for them.

Signed-off-by: Alex Marginean 
---
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 +
 configs/ls1028aqds_tfa_defconfig | 1 +
 configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 1 +
 configs/ls1028ardb_tfa_defconfig | 1 +
 4 files changed, 4 insertions(+)

diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index fadb13d469..713a088e42 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -71,4 +71,5 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_WDT=y
 CONFIG_WDT_SP805=y
 CONFIG_RSA=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index b690e24c7f..b5eb872148 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -73,4 +73,5 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_WDT=y
 CONFIG_WDT_SP805=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
index cbbe649485..dc07a0a4d7 100644
--- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
@@ -71,4 +71,5 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_WDT=y
 CONFIG_WDT_SP805=y
 CONFIG_RSA=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig
index 35c46d4dd7..644c5ac6bb 100644
--- a/configs/ls1028ardb_tfa_defconfig
+++ b/configs/ls1028ardb_tfa_defconfig
@@ -74,4 +74,5 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_WDT=y
 CONFIG_WDT_SP805=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-- 
2.17.1

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[U-Boot] [PATCH v3 3/5] net: mdio-uclass: Add helper functions for scanning the MDIO bus

2019-11-01 Thread Alex Marginean
The patch introduces dm_mdio_phy_scan which is a DM wrapper over
phy_find_by_mask.  It also updates dm_eth_phy_connect to scan a MDIO bus
for PHYs if the ethernet node contains a mdio-handle property.

Signed-off-by: Alex Marginean 
---
 include/miiphy.h  | 14 
 net/mdio-uclass.c | 57 +++
 2 files changed, 71 insertions(+)

diff --git a/include/miiphy.h b/include/miiphy.h
index e591d93416..a5bdc29a47 100644
--- a/include/miiphy.h
+++ b/include/miiphy.h
@@ -165,6 +165,20 @@ struct phy_device *dm_mdio_phy_connect(struct udevice 
*mdiodev, int phyaddr,
   struct udevice *ethdev,
   phy_interface_t interface);
 
+/**
+ * dm_mdio_phy_scan - Scan for a PHY on the given MDIO bus
+ *
+ * @mdiodev: mdio device to scan
+ * @ethdev: ethernet device to connect to the PHY
+ * @interface: MAC-PHY protocol
+ * @addrmask: bitmask of PHY addresses to scan, use all Fs to scan all 
addresses
+ *
+ * @return pointer to phy_device, or 0 on error
+ */
+struct phy_device *dm_mdio_phy_scan(struct udevice *mdiodev,
+   struct udevice *ethdev,
+   phy_interface_t interface, uint addrmask);
+
 /**
  * dm_eth_phy_connect - Connect an Eth device to a PHY based on device tree
  *
diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c
index cf736a3ae5..9ca462edb2 100644
--- a/net/mdio-uclass.c
+++ b/net/mdio-uclass.c
@@ -116,6 +116,24 @@ struct phy_device *dm_mdio_phy_connect(struct udevice 
*mdiodev, int phyaddr,
return phy_connect(pdata->mii_bus, phyaddr, ethdev, interface);
 }
 
+struct phy_device *dm_mdio_phy_scan(struct udevice *mdiodev,
+   struct udevice *ethdev,
+   phy_interface_t interface, uint addrmask)
+{
+   struct mdio_perdev_priv *pdata;
+   struct phy_device *phy;
+
+   pdata = dev_get_uclass_priv(mdiodev);
+
+   phy = phy_find_by_mask(pdata->mii_bus, addrmask, interface);
+   if (phy)
+   phy_connect_dev(phy, ethdev);
+   else
+   dev_dbg(mdiodev, "no PHY detected on bus\n");
+
+   return phy;
+}
+
 static struct phy_device *dm_eth_connect_phy_handle(struct udevice *ethdev,
phy_interface_t interface)
 {
@@ -156,6 +174,34 @@ static struct phy_device *dm_eth_connect_phy_handle(struct 
udevice *ethdev,
return phy;
 }
 
+static struct phy_device *dm_eth_connect_mdio_handle(struct udevice *ethdev,
+phy_interface_t interface)
+{
+   u32 mdio_phandle;
+   ofnode mdio_node;
+   struct udevice *mdiodev;
+   uint mask = 0x;
+
+   if (ofnode_read_u32(ethdev->node, "mdio-handle", &mdio_phandle)) {
+   dev_dbg(ethdev, "mdio-handle missing in ethernet node\n");
+   return NULL;
+   }
+
+   mdio_node = ofnode_get_by_phandle(mdio_phandle);
+   if (!ofnode_valid(mdio_node)) {
+   dev_dbg(dev, "invalid mdio node\n");
+   return NULL;
+   }
+
+   if (uclass_get_device_by_ofnode(UCLASS_MDIO, mdio_node, &mdiodev)) {
+   dev_dbg(ethdev, "can't find MDIO bus for node %s\n",
+   ofnode_get_name(mdio_node));
+   return NULL;
+   }
+
+   return dm_mdio_phy_scan(mdiodev, ethdev, interface, mask);
+}
+
 /* Connect to a PHY linked in eth DT node */
 struct phy_device *dm_eth_phy_connect(struct udevice *ethdev)
 {
@@ -178,8 +224,19 @@ struct phy_device *dm_eth_phy_connect(struct udevice 
*ethdev)
if (interface == PHY_INTERFACE_MODE_NONE)
dev_dbg(ethdev, "can't find interface mode, default to NONE\n");
 
+   /*
+* The sequence is:
+* - if there is a phy-handle property, follow that,
+* - if there is a mdio-handle property, follow that and scan for the
+*   PHY,
+* - if the above came out empty, return NULL.
+*/
+
phy = dm_eth_connect_phy_handle(ethdev, interface);
 
+   if (!phy)
+   phy = dm_eth_connect_mdio_handle(ethdev, interface);
+
if (!phy)
return NULL;
 
-- 
2.17.1

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[U-Boot] [PATCH v3 1/5] net: mdio-uclass: rename arguments of dm_mdio_phy_connect for clarity

2019-11-01 Thread Alex Marginean
Renamed dm_mdio_phy_connect arguments dev to mdiodev and addr to phyaddr
for a bit more clarity and consistency with the following patches.
Also use NULL instead of 0 on error return path.

Signed-off-by: Alex Marginean 
---
 include/miiphy.h  |  6 +++---
 net/mdio-uclass.c | 10 +-
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/include/miiphy.h b/include/miiphy.h
index 9b97d09f18..94bf0da24a 100644
--- a/include/miiphy.h
+++ b/include/miiphy.h
@@ -154,14 +154,14 @@ void dm_mdio_probe_devices(void);
 /**
  * dm_mdio_phy_connect - Wrapper over phy_connect for DM MDIO
  *
- * @dev: mdio dev
- * @addr: PHY address on MDIO bus
+ * @mdiodev: mdio device the PHY is accesible on
+ * @phyaddr: PHY address on MDIO bus
  * @ethdev: ethernet device to connect to the PHY
  * @interface: MAC-PHY protocol
  *
  * @return pointer to phy_device, or 0 on error
  */
-struct phy_device *dm_mdio_phy_connect(struct udevice *dev, int addr,
+struct phy_device *dm_mdio_phy_connect(struct udevice *mdiodev, int phyaddr,
   struct udevice *ethdev,
   phy_interface_t interface);
 
diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c
index 6f922e80b6..7a5f1d6dcc 100644
--- a/net/mdio-uclass.c
+++ b/net/mdio-uclass.c
@@ -104,16 +104,16 @@ static int dm_mdio_pre_remove(struct udevice *dev)
return 0;
 }
 
-struct phy_device *dm_mdio_phy_connect(struct udevice *dev, int addr,
+struct phy_device *dm_mdio_phy_connect(struct udevice *mdiodev, int phyaddr,
   struct udevice *ethdev,
   phy_interface_t interface)
 {
-   struct mdio_perdev_priv *pdata = dev_get_uclass_priv(dev);
+   struct mdio_perdev_priv *pdata = dev_get_uclass_priv(mdiodev);
 
-   if (device_probe(dev))
-   return 0;
+   if (device_probe(mdiodev))
+   return NULL;
 
-   return phy_connect(pdata->mii_bus, addr, ethdev, interface);
+   return phy_connect(pdata->mii_bus, phyaddr, ethdev, interface);
 }
 
 UCLASS_DRIVER(mdio) = {
-- 
2.17.1

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[U-Boot] [PATCH v3 5/5] drivers: net: fsl_enetc: use the new MDIO DM helper functions

2019-11-01 Thread Alex Marginean
Uses the new dm_eth_phy_connect helper to connect to the PHY to simplify
the code.

Signed-off-by: Alex Marginean 
---
 drivers/net/fsl_enetc.c | 52 +++--
 drivers/net/fsl_enetc.h |  1 +
 2 files changed, 10 insertions(+), 43 deletions(-)

diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c
index e7c5062c39..928d071815 100644
--- a/drivers/net/fsl_enetc.c
+++ b/drivers/net/fsl_enetc.c
@@ -200,56 +200,20 @@ static void enetc_start_pcs(struct udevice *dev)
 }
 
 /* Configure the actual/external ethernet PHY, if one is found */
-static void enetc_start_phy(struct udevice *dev)
+static void enetc_config_phy(struct udevice *dev)
 {
struct enetc_priv *priv = dev_get_priv(dev);
-   struct udevice *miidev;
-   struct phy_device *phy;
-   u32 phandle, phy_id;
-   ofnode phy_node;
int supported;
 
-   if (!ofnode_valid(dev->node)) {
-   enetc_dbg(dev, "no enetc ofnode found, skipping PHY set-up\n");
-   return;
-   }
-
-   if (ofnode_read_u32(dev->node, "phy-handle", &phandle)) {
-   enetc_dbg(dev, "phy-handle not found, skipping PHY set-up\n");
-   return;
-   }
-
-   phy_node = ofnode_get_by_phandle(phandle);
-   if (!ofnode_valid(phy_node)) {
-   enetc_dbg(dev, "invalid phy node, skipping PHY set-up\n");
-   return;
-   }
-   enetc_dbg(dev, "phy node: %s\n", ofnode_get_name(phy_node));
+   priv->phy = dm_eth_phy_connect(dev);
 
-   if (ofnode_read_u32(phy_node, "reg", &phy_id)) {
-   enetc_dbg(dev,
- "missing reg in PHY node, skipping PHY set-up\n");
+   if (!priv->phy)
return;
-   }
-
-   if (uclass_get_device_by_ofnode(UCLASS_MDIO,
-   ofnode_get_parent(phy_node),
-   &miidev)) {
-   enetc_dbg(dev, "can't find MDIO bus for node %s\n",
- ofnode_get_name(ofnode_get_parent(phy_node)));
-   return;
-   }
-
-   phy = dm_mdio_phy_connect(miidev, phy_id, dev, priv->if_type);
-   if (!phy) {
-   enetc_dbg(dev, "dm_mdio_phy_connect returned null\n");
-   return;
-   }
 
supported = GENMASK(6, 0); /* speeds up to 1G & AN */
-   phy->advertising = phy->supported & supported;
-   phy_config(phy);
-   phy_startup(phy);
+   priv->phy->advertising = priv->phy->supported & supported;
+
+   phy_config(priv->phy);
 }
 
 /*
@@ -464,7 +428,9 @@ static int enetc_start(struct udevice *dev)
enetc_setup_rx_bdr(dev);
 
enetc_start_pcs(dev);
-   enetc_start_phy(dev);
+   enetc_config_phy(dev);
+   if (priv->phy)
+   phy_startup(priv->phy);
 
return 0;
 }
diff --git a/drivers/net/fsl_enetc.h b/drivers/net/fsl_enetc.h
index 0bb4cdff47..9a36cdad80 100644
--- a/drivers/net/fsl_enetc.h
+++ b/drivers/net/fsl_enetc.h
@@ -154,6 +154,7 @@ struct enetc_priv {
 
int if_type;
struct mii_dev imdio;
+   struct phy_device *phy;
 };
 
 /* register accessors */
-- 
2.17.1

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[U-Boot] [PATCH v3 4/5] doc: bindings: add mdio-handle property to ethernet nodes

2019-11-01 Thread Alex Marginean
Adds an optional mdio-handle property which identifies a MDIO bus which can
be scanned to find the relevant PHY.  The property is ignored if phy-handle
is also present.

Signed-off-by: Alex Marginean 
---
 doc/device-tree-bindings/net/ethernet.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/doc/device-tree-bindings/net/ethernet.txt 
b/doc/device-tree-bindings/net/ethernet.txt
index 3fc360523b..9f9629f8d6 100644
--- a/doc/device-tree-bindings/net/ethernet.txt
+++ b/doc/device-tree-bindings/net/ethernet.txt
@@ -9,6 +9,8 @@ The following properties are common to the Ethernet controllers:
 - max-speed: number, specifies maximum speed in Mbit/s supported by the device;
 - max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather than
   the maximum frame size (there's contradiction in ePAPR).
+- mdio-handle: phandle, specifies a reference to a MDIO bus to be scanned to
+  find the PHY device.  Ignored if phy-handle is also present.
 - phy-mode: string, operation mode of the PHY interface; supported values are
   "mii", "gmii", "sgmii", "qsgmii", "tbi", "rev-mii", "rmii", "rgmii", 
"rgmii-id",
   "rgmii-rxid", "rgmii-txid", "rtbi", "smii", "xgmii"; this is now a de-facto
-- 
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[U-Boot] [PATCH v3 0/5] Add helper function for linking a DM Eth device to a PHY

2019-11-01 Thread Alex Marginean
The patch set introduces dm_eth_phy_connect which takes in an ethernet device
and uses DT information to find the associated PHY and connect the Ethernet
interface to it.  This should simplify similar code in ethernet drivers.
A new binding is introduced for scanning an MDIO bus, useful if the bus is
private to the Ethernet interface.
Finally the patch set updates fsl_enetc driver to use the new helper function.


This patch set supersedes v2 series:
https://patchwork.ozlabs.org/project/uboot/list/?series=124537

Patch 6 of this series removes code modified in the following patch, a similar
change is now part of MDIO helper functions:
https://patchwork.ozlabs.org/patch/1184523/

Changes in v3:
 - added cover letter
 - check for null PHY pointer before using it in dm_eth_connect_phy_handle
 - moved the code dealing with MDIO scanning into a separate patch
 - renames several arguments and variables for a bit more clarity and
   consistency

Changes in v2:
- Moved MDIO scan code into dm_mdio_phy_scan which is also exported
- Use interface instead of if_type for consistency
- don't use phy pointer if NULL in fsl_enetc code

Alex Marginean (5):
  net: mdio-uclass: rename arguments of dm_mdio_phy_connect for
consistency
  net: mdio-uclass: add dm_eth_phy_connect helper function
  net: mdio-uclass: Add helper functions for scanning the MDIO bus
  doc: bindings: add mdio-handle property to ethernet nodes
  drivers: net: fsl_enetc: use the new MDIO DM helper functions

 doc/device-tree-bindings/net/ethernet.txt |   2 +
 drivers/net/fsl_enetc.c   |  52 ++--
 drivers/net/fsl_enetc.h   |   1 +
 include/miiphy.h  |  32 -
 net/mdio-uclass.c | 139 +-
 5 files changed, 175 insertions(+), 51 deletions(-)

-- 
2.17.1

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[U-Boot] [PATCH v3 2/5] net: mdio-uclass: add dm_eth_phy_connect helper function

2019-11-01 Thread Alex Marginean
The function connects an ethernet device to a PHY using DT information.
This API is only available for eth devices with an associated device tree
node.

Signed-off-by: Alex Marginean 
---
 include/miiphy.h  | 12 
 net/mdio-uclass.c | 72 +++
 2 files changed, 84 insertions(+)

diff --git a/include/miiphy.h b/include/miiphy.h
index 94bf0da24a..e591d93416 100644
--- a/include/miiphy.h
+++ b/include/miiphy.h
@@ -165,6 +165,18 @@ struct phy_device *dm_mdio_phy_connect(struct udevice 
*mdiodev, int phyaddr,
   struct udevice *ethdev,
   phy_interface_t interface);
 
+/**
+ * dm_eth_phy_connect - Connect an Eth device to a PHY based on device tree
+ *
+ * Picks up the DT phy-handle/mdio-handle and phy-mode from ethernet device 
node
+ * and connects the ethernet device to the linked PHY.
+ *
+ * @ethdev: ethernet device
+ *
+ * @return pointer to phy_device, or 0 on error
+ */
+struct phy_device *dm_eth_phy_connect(struct udevice *ethdev);
+
 #endif
 
 #ifdef CONFIG_DM_MDIO_MUX
diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c
index 7a5f1d6dcc..cf736a3ae5 100644
--- a/net/mdio-uclass.c
+++ b/net/mdio-uclass.c
@@ -116,6 +116,78 @@ struct phy_device *dm_mdio_phy_connect(struct udevice 
*mdiodev, int phyaddr,
return phy_connect(pdata->mii_bus, phyaddr, ethdev, interface);
 }
 
+static struct phy_device *dm_eth_connect_phy_handle(struct udevice *ethdev,
+   phy_interface_t interface)
+{
+   u32 phy_phandle, phy_addr;
+   struct udevice *mdiodev;
+   struct phy_device *phy;
+   ofnode phy_node;
+
+   if (ofnode_read_u32(ethdev->node, "phy-handle", &phy_phandle)) {
+   dev_dbg(dev, "phy-handle missing in ethernet node\n");
+   return NULL;
+   }
+
+   phy_node = ofnode_get_by_phandle(phy_phandle);
+   if (!ofnode_valid(phy_node)) {
+   dev_dbg(dev, "invalid phy node\n");
+   return NULL;
+   }
+
+   if (ofnode_read_u32(phy_node, "reg", &phy_addr)) {
+   dev_dbg(ethdev, "missing reg property in phy node\n");
+   return NULL;
+   }
+
+   if (uclass_get_device_by_ofnode(UCLASS_MDIO,
+   ofnode_get_parent(phy_node),
+   &mdiodev)) {
+   dev_dbg(dev, "can't find MDIO bus for node %s\n",
+   ofnode_get_name(ofnode_get_parent(phy_node)));
+   return NULL;
+   }
+
+   phy = dm_mdio_phy_connect(mdiodev, phy_addr, ethdev, interface);
+
+   if (phy)
+   phy->node = phy_node;
+
+   return phy;
+}
+
+/* Connect to a PHY linked in eth DT node */
+struct phy_device *dm_eth_phy_connect(struct udevice *ethdev)
+{
+   const char *if_str;
+   phy_interface_t interface;
+   struct phy_device *phy;
+
+   if (!ofnode_valid(ethdev->node)) {
+   debug("%s: supplied eth dev has no DT node!\n", ethdev->name);
+   return NULL;
+   }
+
+   interface = PHY_INTERFACE_MODE_NONE;
+   if_str = ofnode_read_string(ethdev->node, "phy-mode");
+   if (if_str)
+   interface = phy_get_interface_by_name(if_str);
+   if (interface < 0)
+   interface = PHY_INTERFACE_MODE_NONE;
+
+   if (interface == PHY_INTERFACE_MODE_NONE)
+   dev_dbg(ethdev, "can't find interface mode, default to NONE\n");
+
+   phy = dm_eth_connect_phy_handle(ethdev, interface);
+
+   if (!phy)
+   return NULL;
+
+   phy->interface = interface;
+
+   return phy;
+}
+
 UCLASS_DRIVER(mdio) = {
.id = UCLASS_MDIO,
.name = "mdio",
-- 
2.17.1

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[U-Boot] [PATCH 2/2] configs: ls1028a: enable CMD_DM

2019-11-01 Thread Alex Marginean
Since at least some of the drivers relevant to LS1028A are now following DM,
it's useful to have dm command enabled by default.

Signed-off-by: Alex Marginean 
---
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 +
 configs/ls1028aqds_tfa_defconfig | 1 +
 configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 1 +
 configs/ls1028ardb_tfa_defconfig | 1 +
 4 files changed, 4 insertions(+)

diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index bd127788eb..0dc44eba94 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -16,6 +16,7 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x200 default_hugepagesz=2m 
hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
 CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index 67c9a82bcd..b690e24c7f 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -15,6 +15,7 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x200 default_hugepagesz=2m 
hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
 CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
index dad782ef6c..c09ff6b69a 100644
--- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
@@ -16,6 +16,7 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x200 default_hugepagesz=2m 
hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
 CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig
index 1fd38ca3d4..35c46d4dd7 100644
--- a/configs/ls1028ardb_tfa_defconfig
+++ b/configs/ls1028ardb_tfa_defconfig
@@ -15,6 +15,7 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x200 default_hugepagesz=2m 
hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
 CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-- 
2.17.1

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[U-Boot] [PATCH 1/2] configs: ls1028a: Resync with savedefconfig

2019-11-01 Thread Alex Marginean
Replace ls1028a defconfig files with the output of savedefconfig

Signed-off-by: Alex Marginean 
---
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 2 --
 configs/ls1028aqds_tfa_defconfig | 2 --
 configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 2 --
 configs/ls1028ardb_tfa_defconfig | 2 --
 4 files changed, 8 deletions(-)

diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index 3170d81aaf..bd127788eb 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -20,7 +20,6 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_PCI=y
-CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_WDT=y
 CONFIG_CMD_CACHE=y
@@ -40,7 +39,6 @@ CONFIG_I2C_MUX_PCA954x=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index 2da7b1d94e..67c9a82bcd 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -19,7 +19,6 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_PCI=y
-CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_WDT=y
 # CONFIG_CMD_SETEXPR is not set
@@ -43,7 +42,6 @@ CONFIG_I2C_MUX_PCA954x=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
index c1e88b5465..dad782ef6c 100644
--- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
@@ -20,7 +20,6 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_PCI=y
-CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_WDT=y
 CONFIG_CMD_CACHE=y
@@ -40,7 +39,6 @@ CONFIG_I2C_MUX_PCA954x=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig
index 5ff34047a7..1fd38ca3d4 100644
--- a/configs/ls1028ardb_tfa_defconfig
+++ b/configs/ls1028ardb_tfa_defconfig
@@ -19,7 +19,6 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_PCI=y
-CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_WDT=y
 # CONFIG_CMD_SETEXPR is not set
@@ -44,7 +43,6 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_HS200_SUPPORT=y
 CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-- 
2.17.1

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[U-Boot] [RFC PATCH v2 1/2] drivers: net: Add a driver for the Felix Ethernet switch on NXP LS1028A

2019-08-23 Thread Alex Marginean
The driver sets up the switch at probe allowing traffic though.  Both the
switch as a whole and the ports are registered as network devices in
U-Boot, although neither supports direct I/O in this version.  Traffic can
originate from SoC though one of the internally linked ENETC interfaces,
external ports can also be used in basic switching mode too.

Signed-off-by: Alex Marginean 
---
 drivers/net/Kconfig |   7 +
 drivers/net/Makefile|   1 +
 drivers/net/fsl_enetc.h |   5 +
 drivers/net/fsl_felix.c | 420 
 4 files changed, 433 insertions(+)
 create mode 100644 drivers/net/fsl_felix.c

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 084e095229..13c065fee6 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -603,4 +603,11 @@ config MDIO_MUX_I2CREG
  an I2C chip.  The board it was developed for uses a mux controlled by
  on-board FPGA which in turn is accessed as a chip over I2C.
 
+config FSL_FELIX
+   bool "LS1028 Felix Ethernet switch"
+   depends on DM_PCI && DM_ETH && DM_MDIO && FSL_ENETC
+   help
+ This driver supports the Ethernet switch integrated in LS1028A NXP
+ SoC.
+
 endif # NETDEVICES
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 71c0889355..96d4a3cdc5 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -81,3 +81,4 @@ obj-y += mscc_eswitch/
 obj-$(CONFIG_HIGMACV300_ETH) += higmacv300.o
 obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o
 obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o
+obj-$(CONFIG_FSL_FELIX) += fsl_felix.o
diff --git a/drivers/net/fsl_enetc.h b/drivers/net/fsl_enetc.h
index 9a36cdad80..29e7781b5e 100644
--- a/drivers/net/fsl_enetc.h
+++ b/drivers/net/fsl_enetc.h
@@ -200,6 +200,11 @@ struct enetc_priv {
 /* PCS replicator block for USXGMII */
 #define ENETC_PCS_DEVAD_REPL   0x1f
 
+#define ENETC_PCS_REPL_LINK_TIMER_10x12
+#define  ENETC_PCS_REPL_LINK_TIMER_1_DEF   0x0003
+#define ENETC_PCS_REPL_LINK_TIMER_20x13
+#define  ENETC_PCS_REPL_LINK_TIMER_2_DEF   0x06a0
+
 /* ENETC external MDIO registers */
 #define ENETC_MDIO_BASE0x1c00
 #define ENETC_MDIO_CFG 0x00
diff --git a/drivers/net/fsl_felix.c b/drivers/net/fsl_felix.c
new file mode 100644
index 00..24c14630e3
--- /dev/null
+++ b/drivers/net/fsl_felix.c
@@ -0,0 +1,420 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Felix ethernet switch driver
+ * Copyright 2018-2019 NXP
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* defines especially around PCS are reused from enetc */
+#include "fsl_enetc.h"
+
+#define FELIX_PORT_DRV_NAME"felix-port"
+
+#define PCI_DEVICE_ID_FELIX_ETHSW  0xEEF0
+#define FELIX_PM_IMDIO_BASE0x8030
+
+/* Max port count, including any internal ports */
+#define FELIX_PORT_COUNT   6
+
+/* Register map for BAR4 */
+#define FELIX_SYS  0x01
+#define FELIX_ES0  0x04
+#define FELIX_IS1  0x05
+#define FELIX_IS2  0x06
+#define FELIX_GMII(port)   (0x10 + (port) * 0x1)
+#define FELIX_QSYS 0x20
+
+#define FELIX_SYS_SYSTEM   (FELIX_SYS + 0x0E00)
+#define  FELIX_SYS_SYSTEM_EN   BIT(0)
+#define FELIX_SYS_RAM_CTRL (FELIX_SYS + 0x0F24)
+#define  FELIX_SYS_RAM_CTRL_INIT   BIT(1)
+
+#define FELIX_ES0_TCAM_CTRL(FELIX_ES0 + 0x03C0)
+#define  FELIX_ES0_TCAM_CTRL_ENBIT(0)
+#define FELIX_IS1_TCAM_CTRL(FELIX_IS1 + 0x03C0)
+#define  FELIX_IS1_TCAM_CTRL_ENBIT(0)
+#define FELIX_IS2_TCAM_CTRL(FELIX_IS2 + 0x03C0)
+#define  FELIX_IS2_TCAM_CTRL_ENBIT(0)
+
+#define FELIX_GMII_CLOCK_CFG(port) (FELIX_GMII(port) + 0x)
+#define  FELIX_GMII_CLOCK_CFG_LINK_1G  1
+#define  FELIX_GMII_CLOCK_CFG_LINK_100M2
+#define  FELIX_GMII_CLOCK_CFG_LINK_10M 3
+#define FELIX_GMII_MAC_ENA_CFG(port)   (FELIX_GMII(port) + 0x001C)
+#define  FELIX_GMII_MAX_ENA_CFG_TX BIT(0)
+#define  FELIX_GMII_MAX_ENA_CFG_RX BIT(4)
+#define FELIX_GMII_MAC_IFG_CFG(port)   (FELIX_GMII(port) + 0x001C + 0x14)
+#define  FELIX_GMII_MAC_IFG_CFG_DEF0x515
+
+#define FELIX_QSYS_SYSTEM  (FELIX_QSYS + 0xF460)
+#define FELIX_QSYS_SYSTEM_SW_PORT_MODE(port)   \
+   (FELIX_QSYS_SYSTEM + 0x20 + (port) * 4)
+#define  FELIX_QSYS_SYSTEM_SW_PORT_ENA BIT(14)
+#define  FELIX_QSYS_SYSTEM_SW_PORT_LOSSY   BIT(9)
+#define  FELIX_QSYS_SYSTEM_SW_PORT_SCH(a)  (((a) & 0x3800) << 11)
+
+/* internal MDIO in BAR0 */
+#define FELIX_PM_IMDIO_BASE0x8030
+
+/* Serdes block on LS1028A */
+#define FELIX_SERDES_BASE  0x1eaL
+#

[U-Boot] [RFC PATCH v2 0/2] Add a driver for the Felix Ethernet switch on NXP LS1028A

2019-08-23 Thread Alex Marginean
The driver sets up the switch during probe making external and internal ports
available to use.  It does not support direct I/O through these switch ports
in this version and I'm not sure that is a feature useful in U-Boot.  Instead
ENETC ethernet interfaces that are internally linked to the switch can be used
after the switch is set up.

This is where the RFC part comes in.  Both the switch as a device and its ports
are probed as ethernet devices.  That's handy as accessors to connect to the PHY
can be used but otherwise they are useful as the user can't ping to these
interfaces.  I'd like to get some feedback on whether this is acceptable or
instead I should use some other structure for describing the switch and its
ports, maybe have a new DM uclass.  Other switch devices are registered as PHYs
but that's not too useful if the external ports of the switch have PHYs of their
own and they need to be driven too.

Using a complete DTS the switch looks like this:

=> dm tree
 Class Index  Probed  DriverName
---

 pci  2  [ + ]   pci_generic_ecam  |-- pcie@1f000
 eth  1  [ + ]   enetc_eth |   |-- enetc-0
 eth  2  [ + ]   enetc_eth |   |-- enetc-1
 eth  3  [ + ]   enetc_eth |   |-- enetc-2
 mdio 5  [ + ]   enetc_mdio|   |-- emdio-3
 pci_generi   0  [   ]   pci_generic_drv   |   |-- pci_3:0.4
 eth  4  [ + ]   felix_ethsw   |   |-- felix_ethsw
 eth  6  [ + ]   felix-port|   |   |-- port@0
 eth  7  [ + ]   felix-port|   |   |-- port@1
 eth  8  [ + ]   felix-port|   |   |-- port@2
 eth  9  [ + ]   felix-port|   |   |-- port@3
 eth 10  [ + ]   felix-port|   |   |-- port@4
 eth 11  [ + ]   felix-port|   |   `-- port@5
 eth  5  [ + ]   enetc_eth |   |-- enetc-6
 pci_generi   1  [   ]   pci_generic_drv   |   `-- pci_3:1f.0

=> mdio list
felix_ethsw:
emdio-3:
mdio@50:
0 - Aquantia AQR412 <--> port@0
1 - Aquantia AQR412 <--> port@1
2 - Aquantia AQR412 <--> port@2
3 - Aquantia AQR412 <--> port@3
mdio@00:
5 - AR8035 <--> enetc-1
mdio@40:
2 - Aquantia AQR112 <--> enetc-0
mdio@60:
mdio@70:

Any feedback is welcome, of course :)

Thank you!
Alex

Depends on https://patchwork.ozlabs.org/project/uboot/list/?series=123813


Changes in v2:
- added empty _stop function for switch ports, stop is not optional,
- added switch port PHYs in RDB board DT
- cosmetic fixes

Alex Marginean (2):
  drivers: net: Add a driver for the Felix Ethernet switch on NXP
LS1028A
  arm: dts: ls1028a: add node for the integrated Ethernet switch

 arch/arm/dts/fsl-ls1028a-rdb.dts |  36 +++
 arch/arm/dts/fsl-ls1028a.dtsi|  31 +++
 drivers/net/Kconfig  |   7 +
 drivers/net/Makefile |   1 +
 drivers/net/fsl_enetc.h  |   5 +
 drivers/net/fsl_felix.c  | 420 +++
 6 files changed, 500 insertions(+)
 create mode 100644 drivers/net/fsl_felix.c

-- 
2.17.1

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