[U-Boot] [PATCH V1 0/1] EXYNOS5: I2C: Add FDT and non-FDT support for I2C
s patch updates the function board_i2c_init() to add support for both FDT and non-FDT for I2C, and initialise the I2C channels. Amar (1): EXYNOS5: I2C: Added FDT and non-FDT support for I2C drivers/i2c/s3c24x0_i2c.c | 12 ++-- 1 file changed, 10 insertions(+), 2 deletions(-) -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V1 1/1] EXYNOS5: I2C: Add FDT and non-FDT support for I2C
This patch updates the function board_i2c_init() to add support for both
FDT and non-FDT for I2C, and initialise the I2C channels.
Signed-off-by: Amar amarendra...@samsung.com
---
drivers/i2c/s3c24x0_i2c.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index 46d2506..5234ff6 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -515,11 +515,12 @@ int i2c_write(uchar chip, uint addr, int alen, uchar
*buffer, int len)
len) != 0);
}
-#ifdef CONFIG_OF_CONTROL
void board_i2c_init(const void *blob)
{
+ int i;
+#ifdef CONFIG_OF_CONTROL
int node_list[CONFIG_MAX_I2C_NUM];
- int count, i;
+ int count;
count = fdtdec_find_aliases_for_id(blob, i2c,
COMPAT_SAMSUNG_S3C2440_I2C, node_list,
@@ -539,8 +540,15 @@ void board_i2c_init(const void *blob)
bus-bus_num = i2c_busses++;
exynos_pinmux_config(bus-id, 0);
}
+#else
+ for (i = 0; i CONFIG_MAX_I2C_NUM; i++) {
+ exynos_pinmux_config((PERIPH_ID_I2C0 + i),
+PINMUX_FLAG_NONE);
+ }
+#endif
}
+#ifdef CONFIG_OF_CONTROL
static struct s3c24x0_i2c_bus *get_bus(unsigned int bus_idx)
{
if (bus_idx i2c_busses)
--
1.8.0
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[U-Boot] [PATCH V8 0/9] EXYNOS5: Enable DWMMC, add FDT support for DWMMC and
This patch set enables and initialises DWMMC for Exynos5250 on SMDK5250. Adds driver changes required for DWMMC. Adds FDT support for DWMMC. Adds EMMC boot support for SMDK5250. This patch set is based on: EXYNOS: mmc: support DesignWare Controller for Samsung-SoC, which is merged in u-boot-mmc. Exynos: clock: support get_mmc_clk for exynos. Add DT based ethernet driver for SMDK5250. SMDK5250: Add FDT support present at the following link http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/149991 Changes since V1: 1)Corrected in response to review comments. 2)Created separate board files for FDT and non-FDT versions. 3)Added binding file for DWMMC device node. 4)Removed the propname 'index' from device node. 5)Prefixed the vendor name 'samsung' before propname in device node. 6)Ensured to have same signature for the function exynos_dwmci_init() for both FDT and non-FDT versions. 7)EMMC clock setting has been moved from spl_boot.c to clock_init.c. Changes since V2: 1)Updation of commit message and resubmition of proper patch set. Changes since V3: 1)Updated to use the macro DWMCI_CTRL_SEND_AS_CCSD instead of the hard coded value (1 10). 2)In the file exynos_dw_mmc.c, replaced the new function exynos5_mmc_set_clk_div() with the existing function set_mmc_clk(). set_mmc_clk() will do the purpose. 3)In the file exynos_dw_mmc.c, computation of FSYS block clock divisor (pre-ratio) value is added. 4)Removed the new function exynos5_mmc_set_clk_div() from clock.c. Changes since V4: 1)Updated the function dwmci_send_cmd() to use get_timer() instead of using mdelay(1). 2)Replaced the function call 'exynos_dwmmc_init(0, 8);' with the function exynos_dwmmc_add_port() in smdk5250.c. 3)The function get_irom_func(int index) has been added to avoid type casting at many places. 4)Used the generic function mmc_boot_part_access() instead of two functions mmc_boot_open() and mmc_boot_close(). By doing so user can specify which boot partition to be accessed (opened / closed). Changes since V5: 1)Added the 'removable' flag to mmc device node. 2)Changed the mmc clock value from 50MHz to 52MHz in the function exynos_dwmci_add_port() present in file drivers/mmc/exynos_dw_mmc.c. 3)Enabled CONFIG_LCD only for non-FDT operation. 4)Removed the function call i2c_init() present inside the function board_i2c_init(). Changes since V6: 1)Re-based to the patch SMDK5250: Add PMIC voltage settings. Changes since V7: 1)Re-based to the patch Exynos: pwm: Remove dead code of function exynos5_get_pwm_clk. 2)In file dw_mmc.c, updated the function dwmci_setup_bus() to return 0 if (freq == 0).This is to avoid the run time exception raise:Signal # 8 caught. 3)In the files drivers/mmc/mmc.c and common/cmd_mmc.c, the piece of code involved in EMMC open/close and resize of EMMC boot partition has been made conditional and is enabled only if the macro CONFIG_SUPPORT_EMMC_BOOT is defined. 4)The macros FSYS1_MMC0_DIV_MASK and FSYS1_MMC0_DIV_VAL are made local to file clock_init.c. Amar (9): FDT: Add compatible string for DWMMC EXYNOS5: FDT: Add DWMMC device node data DWMMC: Initialise dwmci and resolve EMMC read write issues EXYNOS5: DWMMC: Added FDT support for DWMMC EXYNOS5: DWMMC: Initialise the local variable to avoid unwanted results. SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDT MMC: APIs to support resize of EMMC boot partition SMDK5250: Enable EMMC booting COMMON: MMC: Command to support EMMC booting and to resize EMMC boot partition arch/arm/cpu/armv7/exynos/clock.c | 4 +- arch/arm/dts/exynos5250.dtsi | 33 +++ arch/arm/include/asm/arch-exynos/dwmmc.h | 11 +- board/samsung/dts/exynos5250-smdk5250.dts | 24 ++ board/samsung/smdk5250/Makefile | 4 + board/samsung/smdk5250/clock_init.c | 18 ++ board/samsung/smdk5250/clock_init.h | 5 + board/samsung/smdk5250/exynos5-dt.c | 423 ++ board/samsung/smdk5250/smdk5250.c | 223 board/samsung/smdk5250/spl_boot.c | 52 +++- common/cmd_mmc.c | 110 +++- doc/device-tree-bindings/exynos/dwmmc.txt | 54 drivers/mmc/dw_mmc.c | 28 +- drivers/mmc/exynos_dw_mmc.c | 127 - drivers/mmc/mmc.c | 134 ++ drivers/video/exynos_fb.c | 4 +- include/configs/exynos5250-dt.h | 8 + include/dwmmc.h | 3 + include/fdtdec.h | 1 + include/mmc.h | 26 ++ lib/fdtdec.c
[U-Boot] [PATCH V8 1/9] FDT: Add compatible string for DWMMC
Add required compatible information for DWMMC driver.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
---
Changes since V1:
No change.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
No change.
Changes since V5:
No change.
Changes since V6:
No change.
Changes since V7:
No change.
include/fdtdec.h | 1 +
lib/fdtdec.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index a83b160..5ab3d59 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -89,6 +89,7 @@ enum fdt_compat_id {
COMPAT_SAMSUNG_EXYNOS5_DP, /* Exynos Display port controller */
COMPAT_MAXIM_MAX77686_PMIC, /* MAX77686 PMIC */
COMPAT_MAXIM_98095_CODEC, /* MAX98095 Codec */
+ COMPAT_SAMSUNG_EXYNOS5_DWMMC, /* Exynos5 DWMMC controller */
COMPAT_COUNT,
};
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 0f34bdc..c187133 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -64,6 +64,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(SAMSUNG_EXYNOS5_DP, samsung,exynos5-dp),
COMPAT(MAXIM_MAX77686_PMIC, maxim,max77686_pmic),
COMPAT(MAXIM_98095_CODEC, maxim,max98095-codec),
+ COMPAT(SAMSUNG_EXYNOS5_DWMMC, samsung,exynos5250-dwmmc),
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)
--
1.8.0
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[U-Boot] [PATCH V8 2/9] EXYNOS5: FDT: Add DWMMC device node data
This patch adds DWMMC device node data for exynos5.
This patch also adds binding file for DWMMC device node.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since V1:
1)Added binding file for DWMMC device node at the location
doc/device-tree-bindings/exynos/dwmmc.txt.
2)Removed the propname 'index' from device node.
3)Prefixed the vendor name 'samsung' before propname in device node.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)Updated the doc/device-tree-bindings/exynos/dwmmc.txt with more
information regarding the property 'samsung,timing'.
2)Replaced the name 'dwmmc' with 'mmc'.
Changes since V5:
1)Added the 'removable' flag to mmc device node.
Changes since V6:
No change.
Changes since V7:
No change.
arch/arm/dts/exynos5250.dtsi | 33 +++
board/samsung/dts/exynos5250-smdk5250.dts | 24 ++
doc/device-tree-bindings/exynos/dwmmc.txt | 54 +++
3 files changed, 111 insertions(+)
create mode 100644 doc/device-tree-bindings/exynos/dwmmc.txt
diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index df4b231..cee4fe8 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -169,4 +169,37 @@
#address-cells = 1;
#size-cells = 1;
};
+
+ mmc@1220 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1220 0x1000;
+ interrupts = 0 75 0;
+ };
+
+ mmc@1221 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1221 0x1000;
+ interrupts = 0 76 0;
+ };
+
+ mmc@1222 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1222 0x1000;
+ interrupts = 0 77 0;
+ };
+
+ mmc@1223 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1223 0x1000;
+ interrupts = 0 78 0;
+ };
+
};
diff --git a/board/samsung/dts/exynos5250-smdk5250.dts
b/board/samsung/dts/exynos5250-smdk5250.dts
index 8da973b..93375a6 100644
--- a/board/samsung/dts/exynos5250-smdk5250.dts
+++ b/board/samsung/dts/exynos5250-smdk5250.dts
@@ -30,6 +30,10 @@
spi2 = /spi@12d4;
spi3 = /spi@131a;
spi4 = /spi@131b;
+ mmc0 = /mmc@1220;
+ mmc1 = /mmc@1221;
+ mmc2 = /mmc@1222;
+ mmc3 = /mmc@1223;
};
sromc@1225 {
@@ -119,4 +123,24 @@
samsung,ycbcr-coeff = 0;
samsung,color-depth = 1;
};
+
+ mmc@1220 {
+ samsung,bus-width = 8;
+ samsung,timing = 1 3 3;
+ samsung,removable = 0;
+ };
+
+ mmc@1221 {
+ status = disabled;
+ };
+
+ mmc@1222 {
+ samsung,bus-width = 4;
+ samsung,timing = 1 2 3;
+ samsung,removable = 1;
+ };
+
+ mmc@1223 {
+ status = disabled;
+ };
};
diff --git a/doc/device-tree-bindings/exynos/dwmmc.txt
b/doc/device-tree-bindings/exynos/dwmmc.txt
new file mode 100644
index 000..566da3b
--- /dev/null
+++ b/doc/device-tree-bindings/exynos/dwmmc.txt
@@ -0,0 +1,54 @@
+* Exynos 5250 DWC_mobile_storage
+
+The Exynos 5250 provides DWC_mobile_storage interface which supports
+. Embedded Multimedia Cards (EMMC-version 4.5)
+. Secure Digital memory (SD mem-version 2.0)
+. Secure Digital I/O (SDIO-version 3.0)
+. Consumer Electronics Advanced Transport Architecture (CE-ATA-version 1.1)
+
+The Exynos 5250 DWC_mobile_storage provides four channels.
+SOC specific and Board specific properties are channel specific.
+
+Required SoC Specific Properties:
+
+- compatible: should be
+ - samsung,exynos5250-dwmmc: for exynos5250 platforms
+
+- reg: physical base address of the controller and length of memory mapped
+ region.
+
+- interrupts: The interrupt number to the cpu.
+
+Required Board Specific Properties:
+
+- #address-cells: should be 1.
+- #size-cells: should be 0.
+- samsung,bus-width: The width of the bus used to interface the devices
+ supported by DWC_mobile_storage (SD-MMC/EMMC/SDIO).
+ . Typically the bus width is 4 or 8.
+- samsung,timing: The timing values to be written
[U-Boot] [PATCH V8 3/9] DWMMC: Initialise dwmci and resolve EMMC read write issues
This patch enumerates dwmci and set auto stop command during
dwmci initialisation.
EMMC read/write is not happening in current implementation
due to improper fifo size computation. Hence modified the fifo size
computation to resolve EMMC read write issues.
Signed-off-by: Amar amarendra...@samsung.com
---
Changes since V1:
1)Created the macros RX_WMARK_SHIFT and RX_WMARK_MASK in header file.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
1)Updated to use the macro DWMCI_CTRL_SEND_AS_CCSD instead of
the hard coded value (1 10).
Changes since V4:
1)Updated the function dwmci_send_cmd() to use get_timer() instead
of using mdelay(1).
Changes since V5:
1)Updated in response to review comments.
Changes since V6:
No change.
Changes since V7:
1)Updated the function dwmci_setup_bus() to return 0 if (freq == 0).
This is to avoid the run time exception raise:Signal # 8 caught.
drivers/mmc/dw_mmc.c | 28 ++--
1 file changed, 18 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 4070d4e..963a515 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -129,13 +129,13 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
unsigned int timeout = 10;
u32 retry = 1;
u32 mask, ctrl;
+ ulong start = get_timer(0);
while (dwmci_readl(host, DWMCI_STATUS) DWMCI_BUSY) {
- if (timeout == 0) {
+ if (get_timer(start) timeout) {
printf(Timeout on data busy\n);
return TIMEOUT;
}
- timeout--;
}
dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL);
@@ -143,7 +143,6 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
if (data)
dwmci_prepare_data(host, data);
-
dwmci_writel(host, DWMCI_CMDARG, cmd-cmdarg);
if (data)
@@ -231,9 +230,8 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32
freq)
int timeout = 1;
unsigned long sclk;
- if (freq == host-clock)
+ if ((freq == host-clock) || (freq == 0))
return 0;
-
/*
* If host-mmc_clk didn't define,
* then assume that host-bus_hz is source clock value.
@@ -314,7 +312,7 @@ static void dwmci_set_ios(struct mmc *mmc)
static int dwmci_init(struct mmc *mmc)
{
struct dwmci_host *host = (struct dwmci_host *)mmc-priv;
- u32 fifo_size, fifoth_val;
+ u32 fifo_size, fifoth_val, ier;
dwmci_writel(host, DWMCI_PWREN, 1);
@@ -323,6 +321,14 @@ static int dwmci_init(struct mmc *mmc)
return -1;
}
+ /* Enumerate at 400KHz */
+ dwmci_setup_bus(host, mmc-f_min);
+
+ /* Set auto stop command */
+ ier = dwmci_readl(host, DWMCI_CTRL);
+ ier |= DWMCI_CTRL_SEND_AS_CCSD;
+ dwmci_writel(host, DWMCI_CTRL, ier);
+
dwmci_writel(host, DWMCI_RINTSTS, 0x);
dwmci_writel(host, DWMCI_INTMASK, 0);
@@ -332,11 +338,13 @@ static int dwmci_init(struct mmc *mmc)
dwmci_writel(host, DWMCI_BMOD, 1);
fifo_size = dwmci_readl(host, DWMCI_FIFOTH);
- if (host-fifoth_val)
+ fifo_size = ((fifo_size RX_WMARK_MASK) RX_WMARK_SHIFT) + 1;
+ if (host-fifoth_val) {
fifoth_val = host-fifoth_val;
- else
- fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size/2 -1) |
- TX_WMARK(fifo_size/2);
+ } else {
+ fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) |
+ TX_WMARK(fifo_size / 2);
+ }
dwmci_writel(host, DWMCI_FIFOTH, fifoth_val);
dwmci_writel(host, DWMCI_CLKENA, 0);
--
1.8.0
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[U-Boot] [PATCH V8 5/9] EXYNOS5: DWMMC: Initialise the local variable to avoid unwanted results.
This patch initialises the local variable 'shift' to zero. The uninitialised local variable 'shift' had garbage value and was resulting in unwnated results in the functions exynos5_get_mmc_clk() and exynos4_get_mmc_clk(). Signed-off-by: Amar amarendra...@samsung.com Acked-by: Simon Glass s...@chromium.org --- Changes since V1: 1)Updated the function exynos5_mmc_set_clk_div() to receive 'device_i'd as input parameter instead of 'index'. Changes since V2: 1)Updation of commit message and resubmition of proper patch set. Changes since V3: 1)Removed the new API exynos5_mmc_set_clk_div() from clock.c, because existing API set_mmc_clk() can be used to set mmc clock. Changes since V4: 1)Updated the subject line to reflect the changes present in this patch. 2)Changes of the file arch/arm/include/asm/arch-exynos/clk.h which were present in this patch, have been moved out of this patch. Changes since V5: No change. Changes since V6: No change. Changes since V7: No change. arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 223660a..cf3247a 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -613,7 +613,7 @@ static unsigned long exynos4_get_mmc_clk(int dev_index) (struct exynos4_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel, ratio, pre_ratio; - int shift; + int shift = 0; sel = readl(clk-src_fsys); sel = (sel (dev_index 2)) 0xf; @@ -662,7 +662,7 @@ static unsigned long exynos5_get_mmc_clk(int dev_index) (struct exynos5_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel, ratio, pre_ratio; - int shift; + int shift = 0; sel = readl(clk-src_fsys); sel = (sel (dev_index 2)) 0xf; -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V8 4/9] EXYNOS5: DWMMC: Added FDT support for DWMMC
This patch adds FDT support for DWMMC, by reading the DWMMC node data
from the device tree and initialising DWMMC channels as per data
obtained from the node.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since V1:
1)Updated code to have same signature for the function
exynos_dwmci_init() for both FDT and non-FDT versions.
2)Updated code to pass device_id parameter to the function
exynos5_mmc_set_clk_div() instead of index.
3)Updated code to decode the value of samsung,width from FDT.
4)Channel index is computed instead of getting from FDT.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
1)Replaced the new function exynos5_mmc_set_clk_div() with the
existing function set_mmc_clk(). set_mmc_clk() will do the purpose.
2)Computation of FSYS block clock divisor (pre-ratio) is added.
Changes since V4:
1)Replaced unsigned int exynos_dwmmc_init(int index, int bus_width)
with
int exynos_dwmci_add_port(int, u32, inth, u32)
i)exynos_dwmmc_add_port() will be used by non-FDT boards.
ii)In FDT case, exynos_dwmmc_init(const void *blob) will use
exynos_dwmmc_add_port() for every channel enabled in device
node.
2)Changed the computation method of mmc clock divisor.
3)Updated exynos_dwmmc_init() to compute the 'clksel_val' within the
function.
Changes since V5:
1)Updated in response to review comments and changed the mmc clock value
from 50MHz to 52MHz.
Changes since V6:
No change.
Changes since V7:
No change.
arch/arm/include/asm/arch-exynos/dwmmc.h | 11 +--
drivers/mmc/exynos_dw_mmc.c | 127 ---
include/dwmmc.h | 3 +
3 files changed, 124 insertions(+), 17 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/dwmmc.h
b/arch/arm/include/asm/arch-exynos/dwmmc.h
index 8acdf9b..3b147b8 100644
--- a/arch/arm/include/asm/arch-exynos/dwmmc.h
+++ b/arch/arm/include/asm/arch-exynos/dwmmc.h
@@ -27,10 +27,7 @@
#define DWMCI_SET_DRV_CLK(x) ((x) 16)
#define DWMCI_SET_DIV_RATIO(x) ((x) 24)
-int exynos_dwmci_init(u32 regbase, int bus_width, int index);
-
-static inline unsigned int exynos_dwmmc_init(int index, int bus_width)
-{
- unsigned int base = samsung_get_base_mmc() + (0x1 * index);
- return exynos_dwmci_init(base, bus_width, index);
-}
+#ifdef CONFIG_OF_CONTROL
+int exynos_dwmmc_init(const void *blob);
+#endif
+int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel);
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 72a31b7..4238dd9 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -19,39 +19,146 @@
*/
#include common.h
-#include malloc.h
#include dwmmc.h
+#include fdtdec.h
+#include libfdt.h
+#include malloc.h
#include asm/arch/dwmmc.h
#include asm/arch/clk.h
+#include asm/arch/pinmux.h
-static char *EXYNOS_NAME = EXYNOS DWMMC;
+#defineDWMMC_MAX_CH_NUM4
+#defineDWMMC_MAX_FREQ 5200
+#defineDWMMC_MIN_FREQ 40
+#defineDWMMC_MMC0_CLKSEL_VAL 0x03030001
+#defineDWMMC_MMC2_CLKSEL_VAL 0x03020001
+/*
+ * Function used as callback function to initialise the
+ * CLKSEL register for every mmc channel.
+ */
static void exynos_dwmci_clksel(struct dwmci_host *host)
{
- u32 val;
- val = DWMCI_SET_SAMPLE_CLK(DWMCI_SHIFT_0) |
- DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) | DWMCI_SET_DIV_RATIO(0);
+ dwmci_writel(host, DWMCI_CLKSEL, host-clksel_val);
+}
- dwmci_writel(host, DWMCI_CLKSEL, val);
+unsigned int exynos_dwmci_get_clk(int dev_index)
+{
+ return get_mmc_clk(dev_index);
}
-int exynos_dwmci_init(u32 regbase, int bus_width, int index)
+/*
+ * This function adds the mmc channel to be registered with mmc core.
+ * index - mmc channel number.
+ * regbase - register base address of mmc channel specified in 'index'.
+ * bus_width - operating bus width of mmc channel specified in 'index'.
+ * clksel -value to be written into CLKSEL register in case of FDT.
+ * NULL in case od non-FDT.
+ */
+int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel)
{
struct dwmci_host *host = NULL;
+ unsigned int div;
+ unsigned long freq, sclk;
host = malloc(sizeof(struct dwmci_host));
if (!host) {
printf(dwmci_host malloc fail!\n);
return 1;
}
+ /* request mmc clock vlaue of 52MHz. */
+ freq = 5200;
+ sclk = get_mmc_clk(index);
+ div = DIV_ROUND_UP(sclk, freq);
+ /* set the clock divisor for mmc */
+ set_mmc_clk
[U-Boot] [PATCH V8 6/9] SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDT
This patch enables and initialises DWMMC for SMDK5250.
Supports both FDT and non-FDT. This patch creates a new file
'exynos5-dt.c' meant for FDT support.
exynos5-dt.c: This file shall contain all code which supports FDT.
Any addition of FDT support for any module needs to be
added in this file.
smdk5250.c: This file shall contain the code which supports non-FDT.
version. Any addition of non-FDT support for any module
needs to be added in this file.
May be, the file smdk5250.c can be removed in near
future
when non-FDT is not required.
The Makefile is updated to compile only one of the files
exynos5-dt.c / smdk5250.c based on FDT configuration.
NOTE:
Please note that all additions corresponding to FDT need to be added into the
file exynos5-dt.c.
At same time if non-FDT support is required then add the corresponding
updations into smdk5250.c.
Signed-off-by: Amar amarendra...@samsung.com
---
Changes since V1:
1)A new file 'exynos5-dt.c' is created meant for FDT support
2)Makefile is updated to compile only one of the files
exynos5-dt.c / smdk5250.c based on FDT configuration
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)Replaced the function call 'exynos_dwmmc_init(0, 8);' with the
function exynos_dwmmc_add_port() in smdk5250.c.
2)dram_init() is updated to use for loop to compute the ram size.
3)dram_init_banksize() is updated to use for loop to initialise
the dram bank size.
4)board_uart_init() is updated to use for loop to initialise UARTS.
5)In non-FDT case NULL is passed as parameter to board_i2c_init().
Changes since V5:
1)Enabled CONFIG_LCD only for non-FDT operation.
Changes since V6:
1)Re-based.
Changes since V7:
1)Re-based.
2)Because of creation of new file 'exynos5-dt.c' meant for FDT support,
the exynos_fb.c had to be updated to support non-FDT and FDT for LCD.
If exynos_fb.c is not updated as per this patch the compilation fails.
3)Added the macro CONFIG_SUPPORT_EMMC_BOOT in exynos5250-dt.h.
board/samsung/smdk5250/Makefile | 4 +
board/samsung/smdk5250/exynos5-dt.c | 423
board/samsung/smdk5250/smdk5250.c | 223 +--
drivers/video/exynos_fb.c | 4 +-
include/configs/exynos5250-dt.h | 8 +
5 files changed, 493 insertions(+), 169 deletions(-)
create mode 100644 board/samsung/smdk5250/exynos5-dt.c
diff --git a/board/samsung/smdk5250/Makefile b/board/samsung/smdk5250/Makefile
index 47c6a5a..ecca9f3 100644
--- a/board/samsung/smdk5250/Makefile
+++ b/board/samsung/smdk5250/Makefile
@@ -32,8 +32,12 @@ COBJS+= tzpc_init.o
COBJS += smdk5250_spl.o
ifndef CONFIG_SPL_BUILD
+ifdef CONFIG_OF_CONTROL
+COBJS += exynos5-dt.o
+else
COBJS += smdk5250.o
endif
+endif
ifdef CONFIG_SPL_BUILD
COBJS += spl_boot.o
diff --git a/board/samsung/smdk5250/exynos5-dt.c
b/board/samsung/smdk5250/exynos5-dt.c
new file mode 100644
index 000..78ef424
--- /dev/null
+++ b/board/samsung/smdk5250/exynos5-dt.c
@@ -0,0 +1,423 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include fdtdec.h
+#include asm/io.h
+#include errno.h
+#include i2c.h
+#include netdev.h
+#include spi.h
+#include asm/arch/cpu.h
+#include asm/arch/dwmmc.h
+#include asm/arch/gpio.h
+#include asm/arch/mmc.h
+#include asm/arch/pinmux.h
+#include asm/arch/power.h
+#include asm/arch/sromc.h
+#include power/pmic.h
+#include power/max77686_pmic.h
+#include tmu.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined CONFIG_EXYNOS_TMU
+/*
+ * Boot Time Thermal Analysis for SoC temperature threshold breach
+ */
+static void boot_temp_check(void)
+{
+ int temp;
+
+ switch (tmu_monitor(temp)) {
+ /* Status TRIPPED ans WARNING means corresponding threshold breach */
+ case TMU_STATUS_TRIPPED:
+ puts(EXYNOS_TMU
[U-Boot] [PATCH V8 7/9] MMC: APIs to support resize of EMMC boot partition
This patch adds APIs to access(open / close) and to resize boot partiton of
EMMC.
Signed-off-by: Amar amarendra...@samsung.com
---
Changes since V1:
New patch.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)Replaced the functions mmc_boot_open() mmc_boot_close() with a
single function mmc_boot_part_access().
Changes since V5:
1)Updated in response to review comments.
Changes since V6:
1)Added spaces around operator, in response to review comments.
Changes since V7:
1)In the file drivers/mmc/mmc.c, the piece of code involved in
open/close and resize of EMMC boot partition has been made conditional
and is enabled only if the macro CONFIG_SUPPORT_EMMC_BOOT is defined.
drivers/mmc/mmc.c | 134 ++
include/mmc.h | 26 +++
2 files changed, 160 insertions(+)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index d732581..a6a04e6 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1352,3 +1352,137 @@ int mmc_initialize(bd_t *bis)
return 0;
}
+
+#ifdef CONFIG_SUPPORT_EMMC_BOOT
+/*
+ * This function changes the size of boot partition and the size of rpmb
+ * partition present on EMMC devices.
+ *
+ * Input Parameters:
+ * struct *mmc: pointer for the mmc device strcuture
+ * bootsize: size of boot partition
+ * rpmbsize: size of rpmb partition
+ *
+ * Returns 0 on success.
+ */
+
+int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
+ unsigned long rpmbsize)
+{
+ int err;
+ struct mmc_cmd cmd;
+
+ /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = MMC_CMD62_ARG1;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error1 = %d\n, err);
+ return err;
+ }
+
+ /* Boot partition changing mode */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = MMC_CMD62_ARG2;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error2 = %d\n, err);
+ return err;
+ }
+ /* boot partition size is multiple of 128KB */
+ bootsize = (bootsize * 1024) / 128;
+
+ /* Arg: boot partition size */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = bootsize;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error3 = %d\n, err);
+ return err;
+ }
+ /* RPMB partition size is multiple of 128KB */
+ rpmbsize = (rpmbsize * 1024) / 128;
+ /* Arg: RPMB partition size */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = rpmbsize;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error4 = %d\n, err);
+ return err;
+ }
+ return 0;
+}
+
+/*
+ * This function shall form and send the commands to open / close the
+ * boot partition specified by user.
+ *
+ * Input Parameters:
+ * ack: 0x0 - No boot acknowledge sent (default)
+ * 0x1 - Boot acknowledge sent during boot operation
+ * part_num: User selects boot data that will be sent to master
+ * 0x0 - Device not boot enabled (default)
+ * 0x1 - Boot partition 1 enabled for boot
+ * 0x2 - Boot partition 2 enabled for boot
+ * access: User selects partitions to access
+ * 0x0 : No access to boot partition (default)
+ * 0x1 : R/W boot partition 1
+ * 0x2 : R/W boot partition 2
+ * 0x3 : R/W Replay Protected Memory Block (RPMB)
+ *
+ * Returns 0 on success.
+ */
+int mmc_boot_part_access(struct mmc *mmc, u32 ack, u32 part_num, u32 access)
+{
+ int err;
+ struct mmc_cmd cmd;
+
+ /* Boot ack enable, boot partition enable , boot partition access */
+ cmd.cmdidx = MMC_CMD_SWITCH;
+ cmd.resp_type = MMC_RSP_R1b;
+
+ cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE 24) |
+ (EXT_CSD_PART_CONF 16) |
+ ((EXT_CSD_BOOT_ACK(ack) |
+ EXT_CSD_BOOT_PART_NUM(part_num) |
+ EXT_CSD_PARTITION_ACCESS(access)) 8);
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ if (access) {
+ debug(mmc boot partition#%d open fail:Error1 = %d\n,
+ part_num, err);
+ } else {
+ debug(mmc boot partition#%d close fail:Error = %d\n,
+ part_num, err);
+ }
+ return err
[U-Boot] [PATCH V8 8/9] SMDK5250: Enable EMMC booting
This patch adds support for EMMC booting on SMDK5250.
Signed-off-by: Amar amarendra...@samsung.com
---
Changes since V1:
1)Updated spl_boot.c file to maintain irom pointer table
instead of using the #define values defined in header file.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)The function get_irom_func(int index) has been added to avoid
type casting at many places.
2)The changes to file arch/arm/include/asm/arch-exynos/clk.h are
included in this patch file.
Changes since V5:
No change.
Changes since V6:
No change.
Changes since V7:
1)The macros FSYS1_MMC0_DIV_MASK and FSYS1_MMC0_DIV_VAL are made
local to file clock_init.c.
board/samsung/smdk5250/clock_init.c | 18 +
board/samsung/smdk5250/clock_init.h | 5
board/samsung/smdk5250/spl_boot.c | 52 -
3 files changed, 69 insertions(+), 6 deletions(-)
diff --git a/board/samsung/smdk5250/clock_init.c
b/board/samsung/smdk5250/clock_init.c
index 5b9e82f..b288e66 100644
--- a/board/samsung/smdk5250/clock_init.c
+++ b/board/samsung/smdk5250/clock_init.c
@@ -28,10 +28,14 @@
#include asm/arch/clk.h
#include asm/arch/clock.h
#include asm/arch/spl.h
+#include asm/arch/dwmmc.h
#include clock_init.h
#include setup.h
+#define FSYS1_MMC0_DIV_MASK0xff0f
+#define FSYS1_MMC0_DIV_VAL 0x0701
+
DECLARE_GLOBAL_DATA_PTR;
struct arm_clk_ratios arm_clk_ratios[] = {
@@ -664,3 +668,17 @@ void clock_init_dp_clock(void)
/* We run DP at 267 Mhz */
setbits_le32(clk-div_disp1_0, CLK_DIV_DISP1_0_FIMD1);
}
+
+/*
+ * Set clock divisor value for booting from EMMC.
+ * Set DWMMC channel-0 clk div to operate mmc0 device at 50MHz.
+ */
+void emmc_boot_clk_div_set(void)
+{
+ struct exynos5_clock *clk = (struct exynos5_clock *)EXYNOS5_CLOCK_BASE;
+ unsigned int div_mmc;
+
+ div_mmc = readl((unsigned int) clk-div_fsys1) ~FSYS1_MMC0_DIV_MASK;
+ div_mmc |= FSYS1_MMC0_DIV_VAL;
+ writel(div_mmc, (unsigned int) clk-div_fsys1);
+}
diff --git a/board/samsung/smdk5250/clock_init.h
b/board/samsung/smdk5250/clock_init.h
index f751bcb..20a1d47 100644
--- a/board/samsung/smdk5250/clock_init.h
+++ b/board/samsung/smdk5250/clock_init.h
@@ -146,4 +146,9 @@ struct mem_timings *clock_get_mem_timings(void);
* Initialize clock for the device
*/
void system_clock_init(void);
+
+/*
+ * Set clock divisor value for booting from EMMC.
+ */
+void emmc_boot_clk_div_set(void);
#endif
diff --git a/board/samsung/smdk5250/spl_boot.c
b/board/samsung/smdk5250/spl_boot.c
index d8f3c1e..fa2c0b2 100644
--- a/board/samsung/smdk5250/spl_boot.c
+++ b/board/samsung/smdk5250/spl_boot.c
@@ -23,15 +23,42 @@
#includecommon.h
#includeconfig.h
+#include asm/arch-exynos/dmc.h
+#include asm/arch/clock.h
+#include asm/arch/clk.h
+
+#include clock_init.h
+
+/* Index into irom ptr table */
+enum index {
+ MMC_INDEX,
+ EMMC44_INDEX,
+ EMMC44_END_INDEX,
+ SPI_INDEX,
+};
+
+/* IROM Function Pointers Table */
+u32 irom_ptr_table[] = {
+ [MMC_INDEX] = 0x02020030, /* iROM Function Pointer-SDMMC boot */
+ [EMMC44_INDEX] = 0x02020044,/* iROM Function Pointer-EMMC4.4 boot*/
+ [EMMC44_END_INDEX] = 0x02020048,/* iROM Function Pointer
+ -EMMC4.4 end boot operation */
+ [SPI_INDEX] = 0x02020058, /* iROM Function Pointer-SPI boot */
+ };
+
enum boot_mode {
BOOT_MODE_MMC = 4,
BOOT_MODE_SERIAL = 20,
+ BOOT_MODE_EMMC = 8, /* EMMC4.4 */
/* Boot based on Operating Mode pin settings */
BOOT_MODE_OM = 32,
BOOT_MODE_USB, /* Boot using USB download */
};
- typedef u32 (*spi_copy_func_t)(u32 offset, u32 nblock, u32 dst);
+void *get_irom_func(int index)
+{
+ return (void *)*(u32 *)irom_ptr_table[index];
+}
/*
* Copy U-boot from mmc to RAM:
@@ -40,23 +67,36 @@ enum boot_mode {
*/
void copy_uboot_to_ram(void)
{
- spi_copy_func_t spi_copy;
enum boot_mode bootmode;
- u32 (*copy_bl2)(u32, u32, u32);
-
+ u32 (*spi_copy)(u32 offset, u32 nblock, u32 dst);
+ u32 (*copy_bl2)(u32 offset, u32 nblock, u32 dst);
+ u32 (*copy_bl2_from_emmc)(u32 nblock, u32 dst);
+ void (*end_bootop_from_emmc)(void);
+ /* read Operation Mode ststus register to find the bootmode */
bootmode = readl(EXYNOS5_POWER_BASE) OM_STAT;
switch (bootmode) {
case BOOT_MODE_SERIAL:
- spi_copy = *(spi_copy_func_t *)EXYNOS_COPY_SPI_FNPTR_ADDR;
+ spi_copy = get_irom_func(SPI_INDEX);
spi_copy(SPI_FLASH_UBOOT_POS, CONFIG_BL2_SIZE,
CONFIG_SYS_TEXT_BASE);
break;
case BOOT_MODE_MMC:
- copy_bl2 = (void
[U-Boot] [PATCH V8 9/9] COMMON: MMC: Command to support EMMC booting and to resize EMMC boot partition
This patch adds commands to access(open/close) and resize boot partitions on
EMMC.
Signed-off-by: Amar amarendra...@samsung.com
---
Changes since V1:
1)Combined the common piece of code between 'open' and 'close'
operations.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)Added a new funtion boot_part_access() to combine the common parts of
'mmc open' and 'mmc close' functionalities.
2)Used the generic function mmc_boot_part_access() instead of
two functions mmc_boot_open() and mmc_boot_close(). By doing so user
can specify which boot partition to be accessed (opened / closed).
Changes since V5:
1)Updated minor nits in response to review comments.
Changes since V6:
No change.
Changes since V7:
1)The piece of code involved in open/close and resize of EMMC boot
partition has been made conditional and is enabled only if the macro
CONFIG_SUPPORT_EMMC_BOOT is defined.
common/cmd_mmc.c | 110 ++-
1 file changed, 108 insertions(+), 2 deletions(-)
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 8c53a10..c5f60a2 100644
--- a/common/cmd_mmc.c
+++ b/common/cmd_mmc.c
@@ -147,6 +147,36 @@ U_BOOT_CMD(
- display info of the current MMC device
);
+#ifdef CONFIG_SUPPORT_EMMC_BOOT
+static int boot_part_access(struct mmc *mmc, u32 ack, u32 part_num, u32 access)
+{
+ int err;
+ err = mmc_boot_part_access(mmc, ack, part_num, access);
+
+ if ((err == 0) (access != 0)) {
+ printf(\t\t\t!!!Notice!!!\n);
+
+ printf(!You must close EMMC boot Partition);
+ printf(after all images are written\n);
+
+ printf(!EMMC boot partition has continuity);
+ printf(at image writing time.\n);
+
+ printf(!So, do not close the boot partition);
+ printf(before all images are written.\n);
+ return 0;
+ } else if ((err == 0) (access == 0))
+ return 0;
+ else if ((err != 0) (access != 0)) {
+ printf(EMMC boot partition-%d OPEN Failed.\n, part_num);
+ return 1;
+ } else {
+ printf(EMMC boot partition-%d CLOSE Failed.\n, part_num);
+ return 1;
+ }
+}
+#endif
+
static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
enum mmc_state state;
@@ -248,8 +278,75 @@ static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
curr_device, mmc-part_num);
return 0;
- }
+#ifdef CONFIG_SUPPORT_EMMC_BOOT
+ } else if ((strcmp(argv[1], open) == 0) ||
+ (strcmp(argv[1], close) == 0)) {
+ int dev;
+ struct mmc *mmc;
+ u32 ack, part_num, access = 0;
+
+ if (argc == 4) {
+ dev = simple_strtoul(argv[2], NULL, 10);
+ part_num = simple_strtoul(argv[3], NULL, 10);
+ } else {
+ return CMD_RET_USAGE;
+ }
+ mmc = find_mmc_device(dev);
+ if (!mmc) {
+ printf(no mmc device at slot %x\n, dev);
+ return 1;
+ }
+
+ if (IS_SD(mmc)) {
+ printf(SD device cannot be opened/closed\n);
+ return 1;
+ }
+
+ if ((part_num = 0) || (part_num MMC_NUM_BOOT_PARTITION)) {
+ printf(Invalid boot partition number:\n);
+ printf(Boot partition number cannot be = 0\n);
+ printf(EMMC44 supports only 2 boot partitions\n);
+ return 1;
+ }
+
+ if (strcmp(argv[1], open) == 0)
+ access = part_num; /* enable R/W access to boot part*/
+ if (strcmp(argv[1], close) == 0)
+ access = 0; /* No access to boot partition */
+
+ /* acknowledge to be sent during boot operation */
+ ack = 1;
+ return boot_part_access(mmc, ack, part_num, access);
+
+ } else if (strcmp(argv[1], bootpart) == 0) {
+ int dev;
+ dev = simple_strtoul(argv[2], NULL, 10);
+
+ u32 bootsize = simple_strtoul(argv[3], NULL, 10);
+ u32 rpmbsize = simple_strtoul(argv[4], NULL, 10);
+ struct mmc *mmc = find_mmc_device(dev);
+ if (!mmc) {
+ printf(no mmc device at slot %x\n, dev);
+ return 1;
+ }
+
+ if (IS_SD(mmc)) {
+ printf(It is not a EMMC device\n);
+ return 1
[U-Boot] [PATCH V7 00/10] EXYNOS5: Enable DWMMC, add FDT support for DWMMC and enable EMMC boot
This patch set enables and initialises DWMMC for Exynos5250 on SMDK5250. Adds driver changes required for DWMMC. Adds FDT support for DWMMC. Adds EMMC boot support for SMDK5250. This patch set is based on: EXYNOS: mmc: support DesignWare Controller for Samsung-SoC, which is merged in u-boot-mmc. Exynos: clock: support get_mmc_clk for exynos. Add DT based ethernet driver for SMDK5250. SMDK5250: Add FDT support present at the following link http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/149991 Changes from V1: 1)Corrected in response to review comments. 2)Created separate board files for FDT and non-FDT versions. 3)Added binding file for DWMMC device node. 4)Removed the propname 'index' from device node. 5)Prefixed the vendor name 'samsung' before propname in device node. 6)Ensured to have same signature for the function exynos_dwmci_init() for both FDT and non-FDT versions. 7)EMMC clock setting has been moved from spl_boot.c to clock_init.c. Changes from V2: 1)Updation of commit message and resubmition of proper patch set. Changes from V3: 1)Updated to use the macro DWMCI_CTRL_SEND_AS_CCSD instead of the hard coded value (1 10). 2)In the file exynos_dw_mmc.c, replaced the new function exynos5_mmc_set_clk_div() with the existing function set_mmc_clk(). set_mmc_clk() will do the purpose. 3)In the file exynos_dw_mmc.c, computation of FSYS block clock divisor (pre-ratio) value is added. 4)Removed the new function exynos5_mmc_set_clk_div() from clock.c. Changes from V4: 1)Updated the function dwmci_send_cmd() to use get_timer() instead of using mdelay(1). 2)Replaced the function call 'exynos_dwmmc_init(0, 8);' with the function exynos_dwmmc_add_port() in smdk5250.c. 3)The function get_irom_func(int index) has been added to avoid type casting at many places. 4)Used the generic function mmc_boot_part_access() instead of two functions mmc_boot_open() and mmc_boot_close(). By doing so user can specify which boot partition to be accessed (opened / closed). Changes from V5: 1)Added the 'removable' flag to mmc device node. 2)Changed the mmc clock value from 50MHz to 52MHz in the function exynos_dwmci_add_port() present in file drivers/mmc/exynos_dw_mmc.c. 3)Enabled CONFIG_LCD only for non-FDT operation. 4)Removed the function call i2c_init() present inside the function board_i2c_init(). Changes from V6: 1)Re-based to the patch SMDK5250: Add PMIC voltage settings. Amar (10): FDT: Add compatible string for DWMMC EXYNOS5: FDT: Add DWMMC device node data DWMMC: Initialise dwmci and resolve EMMC read write issues EXYNOS5: DWMMC: Added FDT support for DWMMC EXYNOS5: DWMMC: Initialise the local variable to avoid unwanted results. SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDT MMC: APIs to support resize of EMMC boot partition SMDK5250: Enable EMMC booting COMMON: MMC: Command to support EMMC booting and to resize EMMC boot partition EXYNOS5: I2C: Added FDT and non-FDT support for I2C arch/arm/cpu/armv7/exynos/clock.c | 4 +- arch/arm/dts/exynos5250.dtsi | 31 +++ arch/arm/include/asm/arch-exynos/clk.h| 3 + arch/arm/include/asm/arch-exynos/dwmmc.h | 11 +- board/samsung/dts/exynos5250-smdk5250.dts | 24 +++ board/samsung/smdk5250/Makefile | 4 + board/samsung/smdk5250/clock_init.c | 15 ++ board/samsung/smdk5250/clock_init.h | 5 + board/samsung/smdk5250/exynos5-dt.c | 319 ++ board/samsung/smdk5250/smdk5250.c | 165 ++-- board/samsung/smdk5250/spl_boot.c | 52 - common/cmd_mmc.c | 98 - doc/device-tree-bindings/exynos/dwmmc.txt | 54 + drivers/i2c/s3c24x0_i2c.c | 12 +- drivers/mmc/dw_mmc.c | 25 ++- drivers/mmc/exynos_dw_mmc.c | 127 +++- drivers/mmc/mmc.c | 132 + include/configs/exynos5250-dt.h | 8 + include/dwmmc.h | 3 + include/fdtdec.h | 1 + include/mmc.h | 26 +++ lib/fdtdec.c | 1 + 22 files changed, 974 insertions(+), 146 deletions(-) create mode 100644 board/samsung/smdk5250/exynos5-dt.c create mode 100644 doc/device-tree-bindings/exynos/dwmmc.txt -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V7 01/10] FDT: Add compatible string for DWMMC
Add required compatible information for DWMMC driver.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
---
Changes since V1:
No change.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
No change.
Changes since V5:
No change.
include/fdtdec.h | 1 +
lib/fdtdec.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 77f244f..51ff266 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -81,6 +81,7 @@ enum fdt_compat_id {
COMPAT_SAMSUNG_EXYNOS_EHCI, /* Exynos EHCI controller */
COMPAT_SAMSUNG_EXYNOS_USB_PHY, /* Exynos phy controller for usb2.0 */
COMPAT_MAXIM_MAX77686_PMIC, /* MAX77686 PMIC */
+ COMPAT_SAMSUNG_EXYNOS5_DWMMC, /* Exynos5 DWMMC controller */
COMPAT_COUNT,
};
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 3ae348d..856f90c 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -56,6 +56,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(SAMSUNG_EXYNOS_EHCI, samsung,exynos-ehci),
COMPAT(SAMSUNG_EXYNOS_USB_PHY, samsung,exynos-usb-phy),
COMPAT(MAXIM_MAX77686_PMIC, maxim,max77686_pmic),
+ COMPAT(SAMSUNG_EXYNOS5_DWMMC, samsung,exynos5250-dwmmc),
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)
--
1.8.0
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[U-Boot] [PATCH V7 02/10] EXYNOS5: FDT: Add DWMMC device node data
This patch adds DWMMC device node data for exynos5.
This patch also adds binding file for DWMMC device node.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since V1:
1)Added binding file for DWMMC device node at the location
doc/device-tree-bindings/exynos/dwmmc.txt.
2)Removed the propname 'index' from device node.
3)Prefixed the vendor name 'samsung' before propname in device node.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)Updated the doc/device-tree-bindings/exynos/dwmmc.txt with more
information regarding the property 'samsung,timing'.
2)Replaced the name 'dwmmc' with 'mmc'.
Changes since V5:
1)Added the 'removable' flag to mmc device node.
Changes since V6:
No change.
arch/arm/dts/exynos5250.dtsi | 31 ++
board/samsung/dts/exynos5250-smdk5250.dts | 24 ++
doc/device-tree-bindings/exynos/dwmmc.txt | 54 +++
3 files changed, 109 insertions(+)
create mode 100644 doc/device-tree-bindings/exynos/dwmmc.txt
diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index ed8c8dd..6c08eb7 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -151,4 +151,35 @@
};
};
+ mmc@1220 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1220 0x1000;
+ interrupts = 0 75 0;
+ };
+
+ mmc@1221 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1221 0x1000;
+ interrupts = 0 76 0;
+ };
+
+ mmc@1222 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1222 0x1000;
+ interrupts = 0 77 0;
+ };
+
+ mmc@1223 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1223 0x1000;
+ interrupts = 0 78 0;
+ };
};
diff --git a/board/samsung/dts/exynos5250-smdk5250.dts
b/board/samsung/dts/exynos5250-smdk5250.dts
index cbfab6f..00c973a 100644
--- a/board/samsung/dts/exynos5250-smdk5250.dts
+++ b/board/samsung/dts/exynos5250-smdk5250.dts
@@ -30,6 +30,10 @@
spi2 = /spi@12d4;
spi3 = /spi@131a;
spi4 = /spi@131b;
+ mmc0 = /mmc@1220;
+ mmc1 = /mmc@1221;
+ mmc2 = /mmc@1222;
+ mmc3 = /mmc@1223;
};
sromc@1225 {
@@ -66,4 +70,24 @@
compatible = maxim,max77686_pmic;
};
};
+
+ mmc@1220 {
+ samsung,bus-width = 8;
+ samsung,timing = 1 3 3;
+ samsung,removable = 0;
+ };
+
+ mmc@1221 {
+ status = disabled;
+ };
+
+ mmc@1222 {
+ samsung,bus-width = 4;
+ samsung,timing = 1 2 3;
+ samsung,removable = 1;
+ };
+
+ mmc@1223 {
+ status = disabled;
+ };
};
diff --git a/doc/device-tree-bindings/exynos/dwmmc.txt
b/doc/device-tree-bindings/exynos/dwmmc.txt
new file mode 100644
index 000..566da3b
--- /dev/null
+++ b/doc/device-tree-bindings/exynos/dwmmc.txt
@@ -0,0 +1,54 @@
+* Exynos 5250 DWC_mobile_storage
+
+The Exynos 5250 provides DWC_mobile_storage interface which supports
+. Embedded Multimedia Cards (EMMC-version 4.5)
+. Secure Digital memory (SD mem-version 2.0)
+. Secure Digital I/O (SDIO-version 3.0)
+. Consumer Electronics Advanced Transport Architecture (CE-ATA-version 1.1)
+
+The Exynos 5250 DWC_mobile_storage provides four channels.
+SOC specific and Board specific properties are channel specific.
+
+Required SoC Specific Properties:
+
+- compatible: should be
+ - samsung,exynos5250-dwmmc: for exynos5250 platforms
+
+- reg: physical base address of the controller and length of memory mapped
+ region.
+
+- interrupts: The interrupt number to the cpu.
+
+Required Board Specific Properties:
+
+- #address-cells: should be 1.
+- #size-cells: should be 0.
+- samsung,bus-width: The width of the bus used to interface the devices
+ supported by DWC_mobile_storage (SD-MMC/EMMC/SDIO).
+ . Typically the bus width is 4 or 8.
+- samsung,timing: The timing values to be written into the
+ Drv/sample clock selection register of corresponding channel.
+ . It is comprised of 3
[U-Boot] [PATCH V7 03/10] DWMMC: Initialise dwmci and resolve EMMC read write issues
This patch enumerates dwmci and set auto stop command during
dwmci initialisation.
EMMC read/write is not happening in current implementation
due to improper fifo size computation. Hence modified the fifo size
computation to resolve EMMC read write issues.
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since V1:
1)Created the macros RX_WMARK_SHIFT and RX_WMARK_MASK in header file.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
1)Updated to use the macro DWMCI_CTRL_SEND_AS_CCSD instead of
the hard coded value (1 10).
Changes since V4:
1)Updated the function dwmci_send_cmd() to use get_timer() instead
of using mdelay(1).
Changes since V5:
1)Updated in response to review comments.
Changes since V6:
No change.
drivers/mmc/dw_mmc.c | 25 +
1 file changed, 17 insertions(+), 8 deletions(-)
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 4070d4e..3bd1af6 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -129,13 +129,13 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
unsigned int timeout = 10;
u32 retry = 1;
u32 mask, ctrl;
+ ulong start = get_timer(0);
while (dwmci_readl(host, DWMCI_STATUS) DWMCI_BUSY) {
- if (timeout == 0) {
+ if (get_timer(start) timeout) {
printf(Timeout on data busy\n);
return TIMEOUT;
}
- timeout--;
}
dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL);
@@ -143,7 +143,6 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
if (data)
dwmci_prepare_data(host, data);
-
dwmci_writel(host, DWMCI_CMDARG, cmd-cmdarg);
if (data)
@@ -314,7 +313,7 @@ static void dwmci_set_ios(struct mmc *mmc)
static int dwmci_init(struct mmc *mmc)
{
struct dwmci_host *host = (struct dwmci_host *)mmc-priv;
- u32 fifo_size, fifoth_val;
+ u32 fifo_size, fifoth_val, ier;
dwmci_writel(host, DWMCI_PWREN, 1);
@@ -323,6 +322,14 @@ static int dwmci_init(struct mmc *mmc)
return -1;
}
+ /* Enumerate at 400KHz */
+ dwmci_setup_bus(host, mmc-f_min);
+
+ /* Set auto stop command */
+ ier = dwmci_readl(host, DWMCI_CTRL);
+ ier |= DWMCI_CTRL_SEND_AS_CCSD;
+ dwmci_writel(host, DWMCI_CTRL, ier);
+
dwmci_writel(host, DWMCI_RINTSTS, 0x);
dwmci_writel(host, DWMCI_INTMASK, 0);
@@ -332,11 +339,13 @@ static int dwmci_init(struct mmc *mmc)
dwmci_writel(host, DWMCI_BMOD, 1);
fifo_size = dwmci_readl(host, DWMCI_FIFOTH);
- if (host-fifoth_val)
+ fifo_size = ((fifo_size RX_WMARK_MASK) RX_WMARK_SHIFT) + 1;
+ if (host-fifoth_val) {
fifoth_val = host-fifoth_val;
- else
- fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size/2 -1) |
- TX_WMARK(fifo_size/2);
+ } else {
+ fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) |
+ TX_WMARK(fifo_size / 2);
+ }
dwmci_writel(host, DWMCI_FIFOTH, fifoth_val);
dwmci_writel(host, DWMCI_CLKENA, 0);
--
1.8.0
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[U-Boot] [PATCH V7 04/10] EXYNOS5: DWMMC: Added FDT support for DWMMC
This patch adds FDT support for DWMMC, by reading the DWMMC node data
from the device tree and initialising DWMMC channels as per data
obtained from the node.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since V1:
1)Updated code to have same signature for the function
exynos_dwmci_init() for both FDT and non-FDT versions.
2)Updated code to pass device_id parameter to the function
exynos5_mmc_set_clk_div() instead of index.
3)Updated code to decode the value of samsung,width from FDT.
4)Channel index is computed instead of getting from FDT.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
1)Replaced the new function exynos5_mmc_set_clk_div() with the
existing function set_mmc_clk(). set_mmc_clk() will do the purpose.
2)Computation of FSYS block clock divisor (pre-ratio) is added.
Changes since V4:
1)Replaced unsigned int exynos_dwmmc_init(int index, int bus_width)
with
int exynos_dwmci_add_port(int, u32, inth, u32)
i)exynos_dwmmc_add_port() will be used by non-FDT boards.
ii)In FDT case, exynos_dwmmc_init(const void *blob) will use
exynos_dwmmc_add_port() for every channel enabled in device
node.
2)Changed the computation method of mmc clock divisor.
3)Updated exynos_dwmmc_init() to compute the 'clksel_val' within the
function.
Changes since V5:
1)Updated in response to review comments and changed the mmc clock value
from 50MHz to 52MHz.
Changes since V6:
No change.
arch/arm/include/asm/arch-exynos/dwmmc.h | 11 +--
drivers/mmc/exynos_dw_mmc.c | 127 ---
include/dwmmc.h | 3 +
3 files changed, 124 insertions(+), 17 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/dwmmc.h
b/arch/arm/include/asm/arch-exynos/dwmmc.h
index 8acdf9b..3b147b8 100644
--- a/arch/arm/include/asm/arch-exynos/dwmmc.h
+++ b/arch/arm/include/asm/arch-exynos/dwmmc.h
@@ -27,10 +27,7 @@
#define DWMCI_SET_DRV_CLK(x) ((x) 16)
#define DWMCI_SET_DIV_RATIO(x) ((x) 24)
-int exynos_dwmci_init(u32 regbase, int bus_width, int index);
-
-static inline unsigned int exynos_dwmmc_init(int index, int bus_width)
-{
- unsigned int base = samsung_get_base_mmc() + (0x1 * index);
- return exynos_dwmci_init(base, bus_width, index);
-}
+#ifdef CONFIG_OF_CONTROL
+int exynos_dwmmc_init(const void *blob);
+#endif
+int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel);
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 72a31b7..4238dd9 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -19,39 +19,146 @@
*/
#include common.h
-#include malloc.h
#include dwmmc.h
+#include fdtdec.h
+#include libfdt.h
+#include malloc.h
#include asm/arch/dwmmc.h
#include asm/arch/clk.h
+#include asm/arch/pinmux.h
-static char *EXYNOS_NAME = EXYNOS DWMMC;
+#defineDWMMC_MAX_CH_NUM4
+#defineDWMMC_MAX_FREQ 5200
+#defineDWMMC_MIN_FREQ 40
+#defineDWMMC_MMC0_CLKSEL_VAL 0x03030001
+#defineDWMMC_MMC2_CLKSEL_VAL 0x03020001
+/*
+ * Function used as callback function to initialise the
+ * CLKSEL register for every mmc channel.
+ */
static void exynos_dwmci_clksel(struct dwmci_host *host)
{
- u32 val;
- val = DWMCI_SET_SAMPLE_CLK(DWMCI_SHIFT_0) |
- DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) | DWMCI_SET_DIV_RATIO(0);
+ dwmci_writel(host, DWMCI_CLKSEL, host-clksel_val);
+}
- dwmci_writel(host, DWMCI_CLKSEL, val);
+unsigned int exynos_dwmci_get_clk(int dev_index)
+{
+ return get_mmc_clk(dev_index);
}
-int exynos_dwmci_init(u32 regbase, int bus_width, int index)
+/*
+ * This function adds the mmc channel to be registered with mmc core.
+ * index - mmc channel number.
+ * regbase - register base address of mmc channel specified in 'index'.
+ * bus_width - operating bus width of mmc channel specified in 'index'.
+ * clksel -value to be written into CLKSEL register in case of FDT.
+ * NULL in case od non-FDT.
+ */
+int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel)
{
struct dwmci_host *host = NULL;
+ unsigned int div;
+ unsigned long freq, sclk;
host = malloc(sizeof(struct dwmci_host));
if (!host) {
printf(dwmci_host malloc fail!\n);
return 1;
}
+ /* request mmc clock vlaue of 52MHz. */
+ freq = 5200;
+ sclk = get_mmc_clk(index);
+ div = DIV_ROUND_UP(sclk, freq);
+ /* set the clock divisor for mmc */
+ set_mmc_clk(index, div);
- host-name
[U-Boot] [PATCH V7 05/10] EXYNOS5: DWMMC: Initialise the local variable to avoid unwanted results.
This patch initialises the local variable 'shift' to zero. The uninitialised local variable 'shift' had garbage value and was resulting in unwnated results in the functions exynos5_get_mmc_clk() and exynos4_get_mmc_clk(). Signed-off-by: Amar amarendra...@samsung.com Acked-by: Simon Glass s...@chromium.org --- Changes since V1: 1)Updated the function exynos5_mmc_set_clk_div() to receive 'device_i'd as input parameter instead of 'index'. Changes since V2: 1)Updation of commit message and resubmition of proper patch set. Changes since V3: 1)Removed the new API exynos5_mmc_set_clk_div() from clock.c, because existing API set_mmc_clk() can be used to set mmc clock. Changes since V4: 1)Updated the subject line to reflect the changes present in this patch. 2)Changes of the file arch/arm/include/asm/arch-exynos/clk.h which were present in this patch, have been moved out of this patch. Changes since V5: No change. Changes since V6: No change. arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 956427c..edce21c 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -490,7 +490,7 @@ static unsigned long exynos4_get_mmc_clk(int dev_index) (struct exynos4_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel, ratio, pre_ratio; - int shift; + int shift = 0; sel = readl(clk-src_fsys); sel = (sel (dev_index 2)) 0xf; @@ -539,7 +539,7 @@ static unsigned long exynos5_get_mmc_clk(int dev_index) (struct exynos5_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel, ratio, pre_ratio; - int shift; + int shift = 0; sel = readl(clk-src_fsys); sel = (sel (dev_index 2)) 0xf; -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V7 06/10] SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDT
This patch enables and initialises DWMMC for SMDK5250.
Supports both FDT and non-FDT. This patch creates a new file
'exynos5-dt.c' meant for FDT support.
exynos5-dt.c: This file shall contain all code which supports FDT.
Any addition of FDT support for any module needs to be
added in this file.
smdk5250.c: This file shall contain the code which supports non-FDT.
version. Any addition of non-FDT support for any module
needs to be added in this file.
May be, the file smdk5250.c can be removed in near
future
when non-FDT is not required.
The Makefile is updated to compile only one of the files
exynos5-dt.c / smdk5250.c based on FDT configuration.
NOTE:
Please note that all additions corresponding to FDT need to be added into the
file exynos5-dt.c.
At same time if non-FDT support is required then add the corresponding
updations into smdk5250.c.
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since V1:
1)A new file 'exynos5-dt.c' is created meant for FDT support
2)Makefile is updated to compile only one of the files
exynos5-dt.c / smdk5250.c based on FDT configuration
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)Replaced the function call 'exynos_dwmmc_init(0, 8);' with the
function exynos_dwmmc_add_port() in smdk5250.c.
2)dram_init() is updated to use for loop to compute the ram size.
3)dram_init_banksize() is updated to use for loop to initialise
the dram bank size.
4)board_uart_init() is updated to use for loop to initialise UARTS.
5)In non-FDT case NULL is passed as parameter to board_i2c_init().
Changes since V5:
1)Enabled CONFIG_LCD only for non-FDT operation.
Changes since V6:
1)Re-based.
---
board/samsung/smdk5250/Makefile | 4 +
board/samsung/smdk5250/exynos5-dt.c | 339
board/samsung/smdk5250/smdk5250.c | 165 ++
include/configs/exynos5250-dt.h | 8 +
4 files changed, 406 insertions(+), 110 deletions(-)
create mode 100644 board/samsung/smdk5250/exynos5-dt.c
diff --git a/board/samsung/smdk5250/Makefile b/board/samsung/smdk5250/Makefile
index 47c6a5a..ecca9f3 100644
--- a/board/samsung/smdk5250/Makefile
+++ b/board/samsung/smdk5250/Makefile
@@ -32,8 +32,12 @@ COBJS+= tzpc_init.o
COBJS += smdk5250_spl.o
ifndef CONFIG_SPL_BUILD
+ifdef CONFIG_OF_CONTROL
+COBJS += exynos5-dt.o
+else
COBJS += smdk5250.o
endif
+endif
ifdef CONFIG_SPL_BUILD
COBJS += spl_boot.o
diff --git a/board/samsung/smdk5250/exynos5-dt.c
b/board/samsung/smdk5250/exynos5-dt.c
new file mode 100644
index 000..b01fe72
--- /dev/null
+++ b/board/samsung/smdk5250/exynos5-dt.c
@@ -0,0 +1,339 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include fdtdec.h
+#include asm/io.h
+#include errno.h
+#include i2c.h
+#include netdev.h
+#include spi.h
+#include asm/arch/cpu.h
+#include asm/arch/dwmmc.h
+#include asm/arch/gpio.h
+#include asm/arch/mmc.h
+#include asm/arch/pinmux.h
+#include asm/arch/power.h
+#include asm/arch/sromc.h
+#include power/pmic.h
+#include power/max77686_pmic.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_USB_EHCI_EXYNOS
+int board_usb_vbus_init(void)
+{
+ struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *)
+ samsung_get_base_gpio_part1();
+
+ /* Enable VBUS power switch */
+ s5p_gpio_direction_output(gpio1-x2, 6, 1);
+
+ /* VBUS turn ON time */
+ mdelay(3);
+
+ return 0;
+}
+#endif
+
+int board_init(void)
+{
+ gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+#ifdef CONFIG_EXYNOS_SPI
+ spi_init();
+#endif
+#ifdef CONFIG_USB_EHCI_EXYNOS
+ board_usb_vbus_init();
+#endif
+ return 0;
+}
+
+int dram_init(void)
+{
+ int i;
+ u32 addr;
+
+ for (i = 0; i
[U-Boot] [PATCH V7 07/10] MMC: APIs to support resize of EMMC boot partition
This patch adds APIs to access(open / close) and to resize boot partiton of
EMMC.
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since V1:
New patch.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)Replaced the functions mmc_boot_open() mmc_boot_close() with a
single function mmc_boot_part_access().
Changes since V5:
1)Updated in response to review comments.
Changes since V6:
1)Added spaces around operator, in response to review comments.
drivers/mmc/mmc.c | 132 ++
include/mmc.h | 26 +++
2 files changed, 158 insertions(+)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 72e8ce6..d3e4bf7 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1327,3 +1327,135 @@ int mmc_initialize(bd_t *bis)
return 0;
}
+
+/*
+ * This function changes the size of boot partition and the size of rpmb
+ * partition present on EMMC devices.
+ *
+ * Input Parameters:
+ * struct *mmc: pointer for the mmc device strcuture
+ * bootsize: size of boot partition
+ * rpmbsize: size of rpmb partition
+ *
+ * Returns 0 on success.
+ */
+
+int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
+ unsigned long rpmbsize)
+{
+ int err;
+ struct mmc_cmd cmd;
+
+ /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = MMC_CMD62_ARG1;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error1 = %d\n, err);
+ return err;
+ }
+
+ /* Boot partition changing mode */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = MMC_CMD62_ARG2;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error2 = %d\n, err);
+ return err;
+ }
+ /* boot partition size is multiple of 128KB */
+ bootsize = (bootsize * 1024) / 128;
+
+ /* Arg: boot partition size */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = bootsize;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error3 = %d\n, err);
+ return err;
+ }
+ /* RPMB partition size is multiple of 128KB */
+ rpmbsize = (rpmbsize * 1024) / 128;
+ /* Arg: RPMB partition size */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = rpmbsize;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error4 = %d\n, err);
+ return err;
+ }
+ return 0;
+}
+
+/*
+ * This function shall form and send the commands to open / close the
+ * boot partition specified by user.
+ *
+ * Input Parameters:
+ * ack: 0x0 - No boot acknowledge sent (default)
+ * 0x1 - Boot acknowledge sent during boot operation
+ * part_num: User selects boot data that will be sent to master
+ * 0x0 - Device not boot enabled (default)
+ * 0x1 - Boot partition 1 enabled for boot
+ * 0x2 - Boot partition 2 enabled for boot
+ * access: User selects partitions to access
+ * 0x0 : No access to boot partition (default)
+ * 0x1 : R/W boot partition 1
+ * 0x2 : R/W boot partition 2
+ * 0x3 : R/W Replay Protected Memory Block (RPMB)
+ *
+ * Returns 0 on success.
+ */
+int mmc_boot_part_access(struct mmc *mmc, u32 ack, u32 part_num, u32 access)
+{
+ int err;
+ struct mmc_cmd cmd;
+
+ /* Boot ack enable, boot partition enable , boot partition access */
+ cmd.cmdidx = MMC_CMD_SWITCH;
+ cmd.resp_type = MMC_RSP_R1b;
+
+ cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE 24) |
+ (EXT_CSD_PART_CONF 16) |
+ ((EXT_CSD_BOOT_ACK(ack) |
+ EXT_CSD_BOOT_PART_NUM(part_num) |
+ EXT_CSD_PARTITION_ACCESS(access)) 8);
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ if (access) {
+ debug(mmc boot partition#%d open failure:
+ Error1 = %d\n, part_num, err);
+ } else {
+ debug(mmc boot partition#%d close failure:
+ Error = %d\n, part_num, err);
+ }
+ return err;
+ }
+
+ if (access) {
+ /* 4bit transfer mode at booting time. */
+ cmd.cmdidx = MMC_CMD_SWITCH;
+ cmd.resp_type = MMC_RSP_R1b;
+
+ cmd.cmdarg
[U-Boot] [PATCH V7 08/10] SMDK5250: Enable EMMC booting
This patch adds support for EMMC booting on SMDK5250.
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since V1:
1)Updated spl_boot.c file to maintain irom pointer table
instead of using the #define values defined in header file.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)The function get_irom_func(int index) has been added to avoid
type casting at many places.
2)The changes to file arch/arm/include/asm/arch-exynos/clk.h are
included in this patch file.
Changes since V5:
No change.
Changes since V6:
No change.
arch/arm/include/asm/arch-exynos/clk.h | 3 ++
board/samsung/smdk5250/clock_init.c| 15 ++
board/samsung/smdk5250/clock_init.h| 5
board/samsung/smdk5250/spl_boot.c | 52 ++
4 files changed, 69 insertions(+), 6 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/clk.h
b/arch/arm/include/asm/arch-exynos/clk.h
index 1935b0b..a4d5b4e 100644
--- a/arch/arm/include/asm/arch-exynos/clk.h
+++ b/arch/arm/include/asm/arch-exynos/clk.h
@@ -29,6 +29,9 @@
#define VPLL 4
#define BPLL 5
+#define FSYS1_MMC0_DIV_MASK0xff0f
+#define FSYS1_MMC0_DIV_VAL 0x0701
+
unsigned long get_pll_clk(int pllreg);
unsigned long get_arm_clk(void);
unsigned long get_i2c_clk(void);
diff --git a/board/samsung/smdk5250/clock_init.c
b/board/samsung/smdk5250/clock_init.c
index c009ae5..154993c 100644
--- a/board/samsung/smdk5250/clock_init.c
+++ b/board/samsung/smdk5250/clock_init.c
@@ -28,6 +28,7 @@
#include asm/arch/clk.h
#include asm/arch/clock.h
#include asm/arch/spl.h
+#include asm/arch/dwmmc.h
#include clock_init.h
#include setup.h
@@ -664,3 +665,17 @@ void clock_init_dp_clock(void)
/* We run DP at 267 Mhz */
setbits_le32(clk-div_disp1_0, CLK_DIV_DISP1_0_FIMD1);
}
+
+/*
+ * Set clock divisor value for booting from EMMC.
+ * Set DWMMC channel-0 clk div to operate mmc0 device at 50MHz.
+ */
+void emmc_boot_clk_div_set(void)
+{
+ struct exynos5_clock *clk = (struct exynos5_clock *)EXYNOS5_CLOCK_BASE;
+ unsigned int div_mmc;
+
+ div_mmc = readl((unsigned int) clk-div_fsys1) ~FSYS1_MMC0_DIV_MASK;
+ div_mmc |= FSYS1_MMC0_DIV_VAL;
+ writel(div_mmc, (unsigned int) clk-div_fsys1);
+}
diff --git a/board/samsung/smdk5250/clock_init.h
b/board/samsung/smdk5250/clock_init.h
index f751bcb..20a1d47 100644
--- a/board/samsung/smdk5250/clock_init.h
+++ b/board/samsung/smdk5250/clock_init.h
@@ -146,4 +146,9 @@ struct mem_timings *clock_get_mem_timings(void);
* Initialize clock for the device
*/
void system_clock_init(void);
+
+/*
+ * Set clock divisor value for booting from EMMC.
+ */
+void emmc_boot_clk_div_set(void);
#endif
diff --git a/board/samsung/smdk5250/spl_boot.c
b/board/samsung/smdk5250/spl_boot.c
index d8f3c1e..4ddbd4a 100644
--- a/board/samsung/smdk5250/spl_boot.c
+++ b/board/samsung/smdk5250/spl_boot.c
@@ -23,15 +23,42 @@
#includecommon.h
#includeconfig.h
+#include asm/arch-exynos/dmc.h
+#include asm/arch/clock.h
+#include asm/arch/clk.h
+
+#include clock_init.h
+
+/* Index into irom ptr table */
+enum index {
+ MMC_INDEX,
+ EMMC44_INDEX,
+ EMMC44_END_INDEX,
+ SPI_INDEX,
+};
+
+/* IROM Function Pointers Table */
+u32 irom_ptr_table[] = {
+ [MMC_INDEX] = 0x02020030, /* iROM Function Pointer-SDMMC boot */
+ [EMMC44_INDEX] = 0x02020044,/* iROM Function Pointer-EMMC4.4 boot*/
+ [EMMC44_END_INDEX] = 0x02020048,/* iROM Function Pointer
+ -EMMC4.4 end boot operation */
+ [SPI_INDEX] = 0x02020058, /* iROM Function Pointer-SPI boot */
+ };
+
enum boot_mode {
BOOT_MODE_MMC = 4,
BOOT_MODE_SERIAL = 20,
+ BOOT_MODE_EMMC = 8, /* EMMC4.4 */
/* Boot based on Operating Mode pin settings */
BOOT_MODE_OM = 32,
BOOT_MODE_USB, /* Boot using USB download */
};
- typedef u32 (*spi_copy_func_t)(u32 offset, u32 nblock, u32 dst);
+void *get_irom_func(int index)
+{
+ return (void *) *(u32 *)irom_ptr_table[index];
+}
/*
* Copy U-boot from mmc to RAM:
@@ -40,23 +67,36 @@ enum boot_mode {
*/
void copy_uboot_to_ram(void)
{
- spi_copy_func_t spi_copy;
enum boot_mode bootmode;
- u32 (*copy_bl2)(u32, u32, u32);
-
+ u32 (*spi_copy)(u32 offset, u32 nblock, u32 dst);
+ u32 (*copy_bl2)(u32 offset, u32 nblock, u32 dst);
+ u32 (*copy_bl2_from_emmc)(u32 nblock, u32 dst);
+ void (*end_bootop_from_emmc)(void);
+ /* read Operation Mode ststus register to find the bootmode */
bootmode = readl(EXYNOS5_POWER_BASE) OM_STAT;
switch (bootmode) {
case BOOT_MODE_SERIAL:
- spi_copy = *(spi_copy_func_t *)EXYNOS_COPY_SPI_FNPTR_ADDR
[U-Boot] [PATCH V7 09/10] COMMON: MMC: Command to support EMMC booting and to resize EMMC boot partition
This patch adds commands to access(open/close) and resize boot partitions on
EMMC.
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since V1:
1)Combined the common piece of code between 'open' and 'close'
operations.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)Added a new funtion boot_part_access() to combine the common parts of
'mmc open' and 'mmc close' functionalities.
2)Used the generic function mmc_boot_part_access() instead of
two functions mmc_boot_open() and mmc_boot_close(). By doing so user
can specify which boot partition to be accessed (opened / closed).
Changes since V5:
1)Updated minor nits in response to review comments.
Changes since V6:
No change.
common/cmd_mmc.c | 98 +++-
1 file changed, 97 insertions(+), 1 deletion(-)
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 7dacd51..5f2ae70 100644
--- a/common/cmd_mmc.c
+++ b/common/cmd_mmc.c
@@ -147,6 +147,31 @@ U_BOOT_CMD(
- display info of the current MMC device
);
+static int boot_part_access(struct mmc *mmc, u32 ack, u32 part_num, u32 access)
+{
+ int err;
+ err = mmc_boot_part_access(mmc, ack, part_num, access);
+
+ if ((err == 0) (access != 0)) {
+ printf(\t\t\t!!!Notice!!!\n);
+ printf(!You must close EMMC boot Partition after all
+ images are written\n);
+ printf(!EMMC boot partition has continuity at image
+ writing time.\n);
+ printf(!So, do not close the boot partition before all
+ images are written.\n);
+ return 0;
+ } else if ((err == 0) (access == 0))
+ return 0;
+ else if ((err != 0) (access != 0)) {
+ printf(EMMC boot partition-%d OPEN Failed.\n, part_num);
+ return 1;
+ } else {
+ printf(EMMC boot partition-%d CLOSE Failed.\n, part_num);
+ return 1;
+ }
+}
+
static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
enum mmc_state state;
@@ -248,6 +273,71 @@ static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
curr_device, mmc-part_num);
return 0;
+ } else if ((strcmp(argv[1], open) == 0) ||
+ (strcmp(argv[1], close) == 0)) {
+ int dev;
+ struct mmc *mmc;
+ u32 ack, part_num, access = 0;
+
+ if (argc == 4) {
+ dev = simple_strtoul(argv[2], NULL, 10);
+ part_num = simple_strtoul(argv[3], NULL, 10);
+ } else
+ return CMD_RET_USAGE;
+
+ mmc = find_mmc_device(dev);
+ if (!mmc) {
+ printf(no mmc device at slot %x\n, dev);
+ return 1;
+ }
+
+ if (IS_SD(mmc)) {
+ printf(SD device cannot be opened/closed\n);
+ return 1;
+ }
+
+ if ((part_num = 0) || (part_num MMC_NUM_BOOT_PARTITION)) {
+ printf(Invalid boot partition number:\n);
+ printf(Boot partition number cannot be = 0\n);
+ printf(EMMC44 supports only 2 boot partitions\n);
+ return 1;
+ }
+
+ if (strcmp(argv[1], open) == 0)
+ access = part_num; /* enable R/W access to boot part*/
+ if (strcmp(argv[1], close) == 0)
+ access = 0; /* No access to boot partition */
+
+ /* acknowledge to be sent during boot operation */
+ ack = 1;
+ return boot_part_access(mmc, ack, part_num, access);
+
+ } else if (strcmp(argv[1], bootpart) == 0) {
+ int dev;
+ dev = simple_strtoul(argv[2], NULL, 10);
+
+ u32 bootsize = simple_strtoul(argv[3], NULL, 10);
+ u32 rpmbsize = simple_strtoul(argv[4], NULL, 10);
+ struct mmc *mmc = find_mmc_device(dev);
+ if (!mmc) {
+ printf(no mmc device at slot %x\n, dev);
+ return 1;
+ }
+
+ if (IS_SD(mmc)) {
+ printf(It is not a EMMC device\n);
+ return 1;
+ }
+
+ if (0 == mmc_boot_partition_size_change(mmc,
+ bootsize, rpmbsize)) {
+ printf(EMMC boot partition Size %d MB\n, bootsize
[U-Boot] [PATCH V7 10/10] EXYNOS5: I2C: Added FDT and non-FDT support for I2C
This patch adds FDT and non-FDT support for I2C, and initialise
the I2C channels.
Signed-off-by: Amar amarendra...@samsung.com
---
Changes since V4:
New patch.
Changes since V5:
1)Removed the function call i2c_init() present inside the
function board_i2c_init().
Changes since V6:
No change.
drivers/i2c/s3c24x0_i2c.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index 769a2ba..5b4c3d2 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -524,11 +524,12 @@ int i2c_write(uchar chip, uint addr, int alen, uchar
*buffer, int len)
len) != 0);
}
-#ifdef CONFIG_OF_CONTROL
void board_i2c_init(const void *blob)
{
+ int i;
+#ifdef CONFIG_OF_CONTROL
int node_list[CONFIG_MAX_I2C_NUM];
- int count, i;
+ int count;
count = fdtdec_find_aliases_for_id(blob, i2c,
COMPAT_SAMSUNG_S3C2440_I2C, node_list,
@@ -548,8 +549,15 @@ void board_i2c_init(const void *blob)
bus-bus_num = i2c_busses++;
exynos_pinmux_config(bus-id, 0);
}
+#else
+ for (i = 0; i CONFIG_MAX_I2C_NUM; i++) {
+ exynos_pinmux_config((PERIPH_ID_I2C0 + i),
+ PINMUX_FLAG_NONE);
+ }
+#endif
}
+#ifdef CONFIG_OF_CONTROL
static struct s3c24x0_i2c_bus *get_bus(unsigned int bus_idx)
{
if (bus_idx i2c_busses)
--
1.8.0
___
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[U-Boot] [PATCH V6 00/10] EXYNOS5: Enable DWMMC, add FDT support for DWMMC and enable EMMC boot
This patch set enables and initialises DWMMC for Exynos5250 on SMDK5250. Adds driver changes required for DWMMC. Adds FDT support for DWMMC. Adds EMMC boot support for SMDK5250. This patch set is based on: EXYNOS: mmc: support DesignWare Controller for Samsung-SoC, which is merged in u-boot-mmc. Exynos: clock: support get_mmc_clk for exynos. Add DT based ethernet driver for SMDK5250. SMDK5250: Add FDT support present at the following link http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/149991 Changes from V1: 1)Corrected in response to review comments. 2)Created separate board files for FDT and non-FDT versions. 3)Added binding file for DWMMC device node. 4)Removed the propname 'index' from device node. 5)Prefixed the vendor name 'samsung' before propname in device node. 6)Ensured to have same signature for the function exynos_dwmci_init() for both FDT and non-FDT versions. 7)EMMC clock setting has been moved from spl_boot.c to clock_init.c. Changes from V2: 1)Updation of commit message and resubmition of proper patch set. Changes from V3: 1)Updated to use the macro DWMCI_CTRL_SEND_AS_CCSD instead of the hard coded value (1 10). 2)In the file exynos_dw_mmc.c, replaced the new function exynos5_mmc_set_clk_div() with the existing function set_mmc_clk(). set_mmc_clk() will do the purpose. 3)In the file exynos_dw_mmc.c, computation of FSYS block clock divisor (pre-ratio) value is added. 4)Removed the new function exynos5_mmc_set_clk_div() from clock.c. Changes from V4: 1)Updated the function dwmci_send_cmd() to use get_timer() instead of using mdelay(1). 2)Replaced the function call 'exynos_dwmmc_init(0, 8);' with the function exynos_dwmmc_add_port() in smdk5250.c. 3)The function get_irom_func(int index) has been added to avoid type casting at many places. 4)Used the generic function mmc_boot_part_access() instead of two functions mmc_boot_open() and mmc_boot_close(). By doing so user can specify which boot partition to be accessed (opened / closed). Changes from V5: 1)Added the 'removable' flag to mmc device node. 2)Changed the mmc clock value from 50MHz to 52MHz in the function exynos_dwmci_add_port() present in file drivers/mmc/exynos_dw_mmc.c. 3)Enabled CONFIG_LCD only for non-FDT operation. 4)Removed the function call i2c_init() present inside the function board_i2c_init(). Amar (10): FDT: Add compatible string for DWMMC EXYNOS5: FDT: Add DWMMC device node data DWMMC: Initialise dwmci and resolve EMMC read write issues EXYNOS5: DWMMC: Added FDT support for DWMMC EXYNOS5: DWMMC: Initialise the local variable to avoid unwanted results. SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDT MMC: APIs to support resize of EMMC boot partition SMDK5250: Enable EMMC booting COMMON: MMC: Command to support EMMC booting and to resize EMMC boot partition EXYNOS5: I2C: Added FDT and non-FDT support for I2C arch/arm/cpu/armv7/exynos/clock.c | 4 +- arch/arm/dts/exynos5250.dtsi | 31 + arch/arm/include/asm/arch-exynos/clk.h| 3 + arch/arm/include/asm/arch-exynos/dwmmc.h | 11 +- board/samsung/dts/exynos5250-smdk5250.dts | 24 board/samsung/smdk5250/Makefile | 4 + board/samsung/smdk5250/clock_init.c | 15 +++ board/samsung/smdk5250/clock_init.h | 5 + board/samsung/smdk5250/exynos5-dt.c | 211 ++ board/samsung/smdk5250/smdk5250.c | 170 board/samsung/smdk5250/spl_boot.c | 52 +++- common/cmd_mmc.c | 98 +- doc/device-tree-bindings/exynos/dwmmc.txt | 54 drivers/i2c/s3c24x0_i2c.c | 12 +- drivers/mmc/dw_mmc.c | 25 ++-- drivers/mmc/exynos_dw_mmc.c | 127 -- drivers/mmc/mmc.c | 132 +++ include/configs/exynos5250-dt.h | 8 ++ include/dwmmc.h | 3 + include/fdtdec.h | 1 + include/mmc.h | 26 lib/fdtdec.c | 1 + 22 files changed, 869 insertions(+), 148 deletions(-) create mode 100644 board/samsung/smdk5250/exynos5-dt.c create mode 100644 doc/device-tree-bindings/exynos/dwmmc.txt -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V6 01/10] FDT: Add compatible string for DWMMC
Add required compatible information for DWMMC driver.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
---
Changes since V1:
No change.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
No change.
Changes since V5:
No change.
include/fdtdec.h | 1 +
lib/fdtdec.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 77f244f..51ff266 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -81,6 +81,7 @@ enum fdt_compat_id {
COMPAT_SAMSUNG_EXYNOS_EHCI, /* Exynos EHCI controller */
COMPAT_SAMSUNG_EXYNOS_USB_PHY, /* Exynos phy controller for usb2.0 */
COMPAT_MAXIM_MAX77686_PMIC, /* MAX77686 PMIC */
+ COMPAT_SAMSUNG_EXYNOS5_DWMMC, /* Exynos5 DWMMC controller */
COMPAT_COUNT,
};
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 3ae348d..856f90c 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -56,6 +56,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(SAMSUNG_EXYNOS_EHCI, samsung,exynos-ehci),
COMPAT(SAMSUNG_EXYNOS_USB_PHY, samsung,exynos-usb-phy),
COMPAT(MAXIM_MAX77686_PMIC, maxim,max77686_pmic),
+ COMPAT(SAMSUNG_EXYNOS5_DWMMC, samsung,exynos5250-dwmmc),
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)
--
1.8.0
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[U-Boot] [PATCH V6 02/10] EXYNOS5: FDT: Add DWMMC device node data
This patch adds DWMMC device node data for exynos5.
This patch also adds binding file for DWMMC device node.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since V1:
1)Added binding file for DWMMC device node at the location
doc/device-tree-bindings/exynos/dwmmc.txt.
2)Removed the propname 'index' from device node.
3)Prefixed the vendor name 'samsung' before propname in device node.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)Updated the doc/device-tree-bindings/exynos/dwmmc.txt with more
information regarding the property 'samsung,timing'.
2)Replaced the name 'dwmmc' with 'mmc'.
Changes since V5:
1)Added the 'removable' flag to mmc device node.
arch/arm/dts/exynos5250.dtsi | 31 ++
board/samsung/dts/exynos5250-smdk5250.dts | 24 ++
doc/device-tree-bindings/exynos/dwmmc.txt | 54 +++
3 files changed, 109 insertions(+)
create mode 100644 doc/device-tree-bindings/exynos/dwmmc.txt
diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index ed8c8dd..6c08eb7 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -151,4 +151,35 @@
};
};
+ mmc@1220 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1220 0x1000;
+ interrupts = 0 75 0;
+ };
+
+ mmc@1221 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1221 0x1000;
+ interrupts = 0 76 0;
+ };
+
+ mmc@1222 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1222 0x1000;
+ interrupts = 0 77 0;
+ };
+
+ mmc@1223 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1223 0x1000;
+ interrupts = 0 78 0;
+ };
};
diff --git a/board/samsung/dts/exynos5250-smdk5250.dts
b/board/samsung/dts/exynos5250-smdk5250.dts
index cbfab6f..00c973a 100644
--- a/board/samsung/dts/exynos5250-smdk5250.dts
+++ b/board/samsung/dts/exynos5250-smdk5250.dts
@@ -30,6 +30,10 @@
spi2 = /spi@12d4;
spi3 = /spi@131a;
spi4 = /spi@131b;
+ mmc0 = /mmc@1220;
+ mmc1 = /mmc@1221;
+ mmc2 = /mmc@1222;
+ mmc3 = /mmc@1223;
};
sromc@1225 {
@@ -66,4 +70,24 @@
compatible = maxim,max77686_pmic;
};
};
+
+ mmc@1220 {
+ samsung,bus-width = 8;
+ samsung,timing = 1 3 3;
+ samsung,removable = 0;
+ };
+
+ mmc@1221 {
+ status = disabled;
+ };
+
+ mmc@1222 {
+ samsung,bus-width = 4;
+ samsung,timing = 1 2 3;
+ samsung,removable = 1;
+ };
+
+ mmc@1223 {
+ status = disabled;
+ };
};
diff --git a/doc/device-tree-bindings/exynos/dwmmc.txt
b/doc/device-tree-bindings/exynos/dwmmc.txt
new file mode 100644
index 000..566da3b
--- /dev/null
+++ b/doc/device-tree-bindings/exynos/dwmmc.txt
@@ -0,0 +1,54 @@
+* Exynos 5250 DWC_mobile_storage
+
+The Exynos 5250 provides DWC_mobile_storage interface which supports
+. Embedded Multimedia Cards (EMMC-version 4.5)
+. Secure Digital memory (SD mem-version 2.0)
+. Secure Digital I/O (SDIO-version 3.0)
+. Consumer Electronics Advanced Transport Architecture (CE-ATA-version 1.1)
+
+The Exynos 5250 DWC_mobile_storage provides four channels.
+SOC specific and Board specific properties are channel specific.
+
+Required SoC Specific Properties:
+
+- compatible: should be
+ - samsung,exynos5250-dwmmc: for exynos5250 platforms
+
+- reg: physical base address of the controller and length of memory mapped
+ region.
+
+- interrupts: The interrupt number to the cpu.
+
+Required Board Specific Properties:
+
+- #address-cells: should be 1.
+- #size-cells: should be 0.
+- samsung,bus-width: The width of the bus used to interface the devices
+ supported by DWC_mobile_storage (SD-MMC/EMMC/SDIO).
+ . Typically the bus width is 4 or 8.
+- samsung,timing: The timing values to be written into the
+ Drv/sample clock selection register of corresponding channel.
+ . It is comprised of 3 values corresponding to the 3 fileds
[U-Boot] [PATCH V6 03/10] DWMMC: Initialise dwmci and resolve EMMC read write issues
This patch enumerates dwmci and set auto stop command during
dwmci initialisation.
EMMC read/write is not happening in current implementation
due to improper fifo size computation. Hence modified the fifo size
computation to resolve EMMC read write issues.
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since V1:
1)Created the macros RX_WMARK_SHIFT and RX_WMARK_MASK in header file.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
1)Updated to use the macro DWMCI_CTRL_SEND_AS_CCSD instead of
the hard coded value (1 10).
Changes since V4:
1)Updated the function dwmci_send_cmd() to use get_timer() instead
of using mdelay(1).
Changes since V5:
1)Updated in response to review comments.
drivers/mmc/dw_mmc.c | 25 +
1 file changed, 17 insertions(+), 8 deletions(-)
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 4070d4e..3bd1af6 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -129,13 +129,13 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
unsigned int timeout = 10;
u32 retry = 1;
u32 mask, ctrl;
+ ulong start = get_timer(0);
while (dwmci_readl(host, DWMCI_STATUS) DWMCI_BUSY) {
- if (timeout == 0) {
+ if (get_timer(start) timeout) {
printf(Timeout on data busy\n);
return TIMEOUT;
}
- timeout--;
}
dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL);
@@ -143,7 +143,6 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
if (data)
dwmci_prepare_data(host, data);
-
dwmci_writel(host, DWMCI_CMDARG, cmd-cmdarg);
if (data)
@@ -314,7 +313,7 @@ static void dwmci_set_ios(struct mmc *mmc)
static int dwmci_init(struct mmc *mmc)
{
struct dwmci_host *host = (struct dwmci_host *)mmc-priv;
- u32 fifo_size, fifoth_val;
+ u32 fifo_size, fifoth_val, ier;
dwmci_writel(host, DWMCI_PWREN, 1);
@@ -323,6 +322,14 @@ static int dwmci_init(struct mmc *mmc)
return -1;
}
+ /* Enumerate at 400KHz */
+ dwmci_setup_bus(host, mmc-f_min);
+
+ /* Set auto stop command */
+ ier = dwmci_readl(host, DWMCI_CTRL);
+ ier |= DWMCI_CTRL_SEND_AS_CCSD;
+ dwmci_writel(host, DWMCI_CTRL, ier);
+
dwmci_writel(host, DWMCI_RINTSTS, 0x);
dwmci_writel(host, DWMCI_INTMASK, 0);
@@ -332,11 +339,13 @@ static int dwmci_init(struct mmc *mmc)
dwmci_writel(host, DWMCI_BMOD, 1);
fifo_size = dwmci_readl(host, DWMCI_FIFOTH);
- if (host-fifoth_val)
+ fifo_size = ((fifo_size RX_WMARK_MASK) RX_WMARK_SHIFT) + 1;
+ if (host-fifoth_val) {
fifoth_val = host-fifoth_val;
- else
- fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size/2 -1) |
- TX_WMARK(fifo_size/2);
+ } else {
+ fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) |
+ TX_WMARK(fifo_size / 2);
+ }
dwmci_writel(host, DWMCI_FIFOTH, fifoth_val);
dwmci_writel(host, DWMCI_CLKENA, 0);
--
1.8.0
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[U-Boot] [PATCH V6 04/10] EXYNOS5: DWMMC: Added FDT support for DWMMC
This patch adds FDT support for DWMMC, by reading the DWMMC node data
from the device tree and initialising DWMMC channels as per data
obtained from the node.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since V1:
1)Updated code to have same signature for the function
exynos_dwmci_init() for both FDT and non-FDT versions.
2)Updated code to pass device_id parameter to the function
exynos5_mmc_set_clk_div() instead of index.
3)Updated code to decode the value of samsung,width from FDT.
4)Channel index is computed instead of getting from FDT.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
1)Replaced the new function exynos5_mmc_set_clk_div() with the
existing function set_mmc_clk(). set_mmc_clk() will do the purpose.
2)Computation of FSYS block clock divisor (pre-ratio) is added.
Changes since V4:
1)Replaced unsigned int exynos_dwmmc_init(int index, int bus_width)
with
int exynos_dwmci_add_port(int, u32, inth, u32)
i)exynos_dwmmc_add_port() will be used by non-FDT boards.
ii)In FDT case, exynos_dwmmc_init(const void *blob) will use
exynos_dwmmc_add_port() for every channel enabled in device
node.
2)Changed the computation method of mmc clock divisor.
3)Updated exynos_dwmmc_init() to compute the 'clksel_val' within the
function.
Changes since V5:
1)Updated in response to review comments and changed the mmc clock value
from 50MHz to 52MHz.
arch/arm/include/asm/arch-exynos/dwmmc.h | 11 +--
drivers/mmc/exynos_dw_mmc.c | 127 ---
include/dwmmc.h | 3 +
3 files changed, 124 insertions(+), 17 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/dwmmc.h
b/arch/arm/include/asm/arch-exynos/dwmmc.h
index 8acdf9b..3b147b8 100644
--- a/arch/arm/include/asm/arch-exynos/dwmmc.h
+++ b/arch/arm/include/asm/arch-exynos/dwmmc.h
@@ -27,10 +27,7 @@
#define DWMCI_SET_DRV_CLK(x) ((x) 16)
#define DWMCI_SET_DIV_RATIO(x) ((x) 24)
-int exynos_dwmci_init(u32 regbase, int bus_width, int index);
-
-static inline unsigned int exynos_dwmmc_init(int index, int bus_width)
-{
- unsigned int base = samsung_get_base_mmc() + (0x1 * index);
- return exynos_dwmci_init(base, bus_width, index);
-}
+#ifdef CONFIG_OF_CONTROL
+int exynos_dwmmc_init(const void *blob);
+#endif
+int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel);
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 72a31b7..4238dd9 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -19,39 +19,146 @@
*/
#include common.h
-#include malloc.h
#include dwmmc.h
+#include fdtdec.h
+#include libfdt.h
+#include malloc.h
#include asm/arch/dwmmc.h
#include asm/arch/clk.h
+#include asm/arch/pinmux.h
-static char *EXYNOS_NAME = EXYNOS DWMMC;
+#defineDWMMC_MAX_CH_NUM4
+#defineDWMMC_MAX_FREQ 5200
+#defineDWMMC_MIN_FREQ 40
+#defineDWMMC_MMC0_CLKSEL_VAL 0x03030001
+#defineDWMMC_MMC2_CLKSEL_VAL 0x03020001
+/*
+ * Function used as callback function to initialise the
+ * CLKSEL register for every mmc channel.
+ */
static void exynos_dwmci_clksel(struct dwmci_host *host)
{
- u32 val;
- val = DWMCI_SET_SAMPLE_CLK(DWMCI_SHIFT_0) |
- DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) | DWMCI_SET_DIV_RATIO(0);
+ dwmci_writel(host, DWMCI_CLKSEL, host-clksel_val);
+}
- dwmci_writel(host, DWMCI_CLKSEL, val);
+unsigned int exynos_dwmci_get_clk(int dev_index)
+{
+ return get_mmc_clk(dev_index);
}
-int exynos_dwmci_init(u32 regbase, int bus_width, int index)
+/*
+ * This function adds the mmc channel to be registered with mmc core.
+ * index - mmc channel number.
+ * regbase - register base address of mmc channel specified in 'index'.
+ * bus_width - operating bus width of mmc channel specified in 'index'.
+ * clksel -value to be written into CLKSEL register in case of FDT.
+ * NULL in case od non-FDT.
+ */
+int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel)
{
struct dwmci_host *host = NULL;
+ unsigned int div;
+ unsigned long freq, sclk;
host = malloc(sizeof(struct dwmci_host));
if (!host) {
printf(dwmci_host malloc fail!\n);
return 1;
}
+ /* request mmc clock vlaue of 52MHz. */
+ freq = 5200;
+ sclk = get_mmc_clk(index);
+ div = DIV_ROUND_UP(sclk, freq);
+ /* set the clock divisor for mmc */
+ set_mmc_clk(index, div);
- host-name = EXYNOS_NAME;
+ host-name = EXYNOS
[U-Boot] [PATCH V6 05/10] EXYNOS5: DWMMC: Initialise the local variable to avoid unwanted results.
This patch initialises the local variable 'shift' to zero. The uninitialised local variable 'shift' had garbage value and was resulting in unwnated results in the functions exynos5_get_mmc_clk() and exynos4_get_mmc_clk(). Signed-off-by: Amar amarendra...@samsung.com Acked-by: Simon Glass s...@chromium.org --- Changes since V1: 1)Updated the function exynos5_mmc_set_clk_div() to receive 'device_i'd as input parameter instead of 'index'. Changes since V2: 1)Updation of commit message and resubmition of proper patch set. Changes since V3: 1)Removed the new API exynos5_mmc_set_clk_div() from clock.c, because existing API set_mmc_clk() can be used to set mmc clock. Changes since V4: 1)Updated the subject line to reflect the changes present in this patch. 2)Changes of the file arch/arm/include/asm/arch-exynos/clk.h which were present in this patch, have been moved out of this patch. Changes since V5: No change. arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 956427c..edce21c 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -490,7 +490,7 @@ static unsigned long exynos4_get_mmc_clk(int dev_index) (struct exynos4_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel, ratio, pre_ratio; - int shift; + int shift = 0; sel = readl(clk-src_fsys); sel = (sel (dev_index 2)) 0xf; @@ -539,7 +539,7 @@ static unsigned long exynos5_get_mmc_clk(int dev_index) (struct exynos5_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel, ratio, pre_ratio; - int shift; + int shift = 0; sel = readl(clk-src_fsys); sel = (sel (dev_index 2)) 0xf; -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V6 06/10] SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDT
This patch enables and initialises DWMMC for SMDK5250.
Supports both FDT and non-FDT. This patch creates a new file
'exynos5-dt.c' meant for FDT support.
exynos5-dt.c: This file shall contain all code which supports FDT.
Any addition of FDT support for any module needs to be
added in this file.
smdk5250.c: This file shall contain the code which supports non-FDT.
version. Any addition of non-FDT support for any module
needs to be added in this file.
May be, the file smdk5250.c can be removed in near
future
when non-FDT is not required.
The Makefile is updated to compile only one of the files
exynos5-dt.c / smdk5250.c based on FDT configuration.
NOTE:
Please note that all additions corresponding to FDT need to be added into the
file exynos5-dt.c.
At same time if non-FDT support is required then add the corresponding
updations into smdk5250.c.
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since V1:
1)A new file 'exynos5-dt.c' is created meant for FDT support
2)Makefile is updated to compile only one of the files
exynos5-dt.c / smdk5250.c based on FDT configuration
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)Replaced the function call 'exynos_dwmmc_init(0, 8);' with the
function exynos_dwmmc_add_port() in smdk5250.c.
2)dram_init() is updated to use for loop to compute the ram size.
3)dram_init_banksize() is updated to use for loop to initialise
the dram bank size.
4)board_uart_init() is updated to use for loop to initialise UARTS.
5)In non-FDT case NULL is passed as parameter to board_i2c_init().
Changes since V5:
1)Enabled CONFIG_LCD only for non-FDT operation.
board/samsung/smdk5250/Makefile | 4 +
board/samsung/smdk5250/exynos5-dt.c | 211
board/samsung/smdk5250/smdk5250.c | 170 ++---
include/configs/exynos5250-dt.h | 8 ++
4 files changed, 281 insertions(+), 112 deletions(-)
create mode 100644 board/samsung/smdk5250/exynos5-dt.c
diff --git a/board/samsung/smdk5250/Makefile b/board/samsung/smdk5250/Makefile
index 47c6a5a..ecca9f3 100644
--- a/board/samsung/smdk5250/Makefile
+++ b/board/samsung/smdk5250/Makefile
@@ -32,8 +32,12 @@ COBJS+= tzpc_init.o
COBJS += smdk5250_spl.o
ifndef CONFIG_SPL_BUILD
+ifdef CONFIG_OF_CONTROL
+COBJS += exynos5-dt.o
+else
COBJS += smdk5250.o
endif
+endif
ifdef CONFIG_SPL_BUILD
COBJS += spl_boot.o
diff --git a/board/samsung/smdk5250/exynos5-dt.c
b/board/samsung/smdk5250/exynos5-dt.c
new file mode 100644
index 000..a4b0e10
--- /dev/null
+++ b/board/samsung/smdk5250/exynos5-dt.c
@@ -0,0 +1,211 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include fdtdec.h
+#include asm/io.h
+#include i2c.h
+#include netdev.h
+#include spi.h
+#include asm/arch/cpu.h
+#include asm/arch/dwmmc.h
+#include asm/arch/gpio.h
+#include asm/arch/mmc.h
+#include asm/arch/pinmux.h
+#include asm/arch/sromc.h
+#include power/pmic.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+#ifdef CONFIG_EXYNOS_SPI
+ spi_init();
+#endif
+ return 0;
+}
+
+int dram_init(void)
+{
+ int i;
+ u32 addr;
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
+ addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+ gd-ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+ }
+ return 0;
+}
+
+#if defined(CONFIG_POWER)
+int power_init_board(void)
+{
+ if (pmic_init(I2C_PMIC)) {
+ debug(Could not initialise PMIC\n);
+ return -1;
+ } else
+ return 0;
+}
+#endif
+
+void dram_init_banksize(void)
+{
+ int i;
+ u32 addr, size;
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
+ addr
[U-Boot] [PATCH V6 07/10] MMC: APIs to support resize of EMMC boot partition
This patch adds APIs to access(open / close) and to resize boot partiton of
EMMC.
Signed-off-by: Amar amarendra...@samsung.com
---
Changes since V1:
New patch.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)Replaced the functions mmc_boot_open() mmc_boot_close() with a
single function mmc_boot_part_access().
Changes since V5:
1)Updated in response to review comments.
drivers/mmc/mmc.c | 132 ++
include/mmc.h | 26 +++
2 files changed, 158 insertions(+)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 72e8ce6..d3e4bf7 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1327,3 +1327,135 @@ int mmc_initialize(bd_t *bis)
return 0;
}
+
+/*
+ * This function changes the size of boot partition and the size of rpmb
+ * partition present on EMMC devices.
+ *
+ * Input Parameters:
+ * struct *mmc: pointer for the mmc device strcuture
+ * bootsize: size of boot partition
+ * rpmbsize: size of rpmb partition
+ *
+ * Returns 0 on success.
+ */
+
+int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
+ unsigned long rpmbsize)
+{
+ int err;
+ struct mmc_cmd cmd;
+
+ /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = MMC_CMD62_ARG1;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error1 = %d\n, err);
+ return err;
+ }
+
+ /* Boot partition changing mode */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = MMC_CMD62_ARG2;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error2 = %d\n, err);
+ return err;
+ }
+ /* boot partition size is multiple of 128KB */
+ bootsize = (bootsize * 1024) / 128;
+
+ /* Arg: boot partition size */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = bootsize;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error3 = %d\n, err);
+ return err;
+ }
+ /* RPMB partition size is multiple of 128KB */
+ rpmbsize = (rpmbsize * 1024) / 128;
+ /* Arg: RPMB partition size */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = rpmbsize;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error4 = %d\n, err);
+ return err;
+ }
+ return 0;
+}
+
+/*
+ * This function shall form and send the commands to open / close the
+ * boot partition specified by user.
+ *
+ * Input Parameters:
+ * ack: 0x0 - No boot acknowledge sent (default)
+ * 0x1 - Boot acknowledge sent during boot operation
+ * part_num: User selects boot data that will be sent to master
+ * 0x0 - Device not boot enabled (default)
+ * 0x1 - Boot partition 1 enabled for boot
+ * 0x2 - Boot partition 2 enabled for boot
+ * access: User selects partitions to access
+ * 0x0 : No access to boot partition (default)
+ * 0x1 : R/W boot partition 1
+ * 0x2 : R/W boot partition 2
+ * 0x3 : R/W Replay Protected Memory Block (RPMB)
+ *
+ * Returns 0 on success.
+ */
+int mmc_boot_part_access(struct mmc *mmc, u32 ack, u32 part_num, u32 access)
+{
+ int err;
+ struct mmc_cmd cmd;
+
+ /* Boot ack enable, boot partition enable , boot partition access */
+ cmd.cmdidx = MMC_CMD_SWITCH;
+ cmd.resp_type = MMC_RSP_R1b;
+
+ cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE 24) |
+ (EXT_CSD_PART_CONF 16) |
+ ((EXT_CSD_BOOT_ACK(ack) |
+ EXT_CSD_BOOT_PART_NUM(part_num) |
+ EXT_CSD_PARTITION_ACCESS(access)) 8);
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ if (access) {
+ debug(mmc boot partition#%d open failure:
+ Error1 = %d\n, part_num, err);
+ } else {
+ debug(mmc boot partition#%d close failure:
+ Error = %d\n, part_num, err);
+ }
+ return err;
+ }
+
+ if (access) {
+ /* 4bit transfer mode at booting time. */
+ cmd.cmdidx = MMC_CMD_SWITCH;
+ cmd.resp_type = MMC_RSP_R1b;
+
+ cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE 24) |
+ (EXT_CSD_BOOT_BUS_WIDTH 16) |
+ ((10
[U-Boot] [PATCH V6 08/10] SMDK5250: Enable EMMC booting
This patch adds support for EMMC booting on SMDK5250.
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since V1:
1)Updated spl_boot.c file to maintain irom pointer table
instead of using the #define values defined in header file.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)The function get_irom_func(int index) has been added to avoid
type casting at many places.
2)The changes to file arch/arm/include/asm/arch-exynos/clk.h are
included in this patch file.
Changes since V5:
No change.
arch/arm/include/asm/arch-exynos/clk.h | 3 ++
board/samsung/smdk5250/clock_init.c| 15 ++
board/samsung/smdk5250/clock_init.h| 5
board/samsung/smdk5250/spl_boot.c | 52 ++
4 files changed, 69 insertions(+), 6 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/clk.h
b/arch/arm/include/asm/arch-exynos/clk.h
index 1935b0b..a4d5b4e 100644
--- a/arch/arm/include/asm/arch-exynos/clk.h
+++ b/arch/arm/include/asm/arch-exynos/clk.h
@@ -29,6 +29,9 @@
#define VPLL 4
#define BPLL 5
+#define FSYS1_MMC0_DIV_MASK0xff0f
+#define FSYS1_MMC0_DIV_VAL 0x0701
+
unsigned long get_pll_clk(int pllreg);
unsigned long get_arm_clk(void);
unsigned long get_i2c_clk(void);
diff --git a/board/samsung/smdk5250/clock_init.c
b/board/samsung/smdk5250/clock_init.c
index c009ae5..154993c 100644
--- a/board/samsung/smdk5250/clock_init.c
+++ b/board/samsung/smdk5250/clock_init.c
@@ -28,6 +28,7 @@
#include asm/arch/clk.h
#include asm/arch/clock.h
#include asm/arch/spl.h
+#include asm/arch/dwmmc.h
#include clock_init.h
#include setup.h
@@ -664,3 +665,17 @@ void clock_init_dp_clock(void)
/* We run DP at 267 Mhz */
setbits_le32(clk-div_disp1_0, CLK_DIV_DISP1_0_FIMD1);
}
+
+/*
+ * Set clock divisor value for booting from EMMC.
+ * Set DWMMC channel-0 clk div to operate mmc0 device at 50MHz.
+ */
+void emmc_boot_clk_div_set(void)
+{
+ struct exynos5_clock *clk = (struct exynos5_clock *)EXYNOS5_CLOCK_BASE;
+ unsigned int div_mmc;
+
+ div_mmc = readl((unsigned int) clk-div_fsys1) ~FSYS1_MMC0_DIV_MASK;
+ div_mmc |= FSYS1_MMC0_DIV_VAL;
+ writel(div_mmc, (unsigned int) clk-div_fsys1);
+}
diff --git a/board/samsung/smdk5250/clock_init.h
b/board/samsung/smdk5250/clock_init.h
index f751bcb..20a1d47 100644
--- a/board/samsung/smdk5250/clock_init.h
+++ b/board/samsung/smdk5250/clock_init.h
@@ -146,4 +146,9 @@ struct mem_timings *clock_get_mem_timings(void);
* Initialize clock for the device
*/
void system_clock_init(void);
+
+/*
+ * Set clock divisor value for booting from EMMC.
+ */
+void emmc_boot_clk_div_set(void);
#endif
diff --git a/board/samsung/smdk5250/spl_boot.c
b/board/samsung/smdk5250/spl_boot.c
index d8f3c1e..4ddbd4a 100644
--- a/board/samsung/smdk5250/spl_boot.c
+++ b/board/samsung/smdk5250/spl_boot.c
@@ -23,15 +23,42 @@
#includecommon.h
#includeconfig.h
+#include asm/arch-exynos/dmc.h
+#include asm/arch/clock.h
+#include asm/arch/clk.h
+
+#include clock_init.h
+
+/* Index into irom ptr table */
+enum index {
+ MMC_INDEX,
+ EMMC44_INDEX,
+ EMMC44_END_INDEX,
+ SPI_INDEX,
+};
+
+/* IROM Function Pointers Table */
+u32 irom_ptr_table[] = {
+ [MMC_INDEX] = 0x02020030, /* iROM Function Pointer-SDMMC boot */
+ [EMMC44_INDEX] = 0x02020044,/* iROM Function Pointer-EMMC4.4 boot*/
+ [EMMC44_END_INDEX] = 0x02020048,/* iROM Function Pointer
+ -EMMC4.4 end boot operation */
+ [SPI_INDEX] = 0x02020058, /* iROM Function Pointer-SPI boot */
+ };
+
enum boot_mode {
BOOT_MODE_MMC = 4,
BOOT_MODE_SERIAL = 20,
+ BOOT_MODE_EMMC = 8, /* EMMC4.4 */
/* Boot based on Operating Mode pin settings */
BOOT_MODE_OM = 32,
BOOT_MODE_USB, /* Boot using USB download */
};
- typedef u32 (*spi_copy_func_t)(u32 offset, u32 nblock, u32 dst);
+void *get_irom_func(int index)
+{
+ return (void *) *(u32 *)irom_ptr_table[index];
+}
/*
* Copy U-boot from mmc to RAM:
@@ -40,23 +67,36 @@ enum boot_mode {
*/
void copy_uboot_to_ram(void)
{
- spi_copy_func_t spi_copy;
enum boot_mode bootmode;
- u32 (*copy_bl2)(u32, u32, u32);
-
+ u32 (*spi_copy)(u32 offset, u32 nblock, u32 dst);
+ u32 (*copy_bl2)(u32 offset, u32 nblock, u32 dst);
+ u32 (*copy_bl2_from_emmc)(u32 nblock, u32 dst);
+ void (*end_bootop_from_emmc)(void);
+ /* read Operation Mode ststus register to find the bootmode */
bootmode = readl(EXYNOS5_POWER_BASE) OM_STAT;
switch (bootmode) {
case BOOT_MODE_SERIAL:
- spi_copy = *(spi_copy_func_t *)EXYNOS_COPY_SPI_FNPTR_ADDR;
+ spi_copy = get_irom_func
[U-Boot] [PATCH V6 09/10] COMMON: MMC: Command to support EMMC booting and to resize EMMC boot partition
This patch adds commands to access(open/close) and resize boot partitions on
EMMC.
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since V1:
1)Combined the common piece of code between 'open' and 'close'
operations.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)Added a new funtion boot_part_access() to combine the common parts of
'mmc open' and 'mmc close' functionalities.
2)Used the generic function mmc_boot_part_access() instead of
two functions mmc_boot_open() and mmc_boot_close(). By doing so user
can specify which boot partition to be accessed (opened / closed).
Changes since V5:
1)Updated minor nits in response to review comments.
common/cmd_mmc.c | 98 +++-
1 file changed, 97 insertions(+), 1 deletion(-)
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 7dacd51..5f2ae70 100644
--- a/common/cmd_mmc.c
+++ b/common/cmd_mmc.c
@@ -147,6 +147,31 @@ U_BOOT_CMD(
- display info of the current MMC device
);
+static int boot_part_access(struct mmc *mmc, u32 ack, u32 part_num, u32 access)
+{
+ int err;
+ err = mmc_boot_part_access(mmc, ack, part_num, access);
+
+ if ((err == 0) (access != 0)) {
+ printf(\t\t\t!!!Notice!!!\n);
+ printf(!You must close EMMC boot Partition after all
+ images are written\n);
+ printf(!EMMC boot partition has continuity at image
+ writing time.\n);
+ printf(!So, do not close the boot partition before all
+ images are written.\n);
+ return 0;
+ } else if ((err == 0) (access == 0))
+ return 0;
+ else if ((err != 0) (access != 0)) {
+ printf(EMMC boot partition-%d OPEN Failed.\n, part_num);
+ return 1;
+ } else {
+ printf(EMMC boot partition-%d CLOSE Failed.\n, part_num);
+ return 1;
+ }
+}
+
static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
enum mmc_state state;
@@ -248,6 +273,71 @@ static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
curr_device, mmc-part_num);
return 0;
+ } else if ((strcmp(argv[1], open) == 0) ||
+ (strcmp(argv[1], close) == 0)) {
+ int dev;
+ struct mmc *mmc;
+ u32 ack, part_num, access = 0;
+
+ if (argc == 4) {
+ dev = simple_strtoul(argv[2], NULL, 10);
+ part_num = simple_strtoul(argv[3], NULL, 10);
+ } else
+ return CMD_RET_USAGE;
+
+ mmc = find_mmc_device(dev);
+ if (!mmc) {
+ printf(no mmc device at slot %x\n, dev);
+ return 1;
+ }
+
+ if (IS_SD(mmc)) {
+ printf(SD device cannot be opened/closed\n);
+ return 1;
+ }
+
+ if ((part_num = 0) || (part_num MMC_NUM_BOOT_PARTITION)) {
+ printf(Invalid boot partition number:\n);
+ printf(Boot partition number cannot be = 0\n);
+ printf(EMMC44 supports only 2 boot partitions\n);
+ return 1;
+ }
+
+ if (strcmp(argv[1], open) == 0)
+ access = part_num; /* enable R/W access to boot part*/
+ if (strcmp(argv[1], close) == 0)
+ access = 0; /* No access to boot partition */
+
+ /* acknowledge to be sent during boot operation */
+ ack = 1;
+ return boot_part_access(mmc, ack, part_num, access);
+
+ } else if (strcmp(argv[1], bootpart) == 0) {
+ int dev;
+ dev = simple_strtoul(argv[2], NULL, 10);
+
+ u32 bootsize = simple_strtoul(argv[3], NULL, 10);
+ u32 rpmbsize = simple_strtoul(argv[4], NULL, 10);
+ struct mmc *mmc = find_mmc_device(dev);
+ if (!mmc) {
+ printf(no mmc device at slot %x\n, dev);
+ return 1;
+ }
+
+ if (IS_SD(mmc)) {
+ printf(It is not a EMMC device\n);
+ return 1;
+ }
+
+ if (0 == mmc_boot_partition_size_change(mmc,
+ bootsize, rpmbsize)) {
+ printf(EMMC boot partition Size %d MB\n, bootsize);
+ printf(EMMC RPMB partition Size
[U-Boot] [PATCH V6 10/10] EXYNOS5: I2C: Added FDT and non-FDT support for I2C
This patch adds FDT and non-FDT support for I2C, and initialise
the I2C channels.
Signed-off-by: Amar amarendra...@samsung.com
---
Changes since V4:
New patch.
Changes since V5:
1)Removed the function call i2c_init() present inside the
function board_i2c_init().
drivers/i2c/s3c24x0_i2c.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index 769a2ba..5b4c3d2 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -524,11 +524,12 @@ int i2c_write(uchar chip, uint addr, int alen, uchar
*buffer, int len)
len) != 0);
}
-#ifdef CONFIG_OF_CONTROL
void board_i2c_init(const void *blob)
{
+ int i;
+#ifdef CONFIG_OF_CONTROL
int node_list[CONFIG_MAX_I2C_NUM];
- int count, i;
+ int count;
count = fdtdec_find_aliases_for_id(blob, i2c,
COMPAT_SAMSUNG_S3C2440_I2C, node_list,
@@ -548,8 +549,15 @@ void board_i2c_init(const void *blob)
bus-bus_num = i2c_busses++;
exynos_pinmux_config(bus-id, 0);
}
+#else
+ for (i = 0; i CONFIG_MAX_I2C_NUM; i++) {
+ exynos_pinmux_config((PERIPH_ID_I2C0 + i),
+ PINMUX_FLAG_NONE);
+ }
+#endif
}
+#ifdef CONFIG_OF_CONTROL
static struct s3c24x0_i2c_bus *get_bus(unsigned int bus_idx)
{
if (bus_idx i2c_busses)
--
1.8.0
___
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[U-Boot] [PATCH V5 00/10] EXYNOS5: Enable DWMMC, add FDT support for DWMMC and enable EMMC boot
This patch set enables and initialises DWMMC for Exynos5250 on SMDK5250. Adds driver changes required for DWMMC. Adds FDT support for DWMMC. Adds EMMC boot support for SMDK5250. This patch set is based on: EXYNOS: mmc: support DesignWare Controller for Samsung-SoC, which is merged in u-boot-mmc. Exynos: clock: support get_mmc_clk for exynos. Add DT based ethernet driver for SMDK5250. SMDK5250: Add FDT support present at the following link http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/149991 Changes since V1: 1)Corrected in response to review comments. 2)Created separate board files for FDT and non-FDT versions. 3)Added binding file for DWMMC device node. 4)Removed the propname 'index' from device node. 5)Prefixed the vendor name 'samsung' before propname in device node. 6)Ensured to have same signature for the function exynos_dwmci_init() for both FDT and non-FDT versions. 7)EMMC clock setting has been moved from spl_boot.c to clock_init.c. Changes since V2: 1)Updation of commit message and resubmition of proper patch set. Changes since V3: 1)Updated to use the macro DWMCI_CTRL_SEND_AS_CCSD instead of the hard coded value (1 10). 2)In the file exynos_dw_mmc.c, replaced the new function exynos5_mmc_set_clk_div() with the existing function set_mmc_clk(). set_mmc_clk() will do the purpose. 3)In the file exynos_dw_mmc.c, computation of FSYS block clock divisor (pre-ratio) value is added. 4)Removed the new function exynos5_mmc_set_clk_div() from clock.c. Changes since V4: 1)Replaced the device node name 'dwmmc' with 'mmc'. 2)Updated the function dwmci_send_cmd() to use get_timer() instead of using mdelay(1) in the file drivers/mmc/dw_mmc.c. 3)Replaced 'unsigned int exynos_dwmmc_init()' with 'int exynos_dwmci_add_port(int, u32, int, u32)'. 4)The functions dram_init(), dram_init_banksize() and board_uart_init() are updated to use for loop. 5)Replaced the functions mmc_boot_open() mmc_boot_close() with a single function mmc_boot_part_access(). 6)Added new patch which adds FDT and non-FDT support for I2C. 7)Updated in response to review comments. Amar (10): FDT: Add compatible string for DWMMC EXYNOS5: FDT: Add DWMMC device node data DWMMC: Initialise dwmci and resolve EMMC read write issues EXYNOS5: DWMMC: Added FDT support for DWMMC EXYNOS5: DWMMC: Initialise the local variable to avoid unwanted results. SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDT MMC: APIs to support resize of EMMC boot partition SMDK5250: Enable EMMC booting COMMON: MMC: Command to support EMMC booting and to resize EMMC boot partition EXYNOS5: I2C: Added FDT and non-FDT support for I2C arch/arm/cpu/armv7/exynos/clock.c | 4 +- arch/arm/dts/exynos5250.dtsi | 31 + arch/arm/include/asm/arch-exynos/clk.h| 3 + arch/arm/include/asm/arch-exynos/dwmmc.h | 11 +- board/samsung/dts/exynos5250-smdk5250.dts | 22 board/samsung/smdk5250/Makefile | 4 + board/samsung/smdk5250/clock_init.c | 15 +++ board/samsung/smdk5250/clock_init.h | 5 + board/samsung/smdk5250/exynos5-dt.c | 211 ++ board/samsung/smdk5250/smdk5250.c | 170 board/samsung/smdk5250/spl_boot.c | 52 +++- common/cmd_mmc.c | 98 +- doc/device-tree-bindings/exynos/dwmmc.txt | 49 +++ drivers/i2c/s3c24x0_i2c.c | 13 +- drivers/mmc/dw_mmc.c | 23 +++- drivers/mmc/exynos_dw_mmc.c | 127 -- drivers/mmc/mmc.c | 117 + include/configs/exynos5250-dt.h | 6 + include/dwmmc.h | 3 + include/fdtdec.h | 1 + include/mmc.h | 24 lib/fdtdec.c | 1 + 22 files changed, 843 insertions(+), 147 deletions(-) create mode 100644 board/samsung/smdk5250/exynos5-dt.c create mode 100644 doc/device-tree-bindings/exynos/dwmmc.txt -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V5 01/10] FDT: Add compatible string for DWMMC
Add required compatible information for DWMMC driver.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since V1:
No change.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
No change.
include/fdtdec.h | 1 +
lib/fdtdec.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index f77d195..fb4c33f 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -79,6 +79,7 @@ enum fdt_compat_id {
COMPAT_SAMSUNG_EXYNOS_EHCI, /* Exynos EHCI controller */
COMPAT_SAMSUNG_EXYNOS_USB_PHY, /* Exynos phy controller for usb2.0 */
COMPAT_MAXIM_MAX77686_PMIC, /* MAX77686 PMIC */
+ COMPAT_SAMSUNG_EXYNOS5_DWMMC, /* Exynos5 DWMMC controller */
COMPAT_COUNT,
};
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 16921e1..1a4763e 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -54,6 +54,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(SAMSUNG_EXYNOS_EHCI, samsung,exynos-ehci),
COMPAT(SAMSUNG_EXYNOS_USB_PHY, samsung,exynos-usb-phy),
COMPAT(MAXIM_MAX77686_PMIC, maxim,max77686_pmic),
+ COMPAT(SAMSUNG_EXYNOS5_DWMMC, samsung,exynos5250-dwmmc),
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)
--
1.8.0
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[U-Boot] [PATCH V5 02/10] EXYNOS5: FDT: Add DWMMC device node data
This patch adds DWMMC device node data for exynos5.
This patch also adds binding file for DWMMC device node.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.com
---
Changes since V1:
1)Added binding file for DWMMC device node at the location
doc/device-tree-bindings/exynos/dwmmc.txt.
2)Removed the propname 'index' from device node.
3)Prefixed the vendor name 'samsung' before propname in device node.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)Updated the doc/device-tree-bindings/exynos/dwmmc.txt with more
information regarding the property 'samsung,timing'.
2)Replaced the name 'dwmmc' with 'mmc'.
arch/arm/dts/exynos5250.dtsi | 31 +++
board/samsung/dts/exynos5250-smdk5250.dts | 22 ++
doc/device-tree-bindings/exynos/dwmmc.txt | 49 +++
3 files changed, 102 insertions(+)
create mode 100644 doc/device-tree-bindings/exynos/dwmmc.txt
diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index ed8c8dd..6c08eb7 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -151,4 +151,35 @@
};
};
+ mmc@1220 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1220 0x1000;
+ interrupts = 0 75 0;
+ };
+
+ mmc@1221 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1221 0x1000;
+ interrupts = 0 76 0;
+ };
+
+ mmc@1222 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1222 0x1000;
+ interrupts = 0 77 0;
+ };
+
+ mmc@1223 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1223 0x1000;
+ interrupts = 0 78 0;
+ };
};
diff --git a/board/samsung/dts/exynos5250-smdk5250.dts
b/board/samsung/dts/exynos5250-smdk5250.dts
index cbfab6f..1d3e42b 100644
--- a/board/samsung/dts/exynos5250-smdk5250.dts
+++ b/board/samsung/dts/exynos5250-smdk5250.dts
@@ -30,6 +30,10 @@
spi2 = /spi@12d4;
spi3 = /spi@131a;
spi4 = /spi@131b;
+ mmc0 = /mmc@1220;
+ mmc1 = /mmc@1221;
+ mmc2 = /mmc@1222;
+ mmc3 = /mmc@1223;
};
sromc@1225 {
@@ -66,4 +70,22 @@
compatible = maxim,max77686_pmic;
};
};
+
+ mmc@1220 {
+ samsung,bus-width = 8;
+ samsung,timing = 1 3 3;
+ };
+
+ mmc@1221 {
+ status = disabled;
+ };
+
+ mmc@1222 {
+ samsung,bus-width = 4;
+ samsung,timing = 1 2 3;
+ };
+
+ mmc@1223 {
+ status = disabled;
+ };
};
diff --git a/doc/device-tree-bindings/exynos/dwmmc.txt
b/doc/device-tree-bindings/exynos/dwmmc.txt
new file mode 100644
index 000..0054ace
--- /dev/null
+++ b/doc/device-tree-bindings/exynos/dwmmc.txt
@@ -0,0 +1,49 @@
+* Exynos 5250 DWC_mobile_storage
+
+The Exynos 5250 provides DWC_mobile_storage interface which supports
+. Embedded Multimedia Cards (EMMC-version 4.5)
+. Secure Digital memory (SD mem-version 2.0)
+. Secure Digital I/O (SDIO-version 3.0)
+. Consumer Electronics Advanced Transport Architecture (CE-ATA-version 1.1)
+
+The Exynos 5250 DWC_mobile_storage provides four channels.
+SOC specific and Board specific properties are channel specific.
+
+Required SoC Specific Properties:
+
+- compatible: should be
+ - samsung,exynos5250-dwmmc: for exynos5250 platforms
+
+- reg: physical base address of the controller and length of memory mapped
+ region.
+
+- interrupts: The interrupt number to the cpu.
+
+Required Board Specific Properties:
+
+- #address-cells: should be 1.
+- #size-cells: should be 0.
+- samsung,bus-width: The width of the bus used to interface the devices
+ supported by DWC_mobile_storage (SD-MMC/EMMC/SDIO).
+ . Typically the bus width is 4 or 8.
+- samsung,timing: The timing values to be written into the
+ Drv/sample clock selection register of corresponding channel.
+ . It is comprised of 3 values corresponding to the 3 fileds
+ 'SelClk_sample', 'SelClk_drv' and 'DIVRATIO' of CLKSEL register.
+ . SelClk_sample: Select sample clock among 8 shifted clocks.
+ . SelClk_drv: Select drv clock among 8 shifted clocks.
+ . DIVRATIO: Clock Divide
[U-Boot] [PATCH V5 03/10] DWMMC: Initialise dwmci and resolve EMMC read write issues
This patch enumerates dwmci and set auto stop command during
dwmci initialisation.
EMMC read/write is not happening in current implementation
due to improper fifo size computation. Hence Modified the fifo size
computation to resolve EMMC read write issues.
Signed-off-by: Amar amarendra...@samsung.com
---
Changes since V1:
1)Created the macros RX_WMARK_SHIFT and RX_WMARK_MASK in header file.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
1)Updated to use the macro DWMCI_CTRL_SEND_AS_CCSD instead of
the hard coded value (1 10).
Changes since V4:
1)Updated the function dwmci_send_cmd() to use get_timer() instead
of using mdelay(1).
drivers/mmc/dw_mmc.c | 23 ---
1 file changed, 16 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 4070d4e..391ed93 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -129,13 +129,13 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
unsigned int timeout = 10;
u32 retry = 1;
u32 mask, ctrl;
+ ulong start = get_timer(0);
while (dwmci_readl(host, DWMCI_STATUS) DWMCI_BUSY) {
- if (timeout == 0) {
+ if (get_timer(start) timeout) {
printf(Timeout on data busy\n);
return TIMEOUT;
}
- timeout--;
}
dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL);
@@ -143,7 +143,6 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
if (data)
dwmci_prepare_data(host, data);
-
dwmci_writel(host, DWMCI_CMDARG, cmd-cmdarg);
if (data)
@@ -314,7 +313,7 @@ static void dwmci_set_ios(struct mmc *mmc)
static int dwmci_init(struct mmc *mmc)
{
struct dwmci_host *host = (struct dwmci_host *)mmc-priv;
- u32 fifo_size, fifoth_val;
+ u32 fifo_size, fifoth_val, ier;
dwmci_writel(host, DWMCI_PWREN, 1);
@@ -323,6 +322,14 @@ static int dwmci_init(struct mmc *mmc)
return -1;
}
+ /* Enumerate at 400KHz */
+ dwmci_setup_bus(host, mmc-f_min);
+
+ /* Set auto stop command */
+ ier = dwmci_readl(host, DWMCI_CTRL);
+ ier |= DWMCI_CTRL_SEND_AS_CCSD;
+ dwmci_writel(host, DWMCI_CTRL, ier);
+
dwmci_writel(host, DWMCI_RINTSTS, 0x);
dwmci_writel(host, DWMCI_INTMASK, 0);
@@ -332,11 +339,13 @@ static int dwmci_init(struct mmc *mmc)
dwmci_writel(host, DWMCI_BMOD, 1);
fifo_size = dwmci_readl(host, DWMCI_FIFOTH);
+ fifo_size = ((fifo_size RX_WMARK_MASK) RX_WMARK_SHIFT) + 1;
if (host-fifoth_val)
fifoth_val = host-fifoth_val;
- else
- fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size/2 -1) |
- TX_WMARK(fifo_size/2);
+ else {
+ fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) |
+ TX_WMARK(fifo_size / 2);
+ }
dwmci_writel(host, DWMCI_FIFOTH, fifoth_val);
dwmci_writel(host, DWMCI_CLKENA, 0);
--
1.8.0
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[U-Boot] [PATCH V5 04/10] EXYNOS5: DWMMC: Added FDT support for DWMMC
This patch adds FDT support for DWMMC, by reading the DWMMC node data
from the device tree and initialising DWMMC channels as per data
obtained from the node.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.com
---
Changes since V1:
1)Updated code to have same signature for the function
exynos_dwmci_init() for both FDT and non-FDT versions.
2)Updated code to pass device_id parameter to the function
exynos5_mmc_set_clk_div() instead of index.
3)Updated code to decode the value of samsung,width from FDT.
4)Channel index is computed instead of getting from FDT.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
1)Replaced the new function exynos5_mmc_set_clk_div() with the
existing function set_mmc_clk(). set_mmc_clk() will do the purpose.
2)Computation of FSYS block clock divisor (pre-ratio) is added.
Changes since V4:
1)Replaced unsigned int exynos_dwmmc_init(int index, int bus_width)
with
int exynos_dwmci_add_port(int, u32, inth, u32)
i)exynos_dwmmc_add_port() will be used by non-FDT boards.
ii)In FDT case, exynos_dwmmc_init(const void *blob) will use
exynos_dwmmc_add_port() for every channel enabled in device
node.
2)Changed the computation method of mmc clock divisor.
3)Updated exynos_dwmmc_init() to compute the 'clksel_val' within the
function.
arch/arm/include/asm/arch-exynos/dwmmc.h | 11 +--
drivers/mmc/exynos_dw_mmc.c | 127 ---
include/dwmmc.h | 3 +
3 files changed, 124 insertions(+), 17 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/dwmmc.h
b/arch/arm/include/asm/arch-exynos/dwmmc.h
index 8acdf9b..3b147b8 100644
--- a/arch/arm/include/asm/arch-exynos/dwmmc.h
+++ b/arch/arm/include/asm/arch-exynos/dwmmc.h
@@ -27,10 +27,7 @@
#define DWMCI_SET_DRV_CLK(x) ((x) 16)
#define DWMCI_SET_DIV_RATIO(x) ((x) 24)
-int exynos_dwmci_init(u32 regbase, int bus_width, int index);
-
-static inline unsigned int exynos_dwmmc_init(int index, int bus_width)
-{
- unsigned int base = samsung_get_base_mmc() + (0x1 * index);
- return exynos_dwmci_init(base, bus_width, index);
-}
+#ifdef CONFIG_OF_CONTROL
+int exynos_dwmmc_init(const void *blob);
+#endif
+int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel);
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 72a31b7..1d09e56 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -19,39 +19,146 @@
*/
#include common.h
-#include malloc.h
#include dwmmc.h
+#include fdtdec.h
+#include libfdt.h
+#include malloc.h
#include asm/arch/dwmmc.h
#include asm/arch/clk.h
+#include asm/arch/pinmux.h
-static char *EXYNOS_NAME = EXYNOS DWMMC;
+#defineDWMMC_MAX_CH_NUM4
+#defineDWMMC_MAX_FREQ 5200
+#defineDWMMC_MIN_FREQ 40
+#defineDWMMC_MMC0_CLKSEL_VAL 0x03030001
+#defineDWMMC_MMC2_CLKSEL_VAL 0x03020001
+/*
+ * Function used as callback function to initialise the
+ * CLKSEL register for every mmc channel.
+ */
static void exynos_dwmci_clksel(struct dwmci_host *host)
{
- u32 val;
- val = DWMCI_SET_SAMPLE_CLK(DWMCI_SHIFT_0) |
- DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) | DWMCI_SET_DIV_RATIO(0);
+ dwmci_writel(host, DWMCI_CLKSEL, host-clksel_val);
+}
- dwmci_writel(host, DWMCI_CLKSEL, val);
+unsigned int exynos_dwmci_get_clk(int dev_index)
+{
+ return get_mmc_clk(dev_index);
}
-int exynos_dwmci_init(u32 regbase, int bus_width, int index)
+/*
+ * This function adds the mmc channel to be registered with mmc core.
+ * index - mmc channel number.
+ * regbase - register base address of mmc channel specified in 'index'.
+ * bus_width - operating bus width of mmc channel specified in 'index'.
+ * clksel -value to be written into CLKSEL register in case of FDT.
+ * NULL in case od non-FDT.
+ */
+int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel)
{
struct dwmci_host *host = NULL;
+ unsigned int div;
+ unsigned long freq, sclk;
host = malloc(sizeof(struct dwmci_host));
if (!host) {
printf(dwmci_host malloc fail!\n);
return 1;
}
+ /* request mmc clock vlaue of 50MHz. */
+ freq = 5000;
+ sclk = get_mmc_clk(index);
+ div = DIV_ROUND_UP(sclk, freq);
+ /* set the clock divisor for mmc */
+ set_mmc_clk(index, div);
- host-name = EXYNOS_NAME;
+ host-name = EXYNOS DWMMC;
host-ioaddr = (void *)regbase;
host-buswidth = bus_width;
+
+ if (clksel)
+ host-clksel_val = clksel;
+ else
[U-Boot] [PATCH V5 05/10] EXYNOS5: DWMMC: Initialise the local variable to avoid unwanted results.
This patch initialises the local variable 'shift' to zero. The uninitialised local variable 'shift' had garbage value and was resulting in unwnated results in the functions exynos5_get_mmc_clk() and exynos4_get_mmc_clk(). Signed-off-by: Amar amarendra...@samsung.com --- Changes since V1: 1)Updated the function exynos5_mmc_set_clk_div() to receive 'device_i'd as input parameter instead of 'index'. Changes since V2: 1)Updation of commit message and resubmition of proper patch set. Changes since V3: 1)Removed the new API exynos5_mmc_set_clk_div() from clock.c, because existing API set_mmc_clk() can be used to set mmc clock. Changes since V4: 1)Updated the subject line to reflect the changes present in this patch. 2)Changes of the file arch/arm/include/asm/arch-exynos/clk.h which were present in this patch, have been moved out of this patch. arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 956427c..edce21c 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -490,7 +490,7 @@ static unsigned long exynos4_get_mmc_clk(int dev_index) (struct exynos4_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel, ratio, pre_ratio; - int shift; + int shift = 0; sel = readl(clk-src_fsys); sel = (sel (dev_index 2)) 0xf; @@ -539,7 +539,7 @@ static unsigned long exynos5_get_mmc_clk(int dev_index) (struct exynos5_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel, ratio, pre_ratio; - int shift; + int shift = 0; sel = readl(clk-src_fsys); sel = (sel (dev_index 2)) 0xf; -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V5 06/10] SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDT
This patch enables and initialises DWMMC for SMDK5250.
Supports both FDT and non-FDT. This patch creates a new file
'exynos5-dt.c' meant for FDT support.
exynos5-dt.c: This file shall contain all code which supports FDT.
Any addition of FDT support for any module needs to be
added in this file.
smdk5250.c: This file shall contain the code which supports non-FDT.
version. Any addition of non-FDT support for any module
needs to be added in this file.
May be, the file smdk5250.c can be removed in near
future
when non-FDT is not required.
The Makefile is updated to compile only one of the files
exynos5-dt.c / smdk5250.c based on FDT configuration.
NOTE:
Please note that all additions corresponding to FDT need to be added into the
file exynos5-dt.c.
At same time if non-FDT support is required then add the corresponding
updations into smdk5250.c.
Signed-off-by: Amar amarendra...@samsung.com
---
Changes since V1:
1)A new file 'exynos5-dt.c' is created meant for FDT support
2)Makefile is updated to compile only one of the files
exynos5-dt.c / smdk5250.c based on FDT configuration
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)Replaced the function call 'exynos_dwmmc_init(0, 8);' with the
function exynos_dwmmc_add_port() in smdk5250.c.
2)dram_init() is updated to use for loop to compute the ram size.
3)dram_init_banksize() is updated to use for loop to initialise
the dram bank size.
4)board_uart_init() is updated to use for loop to initialise UARTS.
5)In non-FDT case NULL is passed as parameter to board_i2c_init().
board/samsung/smdk5250/Makefile | 4 +
board/samsung/smdk5250/exynos5-dt.c | 211
board/samsung/smdk5250/smdk5250.c | 170 ++---
include/configs/exynos5250-dt.h | 6 +
4 files changed, 279 insertions(+), 112 deletions(-)
create mode 100644 board/samsung/smdk5250/exynos5-dt.c
diff --git a/board/samsung/smdk5250/Makefile b/board/samsung/smdk5250/Makefile
index 47c6a5a..ecca9f3 100644
--- a/board/samsung/smdk5250/Makefile
+++ b/board/samsung/smdk5250/Makefile
@@ -32,8 +32,12 @@ COBJS+= tzpc_init.o
COBJS += smdk5250_spl.o
ifndef CONFIG_SPL_BUILD
+ifdef CONFIG_OF_CONTROL
+COBJS += exynos5-dt.o
+else
COBJS += smdk5250.o
endif
+endif
ifdef CONFIG_SPL_BUILD
COBJS += spl_boot.o
diff --git a/board/samsung/smdk5250/exynos5-dt.c
b/board/samsung/smdk5250/exynos5-dt.c
new file mode 100644
index 000..a4b0e10
--- /dev/null
+++ b/board/samsung/smdk5250/exynos5-dt.c
@@ -0,0 +1,211 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include fdtdec.h
+#include asm/io.h
+#include i2c.h
+#include netdev.h
+#include spi.h
+#include asm/arch/cpu.h
+#include asm/arch/dwmmc.h
+#include asm/arch/gpio.h
+#include asm/arch/mmc.h
+#include asm/arch/pinmux.h
+#include asm/arch/sromc.h
+#include power/pmic.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+#ifdef CONFIG_EXYNOS_SPI
+ spi_init();
+#endif
+ return 0;
+}
+
+int dram_init(void)
+{
+ int i;
+ u32 addr;
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
+ addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+ gd-ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+ }
+ return 0;
+}
+
+#if defined(CONFIG_POWER)
+int power_init_board(void)
+{
+ if (pmic_init(I2C_PMIC)) {
+ debug(Could not initialise PMIC\n);
+ return -1;
+ } else
+ return 0;
+}
+#endif
+
+void dram_init_banksize(void)
+{
+ int i;
+ u32 addr, size;
+
+ for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
+ addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+ size = get_ram_size((long *)addr, SDRAM_BANK_SIZE
[U-Boot] [PATCH V5 07/10] MMC: APIs to support resize of EMMC boot partition
This patch adds APIs to access(open / close) and to resize boot partiton of
EMMC.
Signed-off-by: Amar amarendra...@samsung.com
---
Changes since V1:
New patch.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)Replaced the functions mmc_boot_open() mmc_boot_close() with a
single function mmc_boot_part_access().
drivers/mmc/mmc.c | 117 ++
include/mmc.h | 24 +++
2 files changed, 141 insertions(+)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 72e8ce6..c152934 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1327,3 +1327,120 @@ int mmc_initialize(bd_t *bis)
return 0;
}
+
+int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
+ unsigned long rpmbsize)
+{
+ int err;
+ struct mmc_cmd cmd;
+
+ /* Only use this command for raw EMMC moviNAND */
+ /* Enter backdoor mode */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = MMC_CMD62_ARG1;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error1 = %d\n, err);
+ return err;
+ }
+
+ /* Boot partition changing mode */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = MMC_CMD62_ARG2;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error2 = %d\n, err);
+ return err;
+ }
+ /* boot partition size is multiple of 128KB */
+ bootsize = ((bootsize*1024)/128);
+
+ /* Arg: boot partition size */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = bootsize;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error3 = %d\n, err);
+ return err;
+ }
+ /* RPMB partition size is multiple of 128KB */
+ rpmbsize = ((rpmbsize*1024)/128);
+ /* Arg: RPMB partition size */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = rpmbsize;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error4 = %d\n, err);
+ return err;
+ }
+ return 0;
+}
+
+/* This function shall form and send the commands to open / close the
+ * boot partition specified by user.
+ *
+ * ack: 0x0 - No boot acknowledge sent (default)
+ * 0x1 - Boot acknowledge sent during boot operation
+ * part_num: User selects boot data that will be sent to master
+ * 0x0 - Device not boot enabled (default)
+ * 0x1 - Boot partition 1 enabled for boot
+ * 0x2 - Boot partition 2 enabled for boot
+ * access: User selects partitions to access
+ * 0x0 : No access to boot partition (default)
+ * 0x1 : R/W boot partition 1
+ * 0x2 : R/W boot partition 2
+ * 0x3 : R/W Replay Protected Memory Block (RPMB)
+ */
+int mmc_boot_part_access(struct mmc *mmc, u32 ack, u32 part_num, u32 access)
+{
+ int err;
+ struct mmc_cmd cmd;
+
+ /* Boot ack enable, boot partition enable , boot partition access */
+ cmd.cmdidx = MMC_CMD_SWITCH;
+ cmd.resp_type = MMC_RSP_R1b;
+
+ cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE 24 |
+ EXT_CSD_PART_CONF 16 |
+ (EXT_CSD_BOOT_ACK(ack) |
+ EXT_CSD_BOOT_PART_NUM(part_num) |
+ EXT_CSD_PARTITION_ACCESS(access)) 8);
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ if (access) {
+ debug(mmc boot partition#%d open failure:
+ Error1 = %d\n, part_num, err);
+ } else {
+ debug(mmc boot partition#%d close failure:
+ Error = %d\n, part_num, err);
+ }
+ return err;
+ }
+
+ if (access) {
+ /* 4bit transfer mode at booting time. */
+ cmd.cmdidx = MMC_CMD_SWITCH;
+ cmd.resp_type = MMC_RSP_R1b;
+
+ cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE 24|
+ EXT_CSD_BOOT_BUS_WIDTH 16|
+ ((10) 8));
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc boot partition#%d open failure:
+ Error2 = %d\n, part_num, err);
+ return err;
+ }
+ }
+ return 0;
+}
diff --git a/include/mmc.h b/include/mmc.h
index a13e2bd..fcd9c54 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -86,6
[U-Boot] [PATCH V5 08/10] SMDK5250: Enable EMMC booting
This patch adds support for EMMC booting on SMDK5250.
Signed-off-by: Amar amarendra...@samsung.com
---
Changes since V1:
1)Updated spl_boot.c file to maintain irom pointer table
instead of using the #define values defined in header file.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)The function get_irom_func(int index) has been added to avoid
type casting at many places.
2)The changes to file arch/arm/include/asm/arch-exynos/clk.h are
included in this patch file.
arch/arm/include/asm/arch-exynos/clk.h | 3 ++
board/samsung/smdk5250/clock_init.c| 15 ++
board/samsung/smdk5250/clock_init.h| 5
board/samsung/smdk5250/spl_boot.c | 52 ++
4 files changed, 69 insertions(+), 6 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/clk.h
b/arch/arm/include/asm/arch-exynos/clk.h
index 1935b0b..a4d5b4e 100644
--- a/arch/arm/include/asm/arch-exynos/clk.h
+++ b/arch/arm/include/asm/arch-exynos/clk.h
@@ -29,6 +29,9 @@
#define VPLL 4
#define BPLL 5
+#define FSYS1_MMC0_DIV_MASK0xff0f
+#define FSYS1_MMC0_DIV_VAL 0x0701
+
unsigned long get_pll_clk(int pllreg);
unsigned long get_arm_clk(void);
unsigned long get_i2c_clk(void);
diff --git a/board/samsung/smdk5250/clock_init.c
b/board/samsung/smdk5250/clock_init.c
index c009ae5..154993c 100644
--- a/board/samsung/smdk5250/clock_init.c
+++ b/board/samsung/smdk5250/clock_init.c
@@ -28,6 +28,7 @@
#include asm/arch/clk.h
#include asm/arch/clock.h
#include asm/arch/spl.h
+#include asm/arch/dwmmc.h
#include clock_init.h
#include setup.h
@@ -664,3 +665,17 @@ void clock_init_dp_clock(void)
/* We run DP at 267 Mhz */
setbits_le32(clk-div_disp1_0, CLK_DIV_DISP1_0_FIMD1);
}
+
+/*
+ * Set clock divisor value for booting from EMMC.
+ * Set DWMMC channel-0 clk div to operate mmc0 device at 50MHz.
+ */
+void emmc_boot_clk_div_set(void)
+{
+ struct exynos5_clock *clk = (struct exynos5_clock *)EXYNOS5_CLOCK_BASE;
+ unsigned int div_mmc;
+
+ div_mmc = readl((unsigned int) clk-div_fsys1) ~FSYS1_MMC0_DIV_MASK;
+ div_mmc |= FSYS1_MMC0_DIV_VAL;
+ writel(div_mmc, (unsigned int) clk-div_fsys1);
+}
diff --git a/board/samsung/smdk5250/clock_init.h
b/board/samsung/smdk5250/clock_init.h
index f751bcb..20a1d47 100644
--- a/board/samsung/smdk5250/clock_init.h
+++ b/board/samsung/smdk5250/clock_init.h
@@ -146,4 +146,9 @@ struct mem_timings *clock_get_mem_timings(void);
* Initialize clock for the device
*/
void system_clock_init(void);
+
+/*
+ * Set clock divisor value for booting from EMMC.
+ */
+void emmc_boot_clk_div_set(void);
#endif
diff --git a/board/samsung/smdk5250/spl_boot.c
b/board/samsung/smdk5250/spl_boot.c
index d8f3c1e..4ddbd4a 100644
--- a/board/samsung/smdk5250/spl_boot.c
+++ b/board/samsung/smdk5250/spl_boot.c
@@ -23,15 +23,42 @@
#includecommon.h
#includeconfig.h
+#include asm/arch-exynos/dmc.h
+#include asm/arch/clock.h
+#include asm/arch/clk.h
+
+#include clock_init.h
+
+/* Index into irom ptr table */
+enum index {
+ MMC_INDEX,
+ EMMC44_INDEX,
+ EMMC44_END_INDEX,
+ SPI_INDEX,
+};
+
+/* IROM Function Pointers Table */
+u32 irom_ptr_table[] = {
+ [MMC_INDEX] = 0x02020030, /* iROM Function Pointer-SDMMC boot */
+ [EMMC44_INDEX] = 0x02020044,/* iROM Function Pointer-EMMC4.4 boot*/
+ [EMMC44_END_INDEX] = 0x02020048,/* iROM Function Pointer
+ -EMMC4.4 end boot operation */
+ [SPI_INDEX] = 0x02020058, /* iROM Function Pointer-SPI boot */
+ };
+
enum boot_mode {
BOOT_MODE_MMC = 4,
BOOT_MODE_SERIAL = 20,
+ BOOT_MODE_EMMC = 8, /* EMMC4.4 */
/* Boot based on Operating Mode pin settings */
BOOT_MODE_OM = 32,
BOOT_MODE_USB, /* Boot using USB download */
};
- typedef u32 (*spi_copy_func_t)(u32 offset, u32 nblock, u32 dst);
+void *get_irom_func(int index)
+{
+ return (void *) *(u32 *)irom_ptr_table[index];
+}
/*
* Copy U-boot from mmc to RAM:
@@ -40,23 +67,36 @@ enum boot_mode {
*/
void copy_uboot_to_ram(void)
{
- spi_copy_func_t spi_copy;
enum boot_mode bootmode;
- u32 (*copy_bl2)(u32, u32, u32);
-
+ u32 (*spi_copy)(u32 offset, u32 nblock, u32 dst);
+ u32 (*copy_bl2)(u32 offset, u32 nblock, u32 dst);
+ u32 (*copy_bl2_from_emmc)(u32 nblock, u32 dst);
+ void (*end_bootop_from_emmc)(void);
+ /* read Operation Mode ststus register to find the bootmode */
bootmode = readl(EXYNOS5_POWER_BASE) OM_STAT;
switch (bootmode) {
case BOOT_MODE_SERIAL:
- spi_copy = *(spi_copy_func_t *)EXYNOS_COPY_SPI_FNPTR_ADDR;
+ spi_copy = get_irom_func(SPI_INDEX);
spi_copy(SPI_FLASH_UBOOT_POS, CONFIG_BL2_SIZE
[U-Boot] [PATCH V5 09/10] COMMON: MMC: Command to support EMMC booting and to resize EMMC boot partition
This patch adds commands to access(open/close) and resize boot partitions on
EMMC.
Signed-off-by: Amar amarendra...@samsung.com
---
Changes since V1:
1)Combined the common piece of code between 'open' and 'close'
operations.
Changes since V2:
1)Updation of commit message and resubmition of proper patch set.
Changes since V3:
No change.
Changes since V4:
1)Added a new funtion boot_part_access() to combine the common parts of
'mmc open' and 'mmc close' functionalities.
2)Used the generic function mmc_boot_part_access() instead of
two functions mmc_boot_open() and mmc_boot_close(). By doing so user
can specify which boot partition to be accessed (opened / closed).
common/cmd_mmc.c | 98 +++-
1 file changed, 97 insertions(+), 1 deletion(-)
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 7dacd51..d036d34 100644
--- a/common/cmd_mmc.c
+++ b/common/cmd_mmc.c
@@ -147,6 +147,31 @@ U_BOOT_CMD(
- display info of the current MMC device
);
+static int boot_part_access(struct mmc *mmc, u32 ack, u32 part_num, u32 access)
+{
+ int err;
+ err = mmc_boot_part_access(mmc, ack, part_num, access);
+
+ if ((err == 0) (access != 0)) {
+ printf(\t\t\t!!!Notice!!!\n);
+ printf(!You must close EMMC boot Partition after all
+ images are written\n);
+ printf(!EMMC boot partition has continuity at image
+ writing time.\n);
+ printf(!So, Do not close boot partition, Before, all
+ images are written.\n);
+ return 0;
+ } else if ((err == 0) (access == 0))
+ return 0;
+ else if ((err != 0) (access != 0)) {
+ printf(EMMC boot partition-%d OPEN Failed.\n, part_num);
+ return 1;
+ } else {
+ printf(EMMC boot partition-%d CLOSE Failed.\n, part_num);
+ return 1;
+ }
+}
+
static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
enum mmc_state state;
@@ -248,6 +273,71 @@ static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
curr_device, mmc-part_num);
return 0;
+ } else if ((strcmp(argv[1], open) == 0) ||
+ (strcmp(argv[1], close) == 0)) {
+ int dev;
+ struct mmc *mmc;
+ u32 ack, part_num, access = 0;
+
+ if (argc == 4) {
+ dev = simple_strtoul(argv[2], NULL, 10);
+ part_num = simple_strtoul(argv[3], NULL, 10);
+ } else
+ return CMD_RET_USAGE;
+
+ mmc = find_mmc_device(dev);
+ if (!mmc) {
+ printf(no mmc device at slot %x\n, dev);
+ return 1;
+ }
+
+ if (IS_SD(mmc)) {
+ printf(SD device cannot be opened/closed\n);
+ return 1;
+ }
+
+ if ((part_num = 0) || (part_num MMC_NUM_BOOT_PARTITION)) {
+ printf(Invalid boot partition number:\n);
+ printf(Boot partition number cannot be = 0\n);
+ printf(EMMC44 supports only 2 boot partitions\n);
+ return 1;
+ }
+
+ if (strcmp(argv[1], open) == 0)
+ access = part_num; /* enable R/W access to boot part*/
+ if (strcmp(argv[1], close) == 0)
+ access = 0; /* No access to boot partition */
+
+ /* acknowledge to be sent during boot operation */
+ ack = 1;
+ return boot_part_access(mmc, ack, part_num, access);
+
+ } else if (strcmp(argv[1], bootpart) == 0) {
+ int dev;
+ dev = simple_strtoul(argv[2], NULL, 10);
+
+ u32 bootsize = simple_strtoul(argv[3], NULL, 10);
+ u32 rpmbsize = simple_strtoul(argv[4], NULL, 10);
+ struct mmc *mmc = find_mmc_device(dev);
+ if (!mmc) {
+ printf(no mmc device at slot %x\n, dev);
+ return 1;
+ }
+
+ if (IS_SD(mmc)) {
+ printf(It is not a EMMC device\n);
+ return 1;
+ }
+
+ if (0 == mmc_boot_partition_size_change(mmc,
+ bootsize, rpmbsize)) {
+ printf(EMMC boot partition Size %d MB\n, bootsize);
+ printf(EMMC RPMB partition Size %d MB\n, rpmbsize);
+ return 0;
+ } else {
+ printf(EMMC boot
[U-Boot] [PATCH V5 10/10] EXYNOS5: I2C: Added FDT and non-FDT support for I2C
This patch adds FDT and non-FDT support for I2C, and initialise
the I2C channels.
Signed-off-by: Amar amarendra...@samsung.com
---
Changes since V4:
New patch.
drivers/i2c/s3c24x0_i2c.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index 769a2ba..f2a035c 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -524,11 +524,12 @@ int i2c_write(uchar chip, uint addr, int alen, uchar
*buffer, int len)
len) != 0);
}
-#ifdef CONFIG_OF_CONTROL
void board_i2c_init(const void *blob)
{
+ int i;
+#ifdef CONFIG_OF_CONTROL
int node_list[CONFIG_MAX_I2C_NUM];
- int count, i;
+ int count;
count = fdtdec_find_aliases_for_id(blob, i2c,
COMPAT_SAMSUNG_S3C2440_I2C, node_list,
@@ -548,8 +549,16 @@ void board_i2c_init(const void *blob)
bus-bus_num = i2c_busses++;
exynos_pinmux_config(bus-id, 0);
}
+#else
+ for (i = 0; i CONFIG_MAX_I2C_NUM; i++) {
+ exynos_pinmux_config((PERIPH_ID_I2C0 + i),
+ PINMUX_FLAG_NONE);
+ }
+#endif
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
}
+#ifdef CONFIG_OF_CONTROL
static struct s3c24x0_i2c_bus *get_bus(unsigned int bus_idx)
{
if (bus_idx i2c_busses)
--
1.8.0
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V4 3/9] DWMMC: Initialise dwmci and resolve EMMC read write issues
This patch enumerates dwmci and set auto stop command during
dwmci initialisation.
EMMC read/write is not happening in current implementation
due to improper fifo size computation. Hence Modified the fifo size
computation to resolve EMMC read write issues.
Changes from V1:
1)Created the macros RX_WMARK_SHIFT and RX_WMARK_MASK in header file.
Changes from V2:
1)Updation of commit message and resubmition of proper patch set.
Changes from V3:
1)Updated to use the macro DWMCI_CTRL_SEND_AS_CCSD instead of
the hard coded value (1 10).
Signed-off-by: Amar amarendra...@samsung.com
---
drivers/mmc/dw_mmc.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 4070d4e..776fdb6 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -136,6 +136,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
return TIMEOUT;
}
timeout--;
+ mdelay(1);
}
dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL);
@@ -314,7 +315,7 @@ static void dwmci_set_ios(struct mmc *mmc)
static int dwmci_init(struct mmc *mmc)
{
struct dwmci_host *host = (struct dwmci_host *)mmc-priv;
- u32 fifo_size, fifoth_val;
+ u32 fifo_size, fifoth_val, ier;
dwmci_writel(host, DWMCI_PWREN, 1);
@@ -323,6 +324,14 @@ static int dwmci_init(struct mmc *mmc)
return -1;
}
+ /* Enumerate at 400KHz */
+ dwmci_setup_bus(host, mmc-f_min);
+
+ /* Set auto stop command */
+ ier = dwmci_readl(host, DWMCI_CTRL);
+ ier |= DWMCI_CTRL_SEND_AS_CCSD;
+ dwmci_writel(host, DWMCI_CTRL, ier);
+
dwmci_writel(host, DWMCI_RINTSTS, 0x);
dwmci_writel(host, DWMCI_INTMASK, 0);
@@ -332,10 +341,11 @@ static int dwmci_init(struct mmc *mmc)
dwmci_writel(host, DWMCI_BMOD, 1);
fifo_size = dwmci_readl(host, DWMCI_FIFOTH);
+ fifo_size = ((fifo_size RX_WMARK_MASK) RX_WMARK_SHIFT) + 1;
if (host-fifoth_val)
fifoth_val = host-fifoth_val;
else
- fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size/2 -1) |
+ fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size/2 - 1) |
TX_WMARK(fifo_size/2);
dwmci_writel(host, DWMCI_FIFOTH, fifoth_val);
--
1.8.0
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[U-Boot] [PATCH V4 0/9] EXYNOS5: Enable DWMMC, add FDT support for DWMMC and
This patch set enables and initialises DWMMC for Exynos5250 on SMDK5250. Adds driver changes required for DWMMC. Adds FDT support for DWMMC. Adds EMMC boot support for SMDK5250. This patch set is based on: EXYNOS: mmc: support DesignWare Controller for Samsung-SoC, which is merged in u-boot-mmc. Exynos: clock: support get_mmc_clk for exynos. Add DT based ethernet driver for SMDK5250. SMDK5250: Add FDT support present at the following link http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/149991 Changes from V1: 1)Corrected in response to review comments. 2)Created separate board files for FDT and non-FDT versions. 3)Added binding file for DWMMC device node. 4)Removed the propname 'index' from device node. 5)Prefixed the vendor name 'samsung' before propname in device node. 6)Ensured to have same signature for the function exynos_dwmci_init() for both FDT and non-FDT versions. 7)EMMC clock setting has been moved from spl_boot.c to clock_init.c. Changes from V2: 1)Updation of commit message and resubmition of proper patch set. Changes from V3: 1)Updated to use the macro DWMCI_CTRL_SEND_AS_CCSD instead of the hard coded value (1 10). 2)In the file exynos_dw_mmc.c, replaced the new function exynos5_mmc_set_clk_div() with the existing function set_mmc_clk(). set_mmc_clk() will do the purpose. 3)In the file exynos_dw_mmc.c, computation of FSYS block clock divisor (pre-ratio) value is added. 4)Removed the new function exynos5_mmc_set_clk_div() from clock.c. Amar (9): FDT: Add compatible string for DWMMC EXYNOS5: FDT: Add DWMMC device node data DWMMC: Initialise dwmci and resolve EMMC read write issues EXYNOS5: DWMMC: Added FDT support for DWMMC EXYNOS5: DWMMC: API to set mmc clock divisor SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDT MMC: APIs to support resize of EMMC boot partition SMDK5250: Enable EMMC booting COMMON: MMC: Command to support EMMC booting and to arch/arm/cpu/armv7/exynos/clock.c | 4 +- arch/arm/dts/exynos5250.dtsi | 32 arch/arm/include/asm/arch-exynos/clk.h| 3 + arch/arm/include/asm/arch-exynos/dwmmc.h | 4 + board/samsung/dts/exynos5250-smdk5250.dts | 22 +++ board/samsung/smdk5250/Makefile | 4 + board/samsung/smdk5250/clock_init.c | 15 ++ board/samsung/smdk5250/clock_init.h | 5 + board/samsung/smdk5250/exynos5-dt.c | 242 ++ board/samsung/smdk5250/smdk5250.c | 97 ++-- board/samsung/smdk5250/spl_boot.c | 52 ++- common/cmd_mmc.c | 84 ++- doc/device-tree-bindings/exynos/dwmmc.txt | 29 drivers/mmc/dw_mmc.c | 14 +- drivers/mmc/exynos_dw_mmc.c | 129 +++- drivers/mmc/mmc.c | 118 +++ include/configs/exynos5250-dt.h | 2 + include/dwmmc.h | 4 + include/fdtdec.h | 1 + include/i2c.h | 2 + include/mmc.h | 16 ++ lib/fdtdec.c | 1 + 22 files changed, 806 insertions(+), 74 deletions(-) create mode 100644 board/samsung/smdk5250/exynos5-dt.c create mode 100644 doc/device-tree-bindings/exynos/dwmmc.txt -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V4 6/9] SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDT
This patch enables and initialises DWMMC for SMDK5250.
Supports both FDT and non-FDT. This patch creates a new file
'exynos5-dt.c' meant for FDT support.
exynos5-dt.c: This file shall contain all code which supports FDT.
Any addition of FDT support for any module needs to be
added in this file.
smdk5250.c: This file shall contain the code which supports non-FDT.
version. Any addition of non-FDT support for any module
needs to be added in this file.
May be, the file smdk5250.c can be removed in near
future
when non-FDT is not required.
The Makefile is updated to compile only one of the files
exynos5-dt.c / smdk5250.c based on FDT configuration.
NOTE:
Please note that all additions corresponding to FDT need to be added into the
file exynos5-dt.c.
At same time if non-FDT support is required then add the corresponding
updations into smdk5250.c.
Changes from V1:
1)A new file 'exynos5-dt.c' is created meant for FDT support
2)Makefile is updated to compile only one of the files
exynos5-dt.c / smdk5250.c based on FDT configuration
Changes from V2:
1)Updation of commit message and resubmition of proper patch set.
Changes from V3:
No change.
Signed-off-by: Amar amarendra...@samsung.com
---
board/samsung/smdk5250/Makefile | 4 +
board/samsung/smdk5250/exynos5-dt.c | 242
board/samsung/smdk5250/smdk5250.c | 97 +++
include/configs/exynos5250-dt.h | 2 +
include/i2c.h | 2 +
5 files changed, 292 insertions(+), 55 deletions(-)
create mode 100644 board/samsung/smdk5250/exynos5-dt.c
diff --git a/board/samsung/smdk5250/Makefile b/board/samsung/smdk5250/Makefile
index 47c6a5a..ecca9f3 100644
--- a/board/samsung/smdk5250/Makefile
+++ b/board/samsung/smdk5250/Makefile
@@ -32,8 +32,12 @@ COBJS+= tzpc_init.o
COBJS += smdk5250_spl.o
ifndef CONFIG_SPL_BUILD
+ifdef CONFIG_OF_CONTROL
+COBJS += exynos5-dt.o
+else
COBJS += smdk5250.o
endif
+endif
ifdef CONFIG_SPL_BUILD
COBJS += spl_boot.o
diff --git a/board/samsung/smdk5250/exynos5-dt.c
b/board/samsung/smdk5250/exynos5-dt.c
new file mode 100644
index 000..da539ca
--- /dev/null
+++ b/board/samsung/smdk5250/exynos5-dt.c
@@ -0,0 +1,242 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include fdtdec.h
+#include asm/io.h
+#include i2c.h
+#include netdev.h
+#include spi.h
+#include asm/arch/cpu.h
+#include asm/arch/dwmmc.h
+#include asm/arch/gpio.h
+#include asm/arch/mmc.h
+#include asm/arch/pinmux.h
+#include asm/arch/sromc.h
+#include power/pmic.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+#ifdef CONFIG_EXYNOS_SPI
+ spi_init();
+#endif
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd-ram_size= get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_5, PHYS_SDRAM_7_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_6, PHYS_SDRAM_7_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_7, PHYS_SDRAM_7_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_8, PHYS_SDRAM_8_SIZE);
+ return 0;
+}
+
+#if defined(CONFIG_POWER)
+int power_init_board(void)
+{
+ if (pmic_init(I2C_PMIC))
+ return -1;
+ else
+ return 0;
+}
+#endif
+
+void dram_init_banksize(void)
+{
+ gd-bd-bi_dram[0].start = PHYS_SDRAM_1;
+ gd-bd-bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1,
+ PHYS_SDRAM_1_SIZE);
+ gd-bd-bi_dram[1].start = PHYS_SDRAM_2;
+ gd-bd-bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2
[U-Boot] [PATCH V4 1/9] FDT: Add compatible string for DWMMC
Add required compatible information for DWMMC driver.
Changes from V1:
No change.
Changes from V2:
1)Updation of commit message and resubmition of proper patch set.
Changes from V3:
No change.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
include/fdtdec.h | 1 +
lib/fdtdec.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index ce10bf4..dcd4142 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -76,6 +76,7 @@ enum fdt_compat_id {
COMPAT_SAMSUNG_EXYNOS5_SOUND, /* Exynos Sound */
COMPAT_WOLFSON_WM8994_CODEC,/* Wolfson WM8994 Sound Codec */
COMPAT_SAMSUNG_EXYNOS_SPI, /* Exynos SPI */
+ COMPAT_SAMSUNG_EXYNOS5_DWMMC, /* Exynos5 DWMMC controller */
COMPAT_COUNT,
};
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index aa75710..646d5d6 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -51,6 +51,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(SAMSUNG_EXYNOS5_SOUND, samsung,exynos-sound),
COMPAT(WOLFSON_WM8994_CODEC, wolfson,wm8994-codec),
COMPAT(SAMSUNG_EXYNOS_SPI, samsung,exynos-spi),
+ COMPAT(SAMSUNG_EXYNOS5_DWMMC, samsung,exynos5250-dwmmc),
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)
--
1.8.0
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[U-Boot] [PATCH V4 7/9] MMC: APIs to support resize of EMMC boot partition
This patch adds APIs to open, close and to resize boot partiton for EMMC.
Changes from V1:
New patch.
Changes from V2:
1)Updation of commit message and resubmition of proper patch set.
Changes from V3:
No change.
Signed-off-by: Amar amarendra...@samsung.com
---
drivers/mmc/mmc.c | 118 ++
include/mmc.h | 16
2 files changed, 134 insertions(+)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 72e8ce6..8175b49 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1327,3 +1327,121 @@ int mmc_initialize(bd_t *bis)
return 0;
}
+
+int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
+ unsigned long rpmbsize)
+{
+ int err;
+ struct mmc_cmd cmd;
+
+ /* Only use this command for raw EMMC moviNAND */
+ /* Enter backdoor mode */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = MMC_CMD62_ARG1;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error1 = %d\n, err);
+ return err;
+ }
+
+ /* Boot partition changing mode */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = MMC_CMD62_ARG2;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error2 = %d\n, err);
+ return err;
+ }
+ /* boot partition size is multiple of 128KB */
+ bootsize = ((bootsize*1024)/128);
+
+ /* Arg: boot partition size */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = bootsize;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error3 = %d\n, err);
+ return err;
+ }
+ /* RPMB partition size is multiple of 128KB */
+ rpmbsize = ((rpmbsize*1024)/128);
+ /* Arg: RPMB partition size */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = rpmbsize;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error4 = %d\n, err);
+ return err;
+ }
+ return 0;
+}
+
+int mmc_boot_open(struct mmc *mmc)
+{
+ int err;
+ struct mmc_cmd cmd;
+
+ /* Boot ack enable, boot partition enable , boot partition access */
+ cmd.cmdidx = MMC_CMD_SWITCH;
+ cmd.resp_type = MMC_RSP_R1b;
+
+ cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE 24 |
+ EXT_CSD_PART_CONF 16 |
+ (EXT_CSD_BOOT_ACK_ENABLE |
+ EXT_CSD_BOOT_PARTITION_ENABLE |
+ EXT_CSD_PARTITION_ACCESS_ENABLE) 8);
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_open: Error1 = %d\n, err);
+ return err;
+ }
+
+ /* 4bit transfer mode at booting time. */
+ cmd.cmdidx = MMC_CMD_SWITCH;
+ cmd.resp_type = MMC_RSP_R1b;
+
+ cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE 24|
+ EXT_CSD_BOOT_BUS_WIDTH 16|
+ ((10) 8));
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_open: Error2 = %d\n, err);
+ return err;
+ }
+
+ return 0;
+}
+
+int mmc_boot_close(struct mmc *mmc)
+{
+ int err;
+ struct mmc_cmd cmd;
+
+ /* Boot ack enable, boot partition enable , boot partition access */
+ cmd.cmdidx = MMC_CMD_SWITCH;
+ cmd.resp_type = MMC_RSP_R1b;
+
+ cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE 24|
+ EXT_CSD_PART_CONF 16|
+ (EXT_CSD_BOOT_ACK_ENABLE |
+ EXT_CSD_BOOT_PARTITION_ENABLE |
+ EXT_CSD_PARTITION_ACCESS_DISABLE) 8);
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_close: Error = %d\n, err);
+ return err;
+ }
+
+ return 0;
+}
diff --git a/include/mmc.h b/include/mmc.h
index a13e2bd..999f0a3 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -86,6 +86,11 @@
#define MMC_CMD_APP_CMD55
#define MMC_CMD_SPI_READ_OCR 58
#define MMC_CMD_SPI_CRC_ON_OFF 59
+#define MMC_CMD_RES_MAN62
+
+#define MMC_CMD62_ARG1 0xefac62ec
+#define MMC_CMD62_ARG2 0xcbaea7
+
#define SD_CMD_SEND_RELATIVE_ADDR 3
#define SD_CMD_SWITCH_FUNC 6
@@ -153,6 +158,7 @@
*/
#define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */
#define EXT_CSD_ERASE_GROUP_DEF175 /* R/W */
+#define EXT_CSD_BOOT_BUS_WIDTH 177
#define EXT_CSD_PART_CONF 179 /* R/W
[U-Boot] [PATCH V4 9/9] COMMON: MMC: Command to support EMMC booting and to
This patch adds commands to open, close and resize boot partitions on EMMC.
Changes from V1:
1)Combined the common piece of code between 'open' and 'close'
operations.
Changes from V2:
1)Updation of commit message and resubmition of proper patch set.
Changes from V3:
No change.
Signed-off-by: Amar amarendra...@samsung.com
---
common/cmd_mmc.c | 84 +++-
1 file changed, 83 insertions(+), 1 deletion(-)
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 7dacd51..1dabb5b 100644
--- a/common/cmd_mmc.c
+++ b/common/cmd_mmc.c
@@ -248,6 +248,84 @@ static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
curr_device, mmc-part_num);
return 0;
+ } else if ((strcmp(argv[1], open) == 0) ||
+ (strcmp(argv[1], close) == 0)) {
+ int dev;
+ struct mmc *mmc;
+
+ if (argc == 2)
+ dev = curr_device;
+ else if (argc == 3)
+ dev = simple_strtoul(argv[2], NULL, 10);
+ else
+ return CMD_RET_USAGE;
+
+ mmc = find_mmc_device(dev);
+ if (!mmc) {
+ printf(no mmc device at slot %x\n, dev);
+ return 1;
+ }
+
+ if (IS_SD(mmc)) {
+ printf(SD device cannot be opened/closed\n);
+ return 1;
+ }
+
+ if (strcmp(argv[1], open) == 0) {
+ if (!(mmc_boot_open(mmc))) {
+ printf(EMMC OPEN Success.\n);
+ printf(\t\t\t!!!Notice!!!\n);
+ printf(!You must close EMMC
+boot Partition after all
+images are written\n);
+ printf(!EMMC boot partition
+has continuity at
+image writing time.\n);
+ printf(!So, Do not close boot
+partition, Before, all
+images are written.\n);
+ return 0;
+ } else {
+ printf(EMMC OPEN Failed.\n);
+ return 1;
+ }
+ }
+
+ if (strcmp(argv[1], close) == 0) {
+ if (!(mmc_boot_close(mmc))) {
+ printf(EMMC CLOSE Success.\n);
+ return 0;
+ } else {
+ printf(EMMC CLOSE Failed.\n);
+ return 1;
+ }
+ }
+ } else if (strcmp(argv[1], bootpart) == 0) {
+ int dev;
+ dev = simple_strtoul(argv[2], NULL, 10);
+
+ u32 bootsize = simple_strtoul(argv[3], NULL, 10);
+ u32 rpmbsize = simple_strtoul(argv[4], NULL, 10);
+ struct mmc *mmc = find_mmc_device(dev);
+ if (!mmc) {
+ printf(no mmc device at slot %x\n, dev);
+ return 1;
+ }
+
+ if (IS_SD(mmc)) {
+ printf(It is not a EMMC device\n);
+ return 1;
+ }
+
+ if (0 == mmc_boot_partition_size_change(mmc,
+ bootsize, rpmbsize)) {
+ printf(EMMC boot partition Size %d MB\n, bootsize);
+ printf(EMMC RPMB partition Size %d MB\n, rpmbsize);
+ return 0;
+ } else {
+ printf(EMMC boot partition Size change Failed.\n);
+ return 1;
+ }
}
state = MMC_INVALID;
@@ -317,5 +395,9 @@ U_BOOT_CMD(
mmc rescan\n
mmc part - lists available partition on current mmc device\n
mmc dev [dev] [part] - show or set current mmc device [partition]\n
- mmc list - lists available devices);
+ mmc list - lists available devices\n
+ mmc open device num - opens the specified device\n
+ mmc close device num - closes the specified device\n
+ mmc bootpart device num boot part size MB RPMB part size MB\n
+- change sizes of boot and RPMB partions of specified device\n);
#endif
--
1.8.0
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[U-Boot] [PATCH V4 2/9] EXYNOS5: FDT: Add DWMMC device node data
This patch adds DWMMC device node data for exynos5.
This patch also adds binding file for DWMMC device node.
Changes from V1:
1)Added binding file for DWMMC device node at the location
doc/device-tree-bindings/exynos/dwmmc.txt.
2)Removed the propname 'index' from device node.
3)Prefixed the vendor name 'samsung' before propname in device node.
Changes from V2:
1)Updation of commit message and resubmition of proper patch set.
Changes from V3:
No change.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.comX
---
arch/arm/dts/exynos5250.dtsi | 32 +++
board/samsung/dts/exynos5250-smdk5250.dts | 22 +
doc/device-tree-bindings/exynos/dwmmc.txt | 29
3 files changed, 83 insertions(+)
create mode 100644 doc/device-tree-bindings/exynos/dwmmc.txt
diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index 1008797..b701ae5 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -138,4 +138,36 @@
reg = 0x131b 0x30;
interrupts = 0 130 0;
};
+
+ dwmmc@1220 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1220 0x1000;
+ interrupts = 0 75 0;
+ };
+
+ dwmmc@1221 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1221 0x1000;
+ interrupts = 0 76 0;
+ };
+
+ dwmmc@1222 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1222 0x1000;
+ interrupts = 0 77 0;
+ };
+
+ dwmmc@1223 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1223 0x1000;
+ interrupts = 0 78 0;
+ };
};
diff --git a/board/samsung/dts/exynos5250-smdk5250.dts
b/board/samsung/dts/exynos5250-smdk5250.dts
index a8e62da..9baf622 100644
--- a/board/samsung/dts/exynos5250-smdk5250.dts
+++ b/board/samsung/dts/exynos5250-smdk5250.dts
@@ -30,6 +30,10 @@
spi2 = /spi@12d4;
spi3 = /spi@131a;
spi4 = /spi@131b;
+ dwmmc0 = /dwmmc@1220;
+ dwmmc1 = /dwmmc@1221;
+ dwmmc2 = /dwmmc@1222;
+ dwmmc3 = /dwmmc@1223;
};
sromc@1225 {
@@ -59,4 +63,22 @@
compatible = wolfson,wm8994-codec;
};
};
+
+ dwmmc@1220 {
+ samsung,bus-width = 8;
+ samsung,timing = 1 3 3;
+ };
+
+ dwmmc@1221 {
+ status = disabled;
+ };
+
+ dwmmc@1222 {
+ samsung,bus-width = 4;
+ samsung,timing = 1 2 3;
+ };
+
+ dwmmc@1223 {
+ status = disabled;
+ };
};
diff --git a/doc/device-tree-bindings/exynos/dwmmc.txt
b/doc/device-tree-bindings/exynos/dwmmc.txt
new file mode 100644
index 000..6232ad6
--- /dev/null
+++ b/doc/device-tree-bindings/exynos/dwmmc.txt
@@ -0,0 +1,29 @@
+* Exynos 5250 DWC_mobile_storage
+
+The Exynos 5250 provides DWC_mobile_storage interface which supports
+. Embedded Multimedia Cards (EMMC-version 4.5)
+. Secure Digital memory (SD mem-version 2.0)
+. Secure Digital I/O (SDIO-version 3.0)
+. Consumer Electronics Advanced Transport Architecture (CE-ATA-version 1.1)
+
+The Exynos 5250 DWC_mobile_storage provides four channels.
+SOC specific and Board specific properties are channel specific.
+
+Required SoC Specific Properties:
+
+- compatible: should be
+ - samsung,exynos5250-dwmmc: for exynos5250 platforms
+
+- reg: physical base address of the controller and length of memory mapped
+ region.
+
+- interrupts: The interrupt number to the cpu.
+
+Required Board Specific Properties:
+
+- #address-cells: should be 1.
+- #size-cells: should be 0.
+- samsung,bus-width: The width of the bus used to interface the devices
+ supported by DWC_mobile_storage (SD-MMC/EMMC/SDIO).
+- samsung,timing: The timing values to be written into the
+ Drv/sample clock selection register of corresponding channel.
--
1.8.0
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[U-Boot] [PATCH V4 4/9] EXYNOS5: DWMMC: Added FDT support for DWMMC
This patch adds FDT support for DWMMC, by reading the DWMMC node data
from the device tree and initialising DWMMC channels as per data
obtained from the node.
Changes from V1:
1)Updated code to have same signature for the function
exynos_dwmci_init() for both FDT and non-FDT versions.
2)Updated code to pass device_id parameter to the function
exynos5_mmc_set_clk_div() instead of index.
3)Updated code to decode the value of samsung,width from FDT.
4)Channel index is computed instead of getting from FDT.
Changes from V2:
1)Updation of commit message and resubmition of proper patch set.
Changes from V3:
1)Replaced the new function exynos5_mmc_set_clk_div() with the
existing function set_mmc_clk(). set_mmc_clk() will do the purpose.
2)Computation of FSYS block clock divisor (pre-ratio) is added.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.com
---
arch/arm/include/asm/arch-exynos/dwmmc.h | 4 +
drivers/mmc/exynos_dw_mmc.c | 129 +--
include/dwmmc.h | 4 +
3 files changed, 130 insertions(+), 7 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/dwmmc.h
b/arch/arm/include/asm/arch-exynos/dwmmc.h
index 8acdf9b..40dcc7b 100644
--- a/arch/arm/include/asm/arch-exynos/dwmmc.h
+++ b/arch/arm/include/asm/arch-exynos/dwmmc.h
@@ -29,8 +29,12 @@
int exynos_dwmci_init(u32 regbase, int bus_width, int index);
+#ifdef CONFIG_OF_CONTROL
+unsigned int exynos_dwmmc_init(const void *blob);
+#else
static inline unsigned int exynos_dwmmc_init(int index, int bus_width)
{
unsigned int base = samsung_get_base_mmc() + (0x1 * index);
return exynos_dwmci_init(base, bus_width, index);
}
+#endif
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 72a31b7..d7ca7d0 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -19,39 +19,154 @@
*/
#include common.h
-#include malloc.h
#include dwmmc.h
+#include fdtdec.h
+#include libfdt.h
+#include malloc.h
#include asm/arch/dwmmc.h
#include asm/arch/clk.h
+#include asm/arch/pinmux.h
+
+#defineDWMMC_MAX_CH_NUM4
+#defineDWMMC_MAX_FREQ 5200
+#defineDWMMC_MIN_FREQ 40
+#defineDWMMC_MMC0_CLKSEL_VAL 0x03030001
+#defineDWMMC_MMC2_CLKSEL_VAL 0x03020001
+#defineONE_MEGA_HZ 100
+#defineSCALED_VAL_FOUR_HUNDRED 400
static char *EXYNOS_NAME = EXYNOS DWMMC;
+u32 timing[3];
+/*
+ * Function used as callback function to initialise the
+ * CLKSEL register for every mmc channel.
+ */
static void exynos_dwmci_clksel(struct dwmci_host *host)
{
- u32 val;
- val = DWMCI_SET_SAMPLE_CLK(DWMCI_SHIFT_0) |
- DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) | DWMCI_SET_DIV_RATIO(0);
+ dwmci_writel(host, DWMCI_CLKSEL, host-clksel_val);
+}
- dwmci_writel(host, DWMCI_CLKSEL, val);
+unsigned int exynos_dwmci_get_clk(int dev_index)
+{
+ return get_mmc_clk(dev_index);
}
int exynos_dwmci_init(u32 regbase, int bus_width, int index)
{
struct dwmci_host *host = NULL;
+ unsigned int clock, div;
host = malloc(sizeof(struct dwmci_host));
if (!host) {
printf(dwmci_host malloc fail!\n);
return 1;
}
+ /*
+* The max operating freq of FSYS block is 400MHz.
+* Scale down the 400MHz to number 400.
+* Scale down the MPLL clock by dividing MPLL_CLK with ONE_MEGA_HZ.
+* Arrive at the divisor value taking 400 as the reference.
+*/
+
+ /* get mpll clock and divide it by ONE_MEGA_HZ */
+ clock = get_pll_clk(MPLL) / ONE_MEGA_HZ;
+
+ /* Arrive at the divisor value. */
+ for (div = 0; div = 0xf; div++) {
+ if ((clock / (div + 1)) = SCALED_VAL_FOUR_HUNDRED)
+ break;
+ }
+
+ /* set the clock divisor for mmc */
+ set_mmc_clk(index, div);
+
host-name = EXYNOS_NAME;
host-ioaddr = (void *)regbase;
host-buswidth = bus_width;
+#ifdef CONFIG_OF_CONTROL
+ host-clksel_val = (DWMCI_SET_SAMPLE_CLK(timing[0]) |
+ DWMCI_SET_DRV_CLK(timing[1]) |
+ DWMCI_SET_DIV_RATIO(timing[2]));
+#else
+ if (0 == index)
+ host-clksel_val = DWMMC_MMC0_CLKSEL_VAL;
+ if (2 == index)
+ host-clksel_val = DWMMC_MMC2_CLKSEL_VAL;
+#endif
host-clksel = exynos_dwmci_clksel;
host-dev_index = index;
-
- add_dwmci(host, 5200, 40);
+ host-mmc_clk = exynos_dwmci_get_clk;
+ /* Add the mmc chennel to be registered with mmc core */
+ add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ);
return 0;
}
+#ifdef CONFIG_OF_CONTROL
+unsigned
[U-Boot] [PATCH V4 5/9] EXYNOS5: DWMMC: API to set mmc clock divisor
This API computes the divisor value based on MPLL clock and writes it into the FSYS1 register. Changes from V1: 1)Updated the function exynos5_mmc_set_clk_div() to receive 'device_i'd as input parameter instead of 'index'. Changes from V2: 1)Updation of commit message and resubmition of proper patch set. Changes from V3: 1)Removed the new API exynos5_mmc_set_clk_div() from clock.c, because existing API set_mmc_clk() can be used to set mmc clock. Signed-off-by: Amar amarendra...@samsung.com --- arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- arch/arm/include/asm/arch-exynos/clk.h | 3 +++ 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 973b84e..89574ba 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -490,7 +490,7 @@ static unsigned long exynos4_get_mmc_clk(int dev_index) (struct exynos4_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel, ratio, pre_ratio; - int shift; + int shift = 0; sel = readl(clk-src_fsys); sel = (sel (dev_index 2)) 0xf; @@ -539,7 +539,7 @@ static unsigned long exynos5_get_mmc_clk(int dev_index) (struct exynos5_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel, ratio, pre_ratio; - int shift; + int shift = 0; sel = readl(clk-src_fsys); sel = (sel (dev_index 2)) 0xf; diff --git a/arch/arm/include/asm/arch-exynos/clk.h b/arch/arm/include/asm/arch-exynos/clk.h index 1935b0b..a4d5b4e 100644 --- a/arch/arm/include/asm/arch-exynos/clk.h +++ b/arch/arm/include/asm/arch-exynos/clk.h @@ -29,6 +29,9 @@ #define VPLL 4 #define BPLL 5 +#define FSYS1_MMC0_DIV_MASK0xff0f +#define FSYS1_MMC0_DIV_VAL 0x0701 + unsigned long get_pll_clk(int pllreg); unsigned long get_arm_clk(void); unsigned long get_i2c_clk(void); -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V4 8/9] SMDK5250: Enable EMMC booting
This patch adds support for EMMC booting on SMDK5250.
Changes from V1:
1)Updated spl_boot.c file to maintain irom pointer table
instead of using the #define values defined in header file.
Changes from V2:
1)Updation of commit message and resubmition of proper patch set.
Changes from V3:
No change.
Signed-off-by: Amar amarendra...@samsung.com
---
board/samsung/smdk5250/clock_init.c | 15 +++
board/samsung/smdk5250/clock_init.h | 5
board/samsung/smdk5250/spl_boot.c | 52 -
3 files changed, 65 insertions(+), 7 deletions(-)
diff --git a/board/samsung/smdk5250/clock_init.c
b/board/samsung/smdk5250/clock_init.c
index c009ae5..154993c 100644
--- a/board/samsung/smdk5250/clock_init.c
+++ b/board/samsung/smdk5250/clock_init.c
@@ -28,6 +28,7 @@
#include asm/arch/clk.h
#include asm/arch/clock.h
#include asm/arch/spl.h
+#include asm/arch/dwmmc.h
#include clock_init.h
#include setup.h
@@ -664,3 +665,17 @@ void clock_init_dp_clock(void)
/* We run DP at 267 Mhz */
setbits_le32(clk-div_disp1_0, CLK_DIV_DISP1_0_FIMD1);
}
+
+/*
+ * Set clock divisor value for booting from EMMC.
+ * Set DWMMC channel-0 clk div to operate mmc0 device at 50MHz.
+ */
+void emmc_boot_clk_div_set(void)
+{
+ struct exynos5_clock *clk = (struct exynos5_clock *)EXYNOS5_CLOCK_BASE;
+ unsigned int div_mmc;
+
+ div_mmc = readl((unsigned int) clk-div_fsys1) ~FSYS1_MMC0_DIV_MASK;
+ div_mmc |= FSYS1_MMC0_DIV_VAL;
+ writel(div_mmc, (unsigned int) clk-div_fsys1);
+}
diff --git a/board/samsung/smdk5250/clock_init.h
b/board/samsung/smdk5250/clock_init.h
index f751bcb..20a1d47 100644
--- a/board/samsung/smdk5250/clock_init.h
+++ b/board/samsung/smdk5250/clock_init.h
@@ -146,4 +146,9 @@ struct mem_timings *clock_get_mem_timings(void);
* Initialize clock for the device
*/
void system_clock_init(void);
+
+/*
+ * Set clock divisor value for booting from EMMC.
+ */
+void emmc_boot_clk_div_set(void);
#endif
diff --git a/board/samsung/smdk5250/spl_boot.c
b/board/samsung/smdk5250/spl_boot.c
index d8f3c1e..906e197 100644
--- a/board/samsung/smdk5250/spl_boot.c
+++ b/board/samsung/smdk5250/spl_boot.c
@@ -23,16 +23,38 @@
#includecommon.h
#includeconfig.h
+#include asm/arch-exynos/dmc.h
+#include asm/arch/clock.h
+#include asm/arch/clk.h
+
+#include clock_init.h
+
+/* Index into irom ptr table */
+enum index {
+ MMC_INDEX,
+ EMMC44_INDEX,
+ EMMC44_END_INDEX,
+ SPI_INDEX,
+};
+
+/* IROM Function Pointers Table */
+u32 irom_ptr_table[] = {
+ [MMC_INDEX] = 0x02020030, /* iROM Function Pointer-SDMMC boot */
+ [EMMC44_INDEX] = 0x02020044,/* iROM Function Pointer-EMMC4.4 boot*/
+ [EMMC44_END_INDEX] = 0x02020048,/* iROM Function Pointer
+ -EMMC4.4 end boot operation */
+ [SPI_INDEX] = 0x02020058, /* iROM Function Pointer-SPI boot */
+ };
+
enum boot_mode {
BOOT_MODE_MMC = 4,
BOOT_MODE_SERIAL = 20,
+ BOOT_MODE_EMMC = 8, /* EMMC4.4 */
/* Boot based on Operating Mode pin settings */
BOOT_MODE_OM = 32,
BOOT_MODE_USB, /* Boot using USB download */
};
- typedef u32 (*spi_copy_func_t)(u32 offset, u32 nblock, u32 dst);
-
/*
* Copy U-boot from mmc to RAM:
* COPY_BL2_FNPTR_ADDR: Address in iRAM, which Contains
@@ -40,23 +62,39 @@ enum boot_mode {
*/
void copy_uboot_to_ram(void)
{
- spi_copy_func_t spi_copy;
enum boot_mode bootmode;
- u32 (*copy_bl2)(u32, u32, u32);
-
+ u32 (*spi_copy)(u32 offset, u32 nblock, u32 dst);
+ u32 (*copy_bl2)(u32 offset, u32 nblock, u32 dst);
+ u32 (*copy_bl2_from_emmc)(u32 nblock, u32 dst);
+ void (*end_bootop_from_emmc)(void);
+ /* read Operation Mode ststus register to find the bootmode */
bootmode = readl(EXYNOS5_POWER_BASE) OM_STAT;
switch (bootmode) {
case BOOT_MODE_SERIAL:
- spi_copy = *(spi_copy_func_t *)EXYNOS_COPY_SPI_FNPTR_ADDR;
+ spi_copy = (void *) *(u32 *)irom_ptr_table[SPI_INDEX];
spi_copy(SPI_FLASH_UBOOT_POS, CONFIG_BL2_SIZE,
CONFIG_SYS_TEXT_BASE);
break;
case BOOT_MODE_MMC:
- copy_bl2 = (void *) *(u32 *)COPY_BL2_FNPTR_ADDR;
+ copy_bl2 = (void *) *(u32 *)irom_ptr_table[MMC_INDEX];
copy_bl2(BL2_START_OFFSET, BL2_SIZE_BLOC_COUNT,
CONFIG_SYS_TEXT_BASE);
break;
+ case BOOT_MODE_EMMC:
+ /* Set the FSYS1 clock divisor value for EMMC boot */
+ emmc_boot_clk_div_set();
+
+ copy_bl2_from_emmc =
+ (void *) *(u32 *)irom_ptr_table[EMMC44_INDEX];
+ end_bootop_from_emmc =
+ (void *) *(u32 *)irom_ptr_table[EMMC44_END_INDEX
[U-Boot] [PATCH V3 1/9] FDT: Add compatible string for DWMMC
Add required compatible information for DWMMC driver.
Changes from V1:
No change.
Changes from V2:
1)Updation of commit message and resubmition of proper patch set.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
include/fdtdec.h | 1 +
lib/fdtdec.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index ce10bf4..dcd4142 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -76,6 +76,7 @@ enum fdt_compat_id {
COMPAT_SAMSUNG_EXYNOS5_SOUND, /* Exynos Sound */
COMPAT_WOLFSON_WM8994_CODEC,/* Wolfson WM8994 Sound Codec */
COMPAT_SAMSUNG_EXYNOS_SPI, /* Exynos SPI */
+ COMPAT_SAMSUNG_EXYNOS5_DWMMC, /* Exynos5 DWMMC controller */
COMPAT_COUNT,
};
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index aa75710..646d5d6 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -51,6 +51,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(SAMSUNG_EXYNOS5_SOUND, samsung,exynos-sound),
COMPAT(WOLFSON_WM8994_CODEC, wolfson,wm8994-codec),
COMPAT(SAMSUNG_EXYNOS_SPI, samsung,exynos-spi),
+ COMPAT(SAMSUNG_EXYNOS5_DWMMC, samsung,exynos5250-dwmmc),
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)
--
1.8.0
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[U-Boot] [PATCH V3 2/9] EXYNOS5: FDT: Add DWMMC device node data
This patch adds DWMMC device node data for exynos5.
This patch also adds binding file for DWMMC device node.
Changes from V1:
1)Added binding file for DWMMC device node at the location
doc/device-tree-bindings/exynos/dwmmc.txt.
2)Removed the propname 'index' from device node.
3)Prefixed the vendor name 'samsung' before propname in device node.
Changes from V2:
1)Updation of commit message and resubmition of proper patch set.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.comX
---
arch/arm/dts/exynos5250.dtsi | 32 +++
board/samsung/dts/exynos5250-smdk5250.dts | 22 +
doc/device-tree-bindings/exynos/dwmmc.txt | 29
3 files changed, 83 insertions(+)
create mode 100644 doc/device-tree-bindings/exynos/dwmmc.txt
diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index 1008797..b701ae5 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -138,4 +138,36 @@
reg = 0x131b 0x30;
interrupts = 0 130 0;
};
+
+ dwmmc@1220 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1220 0x1000;
+ interrupts = 0 75 0;
+ };
+
+ dwmmc@1221 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1221 0x1000;
+ interrupts = 0 76 0;
+ };
+
+ dwmmc@1222 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1222 0x1000;
+ interrupts = 0 77 0;
+ };
+
+ dwmmc@1223 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1223 0x1000;
+ interrupts = 0 78 0;
+ };
};
diff --git a/board/samsung/dts/exynos5250-smdk5250.dts
b/board/samsung/dts/exynos5250-smdk5250.dts
index a8e62da..9baf622 100644
--- a/board/samsung/dts/exynos5250-smdk5250.dts
+++ b/board/samsung/dts/exynos5250-smdk5250.dts
@@ -30,6 +30,10 @@
spi2 = /spi@12d4;
spi3 = /spi@131a;
spi4 = /spi@131b;
+ dwmmc0 = /dwmmc@1220;
+ dwmmc1 = /dwmmc@1221;
+ dwmmc2 = /dwmmc@1222;
+ dwmmc3 = /dwmmc@1223;
};
sromc@1225 {
@@ -59,4 +63,22 @@
compatible = wolfson,wm8994-codec;
};
};
+
+ dwmmc@1220 {
+ samsung,bus-width = 8;
+ samsung,timing = 1 3 3;
+ };
+
+ dwmmc@1221 {
+ status = disabled;
+ };
+
+ dwmmc@1222 {
+ samsung,bus-width = 4;
+ samsung,timing = 1 2 3;
+ };
+
+ dwmmc@1223 {
+ status = disabled;
+ };
};
diff --git a/doc/device-tree-bindings/exynos/dwmmc.txt
b/doc/device-tree-bindings/exynos/dwmmc.txt
new file mode 100644
index 000..6232ad6
--- /dev/null
+++ b/doc/device-tree-bindings/exynos/dwmmc.txt
@@ -0,0 +1,29 @@
+* Exynos 5250 DWC_mobile_storage
+
+The Exynos 5250 provides DWC_mobile_storage interface which supports
+. Embedded Multimedia Cards (EMMC-version 4.5)
+. Secure Digital memory (SD mem-version 2.0)
+. Secure Digital I/O (SDIO-version 3.0)
+. Consumer Electronics Advanced Transport Architecture (CE-ATA-version 1.1)
+
+The Exynos 5250 DWC_mobile_storage provides four channels.
+SOC specific and Board specific properties are channel specific.
+
+Required SoC Specific Properties:
+
+- compatible: should be
+ - samsung,exynos5250-dwmmc: for exynos5250 platforms
+
+- reg: physical base address of the controller and length of memory mapped
+ region.
+
+- interrupts: The interrupt number to the cpu.
+
+Required Board Specific Properties:
+
+- #address-cells: should be 1.
+- #size-cells: should be 0.
+- samsung,bus-width: The width of the bus used to interface the devices
+ supported by DWC_mobile_storage (SD-MMC/EMMC/SDIO).
+- samsung,timing: The timing values to be written into the
+ Drv/sample clock selection register of corresponding channel.
--
1.8.0
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[U-Boot] [PATCH V3 4/9] EXYNOS5: DWMMC: Added FDT support for DWMMC
This patch adds FDT support for DWMMC, by reading the DWMMC node data
from the device tree and initialising DWMMC channels as per data
obtained from the node.
Changes from V1:
1)Updated code to have same signature for the function
exynos_dwmci_init() for both FDT and non-FDT versions.
2)Updated code to pass device_id parameter to the function
exynos5_mmc_set_clk_div() instead of index.
3)Updated code to decode the value of samsung,width from FDT.
4)Channel index is computed instead of getting from FDT.
Changes from V2:
1)Updation of commit message and resubmition of proper patch set.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.com
---
arch/arm/include/asm/arch-exynos/dwmmc.h | 4 ++
drivers/mmc/exynos_dw_mmc.c | 116 +--
include/dwmmc.h | 4 ++
3 files changed, 117 insertions(+), 7 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/dwmmc.h
b/arch/arm/include/asm/arch-exynos/dwmmc.h
index 8acdf9b..40dcc7b 100644
--- a/arch/arm/include/asm/arch-exynos/dwmmc.h
+++ b/arch/arm/include/asm/arch-exynos/dwmmc.h
@@ -29,8 +29,12 @@
int exynos_dwmci_init(u32 regbase, int bus_width, int index);
+#ifdef CONFIG_OF_CONTROL
+unsigned int exynos_dwmmc_init(const void *blob);
+#else
static inline unsigned int exynos_dwmmc_init(int index, int bus_width)
{
unsigned int base = samsung_get_base_mmc() + (0x1 * index);
return exynos_dwmci_init(base, bus_width, index);
}
+#endif
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 72a31b7..541889f 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -19,39 +19,141 @@
*/
#include common.h
-#include malloc.h
#include dwmmc.h
+#include fdtdec.h
+#include libfdt.h
+#include malloc.h
#include asm/arch/dwmmc.h
#include asm/arch/clk.h
+#include asm/arch/pinmux.h
+
+#defineDWMMC_MAX_CH_NUM4
+#defineDWMMC_MAX_FREQ 5200
+#defineDWMMC_MIN_FREQ 40
+#defineDWMMC_MMC0_CLKSEL_VAL 0x03030001
+#defineDWMMC_MMC2_CLKSEL_VAL 0x03020001
static char *EXYNOS_NAME = EXYNOS DWMMC;
+u32 timing[3];
+/*
+ * Function used as callback function to initialise the
+ * CLKSEL register for every mmc channel.
+ */
static void exynos_dwmci_clksel(struct dwmci_host *host)
{
- u32 val;
- val = DWMCI_SET_SAMPLE_CLK(DWMCI_SHIFT_0) |
- DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) | DWMCI_SET_DIV_RATIO(0);
+ dwmci_writel(host, DWMCI_CLKSEL, host-clksel_val);
+}
- dwmci_writel(host, DWMCI_CLKSEL, val);
+unsigned int exynos_dwmci_get_clk(int dev_index)
+{
+ return get_mmc_clk(dev_index);
}
int exynos_dwmci_init(u32 regbase, int bus_width, int index)
{
struct dwmci_host *host = NULL;
+ int dev_id = 0;
host = malloc(sizeof(struct dwmci_host));
if (!host) {
printf(dwmci_host malloc fail!\n);
return 1;
}
+ /* Convert index into corresponding peripheral ID */
+ dev_id = index + PERIPH_ID_SDMMC0;
+
+ /* set the clock divisor - clk_div_fsys for mmc */
+ if (exynos5_mmc_set_clk_div(dev_id)) {
+ debug(mmc clock div set failed\n);
+ return -1;
+ }
host-name = EXYNOS_NAME;
host-ioaddr = (void *)regbase;
host-buswidth = bus_width;
+#ifdef CONFIG_OF_CONTROL
+ host-clksel_val = (DWMCI_SET_SAMPLE_CLK(timing[0]) |
+ DWMCI_SET_DRV_CLK(timing[1]) |
+ DWMCI_SET_DIV_RATIO(timing[2]));
+#else
+ if (0 == index)
+ host-clksel_val = DWMMC_MMC0_CLKSEL_VAL;
+ if (2 == index)
+ host-clksel_val = DWMMC_MMC2_CLKSEL_VAL;
+#endif
host-clksel = exynos_dwmci_clksel;
host-dev_index = index;
-
- add_dwmci(host, 5200, 40);
+ host-mmc_clk = exynos_dwmci_get_clk;
+ /* Add the mmc chennel to be registered with mmc core */
+ add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ);
return 0;
}
+#ifdef CONFIG_OF_CONTROL
+unsigned int exynos_dwmmc_init(const void *blob)
+{
+ u32 base;
+ int index, bus_width;
+ int node_list[DWMMC_MAX_CH_NUM];
+ int err = 0;
+ int dev_id, flag;
+ int count, i;
+
+ count = fdtdec_find_aliases_for_id(blob, dwmmc,
+ COMPAT_SAMSUNG_EXYNOS5_DWMMC, node_list,
+ DWMMC_MAX_CH_NUM);
+
+ for (i = 0; i count; i++) {
+ int node = node_list[i];
+
+ if (node = 0)
+ continue;
+
+ /* Extract device id for each mmc channel */
+ dev_id = pinmux_decode_periph_id(blob, node);
+
+ /* Get the bus width from the device
[U-Boot] [PATCH V3 3/9] DWMMC: Initialise dwmci and resolve EMMC read write issues
This patch enumerates dwmci and set auto stop command during
dwmci initialisation.
EMMC read/write is not happening in current implementation
due to improper fifo size computation. Hence Modified the fifo size
computation to resolve EMMC read write issues.
Changes from V1:
1)Created the macros RX_WMARK_SHIFT and RX_WMARK_MASK in header file.
Changes from V2:
1)Updation of commit message and resubmition of proper patch set.
Signed-off-by: Amar amarendra...@samsung.com
---
drivers/mmc/dw_mmc.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 4070d4e..d8fa1a2 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -136,6 +136,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
return TIMEOUT;
}
timeout--;
+ mdelay(1);
}
dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL);
@@ -314,7 +315,7 @@ static void dwmci_set_ios(struct mmc *mmc)
static int dwmci_init(struct mmc *mmc)
{
struct dwmci_host *host = (struct dwmci_host *)mmc-priv;
- u32 fifo_size, fifoth_val;
+ u32 fifo_size, fifoth_val, ier;
dwmci_writel(host, DWMCI_PWREN, 1);
@@ -323,6 +324,14 @@ static int dwmci_init(struct mmc *mmc)
return -1;
}
+ /* Enumerate at 400KHz */
+ dwmci_setup_bus(host, mmc-f_min);
+
+ /* Set auto stop command */
+ ier = dwmci_readl(host, DWMCI_CTRL);
+ ier |= (110);
+ dwmci_writel(host, DWMCI_CTRL, ier);
+
dwmci_writel(host, DWMCI_RINTSTS, 0x);
dwmci_writel(host, DWMCI_INTMASK, 0);
@@ -332,10 +341,11 @@ static int dwmci_init(struct mmc *mmc)
dwmci_writel(host, DWMCI_BMOD, 1);
fifo_size = dwmci_readl(host, DWMCI_FIFOTH);
+ fifo_size = ((fifo_size RX_WMARK_MASK) RX_WMARK_SHIFT) + 1;
if (host-fifoth_val)
fifoth_val = host-fifoth_val;
else
- fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size/2 -1) |
+ fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size/2 - 1) |
TX_WMARK(fifo_size/2);
dwmci_writel(host, DWMCI_FIFOTH, fifoth_val);
--
1.8.0
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[U-Boot] [PATCH V3 0/9] EXYNOS5: Enable DWMMC, add FDT support for DWMMC and
This patch set enables and initialises DWMMC for Exynos5250 on SMDK5250. Adds driver changes required for DWMMC. Adds FDT support for DWMMC. Adds EMMC boot support for SMDK5250. This patch set is based on: EXYNOS: mmc: support DesignWare Controller for Samsung-SoC, which is merged in u-boot-mmc. Exynos: clock: support get_mmc_clk for exynos. Add DT based ethernet driver for SMDK5250. SMDK5250: Add FDT support present at the following link http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/149991 Changes from V1: 1)Corrected in response to review comments. 2)Created separate board files for FDT and non-FDT versions. 3)Added binding file for DWMMC device node. 4)Removed the propname 'index' from device node. 5)Prefixed the vendor name 'samsung' before propname in device node. 6)Ensured to have same signature for the function exynos_dwmci_init() for both FDT and non-FDT versions. 7)EMMC clock setting has been moved from spl_boot.c to clock_init.c. Changes from V2: 1)Updation of commit message and resubmition of proper patch set. Amar (9): FDT: Add compatible string for DWMMC EXYNOS5: FDT: Add DWMMC device node data DWMMC: Initialise dwmci and resolve EMMC read write issues EXYNOS5: DWMMC: Added dt support for DWMMC EXYNOS5: DWMMC: API to set mmc clock divisor SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDT MMC: APIs to support creation of boot partition SMDK5250: Enable EMMC booting COMMON: MMC: Command to support EMMC booting and boot partition creation arch/arm/cpu/armv7/exynos/clock.c | 38 - arch/arm/dts/exynos5250.dtsi | 32 arch/arm/include/asm/arch-exynos/clk.h| 4 + arch/arm/include/asm/arch-exynos/dwmmc.h | 4 + board/samsung/dts/exynos5250-smdk5250.dts | 22 +++ board/samsung/smdk5250/Makefile | 4 + board/samsung/smdk5250/clock_init.c | 15 ++ board/samsung/smdk5250/clock_init.h | 5 + board/samsung/smdk5250/exynos5-dt.c | 242 ++ board/samsung/smdk5250/smdk5250.c | 99 ++-- board/samsung/smdk5250/spl_boot.c | 52 ++- common/cmd_mmc.c | 84 ++- doc/device-tree-bindings/exynos/dwmmc.txt | 29 drivers/mmc/dw_mmc.c | 14 +- drivers/mmc/exynos_dw_mmc.c | 116 +- drivers/mmc/mmc.c | 118 +++ include/configs/exynos5250-dt.h | 2 + include/dwmmc.h | 4 + include/fdtdec.h | 1 + include/mmc.h | 16 ++ lib/fdtdec.c | 1 + 21 files changed, 827 insertions(+), 75 deletions(-) create mode 100644 board/samsung/smdk5250/exynos5-dt.c create mode 100644 doc/device-tree-bindings/exynos/dwmmc.txt -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V3 6/9] SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDT
This patch enables and initialises DWMMC for SMDK5250.
Supports both FDT and non-FDT. This patch creates a new file
'exynos5-dt.c' meant for FDT support.
exynos5-dt.c: This file shall contain all code which supports FDT.
Any addition of FDT support for any module needs to be
added in this file.
smdk5250.c: This file shall contain the code which supports non-FDT.
version. Any addition of non-FDT support for any module
needs to be added in this file.
May be, the file smdk5250.c can be removed in near
future
when non-FDT is not required.
The Makefile is updated to compile only one of the files
exynos5-dt.c / smdk5250.c based on FDT configuration.
NOTE:
Please note that all additions corresponding to FDT need to be added into the
file exynos5-dt.c.
At same time if non-FDT support is required then add the corresponding
updations into smdk5250.c.
Changes from V1:
1)A new file 'exynos5-dt.c' is created meant for FDT support
2)Makefile is updated to compile only one of the files
exynos5-dt.c / smdk5250.c based on FDT configuration
Changes from V2:
1)Updation of commit message and resubmition of proper patch set.
Signed-off-by: Amar amarendra...@samsung.com
---
board/samsung/smdk5250/Makefile | 4 +
board/samsung/smdk5250/exynos5-dt.c | 242
board/samsung/smdk5250/smdk5250.c | 97 +++
include/configs/exynos5250-dt.h | 2 +
include/i2c.h | 2 +
5 files changed, 292 insertions(+), 55 deletions(-)
create mode 100644 board/samsung/smdk5250/exynos5-dt.c
diff --git a/board/samsung/smdk5250/Makefile b/board/samsung/smdk5250/Makefile
index 47c6a5a..ecca9f3 100644
--- a/board/samsung/smdk5250/Makefile
+++ b/board/samsung/smdk5250/Makefile
@@ -32,8 +32,12 @@ COBJS+= tzpc_init.o
COBJS += smdk5250_spl.o
ifndef CONFIG_SPL_BUILD
+ifdef CONFIG_OF_CONTROL
+COBJS += exynos5-dt.o
+else
COBJS += smdk5250.o
endif
+endif
ifdef CONFIG_SPL_BUILD
COBJS += spl_boot.o
diff --git a/board/samsung/smdk5250/exynos5-dt.c
b/board/samsung/smdk5250/exynos5-dt.c
new file mode 100644
index 000..da539ca
--- /dev/null
+++ b/board/samsung/smdk5250/exynos5-dt.c
@@ -0,0 +1,242 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include fdtdec.h
+#include asm/io.h
+#include i2c.h
+#include netdev.h
+#include spi.h
+#include asm/arch/cpu.h
+#include asm/arch/dwmmc.h
+#include asm/arch/gpio.h
+#include asm/arch/mmc.h
+#include asm/arch/pinmux.h
+#include asm/arch/sromc.h
+#include power/pmic.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+#ifdef CONFIG_EXYNOS_SPI
+ spi_init();
+#endif
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd-ram_size= get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_5, PHYS_SDRAM_7_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_6, PHYS_SDRAM_7_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_7, PHYS_SDRAM_7_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_8, PHYS_SDRAM_8_SIZE);
+ return 0;
+}
+
+#if defined(CONFIG_POWER)
+int power_init_board(void)
+{
+ if (pmic_init(I2C_PMIC))
+ return -1;
+ else
+ return 0;
+}
+#endif
+
+void dram_init_banksize(void)
+{
+ gd-bd-bi_dram[0].start = PHYS_SDRAM_1;
+ gd-bd-bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1,
+ PHYS_SDRAM_1_SIZE);
+ gd-bd-bi_dram[1].start = PHYS_SDRAM_2;
+ gd-bd-bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2
[U-Boot] [PATCH V3 5/9] EXYNOS5: DWMMC: API to set mmc clock divisor
This API computes the divisor value based on MPLL clock and
writes it into the FSYS1 register.
Changes from V1:
1)Updated the function exynos5_mmc_set_clk_div() to receive
'device_i'd as input parameter instead of 'index'.
Changes from V2:
1)Updation of commit message and resubmition of proper patch set.
Signed-off-by: Amar amarendra...@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 38 --
arch/arm/include/asm/arch-exynos/clk.h | 4
2 files changed, 40 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 973b84e..cd42689 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -490,7 +490,7 @@ static unsigned long exynos4_get_mmc_clk(int dev_index)
(struct exynos4_clock *)samsung_get_base_clock();
unsigned long uclk, sclk;
unsigned int sel, ratio, pre_ratio;
- int shift;
+ int shift = 0;
sel = readl(clk-src_fsys);
sel = (sel (dev_index 2)) 0xf;
@@ -539,7 +539,7 @@ static unsigned long exynos5_get_mmc_clk(int dev_index)
(struct exynos5_clock *)samsung_get_base_clock();
unsigned long uclk, sclk;
unsigned int sel, ratio, pre_ratio;
- int shift;
+ int shift = 0;
sel = readl(clk-src_fsys);
sel = (sel (dev_index 2)) 0xf;
@@ -659,6 +659,40 @@ static void exynos5_set_mmc_clk(int dev_index, unsigned
int div)
writel(val, addr);
}
+/* exynos5: set the mmc clock div ratio in fsys1 */
+int exynos5_mmc_set_clk_div(int dev_id)
+{
+ struct exynos5_clock *clk =
+ (struct exynos5_clock *)samsung_get_base_clock();
+ unsigned int addr;
+ unsigned int clock;
+ unsigned int tmp;
+ unsigned int i;
+
+ /* get mpll clock */
+ clock = get_pll_clk(MPLL) / 100;
+
+ /*
+* CLK_DIV_FSYS1
+* MMC0_PRE_RATIO [15:8], MMC0_RATIO [3:0]
+* CLK_DIV_FSYS2
+* MMC2_PRE_RATIO [15:8], MMC2_RATIO [3:0]
+*/
+ if (dev_id = PERIPH_ID_SDMMC1)
+ addr = (unsigned int)clk-div_fsys1;
+ else
+ addr = (unsigned int)clk-div_fsys2;
+
+ tmp = readl(addr) ~FSYS1_MMC0_DIV_MASK;
+ for (i = 0; i = 0xf; i++) {
+ if ((clock / (i + 1)) = 400) {
+ writel(tmp | i 0, addr);
+ break;
+ }
+ }
+ return 0;
+}
+
/* get_lcd_clk: return lcd clock frequency */
static unsigned long exynos4_get_lcd_clk(void)
{
diff --git a/arch/arm/include/asm/arch-exynos/clk.h
b/arch/arm/include/asm/arch-exynos/clk.h
index 1935b0b..2fd7c3e 100644
--- a/arch/arm/include/asm/arch-exynos/clk.h
+++ b/arch/arm/include/asm/arch-exynos/clk.h
@@ -29,6 +29,9 @@
#define VPLL 4
#define BPLL 5
+#define FSYS1_MMC0_DIV_MASK0xff0f
+#define FSYS1_MMC0_DIV_VAL 0x0701
+
unsigned long get_pll_clk(int pllreg);
unsigned long get_arm_clk(void);
unsigned long get_i2c_clk(void);
@@ -36,6 +39,7 @@ unsigned long get_pwm_clk(void);
unsigned long get_uart_clk(int dev_index);
unsigned long get_mmc_clk(int dev_index);
void set_mmc_clk(int dev_index, unsigned int div);
+int exynos5_mmc_set_clk_div(int dev_index);
unsigned long get_lcd_clk(void);
void set_lcd_clk(void);
void set_mipi_clk(void);
--
1.8.0
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[U-Boot] [PATCH V3 7/9] MMC: APIs to support resize of EMMC boot partition
This patch adds APIs to open, close and to resize boot partiton for EMMC.
Changes from V1:
New patch.
Changes from V2:
1)Updation of commit message and resubmition of proper patch set.
Signed-off-by: Amar amarendra...@samsung.com
---
drivers/mmc/mmc.c | 118 ++
include/mmc.h | 16
2 files changed, 134 insertions(+)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 72e8ce6..8175b49 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1327,3 +1327,121 @@ int mmc_initialize(bd_t *bis)
return 0;
}
+
+int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
+ unsigned long rpmbsize)
+{
+ int err;
+ struct mmc_cmd cmd;
+
+ /* Only use this command for raw EMMC moviNAND */
+ /* Enter backdoor mode */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = MMC_CMD62_ARG1;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error1 = %d\n, err);
+ return err;
+ }
+
+ /* Boot partition changing mode */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = MMC_CMD62_ARG2;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error2 = %d\n, err);
+ return err;
+ }
+ /* boot partition size is multiple of 128KB */
+ bootsize = ((bootsize*1024)/128);
+
+ /* Arg: boot partition size */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = bootsize;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error3 = %d\n, err);
+ return err;
+ }
+ /* RPMB partition size is multiple of 128KB */
+ rpmbsize = ((rpmbsize*1024)/128);
+ /* Arg: RPMB partition size */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = rpmbsize;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error4 = %d\n, err);
+ return err;
+ }
+ return 0;
+}
+
+int mmc_boot_open(struct mmc *mmc)
+{
+ int err;
+ struct mmc_cmd cmd;
+
+ /* Boot ack enable, boot partition enable , boot partition access */
+ cmd.cmdidx = MMC_CMD_SWITCH;
+ cmd.resp_type = MMC_RSP_R1b;
+
+ cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE 24 |
+ EXT_CSD_PART_CONF 16 |
+ (EXT_CSD_BOOT_ACK_ENABLE |
+ EXT_CSD_BOOT_PARTITION_ENABLE |
+ EXT_CSD_PARTITION_ACCESS_ENABLE) 8);
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_open: Error1 = %d\n, err);
+ return err;
+ }
+
+ /* 4bit transfer mode at booting time. */
+ cmd.cmdidx = MMC_CMD_SWITCH;
+ cmd.resp_type = MMC_RSP_R1b;
+
+ cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE 24|
+ EXT_CSD_BOOT_BUS_WIDTH 16|
+ ((10) 8));
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_open: Error2 = %d\n, err);
+ return err;
+ }
+
+ return 0;
+}
+
+int mmc_boot_close(struct mmc *mmc)
+{
+ int err;
+ struct mmc_cmd cmd;
+
+ /* Boot ack enable, boot partition enable , boot partition access */
+ cmd.cmdidx = MMC_CMD_SWITCH;
+ cmd.resp_type = MMC_RSP_R1b;
+
+ cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE 24|
+ EXT_CSD_PART_CONF 16|
+ (EXT_CSD_BOOT_ACK_ENABLE |
+ EXT_CSD_BOOT_PARTITION_ENABLE |
+ EXT_CSD_PARTITION_ACCESS_DISABLE) 8);
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_close: Error = %d\n, err);
+ return err;
+ }
+
+ return 0;
+}
diff --git a/include/mmc.h b/include/mmc.h
index a13e2bd..999f0a3 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -86,6 +86,11 @@
#define MMC_CMD_APP_CMD55
#define MMC_CMD_SPI_READ_OCR 58
#define MMC_CMD_SPI_CRC_ON_OFF 59
+#define MMC_CMD_RES_MAN62
+
+#define MMC_CMD62_ARG1 0xefac62ec
+#define MMC_CMD62_ARG2 0xcbaea7
+
#define SD_CMD_SEND_RELATIVE_ADDR 3
#define SD_CMD_SWITCH_FUNC 6
@@ -153,6 +158,7 @@
*/
#define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */
#define EXT_CSD_ERASE_GROUP_DEF175 /* R/W */
+#define EXT_CSD_BOOT_BUS_WIDTH 177
#define EXT_CSD_PART_CONF 179 /* R/W */
#define EXT_CSD_BUS_WIDTH
[U-Boot] [PATCH V3 8/9] SMDK5250: Enable EMMC booting
This patch adds support for EMMC booting on SMDK5250.
Changes from V1:
1)Updated spl_boot.c file to maintain irom pointer table
instead of using the #define values defined in header file.
Changes from V2:
1)Updation of commit message and resubmition of proper patch set.
Signed-off-by: Amar amarendra...@samsung.com
---
board/samsung/smdk5250/clock_init.c | 15 +++
board/samsung/smdk5250/clock_init.h | 5
board/samsung/smdk5250/spl_boot.c | 52 -
3 files changed, 65 insertions(+), 7 deletions(-)
diff --git a/board/samsung/smdk5250/clock_init.c
b/board/samsung/smdk5250/clock_init.c
index c009ae5..154993c 100644
--- a/board/samsung/smdk5250/clock_init.c
+++ b/board/samsung/smdk5250/clock_init.c
@@ -28,6 +28,7 @@
#include asm/arch/clk.h
#include asm/arch/clock.h
#include asm/arch/spl.h
+#include asm/arch/dwmmc.h
#include clock_init.h
#include setup.h
@@ -664,3 +665,17 @@ void clock_init_dp_clock(void)
/* We run DP at 267 Mhz */
setbits_le32(clk-div_disp1_0, CLK_DIV_DISP1_0_FIMD1);
}
+
+/*
+ * Set clock divisor value for booting from EMMC.
+ * Set DWMMC channel-0 clk div to operate mmc0 device at 50MHz.
+ */
+void emmc_boot_clk_div_set(void)
+{
+ struct exynos5_clock *clk = (struct exynos5_clock *)EXYNOS5_CLOCK_BASE;
+ unsigned int div_mmc;
+
+ div_mmc = readl((unsigned int) clk-div_fsys1) ~FSYS1_MMC0_DIV_MASK;
+ div_mmc |= FSYS1_MMC0_DIV_VAL;
+ writel(div_mmc, (unsigned int) clk-div_fsys1);
+}
diff --git a/board/samsung/smdk5250/clock_init.h
b/board/samsung/smdk5250/clock_init.h
index f751bcb..20a1d47 100644
--- a/board/samsung/smdk5250/clock_init.h
+++ b/board/samsung/smdk5250/clock_init.h
@@ -146,4 +146,9 @@ struct mem_timings *clock_get_mem_timings(void);
* Initialize clock for the device
*/
void system_clock_init(void);
+
+/*
+ * Set clock divisor value for booting from EMMC.
+ */
+void emmc_boot_clk_div_set(void);
#endif
diff --git a/board/samsung/smdk5250/spl_boot.c
b/board/samsung/smdk5250/spl_boot.c
index d8f3c1e..906e197 100644
--- a/board/samsung/smdk5250/spl_boot.c
+++ b/board/samsung/smdk5250/spl_boot.c
@@ -23,16 +23,38 @@
#includecommon.h
#includeconfig.h
+#include asm/arch-exynos/dmc.h
+#include asm/arch/clock.h
+#include asm/arch/clk.h
+
+#include clock_init.h
+
+/* Index into irom ptr table */
+enum index {
+ MMC_INDEX,
+ EMMC44_INDEX,
+ EMMC44_END_INDEX,
+ SPI_INDEX,
+};
+
+/* IROM Function Pointers Table */
+u32 irom_ptr_table[] = {
+ [MMC_INDEX] = 0x02020030, /* iROM Function Pointer-SDMMC boot */
+ [EMMC44_INDEX] = 0x02020044,/* iROM Function Pointer-EMMC4.4 boot*/
+ [EMMC44_END_INDEX] = 0x02020048,/* iROM Function Pointer
+ -EMMC4.4 end boot operation */
+ [SPI_INDEX] = 0x02020058, /* iROM Function Pointer-SPI boot */
+ };
+
enum boot_mode {
BOOT_MODE_MMC = 4,
BOOT_MODE_SERIAL = 20,
+ BOOT_MODE_EMMC = 8, /* EMMC4.4 */
/* Boot based on Operating Mode pin settings */
BOOT_MODE_OM = 32,
BOOT_MODE_USB, /* Boot using USB download */
};
- typedef u32 (*spi_copy_func_t)(u32 offset, u32 nblock, u32 dst);
-
/*
* Copy U-boot from mmc to RAM:
* COPY_BL2_FNPTR_ADDR: Address in iRAM, which Contains
@@ -40,23 +62,39 @@ enum boot_mode {
*/
void copy_uboot_to_ram(void)
{
- spi_copy_func_t spi_copy;
enum boot_mode bootmode;
- u32 (*copy_bl2)(u32, u32, u32);
-
+ u32 (*spi_copy)(u32 offset, u32 nblock, u32 dst);
+ u32 (*copy_bl2)(u32 offset, u32 nblock, u32 dst);
+ u32 (*copy_bl2_from_emmc)(u32 nblock, u32 dst);
+ void (*end_bootop_from_emmc)(void);
+ /* read Operation Mode ststus register to find the bootmode */
bootmode = readl(EXYNOS5_POWER_BASE) OM_STAT;
switch (bootmode) {
case BOOT_MODE_SERIAL:
- spi_copy = *(spi_copy_func_t *)EXYNOS_COPY_SPI_FNPTR_ADDR;
+ spi_copy = (void *) *(u32 *)irom_ptr_table[SPI_INDEX];
spi_copy(SPI_FLASH_UBOOT_POS, CONFIG_BL2_SIZE,
CONFIG_SYS_TEXT_BASE);
break;
case BOOT_MODE_MMC:
- copy_bl2 = (void *) *(u32 *)COPY_BL2_FNPTR_ADDR;
+ copy_bl2 = (void *) *(u32 *)irom_ptr_table[MMC_INDEX];
copy_bl2(BL2_START_OFFSET, BL2_SIZE_BLOC_COUNT,
CONFIG_SYS_TEXT_BASE);
break;
+ case BOOT_MODE_EMMC:
+ /* Set the FSYS1 clock divisor value for EMMC boot */
+ emmc_boot_clk_div_set();
+
+ copy_bl2_from_emmc =
+ (void *) *(u32 *)irom_ptr_table[EMMC44_INDEX];
+ end_bootop_from_emmc =
+ (void *) *(u32 *)irom_ptr_table[EMMC44_END_INDEX];
+
+ copy_bl2_from_emmc
[U-Boot] [PATCH V3 9/9] COMMON: MMC: Command to support EMMC booting and to
This patch adds commands to open, close and resize boot partitions on EMMC.
Changes from V1:
1)Combined the common piece of code between 'open' and 'close'
operations.
Changes from V2:
1)Updation of commit message and resubmition of proper patch set.
Signed-off-by: Amar amarendra...@samsung.com
---
common/cmd_mmc.c | 84 +++-
1 file changed, 83 insertions(+), 1 deletion(-)
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 7dacd51..1dabb5b 100644
--- a/common/cmd_mmc.c
+++ b/common/cmd_mmc.c
@@ -248,6 +248,84 @@ static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
curr_device, mmc-part_num);
return 0;
+ } else if ((strcmp(argv[1], open) == 0) ||
+ (strcmp(argv[1], close) == 0)) {
+ int dev;
+ struct mmc *mmc;
+
+ if (argc == 2)
+ dev = curr_device;
+ else if (argc == 3)
+ dev = simple_strtoul(argv[2], NULL, 10);
+ else
+ return CMD_RET_USAGE;
+
+ mmc = find_mmc_device(dev);
+ if (!mmc) {
+ printf(no mmc device at slot %x\n, dev);
+ return 1;
+ }
+
+ if (IS_SD(mmc)) {
+ printf(SD device cannot be opened/closed\n);
+ return 1;
+ }
+
+ if (strcmp(argv[1], open) == 0) {
+ if (!(mmc_boot_open(mmc))) {
+ printf(EMMC OPEN Success.\n);
+ printf(\t\t\t!!!Notice!!!\n);
+ printf(!You must close EMMC
+boot Partition after all
+images are written\n);
+ printf(!EMMC boot partition
+has continuity at
+image writing time.\n);
+ printf(!So, Do not close boot
+partition, Before, all
+images are written.\n);
+ return 0;
+ } else {
+ printf(EMMC OPEN Failed.\n);
+ return 1;
+ }
+ }
+
+ if (strcmp(argv[1], close) == 0) {
+ if (!(mmc_boot_close(mmc))) {
+ printf(EMMC CLOSE Success.\n);
+ return 0;
+ } else {
+ printf(EMMC CLOSE Failed.\n);
+ return 1;
+ }
+ }
+ } else if (strcmp(argv[1], bootpart) == 0) {
+ int dev;
+ dev = simple_strtoul(argv[2], NULL, 10);
+
+ u32 bootsize = simple_strtoul(argv[3], NULL, 10);
+ u32 rpmbsize = simple_strtoul(argv[4], NULL, 10);
+ struct mmc *mmc = find_mmc_device(dev);
+ if (!mmc) {
+ printf(no mmc device at slot %x\n, dev);
+ return 1;
+ }
+
+ if (IS_SD(mmc)) {
+ printf(It is not a EMMC device\n);
+ return 1;
+ }
+
+ if (0 == mmc_boot_partition_size_change(mmc,
+ bootsize, rpmbsize)) {
+ printf(EMMC boot partition Size %d MB\n, bootsize);
+ printf(EMMC RPMB partition Size %d MB\n, rpmbsize);
+ return 0;
+ } else {
+ printf(EMMC boot partition Size change Failed.\n);
+ return 1;
+ }
}
state = MMC_INVALID;
@@ -317,5 +395,9 @@ U_BOOT_CMD(
mmc rescan\n
mmc part - lists available partition on current mmc device\n
mmc dev [dev] [part] - show or set current mmc device [partition]\n
- mmc list - lists available devices);
+ mmc list - lists available devices\n
+ mmc open device num - opens the specified device\n
+ mmc close device num - closes the specified device\n
+ mmc bootpart device num boot part size MB RPMB part size MB\n
+- change sizes of boot and RPMB partions of specified device\n);
#endif
--
1.8.0
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[U-Boot] [PATCH V2 0/9] EXYNOS5: Enable dwmmc
This patch set enables and initialises dwmmc for Exynos5250 on SMDK5250. Adds driver changes required for dwmmc. Adds dt support for dwmmc. Adds EMMC booting feature for SMDK5250. This patch set is based on: EXYNOS: mmc: support DesignWare Controller for Samsung-SoC, which is merged in u-boot-mmc Exynos: clock: support get_mmc_clk for exynos Add DT based ethernet driver for SMDK5250 SMDK5250: Add FDT support Changes from V1: 1)Corrected in response to review comments. 2)Created separate board files for dt and not-dt versions. 3)Added binding file for DWMMC device node. 4)Moved dwmmc clock setting from spl_boot.c to clock_init.c. Amar (9): FDT: Add compatible string for DWMMC EXYNOS5: FDT: Add DWMMC device node data DWMMC: Initialise dwmci and resolved the boot partition write issue EXYNOS5: DWMMC: Added dt support for DWMMC EXYNOS5: DWMMC: API to set mmc clock divisor SMDK5250: Enable DWMMC MMC: APIs to support creation of boot partition SMDK5250: Enable EMMC booting COMMON: MMC: Command to support EMMC booting arch/arm/cpu/armv7/exynos/clock.c | 38 - arch/arm/dts/exynos5250.dtsi | 32 arch/arm/include/asm/arch-exynos/clk.h| 3 + arch/arm/include/asm/arch-exynos/dwmmc.h | 12 +- board/samsung/dts/exynos5250-smdk5250.dts | 22 +++ board/samsung/smdk5250/Makefile | 4 + board/samsung/smdk5250/clock_init.c | 18 +++ board/samsung/smdk5250/clock_init.h | 5 + board/samsung/smdk5250/exynos5-dt.c | 235 ++ board/samsung/smdk5250/smdk5250.c | 76 +++--- board/samsung/smdk5250/spl_boot.c | 52 ++- common/cmd_mmc.c | 85 ++- doc/device-tree-bindings/exynos/dwmmc.txt | 29 drivers/mmc/dw_mmc.c | 14 +- drivers/mmc/exynos_dw_mmc.c | 116 ++- drivers/mmc/mmc.c | 118 +++ include/configs/exynos5250-dt.h | 2 + include/dwmmc.h | 4 + include/fdtdec.h | 1 + include/mmc.h | 16 ++ lib/fdtdec.c | 1 + 21 files changed, 806 insertions(+), 77 deletions(-) create mode 100644 board/samsung/smdk5250/exynos5-dt.c create mode 100644 doc/device-tree-bindings/exynos/dwmmc.txt -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/9] FDT: Add compatible string for DWMMC
Add required compatible information for DWMMC driver.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.com
---
include/fdtdec.h | 1 +
lib/fdtdec.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 539bb1b..f09c281 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -74,6 +74,7 @@ enum fdt_compat_id {
COMPAT_SAMSUNG_EXYNOS5_SOUND, /* Exynos Sound */
COMPAT_WOLFSON_WM8994_CODEC,/* Wolfson WM8994 Sound Codec */
COMPAT_SAMSUNG_EXYNOS_SPI, /* Exynos SPI */
+ COMPAT_SAMSUNG_EXYNOS5_DWMMC, /* Exynos5 DWMMC controller */
COMPAT_COUNT,
};
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 44c249d..6597661 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -51,6 +51,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(SAMSUNG_EXYNOS5_SOUND, samsung,exynos-sound),
COMPAT(WOLFSON_WM8994_CODEC, wolfson,wm8994-codec),
COMPAT(SAMSUNG_EXYNOS_SPI, samsung,exynos-spi),
+ COMPAT(SAMSUNG_EXYNOS5_DWMMC, samsung,exynos5250-dwmmc),
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)
--
1.8.0
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[U-Boot] [PATCH 2/9] EXYNOS5: FDT: Add DWMMC device node data
This patch adds DWMMC device node data for exynos5.
This patch also adds binding file for DWMMC device node.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.com
---
arch/arm/dts/exynos5250.dtsi | 32 +++
board/samsung/dts/exynos5250-smdk5250.dts | 22 +
doc/device-tree-bindings/exynos/dwmmc.txt | 29
3 files changed, 83 insertions(+)
create mode 100644 doc/device-tree-bindings/exynos/dwmmc.txt
diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index 1008797..b701ae5 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -138,4 +138,36 @@
reg = 0x131b 0x30;
interrupts = 0 130 0;
};
+
+ dwmmc@1220 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1220 0x1000;
+ interrupts = 0 75 0;
+ };
+
+ dwmmc@1221 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1221 0x1000;
+ interrupts = 0 76 0;
+ };
+
+ dwmmc@1222 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1222 0x1000;
+ interrupts = 0 77 0;
+ };
+
+ dwmmc@1223 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1223 0x1000;
+ interrupts = 0 78 0;
+ };
};
diff --git a/board/samsung/dts/exynos5250-smdk5250.dts
b/board/samsung/dts/exynos5250-smdk5250.dts
index a8e62da..9baf622 100644
--- a/board/samsung/dts/exynos5250-smdk5250.dts
+++ b/board/samsung/dts/exynos5250-smdk5250.dts
@@ -30,6 +30,10 @@
spi2 = /spi@12d4;
spi3 = /spi@131a;
spi4 = /spi@131b;
+ dwmmc0 = /dwmmc@1220;
+ dwmmc1 = /dwmmc@1221;
+ dwmmc2 = /dwmmc@1222;
+ dwmmc3 = /dwmmc@1223;
};
sromc@1225 {
@@ -59,4 +63,22 @@
compatible = wolfson,wm8994-codec;
};
};
+
+ dwmmc@1220 {
+ samsung,bus-width = 8;
+ samsung,timing = 1 3 3;
+ };
+
+ dwmmc@1221 {
+ status = disabled;
+ };
+
+ dwmmc@1222 {
+ samsung,bus-width = 4;
+ samsung,timing = 1 2 3;
+ };
+
+ dwmmc@1223 {
+ status = disabled;
+ };
};
diff --git a/doc/device-tree-bindings/exynos/dwmmc.txt
b/doc/device-tree-bindings/exynos/dwmmc.txt
new file mode 100644
index 000..6232ad6
--- /dev/null
+++ b/doc/device-tree-bindings/exynos/dwmmc.txt
@@ -0,0 +1,29 @@
+* Exynos 5250 DWC_mobile_storage
+
+The Exynos 5250 provides DWC_mobile_storage interface which supports
+. Embedded Multimedia Cards (EMMC-version 4.5)
+. Secure Digital memory (SD mem-version 2.0)
+. Secure Digital I/O (SDIO-version 3.0)
+. Consumer Electronics Advanced Transport Architecture (CE-ATA-version 1.1)
+
+The Exynos 5250 DWC_mobile_storage provides four channels.
+SOC specific and Board specific properties are channel specific.
+
+Required SoC Specific Properties:
+
+- compatible: should be
+ - samsung,exynos5250-dwmmc: for exynos5250 platforms
+
+- reg: physical base address of the controller and length of memory mapped
+ region.
+
+- interrupts: The interrupt number to the cpu.
+
+Required Board Specific Properties:
+
+- #address-cells: should be 1.
+- #size-cells: should be 0.
+- samsung,bus-width: The width of the bus used to interface the devices
+ supported by DWC_mobile_storage (SD-MMC/EMMC/SDIO).
+- samsung,timing: The timing values to be written into the
+ Drv/sample clock selection register of corresponding channel.
--
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[U-Boot] [PATCH 4/9] EXYNOS5: DWMMC: Added dt support for DWMMC
This patch adds dt support for DWMMC, by reading the dwmmc node data
from the device tree and initialising dwmmc channels as per data
obtained from the node.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.com
---
arch/arm/include/asm/arch-exynos/dwmmc.h | 12 ++--
drivers/mmc/exynos_dw_mmc.c | 116 +--
include/dwmmc.h | 4 ++
3 files changed, 119 insertions(+), 13 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/dwmmc.h
b/arch/arm/include/asm/arch-exynos/dwmmc.h
index 8acdf9b..39cd4c7 100644
--- a/arch/arm/include/asm/arch-exynos/dwmmc.h
+++ b/arch/arm/include/asm/arch-exynos/dwmmc.h
@@ -27,10 +27,10 @@
#define DWMCI_SET_DRV_CLK(x) ((x) 16)
#define DWMCI_SET_DIV_RATIO(x) ((x) 24)
-int exynos_dwmci_init(u32 regbase, int bus_width, int index);
+#define FSYS1_MMC0_DIV_VAL 0x0701
+
+#ifdef CONFIG_OF_CONTROL
+unsigned int exynos_dwmmc_init(const void *blob);
+#endif
-static inline unsigned int exynos_dwmmc_init(int index, int bus_width)
-{
- unsigned int base = samsung_get_base_mmc() + (0x1 * index);
- return exynos_dwmci_init(base, bus_width, index);
-}
+int exynos_dwmci_init(u32 regbase, int bus_width, int index);
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 72a31b7..541889f 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -19,39 +19,141 @@
*/
#include common.h
-#include malloc.h
#include dwmmc.h
+#include fdtdec.h
+#include libfdt.h
+#include malloc.h
#include asm/arch/dwmmc.h
#include asm/arch/clk.h
+#include asm/arch/pinmux.h
+
+#defineDWMMC_MAX_CH_NUM4
+#defineDWMMC_MAX_FREQ 5200
+#defineDWMMC_MIN_FREQ 40
+#defineDWMMC_MMC0_CLKSEL_VAL 0x03030001
+#defineDWMMC_MMC2_CLKSEL_VAL 0x03020001
static char *EXYNOS_NAME = EXYNOS DWMMC;
+u32 timing[3];
+/*
+ * Function used as callback function to initialise the
+ * CLKSEL register for every mmc channel.
+ */
static void exynos_dwmci_clksel(struct dwmci_host *host)
{
- u32 val;
- val = DWMCI_SET_SAMPLE_CLK(DWMCI_SHIFT_0) |
- DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) | DWMCI_SET_DIV_RATIO(0);
+ dwmci_writel(host, DWMCI_CLKSEL, host-clksel_val);
+}
- dwmci_writel(host, DWMCI_CLKSEL, val);
+unsigned int exynos_dwmci_get_clk(int dev_index)
+{
+ return get_mmc_clk(dev_index);
}
int exynos_dwmci_init(u32 regbase, int bus_width, int index)
{
struct dwmci_host *host = NULL;
+ int dev_id = 0;
host = malloc(sizeof(struct dwmci_host));
if (!host) {
printf(dwmci_host malloc fail!\n);
return 1;
}
+ /* Convert index into corresponding peripheral ID */
+ dev_id = index + PERIPH_ID_SDMMC0;
+
+ /* set the clock divisor - clk_div_fsys for mmc */
+ if (exynos5_mmc_set_clk_div(dev_id)) {
+ debug(mmc clock div set failed\n);
+ return -1;
+ }
host-name = EXYNOS_NAME;
host-ioaddr = (void *)regbase;
host-buswidth = bus_width;
+#ifdef CONFIG_OF_CONTROL
+ host-clksel_val = (DWMCI_SET_SAMPLE_CLK(timing[0]) |
+ DWMCI_SET_DRV_CLK(timing[1]) |
+ DWMCI_SET_DIV_RATIO(timing[2]));
+#else
+ if (0 == index)
+ host-clksel_val = DWMMC_MMC0_CLKSEL_VAL;
+ if (2 == index)
+ host-clksel_val = DWMMC_MMC2_CLKSEL_VAL;
+#endif
host-clksel = exynos_dwmci_clksel;
host-dev_index = index;
-
- add_dwmci(host, 5200, 40);
+ host-mmc_clk = exynos_dwmci_get_clk;
+ /* Add the mmc chennel to be registered with mmc core */
+ add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ);
return 0;
}
+#ifdef CONFIG_OF_CONTROL
+unsigned int exynos_dwmmc_init(const void *blob)
+{
+ u32 base;
+ int index, bus_width;
+ int node_list[DWMMC_MAX_CH_NUM];
+ int err = 0;
+ int dev_id, flag;
+ int count, i;
+
+ count = fdtdec_find_aliases_for_id(blob, dwmmc,
+ COMPAT_SAMSUNG_EXYNOS5_DWMMC, node_list,
+ DWMMC_MAX_CH_NUM);
+
+ for (i = 0; i count; i++) {
+ int node = node_list[i];
+
+ if (node = 0)
+ continue;
+
+ /* Extract device id for each mmc channel */
+ dev_id = pinmux_decode_periph_id(blob, node);
+
+ /* Get the bus width from the device node */
+ bus_width = fdtdec_get_int(blob, node, samsung,bus-width, 0);
+ if (bus_width 0) {
+ debug(DWMMC: Can't get bus-width\n);
+ return -1;
+ }
+ if (8 == bus_width)
+ flag
[U-Boot] [PATCH 5/9] EXYNOS5: DWMMC: API to set mmc clock divisor
This API computes the divisor value based on MPLL clock and
writes it into the FSYS1 register.
Signed-off-by: Amar amarendra...@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 38 --
arch/arm/include/asm/arch-exynos/clk.h | 3 +++
2 files changed, 39 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 731bbff..bc8e585 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -379,7 +379,7 @@ static unsigned long exynos4_get_mmc_clk(int dev_index)
(struct exynos4_clock *)samsung_get_base_clock();
unsigned long uclk, sclk;
unsigned int sel, ratio, pre_ratio;
- int shift;
+ int shift = 0;
sel = readl(clk-src_fsys);
sel = (sel (dev_index 2)) 0xf;
@@ -428,7 +428,7 @@ static unsigned long exynos5_get_mmc_clk(int dev_index)
(struct exynos5_clock *)samsung_get_base_clock();
unsigned long uclk, sclk;
unsigned int sel, ratio, pre_ratio;
- int shift;
+ int shift = 0;
sel = readl(clk-src_fsys);
sel = (sel (dev_index 2)) 0xf;
@@ -526,6 +526,40 @@ static void exynos5_set_mmc_clk(int dev_index, unsigned
int div)
writel(val, addr);
}
+/* exynos5: set the mmc clock div ratio in fsys1 */
+int exynos5_mmc_set_clk_div(int dev_id)
+{
+ struct exynos5_clock *clk =
+ (struct exynos5_clock *)samsung_get_base_clock();
+ unsigned int addr;
+ unsigned int clock;
+ unsigned int tmp;
+ unsigned int i;
+
+ /* get mpll clock */
+ clock = get_pll_clk(MPLL) / 100;
+
+ /*
+* CLK_DIV_FSYS1
+* MMC0_PRE_RATIO [15:8], MMC0_RATIO [3:0]
+* CLK_DIV_FSYS2
+* MMC2_PRE_RATIO [15:8], MMC2_RATIO [3:0]
+*/
+ if (dev_id = PERIPH_ID_SDMMC1)
+ addr = (unsigned int)clk-div_fsys1;
+ else
+ addr = (unsigned int)clk-div_fsys2;
+
+ tmp = readl(addr) ~FSYS1_MMC0_DIV_MASK;
+ for (i = 0; i = 0xf; i++) {
+ if ((clock / (i + 1)) = 400) {
+ writel(tmp | i 0, addr);
+ break;
+ }
+ }
+ return 0;
+}
+
/* get_lcd_clk: return lcd clock frequency */
static unsigned long exynos4_get_lcd_clk(void)
{
diff --git a/arch/arm/include/asm/arch-exynos/clk.h
b/arch/arm/include/asm/arch-exynos/clk.h
index ff155d8..3eaa041 100644
--- a/arch/arm/include/asm/arch-exynos/clk.h
+++ b/arch/arm/include/asm/arch-exynos/clk.h
@@ -29,6 +29,8 @@
#define VPLL 4
#define BPLL 5
+#define FSYS1_MMC0_DIV_MASK0xff0f
+
unsigned long get_pll_clk(int pllreg);
unsigned long get_arm_clk(void);
unsigned long get_i2c_clk(void);
@@ -36,6 +38,7 @@ unsigned long get_pwm_clk(void);
unsigned long get_uart_clk(int dev_index);
unsigned long get_mmc_clk(int deV_index);
void set_mmc_clk(int dev_index, unsigned int div);
+int exynos5_mmc_set_clk_div(int dev_index);
unsigned long get_lcd_clk(void);
void set_lcd_clk(void);
void set_mipi_clk(void);
--
1.8.0
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 6/9] SMDK5250: Enable DWMMC
This patch enables DWMMC for SMDK5250.
Supports both dt and non-dt versions. Two files are maintained, one for
dt version(smdk5250.c) and the other for non-dt version(exynos5-dt.c).
Signed-off-by: Amar amarendra...@samsung.com
---
board/samsung/smdk5250/Makefile | 4 +
board/samsung/smdk5250/exynos5-dt.c | 235
board/samsung/smdk5250/smdk5250.c | 76
include/configs/exynos5250-dt.h | 2 +
4 files changed, 264 insertions(+), 53 deletions(-)
create mode 100644 board/samsung/smdk5250/exynos5-dt.c
diff --git a/board/samsung/smdk5250/Makefile b/board/samsung/smdk5250/Makefile
index 47c6a5a..ecca9f3 100644
--- a/board/samsung/smdk5250/Makefile
+++ b/board/samsung/smdk5250/Makefile
@@ -32,8 +32,12 @@ COBJS+= tzpc_init.o
COBJS += smdk5250_spl.o
ifndef CONFIG_SPL_BUILD
+ifdef CONFIG_OF_CONTROL
+COBJS += exynos5-dt.o
+else
COBJS += smdk5250.o
endif
+endif
ifdef CONFIG_SPL_BUILD
COBJS += spl_boot.o
diff --git a/board/samsung/smdk5250/exynos5-dt.c
b/board/samsung/smdk5250/exynos5-dt.c
new file mode 100644
index 000..4b7e383
--- /dev/null
+++ b/board/samsung/smdk5250/exynos5-dt.c
@@ -0,0 +1,235 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include fdtdec.h
+#include asm/io.h
+#include i2c.h
+#include netdev.h
+#include spi.h
+#include asm/arch/cpu.h
+#include asm/arch/dwmmc.h
+#include asm/arch/gpio.h
+#include asm/arch/mmc.h
+#include asm/arch/pinmux.h
+#include asm/arch/sromc.h
+#include pmic.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+#if defined(CONFIG_PMIC)
+ pmic_init();
+#endif
+#ifdef CONFIG_EXYNOS_SPI
+ spi_init();
+#endif
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd-ram_size= get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_5, PHYS_SDRAM_7_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_6, PHYS_SDRAM_7_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_7, PHYS_SDRAM_7_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_8, PHYS_SDRAM_8_SIZE);
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ gd-bd-bi_dram[0].start = PHYS_SDRAM_1;
+ gd-bd-bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1,
+ PHYS_SDRAM_1_SIZE);
+ gd-bd-bi_dram[1].start = PHYS_SDRAM_2;
+ gd-bd-bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2,
+ PHYS_SDRAM_2_SIZE);
+ gd-bd-bi_dram[2].start = PHYS_SDRAM_3;
+ gd-bd-bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3,
+ PHYS_SDRAM_3_SIZE);
+ gd-bd-bi_dram[3].start = PHYS_SDRAM_4;
+ gd-bd-bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4,
+ PHYS_SDRAM_4_SIZE);
+ gd-bd-bi_dram[4].start = PHYS_SDRAM_5;
+ gd-bd-bi_dram[4].size = get_ram_size((long *)PHYS_SDRAM_5,
+ PHYS_SDRAM_5_SIZE);
+ gd-bd-bi_dram[5].start = PHYS_SDRAM_6;
+ gd-bd-bi_dram[5].size = get_ram_size((long *)PHYS_SDRAM_6,
+ PHYS_SDRAM_6_SIZE);
+ gd-bd-bi_dram[6].start = PHYS_SDRAM_7;
+ gd-bd-bi_dram[6].size = get_ram_size((long *)PHYS_SDRAM_7,
+ PHYS_SDRAM_7_SIZE);
+ gd-bd-bi_dram[7].start = PHYS_SDRAM_8;
+ gd-bd-bi_dram[7].size = get_ram_size((long *)PHYS_SDRAM_8,
+ PHYS_SDRAM_8_SIZE);
+}
+
+static int decode_sromc(const void *blob, struct fdt_sromc *config)
+{
+ int err;
+ int node;
+
+ node = fdtdec_next_compatible(blob, 0
[U-Boot] [PATCH 7/9] MMC: APIs to support creation of boot partition
This patch adds APIs to open, close and to create boot partiton for EMMC.
Signed-off-by: Amar amarendra...@samsung.com
---
drivers/mmc/mmc.c | 118 ++
include/mmc.h | 16
2 files changed, 134 insertions(+)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 5ffd8c5..9496bb9 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1302,3 +1302,121 @@ int mmc_initialize(bd_t *bis)
return 0;
}
+
+int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
+ unsigned long rpmbsize)
+{
+ int err;
+ struct mmc_cmd cmd;
+
+ /* Only use this command for raw EMMC moviNAND */
+ /* Enter backdoor mode */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = MMC_CMD62_ARG1;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error1 = %d\n, err);
+ return err;
+ }
+
+ /* Boot partition changing mode */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = MMC_CMD62_ARG2;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error2 = %d\n, err);
+ return err;
+ }
+ /* boot partition size is multiple of 128KB */
+ bootsize = ((bootsize*1024)/128);
+
+ /* Arg: boot partition size */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = bootsize;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error3 = %d\n, err);
+ return err;
+ }
+ /* RPMB partition size is multiple of 128KB */
+ rpmbsize = ((rpmbsize*1024)/128);
+ /* Arg: RPMB partition size */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = rpmbsize;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error4 = %d\n, err);
+ return err;
+ }
+ return 0;
+}
+
+int mmc_boot_open(struct mmc *mmc)
+{
+ int err;
+ struct mmc_cmd cmd;
+
+ /* Boot ack enable, boot partition enable , boot partition access */
+ cmd.cmdidx = MMC_CMD_SWITCH;
+ cmd.resp_type = MMC_RSP_R1b;
+
+ cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE 24 |
+ EXT_CSD_PART_CONF 16 |
+ (EXT_CSD_BOOT_ACK_ENABLE |
+ EXT_CSD_BOOT_PARTITION_ENABLE |
+ EXT_CSD_PARTITION_ACCESS_ENABLE) 8);
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_open: Error1 = %d\n, err);
+ return err;
+ }
+
+ /* 4bit transfer mode at booting time. */
+ cmd.cmdidx = MMC_CMD_SWITCH;
+ cmd.resp_type = MMC_RSP_R1b;
+
+ cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE 24|
+ EXT_CSD_BOOT_BUS_WIDTH 16|
+ ((10) 8));
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_open: Error2 = %d\n, err);
+ return err;
+ }
+
+ return 0;
+}
+
+int mmc_boot_close(struct mmc *mmc)
+{
+ int err;
+ struct mmc_cmd cmd;
+
+ /* Boot ack enable, boot partition enable , boot partition access */
+ cmd.cmdidx = MMC_CMD_SWITCH;
+ cmd.resp_type = MMC_RSP_R1b;
+
+ cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE 24|
+ EXT_CSD_PART_CONF 16|
+ (EXT_CSD_BOOT_ACK_ENABLE |
+ EXT_CSD_BOOT_PARTITION_ENABLE |
+ EXT_CSD_PARTITION_ACCESS_DISABLE) 8);
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_close: Error = %d\n, err);
+ return err;
+ }
+
+ return 0;
+}
diff --git a/include/mmc.h b/include/mmc.h
index a13e2bd..999f0a3 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -86,6 +86,11 @@
#define MMC_CMD_APP_CMD55
#define MMC_CMD_SPI_READ_OCR 58
#define MMC_CMD_SPI_CRC_ON_OFF 59
+#define MMC_CMD_RES_MAN62
+
+#define MMC_CMD62_ARG1 0xefac62ec
+#define MMC_CMD62_ARG2 0xcbaea7
+
#define SD_CMD_SEND_RELATIVE_ADDR 3
#define SD_CMD_SWITCH_FUNC 6
@@ -153,6 +158,7 @@
*/
#define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */
#define EXT_CSD_ERASE_GROUP_DEF175 /* R/W */
+#define EXT_CSD_BOOT_BUS_WIDTH 177
#define EXT_CSD_PART_CONF 179 /* R/W */
#define EXT_CSD_BUS_WIDTH 183 /* R/W */
#define EXT_CSD_HS_TIMING 185 /* R/W */
@@ -177,6 +183,12 @@
#define EXT_CSD_BUS_WIDTH_4
[U-Boot] [PATCH 8/9] SMDK5250: Enable EMMC booting
This patch adds support for EMMC booting on SMDK5250.
Signed-off-by: Amar amarendra...@samsung.com
---
board/samsung/smdk5250/clock_init.c | 18 +
board/samsung/smdk5250/clock_init.h | 5
board/samsung/smdk5250/spl_boot.c | 52 -
3 files changed, 69 insertions(+), 6 deletions(-)
diff --git a/board/samsung/smdk5250/clock_init.c
b/board/samsung/smdk5250/clock_init.c
index c009ae5..90d2199 100644
--- a/board/samsung/smdk5250/clock_init.c
+++ b/board/samsung/smdk5250/clock_init.c
@@ -28,6 +28,7 @@
#include asm/arch/clk.h
#include asm/arch/clock.h
#include asm/arch/spl.h
+#include asm/arch/dwmmc.h
#include clock_init.h
#include setup.h
@@ -664,3 +665,20 @@ void clock_init_dp_clock(void)
/* We run DP at 267 Mhz */
setbits_le32(clk-div_disp1_0, CLK_DIV_DISP1_0_FIMD1);
}
+
+/*
+ * Set clock divisor value for booting from emmc.
+ * Set DWMMC channel-0 clk div to operate mmc0 device at 50MHz.
+ */
+void emmc_boot_clk_div_set(void)
+{
+ struct exynos5_clock *clk = (struct exynos5_clock *)EXYNOS5_CLOCK_BASE;
+ unsigned int addr;
+ unsigned int div_mmc;
+
+ addr = (unsigned int) clk-div_fsys1;
+
+ div_mmc = readl(addr) ~FSYS1_MMC0_DIV_MASK;
+ div_mmc |= FSYS1_MMC0_DIV_VAL;
+ writel(div_mmc, addr);
+}
diff --git a/board/samsung/smdk5250/clock_init.h
b/board/samsung/smdk5250/clock_init.h
index f751bcb..9b156f7 100644
--- a/board/samsung/smdk5250/clock_init.h
+++ b/board/samsung/smdk5250/clock_init.h
@@ -146,4 +146,9 @@ struct mem_timings *clock_get_mem_timings(void);
* Initialize clock for the device
*/
void system_clock_init(void);
+
+/*
+ * Set clock divisor value for booting from emmc.
+ */
+void emmc_boot_clk_div_set(void);
#endif
diff --git a/board/samsung/smdk5250/spl_boot.c
b/board/samsung/smdk5250/spl_boot.c
index d8f3c1e..e94677b 100644
--- a/board/samsung/smdk5250/spl_boot.c
+++ b/board/samsung/smdk5250/spl_boot.c
@@ -23,16 +23,41 @@
#includecommon.h
#includeconfig.h
+#include asm/arch-exynos/dmc.h
+#include asm/arch/clock.h
+#include asm/arch/clk.h
+
+#include clock_init.h
+
+/* Index into irom ptr table */
+enum index {
+ MMC_INDEX,
+ EMMC44_INDEX,
+ EMMC44_END_INDEX,
+ SPI_INDEX,
+};
+
+/* IROM Function Pointers Table */
+void (*irom_ptr_table[])(void) = {
+ [MMC_INDEX] = (void *)0x02020030, /* iROM Function Pointer
+ -SDMMC boot */
+ [EMMC44_INDEX] = (void *)0x02020044,/* iROM Function Pointer
+ -EMMC 4.4 boot */
+ [EMMC44_END_INDEX] = (void *)0x02020048,/* iROM Function Pointer
+ -EMMC 4.4 end boot opration */
+ [SPI_INDEX] = (void *)0x02020058, /* iROM Function Pointer
+ -SPI boot */
+ };
+
enum boot_mode {
BOOT_MODE_MMC = 4,
BOOT_MODE_SERIAL = 20,
+ BOOT_MODE_EMMC = 8, /* EMMC4.4 */
/* Boot based on Operating Mode pin settings */
BOOT_MODE_OM = 32,
BOOT_MODE_USB, /* Boot using USB download */
};
- typedef u32 (*spi_copy_func_t)(u32 offset, u32 nblock, u32 dst);
-
/*
* Copy U-boot from mmc to RAM:
* COPY_BL2_FNPTR_ADDR: Address in iRAM, which Contains
@@ -40,23 +65,38 @@ enum boot_mode {
*/
void copy_uboot_to_ram(void)
{
- spi_copy_func_t spi_copy;
enum boot_mode bootmode;
- u32 (*copy_bl2)(u32, u32, u32);
+ u32 (*spi_copy)(u32 offset, u32 nblock, u32 dst);
+ u32 (*copy_bl2)(u32 offset, u32 nblock, u32 dst);
+ u32 (*copy_bl2_from_emmc)(u32 nblock, u32 dst);
+ void (*end_bootop_from_emmc)(void);
bootmode = readl(EXYNOS5_POWER_BASE) OM_STAT;
switch (bootmode) {
case BOOT_MODE_SERIAL:
- spi_copy = *(spi_copy_func_t *)EXYNOS_COPY_SPI_FNPTR_ADDR;
+ spi_copy = (void *) *(u32 *)irom_ptr_table[SPI_INDEX];
spi_copy(SPI_FLASH_UBOOT_POS, CONFIG_BL2_SIZE,
CONFIG_SYS_TEXT_BASE);
break;
case BOOT_MODE_MMC:
- copy_bl2 = (void *) *(u32 *)COPY_BL2_FNPTR_ADDR;
+ copy_bl2 = (void *) *(u32 *)irom_ptr_table[MMC_INDEX];
copy_bl2(BL2_START_OFFSET, BL2_SIZE_BLOC_COUNT,
CONFIG_SYS_TEXT_BASE);
break;
+ case BOOT_MODE_EMMC:
+ emmc_boot_clk_div_set();
+
+ copy_bl2_from_emmc =
+ (void *) *(u32 *)irom_ptr_table[EMMC44_INDEX];
+ end_bootop_from_emmc =
+ (void *) *(u32 *)irom_ptr_table[EMMC44_END_INDEX];
+
+ copy_bl2_from_emmc(BL2_SIZE_BLOC_COUNT, CONFIG_SYS_TEXT_BASE);
+ end_bootop_from_emmc();
+
+ break;
+
default
[U-Boot] [PATCH 9/9] COMMON: MMC: Command to support EMMC booting
This patch adds commands to open, close and create partitions on EMMC
Signed-off-by: Amar amarendra...@samsung.com
---
common/cmd_mmc.c | 85 +++-
1 file changed, 84 insertions(+), 1 deletion(-)
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 62a1c22..355ab8e 100644
--- a/common/cmd_mmc.c
+++ b/common/cmd_mmc.c
@@ -248,6 +248,85 @@ static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
curr_device, mmc-part_num);
return 0;
+ } else if ((strcmp(argv[1], open) == 0) ||
+ (strcmp(argv[1], close) == 0)) {
+ int dev;
+ struct mmc *mmc;
+
+ if (argc == 2)
+ dev = curr_device;
+ else if (argc == 3)
+ dev = simple_strtoul(argv[2], NULL, 10);
+ else
+ return CMD_RET_USAGE;
+
+ mmc = find_mmc_device(dev);
+ if (!mmc) {
+ printf(no mmc device at slot %x\n, dev);
+ return 1;
+ }
+
+ if (IS_SD(mmc)) {
+ printf(SD device cannot be opened/closed\n);
+ return 1;
+ }
+
+ if (strcmp(argv[1], open) == 0) {
+ if (!(mmc_boot_open(mmc))) {
+ printf(EMMC OPEN Success.\n);
+ printf(\t\t\t!!!Notice!!!\n);
+ printf(!You must close EMMC
+boot Partition after all
+images are written\n);
+ printf(!EMMC boot partition
+has continuity at
+image writing time.\n);
+ printf(!So, Do not close boot
+partition, Before, all
+images are written.\n);
+ return 0;
+ } else {
+ printf(EMMC OPEN Failed.\n);
+ return 1;
+ }
+ }
+
+ if (strcmp(argv[1], close) == 0) {
+ if (!(mmc_boot_close(mmc))) {
+ printf(EMMC CLOSE Success.\n);
+ return 0;
+ } else {
+ printf(EMMC CLOSE Failed.\n);
+ return 1;
+ }
+ }
+ } else if (strcmp(argv[1], bootpart) == 0) {
+ int dev;
+ dev = simple_strtoul(argv[2], NULL, 10);
+
+ struct mmc *mmc = find_mmc_device(dev);
+ u32 bootsize = simple_strtoul(argv[3], NULL, 10);
+ u32 rpmbsize = simple_strtoul(argv[4], NULL, 10);
+
+ if (!mmc) {
+ printf(no mmc device at slot %x\n, dev);
+ return 1;
+ }
+
+ if (IS_SD(mmc)) {
+ printf(It is not a EMMC device\n);
+ return 1;
+ }
+
+ if (0 == mmc_boot_partition_size_change(mmc,
+ bootsize, rpmbsize)) {
+ printf(EMMC boot partition Size %d MB\n, bootsize);
+ printf(EMMC RPMB partition Size %d MB\n, rpmbsize);
+ return 0;
+ } else {
+ printf(EMMC boot partition Size change Failed.\n);
+ return 1;
+ }
}
if (strcmp(argv[1], read) == 0)
@@ -318,5 +397,9 @@ U_BOOT_CMD(
mmc rescan\n
mmc part - lists available partition on current mmc device\n
mmc dev [dev] [part] - show or set current mmc device [partition]\n
- mmc list - lists available devices);
+ mmc list - lists available devices\n
+ mmc open device num - opens the specified device\n
+ mmc close device num - closes the specified device\n
+ mmc bootpart device num boot part size MB RPMB part size MB\n
+- change sizes of boot and RPMB partions of specified device\n);
#endif
--
1.8.0
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[U-Boot] [PATCH 5/9] EXYNOS5: DWMMC: API to set mmc clock divisor
This API computes the divisor value based on MPLL clock and
writes it into the FSYS1 register.
Signed-off-by: Amar amarendra...@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 39 ++-
arch/arm/include/asm/arch-exynos/clk.h |1 +
2 files changed, 38 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 731bbff..6517296 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -379,7 +379,7 @@ static unsigned long exynos4_get_mmc_clk(int dev_index)
(struct exynos4_clock *)samsung_get_base_clock();
unsigned long uclk, sclk;
unsigned int sel, ratio, pre_ratio;
- int shift;
+ int shift = 0;
sel = readl(clk-src_fsys);
sel = (sel (dev_index 2)) 0xf;
@@ -428,7 +428,7 @@ static unsigned long exynos5_get_mmc_clk(int dev_index)
(struct exynos5_clock *)samsung_get_base_clock();
unsigned long uclk, sclk;
unsigned int sel, ratio, pre_ratio;
- int shift;
+ int shift = 0;
sel = readl(clk-src_fsys);
sel = (sel (dev_index 2)) 0xf;
@@ -526,6 +526,41 @@ static void exynos5_set_mmc_clk(int dev_index, unsigned
int div)
writel(val, addr);
}
+/* exynos5: set the mmc clock div ratio in fsys1 */
+int exynos5_mmc_set_clk_div(int dev_index)
+{
+ struct exynos5_clock *clk =
+ (struct exynos5_clock *)samsung_get_base_clock();
+ unsigned int addr;
+ unsigned int clock;
+ unsigned int tmp;
+ unsigned int i;
+
+ /* get mpll clock */
+ clock = get_pll_clk(MPLL) / 100;
+
+ /*
+* CLK_DIV_FSYS1
+* MMC0_PRE_RATIO [15:8], MMC0_RATIO [3:0]
+* CLK_DIV_FSYS2
+* MMC2_PRE_RATIO [15:8], MMC2_RATIO [3:0]
+*/
+ if (dev_index 2) {
+ addr = (unsigned int)clk-div_fsys1;
+ } else {
+ addr = (unsigned int)clk-div_fsys2;
+ }
+
+ tmp = readl(addr) ~FSYS1_MMC0_DIV_MASK;
+ for (i = 0; i = 0xf; i++) {
+ if ((clock / (i + 1)) = 400) {
+ writel(tmp | i 0, addr);
+ break;
+ }
+ }
+ return 0;
+}
+
/* get_lcd_clk: return lcd clock frequency */
static unsigned long exynos4_get_lcd_clk(void)
{
diff --git a/arch/arm/include/asm/arch-exynos/clk.h
b/arch/arm/include/asm/arch-exynos/clk.h
index ff155d8..b0ecdd4 100644
--- a/arch/arm/include/asm/arch-exynos/clk.h
+++ b/arch/arm/include/asm/arch-exynos/clk.h
@@ -36,6 +36,7 @@ unsigned long get_pwm_clk(void);
unsigned long get_uart_clk(int dev_index);
unsigned long get_mmc_clk(int deV_index);
void set_mmc_clk(int dev_index, unsigned int div);
+int exynos5_mmc_set_clk_div(int dev_index);
unsigned long get_lcd_clk(void);
void set_lcd_clk(void);
void set_mipi_clk(void);
--
1.7.0.4
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[U-Boot] [PATCH 6/9] SMDK5250: Enable DWMMC
This patch enables DWMMC for SMDK5250.
Support both dt and non-dt versions.
Signed-off-by: Amar amarendra...@samsung.com
---
board/samsung/smdk5250/smdk5250.c | 36
include/configs/exynos5250-dt.h |9 +
2 files changed, 41 insertions(+), 4 deletions(-)
diff --git a/board/samsung/smdk5250/smdk5250.c
b/board/samsung/smdk5250/smdk5250.c
index 4d24978..7a9c8f6 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -27,6 +27,7 @@
#include netdev.h
#include spi.h
#include asm/arch/cpu.h
+#include asm/arch/dwmmc.h
#include asm/arch/gpio.h
#include asm/arch/mmc.h
#include asm/arch/pinmux.h
@@ -192,16 +193,43 @@ int checkboard(void)
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
- int err;
+ int err = 0, ret = 0;
+#ifdef CONFIG_OF_CONTROL
+ /* dwmmc initializattion for available channels */
+ err = exynos_dwmmc_init(gd-fdt_blob);
+ if (err) {
+ debug(dwmmc init failed\n);
+ }
+ ret |= err;
+#else
err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
if (err) {
debug(SDMMC0 not configured\n);
- return err;
}
+ ret |= err;
- err = s5p_mmc_init(0, 8);
- return err;
+ /*eMMC: dwmmc Channel-0 with 8 bit bus width */
+ err = exynos_dwmmc_init(0, 8);
+ if (err) {
+ debug(dwmmc Channel-0 init failed\n);
+ }
+ ret |= err;
+
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+ if (err) {
+ debug(SDMMC2 not configured\n);
+ }
+ ret |= err;
+
+ /*SD: dwmmc Channel-2 with 4 bit bus width */
+ err = exynos_dwmmc_init(2, 4);
+ if (err) {
+ debug(dwmmc Channel-2 init failed\n);
+ }
+ ret |= err;
+#endif
+ return ret;
}
#endif
diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index 12f555c..3b89e20 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -84,6 +84,8 @@
#define CONFIG_MMC
#define CONFIG_SDHCI
#define CONFIG_S5P_SDHCI
+#define CONFIG_DWMMC
+#define CONFIG_EXYNOS_DWMMC
#define CONFIG_BOARD_EARLY_INIT_F
@@ -116,6 +118,13 @@
#define CONFIG_SPL
#define COPY_BL2_FNPTR_ADDR0x02020030
+/* eMMC4.4 SPL */
+#define EMMC44_COPY_BL2_FNPTR_ADDR 0x02020044
+#define EMMC44_END_BOOTOP_FNPTR_ADDR 0x02020048
+
+#define FSYS1_MMC0_DIV_MASK0xff0f
+
+
/* specific .lds file */
#define CONFIG_SPL_LDSCRIPTboard/samsung/smdk5250/smdk5250-uboot-spl.lds
#define CONFIG_SPL_TEXT_BASE 0x02023400
--
1.7.0.4
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[U-Boot] [PATCH 7/9] MMC: APIs to support creation of boot partition
This pathc adds APIs to open, close and to create boot partiton for eMMC.
Signed-off-by: Amar amarendra...@samsung.com
---
drivers/mmc/mmc.c | 118 +
include/mmc.h | 16 +++
2 files changed, 134 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 5ffd8c5..88b0435 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1302,3 +1302,121 @@ int mmc_initialize(bd_t *bis)
return 0;
}
+
+int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
+ unsigned long rpmbsize)
+{
+ int err;
+ struct mmc_cmd cmd;
+
+ /* Only use this command for raw eMMC moviNAND */
+ /* Enter backdoor mode */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = MMC_CMD62_ARG1;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error1 = %d\n, err);
+ return err;
+ }
+
+ /* Boot partition changing mode */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = MMC_CMD62_ARG2;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error2 = %d\n, err);
+ return err;
+ }
+ /* boot partition size is multiple of 128KB */
+ bootsize = ((bootsize*1024)/128);
+
+ /* Arg: boot partition size */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = bootsize;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error3 = %d\n, err);
+ return err;
+ }
+ /* RPMB partition size is multiple of 128KB */
+ rpmbsize = ((rpmbsize*1024)/128);
+ /* Arg: RPMB partition size */
+ cmd.cmdidx = MMC_CMD_RES_MAN;
+ cmd.resp_type = MMC_RSP_R1b;
+ cmd.cmdarg = rpmbsize;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_partition_size_change: Error4 = %d\n, err);
+ return err;
+ }
+ return 0;
+}
+
+int mmc_boot_open(struct mmc *mmc)
+{
+ int err;
+ struct mmc_cmd cmd;
+
+ /* Boot ack enable, boot partition enable , boot partition access */
+ cmd.cmdidx = MMC_CMD_SWITCH;
+ cmd.resp_type = MMC_RSP_R1b;
+
+ cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE 24 |
+ EXT_CSD_PART_CONF 16 |
+ (EXT_CSD_BOOT_ACK_ENABLE |
+ EXT_CSD_BOOT_PARTITION_ENABLE |
+ EXT_CSD_PARTITION_ACCESS_ENABLE) 8);
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_open: Error1 = %d\n, err);
+ return err;
+ }
+
+ /* 4bit transfer mode at booting time. */
+ cmd.cmdidx = MMC_CMD_SWITCH;
+ cmd.resp_type = MMC_RSP_R1b;
+
+ cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE 24|
+ EXT_CSD_BOOT_BUS_WIDTH 16|
+ ((10) 8));
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_open: Error2 = %d\n, err);
+ return err;
+ }
+
+ return 0;
+}
+
+int mmc_boot_close(struct mmc *mmc)
+{
+ int err;
+ struct mmc_cmd cmd;
+
+ /* Boot ack enable, boot partition enable , boot partition access */
+ cmd.cmdidx = MMC_CMD_SWITCH;
+ cmd.resp_type = MMC_RSP_R1b;
+
+ cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE 24|
+ EXT_CSD_PART_CONF 16|
+ (EXT_CSD_BOOT_ACK_ENABLE |
+ EXT_CSD_BOOT_PARTITION_ENABLE |
+ EXT_CSD_PARTITION_ACCESS_DISABLE) 8);
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err) {
+ debug(mmc_boot_close: Error = %d\n, err);
+ return err;
+ }
+
+ return 0;
+}
diff --git a/include/mmc.h b/include/mmc.h
index a13e2bd..999f0a3 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -86,6 +86,11 @@
#define MMC_CMD_APP_CMD55
#define MMC_CMD_SPI_READ_OCR 58
#define MMC_CMD_SPI_CRC_ON_OFF 59
+#define MMC_CMD_RES_MAN62
+
+#define MMC_CMD62_ARG1 0xefac62ec
+#define MMC_CMD62_ARG2 0xcbaea7
+
#define SD_CMD_SEND_RELATIVE_ADDR 3
#define SD_CMD_SWITCH_FUNC 6
@@ -153,6 +158,7 @@
*/
#define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */
#define EXT_CSD_ERASE_GROUP_DEF175 /* R/W */
+#define EXT_CSD_BOOT_BUS_WIDTH 177
#define EXT_CSD_PART_CONF 179 /* R/W */
#define EXT_CSD_BUS_WIDTH 183 /* R/W */
#define EXT_CSD_HS_TIMING 185 /* R/W */
@@ -177,6 +183,12 @@
#define
[U-Boot] [PATCH 8/9] SMDK5250: Enable eMMC booting
This patch adds support for eMMC booting on SMDK5250
Signed-off-by: Amar amarendra...@samsung.com
---
board/samsung/smdk5250/spl_boot.c | 38 -
1 files changed, 37 insertions(+), 1 deletions(-)
diff --git a/board/samsung/smdk5250/spl_boot.c
b/board/samsung/smdk5250/spl_boot.c
index d8f3c1e..2648b4e 100644
--- a/board/samsung/smdk5250/spl_boot.c
+++ b/board/samsung/smdk5250/spl_boot.c
@@ -23,15 +23,40 @@
#includecommon.h
#includeconfig.h
+#include asm/arch/clock.h
+#include asm/arch/clk.h
+
+#define FSYS1_MMC0_DIV_VAL 0x0701
+
enum boot_mode {
BOOT_MODE_MMC = 4,
+ BOOT_MODE_eMMC = 8, /* eMMC44 */
BOOT_MODE_SERIAL = 20,
/* Boot based on Operating Mode pin settings */
BOOT_MODE_OM = 32,
BOOT_MODE_USB, /* Boot using USB download */
};
- typedef u32 (*spi_copy_func_t)(u32 offset, u32 nblock, u32 dst);
+typedef u32 (*spi_copy_func_t)(u32 offset, u32 nblock, u32 dst);
+static void set_emmc_clk(void);
+
+/*
+* Set MMC0 clock divisor value.
+* So that the mmc0 device operating freq is 50MHz.
+*/
+static void set_emmc_clk(void)
+{
+ struct exynos5_clock *clk = (struct exynos5_clock *)EXYNOS5_CLOCK_BASE;
+ unsigned int addr;
+ unsigned int div_mmc;
+
+ addr = (unsigned int) clk-div_fsys1;
+
+ div_mmc = readl(addr) ~FSYS1_MMC0_DIV_MASK;
+ div_mmc |= FSYS1_MMC0_DIV_VAL;
+ writel(div_mmc, addr);
+}
+
/*
* Copy U-boot from mmc to RAM:
@@ -43,6 +68,8 @@ void copy_uboot_to_ram(void)
spi_copy_func_t spi_copy;
enum boot_mode bootmode;
u32 (*copy_bl2)(u32, u32, u32);
+ u32 (*copy_bl2_emmc)(u32, u32);
+ void (*end_bootop_emmc)(void);
bootmode = readl(EXYNOS5_POWER_BASE) OM_STAT;
@@ -57,6 +84,15 @@ void copy_uboot_to_ram(void)
copy_bl2(BL2_START_OFFSET, BL2_SIZE_BLOC_COUNT,
CONFIG_SYS_TEXT_BASE);
break;
+ case BOOT_MODE_eMMC:
+ set_emmc_clk();
+ end_bootop_emmc = (void *) *(u32 *)EMMC44_END_BOOTOP_FNPTR_ADDR;
+ copy_bl2_emmc = (void *) *(u32 *)EMMC44_COPY_BL2_FNPTR_ADDR;
+
+ copy_bl2_emmc(BL2_SIZE_BLOC_COUNT, CONFIG_SYS_TEXT_BASE);
+ end_bootop_emmc();
+ break;
+
default:
break;
}
--
1.7.0.4
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[U-Boot] [PATCH 9/9] COMMON: MMC: Command to support eMMC booting
This patch adds commands to open, close and create partitions on eMMC
Signed-off-by: Amar amarendra...@samsung.com
---
common/cmd_mmc.c | 101 +-
1 files changed, 100 insertions(+), 1 deletions(-)
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 62a1c22..1fd6b94 100644
--- a/common/cmd_mmc.c
+++ b/common/cmd_mmc.c
@@ -248,6 +248,102 @@ static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int
argc, char * const argv[])
curr_device, mmc-part_num);
return 0;
+ } else if (strcmp(argv[1], open) == 0) {
+ int dev;
+ struct mmc *mmc;
+
+ if (argc == 2)
+ dev = curr_device;
+ else if (argc == 3)
+ dev = simple_strtoul(argv[2], NULL, 10);
+ else if (argc == 4)
+ return 1;
+
+ else
+ return CMD_RET_USAGE;
+
+ mmc = find_mmc_device(dev);
+ if (!mmc) {
+ printf(no mmc device at slot %x\n, dev);
+ return 1;
+ }
+
+ if (IS_SD(mmc)) {
+ printf(SD device cannot be opened/closed\n);
+ return 1;
+ }
+
+ if (!(mmc_boot_open(mmc))) {
+ printf(eMMC OPEN Success.!!\n);
+ printf(\t\t\t!!!Notice!!!\n);
+ printf(!You must close eMMC boot Partition
+ after all image writing!\n);
+ printf(!eMMC boot partition has continuity
+ at image writing time.!\n);
+ printf(!So, Do not close boot partition, Before,
+ all images is written.!\n);
+ } else {
+ printf(eMMC OPEN Failed.!!\n);
+ }
+ return 0;
+
+ } else if (strcmp(argv[1], close) == 0) {
+ int dev;
+ struct mmc *mmc;
+
+ if (argc == 2)
+ dev = curr_device;
+ else if (argc == 3)
+ dev = simple_strtoul(argv[2], NULL, 10);
+ else if (argc == 4)
+ return 1;
+ else
+ return CMD_RET_USAGE;
+
+ mmc = find_mmc_device(dev);
+ if (!mmc) {
+ printf(no mmc device at slot %x\n, dev);
+ return 1;
+ }
+
+ if (IS_SD(mmc)) {
+ printf(SD device cannot be opened/closed\n);
+ return 1;
+ }
+
+ if (!(mmc_boot_close(mmc)))
+ printf(eMMC CLOSE Success.!!\n);
+ else
+ printf(eMMC CLOSE Failed.!!\n);
+
+ return 0;
+
+ } else if (strcmp(argv[1], bootpart) == 0) {
+ int dev;
+ dev = simple_strtoul(argv[2], NULL, 10);
+
+ struct mmc *mmc = find_mmc_device(dev);
+ u32 bootsize = simple_strtoul(argv[3], NULL, 10);
+ u32 rpmbsize = simple_strtoul(argv[4], NULL, 10);
+
+ if (!mmc) {
+ printf(no mmc device at slot %x\n, dev);
+ return 1;
+ }
+
+ if (IS_SD(mmc)) {
+ printf(It is not a eMMC device\n);
+ return 1;
+ }
+
+ if (0 == mmc_boot_partition_size_change(mmc,
+ bootsize, rpmbsize)) {
+ printf(eMMC boot partition Size %d MB!!\n, bootsize);
+ printf(eMMC RPMB partition Size %d MB!!\n, rpmbsize);
+ } else {
+ printf(eMMC boot partition Size change Failed.!!\n);
+ }
+ return 0;
}
if (strcmp(argv[1], read) == 0)
@@ -318,5 +414,8 @@ U_BOOT_CMD(
mmc rescan\n
mmc part - lists available partition on current mmc device\n
mmc dev [dev] [part] - show or set current mmc device [partition]\n
- mmc list - lists available devices);
+ mmc list - lists available devices\n
+ mmc open device num - opens the specified device\n
+ mmc close device num - closes the specified device\n
+ mmc bootpart device num boot part size MB RPMB part size MB\n);
#endif
--
1.7.0.4
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[U-Boot] [PATCH 1/9] FDT: Add compatible string for DWMMC
Add required compatible information for DWMMC driver.
Signed-off-by: Amar amarendra...@samsung.com
---
include/fdtdec.h |1 +
lib/fdtdec.c |1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 539bb1b..f09c281 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -74,6 +74,7 @@ enum fdt_compat_id {
COMPAT_SAMSUNG_EXYNOS5_SOUND, /* Exynos Sound */
COMPAT_WOLFSON_WM8994_CODEC,/* Wolfson WM8994 Sound Codec */
COMPAT_SAMSUNG_EXYNOS_SPI, /* Exynos SPI */
+ COMPAT_SAMSUNG_EXYNOS5_DWMMC, /* Exynos5 DWMMC controller */
COMPAT_COUNT,
};
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 44c249d..6597661 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -51,6 +51,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(SAMSUNG_EXYNOS5_SOUND, samsung,exynos-sound),
COMPAT(WOLFSON_WM8994_CODEC, wolfson,wm8994-codec),
COMPAT(SAMSUNG_EXYNOS_SPI, samsung,exynos-spi),
+ COMPAT(SAMSUNG_EXYNOS5_DWMMC, samsung,exynos5250-dwmmc),
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)
--
1.7.0.4
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[U-Boot] [PATCH 0/9] EXYNOS5: Enable dwmmc
This patch set enables and initialises dwmmc for Exynos5250 on SMDK5250. Adds driver changes required for dwmmc. Adds dt support for dwmmc. Adds eMMC booting feature for SMDK5250. This patch set is based on: EXYNOS: mmc: support DesignWare Controller for Samsung-SoC, which is merged in u-boot-mmc Exynos: clock: support get_mmc_clk for exynos Add DT based ethernet driver for SMDK5250 SMDK5250: Add FDT support Amar (9): FDT: Add compatible string for DWMMC EXYNOS5: FDT: Add DWMMC device node data DWMMC: Initialise dwmci and resolved the boot partition write issue EXYNOS5: DWMMC: Added dt support for DWMMC EXYNOS5: DWMMC: API to set mmc clock divisor SMDK5250: Enable DWMMC MMC: APIs to support creation of boot partition SMDK5250: Enable eMMC booting COMMON: MMC: Command to support eMMC booting arch/arm/cpu/armv7/exynos/clock.c | 39 +- arch/arm/dts/exynos5250.dtsi | 32 arch/arm/include/asm/arch-exynos/clk.h|1 + arch/arm/include/asm/arch-exynos/dwmmc.h |4 + board/samsung/dts/exynos5250-smdk5250.dts | 24 ++ board/samsung/smdk5250/smdk5250.c | 36 - board/samsung/smdk5250/spl_boot.c | 38 +- common/cmd_mmc.c | 101 - drivers/mmc/dw_mmc.c | 12 +++- drivers/mmc/exynos_dw_mmc.c | 117 +++-- drivers/mmc/mmc.c | 118 + include/configs/exynos5250-dt.h |9 ++ include/dwmmc.h |4 + include/fdtdec.h |1 + include/mmc.h | 16 lib/fdtdec.c |1 + 16 files changed, 538 insertions(+), 15 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/9] EXYNOS5: FDT: Add DWMMC device node data
Add DWMMC device node data for exynos5
Signed-off-by: Amar amarendra...@samsung.com
---
arch/arm/dts/exynos5250.dtsi | 32 +
board/samsung/dts/exynos5250-smdk5250.dts | 24 +
2 files changed, 56 insertions(+), 0 deletions(-)
diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index 1008797..b701ae5 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -138,4 +138,36 @@
reg = 0x131b 0x30;
interrupts = 0 130 0;
};
+
+ dwmmc@1220 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1220 0x1000;
+ interrupts = 0 75 0;
+ };
+
+ dwmmc@1221 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1221 0x1000;
+ interrupts = 0 76 0;
+ };
+
+ dwmmc@1222 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1222 0x1000;
+ interrupts = 0 77 0;
+ };
+
+ dwmmc@1223 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = samsung,exynos5250-dwmmc;
+ reg = 0x1223 0x1000;
+ interrupts = 0 78 0;
+ };
};
diff --git a/board/samsung/dts/exynos5250-smdk5250.dts
b/board/samsung/dts/exynos5250-smdk5250.dts
index a8e62da..b1b8d71 100644
--- a/board/samsung/dts/exynos5250-smdk5250.dts
+++ b/board/samsung/dts/exynos5250-smdk5250.dts
@@ -30,6 +30,10 @@
spi2 = /spi@12d4;
spi3 = /spi@131a;
spi4 = /spi@131b;
+ dwmmc0 = /dwmmc@1220;
+ dwmmc1 = /dwmmc@1221;
+ dwmmc2 = /dwmmc@1222;
+ dwmmc3 = /dwmmc@1223;
};
sromc@1225 {
@@ -59,4 +63,24 @@
compatible = wolfson,wm8994-codec;
};
};
+
+ dwmmc@1220 {
+ index = 0;
+ bus-width = 8;
+ timing = 1 3 3;
+ };
+
+ dwmmc@1221 {
+ status = disabled;
+ };
+
+ dwmmc@1222 {
+ index = 2;
+ bus-width = 4;
+ timing = 1 2 3;
+ };
+
+ dwmmc@1223 {
+ status = disabled;
+ };
};
--
1.7.0.4
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[U-Boot] [PATCH 4/9] EXYNOS5: DWMMC: Added dt support for DWMMC
Signed-off-by: Amar amarendra...@samsung.com
---
arch/arm/include/asm/arch-exynos/dwmmc.h |4 +
drivers/mmc/exynos_dw_mmc.c | 117 --
include/dwmmc.h |4 +
3 files changed, 119 insertions(+), 6 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/dwmmc.h
b/arch/arm/include/asm/arch-exynos/dwmmc.h
index 8acdf9b..92352df 100644
--- a/arch/arm/include/asm/arch-exynos/dwmmc.h
+++ b/arch/arm/include/asm/arch-exynos/dwmmc.h
@@ -27,6 +27,9 @@
#define DWMCI_SET_DRV_CLK(x) ((x) 16)
#define DWMCI_SET_DIV_RATIO(x) ((x) 24)
+#ifdef CONFIG_OF_CONTROL
+unsigned int exynos_dwmmc_init(const void *blob);
+#else
int exynos_dwmci_init(u32 regbase, int bus_width, int index);
static inline unsigned int exynos_dwmmc_init(int index, int bus_width)
@@ -34,3 +37,4 @@ static inline unsigned int exynos_dwmmc_init(int index, int
bus_width)
unsigned int base = samsung_get_base_mmc() + (0x1 * index);
return exynos_dwmci_init(base, bus_width, index);
}
+#endif
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 72a31b7..3b3e3e5 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -19,23 +19,38 @@
*/
#include common.h
-#include malloc.h
#include dwmmc.h
+#include fdtdec.h
+#include libfdt.h
+#include malloc.h
#include asm/arch/dwmmc.h
#include asm/arch/clk.h
+#include asm/arch/pinmux.h
+
+#defineDWMMC_MAX_CH_NUM4
+#defineDWMMC_MAX_FREQ 5200
+#defineDWMMC_MIN_FREQ 40
+#defineDWMMC_MMC0_CLKSEL_VAL 0x03030001
+#defineDWMMC_MMC2_CLKSEL_VAL 0x03020001
static char *EXYNOS_NAME = EXYNOS DWMMC;
static void exynos_dwmci_clksel(struct dwmci_host *host)
{
- u32 val;
- val = DWMCI_SET_SAMPLE_CLK(DWMCI_SHIFT_0) |
- DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) | DWMCI_SET_DIV_RATIO(0);
+ dwmci_writel(host, DWMCI_CLKSEL, host-clksel_val);
+}
- dwmci_writel(host, DWMCI_CLKSEL, val);
+unsigned int exynos_dwmci_get_clk(int dev_index)
+{
+ return get_mmc_clk(dev_index);
}
+#ifdef CONFIG_OF_CONTROL
+static int exynos_dwmci_init(u32 regbase, int bus_width,
+ int index, u32 *timing)
+#else
int exynos_dwmci_init(u32 regbase, int bus_width, int index)
+#endif
{
struct dwmci_host *host = NULL;
host = malloc(sizeof(struct dwmci_host));
@@ -44,14 +59,104 @@ int exynos_dwmci_init(u32 regbase, int bus_width, int
index)
return 1;
}
+ /* set the clock divisor - clk_div_fsys for mmc */
+ if (exynos5_mmc_set_clk_div(index)) {
+ debug(mmc clock div set failed\n);
+ return -1;
+ }
+
host-name = EXYNOS_NAME;
host-ioaddr = (void *)regbase;
host-buswidth = bus_width;
+#ifdef CONFIG_OF_CONTROL
+ host-clksel_val = (DWMCI_SET_SAMPLE_CLK(timing[0]) |
+ DWMCI_SET_DRV_CLK(timing[1]) |
+ DWMCI_SET_DIV_RATIO(timing[2]));
+#else
+ if (0 == index)
+ host-clksel_val = DWMMC_MMC0_CLKSEL_VAL;
+ if (2 == index)
+ host-clksel_val = DWMMC_MMC2_CLKSEL_VAL;
+#endif
host-clksel = exynos_dwmci_clksel;
host-dev_index = index;
+ host-mmc_clk = exynos_dwmci_get_clk;
- add_dwmci(host, 5200, 40);
+ add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ);
return 0;
}
+#ifdef CONFIG_OF_CONTROL
+unsigned int exynos_dwmmc_init(const void *blob)
+{
+ u32 base;
+ int index, bus_width;
+ int node_list[DWMMC_MAX_CH_NUM];
+ int err = 0;
+ int dev_id, flag;
+ u32 timing[3];
+ int count, i;
+
+ count = fdtdec_find_aliases_for_id(blob, dwmmc,
+ COMPAT_SAMSUNG_EXYNOS5_DWMMC, node_list,
+ DWMMC_MAX_CH_NUM);
+
+ for (i = 0; i count; i++) {
+ int node = node_list[i];
+
+ if (node = 0)
+ continue;
+
+ /* config pinmux for each mmc channel */
+ dev_id = pinmux_decode_periph_id(blob, node);
+ if (dev_id == PERIPH_ID_SDMMC0)
+ flag = PINMUX_FLAG_8BIT_MODE;
+ else
+ flag = PINMUX_FLAG_NONE;
+
+ err = exynos_pinmux_config(dev_id, flag);
+ if (err) {
+ debug(DWMMC not configured\n);
+ return err;
+ }
+
+ /* Get the base address from the device node */
+ base = fdtdec_get_addr(blob, node, reg);
+ if (!base) {
+ debug(DWMMC: Can't get base address\n);
+ return -1;
+ }
+
+ /* Get the channel index from the device node
[U-Boot] [PATCH 0/4] EXYNOS5: Enable dwmmc
This patch set enables the dwmmc for Exynos5250 on SMDK5250. Also does the required driver changes. This patch set is based on: EXYNOS: mmc: support DesignWare Controller for Samsung-SoC Exynos: clock: support get_mmc_clk for exynos Amar (4): MMC: DWMMC: Modified fifo size computation MMC: EXYNOS: Added call back function for clock get EXYNOS: CLOCK: Initialised the local variable SMDK5250: Initialise and enable dwmmc channels arch/arm/cpu/armv7/exynos/clock.c |4 ++-- board/samsung/smdk5250/smdk5250.c | 32 ++-- drivers/mmc/dw_mmc.c |2 ++ drivers/mmc/exynos_dw_mmc.c | 13 - include/configs/smdk5250.h|4 ++-- 5 files changed, 44 insertions(+), 11 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/4] MMC: EXYNOS: Added call back function for clock get
This patch defines the call back required by dw mmc driver to get the
clock value. It also adds function to set the dw mmc clock divider ratio.
Signed-off-by: Amarendra Reddy amarendra...@samsung.com
---
drivers/mmc/exynos_dw_mmc.c | 14 +-
1 files changed, 13 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 72a31b7..7cc8aba 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -30,25 +30,37 @@ static void exynos_dwmci_clksel(struct dwmci_host *host)
{
u32 val;
val = DWMCI_SET_SAMPLE_CLK(DWMCI_SHIFT_0) |
- DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) | DWMCI_SET_DIV_RATIO(0);
+ DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) |
+ DWMCI_SET_DIV_RATIO(DWMCI_SHIFT_0);
dwmci_writel(host, DWMCI_CLKSEL, val);
}
+unsigned int exynos_dwmci_get_clk(int dev_index)
+{
+ return get_mmc_clk(dev_index);
+}
+
int exynos_dwmci_init(u32 regbase, int bus_width, int index)
{
struct dwmci_host *host = NULL;
+ int div = 0;
host = malloc(sizeof(struct dwmci_host));
if (!host) {
printf(dwmci_host malloc fail!\n);
return 1;
}
+ div = 1;
+ /* Set the mmc clock divider ratio pre-ratio */
+ set_mmc_clk(index, div);
+
host-name = EXYNOS_NAME;
host-ioaddr = (void *)regbase;
host-buswidth = bus_width;
host-clksel = exynos_dwmci_clksel;
host-dev_index = index;
+ host-mmc_clk = exynos_dwmci_get_clk;
add_dwmci(host, 5200, 40);
--
1.7.0.4
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[U-Boot] [PATCH 3/4] EXYNOS: CLOCK: Initialised the local variable
This patch initialises the local variable 'shift' to zero to avoid improper extraction of ratio and pre-ratio divider values. Extraction of improper values was happening due to garbage value present in local variable. Signed-off-by: Amarendra Reddy amarendra...@samsung.com --- arch/arm/cpu/armv7/exynos/clock.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 731bbff..0bcf05f 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -379,7 +379,7 @@ static unsigned long exynos4_get_mmc_clk(int dev_index) (struct exynos4_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel, ratio, pre_ratio; - int shift; + int shift = 0; sel = readl(clk-src_fsys); sel = (sel (dev_index 2)) 0xf; @@ -428,7 +428,7 @@ static unsigned long exynos5_get_mmc_clk(int dev_index) (struct exynos5_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel, ratio, pre_ratio; - int shift; + int shift = 0; sel = readl(clk-src_fsys); sel = (sel (dev_index 2)) 0xf; -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/4] MMC: DWMMC: Modified fifo size computation
The current implementation of fifo size computation was giving improper values for eMMC channel. Modified the computation as per user manual. Signed-off-by: Amarendra Reddy amarendra...@samsung.com --- drivers/mmc/dw_mmc.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 4070d4e..62dc152 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -332,6 +332,8 @@ static int dwmci_init(struct mmc *mmc) dwmci_writel(host, DWMCI_BMOD, 1); fifo_size = dwmci_readl(host, DWMCI_FIFOTH); + fifo_size = ((fifo_size RX_WMARK(0xFFF)) 16) + 1; + if (host-fifoth_val) fifoth_val = host-fifoth_val; else -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/4] SMDK5250: Initialise and enable dwmmc channels
This patch initialises and enables dwmmc channels 0 and 2 for SMDK5250.
It also initialises the pinmux for the same.
Signed-off-by: Amarendra Reddy amarendra...@samsung.com
---
board/samsung/smdk5250/smdk5250.c | 22 +-
include/configs/smdk5250.h|4 ++--
2 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/board/samsung/smdk5250/smdk5250.c
b/board/samsung/smdk5250/smdk5250.c
index 4c50342..9503510 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -26,6 +26,7 @@
#include netdev.h
#include spi.h
#include asm/arch/cpu.h
+#include asm/arch/dwmmc.h
#include asm/arch/gpio.h
#include asm/arch/mmc.h
#include asm/arch/pinmux.h
@@ -139,13 +140,32 @@ int board_mmc_init(bd_t *bis)
{
int err;
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+ if (err) {
+ debug(SDMMC2 not configured\n);
+ return err;
+ }
+
+ /*SD: dwmmc Channel-2 with 4 bit bus width */
+ err = exynos_dwmmc_init(2, 4);
+ if (err) {
+ debug(dwmmc Channel-2 init failed\n);
+ return err;
+ }
+
err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
if (err) {
debug(SDMMC0 not configured\n);
return err;
}
- err = s5p_mmc_init(0, 8);
+ /*eMMC: dwmmc Channel-0 with 8 bit bus width */
+ err = exynos_dwmmc_init(0, 8);
+ if (err) {
+ debug(dwmmc Channel-0 init failed\n);
+ return err;
+ }
+
return err;
}
#endif
diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h
index e412da8..7dc2d96 100644
--- a/include/configs/smdk5250.h
+++ b/include/configs/smdk5250.h
@@ -77,8 +77,8 @@
/* SD/MMC configuration */
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC
-#define CONFIG_SDHCI
-#define CONFIG_S5P_SDHCI
+#define CONFIG_DWMMC
+#define CONFIG_EXYNOS_DWMMC
#define CONFIG_BOARD_EARLY_INIT_F
--
1.7.0.4
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