Re: [PATCH v2 0/3] Add Android 14 bootflow support for AM62X and AM62P board
On September 12, 2024 thus sayeth Guillaume La Roque: > Ths patchset add support of Android 14 with boot image version 4 > for : > - AM62X-SK EVM: https://www.ti.com/tool/SK-AM62B > - BeaglePlay: https://beagleplay.org/ > - AM62PX-SK EVM: https://www.ti.com/tool/SK-AM62P-LP > > Android Images use to test this series are on the Official TI website: > - AM62x/BeaglePlay: https://www.ti.com/tool/PROCESSOR-SDK-AM62X > - AM62PX: https://www.ti.com/tool/PROCESSOR-SDK-AM62P > > Signed-off-by: Guillaume La Roque > --- > Changes in v2: > - Remove uneeded part in android fragment > - Update commit message. > - Link to v1: > https://lore.kernel.org/r/20240902-sitaraupstream-v1-0-0c478c33c...@baylibre.com > > --- > Guillaume La Roque (1): > board: ti: am62x_evm: Add android bootflow > > Mattijs Korpershoek (2): > board: beagle: beagleplay: Add android bootflow support > board: ti: am62px: Add android bootflow support > Looks great and thank you for the upstream Android support! Reviewed-by: Bryan Brattlof ~Bryan
Re: [PATCH v2 3/3] board: ti: am62px: Add android bootflow support
Hi Guillaume! On September 12, 2024 thus sayeth Guillaume La Roque: > From: Mattijs Korpershoek > > When CONFIG_BOOTMETH_ANDROID is set, enable Android boot flow support. > > To build for AM62Px for Android, we can re-use > the am62x_a53_android.config fragment when building A53 bootloaders: > > $ make am62px_evm_a53_defconfig > $ make am62x_a53_android.config > $ make > > Signed-off-by: Mattijs Korpershoek > Reviewed-by: Mattijs Korpershoek > Signed-off-by: Guillaume La Roque > --- > board/ti/am62px/am62px.env | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/board/ti/am62px/am62px.env b/board/ti/am62px/am62px.env > index f8b6aff2c2fd..7ef54079aa8d 100644 > --- a/board/ti/am62px/am62px.env > +++ b/board/ti/am62px/am62px.env > @@ -13,3 +13,8 @@ mmcdev=1 > bootpart=1:2 > bootdir=/boot > rd_spec=- > + > +#if CONFIG_BOOTMETH_ANDROID > +#include > +adtb_idx=3 > +#endif > \ No newline at end of file It's odd that checkpatch.pl didn't complain about this. Or maybe it has never complained about newlines? my git hook script didn't complain so IDK. Anywho just wanted to point out the nitpick ;) ~Bryan
Re: [PATCH] ram: k3-ddrss: Handle error properly in lpddr4_start
On August 29, 2024 thus sayeth Udit Kumar: > In lpddr4_start function error returned by lpddr4_enablepiinitiator > may go undetected due to overwrite of return code. > Add support to handle error in above case. > > Reported-by: Andreas Dannenberg > Signed-off-by: Udit Kumar Reviewed-by: Bryan Brattlof One day I'll get around to cleaning this up. starting the controllers isn't all this complicated. ~Bryan
Re: Request for hosting a boot-firmware repository in u-boot git (denx and GitHub)
On June 21, 2024 thus sayeth Simon Glass: > Hi Peter, > > On Fri, 21 Jun 2024 at 01:35, Peter Robinson wrote: > > > > On Fri, 21 Jun 2024 at 00:05, Simon Glass wrote: > > > > > > Hi Nishanth, > > > > > > On Thu, 20 Jun 2024 at 15:35, Nishanth Menon wrote: > > > > > > > > Hi Team, > > > > > > > > We have briefly discussed this topic on IRC[1]. I would like to > > > > propose a new boot-firmware repository similar to the Linux-firmware > > > > repository under the aegis of u-boot hosting. > > > > > > > > In addition to TI, it looks like some NXP[2] and Rockchip[3] > > > > platforms seem to require additional closed-source/open-source > > > > binaries to have a complete bootable image. Distribution rights and > > > > locations of these binaries are challenging, and there needs to be a > > > > standard for how and where they are hosted for end users. > > > > > > > > Further, looking ahead to future architectures: > > > > * IP firmware: More and more IP vendors are embedding their own > > > > "specialized controllers" and require firmware for the operation > > > > (similar to Rockchip's DDR controller, I guess), > > > > * boot stage firmware: Additional stages of the boot process involve > > > > vendor intermediate firmware, such as power configuration. > > > > * Security enclave binaries: While I see a few folks trying to have an > > > > open-source s/w architecture, many PKA and PQC systems still require > > > > prop binaries for IP reasons. > > > > > > > > NOTE: I am not judging any company(including TI) for reasons why some > > > > firmware is proprietary, but I hate to have the end users and other > > > > system (distro) maintainers have to deal with hell trying to make the > > > > life of end users easy to live with. > > > > > > > > In the case of TI's K3 architecture devices, we have two binary blobs > > > > that are critical for the boot process. > > > > > > > > 1. TIFS Firmware / DMSC firmware[4]—This is the security enclave > > > > firmware. It is often encrypted, and sources are not public (due to > > > > various business/regulatory reasons). > > > > 2. DM Firmware[5] - There is a source in public in some cases and > > > > binary only in others - essentially limited function binary to be > > > > put up in the device management uC. In cases where the source is > > > > available, the build procedure is, in my personal opinion, pretty > > > > arcane, and even though in theory it is practical, in practice, not > > > > friendly - efforts are going to simplify it, even probably integrate > > > > it with a more opensource ecosystem, but that is talking "look at the > > > > tea leaves" stuff. > > > > 3. Low Power Management (LPM) binaries: tifs stub: another encrypted > > > > binary that gives the tifs system context restore logic before > > > > retrieving tifs firmware and a corresponding DM restoration binary. > > > > > > > > All told, this is not unlike the situation that necessitated the > > > > creation of a Linux firmware repository. > > > > > > > > Options that I see: > > > > > > > > 1. Let the status quo be - SoC vendors maintain random locations and > > > > random rules to maintain boot firmware. > > > > 2. Ask Linux-firmware to host the binaries in a single canonical > > > > location > > > > 3. Host a boot-firmware repository - u-boot repo may be the more > > > > logical location. > > > > > > > > * (1) isn't the correct answer. > > > > > > > > * (2) Though I haven't seen any policy from the Linux-firmware > > > > community mandating anything of the form, the binaries we are talking > > > > of may not belong to Linux-firmware as they aren't strictly speaking > > > > something Linux kernel will load (since the bootloader has that > > > > responsibility), and in some cases may not even directly talk to > > > > (security enclave or DDR firmware stuff). I am adding Josh to this > > > > mail to see if he has any opinions on the topic (but keeping > > > > from cross posting on linux-firmware list, unless folks feel it is > > > > OK). > > > > > > > > On (3): > > > > Proposal: > > > > > > > > * Create a boot firmware repository in Denx and/or GitHub (if > > > > financials are a hurdle, I hope we can solve it as a community). > > > > * Limit binaries only to those consumed part of the u-boot scope. > > > > > > > > * Limit binaries only to those that do not have an opensource project > > > > (Trusted Firmware-A/M, OP-TEE, etc..) or depend entirely on vendor > > > > source or are binary only in nature (subject to licensing terms below) > > > > * Limit binaries to some pre-established size to prevent repository > > > > explosion - say, 512Kib? > > > > * Follow the same rules of integration and licensing guidelines as > > > > Linux-firmware[6]. > > > > * Similar rules as Linux-firmware guidelines of ABI backward and > > > > forward compatibility. > > > > * Set a workflow update flow and a compatibility requirements document > > > > > > > > If
Re: Request for hosting a boot-firmware repository in u-boot git (denx and GitHub)
On June 20, 2024 thus sayeth Peter Robinson: > Hi Nishanth, > > Thanks for starting this conversation. > > > We have briefly discussed this topic on IRC[1]. I would like to > > propose a new boot-firmware repository similar to the Linux-firmware > > repository under the aegis of u-boot hosting. > > > > In addition to TI, it looks like some NXP[2] and Rockchip[3] > > platforms seem to require additional closed-source/open-source > > binaries to have a complete bootable image. Distribution rights and > > locations of these binaries are challenging, and there needs to be a > > standard for how and where they are hosted for end users. > > Yes, it's been painful for some time, and often the distribution is > unclear because often the binaries are copies around between SBC > makers often without the other bits such as licenses etc so it's a > case of "who knows ¯\_(ツ)_/¯" even if it's the same for all devices of > a particular SoC. > > Having a process around licensing and redistribution requirements is useful. > > > Further, looking ahead to future architectures: > > * IP firmware: More and more IP vendors are embedding their own > > "specialized controllers" and require firmware for the operation > > (similar to Rockchip's DDR controller, I guess), > > * boot stage firmware: Additional stages of the boot process involve > > vendor intermediate firmware, such as power configuration. > > * Security enclave binaries: While I see a few folks trying to have an > > open-source s/w architecture, many PKA and PQC systems still require > > prop binaries for IP reasons. > > > > NOTE: I am not judging any company(including TI) for reasons why some > > firmware is proprietary, but I hate to have the end users and other > > system (distro) maintainers have to deal with hell trying to make the > > life of end users easy to live with. > > > > In the case of TI's K3 architecture devices, we have two binary blobs > > that are critical for the boot process. > > > > 1. TIFS Firmware / DMSC firmware[4]—This is the security enclave > > firmware. It is often encrypted, and sources are not public (due to > > various business/regulatory reasons). > > 2. DM Firmware[5] - There is a source in public in some cases and > > binary only in others - essentially limited function binary to be > > put up in the device management uC. In cases where the source is > > available, the build procedure is, in my personal opinion, pretty > > arcane, and even though in theory it is practical, in practice, not > > friendly - efforts are going to simplify it, even probably integrate > > it with a more opensource ecosystem, but that is talking "look at the > > tea leaves" stuff. > > 3. Low Power Management (LPM) binaries: tifs stub: another encrypted > > binary that gives the tifs system context restore logic before > > retrieving tifs firmware and a corresponding DM restoration binary. > > > > All told, this is not unlike the situation that necessitated the > > creation of a Linux firmware repository. > > > > Options that I see: > > > > 1. Let the status quo be - SoC vendors maintain random locations and > > random rules to maintain boot firmware. > > 2. Ask Linux-firmware to host the binaries in a single canonical > > location > > I don't believe this makes sense. linux-firmware is designed for > firmware that is loaded by linunx drivers, these are not, they're > generally used a part of early boot firmware prior to the linux kernel > even booting, and could in fact be any other OS. As it is > linux-firmware is 2Gb+ in size, as a maintainer of that package in > Fedora having to determine which of 1000s of firmware is used by linux > or something else or if we need to ship it is hard enough already > without throwing a whole raft of other FW into the mix. I think a > separate repo is the right way to go here please. > > Agree! While consolidating all of these binaries together under denx.de or linux-firmware is needed, it doesn't make much sense to put this in a linux-firmware like repo. Unlike linux-firmware we don't need all of these binaries on the board (another side-effect of putting these u-boot binaries in linux-firmware), only the tiniest of subsets will be used for a specific board build. My hope was we could use some type of distribution mirroring system like most distributions use for their binaries today with some central routing for all the build machines consuming these blobs. This has the benefit of allowing vendors to help out with hosting and bandwidth if that's a problem and gives denx.de the ability to secure the software supply chain. Using a system like this does add to the complexity of an already complex setup/build system for u-boot. But we can do much better than a signed git repo ~Bryan > > 3. Host a boot-firmware repository - u-boot repo may be the more > > logical location. > > > > * (1) isn't the correct answer. > > > > * (2) Though I haven't seen any policy from th
Re: [PATCH 1/6] arm: mach-k3: Add default ATF location for AM62/AM62a
On June 20, 2024 thus sayeth Wadim Egorov:
>
>
> Am 19.06.24 um 22:02 schrieb Andrew Davis:
> > On 6/19/24 1:20 PM, Nishanth Menon wrote:
> > > On 17:19-20240619, Dhruva Gole wrote:
> > > > Hi,
> > > >
> > > > On Feb 14, 2024 at 10:30:04 -0600, Andrew Davis wrote:
> > > > > There is a default ATF load address that is used for devices that have
> > > > > ATF running in SRAM. For AM62 and AM62a, ATF runs from DRAM. Instead
> > > > > of having to override the address in every defconfig, make add a
> > > > > default for these ATF in DRAM devices.
> > > > >
> > > > > Signed-off-by: Andrew Davis
> > > > > ---
> > > > > arch/arm/mach-k3/Kconfig | 5 +++--
> > > > > configs/am62ax_evm_a53_defconfig | 1 -
> > > > > configs/am62x_beagleplay_a53_defconfig | 1 -
> > > > > configs/am62x_evm_a53_defconfig | 1 -
> > > > > configs/phycore_am62x_a53_defconfig | 1 -
> > > > > configs/verdin-am62_a53_defconfig | 1 -
> > > > > 6 files changed, 3 insertions(+), 7 deletions(-)
> > > > >
> > > >
> > > > Beagleplay stops booting completely with latest U-boot so I did a little
> > > > bisect and it seems like reverting this patch helps.
> > > >
> > > > I am not sure what other implications there are of reverting this so I
> > > > don't suggest immediately dropping it, however some hints around what's
> > > > missing on beagleplay vs other platforms would be helpful.
> > > >
> > > > Because other platforms based off the same SoC don't seem to be
> > > > affected.
> > >
> > > Grumble... I had to rediscover this in parallel as well - Thanks Dhruva.
> > > mkimage -l tispl.bin and comparing with kernel log of reserved mem
> > > had me completely confused.
> > >
> > > a) Memory maps are already notorious to manage on complex heterogenous
> > > systems. From beagle perspective, we have no need to go and monkey
> > > with DT defined memory map and DT should be the default and modifying
> >
> > Your DT source file is wrong, ATF is at 0x8000_ (or any address one
> > wants to put in K3_ATF_LOAD_ADDR). DT doesn't "define" hardware, it
> > "describes"
> > it. ATF's location is dynamic and configurable, it doesn't belong in DT.
> >
> > You have two options, either go update your DT, then update it again every
> > time ATF moves. *OR* simply turn on OF_SYSTEM_SETUP and let U-Boot add the
> > correct location reserved memory node for you.
> >
> > Then you can also drop out the reserved-node from the DT template file.
> > Only U-Boot knows where ATF is really placed in RAM, so U-Boot must add
> > this info to DT.
>
> I think it is a good idea to remove the nodes from the device tree or at
> least mark them as "templates" and note that they are actually provided by
> the bootloader to make it less confusing.
>
I have a patch lined up for this. My hope was we could remove all memory
nodes completely from the kernel and have U-Boot fix these up. It's
initialize DDR knows about capacity, inline ECC, and trowing all the
different binaries into it.
Our memory{} node fixup isn't ready yet unfortunately so I think just the
reserved-memory{} node can be ripped out for now.
~Bryan
>
> >
> > > DT should be explicitly called out with a log (instead of done
> > > "transparently") - so instead of CONFIG_K3_OPTEE_LOAD_ADDR default
> > > being forced from u-boot, it should be made optional, where when
> > > defined, it can overide the dt definition or some variant of that.
> > >
> > > b) Looks like
> > > https://lore.kernel.org/u-boot/20240214163009.983034-4-...@ti.com/
> > > missed beagleplay? and we were in for a surprise there - i dont want
> >
> > This was the only miss, OF_SYSTEM_SETUP didn't get added to the beagleplay
> > config. Bryan just sent the fix for that now. I'll go look for a way to
> > make this common across the whole SoC family so we don't again miss any
> > new boards.
> >
> > Andrew
> >
> > > to switch from default dts for beagleplay to something different just
> > > because of simplicity for users to know exactly the carveouts and
> > > with other s/w starting up on uC, dts is our "canonical truth".
> > >
Re: [PATCH v2] arm: dts: k3-am625-beagleplay: Package TIFS Stub
On June 21, 2024 thus sayeth Dhruva Gole:
> Bryan,
>
> On Jun 19, 2024 at 16:44:48 -0500, Bryan Brattlof wrote:
> > On June 18, 2024 thus sayeth Dhruva Gole:
> > > Add support for packaging the TIFS Stub as it's required for basic Low
> > > Power Modes like Deep Sleep.
> > >
> > > Acked-by: Neha Malcom Francis
> > > Signed-off-by: Dhruva Gole
> > > ---
> > >
> > > No changes from v1, just picked Neha's ack and rebased on master again.
> > > Link to v1:
> > > https://lore.kernel.org/u-boot/20240612062351.3690091-1-d-g...@ti.com/
> > >
> > > arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi | 33 +++-
> > > 1 file changed, 32 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
> > > b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
> > > index fb2032068d1c..5e2248a4a668 100644
> > > --- a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
> > > +++ b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
> > > @@ -69,6 +69,23 @@
> > > };
> > > };
> > >
> > > + tifsstub-gp {
> > > + filename = "tifsstub.bin_gp";
> > > + ti-secure-rom {
> > > + content = <&tifsstub_gp>;
> > > + core = "secure";
> > > + load = <0x6>;
> > > + sw-rev = ;
> > > + keyfile = "ti-degenerate-key.pem";
> > > + tifsstub;
> > > + };
> > > + tifsstub_gp: tifsstub-gp.bin {
> > > + filename = "ti-sysfw/ti-fs-stub-firmware-am62x-gp.bin";
> > > + type = "blob-ext";
> > > + optional;
> > > + };
> > > + };
> > > +
> > > ti-spl_unsigned {
> > > filename = "tispl.bin_unsigned";
> > > pad-byte = <0xff>;
> > > @@ -105,6 +122,19 @@
> > > };
> > > };
> > >
> > > + tifsstub-gp {
> > > + description = "tifsstub";
> > > + type = "firmware";
> > > + arch = "arm32";
> > > + compression = "none";
> > > + os = "tifsstub-gp";
> > > + load = <0x9dc0>;
> > > + entry = <0x9dc0>;
> >
> > Is this stub position independent? Or is this address compiled in at
> > build time? We have some variants of 62x that don't have these addresses
> > backed by DRAM.
>
> The stub is not position independent and is indeed fixed at build time.
> Can you talk more about these am62x variants that don't have the address
> backed by DRAM? What would be the suggested address range in those
> cases?
>
We've always had a 'soft' limit of 512MB so you're correct this isn't an
issue today and I haven't seen any 'u-boot shall support' language
internally however there have been a few questions about minimum DDR
capacities we can support. Some have asked about 256MB.
(This 512MB 'soft' limit is most likely why this stub and OP-TEE is
where it is today)
>
> For BeaglePlay atleast I don't see an issue. So I don't think we'd have
> issues with this patch in particular?
>
No you're correct however knowing that this address location is compiled
into other firmware means we would need to have separate firmware builds
if we wanted this stub in another location and it's awkwardly in the
middle of DRAM and not at the bottom like I would prefer.
So while yes this is a board/ level decision because it's also dealing
with mach-k3/ level firmware this is an unfortunate thing we're
hard-coding. This is essentially hard-coding a 512MB minimum limit for
the entire AM62x SoC family.
My question was trying to determine if we should/could add this address
to Kconfig so we can pass in the address to tispl.bin here and somehow
get this into board-cfg.yaml. (This will be some work for us)
All of that to say, I'm okay with this change however I wish there was a
'there be dragons' trailer I could add to this
~Bryan
Re: [PATCH v2] arm: dts: k3-am625-beagleplay: Package TIFS Stub
On June 18, 2024 thus sayeth Dhruva Gole:
> Add support for packaging the TIFS Stub as it's required for basic Low
> Power Modes like Deep Sleep.
>
> Acked-by: Neha Malcom Francis
> Signed-off-by: Dhruva Gole
> ---
>
> No changes from v1, just picked Neha's ack and rebased on master again.
> Link to v1:
> https://lore.kernel.org/u-boot/20240612062351.3690091-1-d-g...@ti.com/
>
> arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi | 33 +++-
> 1 file changed, 32 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
> b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
> index fb2032068d1c..5e2248a4a668 100644
> --- a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
> +++ b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
> @@ -69,6 +69,23 @@
> };
> };
>
> + tifsstub-gp {
> + filename = "tifsstub.bin_gp";
> + ti-secure-rom {
> + content = <&tifsstub_gp>;
> + core = "secure";
> + load = <0x6>;
> + sw-rev = ;
> + keyfile = "ti-degenerate-key.pem";
> + tifsstub;
> + };
> + tifsstub_gp: tifsstub-gp.bin {
> + filename = "ti-sysfw/ti-fs-stub-firmware-am62x-gp.bin";
> + type = "blob-ext";
> + optional;
> + };
> + };
> +
> ti-spl_unsigned {
> filename = "tispl.bin_unsigned";
> pad-byte = <0xff>;
> @@ -105,6 +122,19 @@
> };
> };
>
> + tifsstub-gp {
> + description = "tifsstub";
> + type = "firmware";
> + arch = "arm32";
> + compression = "none";
> + os = "tifsstub-gp";
> + load = <0x9dc0>;
> + entry = <0x9dc0>;
Is this stub position independent? Or is this address compiled in at
build time? We have some variants of 62x that don't have these addresses
backed by DRAM.
~Bryan
> + blob-ext {
> + filename = "tifsstub.bin_gp";
> + };
> + };
> +
> dm {
> description = "DM binary";
> type = "firmware";
> @@ -148,7 +178,8 @@
> conf-0 {
> description = "k3-am625-beagleplay";
> firmware = "atf";
> - loadables = "tee", "dm", "spl";
> + loadables = "tee", "dm", "spl",
> + "tifsstub-gp";
> fdt = "fdt-0";
> };
> };
>
> base-commit: 16324b43db3f2b4fbbc3b701893fcfc4104f33fb
> --
> 2.34.1
>
[PATCH] board: beagle: beagleplay: enable OF_SYSTEM_SETUP
Unfortunately when enabling FDT fixups for the AM62x family of SoCs and moving TF-A to the bottom of RAM we missed the BeaglePlay. This is causing Linux's memory allocator to clobber TF-A and break its boot. Enable OF_SYSTEM_SETUP to fixup the kernel's FDT to inform it of the actual location of the firmware CC: Andrew Davis CC: Nishanth Menon CC: Robert Nelson Reported-by: Dhruva Gole Signed-off-by: Bryan Brattlof --- Hello everyone, Fair warning, this may turn into a philosophical discussion about the role of device-tree with SystemReady and U-Boot's role in enabling true distribution to be completely agnostic of the board it's running on. However substantively this is simply fixing a boot regression Dhruva found while testing out the beagleplay. Happy reviewing ~Bryan --- board/beagle/beagleplay/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/board/beagle/beagleplay/Kconfig b/board/beagle/beagleplay/Kconfig index 7dbd833acb4cc..896a1c1be3010 100644 --- a/board/beagle/beagleplay/Kconfig +++ b/board/beagle/beagleplay/Kconfig @@ -12,6 +12,7 @@ config TARGET_AM625_A53_BEAGLEPLAY bool "BeagleBoard.org AM625 BeaglePlay running on A53" select ARM64 select BINMAN + select OF_SYSTEM_SETUP config TARGET_AM625_R5_BEAGLEPLAY bool "BeagleBoard.org AM625 BeaglePlay running on R5" --- base-commit: fe2ce09a0753634543c32cafe85eb87a625f76ca change-id: 20240619-play-fdt-fixup-a92e1ab872fc Best regards, -- Bryan Brattlof
Re: [PATCH v1] arm: mach-k3: j784s4: Fix MCU_CLKOUT0 parent clock mux
On June 17, 2024 thus sayeth Emanuele Ghidoli:
> From: Emanuele Ghidoli
>
> MCU_CLKOUT0 output can be driven by two different clock inputs:
> one at 25 MHz and another at 50 MHz. Currently, the 25 MHz input
> clock is not selectable due to a duplication of the 50 MHz clock input
> in the mux configuration. This commit corrects the parent clock mux
> configuration, making the 25 MHz input clock selectable.
>
> Signed-off-by: Emanuele Ghidoli
> ---
> arch/arm/mach-k3/r5/j784s4/clk-data.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Nice catch!
Reviewed-by: Bryan Brattlof
~Bryan
> diff --git a/arch/arm/mach-k3/r5/j784s4/clk-data.c
> b/arch/arm/mach-k3/r5/j784s4/clk-data.c
> index feaa13ee266b..793bcac93245 100644
> --- a/arch/arm/mach-k3/r5/j784s4/clk-data.c
> +++ b/arch/arm/mach-k3/r5/j784s4/clk-data.c
> @@ -134,7 +134,7 @@ static const char * const
> emmcsd1_lb_clksel_out0_parents[] = {
>
> static const char * const mcu_clkout_mux_out0_parents[] = {
> "hsdiv4_16fft_mcu_2_hsdivout0_clk",
> - "hsdiv4_16fft_mcu_2_hsdivout0_clk",
> + "hsdiv4_16fft_mcu_2_hsdivout1_clk",
> };
>
> static const char * const k3_pll_ctrl_wrap_main_0_sysclkout_clk_parents[] = {
> @@ -338,7 +338,7 @@ static const struct dev_clk soc_dev_clk_data[] = {
> DEV_CLK(149, 5, "k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk"),
> DEV_CLK(157, 174, "mcu_clkout_mux_out0"),
> DEV_CLK(157, 175, "hsdiv4_16fft_mcu_2_hsdivout0_clk"),
> - DEV_CLK(157, 176, "hsdiv4_16fft_mcu_2_hsdivout0_clk"),
> + DEV_CLK(157, 176, "hsdiv4_16fft_mcu_2_hsdivout1_clk"),
> DEV_CLK(157, 179, "fss_mcu_0_hyperbus1p0_0_hpb_out_clk_p"),
> DEV_CLK(157, 180, "fss_mcu_0_hyperbus1p0_0_hpb_out_clk_n"),
> DEV_CLK(157, 224, "fss_mcu_0_ospi_0_ospi_oclk_clk"),
> --
> 2.34.1
>
Re: [PATCH] board: beagleplay: Fix the bootpart to pick from root partition
On June 17, 2024 thus sayeth Dhruva Gole:
> Hi Robert and Bryan,
>
> On Jun 15, 2024 at 21:30:55 -0500, Robert Nelson wrote:
> > On Sat, Jun 15, 2024 at 8:55 PM Bryan Brattlof wrote:
> > >
> > > On June 13, 2024 thus sayeth Dhruva Gole:
> > > > The Kernel Image and DTB files are supposed to be picked from the rootfs
> > > > of the SD Card, this fails in legacy boot flow because bootpart is set
> > > > to 1:1. Fix it.
> > > >
> > > > Fixes: a200f428b5b21 ("board: ti: am62x: Add am62x_beagleplay_*
> > > > defconfigs and env file")
> > > > Signed-off-by: Dhruva Gole
> > > > ---
> > > > board/beagle/beagleplay/beagleplay.env | 2 +-
> > > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > > >
> > > > diff --git a/board/beagle/beagleplay/beagleplay.env
> > > > b/board/beagle/beagleplay/beagleplay.env
> > > > index bbf6b925d02c..190181c8ad0c 100644
> > > > --- a/board/beagle/beagleplay/beagleplay.env
> > > > +++ b/board/beagle/beagleplay/beagleplay.env
> > > > @@ -11,7 +11,7 @@ set_led_state_start_load=led led-0 on; led led-1 off;
> > > > led led-2 on; led led-3 off; led led-4 on
> > > > boot=mmc
> > > > mmcdev=1
> > > > -bootpart=1:1
> > > > +bootpart=1:2
> > > > bootdir=/boot
> > > > boot_targets=mmc1 mmc0
> > > > bootmeths=script extlinux efi pxe
> > >
> > > Shouldn't the fix be to just drop 'script' from bootmeths. These TI
> > > scripts needed to go away years ago.
> >
> > I agree! nuke the non bootmeth's. ;)
>
> People are still using legacy bootmethods out there. I think the cleanup
> will still take time till everyone is on the same page and I feel like
> beagle being a community platform, doesn't mandate to use a "fixed" boot
> flow atleast until stdboot is fully at feature parity with legacy boot.
> Some users may still care for the legacy boot method.
>
> From the discussions so far it seems evident to me that the BeagleBone
> debian images are anyway going to be unaffected by this change so that
> removes the question of it causing any regressions on that end.
>
> People who do want to use legacy boot and pick kernel image and DTB from
> their root partitions will benefit from this change for sure.
>
> So I don't really see the need/argument here to not go ahead with this patch?
>
> We can definitely have separate discussion around whether we need to remove
> legacy flow bits from upstream U-Boot, but no reason to keep this small fix
> blocked till we have those discussions is what I feel.
config_distro_bootcmd.h was introduced in 2014. If we or these
distributions cannot update their packaging in a decade we cannot
support them. Simply hiding their inability to update their builds and
shifting the work to U-Boot is not acceptable.
As you have just demonstrated these legacy boot scripts have no way of
being tested. You've linked to a fundamental boot issue since the very
introduction of the beagleplay support. Obviously no one is using them.
a200f428b5b2 ("oard: ti: am62x: Add am62x_beagleplay_* ...
Fixing these scripts continue to signal to these distributions that
relying on custom scripting to boot their distribution rather than
packing a EFI stub or extlinux.conf file is acceptable.
The reason I'm trying to block this is because we will never be able to
remove them if we keep fixing them. I'm fine if we want to fix our
reference boards booting Arago, but we shouldn't block BeaglePlay from
cleaning up their codebase because of our reference distributions.
~Bryan
Re: [PATCH] board: beagleplay: Fix the bootpart to pick from root partition
On June 13, 2024 thus sayeth Dhruva Gole:
> The Kernel Image and DTB files are supposed to be picked from the rootfs
> of the SD Card, this fails in legacy boot flow because bootpart is set
> to 1:1. Fix it.
>
> Fixes: a200f428b5b21 ("board: ti: am62x: Add am62x_beagleplay_*
> defconfigs and env file")
> Signed-off-by: Dhruva Gole
> ---
> board/beagle/beagleplay/beagleplay.env | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/board/beagle/beagleplay/beagleplay.env
> b/board/beagle/beagleplay/beagleplay.env
> index bbf6b925d02c..190181c8ad0c 100644
> --- a/board/beagle/beagleplay/beagleplay.env
> +++ b/board/beagle/beagleplay/beagleplay.env
> @@ -11,7 +11,7 @@ set_led_state_start_load=led led-0 on; led led-1 off;
> led led-2 on; led led-3 off; led led-4 on
> boot=mmc
> mmcdev=1
> -bootpart=1:1
> +bootpart=1:2
> bootdir=/boot
> boot_targets=mmc1 mmc0
> bootmeths=script extlinux efi pxe
Shouldn't the fix be to just drop 'script' from bootmeths. These TI
scripts needed to go away years ago.
~Bryan
[PATCH v4 1/2] arm: dts: add U-Boot dtbs for the am625-lp-sk
From: Nitin Yadav
Add the U-Boot device tree overrides for the am62x-lp-sk reference
board.
Signed-off-by: Nitin Yadav
Reviewed-by: Dhruva Gole
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am62-lp-sk-binman.dtsi | 21 +
arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi | 17 +
arch/arm/dts/k3-am62-lp4-50-800-800.dtsi | 2190 ++
arch/arm/dts/k3-am62-r5-lp-sk.dts| 82 ++
4 files changed, 2310 insertions(+)
diff --git a/arch/arm/dts/k3-am62-lp-sk-binman.dtsi
b/arch/arm/dts/k3-am62-lp-sk-binman.dtsi
new file mode 100644
index 0..18341d0d3f2e7
--- /dev/null
+++ b/arch/arm/dts/k3-am62-lp-sk-binman.dtsi
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#include "k3-binman.dtsi"
+#include "k3-am625-sk-binman.dtsi"
+
+#ifdef CONFIG_TARGET_AM625_A53_EVM
+
+#define SPL_AM62_LP_SK_DTB "spl/dts/ti/k3-am62-lp-sk.dtb"
+
+&spl_am625_sk_dtb {
+ filename = SPL_AM62_LP_SK_DTB;
+};
+
+&spl_am625_sk_dtb_unsigned {
+ filename = SPL_AM62_LP_SK_DTB;
+};
+
+#endif
diff --git a/arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi
b/arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi
new file mode 100644
index 0..cbcc7f3bb45cb
--- /dev/null
+++ b/arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * AM62x LP SK dts file for SPLs
+ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#include "k3-am62-lp-sk-binman.dtsi"
+
+/ {
+ chosen {
+ tick-timer = &main_timer0;
+ };
+};
+
+&main_timer0 {
+ clock-frequency = <2500>;
+};
diff --git a/arch/arm/dts/k3-am62-lp4-50-800-800.dtsi
b/arch/arm/dts/k3-am62-lp4-50-800-800.dtsi
new file mode 100644
index 0..c255ae6530f5b
--- /dev/null
+++ b/arch/arm/dts/k3-am62-lp4-50-800-800.dtsi
@@ -0,0 +1,2190 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * This file was generated with the
+ * AM62x SysConfig DDR Subsystem Register Configuration Tool v0.09.07
+ * Wed Mar 01 2023 17:52:11 GMT-0600 (Central Standard Time)
+ * DDR Type: LPDDR4
+ * F0 = 50MHzF1 = NA F2 = 800MHz
+ * Density (per channel): 16Gb
+ * Write DBI: Enable
+ * Number of Ranks: 1
+ */
+
+#define DDRSS_PLL_FHS_CNT 3
+#define DDRSS_PLL_FREQUENCY_1 4
+#define DDRSS_PLL_FREQUENCY_2 4
+
+#define DDRSS_CTL_0_DATA 0x0B00
+#define DDRSS_CTL_1_DATA 0x
+#define DDRSS_CTL_2_DATA 0x
+#define DDRSS_CTL_3_DATA 0x
+#define DDRSS_CTL_4_DATA 0x
+#define DDRSS_CTL_5_DATA 0x
+#define DDRSS_CTL_6_DATA 0x
+#define DDRSS_CTL_7_DATA 0x2710
+#define DDRSS_CTL_8_DATA 0x000186A0
+#define DDRSS_CTL_9_DATA 0x0005
+#define DDRSS_CTL_10_DATA 0x0064
+#define DDRSS_CTL_11_DATA 0x00027100
+#define DDRSS_CTL_12_DATA 0x00186A00
+#define DDRSS_CTL_13_DATA 0x0005
+#define DDRSS_CTL_14_DATA 0x0640
+#define DDRSS_CTL_15_DATA 0x00027100
+#define DDRSS_CTL_16_DATA 0x00186A00
+#define DDRSS_CTL_17_DATA 0x0005
+#define DDRSS_CTL_18_DATA 0x0640
+#define DDRSS_CTL_19_DATA 0x01010100
+#define DDRSS_CTL_20_DATA 0x01010100
+#define DDRSS_CTL_21_DATA 0x01000110
+#define DDRSS_CTL_22_DATA 0x02010002
+#define DDRSS_CTL_23_DATA 0x000A
+#define DDRSS_CTL_24_DATA 0x000186A0
+#define DDRSS_CTL_25_DATA 0x
+#define DDRSS_CTL_26_DATA 0x
+#define DDRSS_CTL_27_DATA 0x
+#define DDRSS_CTL_28_DATA 0x
+#define DDRSS_CTL_29_DATA 0x00020200
+#define DDRSS_CTL_30_DATA 0x
+#define DDRSS_CTL_31_DATA 0x
+#define DDRSS_CTL_32_DATA 0x
+#define DDRSS_CTL_33_DATA 0x
+#define DDRSS_CTL_34_DATA 0x0810
+#define DDRSS_CTL_35_DATA 0x2020
+#define DDRSS_CTL_36_DATA 0x
+#define DDRSS_CTL_37_DATA 0x
+#define DDRSS_CTL_38_DATA 0x040C
+#define DDRSS_CTL_39_DATA 0x
+#define DDRSS_CTL_40_DATA 0x081C
+#define DDRSS_CTL_41_DATA 0x
+#define DDRSS_CTL_42_DATA 0x081C
+#define DDRSS_CTL_43_DATA 0x
+#define DDRSS_CTL_44_DATA 0x05000804
+#define DDRSS_CTL_45_DATA 0x0700
+#define DDRSS_CTL_46_DATA 0x09090004
+#define DDRSS_CTL_47_DATA 0x0203
+#define DDRSS_CTL_48_DATA 0x00320007
+#define DDRSS_CTL_49_DATA 0x09090023
+#define DDRSS_CTL_50_DATA 0x190F
+#define DDRSS_CTL_51_DATA 0x00320007
+#define DDRSS_CTL_52_DATA 0x09090023
+#define DDRSS_CTL_53_DATA 0x0900190F
+#define DDRSS_CTL_54_DATA 0x000A0A09
+#define DDRSS_CTL_55_DATA 0x040006DB
+#define DDRSS_CTL_56_DATA 0x09092004
+#define DDRSS_CTL_57_DATA 0x0C0A
+#define DDRSS_CTL_58_DATA 0x06006DB0
+#define DDRSS_CTL_59_DATA 0x09092006
+#define DDRSS_CTL_60_DATA 0x0C0A
+#define DDRSS_CTL_61_DATA 0x06006DB0
+#define DDRSS_CTL_62_DATA 0x03042006
+#define DDRSS_CTL_63_DATA 0x04050002
+#define DDRSS_CTL_64_DATA 0x100F100F
+#define DDRSS_CTL_65_DATA 0x01010008
+#define DDRSS_CTL_66_DATA 0x041F1F07
+#
[PATCH v4 0/2] introduce basic support for TI's am625-lp-sk
Hello Again Everyone! The am625-lp-sk is a variant of the am625-sk showcasing the low-power features of the am625 SoC Family. Because it's essentially a board and package spin of the am625-sk I've inherited the am625 configuration and overridden what was needed. This is a new spin of Nitin's original work which has been updated significantly since October 2023 https://lore.kernel.org/u-boot/20231030110138.1347603-1-n-ya...@ti.com/ For those of us interested here is proof of life using buildroot: https://paste.sr.ht/~bryanb/40f7787f7760bee383aa8fbc342a29e8544dbdab This also works around a buildman issue not following #include directives. To get around this I've redefined the variables it's looking for inside the lp-sk defconfig to keep it happy for now. I made a pull request on github and everything seems like it's happy https://dev.azure.com/u-boot/u-boot/_build/results?buildId=8634&view=results Thank you for reviewing ~Bryan Cc: u-boot@lists.denx.de To: Tom Rini Signed-off-by: Bryan Brattlof Changes in v4: - change the defconfig name to match previous older versions - include needed CONFIG arguments for buildman - added a MAINTAINERS entry for the board - Link to v3: https://lore.kernel.org/r/20240429-am62q-wip-v3-0-17dcfdb10...@ti.com Changes in v3: - actually update the copyright year - Link to v2: https://lore.kernel.org/r/20240429-am62q-wip-v2-0-e78f09174...@ti.com Changes in v2: - updated copyright year - Link to v1: https://lore.kernel.org/r/20240429-am62q-wip-v1-0-927fd2e0a...@ti.com --- Bryan Brattlof (1): configs: add defconfigs for the am625-lp-sk Nitin Yadav (1): arm: dts: add U-Boot dtbs for the am625-lp-sk arch/arm/dts/k3-am62-lp-sk-binman.dtsi | 21 + arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi | 17 + arch/arm/dts/k3-am62-lp4-50-800-800.dtsi | 2190 ++ arch/arm/dts/k3-am62-r5-lp-sk.dts| 82 ++ board/ti/am62x/MAINTAINERS |4 +- configs/am62x_lpsk_a53_defconfig |8 + configs/am62x_lpsk_r5_defconfig |7 + 7 files changed, 2328 insertions(+), 1 deletion(-) --- base-commit: 227be29df37545f74243a98c12a4a33c4160e3cd change-id: 20240429-am62q-wip-f3453de038fb Best regards, -- Bryan Brattlof
[PATCH v4 2/2] configs: add defconfigs for the am625-lp-sk
The am62x-lp-sk is a package and reference board spin of the am62x-sk to showcase the low-power features of the am62x SoC family. Because it so closely resembles the am62x-sk board, use the preprocessor to inherit its configuration making the needed changes for this board where necessary. Reviewed-by: Dhruva Gole Signed-off-by: Bryan Brattlof --- board/ti/am62x/MAINTAINERS | 4 +++- configs/am62x_lpsk_a53_defconfig | 8 configs/am62x_lpsk_r5_defconfig | 7 +++ 3 files changed, 18 insertions(+), 1 deletion(-) diff --git a/board/ti/am62x/MAINTAINERS b/board/ti/am62x/MAINTAINERS index 105e741995ed9..562a5c676690d 100644 --- a/board/ti/am62x/MAINTAINERS +++ b/board/ti/am62x/MAINTAINERS @@ -1,8 +1,10 @@ AM62x BOARD -M: Dave Gerlach +M: Bryan Brattlof M: Tom Rini S: Maintained F: board/ti/am62x/ F: include/configs/am62x_evm.h F: configs/am62x_evm_r5_defconfig F: configs/am62x_evm_a53_defconfig +F: configs/am62x_lpsk_r5_defconfig +F: configs/am62x_lpsk_a53_defconfig diff --git a/configs/am62x_lpsk_a53_defconfig b/configs/am62x_lpsk_a53_defconfig new file mode 100644 index 0..a86bfb5a761bf --- /dev/null +++ b/configs/am62x_lpsk_a53_defconfig @@ -0,0 +1,8 @@ +#include + +CONFIG_ARM=y +CONFIG_ARCH_K3=y +CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am62-lp-sk" +CONFIG_OF_UPSTREAM=y +CONFIG_SOC_K3_AM625=y +CONFIG_TARGET_AM625_A53_EVM=y diff --git a/configs/am62x_lpsk_r5_defconfig b/configs/am62x_lpsk_r5_defconfig new file mode 100644 index 0..9112bc2cba7cc --- /dev/null +++ b/configs/am62x_lpsk_r5_defconfig @@ -0,0 +1,7 @@ +#include + +CONFIG_ARM=y +CONFIG_ARCH_K3=y +CONFIG_DEFAULT_DEVICE_TREE="k3-am62-r5-lp-sk" +CONFIG_SOC_K3_AM625=y +CONFIG_TARGET_AM625_R5_EVM=y -- 2.45.1
Re: [PATCH 0/3] arm: dts: am625/am62a7: Switch over to OF_UPSTREAM
On June 5, 2024 thus sayeth Nishanth Menon: > Cleanup am625 on by switching over the last two platforms (SK and > beagleplay) over to OF_UPSTREAM, and while at it, switch over am62a7 > (last of the am62* family) over as well. > > This superscedes the previous version of beagleplay only patch[1] > > Test logs: https://gist.github.com/nmenon/ba310d3750a80789aca6a4fd90190135 > > Nishanth Menon (3): > arm: dts: am625_beagleplay: Switch to OF_UPSTREAM > arm: dts: am625_sk: Switch to OF_UPSTREAM > arm: dts: am62a7_sk: Switch to OF_UPSTREAM Looks great to me Reviewed-by: Bryan Brattlof ~Bryan
Re: [PATCH] arm: mach-k3: am62p: Fixup TF-A/OP-TEE reserved-memory node in FDT
On May 23, 2024 thus sayeth Bryan Brattlof:
> On May 23, 2024 thus sayeth Andrew Davis:
> > On 5/23/24 11:43 AM, Bryan Brattlof wrote:
> > > The address we load TFA and OPTEE is configurable by the
> > > CONFIG_K3_{ATF,OPTEE)_LOAD_ADDR, but the DT node reservations remain
> > > static which can cause some confusion about where exactly these firmware
> > > are exactly. Fix this by updating the reserved-memory{} nodes when the
> > > loaded address does not match the address in DT.
> > >
> > > Reported-by: Andrew Davis
> > > Signed-off-by: Bryan Brattlof
> > > ---
> > > Hello everyone,
> > >
> > > This is a little fixup to avoid any confusion once we're in the kernel.
> > > Because TF-A can be configured in U-Boot to be anywhere we want, we need
> > > up update the reserved-memory{} node with this change.
> > >
> > > Thanks for reviewing
> > > ~Bryan
> > > ---
> > > arch/arm/mach-k3/Makefile | 1 +
> > > arch/arm/mach-k3/am62p5_fdt.c | 16
> >
> > You'll want to rebase this on -next, these _fdt.c files all got moved
> > into directories for each SoC.
> >
>
> Ah! my bad, you're right this belongs in -next. v2 incoming momentarily
>
Wait no on second thought, this needs to be in v2024.07 also. I'll leave
this for Tom for -master and maybe send out another version for -next to
preempt the merge conflict for v2024.10?
~Bryan
Re: [PATCH] arm: mach-k3: am62p: Fixup TF-A/OP-TEE reserved-memory node in FDT
On May 23, 2024 thus sayeth Andrew Davis:
> On 5/23/24 11:43 AM, Bryan Brattlof wrote:
> > The address we load TFA and OPTEE is configurable by the
> > CONFIG_K3_{ATF,OPTEE)_LOAD_ADDR, but the DT node reservations remain
> > static which can cause some confusion about where exactly these firmware
> > are exactly. Fix this by updating the reserved-memory{} nodes when the
> > loaded address does not match the address in DT.
> >
> > Reported-by: Andrew Davis
> > Signed-off-by: Bryan Brattlof
> > ---
> > Hello everyone,
> >
> > This is a little fixup to avoid any confusion once we're in the kernel.
> > Because TF-A can be configured in U-Boot to be anywhere we want, we need
> > up update the reserved-memory{} node with this change.
> >
> > Thanks for reviewing
> > ~Bryan
> > ---
> > arch/arm/mach-k3/Makefile | 1 +
> > arch/arm/mach-k3/am62p5_fdt.c | 16
>
> You'll want to rebase this on -next, these _fdt.c files all got moved
> into directories for each SoC.
>
Ah! my bad, you're right this belongs in -next. v2 incoming momentarily
Thanks Andrew
~Bryan
[PATCH] arm: mach-k3: am62p: Fixup TF-A/OP-TEE reserved-memory node in FDT
The address we load TFA and OPTEE is configurable by the
CONFIG_K3_{ATF,OPTEE)_LOAD_ADDR, but the DT node reservations remain
static which can cause some confusion about where exactly these firmware
are exactly. Fix this by updating the reserved-memory{} nodes when the
loaded address does not match the address in DT.
Reported-by: Andrew Davis
Signed-off-by: Bryan Brattlof
---
Hello everyone,
This is a little fixup to avoid any confusion once we're in the kernel.
Because TF-A can be configured in U-Boot to be anywhere we want, we need
up update the reserved-memory{} node with this change.
Thanks for reviewing
~Bryan
---
arch/arm/mach-k3/Makefile | 1 +
arch/arm/mach-k3/am62p5_fdt.c | 16
arch/arm/mach-k3/am62px/Kconfig | 1 +
3 files changed, 18 insertions(+)
diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile
index 1bd523329a4f8..4e9d0925f13f5 100644
--- a/arch/arm/mach-k3/Makefile
+++ b/arch/arm/mach-k3/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_SOC_K3_J721S2) += j721s2_fdt.o
obj-$(CONFIG_SOC_K3_AM625) += am625_fdt.o
obj-$(CONFIG_SOC_K3_AM62A7) += am62a7_fdt.o
obj-$(CONFIG_SOC_K3_J784S4) += j784s4_fdt.o
+obj-$(CONFIG_SOC_K3_AM62P5) += am62p5_fdt.o
endif
ifeq ($(CONFIG_SPL_BUILD),y)
obj-$(CONFIG_SOC_K3_AM654) += am654_init.o
diff --git a/arch/arm/mach-k3/am62p5_fdt.c b/arch/arm/mach-k3/am62p5_fdt.c
new file mode 100644
index 0..d67f012a5dcc4
--- /dev/null
+++ b/arch/arm/mach-k3/am62p5_fdt.c
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#include
+#include "common_fdt.h"
+#include
+
+int ft_system_setup(void *blob, struct bd_info *bd)
+{
+ fdt_fixup_reserved(blob, "tfa", CONFIG_K3_ATF_LOAD_ADDR, 0x8);
+ fdt_fixup_reserved(blob, "optee", CONFIG_K3_OPTEE_LOAD_ADDR, 0x180);
+
+ return 0;
+}
diff --git a/arch/arm/mach-k3/am62px/Kconfig b/arch/arm/mach-k3/am62px/Kconfig
index 38a9e6811b119..76ae86b66222f 100644
--- a/arch/arm/mach-k3/am62px/Kconfig
+++ b/arch/arm/mach-k3/am62px/Kconfig
@@ -13,6 +13,7 @@ config TARGET_AM62P5_A53_EVM
bool "TI K3 based AM62P5 EVM running on A53"
select ARM64
select BINMAN
+ select OF_SYSTEM_SETUP
config TARGET_AM62P5_R5_EVM
bool "TI K3 based AM62P5 EVM running on R5"
---
base-commit: a7f0154c412859323396111dd0c09dbafbc153cb
change-id: 20240520-am62p-fdt-fix-7c51e1a1cd54
Best regards,
--
Bryan Brattlof
Re: [PATCH v3 2/2] configs: add defconfigs for the am625-lp-sk
On May 15, 2024 thus sayeth Andrew Davis: > On 5/15/24 1:21 PM, Tom Rini wrote: > > On Fri, May 03, 2024 at 11:44:29AM -0500, Bryan Brattlof wrote: > > > > > The am62x-lp-sk is a package and reference board spin of the am62x-sk to > > > showcase the low-power features of the am62x SoC family. Because it so > > > closely resembles the am62x-sk board, use the preprocessor to inherit > > > its configuration making the needed changes for this board where > > > necessary. > > > > > > Reviewed-by: Dhruva Gole > > > Signed-off-by: Bryan Brattlof > > > --- > > > configs/am62x_lp_sk_a53_defconfig | 3 +++ > > > configs/am62x_lp_sk_r5_defconfig | 2 ++ > > > 2 files changed, 5 insertions(+) > > > > > > diff --git a/configs/am62x_lp_sk_a53_defconfig > > > b/configs/am62x_lp_sk_a53_defconfig > > > new file mode 100644 > > > index 0..904b2142b2f53 > > > --- /dev/null > > > +++ b/configs/am62x_lp_sk_a53_defconfig > > > @@ -0,0 +1,3 @@ > > > +#include > > > +CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am62-lp-sk" > > > +CONFIG_OF_UPSTREAM=y > > > > So, there's a problem here. The #include trick for defconfig files isn't > > working as intended, exactly. The example here doesn't work right. > > First, it shows up as a variant of "sandbox" (as buildman will show and > > leads to https://source.denx.de/u-boot/u-boot/-/jobs/835067#L119) > > > > And this becomes clearer if you look at configs/am69_sk_r5_defconfig > > which has to set some symbols already found in > > configs/j784s4_evm_r5_defconfig in order to work. This is seemingly very > > not equivalent to invoking "make foo_defconfig bar.config" to combine > > things. > > > > This is equivalent when running make. The issue is with buildman which > manually checks the content of the defconfig to find what ARCH it should > run the defconfig with. buildman doesn't understand the #include yet. > Until buildman can be fixed, you'll need to do what we did with > am69_sk_r5_defconfig and redefine the ARCH/SOC/TARGET info in the > defconfig file so buildman can find it without following the #include. Ah Okay, I'll take a stab at the buildman fix. Also noticed in the logs I didn't add the configs to a MAINTAINERS entry. ~Bryan
Re: [PATCH v2 0/2] introduce basic support for TI's am625-lp-sk
Sorry everyone I hit send a little to fast on this one! On May 3, 2024 thus sayeth Bryan Brattlof: > Hello Everyone! > > The am625-lp-sk is a variant of the am625-sk showcasing the low-power > features of the am625 SoC Family. Because it's essentially a board and > package spin of the am625-sk I've inherited the am625 configuration and > overridden what was needed. > > This is a new spin of Nitin's original work which has been updated > significantly since October 2023 > > https://lore.kernel.org/u-boot/20231030110138.1347603-1-n-ya...@ti.com/ > > Unfortunately a patch is need on top of this series to boot: > > https://lore.kernel.org/u-boot/20240429214936.15187-1...@ti.com > > For those of us interested here is proof of life using buildroot: > >https://paste.sr.ht/~bryanb/40f7787f7760bee383aa8fbc342a29e8544dbdab > > Thank you for reviewing > ~Bryan > > Signed-off-by: Bryan Brattlof > --- > Changes in v2: > - updated copyright year > - Link to v1: > https://lore.kernel.org/r/20240429-am62q-wip-v1-0-927fd2e0a...@ti.com > Didn't actually fixup the copyright year. Just sent out v3 which actually did what I said I was going to :/ Sorry for the spam. ~Bryan
[PATCH v3 1/2] arm: dts: add U-Boot dtbs for the am625-lp-sk
From: Nitin Yadav
Add the U-Boot device tree overrides for the am62x-lp-sk reference
board.
Signed-off-by: Nitin Yadav
Reviewed-by: Dhruva Gole
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am62-lp-sk-binman.dtsi | 21 +
arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi | 17 +
arch/arm/dts/k3-am62-lp4-50-800-800.dtsi | 2190 ++
arch/arm/dts/k3-am62-r5-lp-sk.dts| 82 ++
4 files changed, 2310 insertions(+)
diff --git a/arch/arm/dts/k3-am62-lp-sk-binman.dtsi
b/arch/arm/dts/k3-am62-lp-sk-binman.dtsi
new file mode 100644
index 0..18341d0d3f2e7
--- /dev/null
+++ b/arch/arm/dts/k3-am62-lp-sk-binman.dtsi
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#include "k3-binman.dtsi"
+#include "k3-am625-sk-binman.dtsi"
+
+#ifdef CONFIG_TARGET_AM625_A53_EVM
+
+#define SPL_AM62_LP_SK_DTB "spl/dts/ti/k3-am62-lp-sk.dtb"
+
+&spl_am625_sk_dtb {
+ filename = SPL_AM62_LP_SK_DTB;
+};
+
+&spl_am625_sk_dtb_unsigned {
+ filename = SPL_AM62_LP_SK_DTB;
+};
+
+#endif
diff --git a/arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi
b/arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi
new file mode 100644
index 0..cbcc7f3bb45cb
--- /dev/null
+++ b/arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * AM62x LP SK dts file for SPLs
+ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#include "k3-am62-lp-sk-binman.dtsi"
+
+/ {
+ chosen {
+ tick-timer = &main_timer0;
+ };
+};
+
+&main_timer0 {
+ clock-frequency = <2500>;
+};
diff --git a/arch/arm/dts/k3-am62-lp4-50-800-800.dtsi
b/arch/arm/dts/k3-am62-lp4-50-800-800.dtsi
new file mode 100644
index 0..c255ae6530f5b
--- /dev/null
+++ b/arch/arm/dts/k3-am62-lp4-50-800-800.dtsi
@@ -0,0 +1,2190 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * This file was generated with the
+ * AM62x SysConfig DDR Subsystem Register Configuration Tool v0.09.07
+ * Wed Mar 01 2023 17:52:11 GMT-0600 (Central Standard Time)
+ * DDR Type: LPDDR4
+ * F0 = 50MHzF1 = NA F2 = 800MHz
+ * Density (per channel): 16Gb
+ * Write DBI: Enable
+ * Number of Ranks: 1
+ */
+
+#define DDRSS_PLL_FHS_CNT 3
+#define DDRSS_PLL_FREQUENCY_1 4
+#define DDRSS_PLL_FREQUENCY_2 4
+
+#define DDRSS_CTL_0_DATA 0x0B00
+#define DDRSS_CTL_1_DATA 0x
+#define DDRSS_CTL_2_DATA 0x
+#define DDRSS_CTL_3_DATA 0x
+#define DDRSS_CTL_4_DATA 0x
+#define DDRSS_CTL_5_DATA 0x
+#define DDRSS_CTL_6_DATA 0x
+#define DDRSS_CTL_7_DATA 0x2710
+#define DDRSS_CTL_8_DATA 0x000186A0
+#define DDRSS_CTL_9_DATA 0x0005
+#define DDRSS_CTL_10_DATA 0x0064
+#define DDRSS_CTL_11_DATA 0x00027100
+#define DDRSS_CTL_12_DATA 0x00186A00
+#define DDRSS_CTL_13_DATA 0x0005
+#define DDRSS_CTL_14_DATA 0x0640
+#define DDRSS_CTL_15_DATA 0x00027100
+#define DDRSS_CTL_16_DATA 0x00186A00
+#define DDRSS_CTL_17_DATA 0x0005
+#define DDRSS_CTL_18_DATA 0x0640
+#define DDRSS_CTL_19_DATA 0x01010100
+#define DDRSS_CTL_20_DATA 0x01010100
+#define DDRSS_CTL_21_DATA 0x01000110
+#define DDRSS_CTL_22_DATA 0x02010002
+#define DDRSS_CTL_23_DATA 0x000A
+#define DDRSS_CTL_24_DATA 0x000186A0
+#define DDRSS_CTL_25_DATA 0x
+#define DDRSS_CTL_26_DATA 0x
+#define DDRSS_CTL_27_DATA 0x
+#define DDRSS_CTL_28_DATA 0x
+#define DDRSS_CTL_29_DATA 0x00020200
+#define DDRSS_CTL_30_DATA 0x
+#define DDRSS_CTL_31_DATA 0x
+#define DDRSS_CTL_32_DATA 0x
+#define DDRSS_CTL_33_DATA 0x
+#define DDRSS_CTL_34_DATA 0x0810
+#define DDRSS_CTL_35_DATA 0x2020
+#define DDRSS_CTL_36_DATA 0x
+#define DDRSS_CTL_37_DATA 0x
+#define DDRSS_CTL_38_DATA 0x040C
+#define DDRSS_CTL_39_DATA 0x
+#define DDRSS_CTL_40_DATA 0x081C
+#define DDRSS_CTL_41_DATA 0x
+#define DDRSS_CTL_42_DATA 0x081C
+#define DDRSS_CTL_43_DATA 0x
+#define DDRSS_CTL_44_DATA 0x05000804
+#define DDRSS_CTL_45_DATA 0x0700
+#define DDRSS_CTL_46_DATA 0x09090004
+#define DDRSS_CTL_47_DATA 0x0203
+#define DDRSS_CTL_48_DATA 0x00320007
+#define DDRSS_CTL_49_DATA 0x09090023
+#define DDRSS_CTL_50_DATA 0x190F
+#define DDRSS_CTL_51_DATA 0x00320007
+#define DDRSS_CTL_52_DATA 0x09090023
+#define DDRSS_CTL_53_DATA 0x0900190F
+#define DDRSS_CTL_54_DATA 0x000A0A09
+#define DDRSS_CTL_55_DATA 0x040006DB
+#define DDRSS_CTL_56_DATA 0x09092004
+#define DDRSS_CTL_57_DATA 0x0C0A
+#define DDRSS_CTL_58_DATA 0x06006DB0
+#define DDRSS_CTL_59_DATA 0x09092006
+#define DDRSS_CTL_60_DATA 0x0C0A
+#define DDRSS_CTL_61_DATA 0x06006DB0
+#define DDRSS_CTL_62_DATA 0x03042006
+#define DDRSS_CTL_63_DATA 0x04050002
+#define DDRSS_CTL_64_DATA 0x100F100F
+#define DDRSS_CTL_65_DATA 0x01010008
+#define DDRSS_CTL_66_DATA 0x041F1F07
+#
[PATCH v3 0/2] introduce basic support for TI's am625-lp-sk
Hello Everyone! The am625-lp-sk is a variant of the am625-sk showcasing the low-power features of the am625 SoC Family. Because it's essentially a board and package spin of the am625-sk I've inherited the am625 configuration and overridden what was needed. This is a new spin of Nitin's original work which has been updated significantly since October 2023 https://lore.kernel.org/u-boot/20231030110138.1347603-1-n-ya...@ti.com/ Unfortunately a patch is need on top of this series to boot: https://lore.kernel.org/u-boot/20240429214936.15187-1...@ti.com For those of us interested here is proof of life using buildroot: https://paste.sr.ht/~bryanb/40f7787f7760bee383aa8fbc342a29e8544dbdab Thank you for reviewing ~Bryan Signed-off-by: Bryan Brattlof --- Changes in v3: - actually update the copyright year - Link to v2: https://lore.kernel.org/r/20240429-am62q-wip-v2-0-e78f09174...@ti.com Changes in v2: - updated copyright year - Link to v1: https://lore.kernel.org/r/20240429-am62q-wip-v1-0-927fd2e0a...@ti.com --- Bryan Brattlof (1): configs: add defconfigs for the am625-lp-sk Nitin Yadav (1): arm: dts: add U-Boot dtbs for the am625-lp-sk arch/arm/dts/k3-am62-lp-sk-binman.dtsi | 21 + arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi | 17 + arch/arm/dts/k3-am62-lp4-50-800-800.dtsi | 2190 ++ arch/arm/dts/k3-am62-r5-lp-sk.dts| 82 ++ configs/am62x_lp_sk_a53_defconfig|3 + configs/am62x_lp_sk_r5_defconfig |2 + 6 files changed, 2315 insertions(+) --- base-commit: 714d31ca73fe1dd7a8217afc4a9f6a35ef7a9c01 change-id: 20240429-am62q-wip-f3453de038fb Best regards, -- Bryan Brattlof
[PATCH v3 2/2] configs: add defconfigs for the am625-lp-sk
The am62x-lp-sk is a package and reference board spin of the am62x-sk to showcase the low-power features of the am62x SoC family. Because it so closely resembles the am62x-sk board, use the preprocessor to inherit its configuration making the needed changes for this board where necessary. Reviewed-by: Dhruva Gole Signed-off-by: Bryan Brattlof --- configs/am62x_lp_sk_a53_defconfig | 3 +++ configs/am62x_lp_sk_r5_defconfig | 2 ++ 2 files changed, 5 insertions(+) diff --git a/configs/am62x_lp_sk_a53_defconfig b/configs/am62x_lp_sk_a53_defconfig new file mode 100644 index 0..904b2142b2f53 --- /dev/null +++ b/configs/am62x_lp_sk_a53_defconfig @@ -0,0 +1,3 @@ +#include +CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am62-lp-sk" +CONFIG_OF_UPSTREAM=y diff --git a/configs/am62x_lp_sk_r5_defconfig b/configs/am62x_lp_sk_r5_defconfig new file mode 100644 index 0..93b3922e6fec5 --- /dev/null +++ b/configs/am62x_lp_sk_r5_defconfig @@ -0,0 +1,2 @@ +#include +CONFIG_DEFAULT_DEVICE_TREE="k3-am62-r5-lp-sk" -- 2.43.2
[PATCH v2 1/2] arm: dts: add U-Boot dtbs for the am625-lp-sk
From: Nitin Yadav
Add the U-Boot device tree overrides for the am62x-lp-sk reference
board.
Signed-off-by: Nitin Yadav
Reviewed-by: Dhruva Gole
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am62-lp-sk-binman.dtsi | 21 +
arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi | 17 +
arch/arm/dts/k3-am62-lp4-50-800-800.dtsi | 2190 ++
arch/arm/dts/k3-am62-r5-lp-sk.dts| 82 ++
4 files changed, 2310 insertions(+)
diff --git a/arch/arm/dts/k3-am62-lp-sk-binman.dtsi
b/arch/arm/dts/k3-am62-lp-sk-binman.dtsi
new file mode 100644
index 0..de425a4b54f81
--- /dev/null
+++ b/arch/arm/dts/k3-am62-lp-sk-binman.dtsi
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#include "k3-binman.dtsi"
+#include "k3-am625-sk-binman.dtsi"
+
+#ifdef CONFIG_TARGET_AM625_A53_EVM
+
+#define SPL_AM62_LP_SK_DTB "spl/dts/ti/k3-am62-lp-sk.dtb"
+
+&spl_am625_sk_dtb {
+ filename = SPL_AM62_LP_SK_DTB;
+};
+
+&spl_am625_sk_dtb_unsigned {
+ filename = SPL_AM62_LP_SK_DTB;
+};
+
+#endif
diff --git a/arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi
b/arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi
new file mode 100644
index 0..08f572446657e
--- /dev/null
+++ b/arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * AM62x LP SK dts file for SPLs
+ * Copyright (C) 2021-2023 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#include "k3-am62-lp-sk-binman.dtsi"
+
+/ {
+ chosen {
+ tick-timer = &main_timer0;
+ };
+};
+
+&main_timer0 {
+ clock-frequency = <2500>;
+};
diff --git a/arch/arm/dts/k3-am62-lp4-50-800-800.dtsi
b/arch/arm/dts/k3-am62-lp4-50-800-800.dtsi
new file mode 100644
index 0..c255ae6530f5b
--- /dev/null
+++ b/arch/arm/dts/k3-am62-lp4-50-800-800.dtsi
@@ -0,0 +1,2190 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * This file was generated with the
+ * AM62x SysConfig DDR Subsystem Register Configuration Tool v0.09.07
+ * Wed Mar 01 2023 17:52:11 GMT-0600 (Central Standard Time)
+ * DDR Type: LPDDR4
+ * F0 = 50MHzF1 = NA F2 = 800MHz
+ * Density (per channel): 16Gb
+ * Write DBI: Enable
+ * Number of Ranks: 1
+ */
+
+#define DDRSS_PLL_FHS_CNT 3
+#define DDRSS_PLL_FREQUENCY_1 4
+#define DDRSS_PLL_FREQUENCY_2 4
+
+#define DDRSS_CTL_0_DATA 0x0B00
+#define DDRSS_CTL_1_DATA 0x
+#define DDRSS_CTL_2_DATA 0x
+#define DDRSS_CTL_3_DATA 0x
+#define DDRSS_CTL_4_DATA 0x
+#define DDRSS_CTL_5_DATA 0x
+#define DDRSS_CTL_6_DATA 0x
+#define DDRSS_CTL_7_DATA 0x2710
+#define DDRSS_CTL_8_DATA 0x000186A0
+#define DDRSS_CTL_9_DATA 0x0005
+#define DDRSS_CTL_10_DATA 0x0064
+#define DDRSS_CTL_11_DATA 0x00027100
+#define DDRSS_CTL_12_DATA 0x00186A00
+#define DDRSS_CTL_13_DATA 0x0005
+#define DDRSS_CTL_14_DATA 0x0640
+#define DDRSS_CTL_15_DATA 0x00027100
+#define DDRSS_CTL_16_DATA 0x00186A00
+#define DDRSS_CTL_17_DATA 0x0005
+#define DDRSS_CTL_18_DATA 0x0640
+#define DDRSS_CTL_19_DATA 0x01010100
+#define DDRSS_CTL_20_DATA 0x01010100
+#define DDRSS_CTL_21_DATA 0x01000110
+#define DDRSS_CTL_22_DATA 0x02010002
+#define DDRSS_CTL_23_DATA 0x000A
+#define DDRSS_CTL_24_DATA 0x000186A0
+#define DDRSS_CTL_25_DATA 0x
+#define DDRSS_CTL_26_DATA 0x
+#define DDRSS_CTL_27_DATA 0x
+#define DDRSS_CTL_28_DATA 0x
+#define DDRSS_CTL_29_DATA 0x00020200
+#define DDRSS_CTL_30_DATA 0x
+#define DDRSS_CTL_31_DATA 0x
+#define DDRSS_CTL_32_DATA 0x
+#define DDRSS_CTL_33_DATA 0x
+#define DDRSS_CTL_34_DATA 0x0810
+#define DDRSS_CTL_35_DATA 0x2020
+#define DDRSS_CTL_36_DATA 0x
+#define DDRSS_CTL_37_DATA 0x
+#define DDRSS_CTL_38_DATA 0x040C
+#define DDRSS_CTL_39_DATA 0x
+#define DDRSS_CTL_40_DATA 0x081C
+#define DDRSS_CTL_41_DATA 0x
+#define DDRSS_CTL_42_DATA 0x081C
+#define DDRSS_CTL_43_DATA 0x
+#define DDRSS_CTL_44_DATA 0x05000804
+#define DDRSS_CTL_45_DATA 0x0700
+#define DDRSS_CTL_46_DATA 0x09090004
+#define DDRSS_CTL_47_DATA 0x0203
+#define DDRSS_CTL_48_DATA 0x00320007
+#define DDRSS_CTL_49_DATA 0x09090023
+#define DDRSS_CTL_50_DATA 0x190F
+#define DDRSS_CTL_51_DATA 0x00320007
+#define DDRSS_CTL_52_DATA 0x09090023
+#define DDRSS_CTL_53_DATA 0x0900190F
+#define DDRSS_CTL_54_DATA 0x000A0A09
+#define DDRSS_CTL_55_DATA 0x040006DB
+#define DDRSS_CTL_56_DATA 0x09092004
+#define DDRSS_CTL_57_DATA 0x0C0A
+#define DDRSS_CTL_58_DATA 0x06006DB0
+#define DDRSS_CTL_59_DATA 0x09092006
+#define DDRSS_CTL_60_DATA 0x0C0A
+#define DDRSS_CTL_61_DATA 0x06006DB0
+#define DDRSS_CTL_62_DATA 0x03042006
+#define DDRSS_CTL_63_DATA 0x04050002
+#define DDRSS_CTL_64_DATA 0x100F100F
+#define DDRSS_CTL_65_DATA 0x01010008
+#define DDRSS_CTL_66_DATA 0x041F1F07
+#
[PATCH v2 2/2] configs: add defconfigs for the am625-lp-sk
The am62x-lp-sk is a package and reference board spin of the am62x-sk to showcase the low-power features of the am62x SoC family. Because it so closely resembles the am62x-sk board, use the preprocessor to inherit its configuration making the needed changes for this board where necessary. Reviewed-by: Dhruva Gole Signed-off-by: Bryan Brattlof --- configs/am62x_lp_sk_a53_defconfig | 3 +++ configs/am62x_lp_sk_r5_defconfig | 2 ++ 2 files changed, 5 insertions(+) diff --git a/configs/am62x_lp_sk_a53_defconfig b/configs/am62x_lp_sk_a53_defconfig new file mode 100644 index 0..904b2142b2f53 --- /dev/null +++ b/configs/am62x_lp_sk_a53_defconfig @@ -0,0 +1,3 @@ +#include +CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am62-lp-sk" +CONFIG_OF_UPSTREAM=y diff --git a/configs/am62x_lp_sk_r5_defconfig b/configs/am62x_lp_sk_r5_defconfig new file mode 100644 index 0..93b3922e6fec5 --- /dev/null +++ b/configs/am62x_lp_sk_r5_defconfig @@ -0,0 +1,2 @@ +#include +CONFIG_DEFAULT_DEVICE_TREE="k3-am62-r5-lp-sk" -- 2.43.2
[PATCH v2 0/2] introduce basic support for TI's am625-lp-sk
Hello Everyone! The am625-lp-sk is a variant of the am625-sk showcasing the low-power features of the am625 SoC Family. Because it's essentially a board and package spin of the am625-sk I've inherited the am625 configuration and overridden what was needed. This is a new spin of Nitin's original work which has been updated significantly since October 2023 https://lore.kernel.org/u-boot/20231030110138.1347603-1-n-ya...@ti.com/ Unfortunately a patch is need on top of this series to boot: https://lore.kernel.org/u-boot/20240429214936.15187-1...@ti.com For those of us interested here is proof of life using buildroot: https://paste.sr.ht/~bryanb/40f7787f7760bee383aa8fbc342a29e8544dbdab Thank you for reviewing ~Bryan Signed-off-by: Bryan Brattlof --- Changes in v2: - updated copyright year - Link to v1: https://lore.kernel.org/r/20240429-am62q-wip-v1-0-927fd2e0a...@ti.com --- Bryan Brattlof (1): configs: add defconfigs for the am625-lp-sk Nitin Yadav (1): arm: dts: add U-Boot dtbs for the am625-lp-sk arch/arm/dts/k3-am62-lp-sk-binman.dtsi | 21 + arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi | 17 + arch/arm/dts/k3-am62-lp4-50-800-800.dtsi | 2190 ++ arch/arm/dts/k3-am62-r5-lp-sk.dts| 82 ++ configs/am62x_lp_sk_a53_defconfig|3 + configs/am62x_lp_sk_r5_defconfig |2 + 6 files changed, 2315 insertions(+) --- base-commit: 714d31ca73fe1dd7a8217afc4a9f6a35ef7a9c01 change-id: 20240429-am62q-wip-f3453de038fb Best regards, -- Bryan Brattlof
Re: [PATCH] configs: am62x_evm_r5: Increase size of malloc_simple heap after relocation
Thanks Judith!
On April 29, 2024 thus sayeth Judith Mendez:
> On AM62x SK we can see a boot failure with signature "alloc space
> exhausted", so fix by increasing size of SPL_STACK_R_MALLOC_SIMPLE_LEN.
>
> Fixes: 128f81290b ("arm: dts: k3: binman: am625: add support for signing
> TIFSSTUB Images")
> Signed-off-by: Judith Mendez
> ---
> configs/am62x_evm_r5_defconfig | 1 +
> 1 file changed, 1 insertion(+)
>
This fixes the 62 for me
Reviewed-by: Bryan Brattlof
~Bryan
Re: [PATCH 1/2] arm: dts: add U-Boot dtbs for the am625-lp-sk
On May 3, 2024 thus sayeth Dhruva Gole:
> On Apr 30, 2024 at 14:57:45 -0500, Bryan Brattlof wrote:
> > From: Nitin Yadav
> >
> > Add the U-Boot device tree overrides for the am62x-lp-sk reference
> > board.
> >
> > Signed-off-by: Nitin Yadav
> > Signed-off-by: Bryan Brattlof
> > ---
> > arch/arm/dts/k3-am62-lp-sk-binman.dtsi | 21 +
> > arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi | 17 +
> > arch/arm/dts/k3-am62-lp4-50-800-800.dtsi | 2190
> > ++
> > arch/arm/dts/k3-am62-r5-lp-sk.dts| 82 ++
> > 4 files changed, 2310 insertions(+)
> >
> > diff --git a/arch/arm/dts/k3-am62-lp-sk-binman.dtsi
> > b/arch/arm/dts/k3-am62-lp-sk-binman.dtsi
> > new file mode 100644
> > index 0..de425a4b54f81
> > --- /dev/null
> > +++ b/arch/arm/dts/k3-am62-lp-sk-binman.dtsi
> > @@ -0,0 +1,21 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
>
> Can make this 2024, here and everywhere else.
>
> > + */
> > +
> > +#include "k3-binman.dtsi"
> > +#include "k3-am625-sk-binman.dtsi"
> > +
> > +#ifdef CONFIG_TARGET_AM625_A53_EVM
> > +
> > +#define SPL_AM62_LP_SK_DTB "spl/dts/ti/k3-am62-lp-sk.dtb"
> > +
> > +&spl_am625_sk_dtb {
> > + filename = SPL_AM62_LP_SK_DTB;
> > +};
> > +
> > +&spl_am625_sk_dtb_unsigned {
> > + filename = SPL_AM62_LP_SK_DTB;
> > +};
> > +
> > +#endif
> > diff --git a/arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi
> > b/arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi
> > new file mode 100644
> > index 0..08f572446657e
> > --- /dev/null
> > +++ b/arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi
> > @@ -0,0 +1,17 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * AM62x LP SK dts file for SPLs
> > + * Copyright (C) 2021-2023 Texas Instruments Incorporated -
> > https://www.ti.com/
>
> 2024 ^^
>
> [...]
>
> With that fixed,
> Reviewed-by: Dhruva Gole
>
Okay I'll get that fixed for v2
~Bryan
Re: [PATCH 63/81] soc: Remove and add needed includes
On May 1, 2024 thus sayeth Tom Rini: > Remove from this driver directory and when needed > add missing include files directly. > > Signed-off-by: Tom Rini > --- > Cc: Tom Rini > Cc: Simon Glass > Cc: Michal Simek > Cc: Nishanth Menon > Cc: Roger Quadros > Cc: Apurva Nandan > Cc: Hari Nagalla > Cc: Bryan Brattlof > --- > drivers/soc/soc-uclass.c| 1 - > drivers/soc/soc_sandbox.c | 1 - > drivers/soc/soc_ti_k3.c | 1 - > drivers/soc/soc_xilinx_versal.c | 1 - > drivers/soc/soc_xilinx_versal_net.c | 1 - > drivers/soc/soc_xilinx_zynqmp.c | 1 - > drivers/soc/ti/k3-navss-ringacc.c | 1 - > drivers/soc/ti/keystone_serdes.c| 1 - > drivers/soc/ti/pruss.c | 1 - > 9 files changed, 9 deletions(-) > ... > > diff --git a/drivers/soc/soc_ti_k3.c b/drivers/soc/soc_ti_k3.c > index 3a4e58bba671..b585e47d46fe 100644 > --- a/drivers/soc/soc_ti_k3.c > +++ b/drivers/soc/soc_ti_k3.c > @@ -4,7 +4,6 @@ > * Dave Gerlach > */ > > -#include > #include > #include > Thanks Tom! Reviewed-by: Bryan Brattlof ~Bryan
[PATCH 1/2] arm: dts: add U-Boot dtbs for the am625-lp-sk
From: Nitin Yadav
Add the U-Boot device tree overrides for the am62x-lp-sk reference
board.
Signed-off-by: Nitin Yadav
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am62-lp-sk-binman.dtsi | 21 +
arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi | 17 +
arch/arm/dts/k3-am62-lp4-50-800-800.dtsi | 2190 ++
arch/arm/dts/k3-am62-r5-lp-sk.dts| 82 ++
4 files changed, 2310 insertions(+)
diff --git a/arch/arm/dts/k3-am62-lp-sk-binman.dtsi
b/arch/arm/dts/k3-am62-lp-sk-binman.dtsi
new file mode 100644
index 0..de425a4b54f81
--- /dev/null
+++ b/arch/arm/dts/k3-am62-lp-sk-binman.dtsi
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#include "k3-binman.dtsi"
+#include "k3-am625-sk-binman.dtsi"
+
+#ifdef CONFIG_TARGET_AM625_A53_EVM
+
+#define SPL_AM62_LP_SK_DTB "spl/dts/ti/k3-am62-lp-sk.dtb"
+
+&spl_am625_sk_dtb {
+ filename = SPL_AM62_LP_SK_DTB;
+};
+
+&spl_am625_sk_dtb_unsigned {
+ filename = SPL_AM62_LP_SK_DTB;
+};
+
+#endif
diff --git a/arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi
b/arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi
new file mode 100644
index 0..08f572446657e
--- /dev/null
+++ b/arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * AM62x LP SK dts file for SPLs
+ * Copyright (C) 2021-2023 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#include "k3-am62-lp-sk-binman.dtsi"
+
+/ {
+ chosen {
+ tick-timer = &main_timer0;
+ };
+};
+
+&main_timer0 {
+ clock-frequency = <2500>;
+};
diff --git a/arch/arm/dts/k3-am62-lp4-50-800-800.dtsi
b/arch/arm/dts/k3-am62-lp4-50-800-800.dtsi
new file mode 100644
index 0..c255ae6530f5b
--- /dev/null
+++ b/arch/arm/dts/k3-am62-lp4-50-800-800.dtsi
@@ -0,0 +1,2190 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * This file was generated with the
+ * AM62x SysConfig DDR Subsystem Register Configuration Tool v0.09.07
+ * Wed Mar 01 2023 17:52:11 GMT-0600 (Central Standard Time)
+ * DDR Type: LPDDR4
+ * F0 = 50MHzF1 = NA F2 = 800MHz
+ * Density (per channel): 16Gb
+ * Write DBI: Enable
+ * Number of Ranks: 1
+ */
+
+#define DDRSS_PLL_FHS_CNT 3
+#define DDRSS_PLL_FREQUENCY_1 4
+#define DDRSS_PLL_FREQUENCY_2 4
+
+#define DDRSS_CTL_0_DATA 0x0B00
+#define DDRSS_CTL_1_DATA 0x
+#define DDRSS_CTL_2_DATA 0x
+#define DDRSS_CTL_3_DATA 0x
+#define DDRSS_CTL_4_DATA 0x
+#define DDRSS_CTL_5_DATA 0x
+#define DDRSS_CTL_6_DATA 0x
+#define DDRSS_CTL_7_DATA 0x2710
+#define DDRSS_CTL_8_DATA 0x000186A0
+#define DDRSS_CTL_9_DATA 0x0005
+#define DDRSS_CTL_10_DATA 0x0064
+#define DDRSS_CTL_11_DATA 0x00027100
+#define DDRSS_CTL_12_DATA 0x00186A00
+#define DDRSS_CTL_13_DATA 0x0005
+#define DDRSS_CTL_14_DATA 0x0640
+#define DDRSS_CTL_15_DATA 0x00027100
+#define DDRSS_CTL_16_DATA 0x00186A00
+#define DDRSS_CTL_17_DATA 0x0005
+#define DDRSS_CTL_18_DATA 0x0640
+#define DDRSS_CTL_19_DATA 0x01010100
+#define DDRSS_CTL_20_DATA 0x01010100
+#define DDRSS_CTL_21_DATA 0x01000110
+#define DDRSS_CTL_22_DATA 0x02010002
+#define DDRSS_CTL_23_DATA 0x000A
+#define DDRSS_CTL_24_DATA 0x000186A0
+#define DDRSS_CTL_25_DATA 0x
+#define DDRSS_CTL_26_DATA 0x
+#define DDRSS_CTL_27_DATA 0x
+#define DDRSS_CTL_28_DATA 0x
+#define DDRSS_CTL_29_DATA 0x00020200
+#define DDRSS_CTL_30_DATA 0x
+#define DDRSS_CTL_31_DATA 0x
+#define DDRSS_CTL_32_DATA 0x
+#define DDRSS_CTL_33_DATA 0x
+#define DDRSS_CTL_34_DATA 0x0810
+#define DDRSS_CTL_35_DATA 0x2020
+#define DDRSS_CTL_36_DATA 0x
+#define DDRSS_CTL_37_DATA 0x
+#define DDRSS_CTL_38_DATA 0x040C
+#define DDRSS_CTL_39_DATA 0x
+#define DDRSS_CTL_40_DATA 0x081C
+#define DDRSS_CTL_41_DATA 0x
+#define DDRSS_CTL_42_DATA 0x081C
+#define DDRSS_CTL_43_DATA 0x
+#define DDRSS_CTL_44_DATA 0x05000804
+#define DDRSS_CTL_45_DATA 0x0700
+#define DDRSS_CTL_46_DATA 0x09090004
+#define DDRSS_CTL_47_DATA 0x0203
+#define DDRSS_CTL_48_DATA 0x00320007
+#define DDRSS_CTL_49_DATA 0x09090023
+#define DDRSS_CTL_50_DATA 0x190F
+#define DDRSS_CTL_51_DATA 0x00320007
+#define DDRSS_CTL_52_DATA 0x09090023
+#define DDRSS_CTL_53_DATA 0x0900190F
+#define DDRSS_CTL_54_DATA 0x000A0A09
+#define DDRSS_CTL_55_DATA 0x040006DB
+#define DDRSS_CTL_56_DATA 0x09092004
+#define DDRSS_CTL_57_DATA 0x0C0A
+#define DDRSS_CTL_58_DATA 0x06006DB0
+#define DDRSS_CTL_59_DATA 0x09092006
+#define DDRSS_CTL_60_DATA 0x0C0A
+#define DDRSS_CTL_61_DATA 0x06006DB0
+#define DDRSS_CTL_62_DATA 0x03042006
+#define DDRSS_CTL_63_DATA 0x04050002
+#define DDRSS_CTL_64_DATA 0x100F100F
+#define DDRSS_CTL_65_DATA 0x01010008
+#define DDRSS_CTL_66_DATA 0x041F1F07
+#define DDRSS_CTL_67_
[PATCH 2/2] configs: add defconfigs for the am625-lp-sk
The am62x-lp-sk is a package and reference board spin of the am62x-sk to showcase the low-power features of the am62x SoC family. Because it so closely resembles the am62x-sk board, us the preprocessor to inherit its configuration making the needed changes for this board. Signed-off-by: Bryan Brattlof --- configs/am62x_lp_sk_a53_defconfig | 3 +++ configs/am62x_lp_sk_r5_defconfig | 2 ++ 2 files changed, 5 insertions(+) diff --git a/configs/am62x_lp_sk_a53_defconfig b/configs/am62x_lp_sk_a53_defconfig new file mode 100644 index 0..904b2142b2f53 --- /dev/null +++ b/configs/am62x_lp_sk_a53_defconfig @@ -0,0 +1,3 @@ +#include +CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am62-lp-sk" +CONFIG_OF_UPSTREAM=y diff --git a/configs/am62x_lp_sk_r5_defconfig b/configs/am62x_lp_sk_r5_defconfig new file mode 100644 index 0..93b3922e6fec5 --- /dev/null +++ b/configs/am62x_lp_sk_r5_defconfig @@ -0,0 +1,2 @@ +#include +CONFIG_DEFAULT_DEVICE_TREE="k3-am62-r5-lp-sk" -- 2.43.2
[PATCH 0/2] introduce basic support for TI's am625-lp-sk
Hello Everyone! The am625-lp-sk is a variant of the am625-sk showcasing the low-power features of the am625 SoC Family. Because it's essentially a board and package spin of the am625-sk I've inherited the am625 configuration and overridden what was needed. This is a new spin of Nitin's original work which has been updated significantly since October 2023 https://lore.kernel.org/u-boot/20231030110138.1347603-1-n-ya...@ti.com/ Unfortunately a few patches have broken the am62x boot currently and need to be added and reverted for this series to work: One to increase the size of MALLOC space to make room for the DM stubs https://lore.kernel.org/u-boot/20240429214936.15187-1...@ti.com And this patch (in active debug) will need to be reverted for MMC boot. https://lore.kernel.org/u-boot/20240422190035.25852-1-greg.mal...@timesys.com/ For those of us interested here is proof of life using buildroot: https://paste.sr.ht/~bryanb/40f7787f7760bee383aa8fbc342a29e8544dbdab Thank you for reviewing ~Bryan Signed-off-by: Bryan Brattlof --- Bryan Brattlof (1): configs: add defconfigs for the am625-lp-sk Nitin Yadav (1): arm: dts: add U-Boot dtbs for the am625-lp-sk arch/arm/dts/k3-am62-lp-sk-binman.dtsi | 21 + arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi | 17 + arch/arm/dts/k3-am62-lp4-50-800-800.dtsi | 2190 ++ arch/arm/dts/k3-am62-r5-lp-sk.dts| 82 ++ configs/am62x_lp_sk_a53_defconfig|3 + configs/am62x_lp_sk_r5_defconfig |2 + 6 files changed, 2315 insertions(+) --- base-commit: b43a0c7ed600fc608262b9a274a1cad4c7465b6a change-id: 20240429-am62q-wip-f3453de038fb Best regards, -- Bryan Brattlof
Re: [PATCH v2] configs: am62px_evm_a53_defconfig: Enable MMC UHS config option
On April 16, 2024 thus sayeth Judith Mendez: > Enable MMC UHS support for to allow to enter the UHS > modes for MMC1. > s/support for/support/ Though it doesn't really matter to me. ;) > Signed-off-by: Judith Mendez > --- > Changes since v1: > - Fix typo in patch description > --- > > configs/am62px_evm_a53_defconfig | 2 ++ > 1 file changed, 2 insertions(+) > Thanks for finally getting MMC sorted so we can enable these configs Acked-by: Bryan Brattlof ~Bryan
Re: [RFC PATCH 08/15] arm: mach-k3: j722s: introduce clock and device files for wkup spl
On April 4, 2024 thus sayeth Jayesh Choudhary: > Include the clock and lpsc tree files needed for the wkup spl to > initialize the proper PLLs and power domains to boot the SoC. > > Signed-off-by: Vaishnav Achath > Signed-off-by: Jayesh Choudhary > --- > arch/arm/mach-k3/r5/Makefile | 1 + > arch/arm/mach-k3/r5/j722s/Makefile | 6 + > arch/arm/mach-k3/r5/j722s/clk-data.c | 312 + > arch/arm/mach-k3/r5/j722s/dev-data.c | 69 ++ > drivers/clk/ti/clk-k3.c| 6 + > drivers/power/domain/ti-power-domain.c | 6 + > include/k3-clk.h | 1 + > include/k3-dev.h | 1 + > 8 files changed, 402 insertions(+) > create mode 100644 arch/arm/mach-k3/r5/j722s/Makefile > create mode 100644 arch/arm/mach-k3/r5/j722s/clk-data.c > create mode 100644 arch/arm/mach-k3/r5/j722s/dev-data.c > Reviewed-by: Bryan Brattlof ~Bryan
Re: [RFC PATCH 05/15] clk: ti: clk-k3: use IS_ENABLED macro and fix the clock-data order
On April 4, 2024 thus sayeth Jayesh Choudhary: > Use IS_ENABLED macro for the platform clock-data list and add them > in alphabetical order. > > Signed-off-by: Jayesh Choudhary > --- > drivers/clk/ti/clk-k3.c | 41 + > 1 file changed, 21 insertions(+), 20 deletions(-) > Reviewed-by: Bryan Brattlof ~Bryan
Re: [PATCH 1/2] arm: mach-k3: am625: copy bootindex to OCRAM for main domain SPL
On April 1, 2024 thus sayeth Wadim Egorov:
> Hi Vignesh, Hi Bryan,
>
>
> Am 05.03.24 um 18:36 schrieb Raghavendra, Vignesh:
> >
> >
> > On 3/5/2024 11:04 PM, Bryan Brattlof wrote:
> > > On March 5, 2024 thus sayeth Vignesh Raghavendra:
> > > >
> > > > On 05/03/24 01:57, Bryan Brattlof wrote:
> > > > > Hey Vignesh!
> > > > >
> > > > > On March 4, 2024 thus sayeth Vignesh Raghavendra:
> > > > > > Hi Wadim,
> > > > > >
> > > > > > On 26/02/24 19:00, Wadim Egorov wrote:
> > > > > > > Texas Instruments has begun enabling security settings on the
> > > > > > > SoCs it
> > > > > > > produces to instruct ROM and TIFS to begin protecting the Security
> > > > > > > Management Subsystem (SMS) from other binaries we load into the
> > > > > > > chip by
> > > > > > > default.
> > > > > > >
> > > > > > > One way ROM and TIFS do this is by enabling firewalls to protect
> > > > > > > the
> > > > > > > OCSRAM and HSM RAM regions they're using during bootup.
> > > > > > >
> > > > > > > The HSM RAM the wakeup SPL is in is firewalled by TIFS to protect
> > > > > > > itself from the main domain applications. This means the
> > > > > > > 'bootindex'
> > > > > > > value in HSM RAM, left by ROM to indicate if we're using the
> > > > > > > primary
> > > > > > > or secondary boot-method, must be moved to OCSRAM (that TIFS has
> > > > > > > open
> > > > > > > for us) before we make the jump to the main domain so the main
> > > > > > > domain's
> > > > > > > bootloaders can keep access to this information.
> > > > > > >
> > > > > > > Based on commit
> > > > > > >b672e8581070 ("arm: mach-k3: copy bootindex to OCRAM for main
> > > > > > > domain SPL")
>
> I was thinking, even if the reason described here is not right or does not
> apply to the am62x, it is still a valid solution for carrying this variable
> into the context for next stage A53 bootloader.
>
> store_boot_info_from_rom() stores the index to the bootindex (.data)
> variable which makes sure it is valid in R5 SPL context. But the next stage
> bootloader does not know anything about the bootindex variable. So from my
> understanding it needs to be copied to a different region to preserve the
> data for next stage bootloaders.
>
> Or do I miss something?
That's correct. We typically put this bootindex variable in the same
location for both SPLs.
~Bryan
> > > > > > >
> > > > > > FYI, this is mostly a problem in non SPL flow (TI prosperity SBL for
> > > > > > example) where HSM RAM would be used by HSM firmware. This should
> > > > > > be a
> > > > > > issue in R5 SPL flow. Do you see any issues today? If so, whats the
> > > > > > TIFS firmware being used?
> > > > > >
> > > > > > > Signed-off-by: Wadim Egorov
> > > > > > > ---
> > > > > > > arch/arm/mach-k3/Kconfig | 3 ++-
> > > > > > > arch/arm/mach-k3/am625_init.c | 15
> > > > > > > +--
> > > > > > > arch/arm/mach-k3/include/mach/am62_hardware.h | 15
> > > > > > > +++
> > > > > > > 3 files changed, 30 insertions(+), 3 deletions(-)
> > > > > > >
> > > > > > > diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
> > > > > > > index 03898424c9..f5d06593f7 100644
> > > > > > > --- a/arch/arm/mach-k3/Kconfig
> > > > > > > +++ b/arch/arm/mach-k3/Kconfig
> > > > > > > @@ -75,7 +75,8 @@ config SYS_K3_BOOT_PARAM_TABLE_INDEX
> > > > > > > default 0x41cffbfc if SOC_K3_J721E
> > > > > > > default 0x41cfdbfc if SOC_K3_J721S2
> > > > > > > default 0x701bebfc if SOC_K3_AM642
> > > > > > > - default 0x43c3f290 if SOC_K3_AM625
> > > > > > > + default 0x43c3f290 if SOC_K3_AM625 && CPU_V7R
> > > > > > &g
[PATCH v4 10/13] arm: dts: introduce am62p5 U-Boot dts files
Include the U-Boot device tree files needed to boot the board. Signed-off-by: Bryan Brattlof --- arch/arm/dts/Makefile |2 + arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi | 2800 arch/arm/dts/k3-am62p-sk-binman.dtsi | 173 ++ arch/arm/dts/k3-am62p5-r5-sk.dts | 101 + arch/arm/dts/k3-am62p5-sk-u-boot.dtsi | 23 + 5 files changed, 3099 insertions(+) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 784192125d352..a965a70f37cc6 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1437,6 +1437,8 @@ dtb-$(CONFIG_SOC_K3_AM625) += k3-am625-sk.dtb \ dtb-$(CONFIG_SOC_K3_AM62A7) += k3-am62a7-sk.dtb \ k3-am62a7-r5-sk.dtb +dtb-$(CONFIG_SOC_K3_AM62P5) += k3-am62p5-r5-sk.dtb + dtb-$(CONFIG_ARCH_MEDIATEK) += \ mt7622-rfb.dtb \ mt7623a-unielec-u7623-02-emmc.dtb \ diff --git a/arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi b/arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi new file mode 100644 index 0..f66435201530f --- /dev/null +++ b/arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi @@ -0,0 +1,2800 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * This file was generated with the + * AM62Px SysConfig DDR Subsystem Register Configuration Tool v0.10.02 + * Thu Jan 25 2024 10:43:46 GMT-0600 (Central Standard Time) + * DDR Type: LPDDR4 + * F0 = 50MHzF1 = NA F2 = 1600MHz + * Density (per channel): 16Gb + * Number of Ranks: 2 + */ + +#define DDRSS_PLL_FHS_CNT 5 +#define DDRSS_PLL_FREQUENCY_1 8 +#define DDRSS_PLL_FREQUENCY_2 8 +#define DDRSS_SDRAM_IDX 17 +#define DDRSS_REGION_IDX 17 + +#define DDRSS_CTL_0_DATA 0x0B00 +#define DDRSS_CTL_1_DATA 0x +#define DDRSS_CTL_2_DATA 0x +#define DDRSS_CTL_3_DATA 0x +#define DDRSS_CTL_4_DATA 0x +#define DDRSS_CTL_5_DATA 0x +#define DDRSS_CTL_6_DATA 0x +#define DDRSS_CTL_7_DATA 0x2710 +#define DDRSS_CTL_8_DATA 0x000186A0 +#define DDRSS_CTL_9_DATA 0x0005 +#define DDRSS_CTL_10_DATA 0x0064 +#define DDRSS_CTL_11_DATA 0x0004E200 +#define DDRSS_CTL_12_DATA 0x0030D400 +#define DDRSS_CTL_13_DATA 0x0005 +#define DDRSS_CTL_14_DATA 0x0C80 +#define DDRSS_CTL_15_DATA 0x0004E200 +#define DDRSS_CTL_16_DATA 0x0030D400 +#define DDRSS_CTL_17_DATA 0x0005 +#define DDRSS_CTL_18_DATA 0x0C80 +#define DDRSS_CTL_19_DATA 0x01010100 +#define DDRSS_CTL_20_DATA 0x01010100 +#define DDRSS_CTL_21_DATA 0x01000110 +#define DDRSS_CTL_22_DATA 0x02010002 +#define DDRSS_CTL_23_DATA 0x000A +#define DDRSS_CTL_24_DATA 0x000186A0 +#define DDRSS_CTL_25_DATA 0x +#define DDRSS_CTL_26_DATA 0x +#define DDRSS_CTL_27_DATA 0x +#define DDRSS_CTL_28_DATA 0x +#define DDRSS_CTL_29_DATA 0x00020200 +#define DDRSS_CTL_30_DATA 0x +#define DDRSS_CTL_31_DATA 0x +#define DDRSS_CTL_32_DATA 0x +#define DDRSS_CTL_33_DATA 0x +#define DDRSS_CTL_34_DATA 0x0810 +#define DDRSS_CTL_35_DATA 0x4040 +#define DDRSS_CTL_36_DATA 0x +#define DDRSS_CTL_37_DATA 0x +#define DDRSS_CTL_38_DATA 0x +#define DDRSS_CTL_39_DATA 0x +#define DDRSS_CTL_40_DATA 0x040C +#define DDRSS_CTL_41_DATA 0x +#define DDRSS_CTL_42_DATA 0x0E38 +#define DDRSS_CTL_43_DATA 0x +#define DDRSS_CTL_44_DATA 0x0E38 +#define DDRSS_CTL_45_DATA 0x +#define DDRSS_CTL_46_DATA 0x05000804 +#define DDRSS_CTL_47_DATA 0x0700 +#define DDRSS_CTL_48_DATA 0x09090004 +#define DDRSS_CTL_49_DATA 0x0303 +#define DDRSS_CTL_50_DATA 0x00620011 +#define DDRSS_CTL_51_DATA 0x09110045 +#define DDRSS_CTL_52_DATA 0x421D +#define DDRSS_CTL_53_DATA 0x00620011 +#define DDRSS_CTL_54_DATA 0x09110045 +#define DDRSS_CTL_55_DATA 0x0900421D +#define DDRSS_CTL_56_DATA 0x000A0A09 +#define DDRSS_CTL_57_DATA 0x040006DB +#define DDRSS_CTL_58_DATA 0x090D2005 +#define DDRSS_CTL_59_DATA 0x1710 +#define DDRSS_CTL_60_DATA 0x0C00DB60 +#define DDRSS_CTL_61_DATA 0x090D200D +#define DDRSS_CTL_62_DATA 0x1710 +#define DDRSS_CTL_63_DATA 0x0C00DB60 +#define DDRSS_CTL_64_DATA 0x0304200D +#define DDRSS_CTL_65_DATA 0x04050002 +#define DDRSS_CTL_66_DATA 0x1F1E1F1E +#define DDRSS_CTL_67_DATA 0x01010008 +#define DDRSS_CTL_68_DATA 0x043C3C07 +#define DDRSS_CTL_69_DATA 0x0303 +#define DDRSS_CTL_70_DATA 0x +#define DDRSS_CTL_71_DATA 0x0101 +#define DDRSS_CTL_72_DATA 0x +#define DDRSS_CTL_73_DATA 0x0100 +#define DDRSS_CTL_74_DATA 0x00130803 +#define DDRSS_CTL_75_DATA 0x00BB +#define DDRSS_CTL_76_DATA 0x0260 +#define DDRSS_CTL_77_DATA 0x1858 +#define DDRSS_CTL_78_DATA 0x0260 +#define DDRSS_CTL_79_DATA 0x1858 +#define DDRSS_CTL_80_DATA 0x0005 +#define DDRSS_CTL_81_DATA 0x000A +#define DDRSS_CTL_82_DATA 0x0010 +#define DDRSS_CTL_83_DATA 0x0130 +#define DDRSS_CTL_84_DATA 0x0304 +#define DDRSS_CTL_85_DATA 0x0130 +#define DDRSS_CTL_86_DATA 0x0304 +#define DDRSS_CTL_87_DATA
[PATCH v4 03/13] arm: mach-k3: am62px: introduce clock and device files for wkup spl
Include the clock and lpsc tree files needed for the wkup spl to
initialize the proper PLLs and power domains to boot the SoC.
Reviewed-by: Neha Malcom Francis
Signed-off-by: Bryan Brattlof
---
arch/arm/mach-k3/r5/Makefile | 1 +
arch/arm/mach-k3/r5/am62px/Makefile| 6 +
arch/arm/mach-k3/r5/am62px/clk-data.c | 325 +
arch/arm/mach-k3/r5/am62px/dev-data.c | 71 +++
drivers/clk/ti/clk-k3.c| 6 +
drivers/power/domain/ti-power-domain.c | 8 +-
include/k3-clk.h | 1 +
include/k3-dev.h | 1 +
8 files changed, 418 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-k3/r5/Makefile b/arch/arm/mach-k3/r5/Makefile
index ef0bf39d4503b..1cfc8e3ade966 100644
--- a/arch/arm/mach-k3/r5/Makefile
+++ b/arch/arm/mach-k3/r5/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_SOC_K3_J721S2) += j721s2/
obj-$(CONFIG_SOC_K3_AM625) += am62x/
obj-$(CONFIG_SOC_K3_AM62A7) += am62ax/
obj-$(CONFIG_SOC_K3_J784S4) += j784s4/
+obj-$(CONFIG_SOC_K3_AM62P5) += am62px/
obj-y += common.o
obj-y += lowlevel_init.o
diff --git a/arch/arm/mach-k3/r5/am62px/Makefile
b/arch/arm/mach-k3/r5/am62px/Makefile
new file mode 100644
index 0..50b0df20a3d1a
--- /dev/null
+++ b/arch/arm/mach-k3/r5/am62px/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+
+obj-y += clk-data.o
+obj-y += dev-data.o
diff --git a/arch/arm/mach-k3/r5/am62px/clk-data.c
b/arch/arm/mach-k3/r5/am62px/clk-data.c
new file mode 100644
index 0..4b9892fe05167
--- /dev/null
+++ b/arch/arm/mach-k3/r5/am62px/clk-data.c
@@ -0,0 +1,325 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * AM62PX specific clock platform data
+ *
+ * This file is auto generated. Please do not hand edit and report any issues
+ * to Bryan Brattlof .
+ *
+ * Copyright (C) 2020-2023 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#include
+#include "k3-clk.h"
+
+static const char * const gluelogic_hfosc0_clkout_parents[] = {
+ NULL,
+ NULL,
+ "osc_24_mhz",
+ "osc_25_mhz",
+ "osc_26_mhz",
+ NULL,
+};
+
+static const char * const clk_32k_rc_sel_out0_parents[] = {
+ "gluelogic_rcosc_clk_1p0v_97p65k",
+ "gluelogic_hfosc0_clkout",
+ "gluelogic_rcosc_clk_1p0v_97p65k",
+ "gluelogic_lfosc0_clkout",
+};
+
+static const char * const main_emmcsd1_io_clklb_sel_out0_parents[] = {
+ "board_0_mmc1_clklb_out",
+ "board_0_mmc1_clk_out",
+};
+
+static const char * const main_ospi_loopback_clk_sel_out0_parents[] = {
+ "board_0_ospi0_dqs_out",
+ "board_0_ospi0_lbclko_out",
+};
+
+static const char * const main_usb0_refclk_sel_out0_parents[] = {
+ "gluelogic_hfosc0_clkout",
+ "postdiv4_16ff_main_0_hsdivout8_clk",
+};
+
+static const char * const main_usb1_refclk_sel_out0_parents[] = {
+ "gluelogic_hfosc0_clkout",
+ "postdiv4_16ff_main_0_hsdivout8_clk",
+};
+
+static const char * const sam62_pll_ctrl_wrap_main_0_sysclkout_clk_parents[] =
{
+ "gluelogic_hfosc0_clkout",
+ "hsdiv4_16fft_main_0_hsdivout0_clk",
+};
+
+static const char * const sam62_pll_ctrl_wrap_mcu_0_sysclkout_clk_parents[] = {
+ "gluelogic_hfosc0_clkout",
+ "hsdiv4_16fft_mcu_0_hsdivout0_clk",
+};
+
+static const char * const clkout0_ctrl_out0_parents[] = {
+ "hsdiv4_16fft_main_2_hsdivout1_clk",
+ "hsdiv4_16fft_main_2_hsdivout1_clk",
+};
+
+static const char * const main_emmcsd0_refclk_sel_out0_parents[] = {
+ "postdiv4_16ff_main_0_hsdivout5_clk",
+ "hsdiv4_16fft_main_2_hsdivout2_clk",
+};
+
+static const char * const main_emmcsd1_refclk_sel_out0_parents[] = {
+ "postdiv4_16ff_main_0_hsdivout5_clk",
+ "hsdiv4_16fft_main_2_hsdivout2_clk",
+};
+
+static const char * const main_gtcclk_sel_out0_parents[] = {
+ "postdiv4_16ff_main_2_hsdivout5_clk",
+ "postdiv4_16ff_main_0_hsdivout6_clk",
+ "board_0_cp_gemac_cpts0_rft_clk_out",
+ NULL,
+ "board_0_mcu_ext_refclk0_out",
+ "board_0_ext_refclk1_out",
+ "sam62_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk",
+ "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk",
+};
+
+static const char * const main_ospi_ref_clk_sel_out0_parents[] = {
+ "hsdiv4_16fft_main_0_hsdivout1_clk",
+ "postdiv1_16fft_main_1_hsdivout5_clk",
+};
+
+static const char * const main_timerclkn_sel_out0_parents[] = {
+ "gluelogic_hfosc0_clkout",
+ "clk_32k_rc_sel_out0",
+ "postdiv4_16ff_main_0_hsdivout7_clk&qu
[PATCH v4 08/13] firmware: ti_sci_static_data: add static DMA channel data
From: Hari Nagalla
Include the static DMA channel data for ti_sci
Signed-off-by: Hari Nagalla
Signed-off-by: Bryan Brattlof
---
drivers/firmware/ti_sci_static_data.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/firmware/ti_sci_static_data.h
b/drivers/firmware/ti_sci_static_data.h
index 789f0c6b2d903..9662bd95f2835 100644
--- a/drivers/firmware/ti_sci_static_data.h
+++ b/drivers/firmware/ti_sci_static_data.h
@@ -84,7 +84,8 @@ static struct ti_sci_resource_static_data rm_static_data[] = {
};
#endif /* CONFIG_SOC_K3_J721S2 */
-#if IS_ENABLED(CONFIG_SOC_K3_AM625) || IS_ENABLED(CONFIG_SOC_K3_AM62A7)
+#if IS_ENABLED(CONFIG_SOC_K3_AM625) || IS_ENABLED(CONFIG_SOC_K3_AM62A7) || \
+ IS_ENABLED(CONFIG_SOC_K3_AM62P5)
static struct ti_sci_resource_static_data rm_static_data[] = {
/* BC channels */
{
@@ -95,7 +96,7 @@ static struct ti_sci_resource_static_data rm_static_data[] = {
},
{ },
};
-#endif /* CONFIG_SOC_K3_AM625 || CONFIG_SOC_K3_AM62A7 */
+#endif /* CONFIG_SOC_K3_AM625 || CONFIG_SOC_K3_AM62A7 || CONFIG_SOC_K3_AM62P5
*/
#if IS_ENABLED(CONFIG_SOC_K3_J784S4)
static struct ti_sci_resource_static_data rm_static_data[] = {
--
2.43.2
[PATCH v4 13/13] arm: mach-k3: fixup whitespace in SPDX License IDs
The SPDX ID format usese a single space used after the 'SPDX-License-Identifier:'. Fix all files that use any other white-space character other than a single space. Signed-off-by: Bryan Brattlof --- arch/arm/mach-k3/r5/am62ax/Makefile | 2 +- arch/arm/mach-k3/r5/am62px/Makefile | 2 +- arch/arm/mach-k3/r5/am62x/Makefile | 2 +- arch/arm/mach-k3/r5/j7200/Makefile | 2 +- arch/arm/mach-k3/r5/j721e/Makefile | 2 +- arch/arm/mach-k3/r5/j721s2/Makefile | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-k3/r5/am62ax/Makefile b/arch/arm/mach-k3/r5/am62ax/Makefile index e4e55ce5c7dd2..313ce5a05fdc0 100644 --- a/arch/arm/mach-k3/r5/am62ax/Makefile +++ b/arch/arm/mach-k3/r5/am62ax/Makefile @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0+ +# SPDX-License-Identifier: GPL-2.0+ # # Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ diff --git a/arch/arm/mach-k3/r5/am62px/Makefile b/arch/arm/mach-k3/r5/am62px/Makefile index 50b0df20a3d1a..091d4fa5b4512 100644 --- a/arch/arm/mach-k3/r5/am62px/Makefile +++ b/arch/arm/mach-k3/r5/am62px/Makefile @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0+ +# SPDX-License-Identifier: GPL-2.0+ # # Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/ diff --git a/arch/arm/mach-k3/r5/am62x/Makefile b/arch/arm/mach-k3/r5/am62x/Makefile index d6c876df66dde..9ab0100ee174a 100644 --- a/arch/arm/mach-k3/r5/am62x/Makefile +++ b/arch/arm/mach-k3/r5/am62x/Makefile @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0+ +# SPDX-License-Identifier: GPL-2.0+ # # Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ diff --git a/arch/arm/mach-k3/r5/j7200/Makefile b/arch/arm/mach-k3/r5/j7200/Makefile index 0f91cf4daea41..78325db402c56 100644 --- a/arch/arm/mach-k3/r5/j7200/Makefile +++ b/arch/arm/mach-k3/r5/j7200/Makefile @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0+ +# SPDX-License-Identifier: GPL-2.0+ # # Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ obj-y += clk-data.o diff --git a/arch/arm/mach-k3/r5/j721e/Makefile b/arch/arm/mach-k3/r5/j721e/Makefile index 0f91cf4daea41..78325db402c56 100644 --- a/arch/arm/mach-k3/r5/j721e/Makefile +++ b/arch/arm/mach-k3/r5/j721e/Makefile @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0+ +# SPDX-License-Identifier: GPL-2.0+ # # Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ obj-y += clk-data.o diff --git a/arch/arm/mach-k3/r5/j721s2/Makefile b/arch/arm/mach-k3/r5/j721s2/Makefile index e794bffb3afa9..8588c5e4c39c6 100644 --- a/arch/arm/mach-k3/r5/j721s2/Makefile +++ b/arch/arm/mach-k3/r5/j721s2/Makefile @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0+ +# SPDX-License-Identifier: GPL-2.0+ # # Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ obj-y += clk-data.o -- 2.43.2
[PATCH v4 04/13] ram: k3-ddrss: enable the am62ax's DDR controller for am62px
The am62px family of SoCs uses the same DDR controller as found on the am62ax family. Enable this option when building for the am62px family Reviewed-by: Neha Malcom Francis Signed-off-by: Bryan Brattlof --- drivers/ram/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig index 8e9e53cbb0e1f..9838a2798f922 100644 --- a/drivers/ram/Kconfig +++ b/drivers/ram/Kconfig @@ -65,7 +65,7 @@ choice default K3_J721E_DDRSS if SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_J784S4 default K3_AM64_DDRSS if SOC_K3_AM642 default K3_AM64_DDRSS if SOC_K3_AM625 - default K3_AM62A_DDRSS if SOC_K3_AM62A7 + default K3_AM62A_DDRSS if SOC_K3_AM62A7 || SOC_K3_AM62P5 config K3_J721E_DDRSS bool "Enable J721E DDRSS support" -- 2.43.2
[PATCH v4 07/13] board: ti: introduce basic board files for the am62px family
Introduce the basic files needed to support the am62px family of SoCs
Co-developed-by: Hari Nagalla
Signed-off-by: Hari Nagalla
Reviewed-by: Tom Rini
Signed-off-by: Bryan Brattlof
---
board/ti/am62px/Kconfig | 26 ++
board/ti/am62px/MAINTAINERS | 9 +
board/ti/am62px/Makefile | 7 +
board/ti/am62px/am62px.env | 15 +
board/ti/am62px/board-cfg.yaml | 37 ++
board/ti/am62px/evm.c| 29 ++
board/ti/am62px/pm-cfg.yaml | 12 +
board/ti/am62px/rm-cfg.yaml | 987 +++
board/ti/am62px/sec-cfg.yaml | 378 +++
board/ti/am62px/tifs-rm-cfg.yaml | 879 ++
10 files changed, 2379 insertions(+)
diff --git a/board/ti/am62px/Kconfig b/board/ti/am62px/Kconfig
new file mode 100644
index 0..9d95ffd9b2908
--- /dev/null
+++ b/board/ti/am62px/Kconfig
@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+
+if TARGET_AM62P5_R5_EVM || TARGET_AM62P5_A53_EVM
+
+config SYS_BOARD
+ default "am62px"
+
+config SYS_VENDOR
+ default "ti"
+
+config SYS_CONFIG_NAME
+ default "am62px_evm"
+
+source "board/ti/common/Kconfig"
+
+endif
+
+if TARGET_AM62P5_R5_EVM
+
+config SPL_LDSCRIPT
+ default "arch/arm/mach-omap2/u-boot-spl.lds"
+
+endif
diff --git a/board/ti/am62px/MAINTAINERS b/board/ti/am62px/MAINTAINERS
new file mode 100644
index 0..57c86ddbc4aef
--- /dev/null
+++ b/board/ti/am62px/MAINTAINERS
@@ -0,0 +1,9 @@
+AM62Px BOARD
+M: Vignesh Raghavendra
+M: Bryan Brattlof
+M: Tom Rini
+S: Maintained
+F: board/ti/am62px/
+F: include/configs/am62p5_evm.h
+F: configs/am62px_evm_r5_defconfig
+F: configs/am62px_evm_a53_defconfig
diff --git a/board/ti/am62px/Makefile b/board/ti/am62px/Makefile
new file mode 100644
index 0..921afdff27a24
--- /dev/null
+++ b/board/ti/am62px/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += evm.o
diff --git a/board/ti/am62px/am62px.env b/board/ti/am62px/am62px.env
new file mode 100644
index 0..f8b6aff2c2fdf
--- /dev/null
+++ b/board/ti/am62px/am62px.env
@@ -0,0 +1,15 @@
+#include
+#include
+
+name_kern=Image
+console=ttyS2,115200n8
+args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x0280
+ ${mtdparts}
+run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}
+
+boot_targets=mmc1 mmc0 pxe dhcp
+boot=mmc
+mmcdev=1
+bootpart=1:2
+bootdir=/boot
+rd_spec=-
diff --git a/board/ti/am62px/board-cfg.yaml b/board/ti/am62px/board-cfg.yaml
new file mode 100644
index 0..d539011aff9f3
--- /dev/null
+++ b/board/ti/am62px/board-cfg.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for AM62Px SoCs
+#
+
+---
+
+board-cfg:
+rev:
+boardcfg_abi_maj: 0x0
+boardcfg_abi_min: 0x1
+control:
+subhdr:
+magic: 0xC1D3
+size: 7
+main_isolation_enable: 0x5A
+main_isolation_hostid: 0x2
+secproxy:
+subhdr:
+magic: 0x1207
+size: 7
+scaling_factor: 0x1
+scaling_profile: 0x1
+disable_main_nav_secure_proxy: 0
+msmc:
+subhdr:
+magic: 0xA5C3
+size: 5
+msmc_cache_size: 0x10
+debug_cfg:
+subhdr:
+magic: 0x020C
+size: 8
+trace_dst_enables: 0x00
+trace_src_enables: 0x00
diff --git a/board/ti/am62px/evm.c b/board/ti/am62px/evm.c
new file mode 100644
index 0..97a95ce8cc2d5
--- /dev/null
+++ b/board/ti/am62px/evm.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Board specific initialization for AM62Px platforms
+ *
+ * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ return fdtdec_setup_mem_size_base();
+}
+
+int dram_init_banksize(void)
+{
+ return fdtdec_setup_memory_banksize();
+}
diff --git a/board/ti/am62px/pm-cfg.yaml b/board/ti/am62px/pm-cfg.yaml
new file mode 100644
index 0..3ff27ce702c26
--- /dev/null
+++ b/board/ti/am62px/pm-cfg.yaml
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Power management configuration for AM62Px
+#
+#
+---
+pm-cfg:
+rev:
+boardcfg_abi_maj: 0x0
+boardcfg_abi_min: 0x1
diff --git a/board/ti/am62px/rm-cfg.yaml b/board/ti/am62px/rm-cfg.yaml
new file mode 100644
index 0..caa2f7a5a83e1
--- /dev/null
+++ b/board/ti/am62px/rm-cfg.yaml
@@
[PATCH v4 00/13] Introduce basic support for TI's AM62Px SoC family
Hello Again Everyone! The AM62Px is an extension of the existing Sitara AM62x low-cost family of application processors built for Automotive and Linux Application development. Scalable Arm Cortex-A53 performance and embedded features, such as: multi high-definition display support, 3D-graphics acceleration, 4K video acceleration, and extensive peripherals make the AM62Px well-suited for a broad range of automation and industrial application, including automotive digital instrumentation, automotive displays, industrial HMI, and more. Some highlights of AM62P SoC are: * Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster. Dual/Single core variants are provided in the same package to allow HW compatible designs. * One Device manager Cortex-R5F for system power and resource management, and one Cortex-R5F for Functional Safety or general-purpose usage. * One 3D GPU up to 50 GLFOPS * H.264/H.265 Video Encode/Decode. * Display support: 3x display support over OLDI/LVDS (1x OLDI-DL, 1x or 2x OLDI-SL), DSI, or DPI. Up to 3840x1080 @ 60fps resolution * Integrated Giga-bit Ethernet switch supporting up to a total of two external ports (TSN capable). * 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3xMMC and SD, GPMC for NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio, 1xCSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals. * Dedicated Centralized Hardware Security Module with support for secure boot, debug security and crypto acceleration and trusted execution environment. * One 32-bit DDR Subsystem that supports LPDDR4, DDR4 memory types. * Multiple low power modes support, ex: Deep sleep, Standby, MCU-only, enabling battery powered system design. For those interested, more details about this SoC can be found in the Technical Reference Manual here: https://www.ti.com/lit/pdf/spruj83 Proof-of-Life: https://paste.sr.ht/~bryanb/af2ac108a9362549aa326f182e87918d52bf2d71 Thanks for reviewing! ~Bryan Changes from v3: [2] - rebased on current -next - moved remove_fwl_configs() inside the 'has rom loaded the sysfw' check to avoid removing the firewalls when the A53 SPL is executed. - added the TFA address for the AM62Px to the ATF_LOAD_ADDR Kconfig - fixed formatting issues with clk and dev auto-generated files Changes from v2: [1] - dropped the extra ARCH_K3 not needed for the K3_DM_FW option - removed the extra &main_pktdma and &main_bcdma nodes already present in the kernel dtbs - corrected a few patch fixup errors - rebased ontop op OF_UPSTREAM v5 [0] - %s/uboot/U-Boot/g Changes from v1: [0] - squashed all clk and lpsc tree updates into a single commit - corrected SOC_K3_AM642 typo with DM firmware Kconfig option - updated RM configs and dma nodes to enable IP that need DMA - added the dtb targets to the dts/Makefile - rebased the series on top of v2024.01-rc1 - switched to bootstd rather than use distro boot scripts. - enabled OF_UPSTREAM instead of using the arch/arm/dts directory [0] https://lore.kernel.org/all/20231012230616.2101992-13...@ti.com/ [1] https://lore.kernel.org/u-boot/20240201030634.1120963-17...@ti.com/ [2] https://lore.kernel.org/u-boot/20240205-am62px-wip-rebasing-v3-0-04cbb42ea...@ti.com/ --- Bryan Brattlof (11): soc: add info to identify the am62p SoC family power: domain: ti: use IS_ENABLED macro arm: mach-k3: am62px: introduce clock and device files for wkup spl ram: k3-ddrss: enable the am62ax's DDR controller for am62px arm: mach-k3: invert logic for split DM firmware config arch: mach-k3: introduce basic files to support the am62px SoC family board: ti: introduce basic board files for the am62px family arm: dts: introduce am62p5 U-Boot dts files configs: introduce configs needed for the am62px doc: board: ti: introduce am62px documentation arm: mach-k3: fixup whitespace in SPDX License IDs Hari Nagalla (1): firmware: ti_sci_static_data: add static DMA channel data Vignesh Raghavendra (1): dma: ti: k3-udma: Add DMA PSIL mappings for AM62P and J722S arch/arm/dts/Makefile |2 + arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi | 2800 arch/arm/dts/k3-am62p-sk-binman.dtsi | 173 ++ arch/arm/dts/k3-am62p5-r5-sk.dts | 101 + arch/arm/dts/k3-am62p5-sk-u-boot.dtsi | 23 + arch/arm/mach-k3/Kconfig |9 +- arch/arm/mach-k3/Makefile |1 + arch/arm/mach-k3/am62p5_init.c | 281 +++ arch/arm/mach-k3/am62px/Kconfig| 32 + arch/arm/mach-k3/include/mach/am62p_hardware.h | 83 + arch/arm/mach-k3/include/mach/am62p_spl.h | 49 + arch/arm/mach-k3/include/mach/hardware.h |6 + arch/arm/mach-k3/include/mach/spl.h|4 + arch/arm/mach-k3/r5/Makefile |1 + arch/arm/mach-k3/r5/am62ax/Makefile
[PATCH v4 12/13] doc: board: ti: introduce am62px documentation
Introduce basic documentation for the am62p family of SoCs. Signed-off-by: Bryan Brattlof --- doc/board/ti/am62px_sk.rst | 289 + doc/board/ti/k3.rst| 1 + 2 files changed, 290 insertions(+) diff --git a/doc/board/ti/am62px_sk.rst b/doc/board/ti/am62px_sk.rst new file mode 100644 index 0..1f2982c36f9e4 --- /dev/null +++ b/doc/board/ti/am62px_sk.rst @@ -0,0 +1,289 @@ +.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +.. sectionauthor:: Bryan Brattlof + +AM62Px Platforms + + +The AM62Px is an extension of the existing Sitara AM62x low-cost family +of application processors built for Automotive and Linux Application +development. Scalable Arm Cortex-A53 performance and embedded features, +such as: multi high-definition display support, 3D-graphics +acceleration, 4K video acceleration, and extensive peripherals make the +AM62Px well-suited for a broad range of automation and industrial +application, including automotive digital instrumentation, automotive +displays, industrial HMI, and more. + +Some highlights of AM62P SoC are: + +* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster. + Dual/Single core variants are provided in the same package to allow HW + compatible designs. + +* One Device manager Cortex-R5F for system power and resource + management, and one Cortex-R5F for Functional Safety or + general-purpose usage. + +* One 3D GPU up to 50 GLFOPS + +* H.264/H.265 Video Encode/Decode. + +* Display support: 3x display support over OLDI/LVDS (1x OLDI-DL, 1x or + 2x OLDI-SL), DSI, or DPI. Up to 3840x1080 @ 60fps resolution + +* Integrated Giga-bit Ethernet switch supporting up to a total of two + external ports (TSN capable). + +* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3xMMC and SD, GPMC for + NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio, + 1xCSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals. + +* Dedicated Centralized Hardware Security Module with support for secure + boot, debug security and crypto acceleration and trusted execution + environment. + +* One 32-bit DDR Subsystem that supports LPDDR4, DDR4 memory types. + +* Multiple low power modes support, ex: Deep sleep, Standby, MCU-only, + enabling battery powered system design. + +For those interested, more details about this SoC can be found in the +Technical Reference Manual here: https://www.ti.com/lit/pdf/spruj83 + +Boot Flow: +-- + +The bootflow is exactly the same as all SoCs in the am62xxx extended SoC +family. Below is the pictorial representation: + +.. image:: img/boot_diagram_k3_current.svg + :alt: Boot flow diagram + +- Here TIFS acts as master and provides all the critical services. R5/A53 + requests TIFS to get these services done as shown in the above diagram. + +Sources: + + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_boot_sources +:end-before: .. k3_rst_include_end_boot_sources + +Build procedure: + + +0. Setup the environment variables: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_common_env_vars_desc +:end-before: .. k3_rst_include_end_common_env_vars_desc + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_board_env_vars_desc +:end-before: .. k3_rst_include_end_board_env_vars_desc + +Set the variables corresponding to this platform: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_common_env_vars_defn +:end-before: .. k3_rst_include_end_common_env_vars_defn + +.. code-block:: bash + + $ export UBOOT_CFG_CORTEXR=am62px_evm_r5_defconfig + $ export UBOOT_CFG_CORTEXA=am62px_evm_a53_defconfig + $ export TFA_BOARD=lite + $ # we dont use any extra TFA parameters + $ unset TFA_EXTRA_ARGS + $ export OPTEE_PLATFORM=k3-am62x + $ export OPTEE_EXTRA_ARGS="CFG_WITH_SOFTWARE_PRNG=y" + +.. am62px_evm_rst_include_start_build_steps + +1. Trusted Firmware-A: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_build_steps_tfa +:end-before: .. k3_rst_include_end_build_steps_tfa + + +2. OP-TEE: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_build_steps_optee +:end-before: .. k3_rst_include_end_build_steps_optee + +3. U-Boot: + +* 3.1 R5: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_build_steps_spl_r5 +:end-before: .. k3_rst_include_end_build_steps_spl_r5 + +* 3.2 A53: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_build_steps_uboot +:end-before: .. k3_rst_include_end_build_steps_uboot +.. am62px_evm_rst_include_end_build_steps + +Target Images +-- + +In order to boot we need tiboot3.bin, tispl.bin and u-boot.img. Each SoC +variant (HS-FS, HS-SE) requires a different source for these files. + + - HS-FS + +* tiboot3-am62px-hs-fs-evm.bin from step 3.1 +* tispl.bin, u-boot.img from step 3.2 + + - HS-SE + +
[PATCH v4 09/13] dma: ti: k3-udma: Add DMA PSIL mappings for AM62P and J722S
From: Vignesh Raghavendra
Add PSIL data for the AM62P and the J722S SoC family. The PSIL mapping
for the J722S is the same except for the extra instances of the CSI-RX.
So let's reuse the same file for both the AM62P and J722S.
Signed-off-by: Vignesh Raghavendra
Signed-off-by: Ravi Gunasekaran
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
[b...@ti.com: rebased to U-Boot v2024.01]
Signed-off-by: Bryan Brattlof
---
drivers/dma/ti/Makefile| 2 +
drivers/dma/ti/k3-psil-am62p.c | 325 +
drivers/dma/ti/k3-psil-priv.h | 1 +
drivers/dma/ti/k3-psil.c | 4 +
4 files changed, 332 insertions(+)
diff --git a/drivers/dma/ti/Makefile b/drivers/dma/ti/Makefile
index 9e0b13e8c0215..94ec13ba7ca44 100644
--- a/drivers/dma/ti/Makefile
+++ b/drivers/dma/ti/Makefile
@@ -10,3 +10,5 @@ k3-psil-data-$(CONFIG_SOC_K3_AM642) += k3-psil-am64.o
k3-psil-data-$(CONFIG_SOC_K3_AM625) += k3-psil-am62.o
k3-psil-data-$(CONFIG_SOC_K3_AM62A7) += k3-psil-am62a.o
k3-psil-data-$(CONFIG_SOC_K3_J784S4) += k3-psil-j784s4.o
+k3-psil-data-$(CONFIG_SOC_K3_AM62P5) += k3-psil-am62p.o
+k3-psil-data-$(CONFIG_SOC_K3_J722S) += k3-psil-am62p.o
diff --git a/drivers/dma/ti/k3-psil-am62p.c b/drivers/dma/ti/k3-psil-am62p.c
new file mode 100644
index 0..8739bf41b5b7c
--- /dev/null
+++ b/drivers/dma/ti/k3-psil-am62p.c
@@ -0,0 +1,325 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com
+ */
+
+#include
+
+#include "k3-psil-priv.h"
+
+#define PSIL_PDMA_XY_TR(x) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_PDMA_XY, \
+ .mapped_channel_id = -1,\
+ .default_flow_id = -1, \
+ }, \
+ }
+
+#define PSIL_PDMA_XY_PKT(x)\
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_PDMA_XY, \
+ .mapped_channel_id = -1,\
+ .default_flow_id = -1, \
+ .pkt_mode = 1, \
+ }, \
+ }
+
+#define PSIL_ETHERNET(x, ch, flow_base, flow_cnt) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_NATIVE, \
+ .pkt_mode = 1, \
+ .needs_epib = 1,\
+ .psd_size = 16, \
+ .mapped_channel_id = ch,\
+ .flow_start = flow_base,\
+ .flow_num = flow_cnt, \
+ .default_flow_id = flow_base, \
+ }, \
+ }
+
+#define PSIL_SAUL(x, ch, flow_base, flow_cnt, default_flow, tx)\
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_NATIVE, \
+ .pkt_mode = 1, \
+ .needs_epib = 1,\
+ .psd_size = 64, \
+ .mapped_channel_id = ch,\
+ .flow_start = flow_base,\
+ .flow_num = flow_cnt, \
+ .default_flow_id = default_flow,\
+ .notdpkt = tx, \
+ }, \
+ }
+
+#define PSIL_PDMA_MCASP(x) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_PDMA_XY, \
+ .pdma_acc32 = 1,\
+
[PATCH v4 06/13] arch: mach-k3: introduce basic files to support the am62px SoC family
Introduce the basic functions and definitions needed to properly
initialize TI's am62p family of SoCs
Signed-off-by: Bryan Brattlof
---
arch/arm/mach-k3/Kconfig | 7 +-
arch/arm/mach-k3/Makefile | 1 +
arch/arm/mach-k3/am62p5_init.c | 281 +
arch/arm/mach-k3/am62px/Kconfig| 32 +++
arch/arm/mach-k3/include/mach/am62p_hardware.h | 83
arch/arm/mach-k3/include/mach/am62p_spl.h | 49 +
arch/arm/mach-k3/include/mach/hardware.h | 4 +
arch/arm/mach-k3/include/mach/spl.h| 4 +
8 files changed, 460 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index 6a937ff96d208..2bb970c2d4c9b 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -10,6 +10,9 @@ config SOC_K3_AM625
config SOC_K3_AM62A7
bool "TI's K3 based AM62A7 SoC Family Support"
+config SOC_K3_AM62P5
+ bool "TI's K3 based AM62P5 SoC Family Support"
+
config SOC_K3_AM642
bool "TI's K3 based AM642 SoC Family Support"
@@ -80,6 +83,7 @@ config SYS_K3_BOOT_PARAM_TABLE_INDEX
default 0x43c3f290 if SOC_K3_AM625
default 0x43c3f290 if SOC_K3_AM62A7 && CPU_V7R
default 0x7000f290 if SOC_K3_AM62A7 && ARM64
+ default 0x43c4f290 if SOC_K3_AM62P5
help
Address at which ROM stores the value which determines if SPL
is booted up by primary boot media or secondary boot media.
@@ -118,7 +122,7 @@ config K3_EARLY_CONS_IDX
config K3_ATF_LOAD_ADDR
hex "Load address of ATF image"
- default 0x8000 if (SOC_K3_AM625 || SOC_K3_AM62A7)
+ default 0x8000 if (SOC_K3_AM625 || SOC_K3_AM62A7 || SOC_K3_AM62P5)
default 0x7000
help
The load address for the ATF image. This value is used to build the
@@ -156,6 +160,7 @@ source "arch/arm/mach-k3/am65x/Kconfig"
source "arch/arm/mach-k3/am64x/Kconfig"
source "arch/arm/mach-k3/am62x/Kconfig"
source "arch/arm/mach-k3/am62ax/Kconfig"
+source "arch/arm/mach-k3/am62px/Kconfig"
source "arch/arm/mach-k3/j721e/Kconfig"
source "arch/arm/mach-k3/j721s2/Kconfig"
source "arch/arm/mach-k3/j784s4/Kconfig"
diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile
index 310a4c211404b..6ee9864c72cad 100644
--- a/arch/arm/mach-k3/Makefile
+++ b/arch/arm/mach-k3/Makefile
@@ -22,5 +22,6 @@ obj-$(CONFIG_SOC_K3_AM642) += am642_init.o
obj-$(CONFIG_SOC_K3_AM625) += am625_init.o
obj-$(CONFIG_SOC_K3_AM62A7) += am62a7_init.o
obj-$(CONFIG_SOC_K3_J784S4) += j784s4_init.o
+obj-$(CONFIG_SOC_K3_AM62P5) += am62p5_init.o
endif
obj-y += common.o security.o
diff --git a/arch/arm/mach-k3/am62p5_init.c b/arch/arm/mach-k3/am62p5_init.c
new file mode 100644
index 0..aab99aa0c958f
--- /dev/null
+++ b/arch/arm/mach-k3/am62p5_init.c
@@ -0,0 +1,281 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * AM62P5: SoC specific initialization
+ *
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#include
+#include
+#include
+#include "sysfw-loader.h"
+#include "common.h"
+#include
+#include
+#include
+
+struct fwl_data cbass_main_fwls[] = {
+ { "FSS_DAT_REG3", 7, 8 },
+};
+
+/*
+ * This uninitialized global variable would normal end up in the .bss section,
+ * but the .bss is cleared between writing and reading this variable, so move
+ * it to the .data section.
+ */
+u32 bootindex __section(".data");
+static struct rom_extended_boot_data bootdata __section(".data");
+
+static void store_boot_info_from_rom(void)
+{
+ bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
+ memcpy(&bootdata, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
+ sizeof(struct rom_extended_boot_data));
+}
+
+static void ctrl_mmr_unlock(void)
+{
+ /* Unlock all WKUP_CTRL_MMR0 module registers */
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 0);
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 1);
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 2);
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 3);
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 4);
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 5);
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 6);
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 7);
+
+ /* Unlock all CTRL_MMR0 module registers */
+ mmr_unlock(CTRL_MMR0_BASE, 0);
+ mmr_unlock(CTRL_MMR0_BASE, 1);
+ mmr_unlock(CTRL_MMR0_BASE, 2);
+ mmr_unlock(CTRL_MMR0_BASE, 4);
+ mmr_unlock(CTRL_MMR0_BASE, 5);
+ mmr_unlock(CTRL_MMR0_BASE, 6);
+
+ /* Unlock all MCU_CTRL_MMR0 module registers */
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 0);
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 1);
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 2);
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 3);
+ mmr_
[PATCH v4 01/13] soc: add info to identify the am62p SoC family
Include the part number for TI's am62px family of SoCs so we can properly identify it during boot Reviewed-by: Igor Opaniuk Reviewed-by: Neha Malcom Francis Signed-off-by: Bryan Brattlof --- arch/arm/mach-k3/include/mach/hardware.h | 2 ++ drivers/soc/soc_ti_k3.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/arch/arm/mach-k3/include/mach/hardware.h b/arch/arm/mach-k3/include/mach/hardware.h index 055715f20d6f2..224367d9f1adc 100644 --- a/arch/arm/mach-k3/include/mach/hardware.h +++ b/arch/arm/mach-k3/include/mach/hardware.h @@ -43,6 +43,7 @@ #define JTAG_ID_PARTNO_SHIFT 12 #define JTAG_ID_PARTNO_MASK(0x << 12) #define JTAG_ID_PARTNO_AM62AX 0xbb8d +#define JTAG_ID_PARTNO_AM62PX 0xbb9d #define JTAG_ID_PARTNO_AM62X 0xbb7e #define JTAG_ID_PARTNO_AM64X 0xbb38 #define JTAG_ID_PARTNO_AM65X 0xbb5a @@ -65,6 +66,7 @@ K3_SOC_ID(am64x, AM64X) K3_SOC_ID(j721s2, J721S2) K3_SOC_ID(am62x, AM62X) K3_SOC_ID(am62ax, AM62AX) +K3_SOC_ID(am62px, AM62PX) #define K3_SEC_MGR_SYS_STATUS 0x44234100 #define SYS_STATUS_DEV_TYPE_SHIFT 0 diff --git a/drivers/soc/soc_ti_k3.c b/drivers/soc/soc_ti_k3.c index d176980915605..3a4e58bba6715 100644 --- a/drivers/soc/soc_ti_k3.c +++ b/drivers/soc/soc_ti_k3.c @@ -48,6 +48,9 @@ static const char *get_family_string(u32 idreg) case JTAG_ID_PARTNO_J784S4: family = "J784S4"; break; + case JTAG_ID_PARTNO_AM62PX: + family = "AM62PX"; + break; default: family = "Unknown Silicon"; }; -- 2.43.2
[PATCH v4 05/13] arm: mach-k3: invert logic for split DM firmware config
Currently, for the K3 generation of SoCs, there are more SoCs that utilize the split firmware approach than the combined DMSC firmware. Invert the logic to avoid adding more and more SoCs to this list. Reviewed-by: Neha Malcom Francis Acked-by: Andrew Davis Signed-off-by: Bryan Brattlof --- arch/arm/mach-k3/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig index fc971d517ab16..6a937ff96d208 100644 --- a/arch/arm/mach-k3/Kconfig +++ b/arch/arm/mach-k3/Kconfig @@ -133,7 +133,7 @@ config K3_OPTEE_LOAD_ADDR config K3_DM_FW bool "Separate DM firmware image" - depends on CPU_V7R && (SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_AM625 || SOC_K3_AM62A7 || SOC_K3_J784S4) && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN + depends on CPU_V7R && !SOC_K3_AM642 && !SOC_K3_AM654 && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN default y help Enabling this will indicate that the system has separate DM -- 2.43.2
[PATCH v4 11/13] configs: introduce configs needed for the am62px
Introduce the initial configs needed to support the am62px SoC family Signed-off-by: Bryan Brattlof --- configs/am62px_evm_a53_defconfig | 177 +++ configs/am62px_evm_r5_defconfig | 137 ++ include/configs/am62px_evm.h | 14 3 files changed, 328 insertions(+) diff --git a/configs/am62px_evm_a53_defconfig b/configs/am62px_evm_a53_defconfig new file mode 100644 index 0..2621abb8ce18a --- /dev/null +++ b/configs/am62px_evm_a53_defconfig @@ -0,0 +1,177 @@ +CONFIG_ARM=y +CONFIG_ARCH_K3=y +CONFIG_TI_SECURE_DEVICE=y +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_SOC_K3_AM62P5=y +CONFIG_TARGET_AM62P5_A53_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8048 +CONFIG_SF_DEFAULT_SPEED=2500 +CONFIG_ENV_SIZE=0x4 +CONFIG_DM_GPIO=y +CONFIG_SPL_DM_SPI=y +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am62p5-sk" +CONFIG_SPL_TEXT_BASE=0x8008 +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_DM_RESET=y +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK_R_ADDR=0x8200 +CONFIG_SPL_FS_FAT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x8100 +CONFIG_BOOTSTD_FULL=y +CONFIG_BOOTSTD_DEFAULTS=y +CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb" +CONFIG_SPL_MAX_SIZE=0x58000 +CONFIG_SPL_PAD_TO=0x0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a0 +CONFIG_SPL_BSS_MAX_SIZE=0x8 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_STACK_R=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 +CONFIG_SPL_DMA=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" +CONFIG_SPL_I2C=y +CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_DM_SPI_FLASH=y +CONFIG_SPL_POWER_DOMAIN=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +# CONFIG_SPL_SPI_FLASH_TINY is not set +CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x28 +CONFIG_SPL_THERMAL=y +CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=64 +CONFIG_CMD_CLK=y +CONFIG_CMD_DFU=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_REMOTEPROC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_MTDPARTS=y +CONFIG_CMD_UBI=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_MULTI_DTB_FIT=y +CONFIG_SPL_MULTI_DTB_FIT=y +CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_DEVICE_REMOVE=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_OF_TRANSLATE=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_CLK_TI_SCI=y +CONFIG_DFU_MMC=y +CONFIG_DFU_MTD=y +CONFIG_DFU_RAM=y +CONFIG_DFU_SF=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x4 +CONFIG_SYS_DFU_MAX_FILE_SIZE=0x80 +CONFIG_DMA_CHANNELS=y +CONFIG_TI_K3_NAVSS_UDMA=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0xC000 +CONFIG_FASTBOOT_BUF_SIZE=0x2F00 +CONFIG_TI_SCI_PROTOCOL=y +CONFIG_SPL_DM_GPIO_LOOKUP_LABEL=y +CONFIG_DA8XX_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_SPL_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_OMAP24XX=y +CONFIG_DM_MAILBOX=y +CONFIG_K3_SEC_PROXY=y +CONFIG_I2C_EEPROM=y +CONFIG_SPL_I2C_EEPROM=y +CONFIG_FS_LOADER=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_SPL_MMC_IO_VOLTAGE=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_SPL_MMC_HS400_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ADMA=y +CONFIG_SPL_MMC_SDHCI_ADMA=y +CONFIG_MMC_SDHCI_AM654=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_SPI_NAND=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_SOFT_RESET=y +CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_S28HX_T=y +CONFIG_PHY_TI_DP83867=y +CONFIG_TI_AM65_CPSW_NUSS=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_SINGLE=y +CONFIG_POWER_DOMAIN=y +CONFIG_TI_SCI_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_SPL_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_SPL_DM_REGULATOR_GPIO=y +CONFIG_K3_SYSTEM_CONTROLLER=y +CONFIG_REMOTEPROC_TI_K3_ARM64=y +CONFIG_REMOTEPROC_TI_K3_DSP=y +CONFIG_REMOTEPROC_TI_K3_R5F=y +CONFIG_RESET_TI_SCI=y +CONFIG_DM_SERIAL=y +CONFIG_SOC_DEVICE=y +CONFIG_SOC_DEVICE_TI_K3=y +CONFIG_SOC_TI=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_CADENCE_QSPI=y +CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y +CONFIG_SYSRESET_TI_SCI=y +CONFIG_DM_THERMAL=y +CONFIG_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_SPL_DM_USB_GADGET=y +CONFIG_SPL_USB_HOST=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_SPL_USB_DWC3_GENER
[PATCH v4 02/13] power: domain: ti: use IS_ENABLED macro
Cleanup this list and standardize on using the IS_ENABLED macro for the
power domain data list.
Reviewed-by: Igor Opaniuk
Signed-off-by: Bryan Brattlof
---
drivers/power/domain/ti-power-domain.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/power/domain/ti-power-domain.c
b/drivers/power/domain/ti-power-domain.c
index fb4ca2dd6b45f..8fa9892c02c7a 100644
--- a/drivers/power/domain/ti-power-domain.c
+++ b/drivers/power/domain/ti-power-domain.c
@@ -81,19 +81,20 @@ static const struct soc_attr ti_k3_soc_pd_data[] = {
.family = "J7200",
.data = &j7200_pd_platdata,
},
-#elif CONFIG_SOC_K3_J721S2
+#endif
+#if IS_ENABLED(CONFIG_SOC_K3_J721S2)
{
.family = "J721S2",
.data = &j721s2_pd_platdata,
},
#endif
-#ifdef CONFIG_SOC_K3_AM625
+#if IS_ENABLED(CONFIG_SOC_K3_AM625)
{
.family = "AM62X",
.data = &am62x_pd_platdata,
},
#endif
-#ifdef CONFIG_SOC_K3_AM62A7
+#if IS_ENABLED(CONFIG_SOC_K3_AM62A7)
{
.family = "AM62AX",
.data = &am62ax_pd_platdata,
--
2.43.2
Re: [PATCH 4/6] arm: mach-k3: am62: Fixup TF-A/OP-TEE reserved-memory node in FDT
On March 6, 2024 thus sayeth Andrew Davis:
> On 3/6/24 7:35 AM, Bryan Brattlof wrote:
> > On February 14, 2024 thus sayeth Andrew Davis:
> > > The address we load TF-A and OP-TEE to is configurable by Kconfig
> > > CONFIG_K3_{ATF,OPTEE}_LOAD_ADDR, but the DT nodes reserving this memory
> > > are often statically defined. As these binaries are dynamically loadable,
> > > and in the case of OP-TEE may not even be loaded at all, hard-coding these
> > > addresses is not a hardware description, but rather a configuration.
> > >
> > > If the address that U-Boot loaded TF-A or OP-TEE does not match the
> > > address in hard-coded in DT, then fix that node address. This also handles
> > > the case when no reserved memory for these is provided by DT, which is
> > > more correct as explained above.
> > >
> > > Add this fixup function, and enable it for AM62.
> > >
> > > Signed-off-by: Andrew Davis
> >
> > Acked-by: Bryan Brattlof
> >
> > Does this mean we need to no-map these regions in the MMU as well? Right
> > now it's just statically defined. I was looking into trying to read the
> > reserved-memory{} node to see if we could dynamically build the MMU
> > config but that would have to happen after this step right?
> >
>
> Good question. So TF-A/OP-TEE are loaded by R5 SPL, which means by
> the time A53 SPL starts they are already in place and firewalled,
> which means yes we should no-map them in MMU to prevent some
> speculative fetch (A53 doesn't do that, but A72 on other K3 device
> might) or similar from causing a firewall exception.
>
> The fixup in this patch is done to the Linux DT file right before
> it is handed off to Linux, which as you point out happens after
> we setup the U-Boot MMU.
>
> This is more a problem in theory, but not really one in practice.
> I know, I don't like that answer either, but I can't think of a
> better solution outside of doing this fixup in R5 SPL to the
> U-Boot DTB also. (Which might work, but seems overkill)..
>
Ah that's a good point. Only the SoCs with A53s are using DRAM for TFA
so we should be good for now :)
Thanks Andrew
> Andrew
>
> > ~Bryan
Re: [PATCH 6/6] arm: mach-k3: Move DRAM address of ATF for AM62/AM62a
On February 14, 2024 thus sayeth Andrew Davis: > The current address of TF-A in DRAM is just below the 512MB address line. > This means if the DRAM in a system is 512MB then TF-A is right at the > end of memory which is often reused, for instance U-Boot relocates itself > here. If a system has less than 512MB then that system wouldn't work at > all as TF-A would fail to load. > > To avoid the issues above, move TF-A to the start of DRAM, which doesn't > change from system to system. > > As TF-A is position independent, this has no dependency on TF-A. We > also fixup DT as needed when TF-A address is moved, so this change also > has no dependency on Linux and is fully forward/backward compatible. > > Signed-off-by: Andrew Davis Acked-by: Bryan Brattlof Thanks for this! This will make adding SIP support much easier. ~Bryan > --- > arch/arm/mach-k3/Kconfig | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig > index 55bb874d9aa..33f20f61f83 100644 > --- a/arch/arm/mach-k3/Kconfig > +++ b/arch/arm/mach-k3/Kconfig > @@ -123,7 +123,7 @@ config SYS_K3_SPL_ATF > > config K3_ATF_LOAD_ADDR > hex "Load address of ATF image" > - default 0x9e78 if (SOC_K3_AM625 || SOC_K3_AM62A7) > + default 0x8000 if (SOC_K3_AM625 || SOC_K3_AM62A7) > default 0x7000 > help > The load address for the ATF image. This value is used to build the > -- > 2.39.2 >
Re: [PATCH 5/6] arm: mach-k3: am62a: Fixup TF-A/OP-TEE reserved-memory node in FDT
On February 14, 2024 thus sayeth Andrew Davis:
> The address we load TFA and OP-TEE to is configurable by
> CONFIG_K3_{ATF,OPTEE}_LOAD_ADDR, but the DT nodes reserving this memory
> are static. Fix that by updating this node when the loaded address
> does not match the address in DT.
>
> Signed-off-by: Andrew Davis
Acked-by: Bryan Brattlof
~Bryan
Re: [PATCH 4/6] arm: mach-k3: am62: Fixup TF-A/OP-TEE reserved-memory node in FDT
On February 14, 2024 thus sayeth Andrew Davis:
> The address we load TF-A and OP-TEE to is configurable by Kconfig
> CONFIG_K3_{ATF,OPTEE}_LOAD_ADDR, but the DT nodes reserving this memory
> are often statically defined. As these binaries are dynamically loadable,
> and in the case of OP-TEE may not even be loaded at all, hard-coding these
> addresses is not a hardware description, but rather a configuration.
>
> If the address that U-Boot loaded TF-A or OP-TEE does not match the
> address in hard-coded in DT, then fix that node address. This also handles
> the case when no reserved memory for these is provided by DT, which is
> more correct as explained above.
>
> Add this fixup function, and enable it for AM62.
>
> Signed-off-by: Andrew Davis
Acked-by: Bryan Brattlof
Does this mean we need to no-map these regions in the MMU as well? Right
now it's just statically defined. I was looking into trying to read the
reserved-memory{} node to see if we could dynamically build the MMU
config but that would have to happen after this step right?
~Bryan
Re: [PATCH 2/6] arm: mach-k3: Add config option for setting OP-TEE address
On February 14, 2024 thus sayeth Andrew Davis: > Much like we have for ATF, OP-TEE has a standard address that we load > it too and run it from. Add a Kconfig item for this to remove some > hard-coding and allow this address to be more easily changed. > > Signed-off-by: Andrew Davis Acked-by: Bryan Brattlof ~Bryan
Re: [PATCH 1/6] arm: mach-k3: Add default ATF location for AM62/AM62a
On February 14, 2024 thus sayeth Andrew Davis: > There is a default ATF load address that is used for devices that have > ATF running in SRAM. For AM62 and AM62a, ATF runs from DRAM. Instead > of having to override the address in every defconfig, make add a > default for these ATF in DRAM devices. > > Signed-off-by: Andrew Davis Acked-by: Bryan Brattlof > --- > arch/arm/mach-k3/Kconfig | 5 +++-- > configs/am62ax_evm_a53_defconfig | 1 - > configs/am62x_beagleplay_a53_defconfig | 1 - > configs/am62x_evm_a53_defconfig| 1 - > configs/phycore_am62x_a53_defconfig| 1 - > configs/verdin-am62_a53_defconfig | 1 - > 6 files changed, 3 insertions(+), 7 deletions(-) > > diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig > index 03898424c95..0bd3f9fa12d 100644 > --- a/arch/arm/mach-k3/Kconfig > +++ b/arch/arm/mach-k3/Kconfig > @@ -123,10 +123,11 @@ config SYS_K3_SPL_ATF > > config K3_ATF_LOAD_ADDR > hex "Load address of ATF image" > + default 0x9e78 if (SOC_K3_AM625 || SOC_K3_AM62A7) I went ahead an added this to the TODO for 62p's respin ~Bryan
Re: [PATCH 1/2] arm: mach-k3: am625: copy bootindex to OCRAM for main domain SPL
On March 5, 2024 thus sayeth Vignesh Raghavendra:
>
>
> On 05/03/24 01:57, Bryan Brattlof wrote:
> > Hey Vignesh!
> >
> > On March 4, 2024 thus sayeth Vignesh Raghavendra:
> >> Hi Wadim,
> >>
> >> On 26/02/24 19:00, Wadim Egorov wrote:
> >>> Texas Instruments has begun enabling security settings on the SoCs it
> >>> produces to instruct ROM and TIFS to begin protecting the Security
> >>> Management Subsystem (SMS) from other binaries we load into the chip by
> >>> default.
> >>>
> >>> One way ROM and TIFS do this is by enabling firewalls to protect the
> >>> OCSRAM and HSM RAM regions they're using during bootup.
> >>>
> >>> The HSM RAM the wakeup SPL is in is firewalled by TIFS to protect
> >>> itself from the main domain applications. This means the 'bootindex'
> >>> value in HSM RAM, left by ROM to indicate if we're using the primary
> >>> or secondary boot-method, must be moved to OCSRAM (that TIFS has open
> >>> for us) before we make the jump to the main domain so the main domain's
> >>> bootloaders can keep access to this information.
> >>>
> >>> Based on commit
> >>> b672e8581070 ("arm: mach-k3: copy bootindex to OCRAM for main domain
> >>> SPL")
> >>>
> >>
> >> FYI, this is mostly a problem in non SPL flow (TI prosperity SBL for
> >> example) where HSM RAM would be used by HSM firmware. This should be a
> >> issue in R5 SPL flow. Do you see any issues today? If so, whats the
> >> TIFS firmware being used?
> >>
> >>> Signed-off-by: Wadim Egorov
> >>> ---
> >>> arch/arm/mach-k3/Kconfig | 3 ++-
> >>> arch/arm/mach-k3/am625_init.c | 15 +--
> >>> arch/arm/mach-k3/include/mach/am62_hardware.h | 15 +++
> >>> 3 files changed, 30 insertions(+), 3 deletions(-)
> >>>
> >>> diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
> >>> index 03898424c9..f5d06593f7 100644
> >>> --- a/arch/arm/mach-k3/Kconfig
> >>> +++ b/arch/arm/mach-k3/Kconfig
> >>> @@ -75,7 +75,8 @@ config SYS_K3_BOOT_PARAM_TABLE_INDEX
> >>> default 0x41cffbfc if SOC_K3_J721E
> >>> default 0x41cfdbfc if SOC_K3_J721S2
> >>> default 0x701bebfc if SOC_K3_AM642
> >>> - default 0x43c3f290 if SOC_K3_AM625
> >>> + default 0x43c3f290 if SOC_K3_AM625 && CPU_V7R
> >>> + default 0x7000f290 if SOC_K3_AM625 && ARM64
> >>> default 0x43c3f290 if SOC_K3_AM62A7 && CPU_V7R
> >>> default 0x7000f290 if SOC_K3_AM62A7 && ARM64
> >>> help
> >>> diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c
> >>> index 6c96e88114..67cf63b103 100644
> >>> --- a/arch/arm/mach-k3/am625_init.c
> >>> +++ b/arch/arm/mach-k3/am625_init.c
> >>> @@ -35,8 +35,10 @@ static struct rom_extended_boot_data bootdata
> >>> __section(".data");
> >>> static void store_boot_info_from_rom(void)
> >>> {
> >>> bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
> >>> - memcpy(&bootdata, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
> >>> -sizeof(struct rom_extended_boot_data));
> >>> + if (IS_ENABLED(CONFIG_CPU_V7R)) {
> >>> + memcpy(&bootdata, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
> >>> +sizeof(struct rom_extended_boot_data));
> >>> + }
> >>> }
> >>>
> >>> static void ctrl_mmr_unlock(void)
> >>> @@ -175,6 +177,15 @@ void board_init_f(ulong dummy)
> >>> k3_sysfw_loader(true, NULL, NULL);
> >>> }
> >>>
> >>> +#if defined(CONFIG_CPU_V7R)
> >>> + /*
> >>> + * Relocate boot information to OCRAM (after TIFS has opend this
> >>> + * region for us) so the next bootloader stages can keep access to
> >>> + * primary vs backup bootmodes.
> >>> + */
> >>> + writel(bootindex, K3_BOOT_PARAM_TABLE_INDEX_OCRAM);
> >>> +#endif
> >>> +
> >>> /*
> >>>* Force probe of clk_k3 driver here to ensure basic default clock
> >>>* configuration is always done.
> >>> diff --git a/arch/arm/mach-k3/include/mach/am62_hardware.h
> >>> b/arch/arm/ma
Re: [PATCH 1/2] arm: mach-k3: am625: copy bootindex to OCRAM for main domain SPL
Hey Vignesh!
On March 4, 2024 thus sayeth Vignesh Raghavendra:
> Hi Wadim,
>
> On 26/02/24 19:00, Wadim Egorov wrote:
> > Texas Instruments has begun enabling security settings on the SoCs it
> > produces to instruct ROM and TIFS to begin protecting the Security
> > Management Subsystem (SMS) from other binaries we load into the chip by
> > default.
> >
> > One way ROM and TIFS do this is by enabling firewalls to protect the
> > OCSRAM and HSM RAM regions they're using during bootup.
> >
> > The HSM RAM the wakeup SPL is in is firewalled by TIFS to protect
> > itself from the main domain applications. This means the 'bootindex'
> > value in HSM RAM, left by ROM to indicate if we're using the primary
> > or secondary boot-method, must be moved to OCSRAM (that TIFS has open
> > for us) before we make the jump to the main domain so the main domain's
> > bootloaders can keep access to this information.
> >
> > Based on commit
> > b672e8581070 ("arm: mach-k3: copy bootindex to OCRAM for main domain SPL")
> >
>
> FYI, this is mostly a problem in non SPL flow (TI prosperity SBL for
> example) where HSM RAM would be used by HSM firmware. This should be a
> issue in R5 SPL flow. Do you see any issues today? If so, whats the
> TIFS firmware being used?
>
> > Signed-off-by: Wadim Egorov
> > ---
> > arch/arm/mach-k3/Kconfig | 3 ++-
> > arch/arm/mach-k3/am625_init.c | 15 +--
> > arch/arm/mach-k3/include/mach/am62_hardware.h | 15 +++
> > 3 files changed, 30 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
> > index 03898424c9..f5d06593f7 100644
> > --- a/arch/arm/mach-k3/Kconfig
> > +++ b/arch/arm/mach-k3/Kconfig
> > @@ -75,7 +75,8 @@ config SYS_K3_BOOT_PARAM_TABLE_INDEX
> > default 0x41cffbfc if SOC_K3_J721E
> > default 0x41cfdbfc if SOC_K3_J721S2
> > default 0x701bebfc if SOC_K3_AM642
> > - default 0x43c3f290 if SOC_K3_AM625
> > + default 0x43c3f290 if SOC_K3_AM625 && CPU_V7R
> > + default 0x7000f290 if SOC_K3_AM625 && ARM64
> > default 0x43c3f290 if SOC_K3_AM62A7 && CPU_V7R
> > default 0x7000f290 if SOC_K3_AM62A7 && ARM64
> > help
> > diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c
> > index 6c96e88114..67cf63b103 100644
> > --- a/arch/arm/mach-k3/am625_init.c
> > +++ b/arch/arm/mach-k3/am625_init.c
> > @@ -35,8 +35,10 @@ static struct rom_extended_boot_data bootdata
> > __section(".data");
> > static void store_boot_info_from_rom(void)
> > {
> > bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
> > - memcpy(&bootdata, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
> > - sizeof(struct rom_extended_boot_data));
> > + if (IS_ENABLED(CONFIG_CPU_V7R)) {
> > + memcpy(&bootdata, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
> > + sizeof(struct rom_extended_boot_data));
> > + }
> > }
> >
> > static void ctrl_mmr_unlock(void)
> > @@ -175,6 +177,15 @@ void board_init_f(ulong dummy)
> > k3_sysfw_loader(true, NULL, NULL);
> > }
> >
> > +#if defined(CONFIG_CPU_V7R)
> > + /*
> > +* Relocate boot information to OCRAM (after TIFS has opend this
> > +* region for us) so the next bootloader stages can keep access to
> > +* primary vs backup bootmodes.
> > +*/
> > + writel(bootindex, K3_BOOT_PARAM_TABLE_INDEX_OCRAM);
> > +#endif
> > +
> > /*
> > * Force probe of clk_k3 driver here to ensure basic default clock
> > * configuration is always done.
> > diff --git a/arch/arm/mach-k3/include/mach/am62_hardware.h
> > b/arch/arm/mach-k3/include/mach/am62_hardware.h
> > index 54380f36e1..9f504f4642 100644
> > --- a/arch/arm/mach-k3/include/mach/am62_hardware.h
> > +++ b/arch/arm/mach-k3/include/mach/am62_hardware.h
> > @@ -76,8 +76,23 @@
> > #define CTRLMMR_MCU_RST_CTRL (MCU_CTRL_MMR0_BASE +
> > 0x18170)
> >
> > #define ROM_EXTENDED_BOOT_DATA_INFO0x43c3f1e0
> > +#define K3_BOOT_PARAM_TABLE_INDEX_OCRAM 0x7000F290
> >
> > +/*
> > + * During the boot process ROM will kill anything that writes to OCSRAM.
>
> R5 ROM is long gone when R5 SPL starts, how would it kill anything?
Looks like this was based on my patch long ago for the AM62Ax family.
>From what little I remember about this was ROM is leaving behind a
firewall that we need TIFS's help to bring down for us. So I just
blamed ROM ;)
IDK if this is an issue for the AM62x family though.
>
> > + * This means the wakeup SPL cannot use this region during boot. To
> > + * complicate things, TIFS will set a firewall between HSM RAM and the
> > + * main domain.
> > + *
> > + * So, during the wakeup SPL, we will need to store the EEPROM data
> > + * somewhere in HSM RAM, and the main domain's SPL will need to store it
> > + * somewhere in OCSRAM
> > + */
> > +#ifdef CONFIG_CPU_V7R
> > #define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x43c3
> > +#els
[PATCH v3 10/13] arm: dts: introduce am62p5 U-Boot dts files
Include the U-Boot device tree files needed to boot the board. Signed-off-by: Bryan Brattlof --- arch/arm/dts/Makefile |2 + arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi | 2800 arch/arm/dts/k3-am62p-sk-binman.dtsi | 173 ++ arch/arm/dts/k3-am62p5-r5-sk.dts | 101 + arch/arm/dts/k3-am62p5-sk-u-boot.dtsi | 23 + 5 files changed, 3099 insertions(+) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 7c2681eb93779..c8fd41d4a816e 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1429,6 +1429,8 @@ dtb-$(CONFIG_SOC_K3_AM625) += k3-am625-sk.dtb \ dtb-$(CONFIG_SOC_K3_AM62A7) += k3-am62a7-sk.dtb \ k3-am62a7-r5-sk.dtb +dtb-$(CONFIG_SOC_K3_AM62P5) += k3-am62p5-r5-sk.dtb + dtb-$(CONFIG_ARCH_MEDIATEK) += \ mt7622-rfb.dtb \ mt7623a-unielec-u7623-02-emmc.dtb \ diff --git a/arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi b/arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi new file mode 100644 index 0..f66435201530f --- /dev/null +++ b/arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi @@ -0,0 +1,2800 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * This file was generated with the + * AM62Px SysConfig DDR Subsystem Register Configuration Tool v0.10.02 + * Thu Jan 25 2024 10:43:46 GMT-0600 (Central Standard Time) + * DDR Type: LPDDR4 + * F0 = 50MHzF1 = NA F2 = 1600MHz + * Density (per channel): 16Gb + * Number of Ranks: 2 + */ + +#define DDRSS_PLL_FHS_CNT 5 +#define DDRSS_PLL_FREQUENCY_1 8 +#define DDRSS_PLL_FREQUENCY_2 8 +#define DDRSS_SDRAM_IDX 17 +#define DDRSS_REGION_IDX 17 + +#define DDRSS_CTL_0_DATA 0x0B00 +#define DDRSS_CTL_1_DATA 0x +#define DDRSS_CTL_2_DATA 0x +#define DDRSS_CTL_3_DATA 0x +#define DDRSS_CTL_4_DATA 0x +#define DDRSS_CTL_5_DATA 0x +#define DDRSS_CTL_6_DATA 0x +#define DDRSS_CTL_7_DATA 0x2710 +#define DDRSS_CTL_8_DATA 0x000186A0 +#define DDRSS_CTL_9_DATA 0x0005 +#define DDRSS_CTL_10_DATA 0x0064 +#define DDRSS_CTL_11_DATA 0x0004E200 +#define DDRSS_CTL_12_DATA 0x0030D400 +#define DDRSS_CTL_13_DATA 0x0005 +#define DDRSS_CTL_14_DATA 0x0C80 +#define DDRSS_CTL_15_DATA 0x0004E200 +#define DDRSS_CTL_16_DATA 0x0030D400 +#define DDRSS_CTL_17_DATA 0x0005 +#define DDRSS_CTL_18_DATA 0x0C80 +#define DDRSS_CTL_19_DATA 0x01010100 +#define DDRSS_CTL_20_DATA 0x01010100 +#define DDRSS_CTL_21_DATA 0x01000110 +#define DDRSS_CTL_22_DATA 0x02010002 +#define DDRSS_CTL_23_DATA 0x000A +#define DDRSS_CTL_24_DATA 0x000186A0 +#define DDRSS_CTL_25_DATA 0x +#define DDRSS_CTL_26_DATA 0x +#define DDRSS_CTL_27_DATA 0x +#define DDRSS_CTL_28_DATA 0x +#define DDRSS_CTL_29_DATA 0x00020200 +#define DDRSS_CTL_30_DATA 0x +#define DDRSS_CTL_31_DATA 0x +#define DDRSS_CTL_32_DATA 0x +#define DDRSS_CTL_33_DATA 0x +#define DDRSS_CTL_34_DATA 0x0810 +#define DDRSS_CTL_35_DATA 0x4040 +#define DDRSS_CTL_36_DATA 0x +#define DDRSS_CTL_37_DATA 0x +#define DDRSS_CTL_38_DATA 0x +#define DDRSS_CTL_39_DATA 0x +#define DDRSS_CTL_40_DATA 0x040C +#define DDRSS_CTL_41_DATA 0x +#define DDRSS_CTL_42_DATA 0x0E38 +#define DDRSS_CTL_43_DATA 0x +#define DDRSS_CTL_44_DATA 0x0E38 +#define DDRSS_CTL_45_DATA 0x +#define DDRSS_CTL_46_DATA 0x05000804 +#define DDRSS_CTL_47_DATA 0x0700 +#define DDRSS_CTL_48_DATA 0x09090004 +#define DDRSS_CTL_49_DATA 0x0303 +#define DDRSS_CTL_50_DATA 0x00620011 +#define DDRSS_CTL_51_DATA 0x09110045 +#define DDRSS_CTL_52_DATA 0x421D +#define DDRSS_CTL_53_DATA 0x00620011 +#define DDRSS_CTL_54_DATA 0x09110045 +#define DDRSS_CTL_55_DATA 0x0900421D +#define DDRSS_CTL_56_DATA 0x000A0A09 +#define DDRSS_CTL_57_DATA 0x040006DB +#define DDRSS_CTL_58_DATA 0x090D2005 +#define DDRSS_CTL_59_DATA 0x1710 +#define DDRSS_CTL_60_DATA 0x0C00DB60 +#define DDRSS_CTL_61_DATA 0x090D200D +#define DDRSS_CTL_62_DATA 0x1710 +#define DDRSS_CTL_63_DATA 0x0C00DB60 +#define DDRSS_CTL_64_DATA 0x0304200D +#define DDRSS_CTL_65_DATA 0x04050002 +#define DDRSS_CTL_66_DATA 0x1F1E1F1E +#define DDRSS_CTL_67_DATA 0x01010008 +#define DDRSS_CTL_68_DATA 0x043C3C07 +#define DDRSS_CTL_69_DATA 0x0303 +#define DDRSS_CTL_70_DATA 0x +#define DDRSS_CTL_71_DATA 0x0101 +#define DDRSS_CTL_72_DATA 0x +#define DDRSS_CTL_73_DATA 0x0100 +#define DDRSS_CTL_74_DATA 0x00130803 +#define DDRSS_CTL_75_DATA 0x00BB +#define DDRSS_CTL_76_DATA 0x0260 +#define DDRSS_CTL_77_DATA 0x1858 +#define DDRSS_CTL_78_DATA 0x0260 +#define DDRSS_CTL_79_DATA 0x1858 +#define DDRSS_CTL_80_DATA 0x0005 +#define DDRSS_CTL_81_DATA 0x000A +#define DDRSS_CTL_82_DATA 0x0010 +#define DDRSS_CTL_83_DATA 0x0130 +#define DDRSS_CTL_84_DATA 0x0304 +#define DDRSS_CTL_85_DATA 0x0130 +#define DDRSS_CTL_86_DATA 0x0304 +#define DDRSS_CTL_87_DATA
[PATCH v3 06/13] arch: mach-k3: introduce basic files to support the am62px SoC family
Introduce the basic functions and definitions needed to properly
initialize TI's am62p family of SoCs
Signed-off-by: Bryan Brattlof
---
arch/arm/mach-k3/Kconfig | 7 +-
arch/arm/mach-k3/Makefile | 1 +
arch/arm/mach-k3/am62p5_init.c | 280 +
arch/arm/mach-k3/am62px/Kconfig| 32 +++
arch/arm/mach-k3/include/mach/am62p_hardware.h | 83
arch/arm/mach-k3/include/mach/am62p_spl.h | 49 +
arch/arm/mach-k3/include/mach/hardware.h | 4 +
arch/arm/mach-k3/include/mach/spl.h| 4 +
8 files changed, 459 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index ffceb6428d42e..3200418db9e2a 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -22,6 +22,9 @@ config SOC_K3_AM625
config SOC_K3_AM62A7
bool "TI's K3 based AM62A7 SoC Family Support"
+config SOC_K3_AM62P5
+ bool "TI's K3 based AM62P5 SoC Family Support"
+
endchoice
if SOC_K3_J721E
@@ -34,7 +37,7 @@ config SYS_SOC
config SYS_K3_NON_SECURE_MSRAM_SIZE
hex
- default 0x8 if SOC_K3_AM654
+ default 0x8 if SOC_K3_AM654 || SOC_K3_AM62P5
default 0x10 if SOC_K3_J721E || SOC_K3_J721S2
default 0x1c if SOC_K3_AM642
default 0x3c000 if SOC_K3_AM625 || SOC_K3_AM62A7
@@ -78,6 +81,7 @@ config SYS_K3_BOOT_PARAM_TABLE_INDEX
default 0x43c3f290 if SOC_K3_AM625
default 0x43c3f290 if SOC_K3_AM62A7 && CPU_V7R
default 0x7000f290 if SOC_K3_AM62A7 && ARM64
+ default 0x43c4f290 if SOC_K3_AM62P5
help
Address at which ROM stores the value which determines if SPL
is booted up by primary boot media or secondary boot media.
@@ -153,6 +157,7 @@ source "arch/arm/mach-k3/am65x/Kconfig"
source "arch/arm/mach-k3/am64x/Kconfig"
source "arch/arm/mach-k3/am62x/Kconfig"
source "arch/arm/mach-k3/am62ax/Kconfig"
+source "arch/arm/mach-k3/am62px/Kconfig"
source "arch/arm/mach-k3/j721e/Kconfig"
source "arch/arm/mach-k3/j721s2/Kconfig"
diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile
index 42161376469e2..820b313a83c23 100644
--- a/arch/arm/mach-k3/Makefile
+++ b/arch/arm/mach-k3/Makefile
@@ -20,5 +20,6 @@ obj-$(CONFIG_SOC_K3_J721S2) += j721s2_init.o
obj-$(CONFIG_SOC_K3_AM642) += am642_init.o
obj-$(CONFIG_SOC_K3_AM625) += am625_init.o
obj-$(CONFIG_SOC_K3_AM62A7) += am62a7_init.o
+obj-$(CONFIG_SOC_K3_AM62P5) += am62p5_init.o
endif
obj-y += common.o security.o
diff --git a/arch/arm/mach-k3/am62p5_init.c b/arch/arm/mach-k3/am62p5_init.c
new file mode 100644
index 0..9ff877d5d26e8
--- /dev/null
+++ b/arch/arm/mach-k3/am62p5_init.c
@@ -0,0 +1,280 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * AM62P5: SoC specific initialization
+ *
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#include
+#include
+#include
+#include "sysfw-loader.h"
+#include "common.h"
+#include
+#include
+#include
+
+struct fwl_data cbass_main_fwls[] = {
+ { "FSS_DAT_REG3", 7, 8 },
+};
+
+/*
+ * This uninitialized global variable would normal end up in the .bss section,
+ * but the .bss is cleared between writing and reading this variable, so move
+ * it to the .data section.
+ */
+u32 bootindex __section(".data");
+static struct rom_extended_boot_data bootdata __section(".data");
+
+static void store_boot_info_from_rom(void)
+{
+ bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
+ memcpy(&bootdata, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
+ sizeof(struct rom_extended_boot_data));
+}
+
+static void ctrl_mmr_unlock(void)
+{
+ /* Unlock all WKUP_CTRL_MMR0 module registers */
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 0);
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 1);
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 2);
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 3);
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 4);
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 5);
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 6);
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 7);
+
+ /* Unlock all CTRL_MMR0 module registers */
+ mmr_unlock(CTRL_MMR0_BASE, 0);
+ mmr_unlock(CTRL_MMR0_BASE, 1);
+ mmr_unlock(CTRL_MMR0_BASE, 2);
+ mmr_unlock(CTRL_MMR0_BASE, 4);
+ mmr_unlock(CTRL_MMR0_BASE, 5);
+ mmr_unlock(CTRL_MMR0_BASE, 6);
+
+ /* Unlock all MCU_CTRL_MMR0 module registers */
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 0);
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 1);
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 2);
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 3);
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 4);
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 6);
+
+ /* Unlock PADCFG_CTRL_MMR padconf registers */
+ mmr_unloc
[PATCH v3 12/13] configs: introduce configs needed for the am62px
Introduce the initial configs needed to support the am62px SoC family Signed-off-by: Bryan Brattlof --- configs/am62px_evm_a53_defconfig | 178 +++ configs/am62px_evm_r5_defconfig | 137 ++ include/configs/am62px_evm.h | 14 +++ 3 files changed, 329 insertions(+) diff --git a/configs/am62px_evm_a53_defconfig b/configs/am62px_evm_a53_defconfig new file mode 100644 index 0..bd8002108b10c --- /dev/null +++ b/configs/am62px_evm_a53_defconfig @@ -0,0 +1,178 @@ +CONFIG_ARM=y +CONFIG_ARCH_K3=y +CONFIG_TI_SECURE_DEVICE=y +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_SOC_K3_AM62P5=y +CONFIG_K3_ATF_LOAD_ADDR=0x9e78 +CONFIG_TARGET_AM62P5_A53_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8048 +CONFIG_SF_DEFAULT_SPEED=2500 +CONFIG_ENV_SIZE=0x4 +CONFIG_DM_GPIO=y +CONFIG_SPL_DM_SPI=y +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am62p5-sk" +CONFIG_SPL_TEXT_BASE=0x8008 +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_DM_RESET=y +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK_R_ADDR=0x8200 +CONFIG_SPL_FS_FAT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x8100 +CONFIG_BOOTSTD_FULL=y +CONFIG_BOOTSTD_DEFAULTS=y +CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb" +CONFIG_SPL_MAX_SIZE=0x58000 +CONFIG_SPL_PAD_TO=0x0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a0 +CONFIG_SPL_BSS_MAX_SIZE=0x8 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_STACK_R=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 +CONFIG_SPL_DMA=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" +CONFIG_SPL_I2C=y +CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_DM_SPI_FLASH=y +CONFIG_SPL_POWER_DOMAIN=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +# CONFIG_SPL_SPI_FLASH_TINY is not set +CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x28 +CONFIG_SPL_THERMAL=y +CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=64 +CONFIG_CMD_CLK=y +CONFIG_CMD_DFU=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_REMOTEPROC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_MTDPARTS=y +CONFIG_CMD_UBI=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_MULTI_DTB_FIT=y +CONFIG_SPL_MULTI_DTB_FIT=y +CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_DEVICE_REMOVE=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_OF_TRANSLATE=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_CLK_TI_SCI=y +CONFIG_DFU_MMC=y +CONFIG_DFU_MTD=y +CONFIG_DFU_RAM=y +CONFIG_DFU_SF=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x4 +CONFIG_SYS_DFU_MAX_FILE_SIZE=0x80 +CONFIG_DMA_CHANNELS=y +CONFIG_TI_K3_NAVSS_UDMA=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0xC000 +CONFIG_FASTBOOT_BUF_SIZE=0x2F00 +CONFIG_TI_SCI_PROTOCOL=y +CONFIG_SPL_DM_GPIO_LOOKUP_LABEL=y +CONFIG_DA8XX_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_SPL_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_OMAP24XX=y +CONFIG_DM_MAILBOX=y +CONFIG_K3_SEC_PROXY=y +CONFIG_I2C_EEPROM=y +CONFIG_SPL_I2C_EEPROM=y +CONFIG_FS_LOADER=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_SPL_MMC_IO_VOLTAGE=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_SPL_MMC_HS400_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ADMA=y +CONFIG_SPL_MMC_SDHCI_ADMA=y +CONFIG_MMC_SDHCI_AM654=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_SPI_NAND=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_SOFT_RESET=y +CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_S28HX_T=y +CONFIG_PHY_TI_DP83867=y +CONFIG_TI_AM65_CPSW_NUSS=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_SINGLE=y +CONFIG_POWER_DOMAIN=y +CONFIG_TI_SCI_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_SPL_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_SPL_DM_REGULATOR_GPIO=y +CONFIG_K3_SYSTEM_CONTROLLER=y +CONFIG_REMOTEPROC_TI_K3_ARM64=y +CONFIG_REMOTEPROC_TI_K3_DSP=y +CONFIG_REMOTEPROC_TI_K3_R5F=y +CONFIG_RESET_TI_SCI=y +CONFIG_DM_SERIAL=y +CONFIG_SOC_DEVICE=y +CONFIG_SOC_DEVICE_TI_K3=y +CONFIG_SOC_TI=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_CADENCE_QSPI=y +CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y +CONFIG_SYSRESET_TI_SCI=y +CONFIG_DM_THERMAL=y +CONFIG_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_SPL_DM_USB_GADGET=y +CONFIG_SPL_USB_HOST=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y
[PATCH v3 07/13] board: ti: introduce basic board files for the am62px family
Introduce the basic files needed to support the am62px family of SoCs
Co-developed-by: Hari Nagalla
Signed-off-by: Hari Nagalla
Signed-off-by: Bryan Brattlof
---
board/ti/am62px/Kconfig | 26 ++
board/ti/am62px/MAINTAINERS | 9 +
board/ti/am62px/Makefile | 7 +
board/ti/am62px/am62px.env | 15 +
board/ti/am62px/board-cfg.yaml | 37 ++
board/ti/am62px/evm.c| 29 ++
board/ti/am62px/pm-cfg.yaml | 12 +
board/ti/am62px/rm-cfg.yaml | 987 +++
board/ti/am62px/sec-cfg.yaml | 378 +++
board/ti/am62px/tifs-rm-cfg.yaml | 879 ++
10 files changed, 2379 insertions(+)
diff --git a/board/ti/am62px/Kconfig b/board/ti/am62px/Kconfig
new file mode 100644
index 0..9d95ffd9b2908
--- /dev/null
+++ b/board/ti/am62px/Kconfig
@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+
+if TARGET_AM62P5_R5_EVM || TARGET_AM62P5_A53_EVM
+
+config SYS_BOARD
+ default "am62px"
+
+config SYS_VENDOR
+ default "ti"
+
+config SYS_CONFIG_NAME
+ default "am62px_evm"
+
+source "board/ti/common/Kconfig"
+
+endif
+
+if TARGET_AM62P5_R5_EVM
+
+config SPL_LDSCRIPT
+ default "arch/arm/mach-omap2/u-boot-spl.lds"
+
+endif
diff --git a/board/ti/am62px/MAINTAINERS b/board/ti/am62px/MAINTAINERS
new file mode 100644
index 0..57c86ddbc4aef
--- /dev/null
+++ b/board/ti/am62px/MAINTAINERS
@@ -0,0 +1,9 @@
+AM62Px BOARD
+M: Vignesh Raghavendra
+M: Bryan Brattlof
+M: Tom Rini
+S: Maintained
+F: board/ti/am62px/
+F: include/configs/am62p5_evm.h
+F: configs/am62px_evm_r5_defconfig
+F: configs/am62px_evm_a53_defconfig
diff --git a/board/ti/am62px/Makefile b/board/ti/am62px/Makefile
new file mode 100644
index 0..921afdff27a24
--- /dev/null
+++ b/board/ti/am62px/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += evm.o
diff --git a/board/ti/am62px/am62px.env b/board/ti/am62px/am62px.env
new file mode 100644
index 0..f8b6aff2c2fdf
--- /dev/null
+++ b/board/ti/am62px/am62px.env
@@ -0,0 +1,15 @@
+#include
+#include
+
+name_kern=Image
+console=ttyS2,115200n8
+args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x0280
+ ${mtdparts}
+run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}
+
+boot_targets=mmc1 mmc0 pxe dhcp
+boot=mmc
+mmcdev=1
+bootpart=1:2
+bootdir=/boot
+rd_spec=-
diff --git a/board/ti/am62px/board-cfg.yaml b/board/ti/am62px/board-cfg.yaml
new file mode 100644
index 0..d539011aff9f3
--- /dev/null
+++ b/board/ti/am62px/board-cfg.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for AM62Px SoCs
+#
+
+---
+
+board-cfg:
+rev:
+boardcfg_abi_maj: 0x0
+boardcfg_abi_min: 0x1
+control:
+subhdr:
+magic: 0xC1D3
+size: 7
+main_isolation_enable: 0x5A
+main_isolation_hostid: 0x2
+secproxy:
+subhdr:
+magic: 0x1207
+size: 7
+scaling_factor: 0x1
+scaling_profile: 0x1
+disable_main_nav_secure_proxy: 0
+msmc:
+subhdr:
+magic: 0xA5C3
+size: 5
+msmc_cache_size: 0x10
+debug_cfg:
+subhdr:
+magic: 0x020C
+size: 8
+trace_dst_enables: 0x00
+trace_src_enables: 0x00
diff --git a/board/ti/am62px/evm.c b/board/ti/am62px/evm.c
new file mode 100644
index 0..97a95ce8cc2d5
--- /dev/null
+++ b/board/ti/am62px/evm.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Board specific initialization for AM62Px platforms
+ *
+ * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ return fdtdec_setup_mem_size_base();
+}
+
+int dram_init_banksize(void)
+{
+ return fdtdec_setup_memory_banksize();
+}
diff --git a/board/ti/am62px/pm-cfg.yaml b/board/ti/am62px/pm-cfg.yaml
new file mode 100644
index 0..3ff27ce702c26
--- /dev/null
+++ b/board/ti/am62px/pm-cfg.yaml
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Power management configuration for AM62Px
+#
+#
+---
+pm-cfg:
+rev:
+boardcfg_abi_maj: 0x0
+boardcfg_abi_min: 0x1
diff --git a/board/ti/am62px/rm-cfg.yaml b/board/ti/am62px/rm-cfg.yaml
new file mode 100644
index 0..caa2f7a5a83e1
--- /dev/null
+++ b/board/ti/am62px/rm-cfg.yaml
@@ -0,0 +1,987 @@
+# SPDX-Licen
[PATCH v3 08/13] firmware: ti_sci_static_data: add static DMA channel data
From: Hari Nagalla
Include the static DMA channel data for ti_sci
Signed-off-by: Hari Nagalla
Signed-off-by: Bryan Brattlof
---
drivers/firmware/ti_sci_static_data.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/firmware/ti_sci_static_data.h
b/drivers/firmware/ti_sci_static_data.h
index 567ce8911a7da..135ec01bda460 100644
--- a/drivers/firmware/ti_sci_static_data.h
+++ b/drivers/firmware/ti_sci_static_data.h
@@ -84,7 +84,8 @@ static struct ti_sci_resource_static_data rm_static_data[] = {
};
#endif /* CONFIG_SOC_K3_J721S2 */
-#if IS_ENABLED(CONFIG_SOC_K3_AM625) || IS_ENABLED(CONFIG_SOC_K3_AM62A7)
+#if IS_ENABLED(CONFIG_SOC_K3_AM625) || IS_ENABLED(CONFIG_SOC_K3_AM62A7) || \
+ IS_ENABLED(CONFIG_SOC_K3_AM62P5)
static struct ti_sci_resource_static_data rm_static_data[] = {
/* BC channels */
{
@@ -95,7 +96,7 @@ static struct ti_sci_resource_static_data rm_static_data[] = {
},
{ },
};
-#endif /* CONFIG_SOC_K3_AM625 || CONFIG_SOC_K3_AM62A7 */
+#endif /* CONFIG_SOC_K3_AM625 || CONFIG_SOC_K3_AM62A7 || CONFIG_SOC_K3_AM62P5
*/
#else
static struct ti_sci_resource_static_data rm_static_data[] = {
--
2.43.2
[PATCH v3 02/13] power: domain: ti: use IS_ENABLED macro
Cleanup this list and standardize on using the IS_ENABLED macro for the
power domain data list.
Reviewed-by: Igor Opaniuk
Signed-off-by: Bryan Brattlof
---
drivers/power/domain/ti-power-domain.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/power/domain/ti-power-domain.c
b/drivers/power/domain/ti-power-domain.c
index b34c982f4f5fa..dc5d74539edcf 100644
--- a/drivers/power/domain/ti-power-domain.c
+++ b/drivers/power/domain/ti-power-domain.c
@@ -81,19 +81,20 @@ static const struct soc_attr ti_k3_soc_pd_data[] = {
.family = "J7200",
.data = &j7200_pd_platdata,
},
-#elif CONFIG_SOC_K3_J721S2
+#endif
+#if IS_ENABLED(CONFIG_SOC_K3_J721S2)
{
.family = "J721S2",
.data = &j721s2_pd_platdata,
},
#endif
-#ifdef CONFIG_SOC_K3_AM625
+#if IS_ENABLED(CONFIG_SOC_K3_AM625)
{
.family = "AM62X",
.data = &am62x_pd_platdata,
},
#endif
-#ifdef CONFIG_SOC_K3_AM62A7
+#if IS_ENABLED(CONFIG_SOC_K3_AM62A7)
{
.family = "AM62AX",
.data = &am62ax_pd_platdata,
--
2.43.2
[PATCH v3 03/13] arm: mach-k3: am62px: introduce clock and device files for wkup spl
Include the clock and lpsc tree files needed for the wkup spl to
initialize the proper PLLs and power domains to boot the SoC.
Signed-off-by: Bryan Brattlof
---
arch/arm/mach-k3/r5/Makefile | 1 +
arch/arm/mach-k3/r5/am62px/Makefile| 6 +
arch/arm/mach-k3/r5/am62px/clk-data.c | 325 +
arch/arm/mach-k3/r5/am62px/dev-data.c | 71 +++
drivers/clk/ti/clk-k3.c| 6 +
drivers/power/domain/ti-power-domain.c | 6 +
include/k3-clk.h | 1 +
include/k3-dev.h | 1 +
8 files changed, 417 insertions(+)
diff --git a/arch/arm/mach-k3/r5/Makefile b/arch/arm/mach-k3/r5/Makefile
index b99199d337411..d1cd96d459bc4 100644
--- a/arch/arm/mach-k3/r5/Makefile
+++ b/arch/arm/mach-k3/r5/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_SOC_K3_J721E) += j7200/
obj-$(CONFIG_SOC_K3_J721S2) += j721s2/
obj-$(CONFIG_SOC_K3_AM625) += am62x/
obj-$(CONFIG_SOC_K3_AM62A7) += am62ax/
+obj-$(CONFIG_SOC_K3_AM62P5) += am62px/
obj-y += lowlevel_init.o
obj-y += r5_mpu.o
diff --git a/arch/arm/mach-k3/r5/am62px/Makefile
b/arch/arm/mach-k3/r5/am62px/Makefile
new file mode 100644
index 0..50b0df20a3d1a
--- /dev/null
+++ b/arch/arm/mach-k3/r5/am62px/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+
+obj-y += clk-data.o
+obj-y += dev-data.o
diff --git a/arch/arm/mach-k3/r5/am62px/clk-data.c
b/arch/arm/mach-k3/r5/am62px/clk-data.c
new file mode 100644
index 0..4b9892fe05167
--- /dev/null
+++ b/arch/arm/mach-k3/r5/am62px/clk-data.c
@@ -0,0 +1,325 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * AM62PX specific clock platform data
+ *
+ * This file is auto generated. Please do not hand edit and report any issues
+ * to Bryan Brattlof .
+ *
+ * Copyright (C) 2020-2023 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#include
+#include "k3-clk.h"
+
+static const char * const gluelogic_hfosc0_clkout_parents[] = {
+ NULL,
+ NULL,
+ "osc_24_mhz",
+ "osc_25_mhz",
+ "osc_26_mhz",
+ NULL,
+};
+
+static const char * const clk_32k_rc_sel_out0_parents[] = {
+ "gluelogic_rcosc_clk_1p0v_97p65k",
+ "gluelogic_hfosc0_clkout",
+ "gluelogic_rcosc_clk_1p0v_97p65k",
+ "gluelogic_lfosc0_clkout",
+};
+
+static const char * const main_emmcsd1_io_clklb_sel_out0_parents[] = {
+ "board_0_mmc1_clklb_out",
+ "board_0_mmc1_clk_out",
+};
+
+static const char * const main_ospi_loopback_clk_sel_out0_parents[] = {
+ "board_0_ospi0_dqs_out",
+ "board_0_ospi0_lbclko_out",
+};
+
+static const char * const main_usb0_refclk_sel_out0_parents[] = {
+ "gluelogic_hfosc0_clkout",
+ "postdiv4_16ff_main_0_hsdivout8_clk",
+};
+
+static const char * const main_usb1_refclk_sel_out0_parents[] = {
+ "gluelogic_hfosc0_clkout",
+ "postdiv4_16ff_main_0_hsdivout8_clk",
+};
+
+static const char * const sam62_pll_ctrl_wrap_main_0_sysclkout_clk_parents[] =
{
+ "gluelogic_hfosc0_clkout",
+ "hsdiv4_16fft_main_0_hsdivout0_clk",
+};
+
+static const char * const sam62_pll_ctrl_wrap_mcu_0_sysclkout_clk_parents[] = {
+ "gluelogic_hfosc0_clkout",
+ "hsdiv4_16fft_mcu_0_hsdivout0_clk",
+};
+
+static const char * const clkout0_ctrl_out0_parents[] = {
+ "hsdiv4_16fft_main_2_hsdivout1_clk",
+ "hsdiv4_16fft_main_2_hsdivout1_clk",
+};
+
+static const char * const main_emmcsd0_refclk_sel_out0_parents[] = {
+ "postdiv4_16ff_main_0_hsdivout5_clk",
+ "hsdiv4_16fft_main_2_hsdivout2_clk",
+};
+
+static const char * const main_emmcsd1_refclk_sel_out0_parents[] = {
+ "postdiv4_16ff_main_0_hsdivout5_clk",
+ "hsdiv4_16fft_main_2_hsdivout2_clk",
+};
+
+static const char * const main_gtcclk_sel_out0_parents[] = {
+ "postdiv4_16ff_main_2_hsdivout5_clk",
+ "postdiv4_16ff_main_0_hsdivout6_clk",
+ "board_0_cp_gemac_cpts0_rft_clk_out",
+ NULL,
+ "board_0_mcu_ext_refclk0_out",
+ "board_0_ext_refclk1_out",
+ "sam62_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk",
+ "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk",
+};
+
+static const char * const main_ospi_ref_clk_sel_out0_parents[] = {
+ "hsdiv4_16fft_main_0_hsdivout1_clk",
+ "postdiv1_16fft_main_1_hsdivout5_clk",
+};
+
+static const char * const main_timerclkn_sel_out0_parents[] = {
+ "gluelogic_hfosc0_clkout",
+ "clk_32k_rc_sel_out0",
+ "postdiv4_16ff_main_0_hsdivout7_clk",
+ "gluelogic_rcosc_clkout",
[PATCH v3 04/13] ram: k3-ddrss: enable the am62ax's DDR controller for am62px
The am62px family of SoCs uses the same DDR controller as found on the am62ax family. Enable this option when building for the am62px family Signed-off-by: Bryan Brattlof --- drivers/ram/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig index 5b07e92030142..56391058567bb 100644 --- a/drivers/ram/Kconfig +++ b/drivers/ram/Kconfig @@ -65,7 +65,7 @@ choice default K3_J721E_DDRSS if SOC_K3_J721E || SOC_K3_J721S2 default K3_AM64_DDRSS if SOC_K3_AM642 default K3_AM64_DDRSS if SOC_K3_AM625 - default K3_AM62A_DDRSS if SOC_K3_AM62A7 + default K3_AM62A_DDRSS if SOC_K3_AM62A7 || SOC_K3_AM62P5 config K3_J721E_DDRSS bool "Enable J721E DDRSS support" -- 2.43.2
[PATCH v3 09/13] dma: ti: k3-udma: Add DMA PSIL mappings for AM62P and J722S
From: Vignesh Raghavendra
Add PSIL data for the AM62P and the J722S SoC family. The PSIL mapping
for the J722S is the same except for the extra instances of the CSI-RX.
So let's reuse the same file for both the AM62P and J722S.
Signed-off-by: Vignesh Raghavendra
Signed-off-by: Ravi Gunasekaran
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
[b...@ti.com: rebased to U-Boot v2024.01]
Signed-off-by: Bryan Brattlof
---
drivers/dma/ti/Makefile| 2 +
drivers/dma/ti/k3-psil-am62p.c | 325 +
drivers/dma/ti/k3-psil-priv.h | 1 +
drivers/dma/ti/k3-psil.c | 4 +
4 files changed, 332 insertions(+)
diff --git a/drivers/dma/ti/Makefile b/drivers/dma/ti/Makefile
index f4e0271efbf32..17223b20432da 100644
--- a/drivers/dma/ti/Makefile
+++ b/drivers/dma/ti/Makefile
@@ -9,3 +9,5 @@ k3-psil-data-$(CONFIG_SOC_K3_J721S2) += k3-psil-j721s2.o
k3-psil-data-$(CONFIG_SOC_K3_AM642) += k3-psil-am64.o
k3-psil-data-$(CONFIG_SOC_K3_AM625) += k3-psil-am62.o
k3-psil-data-$(CONFIG_SOC_K3_AM62A7) += k3-psil-am62a.o
+k3-psil-data-$(CONFIG_SOC_K3_AM62P5) += k3-psil-am62p.o
+k3-psil-data-$(CONFIG_SOC_K3_J722S) += k3-psil-am62p.o
diff --git a/drivers/dma/ti/k3-psil-am62p.c b/drivers/dma/ti/k3-psil-am62p.c
new file mode 100644
index 0..8739bf41b5b7c
--- /dev/null
+++ b/drivers/dma/ti/k3-psil-am62p.c
@@ -0,0 +1,325 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com
+ */
+
+#include
+
+#include "k3-psil-priv.h"
+
+#define PSIL_PDMA_XY_TR(x) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_PDMA_XY, \
+ .mapped_channel_id = -1,\
+ .default_flow_id = -1, \
+ }, \
+ }
+
+#define PSIL_PDMA_XY_PKT(x)\
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_PDMA_XY, \
+ .mapped_channel_id = -1,\
+ .default_flow_id = -1, \
+ .pkt_mode = 1, \
+ }, \
+ }
+
+#define PSIL_ETHERNET(x, ch, flow_base, flow_cnt) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_NATIVE, \
+ .pkt_mode = 1, \
+ .needs_epib = 1,\
+ .psd_size = 16, \
+ .mapped_channel_id = ch,\
+ .flow_start = flow_base,\
+ .flow_num = flow_cnt, \
+ .default_flow_id = flow_base, \
+ }, \
+ }
+
+#define PSIL_SAUL(x, ch, flow_base, flow_cnt, default_flow, tx)\
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_NATIVE, \
+ .pkt_mode = 1, \
+ .needs_epib = 1,\
+ .psd_size = 64, \
+ .mapped_channel_id = ch,\
+ .flow_start = flow_base,\
+ .flow_num = flow_cnt, \
+ .default_flow_id = default_flow,\
+ .notdpkt = tx, \
+ }, \
+ }
+
+#define PSIL_PDMA_MCASP(x) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_PDMA_XY, \
+ .pdma_acc32 = 1,\
+
[PATCH v3 05/13] arm: mach-k3: invert logic for split DM firmware config
Currently, for the K3 generation of SoCs, there are more SoCs that utilize the split firmware approach than the combined DMSC firmware. Invert the logic to avoid adding more and more SoCs to this list. Acked-by: Andrew Davis Signed-off-by: Bryan Brattlof --- arch/arm/mach-k3/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig index 03898424c9546..ffceb6428d42e 100644 --- a/arch/arm/mach-k3/Kconfig +++ b/arch/arm/mach-k3/Kconfig @@ -130,7 +130,7 @@ config K3_ATF_LOAD_ADDR config K3_DM_FW bool "Separate DM firmware image" - depends on CPU_V7R && (SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_AM625 || SOC_K3_AM62A7) && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN + depends on CPU_V7R && !SOC_K3_AM642 && !SOC_K3_AM654 && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN default y help Enabling this will indicate that the system has separate DM -- 2.43.2
[PATCH v3 00/13] Hello Again Everyone!
**Note:** This series depends on the v6 OF_UPSTREAM work from Sumit[0]. Patch #11 was added to fix some Makefile.spl targets to allow SPL builds to complete with the OF_UPSTREAM series. The AM62Px is an extension of the existing Sitara AM62x low-cost family of application processors built for Automotive and Linux Application development. Scalable Arm Cortex-A53 performance and embedded features, such as: multi high-definition display support, 3D-graphics acceleration, 4K video acceleration, and extensive peripherals make the AM62Px well-suited for a broad range of automation and industrial application, including automotive digital instrumentation, automotive displays, industrial HMI, and more. Some highlights of AM62P SoC are: * Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster. Dual/Single core variants are provided in the same package to allow HW compatible designs. * One Device manager Cortex-R5F for system power and resource management, and one Cortex-R5F for Functional Safety or general-purpose usage. * One 3D GPU up to 50 GLFOPS * H.264/H.265 Video Encode/Decode. * Display support: 3x display support over OLDI/LVDS (1x OLDI-DL, 1x or 2x OLDI-SL), DSI, or DPI. Up to 3840x1080 @ 60fps resolution * Integrated Giga-bit Ethernet switch supporting up to a total of two external ports (TSN capable). * 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3xMMC and SD, GPMC for NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio, 1xCSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals. * Dedicated Centralized Hardware Security Module with support for secure boot, debug security and crypto acceleration and trusted execution environment. * One 32-bit DDR Subsystem that supports LPDDR4, DDR4 memory types. * Multiple low power modes support, ex: Deep sleep, Standby, MCU-only, enabling battery powered system design. For those interested, more details about this SoC can be found in the Technical Reference Manual here: https://www.ti.com/lit/pdf/spruj83 Proof-of-Life: https://paste.sr.ht/~bryanb/af2ac108a9362549aa326f182e87918d52bf2d71 Currently, while more peripherals are being added in Linux[0], this series will only support UART boot. Thanks for reviewing! ~Bryan Changes from v2: [2] - dropped the extra ARCH_K3 not needed for the K3_DM_FW option - removed the extra &main_pktdma and &main_bcdma nodes already present in the kernel dtbs - corrected a few patch fixup errors - rebased ontop op OF_UPSTREAM v5 [0] - %s/uboot/U-Boot/g Changes from v1: [1] - squashed all clk and lpsc tree updates into a single commit - corrected SOC_K3_AM642 typo with DM firmware Kconfig option - updated RM configs and dma nodes to enable IP that need DMA - added the dtb targets to the dts/Makefile - rebased the series on top of v2024.01-rc1 - switched to bootstd rather than use distro boot scripts. - enabled OF_UPSTREAM instead of using the arch/arm/dts directory [0] https://lore.kernel.org/u-boot/20240222093607.3085545-1-sumit.g...@linaro.org/ [1] https://lore.kernel.org/all/20231012230616.2101992-13...@ti.com/ [2] https://lore.kernel.org/u-boot/20240201030634.1120963-17...@ti.com/ --- Bryan Brattlof (11): soc: add info to identify the am62p SoC family power: domain: ti: use IS_ENABLED macro arm: mach-k3: am62px: introduce clock and device files for wkup spl ram: k3-ddrss: enable the am62ax's DDR controller for am62px arm: mach-k3: invert logic for split DM firmware config arch: mach-k3: introduce basic files to support the am62px SoC family board: ti: introduce basic board files for the am62px family arm: dts: introduce am62p5 U-Boot dts files Makefile: remove hardcoded device tree source directory configs: introduce configs needed for the am62px doc: board: ti: introduce am62px documentation Hari Nagalla (1): firmware: ti_sci_static_data: add static DMA channel data Vignesh Raghavendra (1): dma: ti: k3-udma: Add DMA PSIL mappings for AM62P and J722S Makefile | 18 +- arch/arm/dts/Makefile |2 + arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi | 2800 arch/arm/dts/k3-am62p-sk-binman.dtsi | 173 ++ arch/arm/dts/k3-am62p5-r5-sk.dts | 101 + arch/arm/dts/k3-am62p5-sk-u-boot.dtsi | 23 + arch/arm/mach-k3/Kconfig |9 +- arch/arm/mach-k3/Makefile |1 + arch/arm/mach-k3/am62p5_init.c | 280 +++ arch/arm/mach-k3/am62px/Kconfig| 32 + arch/arm/mach-k3/include/mach/am62p_hardware.h | 83 + arch/arm/mach-k3/include/mach/am62p_spl.h | 49 + arch/arm/mach-k3/include/mach/hardware.h |6 + arch/arm/mach-k3/include/mach/spl.h|4 + arch/arm/mach-k3/r5/Makefile |1 + arch/arm/mach-k3/r5/am62px/Makefile|
[PATCH v3 13/13] doc: board: ti: introduce am62px documentation
Introduce basic documentation for the am62p family of SoCs. Signed-off-by: Bryan Brattlof --- doc/board/ti/am62px_sk.rst | 289 + doc/board/ti/k3.rst| 1 + 2 files changed, 290 insertions(+) diff --git a/doc/board/ti/am62px_sk.rst b/doc/board/ti/am62px_sk.rst new file mode 100644 index 0..1f2982c36f9e4 --- /dev/null +++ b/doc/board/ti/am62px_sk.rst @@ -0,0 +1,289 @@ +.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +.. sectionauthor:: Bryan Brattlof + +AM62Px Platforms + + +The AM62Px is an extension of the existing Sitara AM62x low-cost family +of application processors built for Automotive and Linux Application +development. Scalable Arm Cortex-A53 performance and embedded features, +such as: multi high-definition display support, 3D-graphics +acceleration, 4K video acceleration, and extensive peripherals make the +AM62Px well-suited for a broad range of automation and industrial +application, including automotive digital instrumentation, automotive +displays, industrial HMI, and more. + +Some highlights of AM62P SoC are: + +* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster. + Dual/Single core variants are provided in the same package to allow HW + compatible designs. + +* One Device manager Cortex-R5F for system power and resource + management, and one Cortex-R5F for Functional Safety or + general-purpose usage. + +* One 3D GPU up to 50 GLFOPS + +* H.264/H.265 Video Encode/Decode. + +* Display support: 3x display support over OLDI/LVDS (1x OLDI-DL, 1x or + 2x OLDI-SL), DSI, or DPI. Up to 3840x1080 @ 60fps resolution + +* Integrated Giga-bit Ethernet switch supporting up to a total of two + external ports (TSN capable). + +* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3xMMC and SD, GPMC for + NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio, + 1xCSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals. + +* Dedicated Centralized Hardware Security Module with support for secure + boot, debug security and crypto acceleration and trusted execution + environment. + +* One 32-bit DDR Subsystem that supports LPDDR4, DDR4 memory types. + +* Multiple low power modes support, ex: Deep sleep, Standby, MCU-only, + enabling battery powered system design. + +For those interested, more details about this SoC can be found in the +Technical Reference Manual here: https://www.ti.com/lit/pdf/spruj83 + +Boot Flow: +-- + +The bootflow is exactly the same as all SoCs in the am62xxx extended SoC +family. Below is the pictorial representation: + +.. image:: img/boot_diagram_k3_current.svg + :alt: Boot flow diagram + +- Here TIFS acts as master and provides all the critical services. R5/A53 + requests TIFS to get these services done as shown in the above diagram. + +Sources: + + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_boot_sources +:end-before: .. k3_rst_include_end_boot_sources + +Build procedure: + + +0. Setup the environment variables: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_common_env_vars_desc +:end-before: .. k3_rst_include_end_common_env_vars_desc + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_board_env_vars_desc +:end-before: .. k3_rst_include_end_board_env_vars_desc + +Set the variables corresponding to this platform: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_common_env_vars_defn +:end-before: .. k3_rst_include_end_common_env_vars_defn + +.. code-block:: bash + + $ export UBOOT_CFG_CORTEXR=am62px_evm_r5_defconfig + $ export UBOOT_CFG_CORTEXA=am62px_evm_a53_defconfig + $ export TFA_BOARD=lite + $ # we dont use any extra TFA parameters + $ unset TFA_EXTRA_ARGS + $ export OPTEE_PLATFORM=k3-am62x + $ export OPTEE_EXTRA_ARGS="CFG_WITH_SOFTWARE_PRNG=y" + +.. am62px_evm_rst_include_start_build_steps + +1. Trusted Firmware-A: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_build_steps_tfa +:end-before: .. k3_rst_include_end_build_steps_tfa + + +2. OP-TEE: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_build_steps_optee +:end-before: .. k3_rst_include_end_build_steps_optee + +3. U-Boot: + +* 3.1 R5: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_build_steps_spl_r5 +:end-before: .. k3_rst_include_end_build_steps_spl_r5 + +* 3.2 A53: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_build_steps_uboot +:end-before: .. k3_rst_include_end_build_steps_uboot +.. am62px_evm_rst_include_end_build_steps + +Target Images +-- + +In order to boot we need tiboot3.bin, tispl.bin and u-boot.img. Each SoC +variant (HS-FS, HS-SE) requires a different source for these files. + + - HS-FS + +* tiboot3-am62px-hs-fs-evm.bin from step 3.1 +* tispl.bin, u-boot.img from step 3.2 + + - HS-SE + +
[PATCH v3 11/13] Makefile: remove hardcoded device tree source directory
Some boards that choose to utilize the OF_UPSTREAM directory for their device tree files will need to specify that directory instead of the traditional arch/$(ARCH)/dts/* path. Include the correct path to the board's dtbs depending on if OF_UPSTREAM is selected or not. Reviewed-by: Sumit Garg Signed-off-by: Bryan Brattlof --- Makefile | 18 ++ scripts/Makefile.spl | 17 + 2 files changed, 27 insertions(+), 8 deletions(-) diff --git a/Makefile b/Makefile index 0f0c7f30d2717..51b57d26857f1 100644 --- a/Makefile +++ b/Makefile @@ -1184,6 +1184,16 @@ dt_binding_check: scripts_dtc quiet_cmd_copy = COPY$@ cmd_copy = cp $< $@ +ifeq ($(CONFIG_OF_UPSTREAM),y) +ifeq ($(CONFIG_ARM64),y) +dt_dir := dts/upstream/src/arm64 +else +dt_dir := dts/upstream/src/$(ARCH) +endif +else +dt_dir := arch/$(ARCH)/dts +endif + ifeq ($(CONFIG_MULTI_DTB_FIT),y) ifeq ($(CONFIG_MULTI_DTB_FIT_LZO),y) @@ -1209,7 +1219,7 @@ endif MKIMAGEFLAGS_fit-dtb.blob = -f auto -A $(ARCH) -T firmware -C none -O u-boot \ -a 0 -e 0 -E \ - $(patsubst %,-b arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) -d /dev/null + $(patsubst %,-b $(dt_dir)/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) -d /dev/null MKIMAGEFLAGS_fit-dtb.blob += -B 0x8 @@ -1407,9 +1417,9 @@ MKIMAGEFLAGS_u-boot.img = -f auto -A $(ARCH) -T firmware -C none -O u-boot \ -a $(CONFIG_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \ -p $(CONFIG_FIT_EXTERNAL_OFFSET) \ -n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" -E \ - $(patsubst %,-b arch/$(ARCH)/dts/%.dtb,$(subst ",,$(DEVICE_TREE))) \ - $(patsubst %,-b arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) \ - $(patsubst %,-b arch/$(ARCH)/dts/%.dtbo,$(subst ",,$(CONFIG_OF_OVERLAY_LIST))) + $(patsubst %,-b $(dt_dir)/%.dtb,$(subst ",,$(DEVICE_TREE))) \ + $(patsubst %,-b $(dt_dir)/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) \ + $(patsubst %,-b $(dt_dir)/%.dtbo,$(subst ",,$(CONFIG_OF_OVERLAY_LIST))) else MKIMAGEFLAGS_u-boot.img = -A $(ARCH) -T firmware -C none -O u-boot \ -a $(CONFIG_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \ diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index 407fc52376a50..d074ba2350065 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -559,9 +559,15 @@ FORCE: $(obj)/dts/dt-$(SPL_NAME).dtb: dts/dt.dtb $(Q)$(MAKE) $(build)=$(obj)/dts spl_dtbs -PHONY += dts_dir -dts_dir: - $(shell [ -d $(obj)/dts ] || mkdir -p $(obj)/dts) +ifeq ($(CONFIG_OF_UPSTREAM),y) +ifeq ($(CONFIG_ARM64),y) +dt_dir := dts/upstream/src/arm64 +else +dt_dir := dts/upstream/src/$(ARCH) +endif +else +dt_dir := arch/$(ARCH)/dts +endif # Declare the contents of the .PHONY variable as phony. We keep that # information in a variable so we can use it in if_changed and friends. @@ -569,8 +575,11 @@ dts_dir: SPL_OF_LIST_TARGETS = $(patsubst %,dts/%.dtb,$(subst ",,$(CONFIG_SPL_OF_LIST))) SHRUNK_ARCH_DTB = $(addprefix $(obj)/,$(SPL_OF_LIST_TARGETS)) +$(dir $(SHRUNK_ARCH_DTB)): + $(shell [ -d $@ ] || mkdir -p $@) + .SECONDEXPANSION: -$(SHRUNK_ARCH_DTB): $$(patsubst $(obj)/dts/%, arch/$(ARCH)/dts/%, $$@) dts_dir +$(SHRUNK_ARCH_DTB): $$(patsubst $(obj)/dts/%, $(dt_dir)/%, $$@) $(dir $(SHRUNK_ARCH_DTB)) $(call if_changed,fdtgrep) targets += $(SPL_OF_LIST_TARGETS) -- 2.43.2
[PATCH v3 01/13] soc: add info to identify the am62p SoC family
Include the part number for TI's am62px family of SoCs so we can properly identify it during boot Reviewed-by: Igor Opaniuk Signed-off-by: Bryan Brattlof --- arch/arm/mach-k3/include/mach/hardware.h | 2 ++ drivers/soc/soc_ti_k3.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/arch/arm/mach-k3/include/mach/hardware.h b/arch/arm/mach-k3/include/mach/hardware.h index a1a9dfbde66c8..040288150b12f 100644 --- a/arch/arm/mach-k3/include/mach/hardware.h +++ b/arch/arm/mach-k3/include/mach/hardware.h @@ -46,6 +46,7 @@ #define JTAG_ID_PARTNO_J721S2 0xbb75 #define JTAG_ID_PARTNO_AM62X 0xbb7e #define JTAG_ID_PARTNO_AM62AX 0xbb8d +#define JTAG_ID_PARTNO_AM62PX 0xbb9d #define K3_SOC_ID(id, ID) \ static inline bool soc_is_##id(void) \ @@ -61,6 +62,7 @@ K3_SOC_ID(am64x, AM64X) K3_SOC_ID(j721s2, J721S2) K3_SOC_ID(am62x, AM62X) K3_SOC_ID(am62ax, AM62AX) +K3_SOC_ID(am62px, AM62PX) #define K3_SEC_MGR_SYS_STATUS 0x44234100 #define SYS_STATUS_DEV_TYPE_SHIFT 0 diff --git a/drivers/soc/soc_ti_k3.c b/drivers/soc/soc_ti_k3.c index 355a5368dd45a..d7d0152b115fa 100644 --- a/drivers/soc/soc_ti_k3.c +++ b/drivers/soc/soc_ti_k3.c @@ -45,6 +45,9 @@ static const char *get_family_string(u32 idreg) case JTAG_ID_PARTNO_AM62AX: family = "AM62AX"; break; + case JTAG_ID_PARTNO_AM62PX: + family = "AM62PX"; + break; default: family = "Unknown Silicon"; }; -- 2.43.2
Re: [PATCH v2] arm: mach-k3: Refactor QoS settings
Hey Aradhya! On February 12, 2024 thus sayeth Aradhya Bhatia: > Refactor common QoS code into a new common header file, and the soc > specific setup_qos functions into a common API. > > Rename $(soc)_qos_count and $(soc)_qos_data variables to qos_count and > qos_data. When QoS settings of more SoCs are added, only one pair will > be defined at a time, based on the config SOC_K3_$(soc). > > This refactoring has been done for 2 major purposes. > > - The auto-generated $(soc)_qos_data.c and $(soc)_qos.h files cannot > have any code that is specific to any bootloader. Those files have to > remain agnostic of different bootloader implementations and their > header files. > > - The existing implementation was less than ideal and would have enabled > multiple $(soc)_qos_count and $(soc)_qos_data variables for all SoC > variants. > > Signed-off-by: Aradhya Bhatia > --- > > Change Log: > > - new in v2: >- Move K3_QOS config to the r5/Kconfig. > > Previous versions: > > - v1: https://lore.kernel.org/all/20240206085610.3226136-1-a-bhat...@ti.com/ > ... > diff --git a/arch/arm/mach-k3/r5/am62ax/Makefile > b/arch/arm/mach-k3/r5/am62ax/Makefile > index 02a941805e9a..e4e55ce5c7dd 100644 > --- a/arch/arm/mach-k3/r5/am62ax/Makefile > +++ b/arch/arm/mach-k3/r5/am62ax/Makefile > @@ -4,4 +4,4 @@ > > obj-y += clk-data.o > obj-y += dev-data.o > -obj-y += am62a_qos_data.o > +obj-y += am62a_qos_uboot.o No objections from me though I am curious about the name change. Was there an issue with using the original am62a_qos_data.c ~Bryan
Re: [PATCH v2 05/13] arm: mach-k3: invert logic for split DM firmware config
On February 2, 2024 thus sayeth Andrew Davis: > On 1/31/24 9:06 PM, Bryan Brattlof wrote: > > Currently, for the K3 generation of SoCs, there are more SoCs that > > utilize the split firmware approach than the combined DMSC firmware. > > Invert the logic to avoid adding more and more SoCs to this list. > > > > Signed-off-by: Bryan Brattlof > > --- > > arch/arm/mach-k3/Kconfig | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig > > index 03898424c9546..0574e81075e6d 100644 > > --- a/arch/arm/mach-k3/Kconfig > > +++ b/arch/arm/mach-k3/Kconfig > > @@ -130,7 +130,7 @@ config K3_ATF_LOAD_ADDR > > config K3_DM_FW > > bool "Separate DM firmware image" > > - depends on CPU_V7R && (SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_AM625 || > > SOC_K3_AM62A7) && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN > > + depends on CPU_V7R && ARCH_K3 && !SOC_K3_AM642 && !SOC_K3_AM654 && > > !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN > > Always amusing to see how many SoCs get added to these lists before someone > realizes there is only one or two SoCs that are not on the list :) Haha having to resize my terminal is when I had enough :) > > BTW, this whole file is inside an "if ARCH_K3" block, so all symbols > depend on ARCH_K3 automatically. You can drop that check. > Nice catch! I'll drop that in v2 > Otherwise, > > Acked-by: Andrew Davis > > > default y > > help > > Enabling this will indicate that the system has separate DM
Re: [PATCH v2 10/13] arm: dts: introduce am62p5 uboot dts files
On February 2, 2024 thus sayeth Andrew Davis:
> On 2/2/24 10:28 AM, Bryan Brattlof wrote:
> > Hi Andrew!
> >
> > On February 2, 2024 thus sayeth Andrew Davis:
> > > On 1/31/24 9:06 PM, Bryan Brattlof wrote:
> > > > Include the uboot device tree files needed to boot the board.
> > > >
> > > > Signed-off-by: Bryan Brattlof
> > > > ---
> > > >arch/arm/dts/Makefile |2 +
> > > >arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi | 2800
> > > >
> > > >arch/arm/dts/k3-am62p-sk-binman.dtsi | 173 ++
> > > >arch/arm/dts/k3-am62p5-r5-sk.dts | 101 +
> > > >arch/arm/dts/k3-am62p5-sk-u-boot.dtsi | 49 +
> > > >arch/arm/mach-k3/Makefile |1 +
> > > >arch/arm/mach-k3/am62p5_init.c |4 +-
> > > >dts/arch/arm64/ti |1 +
> > > >8 files changed, 3129 insertions(+), 2 deletions(-)
> > > >create mode 100644 arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi
> > > >create mode 100644 arch/arm/dts/k3-am62p-sk-binman.dtsi
> > > >create mode 100644 arch/arm/dts/k3-am62p5-r5-sk.dts
> > > >create mode 100644 arch/arm/dts/k3-am62p5-sk-u-boot.dtsi
> > > >create mode 12 dts/arch/arm64/ti
> > > >
> >
> > ...
> >
> > > > diff --git a/arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi
> > > > b/arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi
> > > > new file mode 100644
> > > > index 0..f66435201530f
> > > > --- /dev/null
> > > > +++ b/arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi
> > > > @@ -0,0 +1,2800 @@
> > > > +// SPDX-License-Identifier: GPL-2.0+
> > > > +/*
> > > > + * This file was generated with the
> > > > + * AM62Px SysConfig DDR Subsystem Register Configuration Tool v0.10.02
> > > > + * Thu Jan 25 2024 10:43:46 GMT-0600 (Central Standard Time)
> > > > + * DDR Type: LPDDR4
> > > > + * F0 = 50MHzF1 = NA F2 = 1600MHz
> > > > + * Density (per channel): 16Gb
> > > > + * Number of Ranks: 2
> > > > + */
> > > > +
> > > > +#define DDRSS_PLL_FHS_CNT 5
> > > > +#define DDRSS_PLL_FREQUENCY_1 8
> > > > +#define DDRSS_PLL_FREQUENCY_2 8
> > > > +#define DDRSS_SDRAM_IDX 17
> > > > +#define DDRSS_REGION_IDX 17
> > > > +
> > > > +#define DDRSS_CTL_0_DATA 0x0B00
> > > > +#define DDRSS_CTL_1_DATA 0x
> > > > +#define DDRSS_CTL_2_DATA 0x
> > > > +#define DDRSS_CTL_3_DATA 0x
> > > > +#define DDRSS_CTL_4_DATA 0x
> > > > +#define DDRSS_CTL_5_DATA 0x
> > >
> > > I wonder if it would be better to generate this file
> > > during build..
> > >
> >
> > Yeah we can save a lot of space by removing tons of these registers
> > writing 0x0 to the reserved ranges... The section for the different PHYs
> > is particularly aggravating.
> >
>
> Might be a silly question, what happens if you don't write these 0x0
> at all, is there a sane default of 0x0, or is it random on powerup?
>
The vast majority (especially the spaces between the PHYs) are just
holes in the bus that find their way to a black hole when we write to
it. Nothing bad will happen. There are some shadow registers we need to
be careful about but those aren't hard to work around before we start
the controller.
We'd just need to refactor how these registers are copied into the
controller, right now it's something dumb like
for(offset=0, offset > I told Simon and Marex last year I'd get to it once I find some free
> > cycles and then I went and had a son ;) but it's still in the backlog
> >
>
> Know the feeling :)
>
> Andrew
>
> > >
> > > > +&main_bcdma {
> > > > + reg = <0x00 0x485c0100 0x00 0x100>,
> > > > + <0x00 0x4c00 0x00 0x2>,
> > > > + <0x00 0x4a82 0x00 0x2>,
> > > > + <0x00 0x4aa4 0x00 0x2>,
> > > > + <0x00 0x4bc0 0x00 0x10>,
> > > > + <0x00 0x4860 0x00 0x8000>,
> > > > + <0x00 0x484a4000 0x00 0x2000>,
> > > > + <0x00 0x484c2000 0x00 0x2000>;
> > > > +
Re: [PATCH v2 00/13] Introduce basic support for TI's AM62Px SoC family
Hi Sumit! On February 2, 2024 thus sayeth Sumit Garg: > Hi Bryan, > > On Thu, 1 Feb 2024 at 08:36, Bryan Brattlof wrote: > > > > Hello Again Everyone! > > > > **Note:** This series depends on the OF_UPSTREAM work from Sumit [0]. > > Patch #11 was added to fix some Makefile.spl targets to allow SPL builds > > to complete with the OF_UPSTREAM series. > > Thanks for your adoption of OF_UPSTREAM work. As evident from this > series, it would be much easier to maintain U-Boot specific DT pieces > rather than the full SoC specific DT copy from Linux source tree. > Like all good ideas we should have done this years ago. Thanks for taking up the task of making this easier for us. > -Sumit > > > > > The AM62Px is an extension of the existing Sitara AM62x low-cost family > > of application processors built for Automotive and Linux Application > > development. Scalable Arm Cortex-A53 performance and embedded features, > > such as: multi high-definition display support, 3D-graphics > > acceleration, 4K video acceleration, and extensive peripherals make the > > AM62Px well-suited for a broad range of automation and industrial > > application, including automotive digital instrumentation, automotive > > displays, industrial HMI, and more. > > > > Some highlights of AM62P SoC are: > > > > * Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster. > > Dual/Single core variants are provided in the same package to allow HW > > compatible designs. > > > > * One Device manager Cortex-R5F for system power and resource > > management, and one Cortex-R5F for Functional Safety or > > general-purpose usage. > > > > * One 3D GPU up to 50 GLFOPS > > > > * H.264/H.265 Video Encode/Decode. > > > > * Display support: 3x display support over OLDI/LVDS (1x OLDI-DL, 1x or > > 2x OLDI-SL), DSI, or DPI. Up to 3840x1080 @ 60fps resolution > > > > * Integrated Giga-bit Ethernet switch supporting up to a total of two > > external ports (TSN capable). > > > > * 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3xMMC and SD, GPMC for > > NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio, > > 1xCSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals. > > > > * Dedicated Centralized Hardware Security Module with support for secure > > boot, debug security and crypto acceleration and trusted execution > > environment. > > > > * One 32-bit DDR Subsystem that supports LPDDR4, DDR4 memory types. > > > > * Multiple low power modes support, ex: Deep sleep, Standby, MCU-only, > > enabling battery powered system design. > > > > For those interested, more details about this SoC can be found in the > > Technical Reference Manual here: https://www.ti.com/lit/pdf/spruj83 > > > > Proof-of-Life: > > https://paste.sr.ht/~bryanb/af2ac108a9362549aa326f182e87918d52bf2d71 > > > > Currently, while more peripherals are being added in Linux[0], this > > series will only support UART boot. > > > > Thanks for reviewing! > > ~Bryan > > > > Changes from v1: [1] > > - squashed all clk and lpsc tree updates into a single commit > > - corrected SOC_K3_AM642 typo with DM firmware Kconfig option > > - updated RM configs and dma nodes to enable IP that need DMA > > - added the dtb targets to the dts/Makefile > > - rebased the series on top of v2024.01-rc1 > > - switched to bootstd rather than use distro boot scripts. > > - enabled OF_UPSTREAM instead of using the arch/arm/dts directory > > > > [0] > > https://lore.kernel.org/u-boot/20240110103547.719757-1-sumit.g...@linaro.org/ > > [1] https://lore.kernel.org/all/20231012230616.2101992-13...@ti.com/ > > > > Bryan Brattlof (11): > > soc: add info to identify the am62p SoC family > > power: domain: ti: use IS_ENABLED macro > > arm: mach-k3: am62px: introduce clock and device files for wkup spl > > ram: k3-ddrss: enable the am62ax's DDR controller for am62px > > arm: mach-k3: invert logic for split DM firmware config > > arch: mach-k3: introduce basic files to support the am62px SoC family > > board: ti: introduce basic board files for the am62px family > > arm: dts: introduce am62p5 uboot dts files > > Makefile: remove hardcoded device tree source directory > > configs: introduce configs needed for the am62px > > doc: board: ti: introduce am62px documentation > > > > Hari Nagalla (1): > > firmware: ti_sci_static_data: add static DMA channel data > > > > Vignesh Raghavendra (1):
Re: [PATCH v2 10/13] arm: dts: introduce am62p5 uboot dts files
Hi Andrew!
On February 2, 2024 thus sayeth Andrew Davis:
> On 1/31/24 9:06 PM, Bryan Brattlof wrote:
> > Include the uboot device tree files needed to boot the board.
> >
> > Signed-off-by: Bryan Brattlof
> > ---
> > arch/arm/dts/Makefile |2 +
> > arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi | 2800
> > arch/arm/dts/k3-am62p-sk-binman.dtsi | 173 ++
> > arch/arm/dts/k3-am62p5-r5-sk.dts | 101 +
> > arch/arm/dts/k3-am62p5-sk-u-boot.dtsi | 49 +
> > arch/arm/mach-k3/Makefile |1 +
> > arch/arm/mach-k3/am62p5_init.c |4 +-
> > dts/arch/arm64/ti |1 +
> > 8 files changed, 3129 insertions(+), 2 deletions(-)
> > create mode 100644 arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi
> > create mode 100644 arch/arm/dts/k3-am62p-sk-binman.dtsi
> > create mode 100644 arch/arm/dts/k3-am62p5-r5-sk.dts
> > create mode 100644 arch/arm/dts/k3-am62p5-sk-u-boot.dtsi
> > create mode 12 dts/arch/arm64/ti
> >
...
> > diff --git a/arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi
> > b/arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi
> > new file mode 100644
> > index 0..f66435201530f
> > --- /dev/null
> > +++ b/arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi
> > @@ -0,0 +1,2800 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * This file was generated with the
> > + * AM62Px SysConfig DDR Subsystem Register Configuration Tool v0.10.02
> > + * Thu Jan 25 2024 10:43:46 GMT-0600 (Central Standard Time)
> > + * DDR Type: LPDDR4
> > + * F0 = 50MHzF1 = NA F2 = 1600MHz
> > + * Density (per channel): 16Gb
> > + * Number of Ranks: 2
> > + */
> > +
> > +#define DDRSS_PLL_FHS_CNT 5
> > +#define DDRSS_PLL_FREQUENCY_1 8
> > +#define DDRSS_PLL_FREQUENCY_2 8
> > +#define DDRSS_SDRAM_IDX 17
> > +#define DDRSS_REGION_IDX 17
> > +
> > +#define DDRSS_CTL_0_DATA 0x0B00
> > +#define DDRSS_CTL_1_DATA 0x
> > +#define DDRSS_CTL_2_DATA 0x
> > +#define DDRSS_CTL_3_DATA 0x
> > +#define DDRSS_CTL_4_DATA 0x
> > +#define DDRSS_CTL_5_DATA 0x
>
> I wonder if it would be better to generate this file
> during build..
>
Yeah we can save a lot of space by removing tons of these registers
writing 0x0 to the reserved ranges... The section for the different PHYs
is particularly aggravating.
I told Simon and Marex last year I'd get to it once I find some free
cycles and then I went and had a son ;) but it's still in the backlog
>
> > +&main_bcdma {
> > + reg = <0x00 0x485c0100 0x00 0x100>,
> > + <0x00 0x4c00 0x00 0x2>,
> > + <0x00 0x4a82 0x00 0x2>,
> > + <0x00 0x4aa4 0x00 0x2>,
> > + <0x00 0x4bc0 0x00 0x10>,
> > + <0x00 0x4860 0x00 0x8000>,
> > + <0x00 0x484a4000 0x00 0x2000>,
> > + <0x00 0x484c2000 0x00 0x2000>;
> > + reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt",
> > + "ringrt", "cfg", "tchan", "rchan";
> > +};
> > +
>
> Do we still need these? Thought they got fixed kernel side already.
Ah you're right I missed that i'll remove this in v2
>
> > +&main_pktdma {
> > + reg = <0x00 0x485c 0x00 0x100>,
> > + <0x00 0x4a80 0x00 0x2>,
> > + <0x00 0x4aa0 0x00 0x4>,
> > + <0x00 0x4b80 0x00 0x40>,
> > + <0x00 0x485e 0x00 0x2>,
> > + <0x00 0x484a 0x00 0x4000>,
> > + <0x00 0x484c 0x00 0x2000>,
> > + <0x00 0x4843 0x00 0x4000>;
> > + reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
> > + "cfg", "tchan", "rchan", "rflow";
> > +};
> > diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile
> > index 42161376469e2..820b313a83c23 100644
> > --- a/arch/arm/mach-k3/Makefile
> > +++ b/arch/arm/mach-k3/Makefile
> > @@ -20,5 +20,6 @@ obj-$(CONFIG_SOC_K3_J721S2) += j721s2_init.o
> > obj-$(CONFIG_SOC_K3_AM642) += am642_init.o
> > obj-$(CONFIG_SOC_K3_AM625) += am625_init.o
> > obj-$(CONFIG_SOC_K3_AM62A7) += am62a7_init.o
> > +obj-$(CONFIG_SOC_K3_AM62P5) += am62p5_init.o
> > endif
> > obj-y += common.o security.o
> > diff --git a/arch/arm/mach-k3/am62p5_init.c b/arch/arm/mach-k3/am62p5_init.c
> > index 5b6795cc7d246..9ff877d5d26e8 100644
> > --- a/arch/arm/mach-k3/am62p5_init.c
> > +++ b/arch/arm/mach-k3/am62p5_init.c
> > @@ -110,7 +110,7 @@ void board_init_f(ulong dummy)
> > * through a SYSFW PM-init step and will need a re-init in some way
> > * due to changing module clock frequencies.
> > */
> > - if (IS_ENABLED(CONFIG_K3_EARLY_CONS))
> > + if (IS_ENABLED(CONFIG_K3_EARLY_CONS)) {
>
> Looks like fixes for a previous patch that didn't get squashed.
>
haha Oops good catch.. I'll fixup this properly
Thanks for the review Andrew
~Bryan
[PATCH v2 10/13] arm: dts: introduce am62p5 uboot dts files
Include the uboot device tree files needed to boot the board. Signed-off-by: Bryan Brattlof --- arch/arm/dts/Makefile |2 + arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi | 2800 arch/arm/dts/k3-am62p-sk-binman.dtsi | 173 ++ arch/arm/dts/k3-am62p5-r5-sk.dts | 101 + arch/arm/dts/k3-am62p5-sk-u-boot.dtsi | 49 + arch/arm/mach-k3/Makefile |1 + arch/arm/mach-k3/am62p5_init.c |4 +- dts/arch/arm64/ti |1 + 8 files changed, 3129 insertions(+), 2 deletions(-) create mode 100644 arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi create mode 100644 arch/arm/dts/k3-am62p-sk-binman.dtsi create mode 100644 arch/arm/dts/k3-am62p5-r5-sk.dts create mode 100644 arch/arm/dts/k3-am62p5-sk-u-boot.dtsi create mode 12 dts/arch/arm64/ti diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 34ebf2b58417d..36de84287d4c2 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1424,6 +1424,8 @@ dtb-$(CONFIG_SOC_K3_AM625) += k3-am625-sk.dtb \ dtb-$(CONFIG_SOC_K3_AM62A7) += k3-am62a7-sk.dtb \ k3-am62a7-r5-sk.dtb +dtb-$(CONFIG_SOC_K3_AM62P5) += k3-am62p5-r5-sk.dtb + dtb-$(CONFIG_ARCH_MEDIATEK) += \ mt7622-rfb.dtb \ mt7623a-unielec-u7623-02-emmc.dtb \ diff --git a/arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi b/arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi new file mode 100644 index 0..f66435201530f --- /dev/null +++ b/arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi @@ -0,0 +1,2800 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * This file was generated with the + * AM62Px SysConfig DDR Subsystem Register Configuration Tool v0.10.02 + * Thu Jan 25 2024 10:43:46 GMT-0600 (Central Standard Time) + * DDR Type: LPDDR4 + * F0 = 50MHzF1 = NA F2 = 1600MHz + * Density (per channel): 16Gb + * Number of Ranks: 2 + */ + +#define DDRSS_PLL_FHS_CNT 5 +#define DDRSS_PLL_FREQUENCY_1 8 +#define DDRSS_PLL_FREQUENCY_2 8 +#define DDRSS_SDRAM_IDX 17 +#define DDRSS_REGION_IDX 17 + +#define DDRSS_CTL_0_DATA 0x0B00 +#define DDRSS_CTL_1_DATA 0x +#define DDRSS_CTL_2_DATA 0x +#define DDRSS_CTL_3_DATA 0x +#define DDRSS_CTL_4_DATA 0x +#define DDRSS_CTL_5_DATA 0x +#define DDRSS_CTL_6_DATA 0x +#define DDRSS_CTL_7_DATA 0x2710 +#define DDRSS_CTL_8_DATA 0x000186A0 +#define DDRSS_CTL_9_DATA 0x0005 +#define DDRSS_CTL_10_DATA 0x0064 +#define DDRSS_CTL_11_DATA 0x0004E200 +#define DDRSS_CTL_12_DATA 0x0030D400 +#define DDRSS_CTL_13_DATA 0x0005 +#define DDRSS_CTL_14_DATA 0x0C80 +#define DDRSS_CTL_15_DATA 0x0004E200 +#define DDRSS_CTL_16_DATA 0x0030D400 +#define DDRSS_CTL_17_DATA 0x0005 +#define DDRSS_CTL_18_DATA 0x0C80 +#define DDRSS_CTL_19_DATA 0x01010100 +#define DDRSS_CTL_20_DATA 0x01010100 +#define DDRSS_CTL_21_DATA 0x01000110 +#define DDRSS_CTL_22_DATA 0x02010002 +#define DDRSS_CTL_23_DATA 0x000A +#define DDRSS_CTL_24_DATA 0x000186A0 +#define DDRSS_CTL_25_DATA 0x +#define DDRSS_CTL_26_DATA 0x +#define DDRSS_CTL_27_DATA 0x +#define DDRSS_CTL_28_DATA 0x +#define DDRSS_CTL_29_DATA 0x00020200 +#define DDRSS_CTL_30_DATA 0x +#define DDRSS_CTL_31_DATA 0x +#define DDRSS_CTL_32_DATA 0x +#define DDRSS_CTL_33_DATA 0x +#define DDRSS_CTL_34_DATA 0x0810 +#define DDRSS_CTL_35_DATA 0x4040 +#define DDRSS_CTL_36_DATA 0x +#define DDRSS_CTL_37_DATA 0x +#define DDRSS_CTL_38_DATA 0x +#define DDRSS_CTL_39_DATA 0x +#define DDRSS_CTL_40_DATA 0x040C +#define DDRSS_CTL_41_DATA 0x +#define DDRSS_CTL_42_DATA 0x0E38 +#define DDRSS_CTL_43_DATA 0x +#define DDRSS_CTL_44_DATA 0x0E38 +#define DDRSS_CTL_45_DATA 0x +#define DDRSS_CTL_46_DATA 0x05000804 +#define DDRSS_CTL_47_DATA 0x0700 +#define DDRSS_CTL_48_DATA 0x09090004 +#define DDRSS_CTL_49_DATA 0x0303 +#define DDRSS_CTL_50_DATA 0x00620011 +#define DDRSS_CTL_51_DATA 0x09110045 +#define DDRSS_CTL_52_DATA 0x421D +#define DDRSS_CTL_53_DATA 0x00620011 +#define DDRSS_CTL_54_DATA 0x09110045 +#define DDRSS_CTL_55_DATA 0x0900421D +#define DDRSS_CTL_56_DATA 0x000A0A09 +#define DDRSS_CTL_57_DATA 0x040006DB +#define DDRSS_CTL_58_DATA 0x090D2005 +#define DDRSS_CTL_59_DATA 0x1710 +#define DDRSS_CTL_60_DATA 0x0C00DB60 +#define DDRSS_CTL_61_DATA 0x090D200D +#define DDRSS_CTL_62_DATA 0x1710 +#define DDRSS_CTL_63_DATA 0x0C00DB60 +#define DDRSS_CTL_64_DATA 0x0304200D +#define DDRSS_CTL_65_DATA 0x04050002 +#define DDRSS_CTL_66_DATA 0x1F1E1F1E +#define DDRSS_CTL_67_DATA 0x01010008 +#define DDRSS_CTL_68_DATA 0x043C3C07 +#define DDRSS_CTL_69_DATA 0x0303 +#define DDRSS_CTL_70_DATA 0x +#define DDRSS_CTL_71_DATA 0x0101 +#define DDRSS_CTL_72_DATA 0x +#define DDRSS_CTL_73_DATA 0x0100 +#define DDRSS_CTL_74_DATA 0x00130803 +#define DDRSS_CTL_75_DATA 0x00BB +#define
[PATCH v2 03/13] arm: mach-k3: am62px: introduce clock and device files for wkup spl
Include the clock and lpsc tree files needed for the wkup spl to
initialize the proper PLLs and power domains to boot the SoC.
Signed-off-by: Bryan Brattlof
---
arch/arm/mach-k3/r5/Makefile | 1 +
arch/arm/mach-k3/r5/am62px/Makefile| 6 +
arch/arm/mach-k3/r5/am62px/clk-data.c | 325 +
arch/arm/mach-k3/r5/am62px/dev-data.c | 71 ++
drivers/clk/ti/clk-k3.c| 6 +
drivers/power/domain/ti-power-domain.c | 6 +
include/k3-clk.h | 1 +
include/k3-dev.h | 1 +
8 files changed, 417 insertions(+)
create mode 100644 arch/arm/mach-k3/r5/am62px/Makefile
create mode 100644 arch/arm/mach-k3/r5/am62px/clk-data.c
create mode 100644 arch/arm/mach-k3/r5/am62px/dev-data.c
diff --git a/arch/arm/mach-k3/r5/Makefile b/arch/arm/mach-k3/r5/Makefile
index b99199d337411..d1cd96d459bc4 100644
--- a/arch/arm/mach-k3/r5/Makefile
+++ b/arch/arm/mach-k3/r5/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_SOC_K3_J721E) += j7200/
obj-$(CONFIG_SOC_K3_J721S2) += j721s2/
obj-$(CONFIG_SOC_K3_AM625) += am62x/
obj-$(CONFIG_SOC_K3_AM62A7) += am62ax/
+obj-$(CONFIG_SOC_K3_AM62P5) += am62px/
obj-y += lowlevel_init.o
obj-y += r5_mpu.o
diff --git a/arch/arm/mach-k3/r5/am62px/Makefile
b/arch/arm/mach-k3/r5/am62px/Makefile
new file mode 100644
index 0..50b0df20a3d1a
--- /dev/null
+++ b/arch/arm/mach-k3/r5/am62px/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+
+obj-y += clk-data.o
+obj-y += dev-data.o
diff --git a/arch/arm/mach-k3/r5/am62px/clk-data.c
b/arch/arm/mach-k3/r5/am62px/clk-data.c
new file mode 100644
index 0..4b9892fe05167
--- /dev/null
+++ b/arch/arm/mach-k3/r5/am62px/clk-data.c
@@ -0,0 +1,325 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * AM62PX specific clock platform data
+ *
+ * This file is auto generated. Please do not hand edit and report any issues
+ * to Bryan Brattlof .
+ *
+ * Copyright (C) 2020-2023 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#include
+#include "k3-clk.h"
+
+static const char * const gluelogic_hfosc0_clkout_parents[] = {
+ NULL,
+ NULL,
+ "osc_24_mhz",
+ "osc_25_mhz",
+ "osc_26_mhz",
+ NULL,
+};
+
+static const char * const clk_32k_rc_sel_out0_parents[] = {
+ "gluelogic_rcosc_clk_1p0v_97p65k",
+ "gluelogic_hfosc0_clkout",
+ "gluelogic_rcosc_clk_1p0v_97p65k",
+ "gluelogic_lfosc0_clkout",
+};
+
+static const char * const main_emmcsd1_io_clklb_sel_out0_parents[] = {
+ "board_0_mmc1_clklb_out",
+ "board_0_mmc1_clk_out",
+};
+
+static const char * const main_ospi_loopback_clk_sel_out0_parents[] = {
+ "board_0_ospi0_dqs_out",
+ "board_0_ospi0_lbclko_out",
+};
+
+static const char * const main_usb0_refclk_sel_out0_parents[] = {
+ "gluelogic_hfosc0_clkout",
+ "postdiv4_16ff_main_0_hsdivout8_clk",
+};
+
+static const char * const main_usb1_refclk_sel_out0_parents[] = {
+ "gluelogic_hfosc0_clkout",
+ "postdiv4_16ff_main_0_hsdivout8_clk",
+};
+
+static const char * const sam62_pll_ctrl_wrap_main_0_sysclkout_clk_parents[] =
{
+ "gluelogic_hfosc0_clkout",
+ "hsdiv4_16fft_main_0_hsdivout0_clk",
+};
+
+static const char * const sam62_pll_ctrl_wrap_mcu_0_sysclkout_clk_parents[] = {
+ "gluelogic_hfosc0_clkout",
+ "hsdiv4_16fft_mcu_0_hsdivout0_clk",
+};
+
+static const char * const clkout0_ctrl_out0_parents[] = {
+ "hsdiv4_16fft_main_2_hsdivout1_clk",
+ "hsdiv4_16fft_main_2_hsdivout1_clk",
+};
+
+static const char * const main_emmcsd0_refclk_sel_out0_parents[] = {
+ "postdiv4_16ff_main_0_hsdivout5_clk",
+ "hsdiv4_16fft_main_2_hsdivout2_clk",
+};
+
+static const char * const main_emmcsd1_refclk_sel_out0_parents[] = {
+ "postdiv4_16ff_main_0_hsdivout5_clk",
+ "hsdiv4_16fft_main_2_hsdivout2_clk",
+};
+
+static const char * const main_gtcclk_sel_out0_parents[] = {
+ "postdiv4_16ff_main_2_hsdivout5_clk",
+ "postdiv4_16ff_main_0_hsdivout6_clk",
+ "board_0_cp_gemac_cpts0_rft_clk_out",
+ NULL,
+ "board_0_mcu_ext_refclk0_out",
+ "board_0_ext_refclk1_out",
+ "sam62_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk",
+ "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk",
+};
+
+static const char * const main_ospi_ref_clk_sel_out0_parents[] = {
+ "hsdiv4_16fft_main_0_hsdivout1_clk",
+ "postdiv1_16fft_main_1_hsdivout5_clk",
+};
+
+static const char * const main_timerclkn_sel_out0_parents[] = {
+ "gluelogic_hfosc0_cl
[PATCH v2 06/13] arch: mach-k3: introduce basic files to support the am62px SoC family
Introduce the basic functions and definitions needed to properly
initialize TI's am62p family of SoCs
Signed-off-by: Bryan Brattlof
---
arch/arm/mach-k3/Kconfig | 7 +-
arch/arm/mach-k3/am62p5_init.c| 280 ++
arch/arm/mach-k3/am62px/Kconfig | 32 ++
.../arm/mach-k3/include/mach/am62p_hardware.h | 83 ++
arch/arm/mach-k3/include/mach/am62p_spl.h | 49 +++
arch/arm/mach-k3/include/mach/hardware.h | 4 +
arch/arm/mach-k3/include/mach/spl.h | 4 +
7 files changed, 458 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/mach-k3/am62p5_init.c
create mode 100644 arch/arm/mach-k3/am62px/Kconfig
create mode 100644 arch/arm/mach-k3/include/mach/am62p_hardware.h
create mode 100644 arch/arm/mach-k3/include/mach/am62p_spl.h
diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index 0574e81075e6d..02a9c423ecdb8 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -22,6 +22,9 @@ config SOC_K3_AM625
config SOC_K3_AM62A7
bool "TI's K3 based AM62A7 SoC Family Support"
+config SOC_K3_AM62P5
+ bool "TI's K3 based AM62P5 SoC Family Support"
+
endchoice
if SOC_K3_J721E
@@ -34,7 +37,7 @@ config SYS_SOC
config SYS_K3_NON_SECURE_MSRAM_SIZE
hex
- default 0x8 if SOC_K3_AM654
+ default 0x8 if SOC_K3_AM654 || SOC_K3_AM62P5
default 0x10 if SOC_K3_J721E || SOC_K3_J721S2
default 0x1c if SOC_K3_AM642
default 0x3c000 if SOC_K3_AM625 || SOC_K3_AM62A7
@@ -78,6 +81,7 @@ config SYS_K3_BOOT_PARAM_TABLE_INDEX
default 0x43c3f290 if SOC_K3_AM625
default 0x43c3f290 if SOC_K3_AM62A7 && CPU_V7R
default 0x7000f290 if SOC_K3_AM62A7 && ARM64
+ default 0x43c4f290 if SOC_K3_AM62P5
help
Address at which ROM stores the value which determines if SPL
is booted up by primary boot media or secondary boot media.
@@ -153,6 +157,7 @@ source "arch/arm/mach-k3/am65x/Kconfig"
source "arch/arm/mach-k3/am64x/Kconfig"
source "arch/arm/mach-k3/am62x/Kconfig"
source "arch/arm/mach-k3/am62ax/Kconfig"
+source "arch/arm/mach-k3/am62px/Kconfig"
source "arch/arm/mach-k3/j721e/Kconfig"
source "arch/arm/mach-k3/j721s2/Kconfig"
diff --git a/arch/arm/mach-k3/am62p5_init.c b/arch/arm/mach-k3/am62p5_init.c
new file mode 100644
index 0..5b6795cc7d246
--- /dev/null
+++ b/arch/arm/mach-k3/am62p5_init.c
@@ -0,0 +1,280 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * AM62P5: SoC specific initialization
+ *
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#include
+#include
+#include
+#include "sysfw-loader.h"
+#include "common.h"
+#include
+#include
+#include
+
+struct fwl_data cbass_main_fwls[] = {
+ { "FSS_DAT_REG3", 7, 8 },
+};
+
+/*
+ * This uninitialized global variable would normal end up in the .bss section,
+ * but the .bss is cleared between writing and reading this variable, so move
+ * it to the .data section.
+ */
+u32 bootindex __section(".data");
+static struct rom_extended_boot_data bootdata __section(".data");
+
+static void store_boot_info_from_rom(void)
+{
+ bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
+ memcpy(&bootdata, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
+ sizeof(struct rom_extended_boot_data));
+}
+
+static void ctrl_mmr_unlock(void)
+{
+ /* Unlock all WKUP_CTRL_MMR0 module registers */
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 0);
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 1);
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 2);
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 3);
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 4);
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 5);
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 6);
+ mmr_unlock(WKUP_CTRL_MMR0_BASE, 7);
+
+ /* Unlock all CTRL_MMR0 module registers */
+ mmr_unlock(CTRL_MMR0_BASE, 0);
+ mmr_unlock(CTRL_MMR0_BASE, 1);
+ mmr_unlock(CTRL_MMR0_BASE, 2);
+ mmr_unlock(CTRL_MMR0_BASE, 4);
+ mmr_unlock(CTRL_MMR0_BASE, 5);
+ mmr_unlock(CTRL_MMR0_BASE, 6);
+
+ /* Unlock all MCU_CTRL_MMR0 module registers */
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 0);
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 1);
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 2);
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 3);
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 4);
+ mmr_unlock(MCU_CTRL_MMR0_BASE, 6);
+
+ /* Unlock PADCFG_CTRL_MMR padconf registers */
+ mmr_unlock(PADCFG_MMR0_BASE, 1);
+ mmr_unlock(PADCFG_MMR1_BASE, 1);
+}
+
+void board_init_f(ulong dummy)
+{
+ struct udevice *dev;
+ int ret;
+
+ if (IS_ENABLED(CONFIG_CPU_V7R))
+ setup_k3_mpu_regions();
+
+ /*
+* Cannot delay this further as there is a chance that
[PATCH v2 07/13] board: ti: introduce basic board files for the am62px family
Introduce the basic files needed to support the am62px family of SoCs
Co-developed-by: Hari Hagalla
Signed-off-by: Hari Hagalla
Signed-off-by: Bryan Brattlof
---
board/ti/am62px/Kconfig | 26 +
board/ti/am62px/MAINTAINERS | 9 +
board/ti/am62px/Makefile | 7 +
board/ti/am62px/am62px.env | 16 +
board/ti/am62px/board-cfg.yaml | 37 ++
board/ti/am62px/evm.c| 29 +
board/ti/am62px/pm-cfg.yaml | 12 +
board/ti/am62px/rm-cfg.yaml | 987 +++
board/ti/am62px/sec-cfg.yaml | 378
board/ti/am62px/tifs-rm-cfg.yaml | 879 +++
10 files changed, 2380 insertions(+)
create mode 100644 board/ti/am62px/Kconfig
create mode 100644 board/ti/am62px/MAINTAINERS
create mode 100644 board/ti/am62px/Makefile
create mode 100644 board/ti/am62px/am62px.env
create mode 100644 board/ti/am62px/board-cfg.yaml
create mode 100644 board/ti/am62px/evm.c
create mode 100644 board/ti/am62px/pm-cfg.yaml
create mode 100644 board/ti/am62px/rm-cfg.yaml
create mode 100644 board/ti/am62px/sec-cfg.yaml
create mode 100644 board/ti/am62px/tifs-rm-cfg.yaml
diff --git a/board/ti/am62px/Kconfig b/board/ti/am62px/Kconfig
new file mode 100644
index 0..9d95ffd9b2908
--- /dev/null
+++ b/board/ti/am62px/Kconfig
@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+
+if TARGET_AM62P5_R5_EVM || TARGET_AM62P5_A53_EVM
+
+config SYS_BOARD
+ default "am62px"
+
+config SYS_VENDOR
+ default "ti"
+
+config SYS_CONFIG_NAME
+ default "am62px_evm"
+
+source "board/ti/common/Kconfig"
+
+endif
+
+if TARGET_AM62P5_R5_EVM
+
+config SPL_LDSCRIPT
+ default "arch/arm/mach-omap2/u-boot-spl.lds"
+
+endif
diff --git a/board/ti/am62px/MAINTAINERS b/board/ti/am62px/MAINTAINERS
new file mode 100644
index 0..57c86ddbc4aef
--- /dev/null
+++ b/board/ti/am62px/MAINTAINERS
@@ -0,0 +1,9 @@
+AM62Px BOARD
+M: Vignesh Raghavendra
+M: Bryan Brattlof
+M: Tom Rini
+S: Maintained
+F: board/ti/am62px/
+F: include/configs/am62p5_evm.h
+F: configs/am62px_evm_r5_defconfig
+F: configs/am62px_evm_a53_defconfig
diff --git a/board/ti/am62px/Makefile b/board/ti/am62px/Makefile
new file mode 100644
index 0..921afdff27a24
--- /dev/null
+++ b/board/ti/am62px/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += evm.o
diff --git a/board/ti/am62px/am62px.env b/board/ti/am62px/am62px.env
new file mode 100644
index 0..e982c8104c192
--- /dev/null
+++ b/board/ti/am62px/am62px.env
@@ -0,0 +1,16 @@
+#include
+#include
+#include
+
+name_kern=Image
+console=ttyS2,115200n8
+args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x0280
+ ${mtdparts}
+run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}
+
+boot_targets=mmc1 pxe dhcp
+boot=mmc
+mmcdev=1
+bootpart=1:2
+bootdir=/boot
+rd_spec=-
diff --git a/board/ti/am62px/board-cfg.yaml b/board/ti/am62px/board-cfg.yaml
new file mode 100644
index 0..d539011aff9f3
--- /dev/null
+++ b/board/ti/am62px/board-cfg.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for AM62Px SoCs
+#
+
+---
+
+board-cfg:
+rev:
+boardcfg_abi_maj: 0x0
+boardcfg_abi_min: 0x1
+control:
+subhdr:
+magic: 0xC1D3
+size: 7
+main_isolation_enable: 0x5A
+main_isolation_hostid: 0x2
+secproxy:
+subhdr:
+magic: 0x1207
+size: 7
+scaling_factor: 0x1
+scaling_profile: 0x1
+disable_main_nav_secure_proxy: 0
+msmc:
+subhdr:
+magic: 0xA5C3
+size: 5
+msmc_cache_size: 0x10
+debug_cfg:
+subhdr:
+magic: 0x020C
+size: 8
+trace_dst_enables: 0x00
+trace_src_enables: 0x00
diff --git a/board/ti/am62px/evm.c b/board/ti/am62px/evm.c
new file mode 100644
index 0..97a95ce8cc2d5
--- /dev/null
+++ b/board/ti/am62px/evm.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Board specific initialization for AM62Px platforms
+ *
+ * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ return fdtdec_setup_mem_size_base();
+}
+
+int dram_init_banksize(void)
+{
+ return fdtdec_setup_memory_banksize();
+}
diff --git a/board/ti/am62px/pm-cfg.yaml b/board/ti/am62px/pm-cfg.yaml
new file mode 100644
index 0..3ff27ce702c26
--- /dev/null
+++ b/board/ti/am62px/pm-cfg.yaml
@@ -0,0 +1,12 @@
+#
[PATCH v2 05/13] arm: mach-k3: invert logic for split DM firmware config
Currently, for the K3 generation of SoCs, there are more SoCs that utilize the split firmware approach than the combined DMSC firmware. Invert the logic to avoid adding more and more SoCs to this list. Signed-off-by: Bryan Brattlof --- arch/arm/mach-k3/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig index 03898424c9546..0574e81075e6d 100644 --- a/arch/arm/mach-k3/Kconfig +++ b/arch/arm/mach-k3/Kconfig @@ -130,7 +130,7 @@ config K3_ATF_LOAD_ADDR config K3_DM_FW bool "Separate DM firmware image" - depends on CPU_V7R && (SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_AM625 || SOC_K3_AM62A7) && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN + depends on CPU_V7R && ARCH_K3 && !SOC_K3_AM642 && !SOC_K3_AM654 && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN default y help Enabling this will indicate that the system has separate DM -- 2.43.0
[PATCH v2 11/13] Makefile: remove hardcoded device tree source directory
Some boards that choose to utilize the OF_UPSTREAM directory for their device tree files will need to specify that directory instead of the traditional arch/$(ARCH)/dts/* path. Include the correct path to the board's dtbs depending on if OF_UPSTREAM is selected or not. Signed-off-by: Bryan Brattlof --- Makefile | 18 ++ scripts/Makefile.spl | 17 + 2 files changed, 27 insertions(+), 8 deletions(-) diff --git a/Makefile b/Makefile index 996a43c8624ae..f81d09c892b80 100644 --- a/Makefile +++ b/Makefile @@ -1184,6 +1184,16 @@ dt_binding_check: scripts_dtc quiet_cmd_copy = COPY$@ cmd_copy = cp $< $@ +ifeq ($(CONFIG_OF_UPSTREAM),y) +ifeq ($(CONFIG_ARM64),y) +dt_dir := dts/upstream/src/arm64 +else +dt_dir := dts/upstream/src/$(ARCH) +endif +else +dt_dir := arch/$(ARCH)/dts +endif + ifeq ($(CONFIG_MULTI_DTB_FIT),y) ifeq ($(CONFIG_MULTI_DTB_FIT_LZO),y) @@ -1209,7 +1219,7 @@ endif MKIMAGEFLAGS_fit-dtb.blob = -f auto -A $(ARCH) -T firmware -C none -O u-boot \ -a 0 -e 0 -E \ - $(patsubst %,-b arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) -d /dev/null + $(patsubst %,-b $(dt_dir)/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) -d /dev/null MKIMAGEFLAGS_fit-dtb.blob += -B 0x8 @@ -1407,9 +1417,9 @@ MKIMAGEFLAGS_u-boot.img = -f auto -A $(ARCH) -T firmware -C none -O u-boot \ -a $(CONFIG_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \ -p $(CONFIG_FIT_EXTERNAL_OFFSET) \ -n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" -E \ - $(patsubst %,-b arch/$(ARCH)/dts/%.dtb,$(subst ",,$(DEVICE_TREE))) \ - $(patsubst %,-b arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) \ - $(patsubst %,-b arch/$(ARCH)/dts/%.dtbo,$(subst ",,$(CONFIG_OF_OVERLAY_LIST))) + $(patsubst %,-b $(dt_dir)/%.dtb,$(subst ",,$(DEVICE_TREE))) \ + $(patsubst %,-b $(dt_dir)/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) \ + $(patsubst %,-b $(dt_dir)/%.dtbo,$(subst ",,$(CONFIG_OF_OVERLAY_LIST))) else MKIMAGEFLAGS_u-boot.img = -A $(ARCH) -T firmware -C none -O u-boot \ -a $(CONFIG_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \ diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index 407fc52376a50..d074ba2350065 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -559,9 +559,15 @@ FORCE: $(obj)/dts/dt-$(SPL_NAME).dtb: dts/dt.dtb $(Q)$(MAKE) $(build)=$(obj)/dts spl_dtbs -PHONY += dts_dir -dts_dir: - $(shell [ -d $(obj)/dts ] || mkdir -p $(obj)/dts) +ifeq ($(CONFIG_OF_UPSTREAM),y) +ifeq ($(CONFIG_ARM64),y) +dt_dir := dts/upstream/src/arm64 +else +dt_dir := dts/upstream/src/$(ARCH) +endif +else +dt_dir := arch/$(ARCH)/dts +endif # Declare the contents of the .PHONY variable as phony. We keep that # information in a variable so we can use it in if_changed and friends. @@ -569,8 +575,11 @@ dts_dir: SPL_OF_LIST_TARGETS = $(patsubst %,dts/%.dtb,$(subst ",,$(CONFIG_SPL_OF_LIST))) SHRUNK_ARCH_DTB = $(addprefix $(obj)/,$(SPL_OF_LIST_TARGETS)) +$(dir $(SHRUNK_ARCH_DTB)): + $(shell [ -d $@ ] || mkdir -p $@) + .SECONDEXPANSION: -$(SHRUNK_ARCH_DTB): $$(patsubst $(obj)/dts/%, arch/$(ARCH)/dts/%, $$@) dts_dir +$(SHRUNK_ARCH_DTB): $$(patsubst $(obj)/dts/%, $(dt_dir)/%, $$@) $(dir $(SHRUNK_ARCH_DTB)) $(call if_changed,fdtgrep) targets += $(SPL_OF_LIST_TARGETS) -- 2.43.0
[PATCH v2 08/13] firmware: ti_sci_static_data: add static DMA channel data
From: Hari Nagalla
Include the static DMA channel data for ti_sci
Signed-off-by: Hari Nagalla
Signed-off-by: Bryan Brattlof
---
drivers/firmware/ti_sci_static_data.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/firmware/ti_sci_static_data.h
b/drivers/firmware/ti_sci_static_data.h
index 567ce8911a7da..135ec01bda460 100644
--- a/drivers/firmware/ti_sci_static_data.h
+++ b/drivers/firmware/ti_sci_static_data.h
@@ -84,7 +84,8 @@ static struct ti_sci_resource_static_data rm_static_data[] = {
};
#endif /* CONFIG_SOC_K3_J721S2 */
-#if IS_ENABLED(CONFIG_SOC_K3_AM625) || IS_ENABLED(CONFIG_SOC_K3_AM62A7)
+#if IS_ENABLED(CONFIG_SOC_K3_AM625) || IS_ENABLED(CONFIG_SOC_K3_AM62A7) || \
+ IS_ENABLED(CONFIG_SOC_K3_AM62P5)
static struct ti_sci_resource_static_data rm_static_data[] = {
/* BC channels */
{
@@ -95,7 +96,7 @@ static struct ti_sci_resource_static_data rm_static_data[] = {
},
{ },
};
-#endif /* CONFIG_SOC_K3_AM625 || CONFIG_SOC_K3_AM62A7 */
+#endif /* CONFIG_SOC_K3_AM625 || CONFIG_SOC_K3_AM62A7 || CONFIG_SOC_K3_AM62P5
*/
#else
static struct ti_sci_resource_static_data rm_static_data[] = {
--
2.43.0
[PATCH v2 09/13] dma: ti: k3-udma: Add DMA PSIL mappings for AM62P and J722S
From: Vignesh Raghavendra
Add PSIL data for the AM62P and the J722S SoC family. The PSIL mapping
for the J722S is the same except for the extra instances of the CSI-RX.
So let's reuse the same file for both the AM62P and J722S.
Signed-off-by: Vignesh Raghavendra
Signed-off-by: Ravi Gunasekaran
Signed-off-by: Vaishnav Achath
Signed-off-by: Jayesh Choudhary
[b...@ti.com: rebased to U-Boot v2024.01]
Signed-off-by: Bryan Brattlof
---
drivers/dma/ti/Makefile| 2 +
drivers/dma/ti/k3-psil-am62p.c | 325 +
drivers/dma/ti/k3-psil-priv.h | 1 +
drivers/dma/ti/k3-psil.c | 4 +
4 files changed, 332 insertions(+)
create mode 100644 drivers/dma/ti/k3-psil-am62p.c
diff --git a/drivers/dma/ti/Makefile b/drivers/dma/ti/Makefile
index f4e0271efbf32..17223b20432da 100644
--- a/drivers/dma/ti/Makefile
+++ b/drivers/dma/ti/Makefile
@@ -9,3 +9,5 @@ k3-psil-data-$(CONFIG_SOC_K3_J721S2) += k3-psil-j721s2.o
k3-psil-data-$(CONFIG_SOC_K3_AM642) += k3-psil-am64.o
k3-psil-data-$(CONFIG_SOC_K3_AM625) += k3-psil-am62.o
k3-psil-data-$(CONFIG_SOC_K3_AM62A7) += k3-psil-am62a.o
+k3-psil-data-$(CONFIG_SOC_K3_AM62P5) += k3-psil-am62p.o
+k3-psil-data-$(CONFIG_SOC_K3_J722S) += k3-psil-am62p.o
diff --git a/drivers/dma/ti/k3-psil-am62p.c b/drivers/dma/ti/k3-psil-am62p.c
new file mode 100644
index 0..8739bf41b5b7c
--- /dev/null
+++ b/drivers/dma/ti/k3-psil-am62p.c
@@ -0,0 +1,325 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com
+ */
+
+#include
+
+#include "k3-psil-priv.h"
+
+#define PSIL_PDMA_XY_TR(x) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_PDMA_XY, \
+ .mapped_channel_id = -1,\
+ .default_flow_id = -1, \
+ }, \
+ }
+
+#define PSIL_PDMA_XY_PKT(x)\
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_PDMA_XY, \
+ .mapped_channel_id = -1,\
+ .default_flow_id = -1, \
+ .pkt_mode = 1, \
+ }, \
+ }
+
+#define PSIL_ETHERNET(x, ch, flow_base, flow_cnt) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_NATIVE, \
+ .pkt_mode = 1, \
+ .needs_epib = 1,\
+ .psd_size = 16, \
+ .mapped_channel_id = ch,\
+ .flow_start = flow_base,\
+ .flow_num = flow_cnt, \
+ .default_flow_id = flow_base, \
+ }, \
+ }
+
+#define PSIL_SAUL(x, ch, flow_base, flow_cnt, default_flow, tx)\
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_NATIVE, \
+ .pkt_mode = 1, \
+ .needs_epib = 1,\
+ .psd_size = 64, \
+ .mapped_channel_id = ch,\
+ .flow_start = flow_base,\
+ .flow_num = flow_cnt, \
+ .default_flow_id = default_flow,\
+ .notdpkt = tx, \
+ }, \
+ }
+
+#define PSIL_PDMA_MCASP(x) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_PDMA_XY, \
+ .pdma_acc32 = 1,\
+
[PATCH v2 13/13] doc: board: ti: introduce am62px documentation
Introduce basic documentation for the am62p family of SoCs. Signed-off-by: Bryan Brattlof --- doc/board/ti/am62px_sk.rst | 289 + doc/board/ti/k3.rst| 1 + 2 files changed, 290 insertions(+) create mode 100644 doc/board/ti/am62px_sk.rst diff --git a/doc/board/ti/am62px_sk.rst b/doc/board/ti/am62px_sk.rst new file mode 100644 index 0..1f2982c36f9e4 --- /dev/null +++ b/doc/board/ti/am62px_sk.rst @@ -0,0 +1,289 @@ +.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +.. sectionauthor:: Bryan Brattlof + +AM62Px Platforms + + +The AM62Px is an extension of the existing Sitara AM62x low-cost family +of application processors built for Automotive and Linux Application +development. Scalable Arm Cortex-A53 performance and embedded features, +such as: multi high-definition display support, 3D-graphics +acceleration, 4K video acceleration, and extensive peripherals make the +AM62Px well-suited for a broad range of automation and industrial +application, including automotive digital instrumentation, automotive +displays, industrial HMI, and more. + +Some highlights of AM62P SoC are: + +* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster. + Dual/Single core variants are provided in the same package to allow HW + compatible designs. + +* One Device manager Cortex-R5F for system power and resource + management, and one Cortex-R5F for Functional Safety or + general-purpose usage. + +* One 3D GPU up to 50 GLFOPS + +* H.264/H.265 Video Encode/Decode. + +* Display support: 3x display support over OLDI/LVDS (1x OLDI-DL, 1x or + 2x OLDI-SL), DSI, or DPI. Up to 3840x1080 @ 60fps resolution + +* Integrated Giga-bit Ethernet switch supporting up to a total of two + external ports (TSN capable). + +* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3xMMC and SD, GPMC for + NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio, + 1xCSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals. + +* Dedicated Centralized Hardware Security Module with support for secure + boot, debug security and crypto acceleration and trusted execution + environment. + +* One 32-bit DDR Subsystem that supports LPDDR4, DDR4 memory types. + +* Multiple low power modes support, ex: Deep sleep, Standby, MCU-only, + enabling battery powered system design. + +For those interested, more details about this SoC can be found in the +Technical Reference Manual here: https://www.ti.com/lit/pdf/spruj83 + +Boot Flow: +-- + +The bootflow is exactly the same as all SoCs in the am62xxx extended SoC +family. Below is the pictorial representation: + +.. image:: img/boot_diagram_k3_current.svg + :alt: Boot flow diagram + +- Here TIFS acts as master and provides all the critical services. R5/A53 + requests TIFS to get these services done as shown in the above diagram. + +Sources: + + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_boot_sources +:end-before: .. k3_rst_include_end_boot_sources + +Build procedure: + + +0. Setup the environment variables: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_common_env_vars_desc +:end-before: .. k3_rst_include_end_common_env_vars_desc + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_board_env_vars_desc +:end-before: .. k3_rst_include_end_board_env_vars_desc + +Set the variables corresponding to this platform: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_common_env_vars_defn +:end-before: .. k3_rst_include_end_common_env_vars_defn + +.. code-block:: bash + + $ export UBOOT_CFG_CORTEXR=am62px_evm_r5_defconfig + $ export UBOOT_CFG_CORTEXA=am62px_evm_a53_defconfig + $ export TFA_BOARD=lite + $ # we dont use any extra TFA parameters + $ unset TFA_EXTRA_ARGS + $ export OPTEE_PLATFORM=k3-am62x + $ export OPTEE_EXTRA_ARGS="CFG_WITH_SOFTWARE_PRNG=y" + +.. am62px_evm_rst_include_start_build_steps + +1. Trusted Firmware-A: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_build_steps_tfa +:end-before: .. k3_rst_include_end_build_steps_tfa + + +2. OP-TEE: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_build_steps_optee +:end-before: .. k3_rst_include_end_build_steps_optee + +3. U-Boot: + +* 3.1 R5: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_build_steps_spl_r5 +:end-before: .. k3_rst_include_end_build_steps_spl_r5 + +* 3.2 A53: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_build_steps_uboot +:end-before: .. k3_rst_include_end_build_steps_uboot +.. am62px_evm_rst_include_end_build_steps + +Target Images +-- + +In order to boot we need tiboot3.bin, tispl.bin and u-boot.img. Each SoC +variant (HS-FS, HS-SE) requires a different source for these files. + + - HS-FS + +* tiboot3-am62px-hs-fs-evm.bin from step 3.1 +* tispl.bin, u-boot.img
[PATCH v2 02/13] power: domain: ti: use IS_ENABLED macro
Cleanup this list and standardize on using the IS_ENABLED macro for the
power domain data list.
Signed-off-by: Bryan Brattlof
---
drivers/power/domain/ti-power-domain.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/power/domain/ti-power-domain.c
b/drivers/power/domain/ti-power-domain.c
index b34c982f4f5fa..dc5d74539edcf 100644
--- a/drivers/power/domain/ti-power-domain.c
+++ b/drivers/power/domain/ti-power-domain.c
@@ -81,19 +81,20 @@ static const struct soc_attr ti_k3_soc_pd_data[] = {
.family = "J7200",
.data = &j7200_pd_platdata,
},
-#elif CONFIG_SOC_K3_J721S2
+#endif
+#if IS_ENABLED(CONFIG_SOC_K3_J721S2)
{
.family = "J721S2",
.data = &j721s2_pd_platdata,
},
#endif
-#ifdef CONFIG_SOC_K3_AM625
+#if IS_ENABLED(CONFIG_SOC_K3_AM625)
{
.family = "AM62X",
.data = &am62x_pd_platdata,
},
#endif
-#ifdef CONFIG_SOC_K3_AM62A7
+#if IS_ENABLED(CONFIG_SOC_K3_AM62A7)
{
.family = "AM62AX",
.data = &am62ax_pd_platdata,
--
2.43.0
[PATCH v2 00/13] Introduce basic support for TI's AM62Px SoC family
Hello Again Everyone! **Note:** This series depends on the OF_UPSTREAM work from Sumit [0]. Patch #11 was added to fix some Makefile.spl targets to allow SPL builds to complete with the OF_UPSTREAM series. The AM62Px is an extension of the existing Sitara AM62x low-cost family of application processors built for Automotive and Linux Application development. Scalable Arm Cortex-A53 performance and embedded features, such as: multi high-definition display support, 3D-graphics acceleration, 4K video acceleration, and extensive peripherals make the AM62Px well-suited for a broad range of automation and industrial application, including automotive digital instrumentation, automotive displays, industrial HMI, and more. Some highlights of AM62P SoC are: * Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster. Dual/Single core variants are provided in the same package to allow HW compatible designs. * One Device manager Cortex-R5F for system power and resource management, and one Cortex-R5F for Functional Safety or general-purpose usage. * One 3D GPU up to 50 GLFOPS * H.264/H.265 Video Encode/Decode. * Display support: 3x display support over OLDI/LVDS (1x OLDI-DL, 1x or 2x OLDI-SL), DSI, or DPI. Up to 3840x1080 @ 60fps resolution * Integrated Giga-bit Ethernet switch supporting up to a total of two external ports (TSN capable). * 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3xMMC and SD, GPMC for NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio, 1xCSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals. * Dedicated Centralized Hardware Security Module with support for secure boot, debug security and crypto acceleration and trusted execution environment. * One 32-bit DDR Subsystem that supports LPDDR4, DDR4 memory types. * Multiple low power modes support, ex: Deep sleep, Standby, MCU-only, enabling battery powered system design. For those interested, more details about this SoC can be found in the Technical Reference Manual here: https://www.ti.com/lit/pdf/spruj83 Proof-of-Life: https://paste.sr.ht/~bryanb/af2ac108a9362549aa326f182e87918d52bf2d71 Currently, while more peripherals are being added in Linux[0], this series will only support UART boot. Thanks for reviewing! ~Bryan Changes from v1: [1] - squashed all clk and lpsc tree updates into a single commit - corrected SOC_K3_AM642 typo with DM firmware Kconfig option - updated RM configs and dma nodes to enable IP that need DMA - added the dtb targets to the dts/Makefile - rebased the series on top of v2024.01-rc1 - switched to bootstd rather than use distro boot scripts. - enabled OF_UPSTREAM instead of using the arch/arm/dts directory [0] https://lore.kernel.org/u-boot/20240110103547.719757-1-sumit.g...@linaro.org/ [1] https://lore.kernel.org/all/20231012230616.2101992-13...@ti.com/ Bryan Brattlof (11): soc: add info to identify the am62p SoC family power: domain: ti: use IS_ENABLED macro arm: mach-k3: am62px: introduce clock and device files for wkup spl ram: k3-ddrss: enable the am62ax's DDR controller for am62px arm: mach-k3: invert logic for split DM firmware config arch: mach-k3: introduce basic files to support the am62px SoC family board: ti: introduce basic board files for the am62px family arm: dts: introduce am62p5 uboot dts files Makefile: remove hardcoded device tree source directory configs: introduce configs needed for the am62px doc: board: ti: introduce am62px documentation Hari Nagalla (1): firmware: ti_sci_static_data: add static DMA channel data Vignesh Raghavendra (1): dma: ti: k3-udma: Add DMA PSIL mappings for AM62P and J722S Makefile | 18 +- arch/arm/dts/Makefile |2 + arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi| 2800 + arch/arm/dts/k3-am62p-sk-binman.dtsi | 173 + arch/arm/dts/k3-am62p5-r5-sk.dts | 101 + arch/arm/dts/k3-am62p5-sk-u-boot.dtsi | 49 + arch/arm/mach-k3/Kconfig |9 +- arch/arm/mach-k3/Makefile |1 + arch/arm/mach-k3/am62p5_init.c| 280 ++ arch/arm/mach-k3/am62px/Kconfig | 32 + .../arm/mach-k3/include/mach/am62p_hardware.h | 83 + arch/arm/mach-k3/include/mach/am62p_spl.h | 49 + arch/arm/mach-k3/include/mach/hardware.h |6 + arch/arm/mach-k3/include/mach/spl.h |4 + arch/arm/mach-k3/r5/Makefile |1 + arch/arm/mach-k3/r5/am62px/Makefile |6 + arch/arm/mach-k3/r5/am62px/clk-data.c | 325 ++ arch/arm/mach-k3/r5/am62px/dev-data.c | 71 + board/ti/am62px/Kconfig | 26 + board/ti/am62px/MAINTAINERS |9 + board/ti/am62px/Makefile |7 + board/ti/am62px/am62px.env| 16 + board/ti/am62px/board-cfg.yaml| 37 + board/ti/am62px/
[PATCH v2 01/13] soc: add info to identify the am62p SoC family
Include the part number for TI's am62px family of SoCs so we can properly identify it during boot Signed-off-by: Bryan Brattlof --- arch/arm/mach-k3/include/mach/hardware.h | 2 ++ drivers/soc/soc_ti_k3.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/arch/arm/mach-k3/include/mach/hardware.h b/arch/arm/mach-k3/include/mach/hardware.h index a1a9dfbde66c8..040288150b12f 100644 --- a/arch/arm/mach-k3/include/mach/hardware.h +++ b/arch/arm/mach-k3/include/mach/hardware.h @@ -46,6 +46,7 @@ #define JTAG_ID_PARTNO_J721S2 0xbb75 #define JTAG_ID_PARTNO_AM62X 0xbb7e #define JTAG_ID_PARTNO_AM62AX 0xbb8d +#define JTAG_ID_PARTNO_AM62PX 0xbb9d #define K3_SOC_ID(id, ID) \ static inline bool soc_is_##id(void) \ @@ -61,6 +62,7 @@ K3_SOC_ID(am64x, AM64X) K3_SOC_ID(j721s2, J721S2) K3_SOC_ID(am62x, AM62X) K3_SOC_ID(am62ax, AM62AX) +K3_SOC_ID(am62px, AM62PX) #define K3_SEC_MGR_SYS_STATUS 0x44234100 #define SYS_STATUS_DEV_TYPE_SHIFT 0 diff --git a/drivers/soc/soc_ti_k3.c b/drivers/soc/soc_ti_k3.c index 355a5368dd45a..d7d0152b115fa 100644 --- a/drivers/soc/soc_ti_k3.c +++ b/drivers/soc/soc_ti_k3.c @@ -45,6 +45,9 @@ static const char *get_family_string(u32 idreg) case JTAG_ID_PARTNO_AM62AX: family = "AM62AX"; break; + case JTAG_ID_PARTNO_AM62PX: + family = "AM62PX"; + break; default: family = "Unknown Silicon"; }; -- 2.43.0
[PATCH v2 12/13] configs: introduce configs needed for the am62px
Introduce the initial configs needed to support the am62px SoC family Signed-off-by: Bryan Brattlof --- configs/am62px_evm_a53_defconfig | 178 +++ configs/am62px_evm_r5_defconfig | 137 include/configs/am62px_evm.h | 14 +++ 3 files changed, 329 insertions(+) create mode 100644 configs/am62px_evm_a53_defconfig create mode 100644 configs/am62px_evm_r5_defconfig create mode 100644 include/configs/am62px_evm.h diff --git a/configs/am62px_evm_a53_defconfig b/configs/am62px_evm_a53_defconfig new file mode 100644 index 0..bd8002108b10c --- /dev/null +++ b/configs/am62px_evm_a53_defconfig @@ -0,0 +1,178 @@ +CONFIG_ARM=y +CONFIG_ARCH_K3=y +CONFIG_TI_SECURE_DEVICE=y +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_SOC_K3_AM62P5=y +CONFIG_K3_ATF_LOAD_ADDR=0x9e78 +CONFIG_TARGET_AM62P5_A53_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8048 +CONFIG_SF_DEFAULT_SPEED=2500 +CONFIG_ENV_SIZE=0x4 +CONFIG_DM_GPIO=y +CONFIG_SPL_DM_SPI=y +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am62p5-sk" +CONFIG_SPL_TEXT_BASE=0x8008 +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_DM_RESET=y +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK_R_ADDR=0x8200 +CONFIG_SPL_FS_FAT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x8100 +CONFIG_BOOTSTD_FULL=y +CONFIG_BOOTSTD_DEFAULTS=y +CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb" +CONFIG_SPL_MAX_SIZE=0x58000 +CONFIG_SPL_PAD_TO=0x0 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x80a0 +CONFIG_SPL_BSS_MAX_SIZE=0x8 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_STACK_R=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 +CONFIG_SPL_DMA=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" +CONFIG_SPL_I2C=y +CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_DM_SPI_FLASH=y +CONFIG_SPL_POWER_DOMAIN=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +# CONFIG_SPL_SPI_FLASH_TINY is not set +CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x28 +CONFIG_SPL_THERMAL=y +CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_MAXARGS=64 +CONFIG_CMD_CLK=y +CONFIG_CMD_DFU=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_REMOTEPROC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_MTDPARTS=y +CONFIG_CMD_UBI=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_MULTI_DTB_FIT=y +CONFIG_SPL_MULTI_DTB_FIT=y +CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_DEVICE_REMOVE=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_OF_TRANSLATE=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_CLK_TI_SCI=y +CONFIG_DFU_MMC=y +CONFIG_DFU_MTD=y +CONFIG_DFU_RAM=y +CONFIG_DFU_SF=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x4 +CONFIG_SYS_DFU_MAX_FILE_SIZE=0x80 +CONFIG_DMA_CHANNELS=y +CONFIG_TI_K3_NAVSS_UDMA=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0xC000 +CONFIG_FASTBOOT_BUF_SIZE=0x2F00 +CONFIG_TI_SCI_PROTOCOL=y +CONFIG_SPL_DM_GPIO_LOOKUP_LABEL=y +CONFIG_DA8XX_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_SPL_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_OMAP24XX=y +CONFIG_DM_MAILBOX=y +CONFIG_K3_SEC_PROXY=y +CONFIG_I2C_EEPROM=y +CONFIG_SPL_I2C_EEPROM=y +CONFIG_FS_LOADER=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_SPL_MMC_IO_VOLTAGE=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_SPL_MMC_HS400_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ADMA=y +CONFIG_SPL_MMC_SDHCI_ADMA=y +CONFIG_MMC_SDHCI_AM654=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_SPI_NAND=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_SOFT_RESET=y +CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_S28HX_T=y +CONFIG_PHY_TI_DP83867=y +CONFIG_TI_AM65_CPSW_NUSS=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_SINGLE=y +CONFIG_POWER_DOMAIN=y +CONFIG_TI_SCI_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_SPL_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_SPL_DM_REGULATOR_GPIO=y +CONFIG_K3_SYSTEM_CONTROLLER=y +CONFIG_REMOTEPROC_TI_K3_ARM64=y +CONFIG_REMOTEPROC_TI_K3_DSP=y +CONFIG_REMOTEPROC_TI_K3_R5F=y +CONFIG_RESET_TI_SCI=y +CONFIG_DM_SERIAL=y +CONFIG_SOC_DEVICE=y +CONFIG_SOC_DEVICE_TI_K3=y +CONFIG_SOC_TI=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_CADENCE_QSPI=y +CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y +CONFIG_SYSRESET_TI_SCI=y +CONFIG_DM_THERMAL=y +CONFIG
[PATCH] arm: dts: k3-am62p5: enable the wkup i2c bus
The PMIC for the am62p5-sk is connected to the i2c bus on the wakeup
island. While we do not have a driver yet, enable it anyway so we can
begin development of the driver and characterization of the board.
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am62p5-sk.dts | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/dts/k3-am62p5-sk.dts b/arch/arm/dts/k3-am62p5-sk.dts
index 9e4479aa78886..77298d31a986f 100644
--- a/arch/arm/dts/k3-am62p5-sk.dts
+++ b/arch/arm/dts/k3-am62p5-sk.dts
@@ -790,6 +790,13 @@
&mcu_pmx0 {
bootph-all;
+ wkup_i2c0_pins_default: wkup-i2c0-default-pins {
+ pinctrl-single,pins = <
+ AM62PX_MCU_IOPAD(0x04c, PIN_INPUT, 0) /* (A13)
WKUP_I2C0_SCL */
+ AM62PX_MCU_IOPAD(0x050, PIN_INPUT, 0) /* (C11)
WKUP_I2C0_SDA */
+ >;
+ };
+
wkup_uart0_pins_default: wkup-uart0-default-pins {
pinctrl-single,pins = <
AM62PX_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C7)
WKUP_UART0_CTSn */
@@ -801,6 +808,13 @@
};
};
+&wkup_i2c0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wkup_i2c0_pins_default>;
+ clock-frequency = <40>;
+};
+
&wkup_uart0 {
/* WKUP UART0 is used by DM firmware */
pinctrl-names = "default";
base-commit: b0d717b732ee28e446baf94522b3491e590f7fbb
--
2.43.0
[PATCH v2 04/13] ram: k3-ddrss: enable the am62ax's DDR controller for am62px
The am62px family of SoCs uses the same DDR controller as found on the am62ax family. Enable this option when building for the am62px family Signed-off-by: Bryan Brattlof --- drivers/ram/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig index 5b07e92030142..56391058567bb 100644 --- a/drivers/ram/Kconfig +++ b/drivers/ram/Kconfig @@ -65,7 +65,7 @@ choice default K3_J721E_DDRSS if SOC_K3_J721E || SOC_K3_J721S2 default K3_AM64_DDRSS if SOC_K3_AM642 default K3_AM64_DDRSS if SOC_K3_AM625 - default K3_AM62A_DDRSS if SOC_K3_AM62A7 + default K3_AM62A_DDRSS if SOC_K3_AM62A7 || SOC_K3_AM62P5 config K3_J721E_DDRSS bool "Enable J721E DDRSS support" -- 2.43.0
Re: [PATCH 0/2] arm: dts: Add Itap Delay Value For High Speed DDR
On January 10, 2024 thus sayeth Bhavya Kapoor: > > On 08/01/24 7:35 pm, Bryan Brattlof wrote: > > Hi Bhavya! > > > > On January 8, 2024 thus sayeth Bhavya Kapoor: > > > This Series adds Itap Delay Value for DDR52 speed mode for eMMC in > > > J7200 SoC and for DDR50 speed mode for MMCSD in J721s2 SoC. > > > > > > Bhavya Kapoor (2): > > >arm: dts: k3-j7200-main: Add Itap Delay Value For DDR52 speed mode > > >arm: dts: k3-j721s2-main: Add Itap Delay Value For DDR50 speed mode > > > > > > arch/arm/dts/k3-j7200-main.dtsi | 1 + > > > arch/arm/dts/k3-j721s2-main.dtsi | 1 + > > Because of the periodic syncs with the kernel, modifying these dt files > > in U-Boot will cause confusion. (Which node is correct why did we have > > to do this in U-Boot and not in the Kernel... bla bla bla) If they > > absolutely need to go in now please override these nodes in the > > *-u-boot.dtsi files with a comment so we can keep track of these changes > > during the next sync with Linux. > > > > ~Bryan > > Hi Bryan, Fyi, This patch went in kernel as well. > > Can be tracked below- > > https://lore.kernel.org/all/170266085077.3490141.14935960940418963459.b4...@ti.com/ > > So , kernel and uboot dt files will remain in sync. > Sorry I may be missing something. Why do we need these properties in U-Boot now? Why not wait 2 weeks for the v6.8-rc1 tag in Linux and sync everything all at once? ~Bryan
Re: [PATCH v3 3/8] scripts/Makefile.lib: Statically define *-u-boot.dtsi files location
On January 9, 2024 thus sayeth Sumit Garg:
> On Tue, 9 Jan 2024 at 07:24, Bryan Brattlof wrote:
> >
> > On January 8, 2024 thus sayeth Sumit Garg:
> > > Hi Bryan,
> > >
> > > On Sat, 6 Jan 2024 at 02:12, Bryan Brattlof wrote:
> > > >
> > > > Hi Sumit!
> > > >
> > > > On December 28, 2023 thus sayeth Sumit Garg:
> > > > > Allow u-boot to build DTB from a different directory tree such that
> > > > > *-u-boot.dtsi files can be included from a common location. Currently
> > > > > that location is arch/$(ARCH)/dts/, so statically define that common
> > > > > location.
> > > > >
> > > > > This is needed for platform owners to start building DTB files from
> > > > > devicetree-rebasing directory but still being able to include
> > > > > *-u-boot.dtsi files.
> > > > >
> > > > > Reviewed-by: Tom Rini
> > > > > Reviewed-by: Simon Glass
> > > > > Reviewed-by: Ilias Apalodimas
> > > > > Signed-off-by: Sumit Garg
> > > > > ---
> > > > >
> > > >
> > > > ...
> > > >
> > > > >
> > > > > diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
> > > > > index 27b9437027c..09330421856 100644
> > > > > --- a/scripts/Makefile.lib
> > > > > +++ b/scripts/Makefile.lib
> > > >
> > > > ...
> > > >
> > > > > # Uncomment for debugging
> > > > > @@ -190,6 +192,7 @@ dtsi_include_list +=
> > > > > $(CONFIG_DEVICE_TREE_INCLUDES)
> > > > > dtc_cpp_flags = -Wp,-MD,$(depfile).pre.tmp -nostdinc
> > > > > \
> > > > >$(UBOOTINCLUDE)
> > > > > \
> > > > >-I$(dir $<)
> > > > > \
> > > > > + -I$(u_boot_dtsi_loc)
> > > > > \
> > > > >-I$(srctree)/arch/$(ARCH)/dts/include
> > > > > \
> > > > >-I$(srctree)/include
> > > > > \
> > > > >-D__ASSEMBLY__
> > > > > \
> > > > > @@ -328,7 +331,7 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
> > > > > echo '$(pound)include "$(f)"' >> $(pre-tmp);) \
> > > > > $(HOSTCC) -E $(dtc_cpp_flags) -x assembler-with-cpp -o
> > > > > $(dtc-tmp) $(pre-tmp) ; \
> > > > > $(DTC) -O dtb -o $@ -b 0 \
> > > > > - -i $(dir $<) $(DTC_FLAGS) \
> > > > > + -i $(dir $<) -i $(u_boot_dtsi_loc) $(DTC_FLAGS) \
> > > > > -d $(depfile).dtc.tmp $(dtc-tmp) || \
> > > > > (echo "Check $(shell pwd)/$(pre-tmp) for errors" &&
> > > > > false) \
> > > > > ; \
> > > >
> > > > One of the issues I see with having a separate OF_UPSTREAM and U-Boot dt
> > > > directory is when we have U-Boot board files that use dtsi files in the
> > > > OF_UPSTREAM folder.
> > > >
> > > > For example our reference boards uses the primary bootloader's dtb (eg:
> > > > k3-am62a7-r5-sk.dts) which #includes the k3-am62a7-sk.dts that will be
> > > > found in the OF_UPSTREAM directory and modifies it to give it the
> > > > perspective of the micro-controller it will be running on during boot.
> > >
> > > Thanks for bringing this up. I have been playing with the idea to
> > > reuse DT includes from upstream.
> > >
> > > >
> > > > What do you think if we have both paths included regardless if
> > > > OF_UPSTREAM is selected or not? IDK if this will break anyone else
> > >
> > > Sure, we should be able to do that if we maintain the correct order of
> > > include paths as per following patch [1]. If this works for you let me
> > > know and I will include it for v4.
> > >
> >
> > This works beautifully.
> >
> > I did have to hack around to get Makefile.spl working but this is headed
> > in the right direction for me :)
>
> Thanks for testing. I hope I can take that as a tested-by tag for this patch.
>
Absolutely
Tested-by: Bryan Brattlof
~Bryan
Re: [PATCH v3 3/8] scripts/Makefile.lib: Statically define *-u-boot.dtsi files location
On January 8, 2024 thus sayeth Sumit Garg:
> Hi Bryan,
>
> On Sat, 6 Jan 2024 at 02:12, Bryan Brattlof wrote:
> >
> > Hi Sumit!
> >
> > On December 28, 2023 thus sayeth Sumit Garg:
> > > Allow u-boot to build DTB from a different directory tree such that
> > > *-u-boot.dtsi files can be included from a common location. Currently
> > > that location is arch/$(ARCH)/dts/, so statically define that common
> > > location.
> > >
> > > This is needed for platform owners to start building DTB files from
> > > devicetree-rebasing directory but still being able to include
> > > *-u-boot.dtsi files.
> > >
> > > Reviewed-by: Tom Rini
> > > Reviewed-by: Simon Glass
> > > Reviewed-by: Ilias Apalodimas
> > > Signed-off-by: Sumit Garg
> > > ---
> > >
> >
> > ...
> >
> > >
> > > diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
> > > index 27b9437027c..09330421856 100644
> > > --- a/scripts/Makefile.lib
> > > +++ b/scripts/Makefile.lib
> >
> > ...
> >
> > > # Uncomment for debugging
> > > @@ -190,6 +192,7 @@ dtsi_include_list += $(CONFIG_DEVICE_TREE_INCLUDES)
> > > dtc_cpp_flags = -Wp,-MD,$(depfile).pre.tmp -nostdinc
> > > \
> > >$(UBOOTINCLUDE) \
> > >-I$(dir $<) \
> > > + -I$(u_boot_dtsi_loc) \
> > >-I$(srctree)/arch/$(ARCH)/dts/include \
> > >-I$(srctree)/include\
> > >-D__ASSEMBLY__ \
> > > @@ -328,7 +331,7 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
> > > echo '$(pound)include "$(f)"' >> $(pre-tmp);) \
> > > $(HOSTCC) -E $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp)
> > > $(pre-tmp) ; \
> > > $(DTC) -O dtb -o $@ -b 0 \
> > > - -i $(dir $<) $(DTC_FLAGS) \
> > > + -i $(dir $<) -i $(u_boot_dtsi_loc) $(DTC_FLAGS) \
> > > -d $(depfile).dtc.tmp $(dtc-tmp) || \
> > > (echo "Check $(shell pwd)/$(pre-tmp) for errors" && false) \
> > > ; \
> >
> > One of the issues I see with having a separate OF_UPSTREAM and U-Boot dt
> > directory is when we have U-Boot board files that use dtsi files in the
> > OF_UPSTREAM folder.
> >
> > For example our reference boards uses the primary bootloader's dtb (eg:
> > k3-am62a7-r5-sk.dts) which #includes the k3-am62a7-sk.dts that will be
> > found in the OF_UPSTREAM directory and modifies it to give it the
> > perspective of the micro-controller it will be running on during boot.
>
> Thanks for bringing this up. I have been playing with the idea to
> reuse DT includes from upstream.
>
> >
> > What do you think if we have both paths included regardless if
> > OF_UPSTREAM is selected or not? IDK if this will break anyone else
>
> Sure, we should be able to do that if we maintain the correct order of
> include paths as per following patch [1]. If this works for you let me
> know and I will include it for v4.
>
This works beautifully.
I did have to hack around to get Makefile.spl working but this is headed
in the right direction for me :)
Thank you
~Bryan
Re: [PATCH 0/2] arm: dts: Add Itap Delay Value For High Speed DDR
Hi Bhavya! On January 8, 2024 thus sayeth Bhavya Kapoor: > This Series adds Itap Delay Value for DDR52 speed mode for eMMC in > J7200 SoC and for DDR50 speed mode for MMCSD in J721s2 SoC. > > Bhavya Kapoor (2): > arm: dts: k3-j7200-main: Add Itap Delay Value For DDR52 speed mode > arm: dts: k3-j721s2-main: Add Itap Delay Value For DDR50 speed mode > > arch/arm/dts/k3-j7200-main.dtsi | 1 + > arch/arm/dts/k3-j721s2-main.dtsi | 1 + Because of the periodic syncs with the kernel, modifying these dt files in U-Boot will cause confusion. (Which node is correct why did we have to do this in U-Boot and not in the Kernel... bla bla bla) If they absolutely need to go in now please override these nodes in the *-u-boot.dtsi files with a comment so we can keep track of these changes during the next sync with Linux. ~Bryan
Re: [PATCH v3 3/8] scripts/Makefile.lib: Statically define *-u-boot.dtsi files location
Hi Sumit!
On December 28, 2023 thus sayeth Sumit Garg:
> Allow u-boot to build DTB from a different directory tree such that
> *-u-boot.dtsi files can be included from a common location. Currently
> that location is arch/$(ARCH)/dts/, so statically define that common
> location.
>
> This is needed for platform owners to start building DTB files from
> devicetree-rebasing directory but still being able to include
> *-u-boot.dtsi files.
>
> Reviewed-by: Tom Rini
> Reviewed-by: Simon Glass
> Reviewed-by: Ilias Apalodimas
> Signed-off-by: Sumit Garg
> ---
>
...
>
> diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
> index 27b9437027c..09330421856 100644
> --- a/scripts/Makefile.lib
> +++ b/scripts/Makefile.lib
...
> # Uncomment for debugging
> @@ -190,6 +192,7 @@ dtsi_include_list += $(CONFIG_DEVICE_TREE_INCLUDES)
> dtc_cpp_flags = -Wp,-MD,$(depfile).pre.tmp -nostdinc\
>$(UBOOTINCLUDE) \
>-I$(dir $<) \
> + -I$(u_boot_dtsi_loc) \
>-I$(srctree)/arch/$(ARCH)/dts/include \
>-I$(srctree)/include\
>-D__ASSEMBLY__ \
> @@ -328,7 +331,7 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
> echo '$(pound)include "$(f)"' >> $(pre-tmp);) \
> $(HOSTCC) -E $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp)
> $(pre-tmp) ; \
> $(DTC) -O dtb -o $@ -b 0 \
> - -i $(dir $<) $(DTC_FLAGS) \
> + -i $(dir $<) -i $(u_boot_dtsi_loc) $(DTC_FLAGS) \
> -d $(depfile).dtc.tmp $(dtc-tmp) || \
> (echo "Check $(shell pwd)/$(pre-tmp) for errors" && false) \
> ; \
One of the issues I see with having a separate OF_UPSTREAM and U-Boot dt
directory is when we have U-Boot board files that use dtsi files in the
OF_UPSTREAM folder.
For example our reference boards uses the primary bootloader's dtb (eg:
k3-am62a7-r5-sk.dts) which #includes the k3-am62a7-sk.dts that will be
found in the OF_UPSTREAM directory and modifies it to give it the
perspective of the micro-controller it will be running on during boot.
What do you think if we have both paths included regardless if
OF_UPSTREAM is selected or not? IDK if this will break anyone else
~Bryan
Re: [PATCH v7 06/17] arm: mach-k3: j784s4: Add clk and power support
On January 3, 2024 thus sayeth Nishanth Menon: > On 00:45-20231220, Apurva Nandan wrote: > > Add clk and device data which can be used by respective drivers > > to configure clocks and PSC. > > > > Signed-off-by: Hari Nagalla > > Signed-off-by: Apurva Nandan > > Reviewed-by: Sean Anderson > > --- > > Cursory look (have not verified actual data), looks fine.. > > Reviewed-by: Nishanth Menon > These look to be correct, just a little old. Reviewed-by: Bryan Brattlof ~Bryan
[PATCH v2 05/26] arm: dts: k3-am654: copy bootph properties to a53 dts
In order to unify the R5 board dtb file with the Linux board dtb file,
we will need to copy all bootph-pre-ram properties to the *-u-boot.dtsi
overlay.
Tested-by: Tom Rini
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 160 +++
arch/arm/dts/k3-am654-r5-base-board.dts | 85 +-
2 files changed, 162 insertions(+), 83 deletions(-)
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index f29cecf870bcd..4b1e8ce2c920c 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -5,6 +5,166 @@
#include "k3-am65x-binman.dtsi"
+&vtt_supply {
+ bootph-pre-ram;
+};
+
+&cbass_main {
+ bootph-pre-ram;
+};
+
+&main_navss {
+ bootph-pre-ram;
+};
+
+&cbass_mcu {
+ bootph-pre-ram;
+};
+
+&mcu_navss {
+ bootph-pre-ram;
+};
+
+&mcu_ringacc {
+ bootph-pre-ram;
+};
+
+&mcu_udmap {
+ bootph-pre-ram;
+};
+
+&wkup_gpio0 {
+ bootph-pre-ram;
+};
+
+&secure_proxy_main {
+ bootph-pre-ram;
+};
+
+&cbass_wakeup {
+ bootph-pre-ram;
+
+ chipid@4314 {
+ bootph-pre-ram;
+ };
+};
+
+&dmsc {
+ bootph-pre-ram;
+};
+
+&k3_pds {
+ bootph-pre-ram;
+};
+
+&k3_clks {
+ bootph-pre-ram;
+};
+
+&k3_reset {
+ bootph-pre-ram;
+};
+
+&main_uart0 {
+ bootph-pre-ram;
+};
+
+&wkup_vtm0 {
+ bootph-pre-ram;
+};
+
+&wkup_pmx0 {
+ bootph-pre-ram;
+};
+
+&wkup_uart0_pins_default {
+ bootph-pre-ram;
+};
+
+&wkup_vtt_pins_default {
+ bootph-pre-ram;
+};
+
+&mcu_uart0_pins_default {
+ bootph-pre-ram;
+};
+
+&wkup_i2c0_pins_default {
+ bootph-pre-ram;
+};
+
+&mcu_fss0_ospi0_pins_default {
+ bootph-pre-ram;
+};
+
+&main_pmx0 {
+ bootph-pre-ram;
+};
+
+&main_uart0_pins_default {
+ bootph-pre-ram;
+};
+
+&main_mmc0_pins_default {
+ bootph-pre-ram;
+};
+
+&main_mmc1_pins_default {
+ bootph-pre-ram;
+};
+
+&usb0_pins_default {
+ bootph-pre-ram;
+};
+
+&main_pmx1 {
+ bootph-pre-ram;
+};
+
+&sdhci0 {
+ bootph-pre-ram;
+};
+
+&sdhci1 {
+ bootph-pre-ram;
+};
+
+&wkup_i2c0 {
+ bootph-pre-ram;
+};
+
+&vdd_mpu {
+ bootph-pre-ram;
+};
+
+&ospi0 {
+ bootph-pre-ram;
+
+ flash@0 {
+ bootph-pre-ram;
+ };
+};
+
+&dwc3_0 {
+ bootph-pre-ram;
+};
+
+&usb0_phy {
+ bootph-pre-ram;
+};
+
+&usb0 {
+ bootph-pre-ram;
+};
+
+&scm_conf {
+ bootph-pre-ram;
+};
+
+&fss {
+ bootph-pre-ram;
+};
+
&pru0_0 {
remoteproc-name = "pru0_0";
};
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index d75c7bf3fe662..8f55dab508ee6 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -53,13 +53,10 @@
regulator-max-microvolt = <330>;
gpios = <&wkup_gpio0 28 GPIO_ACTIVE_HIGH>;
states = <0 0x0 330 0x1>;
- bootph-pre-ram;
};
};
&cbass_main {
- bootph-pre-ram;
-
timer1: timer@4040 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x4040 0x0 0x80>;
@@ -67,15 +64,9 @@
clock-frequency = <2500>;
bootph-all;
};
-
- main_navss: bus@3080 {
- bootph-pre-ram;
- };
};
&cbass_mcu {
- bootph-pre-ram;
-
mcu_secproxy: secproxy@2838 {
compatible = "ti,am654-secure-proxy";
reg = <0x0 0x2a38 0x0 0x8>,
@@ -87,8 +78,6 @@
};
mcu_navss: bus@2838 {
- bootph-pre-ram;
-
ringacc@2b80 {
reg = <0x0 0x2b80 0x0 0x40>,
<0x0 0x2b00 0x0 0x40>,
@@ -96,7 +85,6 @@
<0x0 0x2a50 0x0 0x4>,
<0x0 0x2844 0x0 0x4>;
reg-names = "rt", "fifos", "proxy_gcfg",
"proxy_target", "cfg";
- bootph-pre-ram;
ti,dma-ring-reset-quirk;
};
@@ -109,34 +97,11 @@
<0x0 0x2840 0x0 0x2000>;
reg-names = "gcfg", "rchan", "rchanrt", "tchan",
"tchanrt", "rflow";
- bootph-pre-ram;
};
};
};
-&k3_pds {
- bootph-pre-ram;
-};
-
-&k
