[U-Boot] mmc hwpartition question
Hi, I am trying to setup an eMMC chip's user data area fully as enhanced type. Well, trying is probably wrong because its an OTP action and therefore I try to figure out the correct command on first try :-) U-Boot's "mmc hwpartition" command should be able to do this, but how? Where can I find out the max value for the size parameter to get the _full_ chip into enhanced mode? Any ideas? Regards, Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 06/22] ppc4xx: remove DP405 board
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
arch/powerpc/cpu/ppc4xx/Kconfig |4 -
board/esd/dp405/Kconfig | 12 --
board/esd/dp405/MAINTAINERS |6 -
board/esd/dp405/Makefile| 13 ---
board/esd/dp405/dp405.c | 112 --
board/esd/dp405/flash.c | 85 --
configs/DP405_defconfig |3 -
doc/README.scrapyard|2 +
include/configs/DP405.h | 246 ---
9 files changed, 2 insertions(+), 481 deletions(-)
delete mode 100644 board/esd/dp405/Kconfig
delete mode 100644 board/esd/dp405/MAINTAINERS
delete mode 100644 board/esd/dp405/Makefile
delete mode 100644 board/esd/dp405/dp405.c
delete mode 100644 board/esd/dp405/flash.c
delete mode 100644 configs/DP405_defconfig
delete mode 100644 include/configs/DP405.h
diff --git a/arch/powerpc/cpu/ppc4xx/Kconfig b/arch/powerpc/cpu/ppc4xx/Kconfig
index e428d0e..e0eef94 100644
--- a/arch/powerpc/cpu/ppc4xx/Kconfig
+++ b/arch/powerpc/cpu/ppc4xx/Kconfig
@@ -125,9 +125,6 @@ config TARGET_CPCI405AB
config TARGET_CPCI405DT
bool Support CPCI405DT
-config TARGET_DP405
- bool Support DP405
-
config TARGET_DU405
bool Support DU405
@@ -244,7 +241,6 @@ source board/csb472/Kconfig
source board/dave/PPChameleonEVB/Kconfig
source board/esd/cpci2dp/Kconfig
source board/esd/cpci405/Kconfig
-source board/esd/dp405/Kconfig
source board/esd/du405/Kconfig
source board/esd/du440/Kconfig
source board/esd/hh405/Kconfig
diff --git a/board/esd/dp405/Kconfig b/board/esd/dp405/Kconfig
deleted file mode 100644
index c0163ae..000
--- a/board/esd/dp405/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_DP405
-
-config SYS_BOARD
- default dp405
-
-config SYS_VENDOR
- default esd
-
-config SYS_CONFIG_NAME
- default DP405
-
-endif
diff --git a/board/esd/dp405/MAINTAINERS b/board/esd/dp405/MAINTAINERS
deleted file mode 100644
index 6833d8c..000
--- a/board/esd/dp405/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-DP405 BOARD
-M: Matthias Fuchs matthias.fu...@esd-electronics.com
-S: Maintained
-F: board/esd/dp405/
-F: include/configs/DP405.h
-F: configs/DP405_defconfig
diff --git a/board/esd/dp405/Makefile b/board/esd/dp405/Makefile
deleted file mode 100644
index cfcfb66..000
--- a/board/esd/dp405/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-# Objects for Xilinx JTAG programming (CPLD)
-CPLD= ../common/xilinx_jtag/lenval.o \
- ../common/xilinx_jtag/micro.o \
- ../common/xilinx_jtag/ports.o
-
-obj-y = dp405.o flash.o ../common/misc.o $(CPLD)
diff --git a/board/esd/dp405/dp405.c b/board/esd/dp405/dp405.c
deleted file mode 100644
index 730ff21..000
--- a/board/esd/dp405/dp405.c
+++ /dev/null
@@ -1,112 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Stefan Roese, esd gmbh germany, stefan.ro...@esd-electronics.com
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include common.h
-#include asm/processor.h
-#include asm/io.h
-#include command.h
-#include malloc.h
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_early_init_f (void)
-{
- /*
-* IRQ 0-15 405GP internally generated; active high; level sensitive
-* IRQ 16405GP internally generated; active low; level sensitive
-* IRQ 17-24 RESERVED
-* IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
-* IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
-* IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
-* IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
-* IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
-* IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
-* IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
-*/
- mtdcr(UIC0SR, 0x); /* clear all ints */
- mtdcr(UIC0ER, 0x); /* disable all ints */
- mtdcr(UIC0CR, 0x); /* set all to be non-critical*/
- mtdcr(UIC0PR, 0xFF80); /* set int polarities */
- mtdcr(UIC0TR, 0x1000); /* set int trigger levels */
- mtdcr(UIC0VCR, 0x0001); /* set vect base=0,INT0 highest
priority*/
- mtdcr(UIC0SR, 0x); /* clear all ints */
-
- /*
-* EBC Configuration Register: set ready timeout to 512 ebc-clks - ca.
15 us
-*/
- mtebc (EBC0_CFG, 0xa840); /* ebc always driven */
-
- /*
-* Reset CPLD via GPIO13 (CS4) pin
-*/
- out_be32((void *)GPIO0_OR,
-in_be32((void *)GPIO0_OR) ~(0x8000 13));
- udelay(1000); /* wait 1ms */
- out_be32((void *)GPIO0_OR,
-in_be32((void *)GPIO0_OR) | (0x8000 13));
- udelay(1000); /* wait 1ms */
-
- return 0;
-}
-
-int misc_init_r (void
[U-Boot] [PATCH 00/22] remove / switch esd 4xx boards
Hi, this series will remove a couple of esd 4xx boards that became obsolete in the past. Some others will be switched to generic board code. Matthias Matthias Fuchs (22): ppx4xx: remove APC405 board ppc4xx: remove AR405 board ppc4xx: remove ASH405 board ppc4xx: remove CMS700 board ppc4xx: remove CPCIISER4 board ppc4xx: remove DP405 board ppc4xx: remove DU405 board ppc4xx: remove DU440 board ppc4xx: remove HH405 board ppc4xx: remove HUB405 board ppc4xx: remove OCRTC board ppc4xx: remove PCI405 board ppc4xx: remove PMC405 board ppc4xx: remove VOH405 board ppc4xx: remove WUH405 board ppc4xx: remove G2000 board ppc4xx: remove some CPCI405 variants ppc4xx: cleanup CPCI4052 board ppc4xx: switch CPCI2DP to generic board ppc4xx: switch PLU405 to generic board ppc4xx: switch PMC405DE to generic board ppc4xx: switch VOM405 to generic board arch/powerpc/cpu/ppc4xx/Kconfig| 73 - board/esd/apc405/Kconfig | 12 - board/esd/apc405/MAINTAINERS |6 - board/esd/apc405/Makefile | 10 - board/esd/apc405/apc405.c | 461 -- board/esd/apc405/fpgadata.c| 4008 --- board/esd/apc405/logo_640_480_24bpp.c | 1129 - board/esd/ar405/Kconfig| 12 - board/esd/ar405/MAINTAINERS|6 - board/esd/ar405/Makefile |8 - board/esd/ar405/ar405.c| 394 -- board/esd/ar405/ar405.h| 28 - board/esd/ar405/flash.c| 85 - board/esd/ar405/fpgadata.c | 5500 - board/esd/ar405/fpgadata_xl30.c| 4872 -- board/esd/ash405/Kconfig | 12 - board/esd/ash405/MAINTAINERS |6 - board/esd/ash405/Makefile | 10 - board/esd/ash405/ash405.c | 182 - board/esd/ash405/flash.c | 85 - board/esd/ash405/fpgadata.c| 4983 --- board/esd/cms700/Kconfig | 12 - board/esd/cms700/MAINTAINERS |6 - board/esd/cms700/Makefile | 16 - board/esd/cms700/cms700.c | 192 - board/esd/cms700/flash.c | 85 - board/esd/common/auto_update.c | 478 -- board/esd/common/auto_update.h | 40 - board/esd/cpci405/Kconfig | 39 - board/esd/cpci405/Makefile |2 +- board/esd/cpci405/cpci405.c| 276 +- board/esd/cpci405/fpgadata_cpci405.c | 683 --- board/esd/cpci405/fpgadata_cpci405ab.c | 2569 -- board/esd/cpciiser4/Kconfig| 12 - board/esd/cpciiser4/MAINTAINERS|6 - board/esd/cpciiser4/Makefile |8 - board/esd/cpciiser4/cpciiser4.c| 165 - board/esd/cpciiser4/cpciiser4.h| 28 - board/esd/cpciiser4/flash.c| 68 - board/esd/cpciiser4/fpgadata.c | 4136 board/esd/dp405/Kconfig| 12 - board/esd/dp405/MAINTAINERS|6 - board/esd/dp405/Makefile | 13 - board/esd/dp405/dp405.c| 112 - board/esd/dp405/flash.c| 85 - board/esd/du405/Kconfig| 12 - board/esd/du405/MAINTAINERS|6 - board/esd/du405/Makefile |8 - board/esd/du405/du405.c| 187 - board/esd/du405/du405.h| 28 - board/esd/du405/flash.c| 107 - board/esd/du405/fpgadata.c | 1405 -- board/esd/du440/Kconfig| 12 - board/esd/du440/MAINTAINERS|6 - board/esd/du440/Makefile |9 - board/esd/du440/config.mk | 16 - board/esd/du440/du440.c| 882 board/esd/du440/du440.h| 27 - board/esd/du440/init.S | 66 - board/esd/hh405/Kconfig| 12 - board/esd/hh405/MAINTAINERS|6 - board/esd/hh405/Makefile | 11 - board/esd/hh405/flash.c| 85 - board/esd/hh405/fpgadata.c | 5034 --- board/esd/hh405/hh405.c| 895 board/esd/hh405/logo_1024_768_8bpp.c | 5087 --- board/esd/hh405/logo_320_240_4bpp.c| 454 -- board/esd/hh405/logo_320_240_8bpp.c| 1042 board/esd/hh405/logo_640_480_24bpp.c | 8417 board/esd/hub405/Kconfig | 12 - board/esd/hub405/MAINTAINERS |6 - board/esd/hub405/Makefile | 10 - board/esd/hub405/flash.c | 85 - board/esd/hub405/hub405.c | 208 - board/esd/ocrtc/Kconfig| 12 - board/esd/ocrtc/MAINTAINERS|6 - board/esd/ocrtc/Makefile |8 - board/esd/ocrtc/cmd_ocrtc.c| 68 - board/esd/ocrtc/flash.c| 140 - board/esd/ocrtc/ocrtc.c| 78
[U-Boot] [PATCH 19/22] ppc4xx: switch CPCI2DP to generic board
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu --- include/configs/CPCI2DP.h |2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/CPCI2DP.h b/include/configs/CPCI2DP.h index 05106cd..845ed81 100644 --- a/include/configs/CPCI2DP.h +++ b/include/configs/CPCI2DP.h @@ -20,6 +20,8 @@ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ #defineCONFIG_SYS_TEXT_BASE0xFFFC +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO #define CONFIG_BOARD_EARLY_INIT_F 1/* call board_early_init_f()*/ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 10/22] ppc4xx: remove HUB405 board
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
arch/powerpc/cpu/ppc4xx/Kconfig |4 -
board/esd/hub405/Kconfig| 12 --
board/esd/hub405/MAINTAINERS|6 -
board/esd/hub405/Makefile | 10 --
board/esd/hub405/flash.c| 85 --
board/esd/hub405/hub405.c | 208 ---
configs/HUB405_defconfig|3 -
doc/README.scrapyard|1 +
include/configs/HUB405.h| 351 ---
9 files changed, 1 insertion(+), 679 deletions(-)
delete mode 100644 board/esd/hub405/Kconfig
delete mode 100644 board/esd/hub405/MAINTAINERS
delete mode 100644 board/esd/hub405/Makefile
delete mode 100644 board/esd/hub405/flash.c
delete mode 100644 board/esd/hub405/hub405.c
delete mode 100644 configs/HUB405_defconfig
delete mode 100644 include/configs/HUB405.h
diff --git a/arch/powerpc/cpu/ppc4xx/Kconfig b/arch/powerpc/cpu/ppc4xx/Kconfig
index 8ce66d6..cab8f25 100644
--- a/arch/powerpc/cpu/ppc4xx/Kconfig
+++ b/arch/powerpc/cpu/ppc4xx/Kconfig
@@ -125,9 +125,6 @@ config TARGET_CPCI405AB
config TARGET_CPCI405DT
bool Support CPCI405DT
-config TARGET_HUB405
- bool Support HUB405
-
config TARGET_OCRTC
bool Support OCRTC
@@ -232,7 +229,6 @@ source board/csb472/Kconfig
source board/dave/PPChameleonEVB/Kconfig
source board/esd/cpci2dp/Kconfig
source board/esd/cpci405/Kconfig
-source board/esd/hub405/Kconfig
source board/esd/ocrtc/Kconfig
source board/esd/pci405/Kconfig
source board/esd/plu405/Kconfig
diff --git a/board/esd/hub405/Kconfig b/board/esd/hub405/Kconfig
deleted file mode 100644
index 2b9556a..000
--- a/board/esd/hub405/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_HUB405
-
-config SYS_BOARD
- default hub405
-
-config SYS_VENDOR
- default esd
-
-config SYS_CONFIG_NAME
- default HUB405
-
-endif
diff --git a/board/esd/hub405/MAINTAINERS b/board/esd/hub405/MAINTAINERS
deleted file mode 100644
index e84a1d9..000
--- a/board/esd/hub405/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-HUB405 BOARD
-M: Matthias Fuchs matthias.fu...@esd-electronics.com
-S: Maintained
-F: board/esd/hub405/
-F: include/configs/HUB405.h
-F: configs/HUB405_defconfig
diff --git a/board/esd/hub405/Makefile b/board/esd/hub405/Makefile
deleted file mode 100644
index 99e18b5..000
--- a/board/esd/hub405/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y = hub405.o flash.o \
- ../common/misc.o \
- ../common/esd405ep_nand.o \
diff --git a/board/esd/hub405/flash.c b/board/esd/hub405/flash.c
deleted file mode 100644
index 23e8164..000
--- a/board/esd/hub405/flash.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.ro...@esd-electronics.com
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include common.h
-#include asm/ppc4xx.h
-#include asm/processor.h
-
-/*
- * include common flash code (for esd boards)
- */
-#include ../common/flash.c
-
-/*---
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*---
- */
-
-unsigned long flash_init (void)
-{
- unsigned long size_b0;
- int i;
- uint pbcr;
- unsigned long base_b0;
- int size_val = 0;
-
- /* Init: no FLASHes known */
- for (i=0; iCONFIG_SYS_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf (## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld
MB\n,
- size_b0, size_b020);
- }
-
- /* Setup offsets */
- flash_get_offsets (-size_b0, flash_info[0]);
-
- /* Re-do sizing to get full correct info */
- mtdcr(EBC0_CFGADDR, PB0CR);
- pbcr = mfdcr(EBC0_CFGDATA);
- mtdcr(EBC0_CFGADDR, PB0CR);
- base_b0 = -size_b0;
- switch (size_b0) {
- case 1 20:
- size_val = 0;
- break;
- case 2 20:
- size_val = 1;
- break;
- case 4 20:
- size_val = 2;
- break;
- case 8 20:
- size_val = 3;
- break;
- case 16 20:
- size_val = 4;
- break;
- }
- pbcr = (pbcr 0x0001) | base_b0 | (size_val 17);
- mtdcr(EBC0_CFGDATA, pbcr);
-
- /* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET
[U-Boot] [PATCH 07/22] ppc4xx: remove DU405 board
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
arch/powerpc/cpu/ppc4xx/Kconfig |4 -
board/esd/du405/Kconfig | 12 -
board/esd/du405/MAINTAINERS |6 -
board/esd/du405/Makefile|8 -
board/esd/du405/du405.c | 187 --
board/esd/du405/du405.h | 28 -
board/esd/du405/flash.c | 107 ---
board/esd/du405/fpgadata.c | 1405 ---
configs/DU405_defconfig |3 -
doc/README.scrapyard|1 +
include/configs/DU405.h | 273
11 files changed, 1 insertion(+), 2033 deletions(-)
delete mode 100644 board/esd/du405/Kconfig
delete mode 100644 board/esd/du405/MAINTAINERS
delete mode 100644 board/esd/du405/Makefile
delete mode 100644 board/esd/du405/du405.c
delete mode 100644 board/esd/du405/du405.h
delete mode 100644 board/esd/du405/flash.c
delete mode 100644 board/esd/du405/fpgadata.c
delete mode 100644 configs/DU405_defconfig
delete mode 100644 include/configs/DU405.h
diff --git a/arch/powerpc/cpu/ppc4xx/Kconfig b/arch/powerpc/cpu/ppc4xx/Kconfig
index e0eef94..447a773 100644
--- a/arch/powerpc/cpu/ppc4xx/Kconfig
+++ b/arch/powerpc/cpu/ppc4xx/Kconfig
@@ -125,9 +125,6 @@ config TARGET_CPCI405AB
config TARGET_CPCI405DT
bool Support CPCI405DT
-config TARGET_DU405
- bool Support DU405
-
config TARGET_DU440
bool Support DU440
@@ -241,7 +238,6 @@ source board/csb472/Kconfig
source board/dave/PPChameleonEVB/Kconfig
source board/esd/cpci2dp/Kconfig
source board/esd/cpci405/Kconfig
-source board/esd/du405/Kconfig
source board/esd/du440/Kconfig
source board/esd/hh405/Kconfig
source board/esd/hub405/Kconfig
diff --git a/board/esd/du405/Kconfig b/board/esd/du405/Kconfig
deleted file mode 100644
index 2913fb9..000
--- a/board/esd/du405/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_DU405
-
-config SYS_BOARD
- default du405
-
-config SYS_VENDOR
- default esd
-
-config SYS_CONFIG_NAME
- default DU405
-
-endif
diff --git a/board/esd/du405/MAINTAINERS b/board/esd/du405/MAINTAINERS
deleted file mode 100644
index 5eff2a4..000
--- a/board/esd/du405/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-DU405 BOARD
-M: Matthias Fuchs matthias.fu...@esd-electronics.com
-S: Maintained
-F: board/esd/du405/
-F: include/configs/DU405.h
-F: configs/DU405_defconfig
diff --git a/board/esd/du405/Makefile b/board/esd/du405/Makefile
deleted file mode 100644
index 7914eab..000
--- a/board/esd/du405/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y = du405.o flash.o ../common/misc.o
diff --git a/board/esd/du405/du405.c b/board/esd/du405/du405.c
deleted file mode 100644
index 8f5f4d0..000
--- a/board/esd/du405/du405.c
+++ /dev/null
@@ -1,187 +0,0 @@
-/*
- * (C) Copyright 2000, 2001
- * Stefan Roese, esd gmbh germany, stefan.ro...@esd-electronics.com
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include common.h
-#include du405.h
-#include asm/processor.h
-#include asm/ppc4xx.h
-#include asm/ppc4xx-i2c.h
-#include command.h
-
-DECLARE_GLOBAL_DATA_PTR;
-
-extern void lxt971_no_sleep(void);
-
-
-#if 0
-#define FPGA_DEBUG
-#endif
-
-#if 0
-#define FPGA_DEBUG2
-#endif
-
-/* fpga configuration data - generated by bin2cc */
-const unsigned char fpgadata[] = {
-#include fpgadata.c
-};
-
-/*
- * include common fpga code (for esd boards)
- */
-#include ../common/fpga.c
-
-
-int board_early_init_f (void)
-{
- int index, len, i;
- int status;
-
-#ifdef FPGA_DEBUG
- /* set up serial port with default baudrate */
- (void) get_clocks ();
- gd-baudrate = CONFIG_BAUDRATE;
- serial_init ();
- console_init_f ();
-#endif
-
- /*
-* Boot onboard FPGA
-*/
- status = fpga_boot ((unsigned char *) fpgadata, sizeof (fpgadata));
- if (status != 0) {
- /* booting FPGA failed */
-#ifndef FPGA_DEBUG
- /* set up serial port with default baudrate */
- (void) get_clocks ();
- gd-baudrate = CONFIG_BAUDRATE;
- serial_init ();
- console_init_f ();
-#endif
- printf (\nFPGA: Booting failed );
- switch (status) {
- case ERROR_FPGA_PRG_INIT_LOW:
- printf ((Timeout: INIT not low after asserting
PROGRAM*)\n );
- break;
- case ERROR_FPGA_PRG_INIT_HIGH:
- printf ((Timeout: INIT not high after deasserting
PROGRAM*)\n );
- break;
- case ERROR_FPGA_PRG_DONE:
- printf ((Timeout: DONE not high after programming
FPGA)\n );
- break;
- }
-
- /* display infos on fpgaimage */
- index = 15;
- for (i = 0; i 4; i
[U-Boot] [PATCH 13/22] ppc4xx: remove PMC405 board
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
arch/powerpc/cpu/ppc4xx/Kconfig |4 -
board/esd/pmc405/Kconfig| 12 --
board/esd/pmc405/MAINTAINERS|6 -
board/esd/pmc405/Makefile | 13 --
board/esd/pmc405/pmc405.c | 142 -
configs/PMC405_defconfig|3 -
doc/README.scrapyard|1 +
include/configs/PMC405.h| 318 ---
8 files changed, 1 insertion(+), 498 deletions(-)
delete mode 100644 board/esd/pmc405/Kconfig
delete mode 100644 board/esd/pmc405/MAINTAINERS
delete mode 100644 board/esd/pmc405/Makefile
delete mode 100644 board/esd/pmc405/pmc405.c
delete mode 100644 configs/PMC405_defconfig
delete mode 100644 include/configs/PMC405.h
diff --git a/arch/powerpc/cpu/ppc4xx/Kconfig b/arch/powerpc/cpu/ppc4xx/Kconfig
index 0e8cbf3..eddaee1 100644
--- a/arch/powerpc/cpu/ppc4xx/Kconfig
+++ b/arch/powerpc/cpu/ppc4xx/Kconfig
@@ -128,9 +128,6 @@ config TARGET_CPCI405DT
config TARGET_PLU405
bool Support PLU405
-config TARGET_PMC405
- bool Support PMC405
-
config TARGET_PMC405DE
bool Support PMC405DE
@@ -224,7 +221,6 @@ source board/dave/PPChameleonEVB/Kconfig
source board/esd/cpci2dp/Kconfig
source board/esd/cpci405/Kconfig
source board/esd/plu405/Kconfig
-source board/esd/pmc405/Kconfig
source board/esd/pmc405de/Kconfig
source board/esd/pmc440/Kconfig
source board/esd/voh405/Kconfig
diff --git a/board/esd/pmc405/Kconfig b/board/esd/pmc405/Kconfig
deleted file mode 100644
index 3738c68..000
--- a/board/esd/pmc405/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_PMC405
-
-config SYS_BOARD
- default pmc405
-
-config SYS_VENDOR
- default esd
-
-config SYS_CONFIG_NAME
- default PMC405
-
-endif
diff --git a/board/esd/pmc405/MAINTAINERS b/board/esd/pmc405/MAINTAINERS
deleted file mode 100644
index 148a596..000
--- a/board/esd/pmc405/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-PMC405 BOARD
-M: Matthias Fuchs matthias.fu...@esd-electronics.com
-S: Maintained
-F: board/esd/pmc405/
-F: include/configs/PMC405.h
-F: configs/PMC405_defconfig
diff --git a/board/esd/pmc405/Makefile b/board/esd/pmc405/Makefile
deleted file mode 100644
index ad98207..000
--- a/board/esd/pmc405/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-# Objects for Xilinx JTAG programming (CPLD)
-CPLD= ../common/xilinx_jtag/lenval.o \
- ../common/xilinx_jtag/micro.o \
- ../common/xilinx_jtag/ports.o
-
-obj-y = pmc405.o ../common/misc.o ../common/cmd_loadpci.o $(CPLD)
diff --git a/board/esd/pmc405/pmc405.c b/board/esd/pmc405/pmc405.c
deleted file mode 100644
index e67ff30..000
--- a/board/esd/pmc405/pmc405.c
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Stefan Roese, DENX Software Engineering, s...@denx.de.
- *
- * (C) Copyright 2005-2009
- * Matthias Fuchs, esd gmbh germany, matthias.fu...@esd-electronics.com
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include common.h
-#include asm/processor.h
-#include asm/io.h
-#include command.h
-#include malloc.h
-
-DECLARE_GLOBAL_DATA_PTR;
-
-extern void lxt971_no_sleep(void);
-
-int board_early_init_f (void)
-{
- /*
-* IRQ 0-15 405GP internally generated; active high; level sensitive
-* IRQ 16405GP internally generated; active low; level sensitive
-* IRQ 17-24 RESERVED
-* IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
-* IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
-* IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
-* IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
-* IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
-* IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
-* IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
-*/
- mtdcr(UIC0SR, 0x); /* clear all ints */
- mtdcr(UIC0ER, 0x); /* disable all ints */
- mtdcr(UIC0CR, 0x); /* set all to be non-critical*/
- mtdcr(UIC0PR, 0xFF81); /* set int polarities */
- mtdcr(UIC0TR, 0x1000); /* set int trigger levels */
- mtdcr(UIC0VCR, 0x0001); /* set vect base=0, INT0 highest priority */
- mtdcr(UIC0SR, 0x); /* clear all ints */
-
- /*
-* EBC Configuration Register:
-* set ready timeout to 512 ebc-clks - ca. 15 us
-*/
- mtebc (EBC0_CFG, 0xa840);
-
- /*
-* Setup GPIO pins
-*/
- mtdcr(CPC0_CR0, mfdcr(CPC0_CR0) | ((CONFIG_SYS_FPGA_INIT |
- CONFIG_SYS_FPGA_DONE |
- CONFIG_SYS_XEREADY |
- CONFIG_SYS_NONMONARCH |
- CONFIG_SYS_REV1_2
[U-Boot] [PATCH 08/22] ppc4xx: remove DU440 board
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
arch/powerpc/cpu/ppc4xx/Kconfig |4 -
board/esd/du440/Kconfig | 12 -
board/esd/du440/MAINTAINERS |6 -
board/esd/du440/Makefile|9 -
board/esd/du440/config.mk | 16 -
board/esd/du440/du440.c | 882 ---
board/esd/du440/du440.h | 27 --
board/esd/du440/init.S | 66 ---
configs/DU440_defconfig |3 -
doc/README.scrapyard|1 +
include/configs/DU440.h | 415 --
11 files changed, 1 insertion(+), 1440 deletions(-)
delete mode 100644 board/esd/du440/Kconfig
delete mode 100644 board/esd/du440/MAINTAINERS
delete mode 100644 board/esd/du440/Makefile
delete mode 100644 board/esd/du440/config.mk
delete mode 100644 board/esd/du440/du440.c
delete mode 100644 board/esd/du440/du440.h
delete mode 100644 board/esd/du440/init.S
delete mode 100644 configs/DU440_defconfig
delete mode 100644 include/configs/DU440.h
diff --git a/arch/powerpc/cpu/ppc4xx/Kconfig b/arch/powerpc/cpu/ppc4xx/Kconfig
index 447a773..723b268 100644
--- a/arch/powerpc/cpu/ppc4xx/Kconfig
+++ b/arch/powerpc/cpu/ppc4xx/Kconfig
@@ -125,9 +125,6 @@ config TARGET_CPCI405AB
config TARGET_CPCI405DT
bool Support CPCI405DT
-config TARGET_DU440
- bool Support DU440
-
config TARGET_HH405
bool Support HH405
@@ -238,7 +235,6 @@ source board/csb472/Kconfig
source board/dave/PPChameleonEVB/Kconfig
source board/esd/cpci2dp/Kconfig
source board/esd/cpci405/Kconfig
-source board/esd/du440/Kconfig
source board/esd/hh405/Kconfig
source board/esd/hub405/Kconfig
source board/esd/ocrtc/Kconfig
diff --git a/board/esd/du440/Kconfig b/board/esd/du440/Kconfig
deleted file mode 100644
index b4b3e6b..000
--- a/board/esd/du440/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_DU440
-
-config SYS_BOARD
- default du440
-
-config SYS_VENDOR
- default esd
-
-config SYS_CONFIG_NAME
- default DU440
-
-endif
diff --git a/board/esd/du440/MAINTAINERS b/board/esd/du440/MAINTAINERS
deleted file mode 100644
index ba26948..000
--- a/board/esd/du440/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-DU440 BOARD
-M: Matthias Fuchs matthias.fu...@esd-electronics.com
-S: Maintained
-F: board/esd/du440/
-F: include/configs/DU440.h
-F: configs/DU440_defconfig
diff --git a/board/esd/du440/Makefile b/board/esd/du440/Makefile
deleted file mode 100644
index ef41d94..000
--- a/board/esd/du440/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# (C) Copyright 2002-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y = du440.o
-extra-y+= init.o
diff --git a/board/esd/du440/config.mk b/board/esd/du440/config.mk
deleted file mode 100644
index 9cb071e..000
--- a/board/esd/du440/config.mk
+++ /dev/null
@@ -1,16 +0,0 @@
-#
-# (C) Copyright 2002-2010
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-PLATFORM_CPPFLAGS += -DCONFIG_440=1
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
-
-ifeq ($(dbcr),1)
-PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff
-endif
diff --git a/board/esd/du440/du440.c b/board/esd/du440/du440.c
deleted file mode 100644
index b168b24..000
--- a/board/esd/du440/du440.c
+++ /dev/null
@@ -1,882 +0,0 @@
-/*
- * (C) Copyright 2008
- * Matthias Fuchs, esd gmbh, matthias.fu...@esd-electronics.com
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include common.h
-#include asm/processor.h
-#include asm/io.h
-#include asm/bitops.h
-#include command.h
-#include i2c.h
-#include asm/ppc440.h
-#include du440.h
-
-DECLARE_GLOBAL_DATA_PTR;
-
-extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
-extern ulong flash_get_size (ulong base, int banknum);
-
-int usbhub_init(void);
-int dvi_init(void);
-int eeprom_write_enable (unsigned dev_addr, int state);
-int board_revision(void);
-
-static int du440_post_errors;
-
-int board_early_init_f(void)
-{
- u32 sdr0_cust0;
- u32 sdr0_pfc1, sdr0_pfc2;
- u32 reg;
-
- mtdcr(EBC0_CFGADDR, EBC0_CFG);
- mtdcr(EBC0_CFGDATA, 0xb840);
-
- /*
-* Setup the GPIO pins
-*/
- out_be32((void*)GPIO0_OR, 0x | CONFIG_SYS_GPIO0_EP_EEP);
- out_be32((void*)GPIO0_TCR, 0x001f | CONFIG_SYS_GPIO0_EP_EEP);
- out_be32((void*)GPIO0_OSRL, 0x50055400);
- out_be32((void*)GPIO0_OSRH, 0x55005000);
- out_be32((void*)GPIO0_TSRL, 0x50055400);
- out_be32((void*)GPIO0_TSRH, 0x55005000);
- out_be32((void*)GPIO0_ISR1L, 0x5000);
- out_be32((void*)GPIO0_ISR1H, 0x);
- out_be32((void*)GPIO0_ISR2L, 0x);
- out_be32((void*)GPIO0_ISR2H, 0x);
- out_be32((void*)GPIO0_ISR3L, 0x);
- out_be32((void*)GPIO0_ISR3H, 0x);
-
- out_be32((void*)GPIO1_OR, 0x);
- out_be32
[U-Boot] [PATCH 20/22] ppc4xx: switch PLU405 to generic board
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu --- include/configs/PLU405.h |2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index 8705161..a236e11 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -21,6 +21,8 @@ #define CONFIG_PLU405 1 /* ...on a PLU405 board */ #defineCONFIG_SYS_TEXT_BASE0xFFF8 +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO #define CONFIG_BOARD_EARLY_INIT_F 1/* call board_early_init_f()*/ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 04/22] ppc4xx: remove CMS700 board
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
arch/powerpc/cpu/ppc4xx/Kconfig |4 -
board/esd/cms700/Kconfig| 12 --
board/esd/cms700/MAINTAINERS|6 -
board/esd/cms700/Makefile | 16 --
board/esd/cms700/cms700.c | 192
board/esd/cms700/flash.c| 85 ---
configs/CMS700_defconfig|3 -
doc/README.scrapyard|1 +
include/configs/CMS700.h| 308 ---
9 files changed, 1 insertion(+), 626 deletions(-)
delete mode 100644 board/esd/cms700/Kconfig
delete mode 100644 board/esd/cms700/MAINTAINERS
delete mode 100644 board/esd/cms700/Makefile
delete mode 100644 board/esd/cms700/cms700.c
delete mode 100644 board/esd/cms700/flash.c
delete mode 100644 configs/CMS700_defconfig
delete mode 100644 include/configs/CMS700.h
diff --git a/arch/powerpc/cpu/ppc4xx/Kconfig b/arch/powerpc/cpu/ppc4xx/Kconfig
index 75d0d0b..97b0d21 100644
--- a/arch/powerpc/cpu/ppc4xx/Kconfig
+++ b/arch/powerpc/cpu/ppc4xx/Kconfig
@@ -110,9 +110,6 @@ config TARGET_CATCENTER
config TARGET_PPCHAMELEONEVB
bool Support PPChameleonEVB
-config TARGET_CMS700
- bool Support CMS700
-
config TARGET_CPCI2DP
bool Support CPCI2DP
@@ -248,7 +245,6 @@ source board/avnet/v5fx30teval/Kconfig
source board/csb272/Kconfig
source board/csb472/Kconfig
source board/dave/PPChameleonEVB/Kconfig
-source board/esd/cms700/Kconfig
source board/esd/cpci2dp/Kconfig
source board/esd/cpci405/Kconfig
source board/esd/cpciiser4/Kconfig
diff --git a/board/esd/cms700/Kconfig b/board/esd/cms700/Kconfig
deleted file mode 100644
index da11bc0..000
--- a/board/esd/cms700/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_CMS700
-
-config SYS_BOARD
- default cms700
-
-config SYS_VENDOR
- default esd
-
-config SYS_CONFIG_NAME
- default CMS700
-
-endif
diff --git a/board/esd/cms700/MAINTAINERS b/board/esd/cms700/MAINTAINERS
deleted file mode 100644
index 0191c8b..000
--- a/board/esd/cms700/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-CMS700 BOARD
-M: Matthias Fuchs matthias.fu...@esd-electronics.com
-S: Maintained
-F: board/esd/cms700/
-F: include/configs/CMS700.h
-F: configs/CMS700_defconfig
diff --git a/board/esd/cms700/Makefile b/board/esd/cms700/Makefile
deleted file mode 100644
index 2bf5006..000
--- a/board/esd/cms700/Makefile
+++ /dev/null
@@ -1,16 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-# Objects for Xilinx JTAG programming (CPLD)
-CPLD= ../common/xilinx_jtag/lenval.o \
- ../common/xilinx_jtag/micro.o \
- ../common/xilinx_jtag/ports.o
-
-obj-y = cms700.o flash.o \
- ../common/misc.o \
- $(CPLD) \
- ../common/esd405ep_nand.o \
diff --git a/board/esd/cms700/cms700.c b/board/esd/cms700/cms700.c
deleted file mode 100644
index 40d7621..000
--- a/board/esd/cms700/cms700.c
+++ /dev/null
@@ -1,192 +0,0 @@
-/*
- * (C) Copyright 2005-2007
- * Matthias Fuchs, esd gmbh germany, matthias.fu...@esd-electronics.com
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include common.h
-#include asm/processor.h
-#include asm/io.h
-#include command.h
-#include malloc.h
-
-DECLARE_GLOBAL_DATA_PTR;
-
-extern void lxt971_no_sleep(void);
-
-int board_early_init_f (void)
-{
- /*
-* IRQ 0-15 405GP internally generated; active high; level sensitive
-* IRQ 16405GP internally generated; active low; level sensitive
-* IRQ 17-24 RESERVED
-* IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
-* IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
-* IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
-* IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
-* IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
-* IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
-* IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
-*/
- mtdcr(UIC0SR, 0x); /* clear all ints */
- mtdcr(UIC0ER, 0x); /* disable all ints */
- mtdcr(UIC0CR, 0x); /* set all to be non-critical*/
- mtdcr(UIC0PR, 0xFF80); /* set int polarities */
- mtdcr(UIC0TR, 0x1000); /* set int trigger levels */
- mtdcr(UIC0VCR, 0x0001); /* set vect base=0,INT0 highest
priority*/
- mtdcr(UIC0SR, 0x); /* clear all ints */
-
- /*
-* EBC Configuration Register: set ready timeout to 512 ebc-clks - ca.
15 us
-*/
- mtebc (EBC0_CFG, 0xa840); /* ebc always driven */
-
- /*
-* Reset CPLD via GPIO12 (CS3) pin
-*/
- out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR)
~CONFIG_SYS_PLD_RESET);
- udelay(1000); /* wait 1ms */
- out_be32((void *)GPIO0_OR, in_be32((void
[U-Boot] [PATCH 11/22] ppc4xx: remove OCRTC board
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
arch/powerpc/cpu/ppc4xx/Kconfig |4 -
board/esd/ocrtc/Kconfig | 12 --
board/esd/ocrtc/MAINTAINERS |6 -
board/esd/ocrtc/Makefile|8 --
board/esd/ocrtc/cmd_ocrtc.c | 68 --
board/esd/ocrtc/flash.c | 140 ---
board/esd/ocrtc/ocrtc.c | 78 ---
board/esd/ocrtc/ocrtc.h | 28
configs/OCRTC_defconfig |3 -
doc/README.scrapyard|1 +
include/configs/OCRTC.h | 285 ---
11 files changed, 1 insertion(+), 632 deletions(-)
delete mode 100644 board/esd/ocrtc/Kconfig
delete mode 100644 board/esd/ocrtc/MAINTAINERS
delete mode 100644 board/esd/ocrtc/Makefile
delete mode 100644 board/esd/ocrtc/cmd_ocrtc.c
delete mode 100644 board/esd/ocrtc/flash.c
delete mode 100644 board/esd/ocrtc/ocrtc.c
delete mode 100644 board/esd/ocrtc/ocrtc.h
delete mode 100644 configs/OCRTC_defconfig
delete mode 100644 include/configs/OCRTC.h
diff --git a/arch/powerpc/cpu/ppc4xx/Kconfig b/arch/powerpc/cpu/ppc4xx/Kconfig
index cab8f25..ea4227e 100644
--- a/arch/powerpc/cpu/ppc4xx/Kconfig
+++ b/arch/powerpc/cpu/ppc4xx/Kconfig
@@ -125,9 +125,6 @@ config TARGET_CPCI405AB
config TARGET_CPCI405DT
bool Support CPCI405DT
-config TARGET_OCRTC
- bool Support OCRTC
-
config TARGET_PCI405
bool Support PCI405
@@ -229,7 +226,6 @@ source board/csb472/Kconfig
source board/dave/PPChameleonEVB/Kconfig
source board/esd/cpci2dp/Kconfig
source board/esd/cpci405/Kconfig
-source board/esd/ocrtc/Kconfig
source board/esd/pci405/Kconfig
source board/esd/plu405/Kconfig
source board/esd/pmc405/Kconfig
diff --git a/board/esd/ocrtc/Kconfig b/board/esd/ocrtc/Kconfig
deleted file mode 100644
index 44b402d..000
--- a/board/esd/ocrtc/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_OCRTC
-
-config SYS_BOARD
- default ocrtc
-
-config SYS_VENDOR
- default esd
-
-config SYS_CONFIG_NAME
- default OCRTC
-
-endif
diff --git a/board/esd/ocrtc/MAINTAINERS b/board/esd/ocrtc/MAINTAINERS
deleted file mode 100644
index 85c1a12..000
--- a/board/esd/ocrtc/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-OCRTC BOARD
-M: Matthias Fuchs matthias.fu...@esd-electronics.com
-S: Maintained
-F: board/esd/ocrtc/
-F: include/configs/OCRTC.h
-F: configs/OCRTC_defconfig
diff --git a/board/esd/ocrtc/Makefile b/board/esd/ocrtc/Makefile
deleted file mode 100644
index 44b7d5d..000
--- a/board/esd/ocrtc/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2001-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y = ocrtc.o flash.o ../common/misc.o cmd_ocrtc.o
diff --git a/board/esd/ocrtc/cmd_ocrtc.c b/board/esd/ocrtc/cmd_ocrtc.c
deleted file mode 100644
index 6dcbd8b..000
--- a/board/esd/ocrtc/cmd_ocrtc.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * (C) Copyright 2003
- * Stefan Roese, esd gmbh germany, stefan.ro...@esd-electronics.com
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include common.h
-#include command.h
-#include pci.h
-#include pci_ids.h
-#include asm/4xx_pci.h
-
-
-#if defined(CONFIG_CMD_BSP)
-
-/*
- * Set device number on pci board
- */
-int do_setdevice(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- int idx = 1; /* start at 1 (skip device 0) */
- pci_dev_t bdf = 0;
- u32 addr;
-
- while (bdf = 0) {
- if ((bdf = pci_find_device(PCI_VENDOR_ID_IBM,
PCI_DEVICE_ID_IBM_405GP, idx++)) 0) {
- break;
- }
- printf(Found device nr %d at %x!\n, idx-1, bdf);
- pci_read_config_dword(bdf, PCI_BASE_ADDRESS_1, addr);
- addr = ~0xf;
- *(u32 *)addr = (bdf 0xf800) 11;
- printf(Wrote %x at %x!\n, (bdf 0xf800) 11, addr);
- }
-
- return 0;
-}
-U_BOOT_CMD(
- setdevice, 1, 1, do_setdevice,
- Set device number on pci adapter boards,
-
-);
-
-
-/*
- * Get device number on pci board
- */
-int do_getdevice(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- u32 device;
- char str[32];
-
- device = *(u32 *)0x0;
- device = 0x16 - device; /* calculate vxworks bp slot id */
- sprintf(str, %d, device);
- setenv(slot, str);
- printf(Variabel slot set to %x\n, device);
-
- return 0;
-}
-U_BOOT_CMD(
- getdevice, 1, 1, do_getdevice,
- Get device number and set slot env variable,
-
-);
-
-#endif
diff --git a/board/esd/ocrtc/flash.c b/board/esd/ocrtc/flash.c
deleted file mode 100644
index 279746e..000
--- a/board/esd/ocrtc/flash.c
+++ /dev/null
@@ -1,140 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.ro...@esd-electronics.com
- *
- * SPDX-License-Identifier:GPL-2.0
[U-Boot] [PATCH 16/22] ppc4xx: remove G2000 board
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
arch/powerpc/cpu/ppc4xx/Kconfig |4 -
board/g2000/Kconfig |9 -
board/g2000/MAINTAINERS |6 -
board/g2000/Makefile|8 -
board/g2000/g2000.c | 245 -
board/g2000/strataflash.c | 774 ---
configs/G2000_defconfig |3 -
doc/README.scrapyard|1 +
include/configs/G2000.h | 383 ---
9 files changed, 1 insertion(+), 1432 deletions(-)
delete mode 100644 board/g2000/Kconfig
delete mode 100644 board/g2000/MAINTAINERS
delete mode 100644 board/g2000/Makefile
delete mode 100644 board/g2000/g2000.c
delete mode 100644 board/g2000/strataflash.c
delete mode 100644 configs/G2000_defconfig
delete mode 100644 include/configs/G2000.h
diff --git a/arch/powerpc/cpu/ppc4xx/Kconfig b/arch/powerpc/cpu/ppc4xx/Kconfig
index 6c4759a..e7163c1 100644
--- a/arch/powerpc/cpu/ppc4xx/Kconfig
+++ b/arch/powerpc/cpu/ppc4xx/Kconfig
@@ -13,9 +13,6 @@ config TARGET_CSB272
config TARGET_CSB472
bool Support csb472
-config TARGET_G2000
- bool Support G2000
-
config TARGET_JSE
bool Support JSE
@@ -218,7 +215,6 @@ source board/esd/plu405/Kconfig
source board/esd/pmc405de/Kconfig
source board/esd/pmc440/Kconfig
source board/esd/vom405/Kconfig
-source board/g2000/Kconfig
source board/gdsys/405ep/Kconfig
source board/gdsys/405ex/Kconfig
source board/gdsys/dlvision/Kconfig
diff --git a/board/g2000/Kconfig b/board/g2000/Kconfig
deleted file mode 100644
index 031fae9..000
--- a/board/g2000/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_G2000
-
-config SYS_BOARD
- default g2000
-
-config SYS_CONFIG_NAME
- default G2000
-
-endif
diff --git a/board/g2000/MAINTAINERS b/board/g2000/MAINTAINERS
deleted file mode 100644
index 8171b10..000
--- a/board/g2000/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-G2000 BOARD
-M: Matthias Fuchs matthias.fu...@esd-electronics.com
-S: Maintained
-F: board/g2000/
-F: include/configs/G2000.h
-F: configs/G2000_defconfig
diff --git a/board/g2000/Makefile b/board/g2000/Makefile
deleted file mode 100644
index 74c8053..000
--- a/board/g2000/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y = g2000.o strataflash.o
diff --git a/board/g2000/g2000.c b/board/g2000/g2000.c
deleted file mode 100644
index a64f946..000
--- a/board/g2000/g2000.c
+++ /dev/null
@@ -1,245 +0,0 @@
-/*
- * (C) Copyright 2004
- * Stefan Roese, esd gmbh germany, stefan.ro...@esd-electronics.com
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include common.h
-#include asm/processor.h
-#include command.h
-
-#define MEM_MCOPT1_INIT_VAL 0x0080
-#define MEM_RTR_INIT_VAL0x0407
-#define MEM_PMIT_INIT_VAL 0x07c0
-#define MEM_MB0CF_INIT_VAL 0x00082001
-#define MEM_MB1CF_INIT_VAL 0x04082000
-#define MEM_SDTR1_INIT_VAL 0x00854005
-#define SDRAM0_CFG_ENABLE 0x8000
-
-#define CONFIG_SYS_SDRAM_SIZE 0x0400 /* 64 MB */
-
-int board_early_init_f (void)
-{
-#if 0 /* test-only */
- mtdcr (UIC0SR, 0x); /* clear all ints */
- mtdcr (UIC0ER, 0x); /* disable all ints */
- mtdcr (UIC0CR, 0x0010);
- mtdcr (UIC0PR, 0x7FF0); /* set int polarities */
- mtdcr (UIC0TR, 0x0010); /* set int trigger levels */
- mtdcr (UIC0SR, 0x); /* clear all ints */
-#else
- mtdcr(UIC0SR, 0x); /* clear all ints */
- mtdcr(UIC0ER, 0x); /* disable all ints */
- mtdcr(UIC0CR, 0x); /* set all to be non-critical*/
- mtdcr(UIC0PR, 0xFFF0); /* set int polarities */
- mtdcr(UIC0TR, 0x1000); /* set int trigger levels */
- mtdcr(UIC0VCR, 0x0001); /* set vect base=0,INT0 highest
priority*/
- mtdcr(UIC0SR, 0x); /* clear all ints */
-#endif
-
-#if 1 /* test-only */
- /*
-* EBC Configuration Register: set ready timeout to 512 ebc-clks - ca.
15 us
-*/
- mtebc (EBC0_CFG, 0xa840); /* ebc always driven */
-#endif
-
- return 0;
-}
-
-
-int misc_init_f (void)
-{
- return 0; /* dummy implementation */
-}
-
-
-int misc_init_r (void)
-{
-#if defined(CONFIG_CMD_NAND)
- /*
-* Set NAND-FLASH GPIO signals to default
-*/
- out32(GPIO0_OR, in32(GPIO0_OR) ~(CONFIG_SYS_NAND_CLE |
CONFIG_SYS_NAND_ALE));
- out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_NAND_CE);
-#endif
-
- return (0);
-}
-
-
-/*
- * Check Board Identity:
- */
-int checkboard (void)
-{
- char str[64];
- int i = getenv_f(serial#, str, sizeof(str));
-
- puts (Board: );
-
- if (i == -1) {
- puts (### No HW ID - assuming
[U-Boot] [PATCH 17/22] ppc4xx: remove some CPCI405 variants
only keep CPCI4052 Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu --- arch/powerpc/cpu/ppc4xx/Kconfig |9 - board/esd/cpci405/Kconfig | 39 configs/CPCI405AB_defconfig |3 - configs/CPCI405DT_defconfig |3 - configs/CPCI405_defconfig |3 - doc/README.scrapyard|3 + include/configs/CPCI405.h | 320 - include/configs/CPCI405AB.h | 373 -- include/configs/CPCI405DT.h | 376 --- 9 files changed, 3 insertions(+), 1126 deletions(-) delete mode 100644 configs/CPCI405AB_defconfig delete mode 100644 configs/CPCI405DT_defconfig delete mode 100644 configs/CPCI405_defconfig delete mode 100644 include/configs/CPCI405.h delete mode 100644 include/configs/CPCI405AB.h delete mode 100644 include/configs/CPCI405DT.h diff --git a/arch/powerpc/cpu/ppc4xx/Kconfig b/arch/powerpc/cpu/ppc4xx/Kconfig index e7163c1..a40ae3b 100644 --- a/arch/powerpc/cpu/ppc4xx/Kconfig +++ b/arch/powerpc/cpu/ppc4xx/Kconfig @@ -110,18 +110,9 @@ config TARGET_PPCHAMELEONEVB config TARGET_CPCI2DP bool Support CPCI2DP -config TARGET_CPCI405 - bool Support CPCI405 - config TARGET_CPCI4052 bool Support CPCI4052 -config TARGET_CPCI405AB - bool Support CPCI405AB - -config TARGET_CPCI405DT - bool Support CPCI405DT - config TARGET_PLU405 bool Support PLU405 diff --git a/board/esd/cpci405/Kconfig b/board/esd/cpci405/Kconfig index bc56907..0df2755 100644 --- a/board/esd/cpci405/Kconfig +++ b/board/esd/cpci405/Kconfig @@ -1,16 +1,3 @@ -if TARGET_CPCI405 - -config SYS_BOARD - default cpci405 - -config SYS_VENDOR - default esd - -config SYS_CONFIG_NAME - default CPCI405 - -endif - if TARGET_CPCI4052 config SYS_BOARD @@ -23,29 +10,3 @@ config SYS_CONFIG_NAME default CPCI4052 endif - -if TARGET_CPCI405AB - -config SYS_BOARD - default cpci405 - -config SYS_VENDOR - default esd - -config SYS_CONFIG_NAME - default CPCI405AB - -endif - -if TARGET_CPCI405DT - -config SYS_BOARD - default cpci405 - -config SYS_VENDOR - default esd - -config SYS_CONFIG_NAME - default CPCI405DT - -endif diff --git a/configs/CPCI405AB_defconfig b/configs/CPCI405AB_defconfig deleted file mode 100644 index 6550fd1..000 --- a/configs/CPCI405AB_defconfig +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_PPC=y -CONFIG_4xx=y -CONFIG_TARGET_CPCI405AB=y diff --git a/configs/CPCI405DT_defconfig b/configs/CPCI405DT_defconfig deleted file mode 100644 index b61f65c..000 --- a/configs/CPCI405DT_defconfig +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_PPC=y -CONFIG_4xx=y -CONFIG_TARGET_CPCI405DT=y diff --git a/configs/CPCI405_defconfig b/configs/CPCI405_defconfig deleted file mode 100644 index 1638e2b..000 --- a/configs/CPCI405_defconfig +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_PPC=y -CONFIG_4xx=y -CONFIG_TARGET_CPCI405=y diff --git a/doc/README.scrapyard b/doc/README.scrapyard index 69daaab..9172f6c 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -12,6 +12,9 @@ The list should be sorted in reverse chronological order. BoardArchCPUCommit Removed Last known maintainer/contact = +CPCI405 ppc4xx 405gp - - Matthias Fuchs matthias.fu...@esd.eu +CPCI405DTppc4xx 405gpr - - Matthias Fuchs matthias.fu...@esd.eu +CPCI405ABppc4xx 405gpr - - Matthias Fuchs matthias.fu...@esd.eu G2000ppc4xx 405ep - - Matthias Fuchs matthias.fu...@esd.eu WUH405 ppc4xx 405ep - - Matthias Fuchs matthias.fu...@esd.eu VOH405 ppc4xx 405ep - - Matthias Fuchs matthias.fu...@esd.eu diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h deleted file mode 100644 index 34252d4..000 --- a/include/configs/CPCI405.h +++ /dev/null @@ -1,320 +0,0 @@ -/* - * (C) Copyright 2001 - * Stefan Roese, esd gmbh germany, stefan.ro...@esd-electronics.com - * - * SPDX-License-Identifier:GPL-2.0+ - */ - -/* - * board/config.h - configuration options, board specific - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ - -#define CONFIG_405GP 1 /* This is a PPC405 CPU */ -#define CONFIG_CPCI405 1 /* ...on a CPCI405 board*/ - -#defineCONFIG_SYS_TEXT_BASE0xFFFC - -#define CONFIG_BOARD_EARLY_INIT_F 1/* call board_early_init_f()*/ -#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ - -#define CONFIG_SYS_CLK_FREQ3300 /* external frequency to pll */ - -#define
[U-Boot] [PATCH 21/22] ppc4xx: switch PMC405DE to generic board
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu --- include/configs/PMC405DE.h |2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/PMC405DE.h b/include/configs/PMC405DE.h index 94b9547..f7d28e3 100644 --- a/include/configs/PMC405DE.h +++ b/include/configs/PMC405DE.h @@ -12,6 +12,8 @@ #define CONFIG_PMC405DE1 /* ...on a PMC405DE board */ #defineCONFIG_SYS_TEXT_BASE0xFFFC +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO #define CONFIG_BOARD_EARLY_INIT_F 1/* call board_early_init_f()*/ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 22/22] ppc4xx: switch VOM405 to generic board
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu --- include/configs/VOM405.h |2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/VOM405.h b/include/configs/VOM405.h index c06897b..e229256 100644 --- a/include/configs/VOM405.h +++ b/include/configs/VOM405.h @@ -19,6 +19,8 @@ #define CONFIG_VOM405 1 /* ...on a VOM405 board */ #defineCONFIG_SYS_TEXT_BASE0xFFFC8000 +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO #define CONFIG_BOARD_EARLY_INIT_F 1/* call board_early_init_f()*/ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 12/22] ppc4xx: remove PCI405 board
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
arch/powerpc/cpu/ppc4xx/Kconfig |4 -
board/esd/pci405/Kconfig| 12 -
board/esd/pci405/MAINTAINERS|6 -
board/esd/pci405/Makefile |9 -
board/esd/pci405/cmd_pci405.c | 97 ---
board/esd/pci405/flash.c| 85 ---
board/esd/pci405/fpgadata.c | 1492 ---
board/esd/pci405/pci405.c | 366 --
board/esd/pci405/pci405.h | 16 -
board/esd/pci405/writeibm.S | 205 --
configs/PCI405_defconfig|3 -
doc/README.scrapyard|1 +
include/configs/PCI405.h| 294
13 files changed, 1 insertion(+), 2589 deletions(-)
delete mode 100644 board/esd/pci405/Kconfig
delete mode 100644 board/esd/pci405/MAINTAINERS
delete mode 100644 board/esd/pci405/Makefile
delete mode 100644 board/esd/pci405/cmd_pci405.c
delete mode 100644 board/esd/pci405/flash.c
delete mode 100644 board/esd/pci405/fpgadata.c
delete mode 100644 board/esd/pci405/pci405.c
delete mode 100644 board/esd/pci405/pci405.h
delete mode 100644 board/esd/pci405/writeibm.S
delete mode 100644 configs/PCI405_defconfig
delete mode 100644 include/configs/PCI405.h
diff --git a/arch/powerpc/cpu/ppc4xx/Kconfig b/arch/powerpc/cpu/ppc4xx/Kconfig
index ea4227e..0e8cbf3 100644
--- a/arch/powerpc/cpu/ppc4xx/Kconfig
+++ b/arch/powerpc/cpu/ppc4xx/Kconfig
@@ -125,9 +125,6 @@ config TARGET_CPCI405AB
config TARGET_CPCI405DT
bool Support CPCI405DT
-config TARGET_PCI405
- bool Support PCI405
-
config TARGET_PLU405
bool Support PLU405
@@ -226,7 +223,6 @@ source board/csb472/Kconfig
source board/dave/PPChameleonEVB/Kconfig
source board/esd/cpci2dp/Kconfig
source board/esd/cpci405/Kconfig
-source board/esd/pci405/Kconfig
source board/esd/plu405/Kconfig
source board/esd/pmc405/Kconfig
source board/esd/pmc405de/Kconfig
diff --git a/board/esd/pci405/Kconfig b/board/esd/pci405/Kconfig
deleted file mode 100644
index 0a6524d..000
--- a/board/esd/pci405/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_PCI405
-
-config SYS_BOARD
- default pci405
-
-config SYS_VENDOR
- default esd
-
-config SYS_CONFIG_NAME
- default PCI405
-
-endif
diff --git a/board/esd/pci405/MAINTAINERS b/board/esd/pci405/MAINTAINERS
deleted file mode 100644
index cf9c1c9..000
--- a/board/esd/pci405/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-PCI405 BOARD
-M: Matthias Fuchs matthias.fu...@esd-electronics.com
-S: Maintained
-F: board/esd/pci405/
-F: include/configs/PCI405.h
-F: configs/PCI405_defconfig
diff --git a/board/esd/pci405/Makefile b/board/esd/pci405/Makefile
deleted file mode 100644
index 9e659c7..000
--- a/board/esd/pci405/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y = pci405.o flash.o ../common/misc.o cmd_pci405.o
-obj-y += writeibm.o
diff --git a/board/esd/pci405/cmd_pci405.c b/board/esd/pci405/cmd_pci405.c
deleted file mode 100644
index 29c688a..000
--- a/board/esd/pci405/cmd_pci405.c
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * (C) Copyright 2002-2004
- * Stefan Roese, esd gmbh germany, stefan.ro...@esd-electronics.com
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include common.h
-#include command.h
-#include malloc.h
-#include net.h
-#include asm/io.h
-#include pci.h
-#include asm/4xx_pci.h
-#include asm/processor.h
-
-#include pci405.h
-
-#if defined(CONFIG_CMD_BSP)
-
-/*
- * Command loadpci: wait for signal from host and boot image.
- */
-int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- unsigned int *ptr;
- int count = 0;
- int count2 = 0;
- int i;
- char addr[16];
- char str[] = \\|/-;
- char *local_args[2];
-
- /*
-* Mark sync address
-*/
- ptr = 0;
- /* cppcheck-suppress nullPointer */
- *ptr = 0x;
- puts(\nWaiting for image from pci host -);
-
- /*
-* Wait for host to write the start address
-*/
- /* cppcheck-suppress nullPointer */
- while (*ptr == 0x) {
- count++;
- if (!(count % 100)) {
- count2++;
- putc(0x08); /* backspace */
- putc(str[count2 % 4]);
- }
-
- /* Abort if ctrl-c was pressed */
- if (ctrlc()) {
- puts(\nAbort\n);
- return 0;
- }
-
- udelay(1000);
- }
-
- if (*ptr == PCI_RECONFIG_MAGIC) {
- /*
-* Save own pci configuration in PRAM
-*/
- memset((char *)PCI_REGS_ADDR, 0, PCI_REGS_LEN);
- ptr = (unsigned int *)PCI_REGS_ADDR + 1;
- for (i=0; i0x40; i+=4
Re: [U-Boot] [PATCH] m68k: remove TASREG board
Hi, On 01/13/2015 03:16 AM, Huan Wang wrote: Hi, -Original Message- From: Matthias Fuchs [mailto:matthias.fu...@esd.eu] Sent: Tuesday, January 13, 2015 5:34 AM To: u-boot@lists.denx.de Cc: Wang Huan-B18965; Matthias Fuchs Subject: [PATCH] m68k: remove TASREG board Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu --- [Alison Wang] May I ask you why you want to remove TASREG board you maintained? this board support hasn't been tested on real hardware for a very long time and will probably never be tested again on this obsolete board. I use the current (nearly completed) movement to the generic initialization sequence as motivation to clean up a couple of boards in this state. It is very cool how long this board swam on the U-Boot community's waves. But now its time to go. I think Stefan as the initial author is with me :-) Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 9/9] board/esd/common/auto_update.c: fix Uninitialized variable
On 11/06/2014 02:03 PM, Wolfgang Denk wrote:
cppcheck reports:
[board/esd/common/auto_update.c:458]: (error) Uninitialized variable: cnt
The variable is not really used anywhere, so remove it.
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: Matthias Fuchs matthias.fu...@esd-electronics.com
---
board/esd/common/auto_update.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/board/esd/common/auto_update.c b/board/esd/common/auto_update.c
index 85c3567..b168074 100644
--- a/board/esd/common/auto_update.c
+++ b/board/esd/common/auto_update.c
@@ -377,7 +377,7 @@ int do_auto_update(void)
{
block_dev_desc_t *stor_dev = NULL;
long sz;
- int i, res, cnt, old_ctrlc;
+ int i, res, old_ctrlc;
char buffer[32];
char str[80];
int n;
@@ -455,7 +455,6 @@ int do_auto_update(void)
clear_ctrlc ();
break;
}
- cnt++;
} while (res 0);
}
Thanks for fixing!
Acked-by: Matthias Fuchs matthias.fu...@esd.eu
___
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[U-Boot] [PATCH v2] ppc4xx: update PMC440 board support
- switch to GENERIC_BOARD - fix env support from eeprom Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu --- changes in v2: - add CONFIG_DISPLAY_BOARDINFO to enable checkboard() for correct hardware revision handling board/esd/pmc440/cmd_pmc440.c |6 +++--- include/configs/PMC440.h |4 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/board/esd/pmc440/cmd_pmc440.c b/board/esd/pmc440/cmd_pmc440.c index 3481e46..40b135f 100644 --- a/board/esd/pmc440/cmd_pmc440.c +++ b/board/esd/pmc440/cmd_pmc440.c @@ -347,16 +347,16 @@ int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return 1; } - base = gd-bd-bi_memsize; + base = (u32)gd-ram_size; #if defined(CONFIG_LOGBUFFER) base -= LOGBUFF_LEN + LOGBUFF_OVERHEAD; #endif /* -* gd-bd-bi_memsize == physical ram size - CONFIG_SYS_MEM_TOP_HIDE +* gd-ram_size == physical ram size - CONFIG_SYS_MEM_TOP_HIDE */ param = base - (pram 10); printf(PARAM: @%08x\n, param); - debug(memsize=0x%08x, base=0x%08x\n, (u32)gd-bd-bi_memsize, base); + debug(memsize=0x%08x, base=0x%08x\n, (u32)gd-ram_size, base); /* clear entire PA ram */ memset((void*)param, 0, (pram 10)); diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index c5e2f16..c29429d 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -29,2 +29,2 @@ #define CONFIG_SYS_TEXT_BASE 0xFFF9 #endif +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO + #define CONFIG_SYS_CLK_FREQ3400 #if 0 /* temporary disabled because OS/9 does not like dcache on startup */ @@ -133,1 +136,1 @@ #endif #ifdef CONFIG_ENV_IS_IN_EEPROM +#define CONFIG_I2C_ENV_EEPROM_BUS 0 #define CONFIG_ENV_OFFSET 0 /* environment starts at the beginning of the EEPROM */ #define CONFIG_ENV_SIZE0x1000 /* 4096 bytes may be used for env vars */ #endif -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ppc4xx: update PMC440 board support
Hi Anatolij, On 10/23/2014 06:09 PM, Anatolij Gustschin wrote: Hi Matthias, On Thu, 23 Oct 2014 17:50:23 +0200 Matthias Fuchs matthias.fu...@esd.eu wrote: ... diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index c5e2f16..dc2c976 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -29,6 +29,8 @@ #define CONFIG_SYS_TEXT_BASE0xFFF9 #endif +#define CONFIG_SYS_GENERIC_BOARD you also need #define CONFIG_DISPLAY_BOARDINFO Otherwise the checkboard() won't get called and the board revision detection will be skipped. This will affect reset_phy() later. Please check. Thanks, Anatolij good catch. I did'n noticed the missing output line. v2 patch is on the road. Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Revert common, env: Fix support for environment in i2c eeprom
Hi Valentin, On 10/14/2014 04:21 PM, Valentin Longchamp wrote: Hi Matthias, On 10/14/2014 02:32 PM, Matthias Fuchs wrote: Hi Valentin, my patch fixed environment from i2c eeprom. I am not sure on which board I ran into that trouble. Probably PMC440. So reverting my former patch will break environment in i2c eeprom again on many boards. Good that you have answered to patch. I run into that trouble on our Keymile boards that have the environment in the EEPROM. On our boards, the environment eeprom works with or without your patch. However, with your patch, I cannot directly access ANY eeprom which is not on the CONFIG_I2C_ENV_EEPROM_BUS bus. But perhaps there's a better way to fix that. I think that the proposal that Holger made to actually define CONFIG_I2C_ENV_EEPROM_BUS for your boards is what I would try first. I reverted my former patch and switchedd towards CONFIG_I2C_ENV_EEPROM_BUS. This works fine for me. So I ack your patch to revert mine :-) Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Revert common, env: Fix support for environment in i2c eeprom
Hi Valentin, On 10/14/2014 04:21 PM, Valentin Longchamp wrote: Hi Matthias, On 10/14/2014 02:32 PM, Matthias Fuchs wrote: Hi Valentin, my patch fixed environment from i2c eeprom. I am not sure on which board I ran into that trouble. Probably PMC440. So reverting my former patch will break environment in i2c eeprom again on many boards. Good that you have answered to patch. I run into that trouble on our Keymile boards that have the environment in the EEPROM. On our boards, the environment eeprom works with or without your patch. However, with your patch, I cannot directly access ANY eeprom which is not on the CONFIG_I2C_ENV_EEPROM_BUS bus. But perhaps there's a better way to fix that. I think that the proposal that Holger made to actually define CONFIG_I2C_ENV_EEPROM_BUS for your boards is what I would try first. I reverted my former patch and switched towards CONFIG_I2C_ENV_EEPROM_BUS. This works fine for me. I will post a patch soon. So Acked-by: Matthias Fuchs matthias.fu...@esd.eu ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] ppc4xx: update PMC440 board support
- switch to GENERIC_BOARD - fix env support from eeprom Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu --- board/esd/pmc440/cmd_pmc440.c |6 +++--- include/configs/PMC440.h |3 +++ 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/board/esd/pmc440/cmd_pmc440.c b/board/esd/pmc440/cmd_pmc440.c index 3481e46..40b135f 100644 --- a/board/esd/pmc440/cmd_pmc440.c +++ b/board/esd/pmc440/cmd_pmc440.c @@ -347,16 +347,16 @@ int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return 1; } - base = gd-bd-bi_memsize; + base = (u32)gd-ram_size; #if defined(CONFIG_LOGBUFFER) base -= LOGBUFF_LEN + LOGBUFF_OVERHEAD; #endif /* -* gd-bd-bi_memsize == physical ram size - CONFIG_SYS_MEM_TOP_HIDE +* gd-ram_size == physical ram size - CONFIG_SYS_MEM_TOP_HIDE */ param = base - (pram 10); printf(PARAM: @%08x\n, param); - debug(memsize=0x%08x, base=0x%08x\n, (u32)gd-bd-bi_memsize, base); + debug(memsize=0x%08x, base=0x%08x\n, (u32)gd-ram_size, base); /* clear entire PA ram */ memset((void*)param, 0, (pram 10)); diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index c5e2f16..dc2c976 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -29,6 +29,8 @@ #define CONFIG_SYS_TEXT_BASE 0xFFF9 #endif +#define CONFIG_SYS_GENERIC_BOARD + #define CONFIG_SYS_CLK_FREQ3400 #if 0 /* temporary disabled because OS/9 does not like dcache on startup */ @@ -133,6 +135,7 @@ #endif #ifdef CONFIG_ENV_IS_IN_EEPROM +#define CONFIG_I2C_ENV_EEPROM_BUS 0 #define CONFIG_ENV_OFFSET 0 /* environment starts at the beginning of the EEPROM */ #define CONFIG_ENV_SIZE0x1000 /* 4096 bytes may be used for env vars */ #endif -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Revert common, env: Fix support for environment in i2c eeprom
Hi Valentin, my patch fixed environment from i2c eeprom. I am not sure on which board I ran into that trouble. Probably PMC440. So reverting my former patch will break environment in i2c eeprom again on many boards. But perhaps there's a better way to fix that. Matthias On 10/14/2014 11:16 AM, Valentin Longchamp wrote: Since i2c_init_all always sets the bus back to CONFIG_SYS_SPD_BUS_NUM for compatibility reasons, it means that any eeprom not located on this CONFIG_SYS_SPD_BUS_NUM is not accessible with the eeprom commands, even if you change the bus number with an i2c dev command before. Furthermore i2c_init_all should disappear and is currently only called from the early board initialisation sequences, it is not suited for other usage. This reverts commit 01a0c64762e902971b34587a8a61b59e9ea51374. Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com --- common/cmd_eeprom.c | 9 ++--- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/common/cmd_eeprom.c b/common/cmd_eeprom.c index a02f0cb..29f0f1f 100644 --- a/common/cmd_eeprom.c +++ b/common/cmd_eeprom.c @@ -389,13 +389,8 @@ void eeprom_init (void) #if defined(CONFIG_SPI) !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) spi_init_f (); #endif -#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT) || \ - defined(CONFIG_SYS_I2C) -#ifdef CONFIG_SYS_I2C - i2c_init_all(); -#else - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); -#endif +#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT) + i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); #endif } -- Dipl.-Ing. Matthias Fuchs Head of System Design esd electronic system design gmbh Vahrenwalder Str. 207 - 30165 Hannover - GERMANY Phone: +49-511-37298-0 - Fax: +49-511-37298-68 Please visit our homepage http://www.esd.eu Quality Products - Made in Germany - Geschäftsführer: Klaus Detering Amtsgericht Hannover HRB 51373 - VAT-ID DE 115672832 - ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Revert common, env: Fix support for environment in i2c eeprom
On 10/14/2014 03:01 PM, Holger Brunck wrote: On 10/14/2014 02:32 PM, Matthias Fuchs wrote: Hi Valentin, my patch fixed environment from i2c eeprom. I am not sure on which board I ran into that trouble. Probably PMC440. So reverting my former patch will break environment in i2c eeprom again on many boards. But perhaps there's a better way to fix that. do you have CONFIG_I2C_ENV_EEPROM_BUS defined in your board config? No, I will give it a try. Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] board: esd: remove remainders of dead boards
Hi Masahiro, On 31.03.2014 05:59, Masahiro Yamada wrote: Commit 99bcad18 deleted ADCIOP and DASA_SIM board support but missed to delete board/esd/adciop and board/esd/dasa_sim. It also missed to add entries to doc/README.scrapyard. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Cc: Stefan Roese s...@denx.de thanks. Acked-by: Matthias Fuchs matthias.fu...@esd.eu Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V2] 4xx: add support for new PMC440 revision with cleanup
This patch adds support for the new PMC440 hardware revision 1.4.
The board now uses Micrel KSZ9031 phys.
Add missing i2c initialization before reading bootstrap eeprom.
Fix a couple of coding style issues.
Make local functions static.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
board/esd/pmc440/pmc440.c | 165 +++--
1 file changed, 101 insertions(+), 64 deletions(-)
V2:
- combine two previous patches into a single one
- put vsc8601 setup into a separate function
- general cleanup
- make local functions static
- fix a couple of coding style issues
diff --git a/board/esd/pmc440/pmc440.c b/board/esd/pmc440/pmc440.c
index e86996c..062ae67 100644
--- a/board/esd/pmc440/pmc440.c
+++ b/board/esd/pmc440/pmc440.c
@@ -12,7 +12,6 @@
*
* SPDX-License-Identifier:GPL-2.0+
*/
-
#include common.h
#include libfdt.h
#include fdt_support.h
@@ -34,14 +33,14 @@
DECLARE_GLOBAL_DATA_PTR;
-extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH
chips */
+extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
extern void __ft_board_setup(void *blob, bd_t *bd);
ulong flash_get_size(ulong base, int banknum);
-int pci_is_66mhz(void);
+static int pci_is_66mhz(void);
int is_monarch(void);
-int bootstrap_eeprom_read(unsigned dev_addr, unsigned offset,
- uchar *buffer, unsigned cnt);
+static int bootstrap_eeprom_read(unsigned dev_addr, unsigned offset,
+uchar *buffer, unsigned cnt);
struct serial_device *default_serial_console(void)
{
@@ -58,23 +57,24 @@ struct serial_device *default_serial_console(void)
if (((val 0xf000) 29) != 7)
return eserial2_device;
- ulong scratchreg = in_be32((void*)GPIO0_ISR3L);
+ ulong scratchreg = in_be32((void *)GPIO0_ISR3L);
if (!(scratchreg 0x80)) {
/* mark scratchreg valid */
scratchreg = (scratchreg 0xff00) | 0x80;
+ i2c_init_all();
+
i = bootstrap_eeprom_read(CONFIG_SYS_I2C_BOOT_EEPROM_ADDR,
0x10, buf, 4);
if ((i != -1) (buf[0] == 0x19) (buf[1] == 0x75)) {
scratchreg |= buf[2];
/* bringup delay for console */
- for (delay=0; delay(1000 * (ulong)buf[3]); delay++) {
+ for (delay = 0; delay (1000 * (ulong)buf[3]); delay++)
udelay(1000);
- }
} else
scratchreg |= 0x01;
- out_be32((void*)GPIO0_ISR3L, scratchreg);
+ out_be32((void *)GPIO0_ISR3L, scratchreg);
}
if (scratchreg 0x01)
@@ -93,10 +93,7 @@ int board_early_init_f(void)
mtdcr(EBC0_CFGADDR, EBC0_CFG);
mtdcr(EBC0_CFGDATA, 0xf840);
- /*
-* Setup the GPIO pins
-* TODO: setup GPIOs via CONFIG_SYS_4xx_GPIO_TABLE in board's config
file
-*/
+ /* Setup the GPIO pins */
out_be32((void *)GPIO0_OR,0x4102);
out_be32((void *)GPIO0_TCR, 0x4c90011f);
out_be32((void *)GPIO0_OSRL, 0x28051400);
@@ -259,7 +256,7 @@ int misc_init_r(void)
* USB suff...
*/
if ((act == NULL || strcmp(act, host) == 0)
- !(in_be32((void*)GPIO0_IR) GPIO0_USB_PRSNT)){
+ !(in_be32((void *)GPIO0_IR) GPIO0_USB_PRSNT)) {
/* SDR Setting */
mfsdr(SDR0_PFC1, sdr0_pfc1);
mfsdr(SDR0_USB2D0CR, usb2d0cr);
@@ -326,16 +323,16 @@ int misc_init_r(void)
mtsdr(SDR0_SRST1, 0x);
mtsdr(SDR0_SRST0, 0x);
- if (!(in_be32((void*)GPIO0_IR) GPIO0_USB_PRSNT)) {
+ if (!(in_be32((void *)GPIO0_IR) GPIO0_USB_PRSNT)) {
/* enable power on USB socket */
- out_be32((void*)GPIO1_OR,
-in_be32((void*)GPIO1_OR) ~GPIO1_USB_PWR_N);
+ out_be32((void *)GPIO1_OR,
+in_be32((void *)GPIO1_OR) ~GPIO1_USB_PWR_N);
}
printf(USB: Host\n);
} else if ((strcmp(act, dev) == 0) ||
- (in_be32((void*)GPIO0_IR) GPIO0_USB_PRSNT)) {
+ (in_be32((void *)GPIO0_IR) GPIO0_USB_PRSNT)) {
mfsdr(SDR0_USB2PHY0CR, usb2phy0cr);
usb2phy0cr = usb2phy0cr ~SDR0_USB2PHY0CR_XOCLK_MASK;
@@ -414,30 +411,31 @@ int misc_init_r(void)
#endif
/* turn off POST LED */
- out_be32((void*)GPIO1_OR, in_be32((void*)GPIO1_OR) ~GPIO1_POST_N);
+ out_be32((void *)GPIO1_OR, in_be32((void *)GPIO1_OR) ~GPIO1_POST_N);
/* turn on RUN LED */
- out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) ~GPIO0_LED_RUN_N);
+ out_be32((void *)GPIO0_OR
[U-Boot] [PATCH] common, env: Fix support for environment in i2c eeprom
When using CONFIG_SYS_I2C i2c needs to be initialized by i2c_init_all(). This is done in some places but not in eeprom_init(). Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu --- common/cmd_eeprom.c |9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/common/cmd_eeprom.c b/common/cmd_eeprom.c index 3924805..fad462f 100644 --- a/common/cmd_eeprom.c +++ b/common/cmd_eeprom.c @@ -389,8 +389,13 @@ void eeprom_init (void) #if defined(CONFIG_SPI) !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) spi_init_f (); #endif -#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT) - i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); +#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT) || \ + defined(CONFIG_SYS_I2C) +#ifdef CONFIG_SYS_I2C + i2c_init_all(); +#else + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); +#endif #endif } -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] 4xx: add support for new PMC440 revision
This patch adds support for the new PMC440 hardware revision 1.4.
The board now uses Micrel KSZ9031 phys.
Add missing i2c initialization before reading bootstrap eeprom.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
board/esd/pmc440/pmc440.c | 83 +
1 file changed, 62 insertions(+), 21 deletions(-)
diff --git a/board/esd/pmc440/pmc440.c b/board/esd/pmc440/pmc440.c
index e86996c..7aee8e4 100644
--- a/board/esd/pmc440/pmc440.c
+++ b/board/esd/pmc440/pmc440.c
@@ -63,6 +63,8 @@ struct serial_device *default_serial_console(void)
/* mark scratchreg valid */
scratchreg = (scratchreg 0xff00) | 0x80;
+ i2c_init_all();
+
i = bootstrap_eeprom_read(CONFIG_SYS_I2C_BOOT_EEPROM_ADDR,
0x10, buf, 4);
if ((i != -1) (buf[0] == 0x19) (buf[1] == 0x75)) {
@@ -641,34 +643,73 @@ int is_pci_host(struct pci_controller *hose)
#endif /* defined(CONFIG_PCI) */
#ifdef CONFIG_RESET_PHY_R
+int pmc440_setup_ksz9031(char *devname, int phy_addr)
+{
+ unsigned short id1, id2;
+
+ if (miiphy_read(devname, phy_addr, 2, id1) ||
+ miiphy_read(devname, phy_addr, 3, id2)) {
+ printf(Phy%d: cannot read id\n, phy_addr);
+ return -1;
+ }
+
+ if ((id1 != 0x0022) || ((id2 0xfff0) != 0x1620)) {
+ printf(Phy%d: unexpected id\n, phy_addr);
+ return -1;
+ }
+
+ /* MMD 2.08: adjust tx_clk pad skew */
+ miiphy_write(devname, phy_addr, 0x0d, 2);
+ miiphy_write(devname, phy_addr, 0x0e, 8);
+ miiphy_write(devname, phy_addr, 0x0d, 0x4002);
+ miiphy_write(devname, phy_addr, 0x0e, 0xf | (0x17 5));
+
+ return 0;
+}
void reset_phy(void)
{
char *s;
unsigned short val_method, val_behavior;
- /* special LED setup for NGCC/CANDES */
- if ((s = getenv(bd_type))
- ((!strcmp(s, ngcc)) || (!strcmp(s, candes {
- val_method = 0x0e0a;
- val_behavior = 0x0cf2;
- } else {
- /* PMC440 standard type */
- val_method = 0x0e10;
- val_behavior = 0x0cf0;
- }
+ if (gd-board_type 4) {
+ /* special LED setup for NGCC/CANDES */
+ s = getenv(bd_type);
+ if (s ((!strcmp(s, ngcc)) || (!strcmp(s, candes {
+ val_method = 0x0e0a;
+ val_behavior = 0x0cf2;
+ } else {
+ /* PMC440 standard type */
+ val_method = 0x0e10;
+ val_behavior = 0x0cf0;
+ }
- if (miiphy_write(ppc_4xx_eth0, CONFIG_PHY_ADDR, 0x1f, 0x0001) == 0) {
- miiphy_write(ppc_4xx_eth0, CONFIG_PHY_ADDR, 0x11, 0x0010);
- miiphy_write(ppc_4xx_eth0, CONFIG_PHY_ADDR, 0x11,
val_behavior);
- miiphy_write(ppc_4xx_eth0, CONFIG_PHY_ADDR, 0x10, val_method);
- miiphy_write(ppc_4xx_eth0, CONFIG_PHY_ADDR, 0x1f, 0x);
- }
+ if (miiphy_write(ppc_4xx_eth0,
+CONFIG_PHY_ADDR, 0x1f, 0x0001) == 0) {
+ miiphy_write(ppc_4xx_eth0,
+CONFIG_PHY_ADDR, 0x11, 0x0010);
+ miiphy_write(ppc_4xx_eth0,
+CONFIG_PHY_ADDR, 0x11, val_behavior);
+ miiphy_write(ppc_4xx_eth0,
+CONFIG_PHY_ADDR, 0x10, val_method);
+ miiphy_write(ppc_4xx_eth0,
+CONFIG_PHY_ADDR, 0x1f, 0x);
+ }
- if (miiphy_write(ppc_4xx_eth1, CONFIG_PHY1_ADDR, 0x1f, 0x0001) == 0) {
- miiphy_write(ppc_4xx_eth1, CONFIG_PHY1_ADDR, 0x11, 0x0010);
- miiphy_write(ppc_4xx_eth1, CONFIG_PHY1_ADDR, 0x11,
val_behavior);
- miiphy_write(ppc_4xx_eth1, CONFIG_PHY1_ADDR, 0x10,
val_method);
- miiphy_write(ppc_4xx_eth1, CONFIG_PHY1_ADDR, 0x1f, 0x);
+ if (miiphy_write(ppc_4xx_eth1,
+CONFIG_PHY1_ADDR, 0x1f, 0x0001) == 0) {
+ miiphy_write(ppc_4xx_eth1,
+CONFIG_PHY1_ADDR, 0x11, 0x0010);
+ miiphy_write(ppc_4xx_eth1,
+CONFIG_PHY1_ADDR, 0x11, val_behavior);
+ miiphy_write(ppc_4xx_eth1,
+CONFIG_PHY1_ADDR, 0x10, val_method);
+ miiphy_write(ppc_4xx_eth1,
+CONFIG_PHY1_ADDR, 0x1f, 0x);
+ }
+ } else {
+ /* rev. 1.4 uses a Micrel KSZ9031 */
+ pmc440_setup_ksz9031(ppc_4xx_eth0, CONFIG_PHY_ADDR);
+ pmc440_setup_ksz9031(ppc_4xx_eth1
Re: [U-Boot] [PATCH] 4xx: add support for new PMC440 revision
On 19.03.2014 12:44, Stefan Roese wrote:
-if (miiphy_write(ppc_4xx_eth0, CONFIG_PHY_ADDR, 0x1f, 0x0001) == 0) {
-miiphy_write(ppc_4xx_eth0, CONFIG_PHY_ADDR, 0x11, 0x0010);
-miiphy_write(ppc_4xx_eth0, CONFIG_PHY_ADDR, 0x11,
val_behavior);
-miiphy_write(ppc_4xx_eth0, CONFIG_PHY_ADDR, 0x10, val_method);
-miiphy_write(ppc_4xx_eth0, CONFIG_PHY_ADDR, 0x1f, 0x);
-}
+if (miiphy_write(ppc_4xx_eth0,
+ CONFIG_PHY_ADDR, 0x1f, 0x0001) == 0) {
+miiphy_write(ppc_4xx_eth0,
+ CONFIG_PHY_ADDR, 0x11, 0x0010);
+miiphy_write(ppc_4xx_eth0,
+ CONFIG_PHY_ADDR, 0x11, val_behavior);
+miiphy_write(ppc_4xx_eth0,
+ CONFIG_PHY_ADDR, 0x10, val_method);
+miiphy_write(ppc_4xx_eth0,
+ CONFIG_PHY_ADDR, 0x1f, 0x);
+}
-if (miiphy_write(ppc_4xx_eth1, CONFIG_PHY1_ADDR, 0x1f, 0x0001) == 0) {
-miiphy_write(ppc_4xx_eth1, CONFIG_PHY1_ADDR, 0x11, 0x0010);
-miiphy_write(ppc_4xx_eth1, CONFIG_PHY1_ADDR, 0x11,
val_behavior);
-miiphy_write(ppc_4xx_eth1, CONFIG_PHY1_ADDR, 0x10,
val_method);
-miiphy_write(ppc_4xx_eth1, CONFIG_PHY1_ADDR, 0x1f, 0x);
+if (miiphy_write(ppc_4xx_eth1,
+ CONFIG_PHY1_ADDR, 0x1f, 0x0001) == 0) {
+miiphy_write(ppc_4xx_eth1,
+ CONFIG_PHY1_ADDR, 0x11, 0x0010);
+miiphy_write(ppc_4xx_eth1,
+ CONFIG_PHY1_ADDR, 0x11, val_behavior);
+miiphy_write(ppc_4xx_eth1,
+ CONFIG_PHY1_ADDR, 0x10, val_method);
+miiphy_write(ppc_4xx_eth1,
+ CONFIG_PHY1_ADDR, 0x1f, 0x);
+}
This if () section looks very similar to the one before in this patch.
Only difference is the string ppc_4xx_eth1. Can't you move this code
into a function to reduce the code size?
I know this code duplication was not introduced with this patch. But it
makes sense to simplify this now for my taste.
You might be right. But I will put it into a separate refacturing
patch. Stay tuned.
Matthias
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[U-Boot] [PATCH] 4xx: cleanup ethernet phy initialization on PMC440 boards
This patch moves phy initialization for VSC8601 ethernet
phys that are used on early board revisions into a separate
setup function.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
board/esd/pmc440/pmc440.c | 45 ++---
1 files changed, 22 insertions(+), 23 deletions(-)
diff --git a/board/esd/pmc440/pmc440.c b/board/esd/pmc440/pmc440.c
index 7aee8e4..3165486 100644
--- a/board/esd/pmc440/pmc440.c
+++ b/board/esd/pmc440/pmc440.c
@@ -643,6 +643,23 @@ int is_pci_host(struct pci_controller *hose)
#endif /* defined(CONFIG_PCI) */
#ifdef CONFIG_RESET_PHY_R
+int pmc440_setup_vsc8601(char *devname, int phy_addr,
+unsigned short behavior, unsigned short method)
+{
+ /* adjust LED behavior */
+ if (miiphy_write(devname, phy_addr, 0x1f, 0x0001) != 0) {
+ printf(Phy%d: register write access failed\n, phy_addr);
+ return -1;
+ }
+
+ miiphy_write(devname, phy_addr, 0x11, 0x0010);
+ miiphy_write(devname, phy_addr, 0x11, behavior);
+ miiphy_write(devname, phy_addr, 0x10, method);
+ miiphy_write(devname, phy_addr, 0x1f, 0x);
+
+ return 0;
+}
+
int pmc440_setup_ksz9031(char *devname, int phy_addr)
{
unsigned short id1, id2;
@@ -683,29 +700,11 @@ void reset_phy(void)
val_behavior = 0x0cf0;
}
- if (miiphy_write(ppc_4xx_eth0,
-CONFIG_PHY_ADDR, 0x1f, 0x0001) == 0) {
- miiphy_write(ppc_4xx_eth0,
-CONFIG_PHY_ADDR, 0x11, 0x0010);
- miiphy_write(ppc_4xx_eth0,
-CONFIG_PHY_ADDR, 0x11, val_behavior);
- miiphy_write(ppc_4xx_eth0,
-CONFIG_PHY_ADDR, 0x10, val_method);
- miiphy_write(ppc_4xx_eth0,
-CONFIG_PHY_ADDR, 0x1f, 0x);
- }
-
- if (miiphy_write(ppc_4xx_eth1,
-CONFIG_PHY1_ADDR, 0x1f, 0x0001) == 0) {
- miiphy_write(ppc_4xx_eth1,
-CONFIG_PHY1_ADDR, 0x11, 0x0010);
- miiphy_write(ppc_4xx_eth1,
-CONFIG_PHY1_ADDR, 0x11, val_behavior);
- miiphy_write(ppc_4xx_eth1,
-CONFIG_PHY1_ADDR, 0x10, val_method);
- miiphy_write(ppc_4xx_eth1,
-CONFIG_PHY1_ADDR, 0x1f, 0x);
- }
+ /* boards up to rev. 1.3 use Vitesse VSC8601 phys */
+ pmc440_setup_vsc8601(ppc_4xx_eth0, CONFIG_PHY_ADDR,
+val_method, val_behavior);
+ pmc440_setup_vsc8601(ppc_4xx_eth1, CONFIG_PHY1_ADDR,
+val_method, val_behavior);
} else {
/* rev. 1.4 uses a Micrel KSZ9031 */
pmc440_setup_ksz9031(ppc_4xx_eth0, CONFIG_PHY_ADDR);
--
1.6.1
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Re: [U-Boot] [PATCH] ppc4xx: Remove 4xx NAND booting support
Hi Stefan, On 04.03.2014 15:34, Stefan Roese wrote: As ppc4xx currently only supports the deprecated nand_spl infrastructure and nobody seems to have time / resources to port this over to the newer SPL infrastructure, lets remove NAND booting completely. This should not affect the normal, non NAND-booting ppc4xx platforms that are currently supported. Signed-off-by: Stefan Roese s...@denx.de Cc: Wolfgang Denk w...@denx.de Cc: Tirumala Marri tma...@apm.com Cc: Matthias Fuchs matthias.fu...@esd.eu Cc: Masahiro Yamada yamad...@jp.panasonic.com Cc: Tom Rini tr...@ti.com I used this chance to test today's U-Boot master with your patch on our PMC440 board. I do not see any problems related to your patch. So you may add Tested-by: Matthias Fuchs matthias.fu...@esd.eu Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] board: delete unused header files
Thanks. Acked-by: Matthias Fuchs matthias.fu...@esd.eu On 08.01.2014 12:11, Masahiro Yamada wrote: Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com --- board/cogent/kbm.h | 79 - board/cray/L1/L1.h | 28 -- board/esd/common/s1d13806_640_480_8bpp.h | 120 - board/etin/debris/speed.h| 38 board/genietv/genietv.h | 25 -- board/hidden_dragon/speed.h | 38 board/inka4x0/hyb25d512160bf-5.h | 16 board/prodrive/p3mx/ppc_error_no.h | 148 --- board/sandpoint/speed.h | 38 9 files changed, 530 deletions(-) delete mode 100644 board/cogent/kbm.h delete mode 100644 board/cray/L1/L1.h delete mode 100644 board/esd/common/s1d13806_640_480_8bpp.h delete mode 100644 board/etin/debris/speed.h delete mode 100644 board/genietv/genietv.h delete mode 100644 board/hidden_dragon/speed.h delete mode 100644 board/inka4x0/hyb25d512160bf-5.h delete mode 100644 board/prodrive/p3mx/ppc_error_no.h delete mode 100644 board/sandpoint/speed.h diff --git a/board/cogent/kbm.h b/board/cogent/kbm.h deleted file mode 100644 index 7eb419c..000 --- a/board/cogent/kbm.h +++ /dev/null @@ -1,79 +0,0 @@ -/* keyboard/mouse not implemented yet */ - -extern int cma_kbm_not_implemented; - -/ DEFINES for H8542B Keyboard/Mouse Controller ***/ - -/* - * note the auxillary port is used to control the mouse - */ - -/* 8542B Commands (Sent to the Command Port) */ -#define HT8542_CMD_SET_BYTE0x60/* Set the command byte */ -#define HT8542_CMD_GET_BYTE0x20/* Get the command byte */ -#define HT8542_CMD_KBD_OBUFF 0xD2/* Write to HT8542 Kbd Output Buffer */ -#define HT8542_CMD_AUX_OBUFF 0xD3/* Write to HT8542 Mse Output Buffer */ -#define HT8542_CMD_AUX_WRITE 0xD4/* Write to Mouse Port */ -#define HT8542_CMD_AUX_OFF 0xA7/* Disable Mouse Port */ -#define HT8542_CMD_AUX_ON 0xA8/* Re-Enable Mouse Port */ -#define HT8542_CMD_AUX_TEST0xA9/* Test for the presence of a Mouse */ -#define HT8542_CMD_DIAG0xAA/* Start Diagnostics */ -#define HT8542_CMD_KBD_TEST0xAB/* Test for presence of a keyboard */ -#define HT8542_CMD_KBD_OFF 0xAD/* Disable Kbd Port (use KBD_DAT_ON) */ -#define HT8542_CMD_KBD_ON 0xAE/* Enable Kbd Port (use KBD_DAT_OFF) */ - -/* HT8542B cmd byte set by KBD_CMD_SET_BYTE and retrieved by KBD_CMD_GET_BYTE */ -#define HT8542_CMD_BYTE_TRANS 0x40 -#define HT8542_CMD_BYTE_AUX_OFF0x20/* 1 = mse port disabled, 0 = enabled */ -#define HT8542_CMD_BYTE_KBD_OFF0x10/* 1 = kbd port disabled, 0 = enabled */ -#define HT8542_CMD_BYTE_OVER 0x08/* 1 = override keyboard lock */ -#define HT8542_CMD_BYTE_RES0x04/* reserved */ -#define HT8542_CMD_BYTE_AUX_INT0x02/* 1 = enable mouse interrupt */ -#define HT8542_CMD_BYTE_KBD_INT0x01/* 1 = enable keyboard interrupt */ - -/* Keyboard Commands (Sent to the Data Port) */ -#define KBD_CMD_LED0xED/* Set Keyboard LEDS with next byte */ -#define KBD_CMD_ECHO 0xEE/* Echo - we get 0xFA, 0xEE back */ -#define KBD_CMD_MODE 0xF0/* set scan code mode with next byte */ -#define KBD_CMD_ID 0xF2/* get keyboard/mouse ID */ -#define KBD_CMD_RPT0xF3/* Set Repeat Rate and Delay 2nd Byte */ -#define KBD_CMD_ON 0xF4/* Enable keyboard */ -#define KBD_CMD_OFF0xF5/* Disables Scanning, Resets to Def */ -#define KBD_CMD_DEF0xF6/* Reverts kbd to default settings */ -#define KBD_CMD_RST0xFF/* Reset - should get 0xFA, 0xAA back */ - -/* Set LED second bit defines */ -#define KBD_CMD_LED_SCROLL 0x01/* Set SCROLL LOCK LED on */ -#define KBD_CMD_LED_NUM0x02/* Set NUM LOCK LED on */ -#define KBD_CMD_LED_CAPS 0x04/* Set CAPS LOCK LED on */ - -/* Set Mode second byte defines */ -#define KBD_CMD_MODE_STAT 0x00/* get current scan code mode */ -#define KBD_CMD_MODE_SCAN1 0x01/* set mode to scan code 1 */ -#define KBD_CMD_MODE_SCAN2 0x02/* set mode to scan code 2 */ -#define KBD_CMD_MODE_SCAN3 0x03/* set mode to scan code 3 */ - -/* Keyboard/Mouse ID Codes */ -#define KBD_CMD_ID_1ST 0xAB/* 1st byte is 0xAB, 2nd is actual ID */ -#define KBD_CMD_ID_KBD 0x83/* Keyboard */ -#define KBD_CMD_ID_MOUSE 0x00/* Mouse */ - -/* Keyboard Data Return Defines */ -#define KBD_STAT_OVER 0x00/* Buffer Overrun */ -#define KBD_STAT_DIAG_OK 0x55/* Internal Self Test OK */ -#define KBD_STAT_RST_OK0xAA/* Reset Complete */ -#define
Re: [U-Boot] [PATCH v8 0/5] mtd: nand: omap: optimize and clean-up of OMAP NAND driver
Hi Pekon,
should I consider the U-Boot and Linux am335x NAND implementation to be
compatible?
So are the ECC schemes in a way identical that I can nandwrite a kernel image
from
Linux and nand read it from U-Boot? I tested with the 3.8.13 beaglebone
kernel (which
is of course not very representative) and it does not work. If it should work,
do you know it that was already the case before your patches and with which
Linux kernel?
Regards,
Matthias
On 10/10/2013 01:00 PM, Pekon Gupta wrote:
*changes in v8*
[PATCH 1/5] incorporated following feedbacks from Scott Wood
scottw...@freescale.com
- using symbolic names (enums) as values of CONFIG_NAND_OMAP_ECCSCHEME
- updated omap_select_ecc_scheme(): perform ecc-scheme compatibility
checks before updating nand_chip.ecc fields. This avoids
corrupting of existing ecc-scheme in case of switching failures.
- code clean-up (removed fall-back on omap_select_ecc_scheme() failures)
[PATCH 2/5], [PATCH 3/5], [PATCH 4/5] minor code clean-up
[PATCH 5/5] no update
*changes in v7*
[PATCH 1/5]
- omap_gpmc.c: fix: free bytes in OOB (ecclayout-oobfree[0].length)
- omap_gpmc.c: cleanup: redundant code added in previous patch versions
- am335x_evm.h: cleanup: redundant code added in previous patch versions
- tricorder.h: fix: CONFIG_NAND_OMAP_ECCSCHEME
[PATCH 2/5] removed: re-configuration of gpmc.config1[dev_width] added in
previous version of patch
[PATCH 3/5] no update
[PATCH 4/5] no update
[PATCH 5/5] minor fix: missing '$' in ${loadaddr}
*changes in v6*
[PATCH 1/5] incorporated feedbacks from Scott Wood scottw...@freescale.com
- renamed CONFIG_SYS_NAND_ECCSCHEME to CONFIG_NAND_OMAP_ECCSCHEME
- updated omap_select_ecc_scheme() to handle error conditions without
depending on caller.
- renamed OMAP_ECC_HAM1_CODE_HW_ROMCODE to OMAP_ECC_HAM1_CODE_HW
to keep it naming compatible to linux kernel
- updated doc/README.nand and doc/README.omap3
[PATCH 2/5] minor code clean-up
[PATCH 3/5] minor code clean-up
[PATCH 4/5] no update
[PATCH 5/5] moved CONFIG_NAND_OMAP_ECCSCHEME description to README.nand
*changes in v5*
This version of patch is tested on am335x-evm with x8 NAND device, and boots
SPL and u-boot from NAND
[PATCH 1/5]
- re-added omap_read_page_bch(): needed proper sequence of while reading
DATA and ECC from NAND page, so that calc_ecc generated from GPMC
is understood by ELM.
- added check to see if NAND OOB can accomodate ECC for entire page
[PATCH 2/5] fixed device-width in GPMC_CONFIG1_X to support x16 devices
[PATCH 3/5] code clean-up for OMAP_ECC_BCH8_CODE_HW_DETECTION_SW mode
[PATCH 4/5]
- fixed omap_correct_data_bch() for correcting bit-flips using ELM
- code-cleanup + added omap_reverse_list()
[PATCH 5/5] incorporated feedbacks from Peter Korsgaard jac...@sunsite.dk
*changes in v4*
[PATCH 1/5]
- removed omap_read_page_bch(): chip-ecc.read_page uses default API
nand_read_page_hwecc() in nand_base.c
- updated tricorder.h: added new CONFIGS for ECCSCHEME ONFI_DETECTION
- converted printf(ECC-SCHEME) to debug(ECC-SCHEME)
[PATCH 2/5] minor code clean-up
[PATCH 3/5] no update
[PATCH 4/5] no update
[PATCH 5/5] updated README as per feedbacks from tr...@ti.com
*changes in v3*
[PATCH 1/5] (complete change)
- ecc-scheme is selection is controller by s/w, not CONFIG_NAND_xx
- added omap_select_ecc_scheme(), as common function to handle all
ecc-scheme related configurations for both board_nand_init()
omap_nand_switch_ecc().
- removed un-used defines from asm/arch-am33xx/omap_gpmc.h
- updated doc/REAME.nand
[PATCH 2/5] removed un-used defines from asm/omap_gpmc.h
[PATCH 3/5] removed omap_calculate_ecc_bch_sw() and omap_calculate_ecc()
and merged their logic into omap_calculate_ecc_bch()
[PATCH 4/5] updated return error-code in-case of invalid conditions
[PATCH 5/5] (new) for board/ti/am335x/README
*changes in v2*
- added documentation for CONFIG_NAND_OMAP_xx in doc/README.nand
- added CONFIG_BCH along with CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
to include software library lib/bch.c
- fixed board_nand_init() and omap_enable_hwecc()
*original v1*
This patch series updates BCH8_ECC schemes in mtd/nand/omap_gpmc.c driver
- adds scalability for higher ECC schemes in future.
- removes CONFIG_AM335x and it makes it generic for all platforms.
- optimizes read_data paths
Pekon Gupta (5):
[PATCH 1/5] mtd: nand: omap: enable BCH ECC scheme using ELM for generic
platform
[PATCH 2/5] mtd: nand: omap: optimize chip-ecc.hwctl() for H/W ECC schemes
[PATCH 3/5] mtd: nand: omap: optimize chip-ecc.calculate() for H/W ECC
schemes
[PATCH 4/5] mtd: nand: omap: optimized chip-ecc.correct() for H/W ECC schemes
[U-Boot] [PATCH] ppc4xx: Remove support for PPC405CR CPUs
This patch removes support for the APM 405CR CPU.
This CPU is EOL and no board uses this chip.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
arch/powerpc/cpu/ppc4xx/4xx_uart.c| 10 ++--
arch/powerpc/cpu/ppc4xx/cpu.c | 18 +--
arch/powerpc/cpu/ppc4xx/cpu_init.c|2 +-
arch/powerpc/cpu/ppc4xx/speed.c |4 +-
arch/powerpc/cpu/ppc4xx/start.S |4 +-
arch/powerpc/include/asm/ppc405cr.h | 92 -
arch/powerpc/include/asm/ppc4xx-ebc.h |6 +--
arch/powerpc/include/asm/ppc4xx.h |4 --
arch/powerpc/include/asm/processor.h |3 --
arch/powerpc/include/asm/u-boot.h |1 -
common/cmd_bdinfo.c |6 +--
include/asm-generic/u-boot.h |1 -
include/serial.h |2 +-
13 files changed, 18 insertions(+), 135 deletions(-)
delete mode 100644 arch/powerpc/include/asm/ppc405cr.h
diff --git a/arch/powerpc/cpu/ppc4xx/4xx_uart.c
b/arch/powerpc/cpu/ppc4xx/4xx_uart.c
index 1ad19ab..da5bda8 100644
--- a/arch/powerpc/cpu/ppc4xx/4xx_uart.c
+++ b/arch/powerpc/cpu/ppc4xx/4xx_uart.c
@@ -40,7 +40,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
+#if defined(CONFIG_405GP) || \
defined(CONFIG_405EP) || defined(CONFIG_405EZ) || \
defined(CONFIG_405EX) || defined(CONFIG_440)
@@ -91,7 +91,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define UDIV_SUBTRACT 0
#define UART0_SDR SDR0_UART0
#define UART1_SDR SDR0_UART1
-#else /* CONFIG_405GP || CONFIG_405CR */
+#else /* CONFIG_405GP */
#define CR0_MASK0x1fff
#define CR0_EXTCLK_ENA 0x00c0
#define CR0_UDIV_POS1
@@ -196,7 +196,7 @@ int get_serial_clock(void)
* Let's handle this in some #ifdef's for the SoC's.
*/
-#if defined(CONFIG_405CR) || defined(CONFIG_405GP)
+#if defined(CONFIG_405GP)
reg = mfdcr(CPC0_CR0) ~CR0_MASK;
#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
clk = CONFIG_SYS_EXT_SERIAL_CLOCK;
@@ -223,7 +223,7 @@ int get_serial_clock(void)
#else
clk = CONFIG_SYS_BASE_BAUD * 16;
#endif
-#endif /* CONFIG_405CR */
+#endif
#if defined(CONFIG_405EP)
{
@@ -288,4 +288,4 @@ int get_serial_clock(void)
return clk;
}
-#endif /* CONFIG_405GP || CONFIG_405CR */
+#endif /* CONFIG_405GP */
diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c
index fe05098..5cebafd 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu.c
@@ -320,25 +320,9 @@ int checkcpu (void)
puts(405GP Rev. D);
break;
-#ifdef CONFIG_405GP
- case PVR_405GP_RE: /* 405GP rev E and 405CR rev C have same PVR */
+ case PVR_405GP_RE:
puts(405GP Rev. E);
break;
-#endif
-
- case PVR_405CR_RA:
- puts(405CR Rev. A);
- break;
-
- case PVR_405CR_RB:
- puts(405CR Rev. B);
- break;
-
-#ifdef CONFIG_405CR
- case PVR_405CR_RC: /* 405GP rev E and 405CR rev C have same PVR */
- puts(405CR Rev. C);
- break;
-#endif
case PVR_405GPR_RB:
puts(405GPr Rev. B);
diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c
b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index d53d882..d465dcd 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
@@ -326,7 +326,7 @@ cpu_init_f (void)
* External Bus Controller (EBC) Setup
*/
#if (defined(CONFIG_SYS_EBC_PB0AP) defined(CONFIG_SYS_EBC_PB0CR))
-#if (defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
+#if (defined(CONFIG_405GP) || \
defined(CONFIG_405EP) || defined(CONFIG_405EZ) || \
defined(CONFIG_405EX) || defined(CONFIG_405))
/*
diff --git a/arch/powerpc/cpu/ppc4xx/speed.c b/arch/powerpc/cpu/ppc4xx/speed.c
index 3345e73..7e077d5 100644
--- a/arch/powerpc/cpu/ppc4xx/speed.c
+++ b/arch/powerpc/cpu/ppc4xx/speed.c
@@ -21,7 +21,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
-#if defined(CONFIG_405GP) || defined(CONFIG_405CR)
+#if defined(CONFIG_405GP)
void get_sys_info (PPC4xx_SYS_INFO * sysInfo)
{
@@ -1184,7 +1184,7 @@ ulong get_bus_freq (ulong dummy)
{
ulong val;
-#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
+#if defined(CONFIG_405GP) || \
defined(CONFIG_405EP) || defined(CONFIG_405EZ) || \
defined(CONFIG_405EX) || defined(CONFIG_405) || \
defined(CONFIG_440)
diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S
index 57ae1d3..1f1ddde 100644
--- a/arch/powerpc/cpu/ppc4xx/start.S
+++ b/arch/powerpc/cpu/ppc4xx/start.S
@@ -833,7 +833,7 @@ _start:
#endif /* CONFIG_440 */
/*/
-#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
+#if defined(CONFIG_405GP) || \
defined(CONFIG_405EP) || defined(CONFIG_405EZ) || \
defined(CONFIG_405EX
Re: [U-Boot] U-Boot: am335x video support
Hi Heiko, perhaps you should take a look at the DA8XX driver. At least under Linux this driver also handles the AM335x. Splash screen support (meaning support of the splashimage variable) might be a problem because it expects a direct mapped physical address where the splash image is stored - typically some onboard nor flash. But AM335x designs typically have MMC, NAND or SPI flash attached. So you probably need some commands to load the spashscreen from a flash device and then use the 'bmp' command to display it. This should work with all video drivers. Matthias On 26.06.2013 08:29, Heiko Schocher wrote: Hello, is in current U-Boot a lcd driver for the am335x integrated LCD controller? If yes, also with Splash screen support? Thanks! bye, Heiko ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 0/4] am335x_evm: Enable UART{1,2,3,4,5}
Andrew,
can you rebase your series? arch/arm/cpu/armv7/am33xx/board.c
has been moved to board/ti/am335x.
I expect w/o this it won't get applied, right?
Matthias
On 25.10.2012 14:21, Andrew Bradford wrote:
To support serial ports other than UART0 on am335x based systems like
the Beaglebone with the RS232 cape and am335x_evm with daughterboard.
Changes from v3:
* Patch 4/4 simplified further.
Changes from v2:
* Patch 4/4 cleaned up to define CONS_INDEX and SERIALX in the
target options.
Changes from v1:
* Reduced from 6 patches to 4.
* Reworked on Marek Vasut's serial changes.
* Added UART3 for am335x_evm profile 5.
Andrew Bradford (4):
am33xx: Enable UART{1,2,3,4,5} clocks
am33xx: Enable UART{1,2,3,4,5} pin-mux
serial: ns16550: Enable COM5 and COM6
am335x_evm: Enable use of UART{1,2,3,4,5}
arch/arm/cpu/armv7/am33xx/board.c| 17
arch/arm/cpu/armv7/am33xx/clock.c| 35 +
arch/arm/include/asm/arch-am33xx/sys_proto.h |7 +++-
board/ti/am335x/mux.c| 54
++
boards.cfg |7 +++-
drivers/serial/serial_ns16550.c | 36 +++--
include/configs/am335x_evm.h | 12 +++---
7 files changed, 158 insertions(+), 10 deletions(-)
--
Dipl.-Ing. Matthias Fuchs
Head of System Design
esd electronic system design gmbh
Vahrenwalder Str. 207 - 30165 Hannover - GERMANY
Phone: +49-511-37298-0 - Fax: +49-511-37298-68
Please visit our homepage http://www.esd.eu
Quality Products - Made in Germany
Besuchen Sie uns auf der SPS/IPC/DRIVES 2012
in Halle 6, Stand 436
vom 27.-29. November 2012 in Nürnberg !
---
Geschäftsführer: Klaus Detering
Amtsgericht Hannover HRB 51373 - VAT-ID DE 115672832
-
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[U-Boot] [PATCH] 4xx: Fix PCI memory mapping on CPCI405 boards
This patch fixes an issue with overlapping PCI regions on boards with more than 64MB RAM. Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu --- include/configs/CPCI405.h |2 +- include/configs/CPCI4052.h |2 +- include/configs/CPCI405AB.h |2 +- include/configs/CPCI405DT.h |2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h index 9ecdad9..e3e5ebc 100644 --- a/include/configs/CPCI405.h +++ b/include/configs/CPCI405.h @@ -174,7 +174,7 @@ #define CONFIG_SYS_PCI_PTM1PCI 0x /* Host: use this pci address */ #define CONFIG_SYS_PCI_PTM2LA 0xffc0 /* point to flash */ #define CONFIG_SYS_PCI_PTM2MS 0xffc1 /* 4MB, enable */ -#define CONFIG_SYS_PCI_PTM2PCI 0x0400 /* Host: use this pci address */ +#define CONFIG_SYS_PCI_PTM2PCI (bd-bi_memsize) /* host use this pci address */ #define CONFIG_PCI_4xx_PTM_OVERWRITE 1 /* overwrite PTMx settings by env */ diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index efab119..c4fff48 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -195,7 +195,7 @@ #define CONFIG_SYS_PCI_PTM1PCI 0x /* Host: use this pci address */ #define CONFIG_SYS_PCI_PTM2LA 0xffc0 /* point to flash */ #define CONFIG_SYS_PCI_PTM2MS 0xffc1 /* 4MB, enable */ -#define CONFIG_SYS_PCI_PTM2PCI 0x0400 /* Host: use this pci address */ +#define CONFIG_SYS_PCI_PTM2PCI (bd-bi_memsize) /* host use this pci address */ #define CONFIG_PCI_4xx_PTM_OVERWRITE 1 /* overwrite PTMx settings by env */ diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h index 83e9a04..9122cbd 100644 --- a/include/configs/CPCI405AB.h +++ b/include/configs/CPCI405AB.h @@ -192,7 +192,7 @@ #define CONFIG_SYS_PCI_PTM1PCI 0x /* Host: use this pci address */ #define CONFIG_SYS_PCI_PTM2LA 0xffc0 /* point to flash */ #define CONFIG_SYS_PCI_PTM2MS 0xffc1 /* 4MB, enable */ -#define CONFIG_SYS_PCI_PTM2PCI 0x0400 /* Host: use this pci address */ +#define CONFIG_SYS_PCI_PTM2PCI (bd-bi_memsize) /* host use this pci address */ #define CONFIG_PCI_4xx_PTM_OVERWRITE 1 /* overwrite PTMx settings by env */ diff --git a/include/configs/CPCI405DT.h b/include/configs/CPCI405DT.h index 1944a07..f778af7 100644 --- a/include/configs/CPCI405DT.h +++ b/include/configs/CPCI405DT.h @@ -196,7 +196,7 @@ #define CONFIG_SYS_PCI_PTM1PCI 0x /* Host: use this pci address */ #define CONFIG_SYS_PCI_PTM2LA 0xffc0 /* point to flash */ #define CONFIG_SYS_PCI_PTM2MS 0xffc1 /* 4MB, enable */ -#define CONFIG_SYS_PCI_PTM2PCI 0x0400 /* Host: use this pci address */ +#define CONFIG_SYS_PCI_PTM2PCI (bd-bi_memsize) /* host use this pci address */ #define CONFIG_PCI_4xx_PTM_OVERWRITE 1 /* overwrite PTMx settings by env */ -- 1.6.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] am335x: add initial AM335x IDK board support
This patch extends the am335x_evm board for the AM335x IDK.
The IDK board uses MII for the ethernet phy (same as
Beaglebone board) and MMC0 for storage (but without
card detect line).
The IDK uses UART3 for console. So u-boot must be build
with CONFIG_SERIAL4 and CONFIG_CONS_INDEX=4 or for
the am335x_evm_uart3 board configuration as introduced
by Andrew Bradfords recent patch series am33xx: Enable
UART {1,2,3,4,5} When using the IDK with console on UART0,
those patches are not required. In this case the board
slightly needs to be modified.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
Changes in v2:
- rebased because board.c had been moved
board/ti/am335x/board.c |7 ++-
board/ti/am335x/mux.c | 20
2 files changed, 26 insertions(+), 1 deletions(-)
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 5d279ec..b1d9959 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -68,6 +68,11 @@ static inline int board_is_evm_sk(void)
return !strncmp(A335X_SK, header.name, HDR_NAME_LEN);
}
+static inline int board_is_idk(void)
+{
+ return !strncmp(header.config, SKU#02, 6);
+}
+
/*
* Read header information from EEPROM into global structure.
*/
@@ -361,7 +366,7 @@ int board_eth_init(bd_t *bis)
return -1;
}
- if (board_is_bone() || board_is_bone_lt()) {
+ if (board_is_bone() || board_is_bone_lt() || board_is_idk()) {
writel(MII_MODE_ENABLE, cdev-miisel);
cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
PHY_INTERFACE_MODE_MII;
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index 2992979..cc0db7a 100644
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -39,6 +39,17 @@ static struct module_pin_mux mmc0_pin_mux[] = {
{-1},
};
+static struct module_pin_mux mmc0_no_cd_pin_mux[] = {
+ {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */
+ {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */
+ {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */
+ {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */
+ {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */
+ {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */
+ {OFFSET(mcasp0_aclkr), (MODE(4) | RXACTIVE)}, /* MMC0_WP */
+ {-1},
+};
+
static struct module_pin_mux mmc0_pin_mux_sk_evm[] = {
{OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */
{OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */
@@ -196,6 +207,15 @@ void enable_board_pin_mux(struct am335x_baseboard_id
*header)
configure_module_pin_mux(mmc1_pin_mux);
configure_module_pin_mux(spi0_pin_mux);
}
+ } else if (!strncmp(header-config, SKU#02, 6)) {
+ /*
+* Industrial Motor Control (IDK)
+* note: IDK console is on UART3 by default.
+* So u-boot mus be build with CONFIG_SERIAL4 and
+* CONFIG_CONS_INDEX=4
+*/
+ configure_module_pin_mux(mii1_pin_mux);
+ configure_module_pin_mux(mmc0_no_cd_pin_mux);
} else if (!strncmp(header-name, A335X_SK, HDR_NAME_LEN)) {
/* Starter Kit EVM */
configure_module_pin_mux(i2c1_pin_mux);
--
1.6.1
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Re: [U-Boot] [PATCH v4 0/4] am335x_evm: Enable UART{1,2,3,4,5}
Tested-by: Matthias Fuchs matthias.fu...@esd.eu
... on AM335x IDK board with console on UART3.
Matthias
On 25.10.2012 14:21, Andrew Bradford wrote:
To support serial ports other than UART0 on am335x based systems like
the Beaglebone with the RS232 cape and am335x_evm with daughterboard.
Changes from v3:
* Patch 4/4 simplified further.
Changes from v2:
* Patch 4/4 cleaned up to define CONS_INDEX and SERIALX in the
target options.
Changes from v1:
* Reduced from 6 patches to 4.
* Reworked on Marek Vasut's serial changes.
* Added UART3 for am335x_evm profile 5.
Andrew Bradford (4):
am33xx: Enable UART{1,2,3,4,5} clocks
am33xx: Enable UART{1,2,3,4,5} pin-mux
serial: ns16550: Enable COM5 and COM6
am335x_evm: Enable use of UART{1,2,3,4,5}
arch/arm/cpu/armv7/am33xx/board.c| 17
arch/arm/cpu/armv7/am33xx/clock.c| 35 +
arch/arm/include/asm/arch-am33xx/sys_proto.h |7 +++-
board/ti/am335x/mux.c| 54
++
boards.cfg |7 +++-
drivers/serial/serial_ns16550.c | 36 +++--
include/configs/am335x_evm.h | 12 +++---
7 files changed, 158 insertions(+), 10 deletions(-)
-
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[U-Boot] [PATCH] am335x: add initial AM335x IDK board support
This patch extends the am335x_evm board for the AM335x IDK.
The IDK board uses MII for the ethernet phy (same as
Beaglebone board) and MMC0 for storage (but without
card detect line).
The IDK uses UART3 for console. So u-boot must be build
with CONFIG_SERIAL4 and CONFIG_CONS_INDEX=4 or for
the am335x_evm_uart3 board configuration as introduced
by Andrew Bradfords recent patch series am33xx: Enable
UART {1,2,3,4,5}...
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
arch/arm/cpu/armv7/am33xx/board.c |9 +++--
board/ti/am335x/mux.c | 20
2 files changed, 27 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c
b/arch/arm/cpu/armv7/am33xx/board.c
index e324265..3818d84 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -64,6 +64,11 @@ static inline int board_is_bone(void)
return !strncmp(header.name, A335BONE, HDR_NAME_LEN);
}
+static inline int board_is_idk(void)
+{
+ return !strncmp(header.config, SKU#02, 6);
+}
+
static inline int board_is_evm_sk(void)
{
return !strncmp(A335X_SK, header.name, HDR_NAME_LEN);
@@ -211,7 +216,7 @@ void s_init(void)
int board_mmc_init(bd_t *bis)
{
int ret;
-
+
ret = omap_mmc_init(0, 0, 0);
if (ret)
return ret;
@@ -302,7 +307,7 @@ int board_eth_init(bd_t *bis)
return -1;
}
- if (board_is_bone()) {
+ if (board_is_bone() || board_is_idk()) {
writel(MII_MODE_ENABLE, cdev-miisel);
cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
PHY_INTERFACE_MODE_MII;
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index 82b5852..f20cfbc 100644
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -301,6 +301,17 @@ static struct module_pin_mux mmc0_pin_mux[] = {
{-1},
};
+static struct module_pin_mux mmc0_no_cd_pin_mux[] = {
+ {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */
+ {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */
+ {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */
+ {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */
+ {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */
+ {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */
+ {OFFSET(mcasp0_aclkr), (MODE(4) | RXACTIVE)}, /* MMC0_WP */
+ {-1},
+};
+
static struct module_pin_mux mmc0_pin_mux_sk_evm[] = {
{OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */
{OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */
@@ -496,6 +507,15 @@ void enable_board_pin_mux(struct am335x_baseboard_id
*header)
configure_module_pin_mux(mmc1_pin_mux);
configure_module_pin_mux(spi0_pin_mux);
}
+ } else if (!strncmp(header-config, SKU#02, 6)) {
+ /*
+* Industrial Motor Control (IDK)
+* note: IDK console is on UART3 by default.
+* So u-boot mus be build with CONFIG_SERIAL4 and
+* CONFIG_CONS_INDEX=4
+*/
+ configure_module_pin_mux(mii1_pin_mux);
+ configure_module_pin_mux(mmc0_no_cd_pin_mux);
} else if (!strncmp(header-name, A335X_SK, HDR_NAME_LEN)) {
/* Starter Kit EVM */
configure_module_pin_mux(i2c1_pin_mux);
--
1.6.1
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Re: [U-Boot] [PATCH] pmc405de and zeus: remove the env_ptr externs
Hi Igor,
you are right. Thanks. You can add my
Acked-by: Matthias Fuchs matthias.fu...@esd.eu
Matthias
On 09/28/2012 12:04 PM, Igor Grinberg wrote:
The env_ptr is already declared in environment.h, so there is no need to
redeclare in board files (especially after including the environment.h)
Remove those declarations.
Signed-off-by: Igor Grinberg grinb...@compulab.co.il
Cc: Stefan Roese s...@denx.de
Cc: Matthias Fuchs matthias.fu...@esd-electronics.com
---
Stefan, Matthias,
I'm sending from my laptop (not my main development machine) which
does not have the ppc tool chain installed, can you please compile
test these two boards? Thanks!
board/esd/pmc405de/pmc405de.c |1 -
board/zeus/zeus.c |1 -
2 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/board/esd/pmc405de/pmc405de.c b/board/esd/pmc405de/pmc405de.c
index a60809a..279d7d4 100644
--- a/board/esd/pmc405de/pmc405de.c
+++ b/board/esd/pmc405de/pmc405de.c
@@ -415,7 +415,6 @@ U_BOOT_CMD(eepwren, 2, 0, do_eep_wren,
#if defined(CONFIG_PRAM)
#include environment.h
-extern env_t *env_ptr;
int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
diff --git a/board/zeus/zeus.c b/board/zeus/zeus.c
index 272e59b..e7b2f4d 100644
--- a/board/zeus/zeus.c
+++ b/board/zeus/zeus.c
@@ -39,7 +39,6 @@ DECLARE_GLOBAL_DATA_PTR;
#define REBOOT_DO_POST 0x0001
extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for
FLASH chips */
-extern env_t *env_ptr;
ulong flash_get_size(ulong base, int banknum);
void env_crc_update(void);
--
-
Dipl.-Ing. Matthias Fuchs
Head of System Design
esd electronic system design gmbh
Vahrenwalder Str. 207 - 30165 Hannover - GERMANY
Phone: +49-511-37298-0 - Fax: +49-511-37298-68
Please visit our homepage http://www.esd.eu
Quality Products - Made in Germany
-
Geschäftsführer: Klaus Detering
Amtsgericht Hannover HRB 51373 - VAT-ID DE 115672832
-
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Re: [U-Boot] [PATCH] ppc4xx: Remove IOP480 support
On 19.09.2012 14:33, Stefan Roese wrote: Since the IOP480 (PPC401/3 variant from PLX) is only used on 2 boards that are not actively maintained, lets remove support for it completely. This way the ppc4xx code will get a bit cleaner. Signed-off-by: Stefan Roese s...@denx.de Thanks for this outstanding cleanup. Matthias Acked-by: Matthias Fuchs matthias.fu...@esd.eu ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] environment access before relocation does not work on (some) arm
Hi, On 29.06.2012 13:26, Wolfgang Denk wrote: Dear Matthias Fuchs, In message 4fed7877.2020...@esd.eu you wrote: I just noticed that using getenv (and friends) does not work on ARM (namely i.MX28) from board_init_f() after running through the init_sequence. This is normal, and documented. Before relocation, you must not use getenv(). Yes, I am aware of this. I even think that the getenv() implementation falls back to getenv_f() before relocation. Env access does not work before env_relocate() in board_init_r(). It does, but you have to play by the rules, i. e. use getenv_f() instead. Yes, I did not care about where my env comes from :-) So env_sf.c does not support an early env at all. Running on an i.MX28 with env in a SPI flash I probably need SPI support in my SPL and an improved env_sf.c. ... and all this to get CONFIG_PRAM working in arch/arm/lib/board.c. So I will stuck at using a constant pram value for the moment. This works. Didn't this behave different sometimes before? Even after the big env rework? No. The use of getenv() before relocation has never been supported. It may have worked (by pure chance) on some systems, but that's all. Of course. My question was not very precise. Matthias Best regards, Wolfgang Denk ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Move bootstage timer out of lib/time.c
Hi Simon, On 06.04.2012 00:05, Simon Glass wrote: The standalone example does not have get_timer() defined, so we cannot rely on it being available. Move the timer function into boootstage.c to avoid this problem. This corrects a build breakage for the standalone example on some boards. Signed-off-by: Simon Glass s...@chromium.org This fixes as expected the currently broken PMC440 board support. Acked-off-by: Matthias Fuchs matthias.fu...@esd.eu Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/2] i.mx28: Elimintated magic numbers for scratch register addresses
On 20.02.2012 09:32, Marek Vasut wrote: Marek, Stefano, what kept you from accepting these patches? There was no objection on these. The regs-digctl.h file being incomplete, it didn't contain all the bit definitions even though I shared the tool to convert file provided by FSL to uboot format. Why must this file be absolute complete? It can be extended on need. This just slows down development and as you might have noticed, that it chases away some developers. So accepting this patch is a first step. And hopefully the rest is added sometimes later. If not, well, then nobody needs it and there's no need to blow the headers. Matthias M Matthias On 07.02.2012 15:08, rob...@delien.nl wrote: From: Robert Delien rob...@delien.nl This patch eliminates the use of magic numbers for the scratch register addresses. The registers in the DIGCTL sections are now defined and used to access the scratch registers. Robert Delien (2): Added register definitions for DIGCTL registers Replaced magic numbers for scratch register addresses with register definitions arch/arm/cpu/arm926ejs/mx28/mx28.c |8 +- arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c |8 +- arch/arm/include/asm/arch-mx28/imx-regs.h|1 + arch/arm/include/asm/arch-mx28/regs-digctl.h | 155 ++ 4 files changed, 164 insertions(+), 8 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx28/regs-digctl.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot -- Dipl.-Ing. Matthias Fuchs Head of System Design esd electronic system design gmbh Vahrenwalder Str. 207 - 30165 Hannover - GERMANY Phone: +49-511-37298-0 - Fax: +49-511-37298-68 Please visit our homepage http://www.esd.eu Quality Products - Made in Germany Besuchen Sie uns auf der embedded world 2012 in Halle 4, Stand 129 vom 28. Februar - 01. März 2012 in Nürnberg! Geschäftsführer: Klaus Detering Amtsgericht Hannover HRB 51373 - VAT-ID DE 115672832 - ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/2] i.mx28: Elimintated magic numbers for scratch register addresses
Marek, Stefano, what kept you from accepting these patches? There was no objection on these. Matthias On 07.02.2012 15:08, rob...@delien.nl wrote: From: Robert Delien rob...@delien.nl This patch eliminates the use of magic numbers for the scratch register addresses. The registers in the DIGCTL sections are now defined and used to access the scratch registers. Robert Delien (2): Added register definitions for DIGCTL registers Replaced magic numbers for scratch register addresses with register definitions arch/arm/cpu/arm926ejs/mx28/mx28.c |8 +- arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c |8 +- arch/arm/include/asm/arch-mx28/imx-regs.h|1 + arch/arm/include/asm/arch-mx28/regs-digctl.h | 155 ++ 4 files changed, 164 insertions(+), 8 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx28/regs-digctl.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/4] Added NAND flash pin configuration
Do you plan to post a patch to enable NAND on the EVK as well?
That shouldn't be a big deal.
Matthias
On 07.02.2012 17:52, rob...@delien.nl wrote:
From: Robert Delien rob...@delien.nl
Signed-off-by: Robert Delien rob...@delien.nl
---
board/freescale/mx28evk/iomux.c | 24
1 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/board/freescale/mx28evk/iomux.c b/board/freescale/mx28evk/iomux.c
index d6f9d0a..781f36d 100644
--- a/board/freescale/mx28evk/iomux.c
+++ b/board/freescale/mx28evk/iomux.c
@@ -29,6 +29,7 @@
#define MUX_CONFIG_SSP1 (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
#define MUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
+#define MUX_CONFIG_NAND (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
const iomux_cfg_t iomux_setup[] = {
/* Debug UART (DUART) */
@@ -77,6 +78,29 @@ const iomux_cfg_t iomux_setup[] = {
MX28_PAD_GPMI_ALE__GPIO_0_26 | MXS_PAD_3V3,
MX28_PAD_GPMI_CE1N__GPIO_0_17 | MXS_PAD_3V3,
MX28_PAD_GPMI_CE0N__GPIO_0_16 | MXS_PAD_3V3,
+#else
+ /* On-board NAND flash ZIF-socket */
+ MX28_PAD_GPMI_D00__GPMI_D0 | MUX_CONFIG_NAND,
+ MX28_PAD_GPMI_D01__GPMI_D1 | MUX_CONFIG_NAND,
+ MX28_PAD_GPMI_D02__GPMI_D2 | MUX_CONFIG_NAND,
+ MX28_PAD_GPMI_D03__GPMI_D3 | MUX_CONFIG_NAND,
+ MX28_PAD_GPMI_D04__GPMI_D4 | MUX_CONFIG_NAND,
+ MX28_PAD_GPMI_D05__GPMI_D5 | MUX_CONFIG_NAND,
+ MX28_PAD_GPMI_D06__GPMI_D6 | MUX_CONFIG_NAND,
+ MX28_PAD_GPMI_D07__GPMI_D7 | MUX_CONFIG_NAND,
+ MX28_PAD_GPMI_RDN__GPMI_RDN |
+ MXS_PAD_1V8 | MXS_PAD_8MA | MXS_PAD_PULLUP,
+ MX28_PAD_GPMI_WRN__GPMI_WRN | MUX_CONFIG_NAND,
+ MX28_PAD_GPMI_ALE__GPMI_ALE | MUX_CONFIG_NAND,
+ MX28_PAD_GPMI_CLE__GPMI_CLE | MUX_CONFIG_NAND,
+ MX28_PAD_GPMI_RDY0__GPMI_READY0 | MUX_CONFIG_NAND,
+ MX28_PAD_GPMI_RDY1__GPMI_READY1 | MUX_CONFIG_NAND,
+ MX28_PAD_GPMI_CE0N__GPMI_CE0N | MUX_CONFIG_NAND,
+ MX28_PAD_GPMI_CE1N__GPMI_CE1N | MUX_CONFIG_NAND,
+ /* NAND Write-protect */
+ MX28_PAD_GPMI_RESETN__GPIO_0_28 | MXS_PAD_3V3,
+ /* Not used for NAND flash */
+ MX28_PAD_PWM4__GPIO_3_29 | MXS_PAD_3V3,
#endif /* nCONFIG_CMD_NAND */
/* FEC0 */
MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET,
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Re: [U-Boot] [PATCH 4/4] Added NAND flash pin configuration
On 10.02.2012 13:42, Robert Deliën wrote: Do you plan to post a patch to enable NAND on the EVK as well? Yes, I do. It's all tested and working in my workspace. But the first samples of our own board have arrived a couple of days ago and I'm currently in the process of bringing it up and that has priority over everything else, hence the silence. I've got I2C, UARTs both MMC slots and USB working as well. That shouldn't be a big deal. It was of 5 minute job, 1 of which was compile-time. Unfortunately making a patch and reworking all comments is not. So I can lean back ... Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2] mx28: fix SPL code to make USB booting work
On 06.02.2012 16:29, Marek Vasut wrote:
This patch fixes booting i.MX28 CPUs via USB download.
In this mode the CPU's bootrom implements a USB HID device that
accepts a bootstream.
When downloading the bootstream via USB, first the SPL code is
received and executed. Then the u-boot image is received and
called.
The USB bootmode is interrupt driven.
This patch fixes two things:
1) The ARM's fast interrupt mode is disabled when the SPL code
has been run. So save and restore the CPSR register.
2) The exception vector location is set back to bootrom space to
make the USB interrupts work again. The SPL code needs to change this
option for the ram size probing.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
changes in v2:
- store old SPSR on stack instead of jiggling around with some bits
- remove #ifndef CONFIG_SKIP_LOWLEVEL_INIT
arch/arm/cpu/arm926ejs/mx28/start.S | 15 +++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/start.S
b/arch/arm/cpu/arm926ejs/mx28/start.S index 2cd4d73..69d911b 100644
--- a/arch/arm/cpu/arm926ejs/mx28/start.S
+++ b/arch/arm/cpu/arm926ejs/mx28/start.S
@@ -171,6 +171,7 @@ _reset:
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
+push{r0}
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0
@@ -185,6 +186,20 @@ _reset:
bl board_init_ll
+/*
+ * restore bootrom's cpu mode (especially FIQ)
+ */
+pop {r0}
+msr cpsr,r0
+
+/*
+ * set exception vector location back to bootrom space.
+ * (required by bootrom for USB boot)
+ */
+mrc p15, 0, r0, c1, c0, 0
+orr r0, r0, #0x2000 /* set bit 13 'V' */
+mcr p15, 0, r0, c1, c0, 0
Maybe you can save this register too, like you did with CPSR?
Can do.
Done. Works. Patch V3 follows.
Otherwise, it looks good.
btw plain push r0 doesn't work?
No.
Matthias
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[U-Boot] [PATCH V3] mx28: fix SPL code to make USB booting work
This patch fixes booting i.MX28 CPUs via USB download.
In this mode the CPU's bootrom implements a USB HID device that
accepts a bootstream.
When downloading the bootstream via USB, first the SPL code is
received and executed. Then the u-boot image is received and
called.
The USB bootmode is interrupt driven.
This patch fixes two things:
1) The ARM's fast interrupt mode is disabled when the SPL code
has been run. So save and restore the CPSR register.
2) Save and restore c1 control register: the exception vector
location needs to be set back to bootrom space to make the USB
interrupts work again. The SPL code needs to change this
option for the ram size probing.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
changes in v2:
- store old SPSR on stack instead of jiggling around with some bits
- remove #ifndef CONFIG_SKIP_LOWLEVEL_INIT
changes in v3:
- also store C1 register on stack
arch/arm/cpu/arm926ejs/mx28/start.S | 21 -
1 files changed, 20 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/start.S
b/arch/arm/cpu/arm926ejs/mx28/start.S
index 2cd4d73..e572b78 100644
--- a/arch/arm/cpu/arm926ejs/mx28/start.S
+++ b/arch/arm/cpu/arm926ejs/mx28/start.S
@@ -167,10 +167,15 @@ _reset:
*/
push{r0-r12,r14}
+ /* save control register c1 */
+ mrc p15, 0, r0, c1, c0, 0
+ push{r0}
+
/*
-* set the cpu to SVC32 mode
+* set the cpu to SVC32 mode and store old CPSR register content
*/
mrs r0,cpsr
+ push{r0}
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0
@@ -185,6 +190,20 @@ _reset:
bl board_init_ll
+ /*
+* restore bootrom's cpu mode (especially FIQ)
+*/
+ pop {r0}
+ msr cpsr,r0
+
+ /*
+* restore c1 register
+* (especially set exception vector location back to
+* bootrom space which is required by bootrom for USB boot)
+*/
+ pop {r0}
+ mcr p15, 0, r0, c1, c0, 0
+
pop {r0-r12,r14}
bx lr
--
1.6.1
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[U-Boot] [PATCH V2] mx28: fix SPL code to make USB booting work
This patch fixes booting i.MX28 CPUs via USB download.
In this mode the CPU's bootrom implements a USB HID device that
accepts a bootstream.
When downloading the bootstream via USB, first the SPL code is
received and executed. Then the u-boot image is received and
called.
The USB bootmode is interrupt driven.
This patch fixes two things:
1) The ARM's fast interrupt mode is disabled when the SPL code
has been run. So save and restore the CPSR register.
2) The exception vector location is set back to bootrom space to
make the USB interrupts work again. The SPL code needs to change this
option for the ram size probing.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
changes in v2:
- store old SPSR on stack instead of jiggling around with some bits
- remove #ifndef CONFIG_SKIP_LOWLEVEL_INIT
arch/arm/cpu/arm926ejs/mx28/start.S | 15 +++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/start.S
b/arch/arm/cpu/arm926ejs/mx28/start.S
index 2cd4d73..69d911b 100644
--- a/arch/arm/cpu/arm926ejs/mx28/start.S
+++ b/arch/arm/cpu/arm926ejs/mx28/start.S
@@ -171,6 +171,7 @@ _reset:
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
+ push{r0}
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0
@@ -185,6 +186,20 @@ _reset:
bl board_init_ll
+ /*
+* restore bootrom's cpu mode (especially FIQ)
+*/
+ pop {r0}
+ msr cpsr,r0
+
+ /*
+* set exception vector location back to bootrom space.
+* (required by bootrom for USB boot)
+*/
+ mrc p15, 0, r0, c1, c0, 0
+ orr r0, r0, #0x2000 /* set bit 13 'V' */
+ mcr p15, 0, r0, c1, c0, 0
+
pop {r0-r12,r14}
bx lr
--
1.6.1
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Re: [U-Boot] mx28: booting u-boot via USB
On 31.01.2012 15:03, Matthias Fuchs wrote:
Hi,
I have a problem booting the current u-boot-imx version
on a MX28EVK via USB. The i.MX28 CPU supports a special boot mode
where the image (sb boot stream) is downloaded via USB device
(all DIP switches in position 'off' on the EVK). The
CPU's internal bootrom implements a HID device in this mode.
Freescale provides a download tool sb_loader for this purpose.
There is also a GPL'd implementation based on libusb.
So back to my problem:
I build u-boot from the u-boot-imx repository. This runs fine
when booting from SD/MMC or SPI-flash. But the console stays dark
when using the USB download mode. USB download works fine with the
Freescale provided U-Boot sources together with the imx-bootlets
SPL code.
Now I digged a little bit deeper to find out the cause:
When downloading via USB I saw the SPL running correctly.
board_init_ll() (arch/arm/cpu/arm926ejs/mx28/start.S) runs through
correctly. Then control is passed back to the bootrom. That's
where things end as far as I can see.
The 2nd stage of u-boot is not started.
The USB boot mechanism is not documented that detailed.
Is it possible that the SPL code overwrites the bootroms ivt and
in consequence crashes the bootrom's USB code? Any further ideas?
It figured out a (dirty) fix for my issue.
It really seems that the mx28 bootrom is unhappy with the state
of the CPU after the SPL code ran through. There are two things that
make the bootrom more happy and finally start u-boot from RAM:
1) cpu_init_crit() from arch/arm/cpu/arm926ejs/mx28/start.S
must not be called.
2) The ARMs fast interrupt mode must not be enabled when passing control
back to the bootrom.
The latter is easy to fix. Either we turn it off at the end
of _reset or we do not even turn it on when switching to SVC32 mode.
BTW, the bootrom calls _reset already in SVC32 mode, so we could
kick those lines away.
Disabling cpu_init_crit() has a sideeffect on get_ram_size()
in mx28_mem_get_size(). Without disabling caches get_ram_size()
freezes. Using a fixed RAM size works. Also calling get_ram_size
with a max. of 0x2000 (instead of the default 1GB) works. Hmm.
Idea ideas how to fix this? Best things would be to revert
the changes cpu_init_crit() does. Or we could move the
get_ram_size() call to the 2nd stage when U-Boot is started
in RAM from bootrom (before relocation). In this case we must
modfiy get_Ram_size to start just behind u-boot code in RAM.
Here are my current modifications:
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
index 00493b8..257db6b 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
@@ -182,7 +182,11 @@ void mx28_mem_get_size(void)
da = vt[4];
vt[4] = (uint32_t)data_abort_memdetect_handler;
- sz = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
+ /*
+* without start.S:cpu_init_crit() get_ram_size does not work
+* with PHYS_SDRAM_1_SIZE = 0x4000
+*/
+ sz = get_ram_size((long *)PHYS_SDRAM_1, 0x2000); /*
PHYS_SDRAM_1_SIZE);*/
writel(sz, HW_DIGCTRL_SCRATCH0);
writel(sz, HW_DIGCTRL_SCRATCH1);
diff --git a/arch/arm/cpu/arm926ejs/mx28/start.S
b/arch/arm/cpu/arm926ejs/mx28/start.S
index 2cd4d73..ba48fed 100644
--- a/arch/arm/cpu/arm926ejs/mx28/start.S
+++ b/arch/arm/cpu/arm926ejs/mx28/start.S
@@ -180,11 +180,26 @@ _reset:
* not when booting from ram!
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
- bl cpu_init_crit
+/*
+ * not fine for bootrom in USB mode mode but required for get_mem_size()
+ * in mx28_mem_init()
+ */
+/* bl cpu_init_crit */
#endif
bl board_init_ll
+ /*
+* turn of fast interrupt mode
+* TODO: alternatively we can disable the code above (set cpu to
+* SVC32 mode) because the bootrom already setup cpsr to 0x53
+* I don't expect that the SPL code requires the fast interrupt
+* mode at all.
+*/
+ mrs r0,cpsr
+ bic r0,r0,#0x80
+ msr cpsr,r0
+
pop {r0-r12,r14}
bx lr
Matthias
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Re: [U-Boot] mx28: booting u-boot via USB
Fixed! Patch follows. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mx28: fix SPL code to make USB booting work
This patch fixes booting i.MX28 CPUs via USB download.
In this mode the CPU's bootrom implements a USB HID device that
accepts a bootstream.
When downloading the bootstream via USB, first the SPL code is
received and executed. Then the u-boot image is received and
called.
The USB bootmode is interrupt driven.
This patch fixes two things:
1) The ARM's fast interrupt mode is disabled when the SPL code
has been run. This is the default state when called by the bootrom.
2) The exception vector location is set back to bootrom space to
make the USB interrupts work again. The SPL code needs to change this
option for the ram size probing.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
arch/arm/cpu/arm926ejs/mx28/start.S | 17 +
1 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/start.S
b/arch/arm/cpu/arm926ejs/mx28/start.S
index 2cd4d73..4116bb1 100644
--- a/arch/arm/cpu/arm926ejs/mx28/start.S
+++ b/arch/arm/cpu/arm926ejs/mx28/start.S
@@ -185,6 +185,23 @@ _reset:
bl board_init_ll
+ /*
+* turn of fast interrupt mode (required by bootrom for USB boot)
+*/
+ mrs r0,cpsr
+ bic r0,r0,#0x80
+ msr cpsr,r0
+
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+ /*
+* set exception vector location back to bootrom space.
+* (required by bootrom for USB boot)
+*/
+ mrc p15, 0, r0, c1, c0, 0
+ orr r0, r0, #0x2000 /* set bit 13 'V' */
+ mcr p15, 0, r0, c1, c0, 0
+#endif
+
pop {r0-r12,r14}
bx lr
--
1.6.1
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Re: [U-Boot] [PATCH] mx28: fix SPL code to make USB booting work
On 03.02.2012 14:22, Marek Vasut wrote: This patch fixes booting i.MX28 CPUs via USB download. In this mode the CPU's bootrom implements a USB HID device that accepts a bootstream. When downloading the bootstream via USB, first the SPL code is received and executed. Then the u-boot image is received and called. The USB bootmode is interrupt driven. This patch fixes two things: 1) The ARM's fast interrupt mode is disabled when the SPL code has been run. This is the default state when called by the bootrom. 2) The exception vector location is set back to bootrom space to make the USB interrupts work again. The SPL code needs to change this option for the ram size probing. Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu --- arch/arm/cpu/arm926ejs/mx28/start.S | 17 + 1 files changed, 17 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/mx28/start.S b/arch/arm/cpu/arm926ejs/mx28/start.S index 2cd4d73..4116bb1 100644 --- a/arch/arm/cpu/arm926ejs/mx28/start.S +++ b/arch/arm/cpu/arm926ejs/mx28/start.S @@ -185,6 +185,23 @@ _reset: bl board_init_ll +/* + * turn of fast interrupt mode (required by bootrom for USB boot) + */ +mrs r0,cpsr +bic r0,r0,#0x80 +msr cpsr,r0 Add this section just past _reset into: 170 /* 171 * set the cpu to SVC32 mode 172 */ 173 mrs r0,cpsr 174 bic r0,r0,#0x1f 175 orr r0,r0,#0xd3 176 msr cpsr,r0 And only if you really need this. Why do you need to disable FIQ? First: my commit message was not very clear in ths concern. When the SPL is called from the bootrom FIQ is turned off. When the SPL has run and control is passed back to the bootrom (!), the bootrom crashes, stalls or stops when FIQ is on. So we need to turn FIQ off when the SPL has done it's job. So that's why I added the code after board_init_ll(). I also noticed that the SPL runs fine when FIQ is never turned on. So I could think of never turning it on at all in SPL: 170 /* 171 * set the cpu to SVC32 mode 172 */ 173 mrs r0,cpsr 174 bic r0,r0,#0x1f - 175 orr r0,r0,#0xd3 + 175 orr r0,r0,#0x53 176 msr cpsr,r0 This will result in CPSR = 0x53 which is the register content when the SPL is called (setup by bootrom). So we could completely get rid of this sequence. And yes, for USB boot the FIQ must be turned off when SPL has done it's work. Other boot modes do not care as far as I noticed. + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT +/* + * set exception vector location back to bootrom space. + * (required by bootrom for USB boot) + */ +mrc p15, 0, r0, c1, c0, 0 +orr r0, r0, #0x2000 /* set bit 13 'V' */ +mcr p15, 0, r0, c1, c0, 0 +#endif High-vectors break the current implementation. That IS WRONG. The RAM memory detection routine will not work if you enable high vectors since it depends on adjusting the jumptable at 0x0 (aka. low vectors). Right. That's why the SPL code clears the 'V' bit and we got 'low vectors'. But when the SPL code has done it's work we need to return to 'high vectors' (... in bootrom space) to keep USB from bootrom alive. That's what my patch does. SPL run with low vectors and before it returns to bootrom it switches back to high vectors. Why do you need to enable high vectors? Can't you detect that USB boot is happening (can mx28 report boot reason like mxc chips do?) Yes, by checking some GPIOs (I send an RFC/PATCH some days ago). But there's no need to only do this when using USB boot. and enable high- vectors just before passing control back to bootrom only then? That's what I do! Please take a look at my patch. Though now that I think of it, high-vectors should probably be unconditionally re-enabled upon entering bootrom. Can you investigate? That's what my patch does! Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] i.MX28: Fix VDDIO and VDDA setup
I tested both patch on my mx28evk. At least I cannot notice any
missbehavior :-) Downloading the patched u-boot via USB recovery
download still does not work.
Marek, did you find any further mentionable difference between bootlets
code and current u-boot implementation?
Matthias
On 31.01.2012 01:00, Marek Vasut wrote:
The DC power STS shouldn't be checked if booting off 5V supply.
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Wolfgang Denk w...@denx.de
Cc: Detlev Zundel d...@denx.de
Cc: Stefano Babic sba...@denx.de
Cc: Robert Deliën rob...@delien.nl
Cc: Fabio Estevam feste...@gmail.com
Cc: Matthias Fuchs matthias.fu...@esd.eu
---
arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 16
1 files changed, 12 insertions(+), 4 deletions(-)
Note: Guys, please give this a testrun. I think it might fix the issue Robert
was observing. I dug into the imx-bootlets and the bootrom X-Files and found
this paranormal piece of code. Adding it fixes the boot issue on my crappy
board.
M
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
index ee0f237..c6c25d9 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
@@ -802,7 +802,9 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t
new_brownout)
clrsetbits_le32(power_regs-hw_power_vddioctrl,
POWER_VDDIOCTRL_TRG_MASK, diff);
- if (powered_by_linreg)
+ if (powered_by_linreg ||
+ (readl(power_regs-hw_power_sts)
+ POWER_STS_VDD5V_GT_VDDIO))
early_delay(1500);
else {
while (!(readl(power_regs-hw_power_sts)
@@ -837,7 +839,9 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t
new_brownout)
clrsetbits_le32(power_regs-hw_power_vddioctrl,
POWER_VDDIOCTRL_TRG_MASK, diff);
- if (powered_by_linreg)
+ if (powered_by_linreg ||
+ (readl(power_regs-hw_power_sts)
+ POWER_STS_VDD5V_GT_VDDIO))
early_delay(1500);
else {
while (!(readl(power_regs-hw_power_sts)
@@ -895,7 +899,9 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t
new_brownout)
clrsetbits_le32(power_regs-hw_power_vdddctrl,
POWER_VDDDCTRL_TRG_MASK, diff);
- if (powered_by_linreg)
+ if (powered_by_linreg ||
+ (readl(power_regs-hw_power_sts)
+ POWER_STS_VDD5V_GT_VDDIO))
early_delay(1500);
else {
while (!(readl(power_regs-hw_power_sts)
@@ -930,7 +936,9 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t
new_brownout)
clrsetbits_le32(power_regs-hw_power_vdddctrl,
POWER_VDDDCTRL_TRG_MASK, diff);
- if (powered_by_linreg)
+ if (powered_by_linreg ||
+ (readl(power_regs-hw_power_sts)
+ POWER_STS_VDD5V_GT_VDDIO))
early_delay(1500);
else {
while (!(readl(power_regs-hw_power_sts)
--
Dipl.-Ing. Matthias Fuchs
Head of System Design
esd electronic system design gmbh
Vahrenwalder Str. 207 - 30165 Hannover - GERMANY
Phone: +49-511-37298-0 - Fax: +49-511-37298-68
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Re: [U-Boot] [PATCH 1/2] sf command: allow default bus and chip selects
Works fine. Matthias Tested-by: Matthias Fuchs matthias.fu...@esd.eu On 30.01.2012 21:02, Eric Nelson wrote: This patch allows a board configuration file to provide default bus and chip-selects for SPI flash so that first argument to the 'sf' command is optional. On boards that use the mxc_spi driver and a GPIO for chip select, this allows a much simpler command line: U-Boot sf probe instead of U-Boot sf probe 0x5300 Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com --- common/cmd_sf.c | 37 + 1 files changed, 21 insertions(+), 16 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] i.MX28: Fix VDDIO and VDDA setup
On 31.01.2012 12:38, Marek Vasut wrote: I tested both patch on my mx28evk. At least I cannot notice any missbehavior :-) Downloading the patched u-boot via USB recovery download still does not work. Good, any improvements though? No. It works as before. Whatever that means :-) I will respond to my prior USB posting with some news about that. Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] mx28: booting u-boot via USB
Hi, I have a problem booting the current u-boot-imx version on a MX28EVK via USB. The i.MX28 CPU supports a special boot mode where the image (sb boot stream) is downloaded via USB device (all DIP switches in position 'off' on the EVK). The CPU's internal bootrom implements a HID device in this mode. Freescale provides a download tool sb_loader for this purpose. There is also a GPL'd implementation based on libusb. So back to my problem: I build u-boot from the u-boot-imx repository. This runs fine when booting from SD/MMC or SPI-flash. But the console stays dark when using the USB download mode. USB download works fine with the Freescale provided U-Boot sources together with the imx-bootlets SPL code. Now I digged a little bit deeper to find out the cause: When downloading via USB I saw the SPL running correctly. board_init_ll() (arch/arm/cpu/arm926ejs/mx28/start.S) runs through correctly. Then control is passed back to the bootrom. That's where things end as far as I can see. The 2nd stage of u-boot is not started. The USB boot mechanism is not documented that detailed. Is it possible that the SPL code overwrites the bootroms ivt and in consequence crashes the bootrom's USB code? Any further ideas? Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] mx28: booting u-boot via USB
On 31.01.2012 15:25, Sergey Lapin wrote: On Tue, Jan 31, 2012 at 03:03:55PM +0100, Matthias Fuchs wrote: Hi, I have a problem booting the current u-boot-imx version on a MX28EVK via USB. The i.MX28 CPU supports a special boot mode where the image (sb boot stream) is downloaded via USB device (all DIP switches in position 'off' on the EVK). The CPU's internal bootrom implements a HID device in this mode. Freescale provides a download tool sb_loader for this purpose. There is also a GPL'd implementation based on libusb. Could you please provide link to GPL tool? check http://svn.rockbox.org/viewvc.cgi/trunk/utils/imxtools/ The code builds fine against a recent version of libusb. I tested it against the mx28evk. So back to my problem: I build u-boot from the u-boot-imx repository. This runs fine when booting from SD/MMC or SPI-flash. But the console stays dark when using the USB download mode. USB download works fine with the Freescale provided U-Boot sources together with the imx-bootlets SPL code. Now I digged a little bit deeper to find out the cause: When downloading via USB I saw the SPL running correctly. board_init_ll() (arch/arm/cpu/arm926ejs/mx28/start.S) runs through correctly. Then control is passed back to the bootrom. That's where things end as far as I can see. The 2nd stage of u-boot is not started. The USB boot mechanism is not documented that detailed. Is it possible that the SPL code overwrites the bootroms ivt and in consequence crashes the bootrom's USB code? Any further ideas? I'd look at difference in linking scripts and addresses in freescale u-boot and new u-boot. This might be some memory addressing issues. Had some of this with i.MX23. Also, some hardware might be not powered on or is powered off by SPL. That's a good catch. I will check Fabio's idea in just a minute. Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] mx28: booting u-boot via USB
Hi Fabio, On 31.01.2012 15:53, Fabio Estevam wrote: On 1/31/12, Matthias Fuchs matthias.fu...@esd.eu wrote: The USB boot mechanism is not documented that detailed. Is it possible that the SPL code overwrites the bootroms ivt and in consequence crashes the bootrom's USB code? Any further ideas? Completely untested, but please give it a try: Good idea. But it does not help. I expect, that the bootrom enables all required clocks. As long as the SPL does not turn them of they should stay enabled because of the set/clear-register pairs. Matthias diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c index 00493b8..313b5c7 100644 --- a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c @@ -201,8 +201,8 @@ void mx28_mem_init(void) writel(PINCTRL_EMI_DS_CTRL_DDR_MODE_DDR2, pinctrl_regs-hw_pinctrl_emi_ds_ctrl_set); - /* Power up PLL0 */ - writel(CLKCTRL_PLL0CTRL0_POWER, + /* Power up PLL0 and USB clocks */ + writel(CLKCTRL_PLL0CTRL0_EN_USB_CLKS | CLKCTRL_PLL0CTRL0_POWER, clkctrl_regs-hw_clkctrl_pll0ctrl0_set); early_delay(11000); diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c index 380b120..e55f552 100644 --- a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c +++ b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c @@ -45,7 +45,7 @@ void mx28_power_clock2pll(void) struct mx28_clkctrl_regs *clkctrl_regs = (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; - writel(CLKCTRL_PLL0CTRL0_POWER, + writel(CLKCTRL_PLL0CTRL0_EN_USB_CLKS | CLKCTRL_PLL0CTRL0_POWER, clkctrl_regs-hw_clkctrl_pll0ctrl0_set); early_delay(100); writel(CLKCTRL_CLKSEQ_BYPASS_CPU, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] mx28: Fix reboot from the kernel
On 24.01.2012 17:23, Fabio Estevam wrote:
When running Linux on a mx28evk and issuing a 'reboot'command the following
behaviour is observed:
root@freescale /$ reboot
starting pid 329, tty '': '/etc/rc.d/rcS stop'
root@freescale /$ Stopping inetd:
Terminated
Unmounting filesystems
umount: tmpfs busy - remounted read-only
chown: /home/user/.rhosts: Read-only file system
chown: /home/user: Read-only file system
chown: /home/user: Read-only file system
cat: can't open '/proc/devices': No such file or directory
The system is going down NOW!
Sent SIGTERM to all processes
Sent SIGKILL to all processes
Requesting system reboot
[ 24.24] Restarting system.
U-Boot 2011.12-06887-g586ab2f-dirty (Jan 24 2012 - 12:58:50)
Freescale i.MX28 family
DRAM: 0
, and then U-boot hangs.
Calling mx28_power_init() prior to mxs_iomux_setup_multiple_pads() fixes the
problem and
make U-boot to re-start succesfully.
Hmm, I did not observe that issue on my board.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
This patch fixes the reboot issue, but I am not able to provide a good
explanation for it, so
I am marking it as RFC.
arch/arm/cpu/arm926ejs/mx28/spl_boot.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
b/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
index dfb8309..0e57252 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
@@ -49,8 +49,8 @@ void early_delay(int delay)
void mx28_common_spl_init(const iomux_cfg_t *iomux_setup,
const unsigned int iomux_size)
{
- mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size);
mx28_power_init();
+ mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size);
mx28_mem_init();
mx28_power_wait_pswitch();
}
Without an explanation I woutld not accept this patch.
So when adding some instructions before mx28_mem_init() you could
check for the first steps in that function are and if really delaying
the first instructions or same later stuff helps. Perhaps this brings us
a clue.
I will see if your reordering has any impact on my USB recovery boot
issue.
Matthias
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Re: [U-Boot] [PATCH V3 4/6] sf command: allow default chip select through CONFIG_SPI_FLASH_CS
Hi Eric,
please see my comments below.
On 24.01.2012 17:18, Eric Nelson wrote:
This patch allows a board configuration file to provide a default
chip-select for serial flash so that first argument to the 'sf' command
is optional.
On boards that use the mxc_spi driver and a GPIO for chip select, this allows
a much simpler command line:
U-Boot sf probe
instead of
U-Boot sf probe 0x5300
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
Acked-by: Dirk Behme dirk.be...@de.bosch.com
Acked-by: Stefano Babic sba...@denx.de
---
common/cmd_sf.c | 34 +++---
1 files changed, 23 insertions(+), 11 deletions(-)
diff --git a/common/cmd_sf.c b/common/cmd_sf.c
index 7225656..4b32171 100644
--- a/common/cmd_sf.c
+++ b/common/cmd_sf.c
@@ -70,20 +70,28 @@ static int do_spi_flash_probe(int argc, char * const
argv[])
char *endp;
struct spi_flash *new;
- if (argc 2)
- return -1;
-
- cs = simple_strtoul(argv[1], endp, 0);
- if (*argv[1] == 0 || (*endp != 0 *endp != ':'))
+#ifndef CONFIG_SPI_FLASH_CS
+ if (argc 2) {
+ printf(%s: missing arguments\n, __func__);
I think this format for the error message is a little bit untypical for
u-boot. We do not show up the internal C function name. Better would be
to show the command usage, right?
return -1;
- if (*endp == ':') {
- if (endp[1] == 0)
- return -1;
+ }
+#else
+ cs = CONFIG_SPI_FLASH_CS ;
Other options for the spi flash subsystem are called
CONFIG_SF_DEFAULT_MODE|SPEED. It think it make sense to call
this CONFIG_SF_DEFAULT_CS and CONFIG_SF_DEFAULT_BUS (see below).
+#endif
- bus = cs;
- cs = simple_strtoul(endp + 1, endp, 0);
- if (*endp != 0)
+ if (argc = 2) {
+ cs = simple_strtoul(argv[1], endp, 0);
+ if (*argv[1] == 0 || (*endp != 0 *endp != ':'))
return -1;
+ if (*endp == ':') {
+ if (endp[1] == 0)
+ return -1;
+
+ bus = cs;
+ cs = simple_strtoul(endp + 1, endp, 0);
+ if (*endp != 0)
+ return -1;
+ }
}
if (argc = 3) {
@@ -299,7 +307,11 @@ usage:
U_BOOT_CMD(
sf, 5, 1, do_spi_flash,
SPI flash sub-system,
+#ifndef CONFIG_SPI_FLASH_CS
probe [bus:]cs [hz] [mode] - init flash device on given SPI bus\n
+#else
+ probe [[bus:]cs] [hz] [mode] - init flash device on given SPI bus\n
+#endif
and chip select\n
sf read addr offset len- read `len' bytes starting at\n
`offset' to memory at `addr'\n
Can you also add a config option for the SPI bus number? I think these
two need to handled in the same patch.
So you could add this stuff:
diff --git a/common/cmd_sf.c b/common/cmd_sf.c
index 9e97c8e..fa4312a 100644
--- a/common/cmd_sf.c
+++ b/common/cmd_sf.c
@@ -63,7 +63,11 @@ static int sf_parse_len_arg(char *arg, ulong *len)
static int do_spi_flash_probe(int argc, char * const argv[])
{
+#ifdef CONFIG_SF_DEFAULT_BUS
+ unsigned int bus = CONFIG_SF_DEFAULT_BUS;
+#else
unsigned int bus = 0;
+#endif
unsigned int cs;
unsigned int speed = CONFIG_SF_DEFAULT_SPEED;
unsigned int mode = CONFIG_SF_DEFAULT_MODE;
Matthias
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Re: [U-Boot] [PATCH/RFC] mx28: print bootmode with cpuinfo
On 23.01.2012 21:33, Fabio Estevam wrote: Hi Matthias, On 1/18/12, Matthias Fuchs matthias.fu...@esd.eu wrote: Hi, while playing around with the mx28evk and differnet bootmedia I found it helpful to see the current bootmode without running to the board and checking it's switches. Also some other CPU (e.g. 440 PowerPCs) print some kind of bootstrap configuration during startup. The patch probably needs some little cleanup. But the main issue might be the way how it passes the information from SPL to 2nd stage. I am note sure if those scratch registers are somehow holy :-) I tested your patch and it worked fine. What I really liked about it is that it fixed a real issue that I was seeing: after booting the kernel and issuing a rebootcommand, kernel did shutdown, reset the system, but then U-boot got stuck showing DRAM: 0 bytes. Hmm ... So maybe you could split this patch in two parts: - One patch that touches the HW_DIGCTRL_SCRATCH register (this part is what fixed the RAM size retrievel after a reboot in the kernel And what is this part? I was not aware of this issue. What exactly part of my patch fixes this issue? And finally I am not sure if we should use the scratch registers for passing the boot mode at all. Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/3] mx28evk: add SPI support
This patch adds SPI support for the MX28EVK. Support for
an optionally installed SPI flash is also added. An example
configuration for redundant envrionment from SPI flash is also
added but disabled by default.
This patch has been tested on a MX28EVK Rev. D with an installed
SST25VF032B 32Mbit SPI flash.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
board/freescale/mx28evk/iomux.c |8 +++
include/configs/mx28evk.h | 44 --
2 files changed, 49 insertions(+), 3 deletions(-)
diff --git a/board/freescale/mx28evk/iomux.c b/board/freescale/mx28evk/iomux.c
index 904e3f3..396761b 100644
--- a/board/freescale/mx28evk/iomux.c
+++ b/board/freescale/mx28evk/iomux.c
@@ -28,6 +28,7 @@
#defineMUX_CONFIG_SSP0 (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
#defineMUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
#defineMUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
+#defineMUX_CONFIG_SSP2 (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
const iomux_cfg_t iomux_setup[] = {
/* DUART */
@@ -130,6 +131,13 @@ const iomux_cfg_t iomux_setup[] = {
MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
MX28_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
+
+ /* SPI2 (for SPI flash) */
+ MX28_PAD_SSP2_SCK__SSP2_SCK | MUX_CONFIG_SSP2,
+ MX28_PAD_SSP2_MOSI__SSP2_CMD | MUX_CONFIG_SSP2,
+ MX28_PAD_SSP2_MISO__SSP2_D0 | MUX_CONFIG_SSP2,
+ MX28_PAD_SSP2_SS0__SSP2_D3 |
+ (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP),
};
void board_init_ll(void)
diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h
index 8f791aa..04967d7 100644
--- a/include/configs/mx28evk.h
+++ b/include/configs/mx28evk.h
@@ -64,6 +64,8 @@
#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PING
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
#define CONFIG_CMD_USB
/*
@@ -127,9 +129,11 @@
* MMC Driver
*/
#define CONFIG_ENV_IS_IN_MMC
-#define CONFIG_ENV_OFFSET (256 * 1024)
-#define CONFIG_ENV_SIZE(16 * 1024)
-#define CONFIG_SYS_MMC_ENV_DEV 0
+#ifdef CONFIG_ENV_IS_IN_MMC
+ #define CONFIG_ENV_OFFSET (256 * 1024)
+ #define CONFIG_ENV_SIZE (16 * 1024)
+ #define CONFIG_SYS_MMC_ENV_DEV 0
+#endif
#define CONFIG_CMD_SAVEENV
#ifdef CONFIG_CMD_MMC
#define CONFIG_MMC
@@ -170,6 +174,40 @@
#endif
/*
+ * SPI
+ */
+#ifdef CONFIG_CMD_SPI
+#define CONFIG_HARD_SPI
+#define CONFIG_MXS_SPI
+#define CONFIG_SPI_HALF_DUPLEX
+#define CONFIG_DEFAULT_SPI_BUS 2
+#define CONFIG_DEFAULT_SPI_MODESPI_MODE_0
+
+/* SPI Flash */
+#ifdef CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH
+/* this may vary and depends on the installed chip */
+#define CONFIG_SPI_FLASH_SST
+#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
+#define CONFIG_SF_DEFAULT_SPEED2400
+
+/* (redundant) environemnt in SPI flash */
+#undef CONFIG_ENV_IS_IN_SPI_FLASH
+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+#define CONFIG_ENV_SIZE0x1000 /* 4KB */
+#define CONFIG_ENV_OFFSET 0x4 /* 256K */
+#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
+#define CONFIG_ENV_SECT_SIZE 0x1000
+#define CONFIG_ENV_SPI_CS 0
+#define CONFIG_ENV_SPI_BUS 2
+#define CONFIG_ENV_SPI_MAX_HZ 2400
+#define CONFIG_ENV_SPI_MODESPI_MODE_0
+#endif
+#endif
+#endif
+
+/*
* Boot Linux
*/
#define CONFIG_CMDLINE_TAG
--
1.6.1
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[U-Boot] [PATCH 2/3] mx28evk: add USB support
This patch enables USB host support on the MX28EVK board. Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu --- board/freescale/mx28evk/mx28evk.c |7 +++ include/configs/mx28evk.h | 12 2 files changed, 19 insertions(+), 0 deletions(-) diff --git a/board/freescale/mx28evk/mx28evk.c b/board/freescale/mx28evk/mx28evk.c index 0d04d44..1bc83e9 100644 --- a/board/freescale/mx28evk/mx28evk.c +++ b/board/freescale/mx28evk/mx28evk.c @@ -52,6 +52,13 @@ int board_early_init_f(void) /* SSP2 clock at 96MHz */ mx28_set_sspclk(MXC_SSPCLK2, 96000, 0); +#ifdef CONFIG_CMD_USB + mxs_iomux_setup_pad(MX28_PAD_SSP2_SS1__USB1_OVERCURRENT); + mxs_iomux_setup_pad(MX28_PAD_AUART2_RX__GPIO_3_8 | + MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL); + gpio_direction_output(MX28_PAD_AUART2_RX__GPIO_3_8, 1); +#endif + return 0; } diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index 8a752aa..8f791aa 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -64,6 +64,7 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_NFS #define CONFIG_CMD_PING +#define CONFIG_CMD_USB /* * Memory configurations @@ -158,6 +159,17 @@ #endif /* + * USB + */ +#ifdef CONFIG_CMD_USB +#defineCONFIG_USB_EHCI +#defineCONFIG_USB_EHCI_MXS +#defineCONFIG_EHCI_MXS_PORT 1 +#defineCONFIG_EHCI_IS_TDI +#defineCONFIG_USB_STORAGE +#endif + +/* * Boot Linux */ #define CONFIG_CMDLINE_TAG -- 1.6.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/3] mx28evk: add RTC support
This patch adds support for the MX28 internal RTC and enables u-boot's date command. Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu --- include/configs/mx28evk.h |8 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index bea46e7..8a752aa 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -56,6 +56,7 @@ #define CONFIG_CMD_FAT #define CONFIG_CMD_CACHE +#define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_GPIO #define CONFIG_CMD_MII @@ -150,6 +151,13 @@ #endif /* + * RTC + */ +#ifdef CONFIG_CMD_DATE +#defineCONFIG_RTC_MXS +#endif + +/* * Boot Linux */ #define CONFIG_CMDLINE_TAG -- 1.6.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH/RFC] mx28: print bootmode with cpuinfo
Hi,
while playing around with the mx28evk and differnet bootmedia
I found it helpful to see the current bootmode without
running to the board and checking it's switches. Also
some other CPU (e.g. 440 PowerPCs) print some kind of bootstrap
configuration during startup.
The patch probably needs some little cleanup. But the main issue might
be the way how it passes the information from SPL to 2nd stage.
I am note sure if those scratch registers are somehow holy :-)
BTW, I still did not figure out why current mx28evk u-boot
cannot be bootet via USB download while MMC and SPI are working ...
Matthias
So here comes V1:
This patch add support for printing the currently selected bootmode
within print_cpuinfo() for MX28 boards.
The bootmode is read from the CPU's strapping balls before they are
setup for thier later function (e.g. become an output or are
used by the LCD controller).
Reading the pins is done from SPL stage and the information is passed
in the SCRATCH1+2 registers together with the memory size.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
arch/arm/cpu/arm926ejs/mx28/mx28.c | 43 +--
arch/arm/cpu/arm926ejs/mx28/spl_boot.c |7
arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c |4 +-
3 files changed, 48 insertions(+), 6 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c
b/arch/arm/cpu/arm926ejs/mx28/mx28.c
index da90360..15a7c5b 100644
--- a/arch/arm/cpu/arm926ejs/mx28/mx28.c
+++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c
@@ -43,6 +43,9 @@ DECLARE_GLOBAL_DATA_PTR;
#defineMX28_BLOCK_SFTRST (1 31)
#defineMX28_BLOCK_CLKGATE (1 30)
+#defineHW_DIGCTRL_SCRATCH0 0x8001c280
+#defineHW_DIGCTRL_SCRATCH1 0x8001c290
+
/* Lowlevel init isn't used on i.MX28, so just have a dummy here */
inline void lowlevel_init(void) {}
@@ -169,7 +172,41 @@ int arch_cpu_init(void)
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo(void)
{
- printf(Freescale i.MX28 family\n);
+ uint32_t bm = readl(HW_DIGCTRL_SCRATCH0) 0xf;
+ char *bm_s;
+
+ switch (bm 0xf) {
+ case 0x0:
+ bm_s = USB;
+ break;
+ case 0x1:
+ bm_s = I2C0;
+ break;
+ case 0x2:
+ bm_s = SPI2/flash;
+ break;
+ case 0x3:
+ bm_s = SPI3/flash;
+ break;
+ case 0x4:
+ bm_s = NAND;
+ break;
+ case 0x8:
+ bm_s = SPI3/eeprom;
+ break;
+ case 0x9:
+ bm_s = SSP0/MMC;
+ break;
+ case 0xa:
+ bm_s = SSP1/MMC;
+ break;
+ case 0xf:
+ bm_s = Test;
+ break;
+ default:
+ bm_s = Unknown;
+ }
+ printf(Freescale i.MX28 family (bootmode:%s)\n, bm_s);
return 0;
}
#endif
@@ -260,8 +297,6 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
}
#endif
-#defineHW_DIGCTRL_SCRATCH0 0x8001c280
-#defineHW_DIGCTRL_SCRATCH1 0x8001c290
int mx28_dram_init(void)
{
uint32_t sz[2];
@@ -277,7 +312,7 @@ int mx28_dram_init(void)
hang();
}
- gd-ram_size = sz[0];
+ gd-ram_size = sz[0] ~0xf;
return 0;
}
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
b/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
index dfb8309..edb8ff7 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
@@ -46,9 +46,16 @@ void early_delay(int delay)
;
}
+#defineHW_DIGCTRL_SCRATCH0 0x8001c280
+#defineHW_DIGCTRL_SCRATCH1 0x8001c290
+
void mx28_common_spl_init(const iomux_cfg_t *iomux_setup,
const unsigned int iomux_size)
{
+ uint32_t bm = readl(0x80018910) 0xf;
+ writel(bm, HW_DIGCTRL_SCRATCH0);
+ writel(bm, HW_DIGCTRL_SCRATCH1);
+
mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size);
mx28_power_init();
mx28_mem_init();
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
index 00493b8..15f094e 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
@@ -183,8 +183,8 @@ void mx28_mem_get_size(void)
vt[4] = (uint32_t)data_abort_memdetect_handler;
sz = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
- writel(sz, HW_DIGCTRL_SCRATCH0);
- writel(sz, HW_DIGCTRL_SCRATCH1);
+ writel(sz | readl(HW_DIGCTRL_SCRATCH0), HW_DIGCTRL_SCRATCH0);
+ writel(sz | readl(HW_DIGCTRL_SCRATCH1), HW_DIGCTRL_SCRATCH1);
/* Restore the old DABT handler. */
vt[4] = da;
--
1.6.1
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[U-Boot] [PATCH/RFC] mx28: print bootmode with cpuinfo
Hi,
while playing around with the mx28evk and differnet bootmedia
I found it helpful to see the current bootmode without
running to the board and checking it's switches. Also
some other CPU (e.g. 440 PowerPCs) print some kind of bootstrap
configuration during startup.
The patch probably needs some little cleanup. But the main issue might
be the way how it passes the information from SPL to 2nd stage.
I am note sure if those scratch registers are somehow holy :-)
BTW, I still did not figure out why current mx28evk u-boot
cannot be bootet via USB download while MMC and SPI are working ...
Matthias
So here comes V1:
This patch add support for printing the currently selected bootmode
within print_cpuinfo() for MX28 boards.
The bootmode is read from the CPU's strapping balls before they are
setup for thier later function (e.g. become an output or are
used by the LCD controller).
Reading the pins is done from SPL stage and the information is passed
in the SCRATCH1+2 registers together with the memory size.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
arch/arm/cpu/arm926ejs/mx28/mx28.c | 43 +--
arch/arm/cpu/arm926ejs/mx28/spl_boot.c |7
arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c |4 +-
3 files changed, 48 insertions(+), 6 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c
b/arch/arm/cpu/arm926ejs/mx28/mx28.c
index da90360..15a7c5b 100644
--- a/arch/arm/cpu/arm926ejs/mx28/mx28.c
+++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c
@@ -43,6 +43,9 @@ DECLARE_GLOBAL_DATA_PTR;
#defineMX28_BLOCK_SFTRST (1 31)
#defineMX28_BLOCK_CLKGATE (1 30)
+#defineHW_DIGCTRL_SCRATCH0 0x8001c280
+#defineHW_DIGCTRL_SCRATCH1 0x8001c290
+
/* Lowlevel init isn't used on i.MX28, so just have a dummy here */
inline void lowlevel_init(void) {}
@@ -169,7 +172,41 @@ int arch_cpu_init(void)
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo(void)
{
- printf(Freescale i.MX28 family\n);
+ uint32_t bm = readl(HW_DIGCTRL_SCRATCH0) 0xf;
+ char *bm_s;
+
+ switch (bm 0xf) {
+ case 0x0:
+ bm_s = USB;
+ break;
+ case 0x1:
+ bm_s = I2C0;
+ break;
+ case 0x2:
+ bm_s = SPI2/flash;
+ break;
+ case 0x3:
+ bm_s = SPI3/flash;
+ break;
+ case 0x4:
+ bm_s = NAND;
+ break;
+ case 0x8:
+ bm_s = SPI3/eeprom;
+ break;
+ case 0x9:
+ bm_s = SSP0/MMC;
+ break;
+ case 0xa:
+ bm_s = SSP1/MMC;
+ break;
+ case 0xf:
+ bm_s = Test;
+ break;
+ default:
+ bm_s = Unknown;
+ }
+ printf(Freescale i.MX28 family (bootmode:%s)\n, bm_s);
return 0;
}
#endif
@@ -260,8 +297,6 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
}
#endif
-#defineHW_DIGCTRL_SCRATCH0 0x8001c280
-#defineHW_DIGCTRL_SCRATCH1 0x8001c290
int mx28_dram_init(void)
{
uint32_t sz[2];
@@ -277,7 +312,7 @@ int mx28_dram_init(void)
hang();
}
- gd-ram_size = sz[0];
+ gd-ram_size = sz[0] ~0xf;
return 0;
}
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
b/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
index dfb8309..edb8ff7 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_boot.c
@@ -46,9 +46,16 @@ void early_delay(int delay)
;
}
+#defineHW_DIGCTRL_SCRATCH0 0x8001c280
+#defineHW_DIGCTRL_SCRATCH1 0x8001c290
+
void mx28_common_spl_init(const iomux_cfg_t *iomux_setup,
const unsigned int iomux_size)
{
+ uint32_t bm = readl(0x80018910) 0xf;
+ writel(bm, HW_DIGCTRL_SCRATCH0);
+ writel(bm, HW_DIGCTRL_SCRATCH1);
+
mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size);
mx28_power_init();
mx28_mem_init();
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
index 00493b8..15f094e 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c
@@ -183,8 +183,8 @@ void mx28_mem_get_size(void)
vt[4] = (uint32_t)data_abort_memdetect_handler;
sz = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
- writel(sz, HW_DIGCTRL_SCRATCH0);
- writel(sz, HW_DIGCTRL_SCRATCH1);
+ writel(sz | readl(HW_DIGCTRL_SCRATCH0), HW_DIGCTRL_SCRATCH0);
+ writel(sz | readl(HW_DIGCTRL_SCRATCH1), HW_DIGCTRL_SCRATCH1);
/* Restore the old DABT handler. */
vt[4] = da;
--
1.6.1
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Re: [U-Boot] [PATCH 3/3] mx28evk: add SPI support
On 01/18/2012 05:07 PM, Marek Vasut wrote:
This patch adds SPI support for the MX28EVK. Support for
an optionally installed SPI flash is also added. An example
configuration for redundant envrionment from SPI flash is also
added but disabled by default.
This patch has been tested on a MX28EVK Rev. D with an installed
SST25VF032B 32Mbit SPI flash.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
board/freescale/mx28evk/iomux.c |8 +++
include/configs/mx28evk.h | 44
-- 2 files changed, 49 insertions(+),
3 deletions(-)
diff --git a/board/freescale/mx28evk/iomux.c
b/board/freescale/mx28evk/iomux.c index 904e3f3..396761b 100644
--- a/board/freescale/mx28evk/iomux.c
+++ b/board/freescale/mx28evk/iomux.c
@@ -28,6 +28,7 @@
#define MUX_CONFIG_SSP0 (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
#define MUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
+#define MUX_CONFIG_SSP2 (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
const iomux_cfg_t iomux_setup[] = {
/* DUART */
@@ -130,6 +131,13 @@ const iomux_cfg_t iomux_setup[] = {
MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
MX28_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
+
+/* SPI2 (for SPI flash) */
+MX28_PAD_SSP2_SCK__SSP2_SCK | MUX_CONFIG_SSP2,
+MX28_PAD_SSP2_MOSI__SSP2_CMD | MUX_CONFIG_SSP2,
+MX28_PAD_SSP2_MISO__SSP2_D0 | MUX_CONFIG_SSP2,
+MX28_PAD_SSP2_SS0__SSP2_D3 |
+(MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP),
};
void board_init_ll(void)
diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h
index 8f791aa..04967d7 100644
--- a/include/configs/mx28evk.h
+++ b/include/configs/mx28evk.h
@@ -64,6 +64,8 @@
#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PING
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
#define CONFIG_CMD_USB
/*
@@ -127,9 +129,11 @@
* MMC Driver
*/
#define CONFIG_ENV_IS_IN_MMC
-#define CONFIG_ENV_OFFSET (256 * 1024)
-#define CONFIG_ENV_SIZE (16 * 1024)
-#define CONFIG_SYS_MMC_ENV_DEV 0
+#ifdef CONFIG_ENV_IS_IN_MMC
+ #define CONFIG_ENV_OFFSET (256 * 1024)
+ #define CONFIG_ENV_SIZE(16 * 1024)
+ #define CONFIG_SYS_MMC_ENV_DEV 0
+#endif
#define CONFIG_CMD_SAVEENV
#ifdef CONFIG_CMD_MMC
#define CONFIG_MMC
@@ -170,6 +174,40 @@
#endif
/*
+ * SPI
+ */
+#ifdef CONFIG_CMD_SPI
+#define CONFIG_HARD_SPI
+#define CONFIG_MXS_SPI
+#define CONFIG_SPI_HALF_DUPLEX
+#define CONFIG_DEFAULT_SPI_BUS 2
+#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
+
+/* SPI Flash */
+#ifdef CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH
+/* this may vary and depends on the installed chip */
+#define CONFIG_SPI_FLASH_SST
+#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
+#define CONFIG_SF_DEFAULT_SPEED 2400
+
+/* (redundant) environemnt in SPI flash */
+#undef CONFIG_ENV_IS_IN_SPI_FLASH
+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+#define CONFIG_ENV_SIZE 0x1000 /* 4KB */
+#define CONFIG_ENV_OFFSET 0x4 /* 256K */
+#define CONFIG_ENV_OFFSET_REDUND(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
+#define CONFIG_ENV_SECT_SIZE0x1000
+#define CONFIG_ENV_SPI_CS 0
+#define CONFIG_ENV_SPI_BUS 2
+#define CONFIG_ENV_SPI_MAX_HZ 2400
+#define CONFIG_ENV_SPI_MODE SPI_MODE_0
+#endif
+#endif
+#endif
+
+/*
* Boot Linux
*/
#define CONFIG_CMDLINE_TAG
Hm, good ... so the SPI flash works now with no modifications ?
Of course not! The SPI driver needs to be fixed. Either by my previously
posted patch or by god's hands :-)
Fabio asked for this patch in order to test my SPI driver fix.
But I think this is independant from each other.
Matthias
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Re: [U-Boot] SPI Test
On 16.01.2012 12:23, Marek Vasut wrote: Hmm, can you tell me what type of SPI flash you have installed? Typically the read-status-register operation requires a low to high transition to get terminated. This is from my flash' datasheet: Read-Status-Register (RDSR) The Read-Status-Register (RDSR) instruction allows reading of the status register. The status register may be read at any time even during a Write (Program/Erase) operation. When a Write operation is in progress, the Busy bit may be checked before sending any new commands to assure that the new commands are properly received by the device. CE# must be driven low before the RDSR instruction is entered and remain low until the status data is read. Read-Status-Register is continuous with ongoing clock cycles until it is terminated by a low to high transition of the CE#. See Figure 16 for the RDSR instruction sequence... It's a SST part. I just noticed ... Matthias, why don't you CC the mailing list? Fabio wanted to stop the list being flood with this discussion. But you are right. Let's stop this thread an return to the list. Matthias Also, I can't really remember now what part there is. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx28: fix i.MX28 spi driver
On 01/14/2012 09:14 PM, Fabio Estevam wrote: On Sat, Jan 14, 2012 at 6:09 PM, Matthias Fuchs matthias.fu...@esd.eu wrote: This cannot work. I do not understand what you are trying to achieve with this. I would like to avoid the extra dummy read that your patch proposes. That's what I also tried. But from the ref manual I got no idea. When we do not find a hy to deassert the chip select manually, we cannot avoid this read. It seems that the mainline linux only implements a GPIO based SPI driver. So we cannot take it for reference. I'm wonderng how this works on the Denx' M28EVK. Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx28: fix i.MX28 spi driver
On 01/15/2012 04:28 PM, Fabio Estevam wrote: On Sun, Jan 15, 2012 at 10:10 AM, Matthias Fuchs matthias.fu...@esd.eu wrote: That's what I also tried. But from the ref manual I got no idea. When we do not find a hy to deassert the chip select manually, we cannot avoid this read. I was assuming that the chip select deassertion was correctly being handled by the mxs_spi_end_xfer function. This function handles the LOCK_CS and IGNORE_CRC bits that are responsible for chip select assertion/deassertion. From the MX28 Reference Manual: IGNORE_CRC bit: In SPI/SSI modes: When set to 1, deassert the chip select (SSn) pin after the command is executed. Exactly. That's the point. It says ... after the command So you need a transfer after calling mxs_spi_end_xfer(). That's why the current code calls it before transferring the final byte. Matthias Then I tought that mxs_spi_end_xfer should be also called in the case where bitlen==0. In current code this does not happen. It seems that the mainline linux only implements a GPIO based SPI driver. So we cannot take it for reference. There is no mxs spi driver in the mainline kernel yet. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mx28: fix i.MX28 spi driver
The generic spi flash driver (drivers/mtd/spi/spi_flash.c) uses the
spi low level driver's spi_xfer() function with len=0 to deassert the
SPI flash' chip select. But the i.MX28 spi driver rejects this call
due to len=0.
This patch implements an exception for len=0 with the SPI_XFER_END
flag set. This results in an extra read with the chip select being
deasserted afterwards. There seems to be no way to deassert the signal
by hand.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
drivers/spi/mxs_spi.c | 12 +---
1 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
index 4c27fef..adb9ca8 100644
--- a/drivers/spi/mxs_spi.c
+++ b/drivers/spi/mxs_spi.c
@@ -129,9 +129,15 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
int len = bitlen / 8;
const char *tx = dout;
char *rx = din;
-
- if (bitlen == 0)
- return 0;
+ char dummy;
+
+ if (bitlen == 0) {
+ if (flags SPI_XFER_END) {
+ rx = dummy;
+ len = 1;
+ } else
+ return 0;
+ }
if (!rx !tx)
return 0;
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Re: [U-Boot] [PATCH] mx28: fix i.MX28 spi driver
On 01/14/2012 03:10 PM, Marek Vasut wrote:
The generic spi flash driver (drivers/mtd/spi/spi_flash.c) uses the
spi low level driver's spi_xfer() function with len=0 to deassert the
SPI flash' chip select. But the i.MX28 spi driver rejects this call
due to len=0.
This patch implements an exception for len=0 with the SPI_XFER_END
flag set. This results in an extra read with the chip select being
deasserted afterwards. There seems to be no way to deassert the signal
by hand.
This seems good, but it doesn't look too correct either (is there really no
other way to deassert CS than doing dummy read?).
Not that I am aware of. Did you wrote that mxs_spi driver? How did you
interpret the
chips reference manual. I understood it this way: you need to tell the
controller
to deassert chip select before the final transfer.
I could be possible to change the driver implementation and use GPIOs for
chip select. But I think that's not the philisophy of this controller.
Do you see an issue with
current implementation on some board please?
Yes, I installed an SST25VF032B SPI on the MX28EVK in preparation of our
own board. The chip was detected correctly after power on, but erasing
(that's one place where the status register polling is used) more than one page
does not work and then after reset the device is not correctly detected.
I would expect problems on the M28EVK (Denx) also. You might want to turn
SPI + spi_flash debugging to see it. Also I found a posting from
Alexander Keller on the u-boot list from 12/13/2011. Perhaps the can check if
this patch fixes his problems also.
Matthias
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
drivers/spi/mxs_spi.c | 12 +---
1 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
index 4c27fef..adb9ca8 100644
--- a/drivers/spi/mxs_spi.c
+++ b/drivers/spi/mxs_spi.c
@@ -129,9 +129,15 @@ int spi_xfer(struct spi_slave *slave, unsigned int
bitlen, int len = bitlen / 8;
const char *tx = dout;
char *rx = din;
-
-if (bitlen == 0)
-return 0;
+char dummy;
+
+if (bitlen == 0) {
+if (flags SPI_XFER_END) {
+rx = dummy;
+len = 1;
+} else
+return 0;
+}
if (!rx !tx)
return 0;
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Vahrenwalder Str. 207 - 30165 Hannover - GERMANY
Phone: +49-511-37298-0 - Fax: +49-511-37298-68
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Re: [U-Boot] [PATCH] mx28: fix i.MX28 spi driver
This cannot work. I do not understand what you are trying to achieve with this.
Matthias
On 01/14/2012 07:54 PM, Fabio Estevam wrote:
On Sat, Jan 14, 2012 at 4:53 PM, Fabio Estevam feste...@gmail.com wrote:
Actually I meant this:
One more time ;-)
--- a/drivers/spi/mxs_spi.c
+++ b/drivers/spi/mxs_spi.c
@@ -130,13 +130,10 @@ int spi_xfer(struct spi_slave *slave, unsigned int
bitlen,
const char *tx = dout;
char *rx = din;
- if (bitlen == 0)
- return 0;
-
if (!rx !tx)
return 0;
- if (flags SPI_XFER_BEGIN)
+ if ((flags SPI_XFER_BEGIN) len)
mxs_spi_start_xfer(ssp_regs);
while (len--) {
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Re: [U-Boot] u-boot-imx on Freescale MX28EVK
Robert, On 13.01.2012 11:33, Robert Deliën wrote: Hi Matthias, I a patch would be welcome. I only need USB and SPI flash for my application. And USB was easy to setup. Currently I am also jiggling around the SPI / SPI flash support. For USB, all you need to do is to configure it in and to copy Marek's clock setup in board_early_init_f for m28evk_config into your own config. Make sure you change SSP2 into SSP1, because the m28evk module uses a different SSP2 for it's second MMC controller, whereas the FreeScale mx28evk board uses SSP1. To store your environment in MMC, you still need to patch board/freescale/common/sdhc_boot.c to make sure it's stored at the correct offset. You can find this patch on this mailing list. Without it, saving your environment will overwrite the MBR/ptable and you board won't boot next time. yes, this was all easy to integrate. But there is still the difference that I can download 2009.08 + imx-bootlets via USB (sb_loader). This does not work with the recent u-boot-imx repo and the generated u-boot.sb target. I don't know why that doesn't work, but I don't have any experience there. Early this year I rewrote the broken FreeScale scripts to create boot streams, so I know a little about the way it works, but I no longer use those since the U-Boot tools do such a good job. You can have the scripts though. thanks, but the USB download and booting from an SPI flash I expect the u-boot.sb as generated by the u-boot build system should work fine. MMC/SD does not bring me any further :-( Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] mx28: bug in mxs_spi driver
Hi,
I ran into trouble when trying to extend MX28EVK board support for a SPI
flash (SST24VF032B).
Some code finally runs into spi_flash_cmd_poll_bit() (spi_flash.c).
This function is then used to poll the flash's status register:
int spi_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout,
u8 cmd, u8 poll_bit)
{
struct spi_slave *spi = flash-spi;
unsigned long timebase;
int ret;
u8 status;
ret = spi_xfer(spi, 8, cmd, NULL, SPI_XFER_BEGIN);
if (ret) {
debug(SF: Failed to send command %02x: %d\n, cmd, ret);
return ret;
}
timebase = get_timer(0);
do {
WATCHDOG_RESET();
ret = spi_xfer(spi, 8, NULL, status, 0);
if (ret)
return -1;
if ((status poll_bit) == 0)
break;
} while (get_timer(timebase) timeout);
spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
if ((status poll_bit) == 0)
return 0;
/* Timed out */
debug(SF: time out!\n);
return -1;
}
It first asserts the flash's chip select transmits the command (first call to
spi_xfer - e.g. read status register) and then reads a single byte in a loop
until e.g. the BUSY bit is cleared. Finally it calls spi_xfer(spi, 0,
NULL, NULL, SPI_XFER_END) to deassert the SPI flash chip select.
But this last spi_xfer() call does not work with the mxs_spi. You must tell the
controller to deassert the select line before the final read cycle! I don't see
a way to fix this inside mxs_spi.c:spi_xfer(). These seems to be no way to
manually
deassert the chip select. Or did I miss something?
Well, with the current code spi_flash_cmd_poll_bit() ends up with an asserted
chip select. For SPI flashes this will make the chip behave unexpected on
the next command!.
A dirty way would be to change the last call to xpi_xfer (see above)
into:
spi_xfer(spi, 8, NULL, status, SPI_XFER_END);
This will result in an additional byte transfer with the select being
deasserted finally.
Any better ideas to fix this?
I am wondering how SPI flash on the Denx' M28EVK can work.
Matthias
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Re: [U-Boot] u-boot-imx on Freescale MX28EVK
Hi Fabio, thanks for your details. Some of the discrete switches where messed up. Boot Mode was fine. So now it's working fine. Even the power button is not needed ;-) I still have to investigate a little to get USB recovery working. This does not work out of the box as with Freescale'S initial 2009.08 u-boot for this CPU. Matthias On 11.01.2012 16:12, Fabio Estevam wrote: Hi Matthias, On Wed, Jan 11, 2012 at 12:41 PM, Matthias Fuchs matthias.fu...@esd.eu wrote: Hi Fabio, can you confirm that the current u-boot-imx tree runs fine on the MX28EVK? I tried it but the debug console stays dead. Yes, it works fine. This is what I did: 1) make mx28evk I think you meant mx28evk_config 2) make u-boot.sb 3) ./tools/mxsboot sd u-boot.sb u-boot-sd.sb 4) prepare an SD card as described in doc/README.m28 (only one partition of type 53) 5) dd u-boot-sd.sb to above partition 6) install SD and press power button On my board I don't have to press the power button in order to get the console output. Please check your MX28EVK settings: - Boot Mode Select: 1 0 0 1 - JTAG PSWITCH RESET: To the left (reset enabled) - Battery Source: Down - Wall 5V: Up - VDD 5V: To the left (off) - Hold Button: Down (off) Also, I have only tested this on a MX28EVK rev.D board. BTW: Did you ever try Freescales sd_loader to download u-boot into RAM? FYI: There also seems to be a Linux version of the USB loader (http://svn.rockbox.org/viewvc.cgi/trunk/utils/imxtools/). I haven't tried this yet. Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] u-boot-imx on Freescale MX28EVK
On 12.01.2012 11:15, Fabio Estevam wrote: Hi Matthias, On Thu, Jan 12, 2012 at 8:07 AM, Matthias Fuchs matthias.fu...@esd.eu wrote: Hi Fabio, thanks for your details. Some of the discrete switches where messed up. Boot Mode was fine. So now it's working fine. Even the power button is not needed ;-) I am glad to know it is working now. I will create a README file with these jumper settings. Also, can you please let me know what is your board version? Is it also mx28evk revD? Yes, revD. I still have to investigate a little to get USB recovery working. This does not work out of the box as with Freescale'S initial 2009.08 u-boot for this CPU. Ok, good. m28evk has USB support as far as I know, so maybe you can look at it for reference. You did not really understand what I mean. I am not talking about using the USBs host/device from u-boot. The i.MX28 is capable to boot via USB. In this case the SOC's ROM implementes a HID device and you can use some tools on your PC (see previous posting) to download the code (boot jumper setting 0-0-0-0. I tried it with Freescale's sb_loader (Wind**s). This works fine when downloading a u-boot (imx28_ivt_uboot.sb) based on Freescale's 2009.08 source + imx-bootlets-src-10.12.01. But it does not work when using sb_loader with u-boot.sb build from the u-boot-imx repo. I can can imagine that the SPL code somehow breaks the internal download code. Matthias Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] u-boot-imx on Freescale MX28EVK
Hi Robert, I a patch would be welcome. I only need USB and SPI flash for my application. And USB was easy to setup. Currently I am also jiggling around the SPI / SPI flash support. I only mentioned the 2009.08 u-boot for reference in my initial posting. There was no plan to stay with it - of course :-) But there is still the difference that I can download 2009.08 + imx-bootlets via USB (sb_loader). This does not work with the recent u-boot-imx repo and the generated u-boot.sb target. Matthias On 12.01.2012 22:52, Robert Deliën wrote: Hi Matthias, I have a fully functional U-Boot for the mx28evk board: - Both Ethernet ports work - Both MMC slots work - NAND works (if configure in, one MMC slot will be configured out, due to shared pins) - USB works - I2C works - Currently working on SPI It's basically an integration of u-boot-imx and Marek's work on m28evk_config in the mainline. I'm still working on making a posting-quality patch, but I'll be happy to help you out with a patch or a tar-ball, so feel free to drop me an email. Freescale's 2009.08 works too, but their script to get it on an sd-card is broken. I can get you a replacement for that one as well, but you'd better step up to a more recent version, because the MMC driver in the FreeScale version has a nasty bug in the MMC driver. This bug prevents you from loading files from a file system on an SD-Card. Robert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot -- Dipl.-Ing. Matthias Fuchs Head of System Design esd electronic system design gmbh Vahrenwalder Str. 207 - 30165 Hannover - GERMANY Phone: +49-511-37298-0 - Fax: +49-511-37298-68 Please visit our homepage http://www.esd.eu Quality Products - Made in Germany Besuchen Sie uns auf der embedded world 2012 in Halle 4, Stand 129 vom 28. Februar - 01. März 2012 in Nürnberg! Geschäftsführer: Klaus Detering Amtsgericht Hannover HRB 51373 - VAT-ID DE 115672832 - ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] u-boot-imx on Freescale MX28EVK
Hi Fabio, can you confirm that the current u-boot-imx tree runs fine on the MX28EVK? I tried it but the debug console stays dead. This is what I did: 1) make mx28evk 2) make u-boot.sb 3) ./tools/mxsboot sd u-boot.sb u-boot-sd.sb 4) prepare an SD card as described in doc/README.m28 (only one partition of type 53) 5) dd u-boot-sd.sb to above partition 6) install SD and press power button BTW: Did you ever try Freescales sd_loader to download u-boot into RAM? FYI: There also seems to be a Linux version of the USB loader (http://svn.rockbox.org/viewvc.cgi/trunk/utils/imxtools/). Best regards, Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 00/18 V2] CHECKPATCH: fpgadata.c cleanup
Hi Marek, thanks for that work. The patches against the esd files are Acked-by: Matthias Fuchs matthias.fu...@esd.eu Matthias On 15.12.2011 14:26, Marek Vasut wrote: First of the CHECKPATCH series of patches with per-file checkpatch fixes. This series fixes all files fpgadata.c, which contains PPC FPGA firmwares. There are no functional changes, only CHECKPATCH fixes. Marek Vasut (18): CHECKPATCH: ./board/dave/PPChameleonEVB/fpgadata.c CHECKPATCH: ./board/esd/cpciiser4/fpgadata.c CHECKPATCH: ./board/esd/du405/fpgadata.c CHECKPATCH: ./board/esd/canbt/fpgadata.c CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci4052.c CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci405ab.c CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci405.c CHECKPATCH: ./board/esd/wuh405/fpgadata.c CHECKPATCH: ./board/esd/plu405/fpgadata.c CHECKPATCH: ./board/esd/ar405/fpgadata.c CHECKPATCH: ./board/esd/ar405/fpgadata_xl30.c CHECKPATCH: ./board/esd/dasa_sim/fpgadata.c CHECKPATCH: ./board/esd/ash405/fpgadata.c CHECKPATCH: ./board/esd/voh405/fpgadata.c CHECKPATCH: ./board/esd/apc405/fpgadata.c CHECKPATCH: ./board/esd/tasreg/fpgadata.c CHECKPATCH: ./board/esd/pci405/fpgadata.c CHECKPATCH: ./board/esd/hh405/fpgadata.c board/dave/PPChameleonEVB/fpgadata.c | 3416 +--- board/esd/apc405/fpgadata.c| 6012 board/esd/ar405/fpgadata.c | 8250 +++-- board/esd/ar405/fpgadata_xl30.c| 7308 ++- board/esd/ash405/fpgadata.c| 7475 ++- board/esd/canbt/fpgadata.c | 1211 ++- board/esd/cpci405/fpgadata_cpci405.c | 1025 ++- board/esd/cpci405/fpgadata_cpci4052.c | 2294 +++-- board/esd/cpci405/fpgadata_cpci405ab.c | 3854 +--- board/esd/cpciiser4/fpgadata.c | 6204 +- board/esd/dasa_sim/fpgadata.c | 5855 board/esd/du405/fpgadata.c | 2108 +++-- board/esd/hh405/fpgadata.c | 7551 ++- board/esd/pci405/fpgadata.c| 2238 +++-- board/esd/plu405/fpgadata.c| 3537 +--- board/esd/tasreg/fpgadata.c|15992 +--- board/esd/voh405/fpgadata.c| 6032 board/esd/wuh405/fpgadata.c| 5454 18 files changed, 63874 insertions(+), 31942 deletions(-) V2: Align to 8 bytes per line. Cc: Anatolij Gustschin ag...@denx.de Cc: Stefano Babic sba...@denx.de Anatolij, Stefano, can you skim through these and give me your ACK so I can push them through staging ? Still, there is around three thousand files that don't conform to checkpatch style. -- Dipl.-Ing. Matthias Fuchs Head of System Design esd electronic system design gmbh Vahrenwalder Str. 207 - 30165 Hannover - GERMANY Phone: +49-511-37298-0 - Fax: +49-511-37298-68 Please visit our homepage http://www.esd.eu Quality Products - Made in Germany Besuchen Sie uns auf der embedded world 2012 in Halle 4, Stand 129 vom 28. Februar - 01. März 2012 in Nürnberg! Geschäftsführer: Klaus Detering Amtsgericht Hannover HRB 51373 - VAT-ID DE 115672832 - ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 00/18 V2] CHECKPATCH: fpgadata.c cleanup
Hi Marek, On 15.12.2011 16:17, Marek Vasut wrote: Hi Marek, On Thu, 15 Dec 2011 14:26:41 +0100 Marek Vasut marek.va...@gmail.com wrote: ... 18 files changed, 63874 insertions(+), 31942 deletions(-) V2: Align to 8 bytes per line. Cc: Anatolij Gustschin ag...@denx.de Cc: Stefano Babic sba...@denx.de Anatolij, Stefano, can you skim through these and give me your ACK so I can push them through staging ? Still, there is around three thousand files that don't conform to checkpatch style. I'll look at these patches. Yes, some video drivers files are on my checkpatch cleanup TODO list. Well I can share the complete list of files that fail checkpatch. I ran checkpatch -f on the whole tree (.c and .h files) a few days ago :-) It ran for 5+ hours ;-) http://marex.hackndev.com/fail-list.txt This is after applying these two patchsets (logo and fpga) and partly cleaning up board/esd/) btw. let's queue these (both logo and fpga) patches for -next please. They are not urgent and I'd like to see my stats for this release not tainted by this patchbomb. Also, I'll share the partial cleanup of ESD boards if Matthias/Stefan is interested. I checked how arch/arm is also broken and me being mostly ARM guy, I'd like to continue cleaning up there. I would do that clean up by myself for the esd files. As long as we do not have a strict timeline for this, I will see if I could start with that in January. I will also check if we could get rid of some boards that are not active anymore. Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] board/esd/cpci405/cpci405.c: Fix GCC 4.6 warning
On 11/24/2011 06:40 PM, Mike Frysinger wrote: On Thursday 24 November 2011 10:39:21 Matthias Fuchs wrote: -sprintf(str, %08X%04X, -*(unsigned int *)ow_id[0], -*(unsigned short *)ow_id[4]); +sprintf(str, %02X%02X%02X%02X%02X%02X, +ow_id[0], ow_id[1], ow_id[2], ow_id[3], ow_id[4], ow_id[5]); use __get_unaligned_le32 and __get_unaligned_le16 helpers to avoid having to decode each byte. I must admit that I like the new style much more. But thanks for the hint on the __get-unaligned macros :-) Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] board/esd/dasa_sim/flash.c: Fix GCC 4.6 warning
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
board/esd/dasa_sim/flash.c |3 ---
1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/board/esd/dasa_sim/flash.c b/board/esd/dasa_sim/flash.c
index d6a7737..e2f2aac 100644
--- a/board/esd/dasa_sim/flash.c
+++ b/board/esd/dasa_sim/flash.c
@@ -44,7 +44,6 @@ unsigned long flash_init (void)
{
unsigned long size_b0;
int i;
- unsigned long base_b0;
/* Init: no FLASHes known */
for (i=0; iCONFIG_SYS_MAX_FLASH_BANKS; ++i) {
@@ -63,8 +62,6 @@ unsigned long flash_init (void)
/* Setup offsets */
flash_get_offsets (-size_b0, flash_info[0]);
- base_b0 = -size_b0;
-
/* Monitor protection ON by default */
(void)flash_protect(FLAG_PROTECT_SET,
-monitor_flash_len,
--
1.6.1
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[U-Boot] [PATCH] board/esd/cpci405/cpci405.c: Fix GCC 4.6 warning
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu --- board/esd/cpci405/cpci405.c |8 +++- 1 files changed, 3 insertions(+), 5 deletions(-) diff --git a/board/esd/cpci405/cpci405.c b/board/esd/cpci405/cpci405.c index 98a8584..41b5ba0 100644 --- a/board/esd/cpci405/cpci405.c +++ b/board/esd/cpci405/cpci405.c @@ -656,7 +656,6 @@ int do_onewire(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) int i; unsigned char ow_id[6]; char str[32]; - unsigned char ow_crc; /* * Clear 1-wire bit (open drain with pull-up) @@ -675,11 +674,10 @@ int do_onewire(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) OWReadByte(); /* skip family code ( == 0x01) */ for (i = 0; i 6; i++) ow_id[i] = OWReadByte(); - ow_crc = OWReadByte(); /* read crc */ + OWReadByte(); /* read crc */ - sprintf(str, %08X%04X, - *(unsigned int *)ow_id[0], - *(unsigned short *)ow_id[4]); + sprintf(str, %02X%02X%02X%02X%02X%02X, + ow_id[0], ow_id[1], ow_id[2], ow_id[3], ow_id[4], ow_id[5]); printf(Setting environment variable 'ow_id' to %s\n, str); setenv(ow_id, str); -- 1.6.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V2] ppc4xx: fix PMC440 painit command
This patch fixes the PMC440 BSP command painit. The implementation was
broken since the step to the new environment handling.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
V2: rebased
board/esd/pmc440/cmd_pmc440.c | 17 +++--
1 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/board/esd/pmc440/cmd_pmc440.c b/board/esd/pmc440/cmd_pmc440.c
index 0202876..647e658 100644
--- a/board/esd/pmc440/cmd_pmc440.c
+++ b/board/esd/pmc440/cmd_pmc440.c
@@ -342,7 +342,8 @@ U_BOOT_CMD(
#if defined(CONFIG_PRAM)
#include environment.h
-extern env_t *env_ptr;
+#include search.h
+#include errno.h
int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
@@ -351,6 +352,10 @@ int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
u32 param;
ulong *lptr;
+ env_t *envp;
+ char *res;
+ int len;
+
v = getenv(pram);
if (v)
pram = simple_strtoul(v, NULL, 10);
@@ -384,7 +389,15 @@ int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
/* env is first (4k aligned) */
nextbase -= ((CONFIG_ENV_SIZE + 4096 - 1) ~(4096 - 1));
- memcpy((void*)nextbase, env_ptr, CONFIG_ENV_SIZE);
+ envp = (env_t *)nextbase;
+ res = (char *)envp-data;
+ len = hexport_r(env_htab, '\0', res, ENV_SIZE, 0, NULL);
+ if (len 0) {
+ error(Cannot export environment: errno = %d\n, errno);
+ return 1;
+ }
+ envp-crc = crc32(0, envp-data, ENV_SIZE);
+
*(--lptr) = CONFIG_ENV_SIZE; /* size */
*(--lptr) = base - nextbase; /* offset | type=0 */
--
1.6.1
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[U-Boot] [PATCH] board/esd/common/xilinx_jtag_micro.c: Fix GCC 4.6 warning
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
board/esd/common/xilinx_jtag/micro.c |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/board/esd/common/xilinx_jtag/micro.c
b/board/esd/common/xilinx_jtag/micro.c
index 9823e5e..cba33b8 100644
--- a/board/esd/common/xilinx_jtag/micro.c
+++ b/board/esd/common/xilinx_jtag/micro.c
@@ -1831,7 +1831,6 @@ int xsvfExecute(void)
int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int iErrorCode;
- char* pzXsvfFileName;
unsigned long duration;
unsigned long long startClock, endClock;
@@ -1847,7 +1846,6 @@ int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
}
iErrorCode = XSVF_ERRORCODE( XSVF_ERROR_NONE );
- pzXsvfFileName = 0;
xsvf_iDebugLevel= 0;
printf(XSVF Player v%s, Xilinx, Inc.\n, XSVF_VERSION);
--
1.6.1
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Re: [U-Boot] PPC4xx: usbdev.c used at all?
We do not use it or plan to use it. Matthias On 17.11.2011 15:04, Stefan Roese wrote: Hi Marri, I just touched the file arch/powerpc/cpu/ppc4xx/usbdev.c again to remove some GCC 4.6 compiler warnings. While doing this I wondered (again) if anybody is using this driver at all. I definitely never did. And I'm wondering if this code is useful at all. So Marri (or anybody else): Do you need this driver in U-Boot? If not, I'll just remove it in a short while. Thanks. Best regards, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/1] pci: move pcidelay code to new location just before PCI bus scan
On 12.10.2011 10:44, Anatolij Gustschin wrote: PCI cards might need some time after reset to respond. On some boards (mpc5200 or mpc8260 based) the PCI bus reset is deasserted at pci_init_board() time, so we currently can not use available pcidelay option for waiting before PCI bus scan since this waiting takes place before calling pci_init_board(). By moving the pcidelay code to the new location using of the pcidelay option is possible on mpc5200 or mpc8260 based boards, too. Since pci_hose_scan() could be called multiple times, restrict the function to wait only during its first call and to ignore pcidelay for any further call (as pointed out by Matthias). Signed-off-by: Anatolij Gustschin ag...@denx.de Cc: Matthias Fuchs matthias.fu...@esd.eu --- Changes since first version: - extend to wait only during initial pci_hose_scan() call as pointed out by Matthias Tested on PMC440. Works fine. Acked-by: Matthias Fuchs matthias.fu...@esd.eu Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/3] ppc4xx: fix PMC440 painit command
From: Matthias Fuchs matthias.fu...@esd.eu
This patch fixes the PMC440 BSP command painit. The implementation was
broken since the step to the new environment handling.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
board/esd/pmc440/cmd_pmc440.c | 17 +++--
1 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/board/esd/pmc440/cmd_pmc440.c b/board/esd/pmc440/cmd_pmc440.c
index 200d7ee..3bcf2b0 100644
--- a/board/esd/pmc440/cmd_pmc440.c
+++ b/board/esd/pmc440/cmd_pmc440.c
@@ -342,7 +342,8 @@ U_BOOT_CMD(
#if defined(CONFIG_PRAM)
#include environment.h
-extern env_t *env_ptr;
+#include search.h
+#include errno.h
int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
@@ -351,6 +352,10 @@ int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
u32 param;
ulong *lptr;
+ env_t *envp;
+ char *res;
+ int len;
+
v = getenv(pram);
if (v)
pram = simple_strtoul(v, NULL, 10);
@@ -384,7 +389,15 @@ int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
/* env is first (4k aligned) */
nextbase -= ((CONFIG_ENV_SIZE + 4096 - 1) ~(4096 - 1));
- memcpy((void*)nextbase, env_ptr, CONFIG_ENV_SIZE);
+ envp = (env_t *)nextbase;
+ res = (char *)envp-data;
+ len = hexport_r(env_htab, '\0', res, ENV_SIZE);
+if (len 0) {
+error(Cannot export environment: errno = %d\n, errno);
+return 1;
+}
+ envp-crc = crc32(0, envp-data, ENV_SIZE);
+
*(--lptr) = CONFIG_ENV_SIZE; /* size */
*(--lptr) = base - nextbase; /* offset | type=0 */
--
1.6.1
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[U-Boot] [PATCH 2/3] ppc4xx: remove invalid access to PCI_BRDGOPT2 register
From: Matthias Fuchs matthias.fu...@esd.eu
This patch removes an invalid call to pci_write_config_dword to
PCI_BRDGOPT2 register. This function must not be used from pci_target_init
and is also at the wrong place. The correct call is done later in
pci_target_init via pci_hose_write_config_dword.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
board/esd/pmc440/pmc440.c |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/board/esd/pmc440/pmc440.c b/board/esd/pmc440/pmc440.c
index 0d56064..3713e37 100644
--- a/board/esd/pmc440/pmc440.c
+++ b/board/esd/pmc440/pmc440.c
@@ -574,8 +574,6 @@ void pci_target_init(struct pci_controller *hose)
/* No error reporting */
pci_hose_write_config_word(hose, 0, PCI_ERREN, 0);
- pci_write_config_dword(0, PCI_BRDGOPT2, 0x0101);
-
if (!is_monarch()) {
/* Program the board's subsystem id/classcode */
pci_hose_write_config_word(hose, 0, PCI_SUBSYSTEM_ID,
--
1.6.1
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Re: [U-Boot] [PATCH v2 1/1] pci: move pcidelay code to new location just before PCI bus scan
On 13.10.2011 15:03, Stefan Roese wrote: Tested on PMC440. Works fine. Acked-by: Matthias Fuchs matthias.fu...@esd.eu Thanks. In this case a: Tested-by: ... would be even better. :) Even both if you like :-) Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/3] ppc4xx: use CONFIG_PCI_BOOTDELAY instead of private implementation
From: Matthias Fuchs matthias.fu...@esd.eu
This patch switches PMC440 board code to the CONFIG_PCI_BOOTDELAY option
instead of using a private implemention. This relies on Anatolji's patch
that moves the pcidelay handling behind pci_target_init.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
board/esd/pmc440/pmc440.c | 15 ---
include/configs/PMC440.h |2 ++
2 files changed, 2 insertions(+), 15 deletions(-)
diff --git a/board/esd/pmc440/pmc440.c b/board/esd/pmc440/pmc440.c
index 5236f44..0d56064 100644
--- a/board/esd/pmc440/pmc440.c
+++ b/board/esd/pmc440/pmc440.c
@@ -617,21 +617,6 @@ void pci_master_init(struct pci_controller *hose)
static void wait_for_pci_ready(void)
{
- int i;
- char *s = getenv(pcidelay);
- /*
-* We have our own handling of the pcidelay variable.
-* Using CONFIG_PCI_BOOTDELAY enables pausing for host
-* and adapter devices. For adapter devices we do not
-* want this.
-*/
- if (s) {
- int ms = simple_strtoul(s, NULL, 10);
- printf(PCI: Waiting for %d ms\n, ms);
- for (i=0; ims; i++)
- udelay(1000);
- }
-
if (!(in_be32((void*)GPIO1_IR) GPIO1_PPC_EREADY)) {
printf(PCI: Waiting for EREADY (CTRL-C to skip) ... );
while (1) {
diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h
index bee74aa..ed47a87 100644
--- a/include/configs/PMC440.h
+++ b/include/configs/PMC440.h
@@ -432,6 +432,8 @@
#define CONFIG_SYS_PCI_MASTER_INIT
#define CONFIG_SYS_PCI_BOARD_FIXUP_IRQ
+#define CONFIG_PCI_BOOTDELAY 0
+
/* PCI identification */
#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x12FE /* PCI Vendor ID: esd gmbh
*/
#define CONFIG_SYS_PCI_SUBSYS_ID_NONMONARCH 0x0441 /* PCI Device ID:
Non-Monarch */
--
1.6.1
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Re: [U-Boot] [PATCH 1/1] pci: move pcidelay code to new location just before PCI bus scan
Hi Anatolij,
in general this is a good idea. It also fixes an issue on dual role
boards that can act as pci host and target like the PMC440 and PMC405DE.
When these boards are configured as target, the pcidelay variable
must be ignored or _target_ initialization must be done before the delay.
That's why I put my own pcidelay implementation in our board code.
But I see a problem on boards with more than one PCI bus/PCIe
rootcomplex like some 440 parts. In this case the delay is executed
multiple times.
So it might be a good idea to restrict pci_hose_scan to wait for only
during its initial call and to ignore pcidelay for any further call.
BTW, 4xx_pcie.c also implements an additional delay controlled by the
pciscandelay variable before calling pci_hose_scan() :-) I think this is
obsolete.
Matthias
On 11.10.2011 17:18, Anatolij Gustschin wrote:
PCI cards might need some time after reset to respond. On some
boards (mpc5200 or mpc8260 based) the PCI bus reset is deasserted
at pci_init_board() time, so we currently can not use available
pcidelay option for waiting before PCI bus scan since this
waiting takes place before calling pci_init_board(). By moving
the pcidelay code to the new location using of the pcidelay
option is possible on mpc5200 or mpc8260 based boards, too.
Signed-off-by: Anatolij Gustschin ag...@denx.de
---
drivers/pci/pci.c | 26 +-
1 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 1a0b14c..b65cdd1 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -695,6 +695,19 @@ int pci_hose_scan_bus(struct pci_controller *hose, int
bus)
int pci_hose_scan(struct pci_controller *hose)
{
+#if defined(CONFIG_PCI_BOOTDELAY)
+ char *s;
+ int i;
+
+ /* wait pcidelay ms (if defined)... */
+ s = getenv(pcidelay);
+ if (s) {
+ int val = simple_strtoul(s, NULL, 10);
+ for (i = 0; i val; i++)
+ udelay(1000);
+ }
+#endif /* CONFIG_PCI_BOOTDELAY */
+
/* Start scan at current_busno.
* PCIe will start scan at first_busno+1.
*/
@@ -709,19 +722,6 @@ int pci_hose_scan(struct pci_controller *hose)
void pci_init(void)
{
-#if defined(CONFIG_PCI_BOOTDELAY)
- char *s;
- int i;
-
- /* wait pcidelay ms (if defined)... */
- s = getenv (pcidelay);
- if (s) {
- int val = simple_strtoul (s, NULL, 10);
- for (i=0; ival; i++)
- udelay (1000);
- }
-#endif /* CONFIG_PCI_BOOTDELAY */
-
hose_head = NULL;
/* now call board specific pci_init()... */
--
Dipl.-Ing. Matthias Fuchs
Head of System Design
esd electronic system design gmbh
Vahrenwalder Str. 207 - 30165 Hannover - GERMANY
Phone: +49-511-37298-0 - Fax: +49-511-37298-68
Please visit our homepage http://www.esd.eu
Quality Products - Made in Germany
Besuchen Sie uns auf der Hannover Messe 2011
in Halle 9, Stand D13 vom 04.-08. April 2011 in Hannover!
-
Geschäftsführer: Klaus Detering
Amtsgericht Hannover HRB 51373 - VAT-ID DE 115672832
-
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Re: [U-Boot] [STATUS] AT91: boards still broken on 02.Aug.2011
make: *** [arch/arm/cpu/arm926ejs/at91/libat91.o] Fehler 2 arm-linux-gnueabi-size: './u-boot': No such file Configuring for SBC35_A9G20 board... In file included from /home/reinhard/embedded/u-boot-atmel/include/asm/arch/gpio.h:18:0, from at91sam9260_devices.c:29: /home/reinhard/embedded/u-boot-atmel/include/asm/arch/at91_pio.h:91:19: error: ‘ATMEL_PIO_PORTS’ undeclared here (not in a function) In file included from /home/reinhard/embedded/u-boot-atmel/include/asm/arch/hardware.h:31:0, from /home/reinhard/embedded/u-boot-atmel/include/asm/arch/gpio.h:19, from at91sam9260_devices.c:29: /home/reinhard/embedded/u-boot-atmel/include/asm/arch/at91sam9260.h:27:0: warning: CONFIG_ARM926EJS redefined /home/reinhard/embedded/u-boot-atmel/include/configs/sbc35_a9g20.h:47:0: note: this is the location of the previous definition make[1]: *** [at91sam9260_devices.o] Fehler 1 make: *** [arch/arm/cpu/arm926ejs/at91/libat91.o] Fehler 2 arm-linux-gnueabi-size: './u-boot': No such file Configuring for TNY_A9260 board... In file included from /home/reinhard/embedded/u-boot-atmel/include/asm/arch/gpio.h:18:0, from at91sam9260_devices.c:29: /home/reinhard/embedded/u-boot-atmel/include/asm/arch/at91_pio.h:91:19: error: ‘ATMEL_PIO_PORTS’ undeclared here (not in a function) In file included from /home/reinhard/embedded/u-boot-atmel/include/asm/arch/hardware.h:31:0, from /home/reinhard/embedded/u-boot-atmel/include/asm/arch/gpio.h:19, from at91sam9260_devices.c:29: /home/reinhard/embedded/u-boot-atmel/include/asm/arch/at91sam9260.h:27:0: warning: CONFIG_ARM926EJS redefined /home/reinhard/embedded/u-boot-atmel/include/configs/tny_a9260.h:57:0: note: this is the location of the previous definition make[1]: *** [at91sam9260_devices.o] Fehler 1 make: *** [arch/arm/cpu/arm926ejs/at91/libat91.o] Fehler 2 arm-linux-gnueabi-size: './u-boot': No such file Configuring for TNY_A9G20 board... In file included from /home/reinhard/embedded/u-boot-atmel/include/asm/arch/gpio.h:18:0, from at91sam9260_devices.c:29: /home/reinhard/embedded/u-boot-atmel/include/asm/arch/at91_pio.h:91:19: error: ‘ATMEL_PIO_PORTS’ undeclared here (not in a function) In file included from /home/reinhard/embedded/u-boot-atmel/include/asm/arch/hardware.h:31:0, from /home/reinhard/embedded/u-boot-atmel/include/asm/arch/gpio.h:19, from at91sam9260_devices.c:29: /home/reinhard/embedded/u-boot-atmel/include/asm/arch/at91sam9260.h:27:0: warning: CONFIG_ARM926EJS redefined /home/reinhard/embedded/u-boot-atmel/include/configs/tny_a9260.h:57:0: note: this is the location of the previous definition make[1]: *** [at91sam9260_devices.o] Fehler 1 make: *** [arch/arm/cpu/arm926ejs/at91/libat91.o] Fehler 2 arm-linux-gnueabi-size: './u-boot': No such file Best Regards, Reinhard ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot -- Dipl.-Ing. Matthias Fuchs Head of System Design esd electronic system design gmbh Vahrenwalder Str. 207 - 30165 Hannover - GERMANY Phone: +49-511-37298-0 - Fax: +49-511-37298-68 Please visit our homepage http://www.esd.eu Quality Products - Made in Germany Besuchen Sie uns auf der Hannover Messe 2011 in Halle 9, Stand D13 vom 04.-08. April 2011 in Hannover! - Geschäftsführer: Klaus Detering Amtsgericht Hannover HRB 51373 - VAT-ID DE 115672832 - ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] at91: reworked support for meesc board
The meesc board support was broken. Within this opportunity, I completely
reworked the board files.
Signed-off-by: Daniel Gorsulowski daniel.gorsulow...@esd.eu
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
V3: -fix white space issues and don't patch boards.cfg
V2: -fixed commit description
board/esd/meesc/config.mk |1 -
board/esd/meesc/meesc.c | 49 ++-
include/configs/meesc.h | 208 ++---
3 files changed, 147 insertions(+), 111 deletions(-)
delete mode 100644 board/esd/meesc/config.mk
diff --git a/board/esd/meesc/config.mk b/board/esd/meesc/config.mk
deleted file mode 100644
index 2077692..000
--- a/board/esd/meesc/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x21f0
diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c
index 41fa3e1..ad43531 100644
--- a/board/esd/meesc/meesc.c
+++ b/board/esd/meesc/meesc.c
@@ -3,7 +3,7 @@
* Stelian Pop stelian@leadtechdesign.com
* Lead Tech Design www.leadtechdesign.com
*
- * (C) Copyright 2009-2010
+ * (C) Copyright 2009-2011
* Daniel Gorsulowski daniel.gorsulow...@esd.eu
* esd electronic system design gmbh www.esd.eu
*
@@ -27,7 +27,7 @@
*/
#include common.h
-#include asm/arch/at91sam9263.h
+#include asm/io.h
#include asm/arch/at91sam9_smc.h
#include asm/arch/at91_common.h
#include asm/arch/at91_pmc.h
@@ -35,8 +35,6 @@
#include asm/arch/at91_matrix.h
#include asm/arch/at91_pio.h
#include asm/arch/clk.h
-#include asm/arch/hardware.h
-#include asm/arch/io.h
#include netdev.h
DECLARE_GLOBAL_DATA_PTR;
@@ -67,8 +65,8 @@ int get_hw_rev(void)
static void meesc_nand_hw_init(void)
{
unsigned long csa;
- at91_smc_t *smc= (at91_smc_t *) AT91_SMC0_BASE;
- at91_matrix_t *matrix = (at91_matrix_t *) AT91_MATRIX_BASE;
+ at91_smc_t *smc= (at91_smc_t *) ATMEL_BASE_SMC0;
+ at91_matrix_t *matrix = (at91_matrix_t *) ATMEL_BASE_MATRIX;
/* Enable CS3 */
csa = readl(matrix-csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
@@ -88,7 +86,7 @@ static void meesc_nand_hw_init(void)
writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
AT91_SMC_MODE_EXNW_DISABLE |
AT91_SMC_MODE_DBW_8 |
- AT91_SMC_MODE_TDF_CYCLE(2),
+ AT91_SMC_MODE_TDF_CYCLE(3),
smc-cs[3].mode);
/* Configure RDY/BSY */
@@ -102,9 +100,9 @@ static void meesc_nand_hw_init(void)
#ifdef CONFIG_MACB
static void meesc_macb_hw_init(void)
{
- at91_pmc_t *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+ at91_pmc_t *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
/* Enable clock */
- writel(1 AT91SAM9263_ID_EMAC, pmc-pcer);
+ writel(1 ATMEL_ID_EMAC, pmc-pcer);
at91_macb_hw_init();
}
#endif
@@ -117,7 +115,7 @@ static void meesc_macb_hw_init(void)
*/
static void meesc_ethercat_hw_init(void)
{
- at91_smc_t *smc1 = (at91_smc_t *) AT91_SMC1_BASE;
+ at91_smc_t *smc1 = (at91_smc_t *) ATMEL_BASE_SMC1;
/* Configure SMC EBI1_CS0 for EtherCAT */
writel(AT91_SMC_SETUP_NWE(0) | AT91_SMC_SETUP_NCS_WR(0) |
@@ -142,8 +140,9 @@ static void meesc_ethercat_hw_init(void)
int dram_init(void)
{
- gd-bd-bi_dram[0].start = PHYS_SDRAM;
- gd-bd-bi_dram[0].size = get_ram_size((long *) PHYS_SDRAM, (1 27));
+ gd-ram_size = get_ram_size(
+ (void *)CONFIG_SYS_SDRAM_BASE,
+ CONFIG_SYS_SDRAM_SIZE);
return 0;
}
@@ -151,7 +150,7 @@ int board_eth_init(bd_t *bis)
{
int rc = 0;
#ifdef CONFIG_MACB
- rc = macb_eth_initialize(0, (void *)AT91_EMAC_BASE, 0x00);
+ rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
#endif
return rc;
}
@@ -225,7 +224,7 @@ int misc_init_r(void)
{
char*str;
charbuf[32];
- at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
+ at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
/*
* Normally the processor clock has a divisor of 2.
@@ -246,24 +245,28 @@ int misc_init_r(void)
}
#endif /* CONFIG_MISC_INIT_R */
-int board_init(void)
+int board_early_init_f(void)
{
- at91_pmc_t *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+ at91_pmc_t *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
- /* Peripheral Clock Enable Register */
- writel(1 AT91SAM9263_ID_PIOA |
- 1 AT91SAM9263_ID_PIOB |
- 1 AT91SAM9263_ID_PIOCDE |
- 1 AT91SAM9263_ID_UHP,
+ /* enable all clocks */
+ writel((1 ATMEL_ID_PIOA) | (1 ATMEL_ID_PIOB) |
+ (1 ATMEL_ID_PIOCDE) | (1 ATMEL_ID_UHP),
pmc-pcer);
+ at91_seriald_hw_init();
+
+ return 0;
+}
+
+int board_init(void)
+{
/* initialize ET1100 Controller */
meesc_ethercat_hw_init();
/* adress of boot parameters */
- gd-bd-bi_boot_params = PHYS_SDRAM
Re: [U-Boot] [PATCH 41/52] ARM: remove broken meesc board
Hi Wolfgang, Daniel sent a patch to fix this issue in April http://lists.denx.de/pipermail/u-boot/2011-April/090794.html. Then Reinhard fixed some whitespace issues and applied it to u-boot-atmel/next. But as we noticed just a minute ago, patching failed somehow and most of the changes got lost. I will resent the patch - rebased against top of git in just a minute. Best regards, Matthias On 18.07.2011 00:17, Wolfgang Denk wrote: Signed-off-by: Wolfgang Denk w...@denx.de Cc: Daniel Gorsulowski daniel.gorsulow...@esd.eu --- MAINTAINERS |1 - board/esd/meesc/Makefile| 55 - board/esd/meesc/config.mk |1 - board/esd/meesc/meesc.c | 283 --- board/esd/meesc/partition.c | 37 -- boards.cfg |2 - doc/README.scrapyard|1 + include/configs/meesc.h | 191 - 8 files changed, 1 insertions(+), 570 deletions(-) delete mode 100644 board/esd/meesc/Makefile delete mode 100644 board/esd/meesc/config.mk delete mode 100644 board/esd/meesc/meesc.c delete mode 100644 board/esd/meesc/partition.c delete mode 100644 include/configs/meesc.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
