RE: [PATCH v2] warp7: Convert to OF_UPSTREAM
> Subject: [PATCH v2] warp7: Convert to OF_UPSTREAM > > Instead of using the local imx7s-warp devicetree copies from U-Boot, > convert the imx7s-warp board to OF_UPSTREAM so that the upstream > kernel devicetree can be used instead. > > Signed-off-by: Fabio Estevam Reviewed-by: Peng Fan
RE: [PATCH] imx93-u-boot: Describe the CPU clocks in the devicetree
> Subject: [PATCH] imx93-u-boot: Describe the CPU clocks in the > devicetree > > Currently, there is an error when the i.MX93 CPU frequency is > read: > > Could not read CPU frequency: -2 > CPU: NXP i.MX93(52) Rev1.1 A55 at 0 MHz > > Fix it by describing the A55 clock nodes in the devicetree, like done on > other i.MX SoCs. > > With this change, the CPU frequency error is gone and it can be > correctly > retrieved: > > CPU: NXP i.MX93(52) Rev1.1 A55 at 1700 MHz > CPU: Industrial temperature grade (-40C to 105C) at 35C > > As the upstream imx93.dtsi does not describe the CPU clocks, keep the > clock node in imx93-u-boot.dtsi for now. > > Signed-off-by: Fabio Estevam Reviewed-by: Peng Fan
RE: [PATCH] ARM: dts: imx8mp-beacon-kit-u-boot: Drop EQoS clock work-around
> Subject: [PATCH] ARM: dts: imx8mp-beacon-kit-u-boot: Drop EQoS
> clock work-around
>
> Since commit ecb1c37a7b64 ("clk: imx8mp: Add EQoS MAC clock"),
> the clocks for the DWMAC driver can be configured, and removing
> them breaks operation.
>
> Fixes: ecb1c37a7b64 ("clk: imx8mp: Add EQoS MAC clock")
> Suggested-by: Tim Harvey
> Signed-off-by: Adam Ford
Reviewed-by: Peng Fan
RE: [PATCH] mx9: Correct repeatable build error
> Subject: [PATCH] mx9: Correct repeatable build error > > For some reason every second time imx93_11x11_evk is built it gives > an > error: > >make O=/tmp/x BINMAN_ALLOW_MISSING=1 > > It seems to sometimes skip generation of the .cfgout file and then > eventually Binman complains: > >ValueError: Error 1 running 'mkimage -d ./mkimage.spl.mkimage -n > spl/u-boot-spl.cfgout -T imx8image -e 0x2049A000 > ./mkimage-out.spl.mkimage': Fail open first container file > mx93a1-ahab-container.img > > Correct this by using if_changed instead of if_changed_dep > > The only reason this hasn't come up in CI is that buildman did not retry > failing builds of current source, but now it does. > > Note: The logic in this Makefile should be moved to Binman, e.g. these > warnings duplicate Binman functionality: > > WARNING 'bl31.bin' not found, resulting binary may be not-functional > WARNING 'tee.bin' not found, resulting binary may be not-functional > > Signed-off-by: Simon Glass Reviewed-by: Peng Fan
RE: [PATCH] arm: fsl: imx8mn_bsh_smm_s2: Migrate to OF_UPSTREAM
> Subject: [PATCH] arm: fsl: imx8mn_bsh_smm_s2: Migrate to OF_UPSTREAM > > Migrate imx8mn_bsh_smm_s2 and imx8mn_bsh_smm_s2pro boards to > OF_UPSTREAM. > > Signed-off-by: Patrick Barsanti > Tested-by: Michael Trimarchi LGTM, Reviewed-by: Peng Fan
RE: [PATCH] ARM: imx: mx5: Enable BMODE command on MX53 Menlo board
> Subject: [PATCH] ARM: imx: mx5: Enable BMODE command on MX53 Menlo > board > > The board can do primary/secondary boot switching, enable the bmode > command. > > Signed-off-by: Marek Vasut Reviewed-by: Peng Fan > --- > Cc: "NXP i.MX U-Boot Team" > Cc: Fabio Estevam > Cc: Stefano Babic > Cc: u-boot@lists.denx.de > --- > configs/m53menlo_defconfig | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig > index b06a614dde0..d6b47240c10 100644 > --- a/configs/m53menlo_defconfig > +++ b/configs/m53menlo_defconfig > @@ -22,6 +22,7 @@ CONFIG_SPL=y > CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y > CONFIG_ENV_OFFSET_REDUND=0x18 > CONFIG_SYS_LOAD_ADDR=0x7080 > +CONFIG_CMD_BMODE=y > CONFIG_FIT=y > CONFIG_BOOTDELAY=-2 > CONFIG_OF_BOARD_SETUP=y > -- > 2.43.0
RE: [PATCH] ARM: dts: imx8mm: Enable CPLD_Dn pull down resistor on MX8Menlo
> Subject: [PATCH] ARM: dts: imx8mm: Enable CPLD_Dn pull down resistor on
> MX8Menlo
>
> Enable CPLD_Dn pull down resistor instead of pull up to avoid intefering with
> CPLD power off functionality.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: "NXP i.MX U-Boot Team"
> Cc: Fabio Estevam
> Cc: Francesco Dolcini
> Cc: Marcel Ziswiler
> Cc: Philippe Schenker
> Cc: Martyn Welch
> Cc: Stefano Babic
> Cc: u-boot@lists.denx.de
> ---
> arch/arm/dts/imx8mm-mx8menlo.dts | 22 ++
> 1 file changed, 22 insertions(+)
>
> diff --git a/arch/arm/dts/imx8mm-mx8menlo.dts b/arch/arm/dts/imx8mm-
> mx8menlo.dts
> index 0b123a84018..c226285c6ea 100644
> --- a/arch/arm/dts/imx8mm-mx8menlo.dts
> +++ b/arch/arm/dts/imx8mm-mx8menlo.dts
> @@ -290,6 +290,28 @@
> >;
> };
>
> +_gpio_hog1 {
Should these be in xx-u-boot.dtsi?
Regards,
Peng.
> + fsl,pins = <
> + MX8MM_IOMUXC_SAI1_MCLK_GPIO4_IO20
> 0x1c4 /* SODIMM 88 */
> + MX8MM_IOMUXC_SAI1_RXC_GPIO4_IO1
> 0x1c4 /* CPLD_int */
> + MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2
> 0x1c4 /* CPLD_reset */
> + MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3
> 0x1c4 /* SODIMM 94 */
> + MX8MM_IOMUXC_SAI1_RXD2_GPIO4_IO4
> 0x1c4 /* SODIMM 96 */
> + MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5
> 0x184 /* CPLD_D[7] */
> + MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0
> 0x184 /* CPLD_D[6] */
> + MX8MM_IOMUXC_SAI1_TXC_GPIO4_IO11
> 0x184 /* CPLD_D[5] */
> + MX8MM_IOMUXC_SAI1_TXD0_GPIO4_IO12
> 0x184 /* CPLD_D[4] */
> + MX8MM_IOMUXC_SAI1_TXD1_GPIO4_IO13
> 0x184 /* CPLD_D[3] */
> + MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14
> 0x184 /* CPLD_D[2] */
> + MX8MM_IOMUXC_SAI1_TXD3_GPIO4_IO15
> 0x184 /* CPLD_D[1] */
> + MX8MM_IOMUXC_SAI1_TXD4_GPIO4_IO16
> 0x184 /* CPLD_D[0] */
> + MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27
> 0x1c4 /* KBD_intK */
> + MX8MM_IOMUXC_SAI5_RXD1_GPIO3_IO22
> 0x1c4 /* DISP_reset */
> + MX8MM_IOMUXC_SAI5_RXD2_GPIO3_IO23
> 0x1c4 /* KBD_intI */
> + MX8MM_IOMUXC_SAI5_RXD3_GPIO3_IO24
> 0x1c4
> + >;
> +};
> +
> _usb_otg1_vbus {
> /delete-property/ enable-active-high;
> gpio = < 12 GPIO_ACTIVE_LOW>;
> --
> 2.43.0
RE: [PATCH] ARM: dts: imx8mm: Update iMX8MM Menlo board configuration
> Subject: [PATCH] ARM: dts: imx8mm: Update iMX8MM Menlo board
> configuration
>
> Synchronize Toradex Verdin iMX8MM based MX8Menlo board configuration
> with Toradex Verdin iMX8MM and enable convenience commands like cat,
> hexdump, xxd.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Peng Fan
> ---
> Cc: "NXP i.MX U-Boot Team"
> Cc: Fabio Estevam
> Cc: Francesco Dolcini
> Cc: Marcel Ziswiler
> Cc: Philippe Schenker
> Cc: Martyn Welch
> Cc: Stefano Babic
> Cc: u-boot@lists.denx.de
> ---
> configs/imx8mm-mx8menlo_defconfig | 28 ++--
> 1 file changed, 26 insertions(+), 2 deletions(-)
>
> diff --git a/configs/imx8mm-mx8menlo_defconfig b/configs/imx8mm-
> mx8menlo_defconfig
> index 1ed7f0a2259..2fbd25491f7 100644
> --- a/configs/imx8mm-mx8menlo_defconfig
> +++ b/configs/imx8mm-mx8menlo_defconfig
> @@ -22,15 +22,19 @@ CONFIG_SPL_STACK=0x92 CONFIG_SPL=y
> CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
> CONFIG_ENV_OFFSET_REDUND=0xDE00
> +CONFIG_IMX_BOOTAUX=y
> CONFIG_SYS_LOAD_ADDR=0x4048
> CONFIG_SYS_MEMTEST_START=0x4000
> CONFIG_SYS_MEMTEST_END=0x8000
> CONFIG_FIT=y
> CONFIG_FIT_EXTERNAL_OFFSET=0x3000
> +CONFIG_FIT_VERBOSE=y
> CONFIG_SPL_LOAD_FIT=y
> CONFIG_DISTRO_DEFAULTS=y
> +CONFIG_BOOTDELAY=1
> CONFIG_OF_SYSTEM_SETUP=y
> CONFIG_BOOTCOMMAND="mmc partconf 0 distro_bootpart && load
> ${devtype} ${devnum}:${distro_bootpart} ${loadaddr} boot/fitImage &&
> source ${loadaddr}:bootscr-boot.cmd ; reset"
> +CONFIG_USE_PREBOOT=y
> CONFIG_DEFAULT_FDT_FILE="imx8mm-mx8menlo.dtb"
> CONFIG_SYS_CBSIZE=2048
> CONFIG_SYS_PBSIZE=2081
> @@ -57,19 +61,26 @@ CONFIG_SYS_PROMPT="Verdin iMX8MM # "
> # CONFIG_BOOTM_NETBSD is not set
> CONFIG_CMD_ASKENV=y
> # CONFIG_CMD_EXPORTENV is not set
> -# CONFIG_CMD_CRC32 is not set
> +CONFIG_CRC32_VERIFY=y
> +CONFIG_CMD_MD5SUM=y
> +CONFIG_MD5SUM_VERIFY=y
> CONFIG_CMD_MEMTEST=y
> CONFIG_CMD_CLK=y
> CONFIG_CMD_FUSE=y
> CONFIG_CMD_GPIO=y
> CONFIG_CMD_I2C=y
> CONFIG_CMD_MMC=y
> +CONFIG_CMD_READ=y
> CONFIG_CMD_USB=y
> CONFIG_CMD_USB_SDP=y
> CONFIG_CMD_USB_MASS_STORAGE=y
> +CONFIG_CMD_CAT=y
> +CONFIG_CMD_XXD=y
> CONFIG_CMD_BOOTCOUNT=y
> CONFIG_CMD_CACHE=y
> +CONFIG_CMD_TIME=y
> CONFIG_CMD_UUID=y
> +CONFIG_CMD_PMIC=y
> CONFIG_CMD_REGULATOR=y
> CONFIG_CMD_BTRFS=y
> CONFIG_CMD_EXT4_WRITE=y
> @@ -84,8 +95,9 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> CONFIG_SYS_MMC_ENV_PART=1
> CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
> CONFIG_USE_ETHPRIME=y
> -CONFIG_ETHPRIME="FEC"
> +CONFIG_ETHPRIME="eth0"
> CONFIG_VERSION_VARIABLE=y
> +CONFIG_NET_RANDOM_ETHADDR=y
> CONFIG_IP_DEFRAG=y
> CONFIG_TFTP_BLOCKSIZE=4096
> CONFIG_SPL_DM=y
> @@ -96,16 +108,26 @@ CONFIG_CLK_COMPOSITE_CCF=y
> CONFIG_SPL_CLK_IMX8MM=y CONFIG_CLK_IMX8MM=y
> CONFIG_GPIO_HOG=y
> +CONFIG_SPL_GPIO_HOG=y
> CONFIG_MXC_GPIO=y
> CONFIG_DM_I2C=y
> CONFIG_MISC=y
> CONFIG_I2C_EEPROM=y
> CONFIG_SUPPORT_EMMC_BOOT=y
> +CONFIG_MMC_IO_VOLTAGE=y
> +CONFIG_SPL_MMC_IO_VOLTAGE=y
> +CONFIG_MMC_UHS_SUPPORT=y
> +CONFIG_SPL_MMC_UHS_SUPPORT=y
> +CONFIG_MMC_HS400_ES_SUPPORT=y
> +CONFIG_MMC_HS400_SUPPORT=y
> +CONFIG_SPL_MMC_HS400_SUPPORT=y
> CONFIG_FSL_USDHC=y
> CONFIG_PHYLIB=y
> CONFIG_PHY_ADDR_ENABLE=y
> CONFIG_PHY_MICREL=y
> CONFIG_PHY_MICREL_KSZ90X1=y
> +CONFIG_PHY_FIXED=y
> +CONFIG_DM_MDIO=y
> CONFIG_FEC_MXC=y
> CONFIG_MII=y
> CONFIG_SPL_PHY=y
> @@ -128,6 +150,7 @@ CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_PSCI=y
> CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_THERMAL=y
> +CONFIG_IMX_TMU=y
> CONFIG_USB=y
> CONFIG_SPL_USB_HOST=y
> CONFIG_USB_EHCI_HCD=y
> @@ -143,3 +166,4 @@ CONFIG_SDP_LOADADDR=0x4040
> CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_SPL_USB_SDP_SUPPORT=y
> CONFIG_IMX_WATCHDOG=y
> +CONFIG_HEXDUMP=y
> --
> 2.43.0
RE: [PATCH 061/149] board: freescale: Remove and add needed includes
> Subject: [PATCH 061/149] board: freescale: Remove and add > needed includes > > Remove from this board vendor directory and when needed > add missing include files directly. > > Signed-off-by: Tom Rini Acked-by: Peng Fan > --- > Cc: Stefano Babic > Cc: Fabio Estevam > Cc: "NXP i.MX U-Boot Team" > Cc: Peng Fan > Cc: Giulio Benetti > Cc: Jesse Taube > Cc: Pramod Kumar > Cc: Alison Wang > Cc: Tang Yuantian > Cc: Mingkai Hu > Cc: Ashish Kumar > Cc: Priyanka Jain > Cc: Wasim Khan > Cc: Meenakshi Aggarwal > Cc: Angelo Dureghello > Cc: TsiChung Liew > Cc: Sinan Akman > Cc: Otavio Salvador > Cc: Jason Liu > Cc: Eric Nelson > Cc: Adrian Alonso > Cc: Qiang Zhao > Cc: Shengzhou Liu > --- > arch/arm/include/asm/arch-imx8m/ddr.h | 2 +- > arch/arm/include/asm/mach-imx/gpio.h | 2 ++ > board/freescale/common/cadmus.c | 3 ++- > board/freescale/common/cds_pci_ft.c | 1 - > board/freescale/common/cds_via.c | 1 - > board/freescale/common/cmd_esbc_validate.c| 2 +- > board/freescale/common/emc2305.c | 1 - > board/freescale/common/fman.c | 1 - > board/freescale/common/fsl_chain_of_trust.c | 2 +- > board/freescale/common/fsl_validate.c | 2 +- > board/freescale/common/i2c_common.c | 2 +- > board/freescale/common/i2c_mux.c | 3 ++- > board/freescale/common/ics307_clk.c | 2 +- > board/freescale/common/ls102xa_stream_id.c| 2 +- > board/freescale/common/mc34vr500.c| 1 - > board/freescale/common/mmc.c | 2 +- > board/freescale/common/ngpixis.c | 1 - > board/freescale/common/ns_access.c| 2 +- > board/freescale/common/p_corenet/law.c| 2 +- > board/freescale/common/p_corenet/tlb.c| 3 ++- > board/freescale/common/pfuze.c| 1 - > board/freescale/common/qixis.c| 2 +- > board/freescale/common/sdhc_boot.c| 1 - > board/freescale/common/sys_eeprom.c | 1 - > board/freescale/common/vid.c | 3 ++- > board/freescale/imx8mm_evk/imx8mm_evk.c | 1 - > board/freescale/imx8mm_evk/spl.c | 1 - > board/freescale/imx8mn_evk/imx8mn_evk.c | 1 - > board/freescale/imx8mn_evk/spl.c | 1 - > board/freescale/imx8mp_evk/spl.c | 1 - > board/freescale/imx8mq_evk/imx8mq_evk.c | 1 - > board/freescale/imx8mq_evk/lpddr4_timing.c| 1 - > board/freescale/imx8mq_evk/lpddr4_timing_b0.c | 1 - > board/freescale/imx8mq_evk/spl.c | 2 +- > board/freescale/imx8qm_mek/imx8qm_mek.c | 1 - > board/freescale/imx8qm_mek/spl.c | 1 - > board/freescale/imx8qxp_mek/imx8qxp_mek.c | 1 - > board/freescale/imx8qxp_mek/spl.c | 1 - > board/freescale/imx8ulp_evk/imx8ulp_evk.c | 1 - > board/freescale/imx8ulp_evk/spl.c | 1 - > board/freescale/imx93_evk/imx93_evk.c | 1 - > board/freescale/imx93_evk/spl.c | 1 - > board/freescale/imxrt1020-evk/imxrt1020-evk.c | 1 - > board/freescale/imxrt1050-evk/imxrt1050-evk.c | 1 - > board/freescale/imxrt1170-evk/imxrt1170-evk.c | 1 - > board/freescale/ls1012afrdm/eth.c | 1 - > board/freescale/ls1012afrdm/ls1012afrdm.c | 2 +- > board/freescale/ls1012aqds/eth.c | 2 +- > board/freescale/ls1012aqds/ls1012aqds.c | 2 +- > board/freescale/ls1012ardb/eth.c | 2 +- > board/freescale/ls1012ardb/ls1012ardb.c | 2 +- > board/freescale/ls1021aiot/ls1021aiot.c | 2 +- > board/freescale/ls1021aqds/ddr.c | 2 +- > board/freescale/ls1028a/ddr.c | 1 - > board/freescale/ls1028a/ls1028a.c | 2 +- > board/freescale/ls1043aqds/ddr.c | 1 - > board/freescale/ls1043aqds/eth.c | 2 +- > board/freescale/ls1043aqds/ls1043aqds.c | 2 +- > board/freescale/ls1043ardb/cpld.c | 2 +- > board/freescale/ls1043ardb/ddr.c | 1 - > board/freescale/ls1043ardb/eth.c | 2 +- > board/freescale/ls1046afrwy/ddr.c | 1 - > board/freescale/ls1046afrwy/eth.c | 2 +- > board/freescale/ls1046afrwy/ls1046afrwy.c | 2 +- > board/freescale/ls1046aqds/ddr.c | 1 - > board/freescale/ls1046aqds/eth.c | 2 +- > board/freescale/ls104
RE: [PATCH 23/33] arm: imx: Remove and add needed includes
> Subject: [PATCH 23/33] arm: imx: Remove and add needed > includes > > Remove from all mach-imx, CPU specific sub-directories and > include/asm/arch-mx* files and when needed add missing include files > directly. > > Signed-off-by: Tom Rini Acked-by: Peng Fan > --- > Cc: Stefano Babic > Cc: Fabio Estevam > Cc: "NXP i.MX U-Boot Team" > --- > arch/arm/cpu/arm1136/mx31/devices.c | 1 - > arch/arm/cpu/arm1136/mx31/generic.c | 1 - > arch/arm/cpu/arm1136/mx31/timer.c | 1 - > arch/arm/cpu/arm926ejs/mxs/clock.c | 1 - > arch/arm/cpu/arm926ejs/mxs/iomux.c | 1 - > arch/arm/cpu/arm926ejs/mxs/mxs.c| 1 - > arch/arm/cpu/arm926ejs/mxs/spl_boot.c | 1 - > arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c | 1 - > arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 1 - > arch/arm/cpu/arm926ejs/mxs/spl_power_init.c | 1 - > arch/arm/cpu/arm926ejs/mxs/start.S | 1 - > arch/arm/cpu/arm926ejs/mxs/timer.c | 1 - > arch/arm/include/asm/arch-mx5/clock.h | 2 ++ > arch/arm/include/asm/arch-mx7/sys_proto.h | 2 ++ > arch/arm/mach-imx/cache.c | 2 +- > arch/arm/mach-imx/cmd_bmode.c | 1 - > arch/arm/mach-imx/cmd_dek.c | 3 ++- > arch/arm/mach-imx/cmd_hdmidet.c | 1 - > arch/arm/mach-imx/cmd_mfgprot.c | 2 +- > arch/arm/mach-imx/cmd_nandbcb.c | 1 - > arch/arm/mach-imx/cpu.c | 1 - > arch/arm/mach-imx/ddrmc-vf610-calibration.c | 1 - > arch/arm/mach-imx/ddrmc-vf610.c | 1 - > arch/arm/mach-imx/ele_ahab.c| 2 +- > arch/arm/mach-imx/hab.c | 1 - > arch/arm/mach-imx/i2c-mxv7.c| 2 +- > arch/arm/mach-imx/image-container.c | 2 +- > arch/arm/mach-imx/imx8/ahab.c | 1 - > arch/arm/mach-imx/imx8/clock.c | 1 - > arch/arm/mach-imx/imx8/cpu.c| 1 - > arch/arm/mach-imx/imx8/fdt.c| 1 - > arch/arm/mach-imx/imx8/iomux.c | 1 - > arch/arm/mach-imx/imx8/misc.c | 1 - > arch/arm/mach-imx/imx8/snvs_security_sc.c | 1 - > arch/arm/mach-imx/imx8m/clock_imx8mm.c | 1 - > arch/arm/mach-imx/imx8m/clock_imx8mq.c | 1 - > arch/arm/mach-imx/imx8m/clock_slice.c | 1 - > arch/arm/mach-imx/imx8m/psci.c | 1 - > arch/arm/mach-imx/imx8m/soc.c | 2 +- > arch/arm/mach-imx/imx8ulp/cgc.c | 1 - > arch/arm/mach-imx/imx8ulp/clock.c | 1 - > arch/arm/mach-imx/imx8ulp/iomux.c | 1 - > arch/arm/mach-imx/imx8ulp/pcc.c | 1 - > arch/arm/mach-imx/imx8ulp/rdc.c | 3 ++- > arch/arm/mach-imx/imx9/clock.c | 1 - > arch/arm/mach-imx/imx9/clock_root.c | 2 +- > arch/arm/mach-imx/imx9/imx_bootaux.c| 3 ++- > arch/arm/mach-imx/imx9/soc.c| 2 +- > arch/arm/mach-imx/imx9/trdc.c | 2 +- > arch/arm/mach-imx/imx_bootaux.c | 5 - > arch/arm/mach-imx/imxrt/soc.c | 1 - > arch/arm/mach-imx/iomux-v3.c| 1 - > arch/arm/mach-imx/mac.c | 1 - > arch/arm/mach-imx/misc.c| 1 - > arch/arm/mach-imx/mmc_env.c | 1 - > arch/arm/mach-imx/mmdc_size.c | 2 +- > arch/arm/mach-imx/mx5/clock.c | 1 - > arch/arm/mach-imx/mx5/mx53_dram.c | 2 +- > arch/arm/mach-imx/mx5/soc.c | 1 - > arch/arm/mach-imx/mx6/clock.c | 2 +- > arch/arm/mach-imx/mx6/ddr.c | 1 - > arch/arm/mach-imx/mx6/litesom.c | 2 +- > arch/arm/mach-imx/mx6/module_fuse.c | 1 - > arch/arm/mach-imx/mx6/mp.c | 1 - > arch/arm/mach-imx/mx6/opos6ul.c | 2 +- > arch/arm/mach-imx/mx6/soc.c | 1 - > arch/arm/mach-imx/mx7/clock.c | 3 ++- > arch/arm/mach-imx/mx7/clock_slice.c | 1 - > arch/arm/mach-imx/mx7/ddr.c | 1 - > arch/arm/mach-imx/mx7/psci-mx7.c| 1 - > arch/arm/mach-imx/mx7/soc.c | 1 - > arch/arm/mach-imx/mx7ulp/clock.c| 2 +- > arch/arm/mach-imx/mx7ulp/iomux.c| 1 - > arch/arm/mach-imx/mx7ulp/pcc.c | 1 - > arch/arm/mach-imx/mx7ulp/scg.c | 2 +- > arch/arm/mach-imx/mx7ulp/soc.c | 2 +- > arch/arm/mach-imx/priblob.c | 1 - > arch/arm/mach-imx/rdc-sema.c| 1 - > arch/arm/mach-imx/speed.c | 2 +- > arch/arm/mach-imx/spl.c | 2 +- > arch/arm/mach-imx/spl_imx_romapi.c | 1 - > arch/arm/mach-imx/sy
RE: [PATCH 32/33] arm: fsl-layerscape: Remove and add needed includes
> Subject: [PATCH 32/33] arm: fsl-layerscape: Remove and add > needed includes > > Remove from all fsl-layerscape related files and when needed > add missing include files directly. > > Signed-off-by: Tom Rini Acked-by: Peng Fan > --- > Cc: Peng Fan > --- > arch/arm/cpu/armv7/ls102xa/clock.c | 2 +- > arch/arm/cpu/armv7/ls102xa/cpu.c | 1 - > arch/arm/cpu/armv7/ls102xa/fdt.c | 2 +- > arch/arm/cpu/armv7/ls102xa/fsl_epu.c | 1 - > arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c| 2 +- > arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c| 2 +- > arch/arm/cpu/armv7/ls102xa/soc.c | 2 +- > arch/arm/cpu/armv7/ls102xa/spl.c | 1 - > arch/arm/cpu/armv7/ls102xa/timer.c | 1 - > arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 2 +- > arch/arm/cpu/armv8/fsl-layerscape/fdt.c| 2 +- > arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c | 3 ++- > arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c| 2 +- > arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c | 2 +- > arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c| 2 +- > arch/arm/cpu/armv8/fsl-layerscape/icid.c | 2 +- > arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c | 2 +- > arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c | 2 +- > arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c | 3 ++- > arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c | 3 ++- > arch/arm/cpu/armv8/fsl-layerscape/ls1043a_serdes.c | 2 +- > arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 3 ++- > arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c | 2 +- > arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c | 3 ++- > arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c | 2 +- > arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c | 2 +- > arch/arm/cpu/armv8/fsl-layerscape/ls2088_ids.c | 3 ++- > arch/arm/cpu/armv8/fsl-layerscape/lx2160_ids.c | 3 ++- > arch/arm/cpu/armv8/fsl-layerscape/lx2160a_serdes.c | 2 +- > arch/arm/cpu/armv8/fsl-layerscape/mp.c | 2 +- > arch/arm/cpu/armv8/fsl-layerscape/soc.c| 2 +- > arch/arm/cpu/armv8/fsl-layerscape/spl.c| 2 +- > arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h | 2 ++ > arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 1 + > arch/arm/include/asm/arch-ls102xa/fsl_serdes.h | 2 ++ > 35 files changed, 40 insertions(+), 32 deletions(-) > > diff --git a/arch/arm/cpu/armv7/ls102xa/clock.c > b/arch/arm/cpu/armv7/ls102xa/clock.c > index 4e1fe281201f..e885a85ce65c 100644 > --- a/arch/arm/cpu/armv7/ls102xa/clock.c > +++ b/arch/arm/cpu/armv7/ls102xa/clock.c > @@ -3,7 +3,7 @@ > * Copyright 2014 Freescale Semiconductor, Inc. > */ > > -#include > +#include > #include > #include > #include > diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c > b/arch/arm/cpu/armv7/ls102xa/cpu.c > index c455969609f6..74a2dcbc116a 100644 > --- a/arch/arm/cpu/armv7/ls102xa/cpu.c > +++ b/arch/arm/cpu/armv7/ls102xa/cpu.c > @@ -4,7 +4,6 @@ > * Copyright 2021 NXP > */ > > -#include > #include > #include > #include > diff --git a/arch/arm/cpu/armv7/ls102xa/fdt.c > b/arch/arm/cpu/armv7/ls102xa/fdt.c > index 1c3d24bcad94..34eea22eb923 100644 > --- a/arch/arm/cpu/armv7/ls102xa/fdt.c > +++ b/arch/arm/cpu/armv7/ls102xa/fdt.c > @@ -3,7 +3,7 @@ > * Copyright 2014 Freescale Semiconductor, Inc. > */ > > -#include > +#include > #include > #include > #include > diff --git a/arch/arm/cpu/armv7/ls102xa/fsl_epu.c > b/arch/arm/cpu/armv7/ls102xa/fsl_epu.c > index e31a4fb6c31b..664eae532d5f 100644 > --- a/arch/arm/cpu/armv7/ls102xa/fsl_epu.c > +++ b/arch/arm/cpu/armv7/ls102xa/fsl_epu.c > @@ -3,7 +3,6 @@ > * Copyright 2014 Freescale Semiconductor, Inc. > */ > > -#include > #include > > #include "fsl_epu.h" > diff --git a/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c > b/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c > index f74d819ea1ea..c1eadb34523f 100644 > --- a/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c > +++ b/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c > @@ -3,7 +3,7 @@ > * Copyright 2014 Freescale Semiconductor, Inc. > */ > > -#include > +#include > #include > #include > #include > diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c > b/arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c > index 8c030be8b36f..3032e266c5d4 100644 > --- a/arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c > +++ b/arch/arm/cpu/armv7/ls102xa/ls10
[PATCH 2/2] imx: imx93-11x11-evk: convert to OF_UPSTREAM
From: Peng Fan
Convert to OF_UPSTREAM for i.MX93 11x11 EVK.
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile| 1 -
arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 118 +
arch/arm/dts/imx93-11x11-evk.dts | 322 ---
arch/arm/dts/imx93-u-boot.dtsi | 15 ++
arch/arm/mach-imx/imx9/Kconfig | 1 +
configs/imx93_11x11_evk_defconfig| 2 +-
configs/imx93_11x11_evk_ld_defconfig | 2 +-
7 files changed, 136 insertions(+), 325 deletions(-)
delete mode 100644 arch/arm/dts/imx93-11x11-evk.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index dad869726dc..5c32daaebfe 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1041,7 +1041,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-librem5-r4.dtb
dtb-$(CONFIG_ARCH_IMX9) += \
- imx93-11x11-evk.dtb \
imx93-var-som-symphony.dtb \
imx93-phyboard-segin.dtb
diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
index a99ba99bfb4..408e601bc90 100644
--- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
@@ -26,6 +26,111 @@
bootph-pre-ram;
};
+ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <40>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_lpi2c2>;
+ pinctrl-1 = <_lpi2c2>;
+ status = "okay";
+
+ pmic@25 {
+ compatible = "nxp,pca9451a";
+ reg = <0x25>;
+ interrupt-parent = <>;
+ interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+
+ regulators {
+ buck1: BUCK1 {
+ regulator-name = "BUCK1";
+ regulator-min-microvolt = <65>;
+ regulator-max-microvolt = <2237500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck2: BUCK2 {
+ regulator-name = "BUCK2";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <2187500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck4: BUCK4{
+ regulator-name = "BUCK4";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck5: BUCK5{
+ regulator-name = "BUCK5";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck6: BUCK6 {
+ regulator-name = "BUCK6";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1: LDO1 {
+ regulator-name = "LDO1";
+ regulator-min-microvolt = <160>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo4: LDO4 {
+ regulator-name = "LDO4";
+ regulator-min-microvolt = <80>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo5: LDO5 {
+ regulator-name = "LDO5";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+
[PATCH 1/2] dt-bindings: imx93: sync clock header
From: Peng Fan Sync clock header with kernel 6.8 Signed-off-by: Peng Fan --- include/dt-bindings/clock/imx93-clock.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/dt-bindings/clock/imx93-clock.h b/include/dt-bindings/clock/imx93-clock.h index 35a1f62053a..787c9e74dc9 100644 --- a/include/dt-bindings/clock/imx93-clock.h +++ b/include/dt-bindings/clock/imx93-clock.h @@ -203,6 +203,7 @@ #define IMX93_CLK_ARM_PLL 198 #define IMX93_CLK_A55_SEL 199 #define IMX93_CLK_A55_CORE 200 -#define IMX93_CLK_END 201 +#define IMX93_CLK_PDM_IPG 201 +#define IMX93_CLK_END 202 #endif -- 2.35.3
[PATCH 0/2] imx93-11x11-evk: Convert to OF_UPSTREAM
From: Peng Fan patch 1 is to avoid build break when using upstream dts Patch 2 is moving to OF_UPSTREAM This is a resend of V3 imx93: Conver to OF_UPSTREAM patch 5,6 Peng Fan (2): dt-bindings: imx93: sync clock header imx: imx93-11x11-evk: convert to OF_UPSTREAM arch/arm/dts/Makefile| 1 - arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 118 + arch/arm/dts/imx93-11x11-evk.dts | 322 --- arch/arm/dts/imx93-u-boot.dtsi | 15 ++ arch/arm/mach-imx/imx9/Kconfig | 1 + configs/imx93_11x11_evk_defconfig| 2 +- configs/imx93_11x11_evk_ld_defconfig | 2 +- include/dt-bindings/clock/imx93-clock.h | 3 +- 8 files changed, 138 insertions(+), 326 deletions(-) delete mode 100644 arch/arm/dts/imx93-11x11-evk.dts -- 2.35.3
[GIT PULL] please pull fsl-qoriq-2024-4-24
Hi Tom, Please pull fsl-qoriq-2024-4-24 --- move to OF_UPSTREAM for sl28 --- CI: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/20501 Thanks, Peng. The following changes since commit 38ea74d6d5c05224acdb03f799897c1bdd56f8cc: Prepare v2024.07-rc1 (2024-04-22 15:10:21 -0600) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq.git tags/fsl-qoriq-2024-4-24 for you to fetch changes up to 61ff13283c3b3858989c038a5dc57b1370e5d8ce: board: sl28: move to OF_UPSTREAM (2024-04-24 00:22:09 +0800) Michael Walle (1): board: sl28: move to OF_UPSTREAM arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts | 59 arch/arm/dts/fsl-ls1028a-kontron-sl28-var2.dts | 65 - arch/arm/dts/fsl-ls1028a-kontron-sl28-var3.dts | 15 --- arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts | 47 - arch/arm/dts/fsl-ls1028a-kontron-sl28.dts | 308 --- board/kontron/sl28/spl.c | 11 +-- configs/kontron_sl28_defconfig | 5 +- 7 files changed, 8 insertions(+), 502 deletions(-) delete mode 100644 arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts delete mode 100644 arch/arm/dts/fsl-ls1028a-kontron-sl28-var2.dts delete mode 100644 arch/arm/dts/fsl-ls1028a-kontron-sl28-var3.dts delete mode 100644 arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts delete mode 100644 arch/arm/dts/fsl-ls1028a-kontron-sl28.dts
Re: [PATCH] board: sl28: move to OF_UPSTREAM
On Mon, Apr 15, 2024 at 10:14:56AM +0200, Michael Walle wrote: >On Wed Mar 6, 2024 at 5:19 PM CET, Michael Walle wrote: >> Use the new device devicetree files in dts/upstream/ and delete the old >> ones. Still keep the -u-boot.dtsi with all u-boot specifics around. >> >> There is one catch and that is fsl-ls1028a-kontron-sl28-var3.dts which >> is not available upstream (yet!). For now, the base dts is used for this >> variant as this only differ in the compatible and the (human readable) >> model name. >> >> Signed-off-by: Michael Walle > >Ping. Any news here? Applied. Thanks, Peng. > >-michael --
RE: [PATCH v1] arm: dts: verdin-imx8mm/imx8mp: use gpio-hog for sleep moci
> Subject: [PATCH v1] arm: dts: verdin-imx8mm/imx8mp: use gpio-hog for
> sleep moci
>
> From: Stefan Eichenberger
>
> In Linux, we allow sleep moci to be turned off when the carrier board
> supports it and the system is in suspend. In U-Boot, however, we want the
> sleep moci to be always on. So we use a gpio hog and disable the regulator.
> This change is necessary because we switched to upstream device tree files
> with commit 23fe2def1edf
> ("verdin-imx8mm/verdin-imx8mp: move imx verdins to OF_UPSTREAM"). A
> recent upstream patch removes the gpio hog from the Linux device tree, so
> we need to add it to the u-boot dtsi. The following patch will remove the gpio
> hog from the Linux device tree:
> https://lore.ke/
> rnel.org%2Flinux-devicetree%2F20240405160720.5977-1-
> eichest%40gmail.com%2F=05%7C02%7Cpeng.fan%40nxp.com%7C0ec7
> 6e3870ef48ab53fd08dc5ebb433c%7C686ea1d3bc2b4c6fa92cd99c5c301635
> %7C0%7C0%7C638489405607145323%7CUnknown%7CTWFpbGZsb3d8eyJ
> WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%
> 7C0%7C%7C%7C=jSxtB3eu0uvBO0UPV8TY16yrEgCdTqgj6fwrwmG%2F
> v7s%3D=0
> The U-Boot patch can be applied without it and will not break the build.
>
> Signed-off-by: Stefan Eichenberger
Reviewed-by: Peng Fan
> ---
> arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi | 5 +
> arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi | 4
> 2 files changed, 9 insertions(+)
>
> diff --git a/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi
> b/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi
> index 38db56059d..8b397f535c 100644
> --- a/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi
> @@ -60,6 +60,11 @@
>
> ctrl-sleep-moci-hog {
> bootph-pre-ram;
> + gpio-hog;
> + output-high;
> + gpios = <1 GPIO_ACTIVE_HIGH>;
> + line-name = "CTRL_SLEEP_MOCI#";
> +
> };
> };
>
> diff --git a/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi
> b/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi
> index 03f211d5f7..7b45a87450 100644
> --- a/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi
> @@ -58,6 +58,10 @@
>
> ctrl-sleep-moci-hog {
> bootph-pre-ram;
> + gpio-hog;
> + output-high;
> + gpios = <29 GPIO_ACTIVE_HIGH>;
> + line-name = "CTRL_SLEEP_MOCI#";
> };
> };
>
> --
> 2.40.1
RE: [PATCH v6 0/5] imx93: Conver to OF_UPSTREAM
> Subject: Re: [PATCH v6 0/5] imx93: Conver to OF_UPSTREAM > > Hi Peng, > > On Fri, Apr 12, 2024 at 10:40 AM Fabio Estevam > wrote: > > > > On Fri, Apr 12, 2024 at 10:24 AM Peng Fan (OSS) > wrote: > > > > > > A few nodes were added to soc and board u-boot.dtsi(lpi2c, usbotg), > > > those nodes could be dropped after upstream linux supports them. > > > > > > To support OF_UPSTREAM, a few driver changes are included. > > > For TMU, still use U-Boot node, I will prepare a kernel update, then > > > back to U-Boot support. > > > > > > Mathieu: please help test the boards you maintain when you have time. > > > > The series looks good. > > > > I will apply it after Mathieu or the Phytec folks confirm this series > > does not break imx93-phyboard-segin. > > I applied patches 1 to 4, thanks. > > I dropped the last OF_UPSTREAM patch as it is causing boot issues on > Mathieu's tests. ok. Do I need to switch back to only convert i.MX93 11x11 EVK to OF_UPSTREM? Thanks, Peng.
RE: [PATCH v6 5/5] imx93: convert to OF_UPSTREAM
> Subject: Re: [PATCH v6 5/5] imx93: convert to OF_UPSTREAM > > > Hello, > > I was able to test this series on the imx93-phyboard-segin. Up to that > specific > commit no issue to report. > > That specific commit however, using an updated dts subtree at 2639a0e2fd, > fails to boot. > > There is no more garbage on the UART, but the boot stops after BL31 is > started: > > U-Boot SPL 2024.04-rc5-00388-gf81e4e85fd6-dirty (Apr 14 2024 - 12:15:51 > +0200) > SOC: 0xa0009300 > LC: 0x40040 > M33 prepare ok > Normal Boot > WDT: Started wdog@4249 with servicing every 1000ms (40s timeout) > Trying to boot from BOOTROM > Boot Stage: Primary boot > image offset 0x8000, pagesize 0x200, ivt offset 0x0 Load image from 0x45c00 > by ROM_API > NOTICE: BL31: v2.8(release):lf-6.1.36-2.1.0-0-g1a3beeab6-dirty > NOTICE: BL31: Built : 11:39:38, Aug 7 2023 > > Not sure where that could come from. Which dts upstream tag are u using? Do you have time to debug the issue? I not have the board, so not sure what happens here. Regards, Peng. > > Mathieu
[PATCH v6 5/5] imx93: convert to OF_UPSTREAM
From: Peng Fan
Convert all i.MX93 boards to OF_UPSTREAM.
Add lpi2c2 nodes for imx93-11x11-evk-u-boot.dtsi.
Add usbotg1 nodes in imx93-u-boot.dtsi and board u-boot.dtsi.
The nodes could be removed after upstream linux supports them.
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile | 5 -
arch/arm/dts/imx93-11x11-evk-u-boot.dtsi| 119
arch/arm/dts/imx93-11x11-evk.dts| 322 -
arch/arm/dts/imx93-phyboard-segin.dts | 117 ---
arch/arm/dts/imx93-phycore-som.dtsi | 126
arch/arm/dts/imx93-pinfunc.h| 623
arch/arm/dts/imx93-u-boot.dtsi | 80 +++
arch/arm/dts/imx93-var-som-symphony-u-boot.dtsi | 22 +
arch/arm/dts/imx93-var-som-symphony.dts | 323 -
arch/arm/dts/imx93-var-som.dtsi | 111 ---
arch/arm/dts/imx93.dtsi | 906
arch/arm/mach-imx/imx9/Kconfig | 1 +
configs/imx93-phyboard-segin_defconfig | 2 +-
configs/imx93_11x11_evk_defconfig | 2 +-
configs/imx93_11x11_evk_ld_defconfig| 2 +-
configs/imx93_var_som_defconfig | 2 +-
include/dt-bindings/clock/imx93-clock.h | 208 --
include/dt-bindings/power/fsl,imx93-power.h | 15 -
18 files changed, 226 insertions(+), 2760 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 2634bb4c9ac..0b6a92e36e9 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1046,11 +1046,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-kontron-pitx-imx8m.dtb \
imx8mq-librem5-r4.dtb
-dtb-$(CONFIG_ARCH_IMX9) += \
- imx93-11x11-evk.dtb \
- imx93-var-som-symphony.dtb \
- imx93-phyboard-segin.dtb
-
dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb \
imxrt1020-evk.dtb \
imxrt1170-evk.dtb \
diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
index a99ba99bfb4..4a834ded44c 100644
--- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
@@ -26,6 +26,112 @@
bootph-pre-ram;
};
+/* The node should be removed after upstream supports it */
+ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <40>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_lpi2c2>;
+ pinctrl-1 = <_lpi2c2>;
+ status = "okay";
+
+ pmic@25 {
+ compatible = "nxp,pca9451a";
+ reg = <0x25>;
+ interrupt-parent = <>;
+ interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+
+ regulators {
+ buck1: BUCK1 {
+ regulator-name = "BUCK1";
+ regulator-min-microvolt = <65>;
+ regulator-max-microvolt = <2237500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck2: BUCK2 {
+ regulator-name = "BUCK2";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <2187500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck4: BUCK4{
+ regulator-name = "BUCK4";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck5: BUCK5{
+ regulator-name = "BUCK5";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck6: BUCK6 {
+ regulator-name = "BUCK6";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1: LDO1 {
+
[PATCH v6 4/5] clk: imx93: fix anatop base
From: Peng Fan
The PLL clk needs use anatop base, otherwise wrong PLL address will
be used.
Fixes: 9c153e46661b ("clk: imx: add i.MX93 CCF driver")
Signed-off-by: Peng Fan
---
drivers/clk/imx/clk-imx93.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
index ce10d795316..f0cb797d975 100644
--- a/drivers/clk/imx/clk-imx93.c
+++ b/drivers/clk/imx/clk-imx93.c
@@ -289,7 +289,7 @@ static int imx93_clk_probe(struct udevice *dev)
clk_dm(IMX93_CLK_SYS_PLL_PFD2_DIV2,
imx_clk_fixed_factor("sys_pll_pfd2_div2", "sys_pll_pfd2", 1, 2));
- base = (void *)ANATOP_BASE_ADDR;
+ anatop_base = (void *)ANATOP_BASE_ADDR;
clk_dm(IMX93_CLK_ARM_PLL,
imx_clk_fracn_gppll_integer("arm_pll", "clock-osc-24m",
--
2.35.3
[PATCH v6 3/5] cpu: drop imx9_cpu
From: Peng Fan
This was wrongly committed, no user, remove it.
Signed-off-by: Peng Fan
---
drivers/cpu/imx9_cpu.c | 224 -
1 file changed, 224 deletions(-)
diff --git a/drivers/cpu/imx9_cpu.c b/drivers/cpu/imx9_cpu.c
deleted file mode 100644
index 66534fe6d17..000
--- a/drivers/cpu/imx9_cpu.c
+++ /dev/null
@@ -1,224 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2019 NXP
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct cpu_imx_plat {
- const char *name;
- const char *rev;
- const char *type;
- u32 cpu_rsrc;
- u32 cpurev;
- u32 freq_mhz;
- u32 mpidr;
-};
-
-const char *get_imx9_type(u32 imxtype)
-{
- switch (imxtype) {
- case MXC_CPU_IMX93:
- return "93";
- default:
- return "??";
- }
-}
-
-const char *get_imx9_rev(u32 rev)
-{
- switch (rev) {
- case CHIP_REV_1_0:
- return "1.";
- case CHIP_REV_B:
- return "B";
- case CHIP_REV_C:
- return "C";
- default:
- return "?";
- }
-}
-
-static void set_core_data(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (device_is_compatible(dev, "arm,cortex-a35"))
- plat->name = "A35";
- else
- plat->name = "?";
-}
-
-#if IS_ENABLED(CONFIG_IMX_SCU_THERMAL)
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- struct udevice *thermal_dev;
- int cpu_tmp, ret;
- int idx = 1; /* use "cpu-thermal0" device */
-
- if (plat->cpu_rsrc == SC_R_A72)
- idx = 2; /* use "cpu-thermal1" device */
-
- ret = uclass_get_device(UCLASS_THERMAL, idx, _dev);
- if (!ret) {
- ret = thermal_get_temp(thermal_dev, _tmp);
- if (ret)
- return 0xdeadbeef;
- } else {
- return 0xdeadbeef;
- }
-
- return cpu_tmp;
-}
-#else
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- return 0;
-}
-#endif
-
-int cpu_imx_get_desc(const struct udevice *dev, char *buf, int size)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
- int ret, temp;
-
- if (size < 100)
- return -ENOSPC;
-
- ret = snprintf(buf, size, "NXP i.MX8%s Rev%s %s at %u MHz",
- plat->type, plat->rev, plat->name, plat->freq_mhz);
-
- if (IS_ENABLED(CONFIG_IMX_SCU_THERMAL)) {
- temp = cpu_imx_get_temp(plat);
- buf = buf + ret;
- size = size - ret;
- if (temp != 0xdeadbeef)
- ret = snprintf(buf, size, " at %dC", temp);
- else
- ret = snprintf(buf, size, " - invalid sensor data");
- }
-
- snprintf(buf + ret, size - ret, "\n");
-
- return 0;
-}
-
-static int cpu_imx_get_info(const struct udevice *dev, struct cpu_info *info)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- info->cpu_freq = plat->freq_mhz * 1000;
- info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU);
- return 0;
-}
-
-static int cpu_imx_get_count(const struct udevice *dev)
-{
- ofnode node;
- int num = 0;
-
- ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) {
- const char *device_type;
-
- if (!ofnode_is_enabled(node))
- continue;
-
- device_type = ofnode_read_string(node, "device_type");
- if (!device_type)
- continue;
-
- if (!strcmp(device_type, "cpu"))
- num++;
- }
-
- return num;
-}
-
-static int cpu_imx_get_vendor(const struct udevice *dev, char *buf, int size)
-{
- snprintf(buf, size, "NXP");
- return 0;
-}
-
-static int cpu_imx_is_current(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (plat->mpidr == (read_mpidr() & 0x))
- return 1;
-
- return 0;
-}
-
-static const struct cpu_ops cpu_imx9_ops = {
- .get_desc = cpu_imx_get_desc,
- .get_info = cpu_imx_get_info,
- .get_count = cpu_imx_get_count,
- .get_vendor = cpu_imx_get_vendor,
- .is_current = cpu_imx_is_current,
-};
-
-static const struct udevice_id cpu_imx9_ids[] = {
- { .compatible = "arm,cortex-a35" },
- { .compatible = "arm,cortex-a53" },
- { .compatible = "arm,cortex-a72" },
- { }
-};
-
-static ulong imx9_ge
[PATCH v6 2/5] serial: lpuart: use ipg clk for i.MX7ULP
From: Peng Fan
To i.MX7ULP compatible lpuart, there is only ipg clk, no per clk.
So add a devtype check for i.MX7ULP.
Signed-off-by: Peng Fan
---
drivers/serial/serial_lpuart.c | 42 ++
1 file changed, 26 insertions(+), 16 deletions(-)
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index ce08a6b4486..3f2be72b830 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -109,28 +109,35 @@ u32 __weak get_lpuart_clk(void)
}
#if CONFIG_IS_ENABLED(CLK)
-static int get_lpuart_clk_rate(struct udevice *dev, u32 *clk)
+static int get_lpuart_clk_rate(struct udevice *dev, u32 *clk_rate)
{
- struct clk per_clk;
+ struct lpuart_serial_plat *plat = dev_get_plat(dev);
+ struct clk clk;
ulong rate;
int ret;
+ char *name;
- ret = clk_get_by_name(dev, "per", _clk);
+ if (plat->devtype == DEV_MX7ULP)
+ name = "ipg";
+ else
+ name = "per";
+
+ ret = clk_get_by_name(dev, name, );
if (ret) {
- dev_err(dev, "Failed to get per clk: %d\n", ret);
+ dev_err(dev, "Failed to get clk: %d\n", ret);
return ret;
}
- rate = clk_get_rate(_clk);
+ rate = clk_get_rate();
if ((long)rate <= 0) {
- dev_err(dev, "Failed to get per clk rate: %ld\n", (long)rate);
+ dev_err(dev, "Failed to get clk rate: %ld\n", (long)rate);
return ret;
}
- *clk = rate;
+ *clk_rate = rate;
return 0;
}
#else
-static inline int get_lpuart_clk_rate(struct udevice *dev, u32 *clk)
+static inline int get_lpuart_clk_rate(struct udevice *dev, u32 *clk_rate)
{ return -ENOSYS; }
#endif
@@ -479,19 +486,22 @@ static int lpuart_serial_pending(struct udevice *dev,
bool input)
static int lpuart_serial_probe(struct udevice *dev)
{
#if CONFIG_IS_ENABLED(CLK)
+ struct lpuart_serial_plat *plat = dev_get_plat(dev);
struct clk per_clk;
struct clk ipg_clk;
int ret;
- ret = clk_get_by_name(dev, "per", _clk);
- if (!ret) {
- ret = clk_enable(_clk);
- if (ret) {
- dev_err(dev, "Failed to enable per clk: %d\n", ret);
- return ret;
+ if (plat->devtype != DEV_MX7ULP) {
+ ret = clk_get_by_name(dev, "per", _clk);
+ if (!ret) {
+ ret = clk_enable(_clk);
+ if (ret) {
+ dev_err(dev, "Failed to enable per clk: %d\n",
ret);
+ return ret;
+ }
+ } else {
+ debug("%s: Failed to get per clk: %d\n", __func__, ret);
}
- } else {
- debug("%s: Failed to get per clk: %d\n", __func__, ret);
}
ret = clk_get_by_name(dev, "ipg", _clk);
--
2.35.3
[PATCH v6 1/5] gpio: imx_rgpio2p: support one address
From: Peng Fan
The i.MX8ULP/93 gpio dt-schema have been updated to only have one
address entry, update the driver to support it.
Signed-off-by: Peng Fan
---
drivers/gpio/imx_rgpio2p.c | 42 ++
1 file changed, 38 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/imx_rgpio2p.c b/drivers/gpio/imx_rgpio2p.c
index 175e460aff5..3227a8d5b57 100644
--- a/drivers/gpio/imx_rgpio2p.c
+++ b/drivers/gpio/imx_rgpio2p.c
@@ -21,6 +21,12 @@ enum imx_rgpio2p_direction {
#define GPIO_PER_BANK 32
+struct imx_rgpio2p_soc_data {
+ bool have_dual_base;
+};
+
+#define IMX8ULP_GPIO_BASE_OFF 0x40
+
struct imx_rgpio2p_data {
struct gpio_regs *regs;
};
@@ -165,6 +171,9 @@ static int imx_rgpio2p_probe(struct udevice *dev)
static int imx_rgpio2p_bind(struct udevice *dev)
{
struct imx_rgpio2p_plat *plat = dev_get_plat(dev);
+ struct imx_rgpio2p_soc_data *data =
+ (struct imx_rgpio2p_soc_data *)dev_get_driver_data(dev);
+ bool dual_base = data->have_dual_base;
fdt_addr_t addr;
/*
@@ -176,9 +185,26 @@ static int imx_rgpio2p_bind(struct udevice *dev)
if (plat)
return 0;
- addr = devfdt_get_addr_index(dev, 1);
- if (addr == FDT_ADDR_T_NONE)
- return -EINVAL;
+ /*
+* Handle legacy compatible combinations which used two reg values
+* for the i.MX8ULP and i.MX93.
+*/
+ if (device_is_compatible(dev, "fsl,imx7ulp-gpio") &&
+ (device_is_compatible(dev, "fsl,imx93-gpio") ||
+ (device_is_compatible(dev, "fsl,imx8ulp-gpio"
+ dual_base = true;
+
+ if (dual_base) {
+ addr = devfdt_get_addr_index(dev, 1);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+ } else {
+ addr = devfdt_get_addr_index(dev, 0);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ addr += IMX8ULP_GPIO_BASE_OFF;
+ }
/*
* TODO:
@@ -202,9 +228,17 @@ static int imx_rgpio2p_bind(struct udevice *dev)
return 0;
}
+static struct imx_rgpio2p_soc_data imx7ulp_data = {
+ .have_dual_base = true,
+};
+
+static struct imx_rgpio2p_soc_data imx8ulp_data = {
+ .have_dual_base = false,
+};
static const struct udevice_id imx_rgpio2p_ids[] = {
- { .compatible = "fsl,imx7ulp-gpio" },
+ { .compatible = "fsl,imx7ulp-gpio", .data = (ulong)_data },
+ { .compatible = "fsl,imx8ulp-gpio", .data = (ulong)_data },
{ }
};
--
2.35.3
[PATCH v6 0/5] imx93: Conver to OF_UPSTREAM
A few nodes were added to soc and board u-boot.dtsi(lpi2c, usbotg), those nodes could be dropped after upstream linux supports them. To support OF_UPSTREAM, a few driver changes are included. For TMU, still use U-Boot node, I will prepare a kernel update, then back to U-Boot support. Mathieu: please help test the boards you maintain when you have time. Thanks, Peng. To: Stefano Babic To: Fabio Estevam To: "NXP i.MX U-Boot Team" To: Mathieu Othacehe Cc: u-boot@lists.denx.de Signed-off-by: Peng Fan Changes in v6: - Update the serial lpuart patch, to rename per_clk to clk, also change the input parameter u32 *clk to u32 *clk_rate. - Link to v5: https://lore.kernel.org/r/20240411-imx93-of-v2-v5-0-9eb3c64ff...@nxp.com Changes in v5: - Correct uart clk checking - Link to v4: https://lore.kernel.org/r/20240328-imx93-of-v2-v4-0-338d15a65...@nxp.com Changes in v4: - Convert all i.MX93 boards - Link to v3: https://lore.kernel.org/r/20240328-imx93-of-v3-0-4e7f341ed...@nxp.com Changes in v3: - Update patch 5, to drop the imx8mp-evk changes which are wrongly included - Link to v2: https://lore.kernel.org/r/20240328-imx93-of-v2-0-909f5d37d...@nxp.com Changes in v2: - Add a new patch to sync clock header to avoid breaking - Drop the Makefile change which change including order - Link to v1: https://lore.kernel.org/r/20240327-imx93-of-v1-0-afab6b314...@nxp.com --- Peng Fan (5): gpio: imx_rgpio2p: support one address serial: lpuart: use ipg clk for i.MX7ULP cpu: drop imx9_cpu clk: imx93: fix anatop base imx93: convert to OF_UPSTREAM arch/arm/dts/Makefile | 5 - arch/arm/dts/imx93-11x11-evk-u-boot.dtsi| 119 arch/arm/dts/imx93-11x11-evk.dts| 322 - arch/arm/dts/imx93-phyboard-segin.dts | 117 --- arch/arm/dts/imx93-phycore-som.dtsi | 126 arch/arm/dts/imx93-pinfunc.h| 623 arch/arm/dts/imx93-u-boot.dtsi | 80 +++ arch/arm/dts/imx93-var-som-symphony-u-boot.dtsi | 22 + arch/arm/dts/imx93-var-som-symphony.dts | 323 - arch/arm/dts/imx93-var-som.dtsi | 111 --- arch/arm/dts/imx93.dtsi | 906 arch/arm/mach-imx/imx9/Kconfig | 1 + configs/imx93-phyboard-segin_defconfig | 2 +- configs/imx93_11x11_evk_defconfig | 2 +- configs/imx93_11x11_evk_ld_defconfig| 2 +- configs/imx93_var_som_defconfig | 2 +- drivers/clk/imx/clk-imx93.c | 2 +- drivers/cpu/imx9_cpu.c | 224 -- drivers/gpio/imx_rgpio2p.c | 42 +- drivers/serial/serial_lpuart.c | 42 +- include/dt-bindings/clock/imx93-clock.h | 208 -- include/dt-bindings/power/fsl,imx93-power.h | 15 - 22 files changed, 291 insertions(+), 3005 deletions(-) --- base-commit: 777c28460947371ada40868dc994dfe8537d7115 change-id: 20240328-imx93-of-v2-f879efef737d Best regards, -- Peng Fan
RE: [PATCH v5 2/5] serial: lpuart: use ipg clk for i.MX7ULP
> Subject: Re: [PATCH v5 2/5] serial: lpuart: use ipg clk for i.MX7ULP
>
> Hi Peng,
>
> On Thu, Apr 11, 2024 at 12:23 AM Peng Fan (OSS)
> wrote:
> >
> > From: Peng Fan
> >
> > To i.MX7ULP compatible lpuart, there is only ipg clk, no per clk.
> > So add a devtype check for i.MX7ULP.
> >
> > Signed-off-by: Peng Fan
> > ---
> > drivers/serial/serial_lpuart.c | 28 +++-
> > 1 file changed, 19 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/serial/serial_lpuart.c
> > b/drivers/serial/serial_lpuart.c index ce08a6b4486..891352293f9 100644
> > --- a/drivers/serial/serial_lpuart.c
> > +++ b/drivers/serial/serial_lpuart.c
> > @@ -111,11 +111,18 @@ u32 __weak get_lpuart_clk(void) #if
> > CONFIG_IS_ENABLED(CLK) static int get_lpuart_clk_rate(struct udevice
> > *dev, u32 *clk) {
> > + struct lpuart_serial_plat *plat = dev_get_plat(dev);
> > struct clk per_clk;
>
> You ignored my previous comment. Here I go again:
>
> Please rename 'per_clk' to 'clk'.
Sorry for that. I will fix in v6.
>
> > ulong rate;
> > int ret;
> > + char *name;
> > +
> > + if (plat->devtype == DEV_MX7ULP)
> > + name = "ipg";
> > + else
> > + name = "per";
> >
> > - ret = clk_get_by_name(dev, "per", _clk);
> > + ret = clk_get_by_name(dev, name, _clk);
>
> ... because it is confusing that per_clk can be ipg or per clock.
Yeah.
>
> > if (ret) {
> > dev_err(dev, "Failed to get per clk: %d\n", ret);
>
> And then also change the error message to "clk".
Fix in v6.
Thanks,
Peng.
[PATCH v5 5/5] imx93: convert to OF_UPSTREAM
From: Peng Fan
Convert all i.MX93 boards to OF_UPSTREAM.
Add lpi2c2 nodes for imx93-11x11-evk-u-boot.dtsi.
Add usbotg1 nodes in imx93-u-boot.dtsi and board u-boot.dtsi.
The nodes could be removed after upstream linux supports them.
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile | 5 -
arch/arm/dts/imx93-11x11-evk-u-boot.dtsi| 119
arch/arm/dts/imx93-11x11-evk.dts| 322 -
arch/arm/dts/imx93-phyboard-segin.dts | 117 ---
arch/arm/dts/imx93-phycore-som.dtsi | 126
arch/arm/dts/imx93-pinfunc.h| 623
arch/arm/dts/imx93-u-boot.dtsi | 80 +++
arch/arm/dts/imx93-var-som-symphony-u-boot.dtsi | 22 +
arch/arm/dts/imx93-var-som-symphony.dts | 323 -
arch/arm/dts/imx93-var-som.dtsi | 111 ---
arch/arm/dts/imx93.dtsi | 906
arch/arm/mach-imx/imx9/Kconfig | 1 +
configs/imx93-phyboard-segin_defconfig | 2 +-
configs/imx93_11x11_evk_defconfig | 2 +-
configs/imx93_11x11_evk_ld_defconfig| 2 +-
configs/imx93_var_som_defconfig | 2 +-
include/dt-bindings/clock/imx93-clock.h | 208 --
include/dt-bindings/power/fsl,imx93-power.h | 15 -
18 files changed, 226 insertions(+), 2760 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 2634bb4c9ac..0b6a92e36e9 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1046,11 +1046,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-kontron-pitx-imx8m.dtb \
imx8mq-librem5-r4.dtb
-dtb-$(CONFIG_ARCH_IMX9) += \
- imx93-11x11-evk.dtb \
- imx93-var-som-symphony.dtb \
- imx93-phyboard-segin.dtb
-
dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb \
imxrt1020-evk.dtb \
imxrt1170-evk.dtb \
diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
index a99ba99bfb4..4a834ded44c 100644
--- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
@@ -26,6 +26,112 @@
bootph-pre-ram;
};
+/* The node should be removed after upstream supports it */
+ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <40>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_lpi2c2>;
+ pinctrl-1 = <_lpi2c2>;
+ status = "okay";
+
+ pmic@25 {
+ compatible = "nxp,pca9451a";
+ reg = <0x25>;
+ interrupt-parent = <>;
+ interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+
+ regulators {
+ buck1: BUCK1 {
+ regulator-name = "BUCK1";
+ regulator-min-microvolt = <65>;
+ regulator-max-microvolt = <2237500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck2: BUCK2 {
+ regulator-name = "BUCK2";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <2187500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck4: BUCK4{
+ regulator-name = "BUCK4";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck5: BUCK5{
+ regulator-name = "BUCK5";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck6: BUCK6 {
+ regulator-name = "BUCK6";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1: LDO1 {
+
[PATCH v5 4/5] clk: imx93: fix anatop base
From: Peng Fan
The PLL clk needs use anatop base, otherwise wrong PLL address will
be used.
Fixes: 9c153e46661b ("clk: imx: add i.MX93 CCF driver")
Signed-off-by: Peng Fan
---
drivers/clk/imx/clk-imx93.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
index ce10d795316..f0cb797d975 100644
--- a/drivers/clk/imx/clk-imx93.c
+++ b/drivers/clk/imx/clk-imx93.c
@@ -289,7 +289,7 @@ static int imx93_clk_probe(struct udevice *dev)
clk_dm(IMX93_CLK_SYS_PLL_PFD2_DIV2,
imx_clk_fixed_factor("sys_pll_pfd2_div2", "sys_pll_pfd2", 1, 2));
- base = (void *)ANATOP_BASE_ADDR;
+ anatop_base = (void *)ANATOP_BASE_ADDR;
clk_dm(IMX93_CLK_ARM_PLL,
imx_clk_fracn_gppll_integer("arm_pll", "clock-osc-24m",
--
2.35.3
[PATCH v5 3/5] cpu: drop imx9_cpu
From: Peng Fan
This was wrongly committed, no user, remove it.
Signed-off-by: Peng Fan
---
drivers/cpu/imx9_cpu.c | 224 -
1 file changed, 224 deletions(-)
diff --git a/drivers/cpu/imx9_cpu.c b/drivers/cpu/imx9_cpu.c
deleted file mode 100644
index 66534fe6d17..000
--- a/drivers/cpu/imx9_cpu.c
+++ /dev/null
@@ -1,224 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2019 NXP
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct cpu_imx_plat {
- const char *name;
- const char *rev;
- const char *type;
- u32 cpu_rsrc;
- u32 cpurev;
- u32 freq_mhz;
- u32 mpidr;
-};
-
-const char *get_imx9_type(u32 imxtype)
-{
- switch (imxtype) {
- case MXC_CPU_IMX93:
- return "93";
- default:
- return "??";
- }
-}
-
-const char *get_imx9_rev(u32 rev)
-{
- switch (rev) {
- case CHIP_REV_1_0:
- return "1.";
- case CHIP_REV_B:
- return "B";
- case CHIP_REV_C:
- return "C";
- default:
- return "?";
- }
-}
-
-static void set_core_data(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (device_is_compatible(dev, "arm,cortex-a35"))
- plat->name = "A35";
- else
- plat->name = "?";
-}
-
-#if IS_ENABLED(CONFIG_IMX_SCU_THERMAL)
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- struct udevice *thermal_dev;
- int cpu_tmp, ret;
- int idx = 1; /* use "cpu-thermal0" device */
-
- if (plat->cpu_rsrc == SC_R_A72)
- idx = 2; /* use "cpu-thermal1" device */
-
- ret = uclass_get_device(UCLASS_THERMAL, idx, _dev);
- if (!ret) {
- ret = thermal_get_temp(thermal_dev, _tmp);
- if (ret)
- return 0xdeadbeef;
- } else {
- return 0xdeadbeef;
- }
-
- return cpu_tmp;
-}
-#else
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- return 0;
-}
-#endif
-
-int cpu_imx_get_desc(const struct udevice *dev, char *buf, int size)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
- int ret, temp;
-
- if (size < 100)
- return -ENOSPC;
-
- ret = snprintf(buf, size, "NXP i.MX8%s Rev%s %s at %u MHz",
- plat->type, plat->rev, plat->name, plat->freq_mhz);
-
- if (IS_ENABLED(CONFIG_IMX_SCU_THERMAL)) {
- temp = cpu_imx_get_temp(plat);
- buf = buf + ret;
- size = size - ret;
- if (temp != 0xdeadbeef)
- ret = snprintf(buf, size, " at %dC", temp);
- else
- ret = snprintf(buf, size, " - invalid sensor data");
- }
-
- snprintf(buf + ret, size - ret, "\n");
-
- return 0;
-}
-
-static int cpu_imx_get_info(const struct udevice *dev, struct cpu_info *info)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- info->cpu_freq = plat->freq_mhz * 1000;
- info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU);
- return 0;
-}
-
-static int cpu_imx_get_count(const struct udevice *dev)
-{
- ofnode node;
- int num = 0;
-
- ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) {
- const char *device_type;
-
- if (!ofnode_is_enabled(node))
- continue;
-
- device_type = ofnode_read_string(node, "device_type");
- if (!device_type)
- continue;
-
- if (!strcmp(device_type, "cpu"))
- num++;
- }
-
- return num;
-}
-
-static int cpu_imx_get_vendor(const struct udevice *dev, char *buf, int size)
-{
- snprintf(buf, size, "NXP");
- return 0;
-}
-
-static int cpu_imx_is_current(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (plat->mpidr == (read_mpidr() & 0x))
- return 1;
-
- return 0;
-}
-
-static const struct cpu_ops cpu_imx9_ops = {
- .get_desc = cpu_imx_get_desc,
- .get_info = cpu_imx_get_info,
- .get_count = cpu_imx_get_count,
- .get_vendor = cpu_imx_get_vendor,
- .is_current = cpu_imx_is_current,
-};
-
-static const struct udevice_id cpu_imx9_ids[] = {
- { .compatible = "arm,cortex-a35" },
- { .compatible = "arm,cortex-a53" },
- { .compatible = "arm,cortex-a72" },
- { }
-};
-
-static ulong imx9_ge
[PATCH v5 2/5] serial: lpuart: use ipg clk for i.MX7ULP
From: Peng Fan
To i.MX7ULP compatible lpuart, there is only ipg clk, no per clk.
So add a devtype check for i.MX7ULP.
Signed-off-by: Peng Fan
---
drivers/serial/serial_lpuart.c | 28 +++-
1 file changed, 19 insertions(+), 9 deletions(-)
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index ce08a6b4486..891352293f9 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -111,11 +111,18 @@ u32 __weak get_lpuart_clk(void)
#if CONFIG_IS_ENABLED(CLK)
static int get_lpuart_clk_rate(struct udevice *dev, u32 *clk)
{
+ struct lpuart_serial_plat *plat = dev_get_plat(dev);
struct clk per_clk;
ulong rate;
int ret;
+ char *name;
+
+ if (plat->devtype == DEV_MX7ULP)
+ name = "ipg";
+ else
+ name = "per";
- ret = clk_get_by_name(dev, "per", _clk);
+ ret = clk_get_by_name(dev, name, _clk);
if (ret) {
dev_err(dev, "Failed to get per clk: %d\n", ret);
return ret;
@@ -479,19 +486,22 @@ static int lpuart_serial_pending(struct udevice *dev,
bool input)
static int lpuart_serial_probe(struct udevice *dev)
{
#if CONFIG_IS_ENABLED(CLK)
+ struct lpuart_serial_plat *plat = dev_get_plat(dev);
struct clk per_clk;
struct clk ipg_clk;
int ret;
- ret = clk_get_by_name(dev, "per", _clk);
- if (!ret) {
- ret = clk_enable(_clk);
- if (ret) {
- dev_err(dev, "Failed to enable per clk: %d\n", ret);
- return ret;
+ if (plat->devtype != DEV_MX7ULP) {
+ ret = clk_get_by_name(dev, "per", _clk);
+ if (!ret) {
+ ret = clk_enable(_clk);
+ if (ret) {
+ dev_err(dev, "Failed to enable per clk: %d\n",
ret);
+ return ret;
+ }
+ } else {
+ debug("%s: Failed to get per clk: %d\n", __func__, ret);
}
- } else {
- debug("%s: Failed to get per clk: %d\n", __func__, ret);
}
ret = clk_get_by_name(dev, "ipg", _clk);
--
2.35.3
[PATCH v5 1/5] gpio: imx_rgpio2p: support one address
From: Peng Fan
The i.MX8ULP/93 gpio dt-schema have been updated to only have one
address entry, update the driver to support it.
Signed-off-by: Peng Fan
---
drivers/gpio/imx_rgpio2p.c | 42 ++
1 file changed, 38 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/imx_rgpio2p.c b/drivers/gpio/imx_rgpio2p.c
index 175e460aff5..3227a8d5b57 100644
--- a/drivers/gpio/imx_rgpio2p.c
+++ b/drivers/gpio/imx_rgpio2p.c
@@ -21,6 +21,12 @@ enum imx_rgpio2p_direction {
#define GPIO_PER_BANK 32
+struct imx_rgpio2p_soc_data {
+ bool have_dual_base;
+};
+
+#define IMX8ULP_GPIO_BASE_OFF 0x40
+
struct imx_rgpio2p_data {
struct gpio_regs *regs;
};
@@ -165,6 +171,9 @@ static int imx_rgpio2p_probe(struct udevice *dev)
static int imx_rgpio2p_bind(struct udevice *dev)
{
struct imx_rgpio2p_plat *plat = dev_get_plat(dev);
+ struct imx_rgpio2p_soc_data *data =
+ (struct imx_rgpio2p_soc_data *)dev_get_driver_data(dev);
+ bool dual_base = data->have_dual_base;
fdt_addr_t addr;
/*
@@ -176,9 +185,26 @@ static int imx_rgpio2p_bind(struct udevice *dev)
if (plat)
return 0;
- addr = devfdt_get_addr_index(dev, 1);
- if (addr == FDT_ADDR_T_NONE)
- return -EINVAL;
+ /*
+* Handle legacy compatible combinations which used two reg values
+* for the i.MX8ULP and i.MX93.
+*/
+ if (device_is_compatible(dev, "fsl,imx7ulp-gpio") &&
+ (device_is_compatible(dev, "fsl,imx93-gpio") ||
+ (device_is_compatible(dev, "fsl,imx8ulp-gpio"
+ dual_base = true;
+
+ if (dual_base) {
+ addr = devfdt_get_addr_index(dev, 1);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+ } else {
+ addr = devfdt_get_addr_index(dev, 0);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ addr += IMX8ULP_GPIO_BASE_OFF;
+ }
/*
* TODO:
@@ -202,9 +228,17 @@ static int imx_rgpio2p_bind(struct udevice *dev)
return 0;
}
+static struct imx_rgpio2p_soc_data imx7ulp_data = {
+ .have_dual_base = true,
+};
+
+static struct imx_rgpio2p_soc_data imx8ulp_data = {
+ .have_dual_base = false,
+};
static const struct udevice_id imx_rgpio2p_ids[] = {
- { .compatible = "fsl,imx7ulp-gpio" },
+ { .compatible = "fsl,imx7ulp-gpio", .data = (ulong)_data },
+ { .compatible = "fsl,imx8ulp-gpio", .data = (ulong)_data },
{ }
};
--
2.35.3
[PATCH v5 0/5] imx93: Conver to OF_UPSTREAM
A few nodes were added to soc and board u-boot.dtsi(lpi2c, usbotg), those nodes could be dropped after upstream linux supports them. To support OF_UPSTREAM, a few driver changes are included. For TMU, still use U-Boot node, I will prepare a kernel update, then back to U-Boot support. Mathieu: please help test the boards you maintain when you have time. Thanks, Peng. To: Stefano Babic To: Fabio Estevam To: "NXP i.MX U-Boot Team" To: Mathieu Othacehe Cc: u-boot@lists.denx.de Signed-off-by: Peng Fan Changes in v5: - Correct uart clk checking - Link to v4: https://lore.kernel.org/r/20240328-imx93-of-v2-v4-0-338d15a65...@nxp.com Changes in v4: - Convert all i.MX93 boards - Link to v3: https://lore.kernel.org/r/20240328-imx93-of-v3-0-4e7f341ed...@nxp.com Changes in v3: - Update patch 5, to drop the imx8mp-evk changes which are wrongly included - Link to v2: https://lore.kernel.org/r/20240328-imx93-of-v2-0-909f5d37d...@nxp.com Changes in v2: - Add a new patch to sync clock header to avoid breaking - Drop the Makefile change which change including order - Link to v1: https://lore.kernel.org/r/20240327-imx93-of-v1-0-afab6b314...@nxp.com --- Peng Fan (5): gpio: imx_rgpio2p: support one address serial: lpuart: use ipg clk for i.MX7ULP cpu: drop imx9_cpu clk: imx93: fix anatop base imx93: convert to OF_UPSTREAM arch/arm/dts/Makefile | 5 - arch/arm/dts/imx93-11x11-evk-u-boot.dtsi| 119 arch/arm/dts/imx93-11x11-evk.dts| 322 - arch/arm/dts/imx93-phyboard-segin.dts | 117 --- arch/arm/dts/imx93-phycore-som.dtsi | 126 arch/arm/dts/imx93-pinfunc.h| 623 arch/arm/dts/imx93-u-boot.dtsi | 80 +++ arch/arm/dts/imx93-var-som-symphony-u-boot.dtsi | 22 + arch/arm/dts/imx93-var-som-symphony.dts | 323 - arch/arm/dts/imx93-var-som.dtsi | 111 --- arch/arm/dts/imx93.dtsi | 906 arch/arm/mach-imx/imx9/Kconfig | 1 + configs/imx93-phyboard-segin_defconfig | 2 +- configs/imx93_11x11_evk_defconfig | 2 +- configs/imx93_11x11_evk_ld_defconfig| 2 +- configs/imx93_var_som_defconfig | 2 +- drivers/clk/imx/clk-imx93.c | 2 +- drivers/cpu/imx9_cpu.c | 224 -- drivers/gpio/imx_rgpio2p.c | 42 +- drivers/serial/serial_lpuart.c | 28 +- include/dt-bindings/clock/imx93-clock.h | 208 -- include/dt-bindings/power/fsl,imx93-power.h | 15 - 22 files changed, 284 insertions(+), 2998 deletions(-) --- base-commit: 777c28460947371ada40868dc994dfe8537d7115 change-id: 20240328-imx93-of-v2-f879efef737d Best regards, -- Peng Fan
RE: [PATCH v4 0/5] imx93: Conver to OF_UPSTREAM
> Subject: Re: [PATCH v4 0/5] imx93: Conver to OF_UPSTREAM > > Hello Peng, > > Some minor nitpicks... s/Conver to/Convert to/ in the patch subject, and a > couple more below. > > > On 2024-03-28 06:05, Peng Fan (OSS) wrote: > > A few nodes were added to soc and board u-boot.dtsi(lpi2c, usbotg), > > those nodes > > s/soc/SoC/ > > > could be dropped after upstream linux supports them. > > s/linux/Linux/ Will fix all the typos in V5. Thanks, Peng. > > > To support OF_UPSTREAM, a few driver changes are included. > > For TMU, still use U-Boot node, I will prepare a kernel update, then > > back to U-Boot support. > > > > Mathieu: please help test the boards you maintain when you have time. > > > > Thanks, > > Peng. > > > > To: Sébastien Szymanski > > To: Stefano Babic > > To: Fabio Estevam > > To: "NXP i.MX U-Boot Team" > > To: Mathieu Othacehe > > Cc: u-boot@lists.denx.de > > Signed-off-by: Peng Fan > > > > Changes in v4: > > - Convert all i.MX93 boards > > - Link to v3: > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore > > .kernel.org%2Fr%2F20240328-imx93-of-v3-0- > 4e7f341ed7ea%40nxp.com=0 > > > 5%7C02%7Cpeng.fan%40nxp.com%7Cfb4cf5cd6eb048f7004508dc5724921f > %7C686ea > > > 1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638481061784727166%7CU > nknown%7CT > > > WFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLC > JXVCI > > > 6Mn0%3D%7C0%7C%7C%7C=m3eUSDFipFRBJlujTzNovsgusVTRp8lekD > guNKKGlq8 > > %3D=0 > > > > Changes in v3: > > - Update patch 5, to drop the imx8mp-evk changes which are wrongly > >included > > - Link to v2: > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore > > .kernel.org%2Fr%2F20240328-imx93-of-v2-0- > 909f5d37da87%40nxp.com=0 > > > 5%7C02%7Cpeng.fan%40nxp.com%7Cfb4cf5cd6eb048f7004508dc5724921f > %7C686ea > > > 1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638481061784740481%7CU > nknown%7CT > > > WFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLC > JXVCI > > > 6Mn0%3D%7C0%7C%7C%7C=dOltsehRiqbWFgRABoeC1nUqbU5CTz2 > OOt6Yq7u9sj0 > > %3D=0 > > > > Changes in v2: > > - Add a new patch to sync clock header to avoid breaking > > - Drop the Makefile change which change including order > > - Link to v1: > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore > > .kernel.org%2Fr%2F20240327-imx93-of-v1-0- > afab6b31422a%40nxp.com=0 > > > 5%7C02%7Cpeng.fan%40nxp.com%7Cfb4cf5cd6eb048f7004508dc5724921f > %7C686ea > > > 1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638481061784750001%7CU > nknown%7CT > > > WFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLC > JXVCI > > > 6Mn0%3D%7C0%7C%7C%7C=x4s291DNECLAyKaOdMRse2CLfFwaSx8Z > %2BCdLZZrYV > > mY%3D=0 > > > > --- > > Peng Fan (5): > > gpio: imx_rgpio2p: support one address > > serial: lpuart: use ipg clk for i.MX7ULP > > cpu: drop imx9_cpu > > clk: imx93: fix anatop base > > imx93: convert to OF_UPSTREAM > > > > arch/arm/dts/Makefile | 5 - > > arch/arm/dts/imx93-11x11-evk-u-boot.dtsi| 119 > > arch/arm/dts/imx93-11x11-evk.dts| 322 - > > arch/arm/dts/imx93-phyboard-segin.dts | 117 --- > > arch/arm/dts/imx93-phycore-som.dtsi | 126 > > arch/arm/dts/imx93-pinfunc.h| 623 > > arch/arm/dts/imx93-u-boot.dtsi | 80 +++ > > arch/arm/dts/imx93-var-som-symphony-u-boot.dtsi | 22 + > > arch/arm/dts/imx93-var-som-symphony.dts | 323 - > > arch/arm/dts/imx93-var-som.dtsi | 111 --- > > arch/arm/dts/imx93.dtsi | 906 > > > > arch/arm/mach-imx/imx9/Kconfig | 1 + > > configs/imx93-phyboard-segin_defconfig | 2 +- > > configs/imx93_11x11_evk_defconfig | 2 +- > > configs/imx93_11x11_evk_ld_defconfig| 2 +- > > configs/imx93_var_som_defconfig | 2 +- > > drivers/clk/imx/clk-imx93.c | 2 +- > > drivers/cpu/imx9_cpu.c | 224 -- > > drivers/gpio/imx_rgpio2p.c | 42 +- > > drivers/serial/serial_lpuart.c | 9 +- > > include/dt-bindings/clock/imx93-clock.h | 208 -- > > include/dt-bindings/power/fsl,imx93-power.h | 15 - > > 22 files changed, 273 insertions(+), 2990 deletions(-) > > --- > > base-commit: 280f34ba7d68bb50c0b8eaa040322c1f3b37d46e > > change-id: 20240328-imx93-of-v2-f879efef737d > > > > Best regards,
RE: [PATCH v4 0/5] imx93: Conver to OF_UPSTREAM
> Subject: Re: [PATCH v4 0/5] imx93: Conver to OF_UPSTREAM > > Hi Peng, > > Here are some comments unrelated to the UART issue. > > On Sun, Apr 7, 2024 at 7:35 AM Peng Fan wrote: > > > SOC: 0xa1009300 > > LC: 0x2040010 > > M33 prepare ok > > Could you remove these three lines? Ok. But these should not be related to this patchset. > > They are not very helpful and add noise to the boot log. > > > Normal Boot > > Trying to boot from BOOTROM > > Boot Stage: Primary boot > > image offset 0x8000, pagesize 0x200, ivt offset 0x0 Load image from > > 0x49800 by ROM_API > > NOTICE: BL31: v2.8(release):lf-6.6.3-1.0.0-10-gf12d90141 > > NOTICE: BL31: Built : 09:34:44, Mar 27 2024 > > > > > > U-Boot 2024.04-rc5-00388-g351988e2dce (Apr 07 2024 - 19:29:56 +0800) > > > > Reset Status: POR > > > > Could not read CPU frequency: -2 > > CPU: NXP i.MX93(52) Rev1.1 A55 at 0 MHz > > Please fix this. I am sure the CPU is not running at 0 MHz :-) Yes, I will fix . Also not related to this patchset. > > > CPU: Industrial temperature grade (-40C to 105C) at 26C > > > > Model: NXP i.MX93 11X11 EVK board > > DRAM: 2 GiB > > Core: 188 devices, 24 uclasses, devicetree: separate > > WDT: Started watchdog@4249 with servicing every 1000ms (40s > timeout) > > MMC: FSL_SDHC: 0, FSL_SDHC: 1 > > Loading Environment from MMC... *** Warning - bad CRC, using default > > environment > > > > In:serial@4438 > > Out: serial@4438 > > Err: serial@4438 > > switch to partitions #0, OK > > mmc1 is current device > > Net: > > Warning: ethernet@428a (eth1) using random MAC address - > > 6a:c2:96:d2:68:a6 > > eth0: ethernet@4289 [PRIME], eth1: ethernet@428a > > Aren't the MAC address fuses programmed? Or are they not being read > correctly? I will check, but I think not related to this patchset. Thanks, Peng.
RE: [PATCH v4 0/5] imx93: Conver to OF_UPSTREAM
Hi Mathieu,
> Subject: RE: [PATCH v4 0/5] imx93: Conver to OF_UPSTREAM
>
> Hi Mathieu,
> > Subject: Re: [PATCH v4 0/5] imx93: Conver to OF_UPSTREAM
> >
> >
> > > Any comments?
> >
> > Yes, see:
>
> Sorry, I missed your comment.
Could you please help try this on top of this patchset?
Seems this is the only point I could think of, that would impact uart.
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index 653ff99e67b..891352293f9 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -486,19 +486,22 @@ static int lpuart_serial_pending(struct udevice *dev,
bool input)
static int lpuart_serial_probe(struct udevice *dev)
{
#if CONFIG_IS_ENABLED(CLK)
+ struct lpuart_serial_plat *plat = dev_get_plat(dev);
struct clk per_clk;
struct clk ipg_clk;
int ret;
- ret = clk_get_by_name(dev, "per", _clk);
- if (!ret) {
- ret = clk_enable(_clk);
- if (ret) {
- dev_err(dev, "Failed to enable per clk: %d\n", ret);
- return ret;
+ if (plat->devtype != DEV_MX7ULP) {
+ ret = clk_get_by_name(dev, "per", _clk);
+ if (!ret) {
+ ret = clk_enable(_clk);
+ if (ret) {
+ dev_err(dev, "Failed to enable per clk: %d\n",
ret);
+ return ret;
+ }
+ } else {
+ debug("%s: Failed to get per clk: %d\n", __func__, ret);
}
- } else {
- debug("%s: Failed to get per clk: %d\n", __func__, ret);
}
ret = clk_get_by_name(dev, "ipg", _clk);
Thanks,
Peng.
>
> From my test just now, log below. For your uart not work proper, I think it is
> the uart clk not setup
>
> U-Boot SPL 2024.04-rc5-00388-g351988e2dce (Apr 07 2024 - 19:29:56
> +0800)
> SOC: 0xa1009300
> LC: 0x2040010
> M33 prepare ok
> Normal Boot
> Trying to boot from BOOTROM
> Boot Stage: Primary boot
> image offset 0x8000, pagesize 0x200, ivt offset 0x0 Load image from 0x49800
> by ROM_API
> NOTICE: BL31: v2.8(release):lf-6.6.3-1.0.0-10-gf12d90141
> NOTICE: BL31: Built : 09:34:44, Mar 27 2024
>
>
> U-Boot 2024.04-rc5-00388-g351988e2dce (Apr 07 2024 - 19:29:56 +0800)
>
> Reset Status: POR
>
> Could not read CPU frequency: -2
> CPU: NXP i.MX93(52) Rev1.1 A55 at 0 MHz
> CPU: Industrial temperature grade (-40C to 105C) at 26C
>
> Model: NXP i.MX93 11X11 EVK board
> DRAM: 2 GiB
> Core: 188 devices, 24 uclasses, devicetree: separate
> WDT: Started watchdog@4249 with servicing every 1000ms (40s
> timeout)
> MMC: FSL_SDHC: 0, FSL_SDHC: 1
> Loading Environment from MMC... *** Warning - bad CRC, using default
> environment
>
> In:serial@4438
> Out: serial@4438
> Err: serial@4438
> switch to partitions #0, OK
> mmc1 is current device
> Net:
> Warning: ethernet@428a (eth1) using random MAC address -
> 6a:c2:96:d2:68:a6
> eth0: ethernet@4289 [PRIME], eth1: ethernet@428a Hit any key
> to stop autoboot: 0
>
> I see you have:
> {
> pinctrl-names = "default";
> pinctrl-0 = <_uart1>;
> clocks = < IMX93_CLK_LPUART1_GATE>, <
> IMX93_CLK_LPUART1_GATE>;
> clock-names = "ipg", "per";
> status = "okay";
> };
>
> Could you please help give a look on your uart settings which not work with:
> https://lore.kernel.org/all/20240328-imx93-of-v2-v4-2-
> 338d15a65...@nxp.com/
>
> Thanks,
> Peng.
>
> > https://lists.d/
> > enx.de%2Fpipermail%2Fu-boot%2F2024-
> >
> March%2F549531.html=05%7C02%7Cpeng.fan%40nxp.com%7C46ad4
> > 24ef2cb4c09f8b908dc56edad0a%7C686ea1d3bc2b4c6fa92cd99c5c301635%
> >
> 7C0%7C0%7C638480826025692986%7CUnknown%7CTWFpbGZsb3d8eyJWI
> >
> joiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C
> >
> 0%7C%7C%7C=9oXIZF8Ihp1OfaDx3C%2Bcq9nstWJVhN8u3U7xQAhX2
> > 2o%3D=0
> >
> > Thanks,
> >
> > Mathieu
RE: [PATCH v4 0/5] imx93: Conver to OF_UPSTREAM
Hi Mathieu,
> Subject: Re: [PATCH v4 0/5] imx93: Conver to OF_UPSTREAM
>
>
> > Any comments?
>
> Yes, see:
Sorry, I missed your comment.
>From my test just now, log below. For your uart not work proper, I think it is
the uart clk not setup
U-Boot SPL 2024.04-rc5-00388-g351988e2dce (Apr 07 2024 - 19:29:56 +0800)
SOC: 0xa1009300
LC: 0x2040010
M33 prepare ok
Normal Boot
Trying to boot from BOOTROM
Boot Stage: Primary boot
image offset 0x8000, pagesize 0x200, ivt offset 0x0
Load image from 0x49800 by ROM_API
NOTICE: BL31: v2.8(release):lf-6.6.3-1.0.0-10-gf12d90141
NOTICE: BL31: Built : 09:34:44, Mar 27 2024
U-Boot 2024.04-rc5-00388-g351988e2dce (Apr 07 2024 - 19:29:56 +0800)
Reset Status: POR
Could not read CPU frequency: -2
CPU: NXP i.MX93(52) Rev1.1 A55 at 0 MHz
CPU: Industrial temperature grade (-40C to 105C) at 26C
Model: NXP i.MX93 11X11 EVK board
DRAM: 2 GiB
Core: 188 devices, 24 uclasses, devicetree: separate
WDT: Started watchdog@4249 with servicing every 1000ms (40s timeout)
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... *** Warning - bad CRC, using default environment
In:serial@4438
Out: serial@4438
Err: serial@4438
switch to partitions #0, OK
mmc1 is current device
Net:
Warning: ethernet@428a (eth1) using random MAC address - 6a:c2:96:d2:68:a6
eth0: ethernet@4289 [PRIME], eth1: ethernet@428a
Hit any key to stop autoboot: 0
I see you have:
{
pinctrl-names = "default";
pinctrl-0 = <_uart1>;
clocks = < IMX93_CLK_LPUART1_GATE>, < IMX93_CLK_LPUART1_GATE>;
clock-names = "ipg", "per";
status = "okay";
};
Could you please help give a look on your uart settings which not work with:
https://lore.kernel.org/all/20240328-imx93-of-v2-v4-2-338d15a65...@nxp.com/
Thanks,
Peng.
> https://lists.d/
> enx.de%2Fpipermail%2Fu-boot%2F2024-
> March%2F549531.html=05%7C02%7Cpeng.fan%40nxp.com%7C46ad4
> 24ef2cb4c09f8b908dc56edad0a%7C686ea1d3bc2b4c6fa92cd99c5c301635%
> 7C0%7C0%7C638480826025692986%7CUnknown%7CTWFpbGZsb3d8eyJWI
> joiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C
> 0%7C%7C%7C=9oXIZF8Ihp1OfaDx3C%2Bcq9nstWJVhN8u3U7xQAhX2
> 2o%3D=0
>
> Thanks,
>
> Mathieu
RE: [PATCH v4 0/5] imx93: Conver to OF_UPSTREAM
Any comments? Thanks, Peng. > Subject: [PATCH v4 0/5] imx93: Conver to OF_UPSTREAM > > A few nodes were added to soc and board u-boot.dtsi(lpi2c, usbotg), those > nodes could be dropped after upstream linux supports them. > > To support OF_UPSTREAM, a few driver changes are included. > For TMU, still use U-Boot node, I will prepare a kernel update, then back to > U- > Boot support. > > Mathieu: please help test the boards you maintain when you have time. > > Thanks, > Peng. > > To: Sébastien Szymanski > To: Stefano Babic > To: Fabio Estevam > To: "NXP i.MX U-Boot Team" > To: Mathieu Othacehe > Cc: u-boot@lists.denx.de > Signed-off-by: Peng Fan > > Changes in v4: > - Convert all i.MX93 boards > - Link to v3: https://lore.kernel.org/r/20240328-imx93-of-v3-0- > 4e7f341ed...@nxp.com > > Changes in v3: > - Update patch 5, to drop the imx8mp-evk changes which are wrongly >included > - Link to v2: https://lore.kernel.org/r/20240328-imx93-of-v2-0- > 909f5d37d...@nxp.com > > Changes in v2: > - Add a new patch to sync clock header to avoid breaking > - Drop the Makefile change which change including order > - Link to v1: https://lore.kernel.org/r/20240327-imx93-of-v1-0- > afab6b314...@nxp.com > > --- > Peng Fan (5): > gpio: imx_rgpio2p: support one address > serial: lpuart: use ipg clk for i.MX7ULP > cpu: drop imx9_cpu > clk: imx93: fix anatop base > imx93: convert to OF_UPSTREAM > > arch/arm/dts/Makefile | 5 - > arch/arm/dts/imx93-11x11-evk-u-boot.dtsi| 119 > arch/arm/dts/imx93-11x11-evk.dts| 322 - > arch/arm/dts/imx93-phyboard-segin.dts | 117 --- > arch/arm/dts/imx93-phycore-som.dtsi | 126 > arch/arm/dts/imx93-pinfunc.h| 623 > arch/arm/dts/imx93-u-boot.dtsi | 80 +++ > arch/arm/dts/imx93-var-som-symphony-u-boot.dtsi | 22 + > arch/arm/dts/imx93-var-som-symphony.dts | 323 - > arch/arm/dts/imx93-var-som.dtsi | 111 --- > arch/arm/dts/imx93.dtsi | 906 > > arch/arm/mach-imx/imx9/Kconfig | 1 + > configs/imx93-phyboard-segin_defconfig | 2 +- > configs/imx93_11x11_evk_defconfig | 2 +- > configs/imx93_11x11_evk_ld_defconfig| 2 +- > configs/imx93_var_som_defconfig | 2 +- > drivers/clk/imx/clk-imx93.c | 2 +- > drivers/cpu/imx9_cpu.c | 224 -- > drivers/gpio/imx_rgpio2p.c | 42 +- > drivers/serial/serial_lpuart.c | 9 +- > include/dt-bindings/clock/imx93-clock.h | 208 -- > include/dt-bindings/power/fsl,imx93-power.h | 15 - > 22 files changed, 273 insertions(+), 2990 deletions(-) > --- > base-commit: 280f34ba7d68bb50c0b8eaa040322c1f3b37d46e > change-id: 20240328-imx93-of-v2-f879efef737d > > Best regards, > -- > Peng Fan
[PATCH v4 5/5] imx93: convert to OF_UPSTREAM
From: Peng Fan
Convert all i.MX93 boards to OF_UPSTREAM.
Add lpi2c2 nodes for imx93-11x11-evk-u-boot.dtsi.
Add usbotg1 nodes in imx93-u-boot.dtsi and board u-boot.dtsi.
The nodes could be removed after upstream linux supports them.
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile | 5 -
arch/arm/dts/imx93-11x11-evk-u-boot.dtsi| 119
arch/arm/dts/imx93-11x11-evk.dts| 322 -
arch/arm/dts/imx93-phyboard-segin.dts | 117 ---
arch/arm/dts/imx93-phycore-som.dtsi | 126
arch/arm/dts/imx93-pinfunc.h| 623
arch/arm/dts/imx93-u-boot.dtsi | 80 +++
arch/arm/dts/imx93-var-som-symphony-u-boot.dtsi | 22 +
arch/arm/dts/imx93-var-som-symphony.dts | 323 -
arch/arm/dts/imx93-var-som.dtsi | 111 ---
arch/arm/dts/imx93.dtsi | 906
arch/arm/mach-imx/imx9/Kconfig | 1 +
configs/imx93-phyboard-segin_defconfig | 2 +-
configs/imx93_11x11_evk_defconfig | 2 +-
configs/imx93_11x11_evk_ld_defconfig| 2 +-
configs/imx93_var_som_defconfig | 2 +-
include/dt-bindings/clock/imx93-clock.h | 208 --
include/dt-bindings/power/fsl,imx93-power.h | 15 -
18 files changed, 226 insertions(+), 2760 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d85a33055c9..75d9ee06bbf 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1114,11 +1114,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-kontron-pitx-imx8m.dtb \
imx8mq-librem5-r4.dtb
-dtb-$(CONFIG_ARCH_IMX9) += \
- imx93-11x11-evk.dtb \
- imx93-var-som-symphony.dtb \
- imx93-phyboard-segin.dtb
-
dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb \
imxrt1020-evk.dtb \
imxrt1170-evk.dtb \
diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
index a99ba99bfb4..4a834ded44c 100644
--- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
@@ -26,6 +26,112 @@
bootph-pre-ram;
};
+/* The node should be removed after upstream supports it */
+ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <40>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_lpi2c2>;
+ pinctrl-1 = <_lpi2c2>;
+ status = "okay";
+
+ pmic@25 {
+ compatible = "nxp,pca9451a";
+ reg = <0x25>;
+ interrupt-parent = <>;
+ interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+
+ regulators {
+ buck1: BUCK1 {
+ regulator-name = "BUCK1";
+ regulator-min-microvolt = <65>;
+ regulator-max-microvolt = <2237500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck2: BUCK2 {
+ regulator-name = "BUCK2";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <2187500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck4: BUCK4{
+ regulator-name = "BUCK4";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck5: BUCK5{
+ regulator-name = "BUCK5";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck6: BUCK6 {
+ regulator-name = "BUCK6";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1: LDO1 {
+
[PATCH v4 4/5] clk: imx93: fix anatop base
From: Peng Fan
The PLL clk needs use anatop base, otherwise wrong PLL address will
be used.
Fixes: 9c153e46661b ("clk: imx: add i.MX93 CCF driver")
Signed-off-by: Peng Fan
---
drivers/clk/imx/clk-imx93.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
index ce10d795316..f0cb797d975 100644
--- a/drivers/clk/imx/clk-imx93.c
+++ b/drivers/clk/imx/clk-imx93.c
@@ -289,7 +289,7 @@ static int imx93_clk_probe(struct udevice *dev)
clk_dm(IMX93_CLK_SYS_PLL_PFD2_DIV2,
imx_clk_fixed_factor("sys_pll_pfd2_div2", "sys_pll_pfd2", 1, 2));
- base = (void *)ANATOP_BASE_ADDR;
+ anatop_base = (void *)ANATOP_BASE_ADDR;
clk_dm(IMX93_CLK_ARM_PLL,
imx_clk_fracn_gppll_integer("arm_pll", "clock-osc-24m",
--
2.35.3
[PATCH v4 3/5] cpu: drop imx9_cpu
From: Peng Fan
This was wrongly committed, no user, remove it.
Signed-off-by: Peng Fan
---
drivers/cpu/imx9_cpu.c | 224 -
1 file changed, 224 deletions(-)
diff --git a/drivers/cpu/imx9_cpu.c b/drivers/cpu/imx9_cpu.c
deleted file mode 100644
index 66534fe6d17..000
--- a/drivers/cpu/imx9_cpu.c
+++ /dev/null
@@ -1,224 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2019 NXP
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct cpu_imx_plat {
- const char *name;
- const char *rev;
- const char *type;
- u32 cpu_rsrc;
- u32 cpurev;
- u32 freq_mhz;
- u32 mpidr;
-};
-
-const char *get_imx9_type(u32 imxtype)
-{
- switch (imxtype) {
- case MXC_CPU_IMX93:
- return "93";
- default:
- return "??";
- }
-}
-
-const char *get_imx9_rev(u32 rev)
-{
- switch (rev) {
- case CHIP_REV_1_0:
- return "1.";
- case CHIP_REV_B:
- return "B";
- case CHIP_REV_C:
- return "C";
- default:
- return "?";
- }
-}
-
-static void set_core_data(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (device_is_compatible(dev, "arm,cortex-a35"))
- plat->name = "A35";
- else
- plat->name = "?";
-}
-
-#if IS_ENABLED(CONFIG_IMX_SCU_THERMAL)
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- struct udevice *thermal_dev;
- int cpu_tmp, ret;
- int idx = 1; /* use "cpu-thermal0" device */
-
- if (plat->cpu_rsrc == SC_R_A72)
- idx = 2; /* use "cpu-thermal1" device */
-
- ret = uclass_get_device(UCLASS_THERMAL, idx, _dev);
- if (!ret) {
- ret = thermal_get_temp(thermal_dev, _tmp);
- if (ret)
- return 0xdeadbeef;
- } else {
- return 0xdeadbeef;
- }
-
- return cpu_tmp;
-}
-#else
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- return 0;
-}
-#endif
-
-int cpu_imx_get_desc(const struct udevice *dev, char *buf, int size)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
- int ret, temp;
-
- if (size < 100)
- return -ENOSPC;
-
- ret = snprintf(buf, size, "NXP i.MX8%s Rev%s %s at %u MHz",
- plat->type, plat->rev, plat->name, plat->freq_mhz);
-
- if (IS_ENABLED(CONFIG_IMX_SCU_THERMAL)) {
- temp = cpu_imx_get_temp(plat);
- buf = buf + ret;
- size = size - ret;
- if (temp != 0xdeadbeef)
- ret = snprintf(buf, size, " at %dC", temp);
- else
- ret = snprintf(buf, size, " - invalid sensor data");
- }
-
- snprintf(buf + ret, size - ret, "\n");
-
- return 0;
-}
-
-static int cpu_imx_get_info(const struct udevice *dev, struct cpu_info *info)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- info->cpu_freq = plat->freq_mhz * 1000;
- info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU);
- return 0;
-}
-
-static int cpu_imx_get_count(const struct udevice *dev)
-{
- ofnode node;
- int num = 0;
-
- ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) {
- const char *device_type;
-
- if (!ofnode_is_enabled(node))
- continue;
-
- device_type = ofnode_read_string(node, "device_type");
- if (!device_type)
- continue;
-
- if (!strcmp(device_type, "cpu"))
- num++;
- }
-
- return num;
-}
-
-static int cpu_imx_get_vendor(const struct udevice *dev, char *buf, int size)
-{
- snprintf(buf, size, "NXP");
- return 0;
-}
-
-static int cpu_imx_is_current(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (plat->mpidr == (read_mpidr() & 0x))
- return 1;
-
- return 0;
-}
-
-static const struct cpu_ops cpu_imx9_ops = {
- .get_desc = cpu_imx_get_desc,
- .get_info = cpu_imx_get_info,
- .get_count = cpu_imx_get_count,
- .get_vendor = cpu_imx_get_vendor,
- .is_current = cpu_imx_is_current,
-};
-
-static const struct udevice_id cpu_imx9_ids[] = {
- { .compatible = "arm,cortex-a35" },
- { .compatible = "arm,cortex-a53" },
- { .compatible = "arm,cortex-a72" },
- { }
-};
-
-static ulong imx9_ge
[PATCH v4 2/5] serial: lpuart: use ipg clk for i.MX7ULP
From: Peng Fan
To i.MX7ULP compatible lpuart, there is only ipg clk, no per clk.
So add a devtype check for i.MX7ULP.
Signed-off-by: Peng Fan
---
drivers/serial/serial_lpuart.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index ce08a6b4486..653ff99e67b 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -111,11 +111,18 @@ u32 __weak get_lpuart_clk(void)
#if CONFIG_IS_ENABLED(CLK)
static int get_lpuart_clk_rate(struct udevice *dev, u32 *clk)
{
+ struct lpuart_serial_plat *plat = dev_get_plat(dev);
struct clk per_clk;
ulong rate;
int ret;
+ char *name;
- ret = clk_get_by_name(dev, "per", _clk);
+ if (plat->devtype == DEV_MX7ULP)
+ name = "ipg";
+ else
+ name = "per";
+
+ ret = clk_get_by_name(dev, name, _clk);
if (ret) {
dev_err(dev, "Failed to get per clk: %d\n", ret);
return ret;
--
2.35.3
[PATCH v4 1/5] gpio: imx_rgpio2p: support one address
From: Peng Fan
The i.MX8ULP/93 gpio dt-schema have been updated to only have one
address entry, update the driver to support it.
Signed-off-by: Peng Fan
---
drivers/gpio/imx_rgpio2p.c | 42 ++
1 file changed, 38 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/imx_rgpio2p.c b/drivers/gpio/imx_rgpio2p.c
index 175e460aff5..3227a8d5b57 100644
--- a/drivers/gpio/imx_rgpio2p.c
+++ b/drivers/gpio/imx_rgpio2p.c
@@ -21,6 +21,12 @@ enum imx_rgpio2p_direction {
#define GPIO_PER_BANK 32
+struct imx_rgpio2p_soc_data {
+ bool have_dual_base;
+};
+
+#define IMX8ULP_GPIO_BASE_OFF 0x40
+
struct imx_rgpio2p_data {
struct gpio_regs *regs;
};
@@ -165,6 +171,9 @@ static int imx_rgpio2p_probe(struct udevice *dev)
static int imx_rgpio2p_bind(struct udevice *dev)
{
struct imx_rgpio2p_plat *plat = dev_get_plat(dev);
+ struct imx_rgpio2p_soc_data *data =
+ (struct imx_rgpio2p_soc_data *)dev_get_driver_data(dev);
+ bool dual_base = data->have_dual_base;
fdt_addr_t addr;
/*
@@ -176,9 +185,26 @@ static int imx_rgpio2p_bind(struct udevice *dev)
if (plat)
return 0;
- addr = devfdt_get_addr_index(dev, 1);
- if (addr == FDT_ADDR_T_NONE)
- return -EINVAL;
+ /*
+* Handle legacy compatible combinations which used two reg values
+* for the i.MX8ULP and i.MX93.
+*/
+ if (device_is_compatible(dev, "fsl,imx7ulp-gpio") &&
+ (device_is_compatible(dev, "fsl,imx93-gpio") ||
+ (device_is_compatible(dev, "fsl,imx8ulp-gpio"
+ dual_base = true;
+
+ if (dual_base) {
+ addr = devfdt_get_addr_index(dev, 1);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+ } else {
+ addr = devfdt_get_addr_index(dev, 0);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ addr += IMX8ULP_GPIO_BASE_OFF;
+ }
/*
* TODO:
@@ -202,9 +228,17 @@ static int imx_rgpio2p_bind(struct udevice *dev)
return 0;
}
+static struct imx_rgpio2p_soc_data imx7ulp_data = {
+ .have_dual_base = true,
+};
+
+static struct imx_rgpio2p_soc_data imx8ulp_data = {
+ .have_dual_base = false,
+};
static const struct udevice_id imx_rgpio2p_ids[] = {
- { .compatible = "fsl,imx7ulp-gpio" },
+ { .compatible = "fsl,imx7ulp-gpio", .data = (ulong)_data },
+ { .compatible = "fsl,imx8ulp-gpio", .data = (ulong)_data },
{ }
};
--
2.35.3
[PATCH v4 0/5] imx93: Conver to OF_UPSTREAM
A few nodes were added to soc and board u-boot.dtsi(lpi2c, usbotg), those nodes could be dropped after upstream linux supports them. To support OF_UPSTREAM, a few driver changes are included. For TMU, still use U-Boot node, I will prepare a kernel update, then back to U-Boot support. Mathieu: please help test the boards you maintain when you have time. Thanks, Peng. To: Sébastien Szymanski To: Stefano Babic To: Fabio Estevam To: "NXP i.MX U-Boot Team" To: Mathieu Othacehe Cc: u-boot@lists.denx.de Signed-off-by: Peng Fan Changes in v4: - Convert all i.MX93 boards - Link to v3: https://lore.kernel.org/r/20240328-imx93-of-v3-0-4e7f341ed...@nxp.com Changes in v3: - Update patch 5, to drop the imx8mp-evk changes which are wrongly included - Link to v2: https://lore.kernel.org/r/20240328-imx93-of-v2-0-909f5d37d...@nxp.com Changes in v2: - Add a new patch to sync clock header to avoid breaking - Drop the Makefile change which change including order - Link to v1: https://lore.kernel.org/r/20240327-imx93-of-v1-0-afab6b314...@nxp.com --- Peng Fan (5): gpio: imx_rgpio2p: support one address serial: lpuart: use ipg clk for i.MX7ULP cpu: drop imx9_cpu clk: imx93: fix anatop base imx93: convert to OF_UPSTREAM arch/arm/dts/Makefile | 5 - arch/arm/dts/imx93-11x11-evk-u-boot.dtsi| 119 arch/arm/dts/imx93-11x11-evk.dts| 322 - arch/arm/dts/imx93-phyboard-segin.dts | 117 --- arch/arm/dts/imx93-phycore-som.dtsi | 126 arch/arm/dts/imx93-pinfunc.h| 623 arch/arm/dts/imx93-u-boot.dtsi | 80 +++ arch/arm/dts/imx93-var-som-symphony-u-boot.dtsi | 22 + arch/arm/dts/imx93-var-som-symphony.dts | 323 - arch/arm/dts/imx93-var-som.dtsi | 111 --- arch/arm/dts/imx93.dtsi | 906 arch/arm/mach-imx/imx9/Kconfig | 1 + configs/imx93-phyboard-segin_defconfig | 2 +- configs/imx93_11x11_evk_defconfig | 2 +- configs/imx93_11x11_evk_ld_defconfig| 2 +- configs/imx93_var_som_defconfig | 2 +- drivers/clk/imx/clk-imx93.c | 2 +- drivers/cpu/imx9_cpu.c | 224 -- drivers/gpio/imx_rgpio2p.c | 42 +- drivers/serial/serial_lpuart.c | 9 +- include/dt-bindings/clock/imx93-clock.h | 208 -- include/dt-bindings/power/fsl,imx93-power.h | 15 - 22 files changed, 273 insertions(+), 2990 deletions(-) --- base-commit: 280f34ba7d68bb50c0b8eaa040322c1f3b37d46e change-id: 20240328-imx93-of-v2-f879efef737d Best regards, -- Peng Fan
RE: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM
> Subject: Re: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to
> OF_UPSTREAM
>
> On Wed, Mar 27, 2024 at 8:53 PM Peng Fan (OSS)
> wrote:
>
> > + {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + clock-frequency = <40>;
> > + pinctrl-names = "default", "sleep";
> > + pinctrl-0 = <_lpi2c2>;
> > + pinctrl-1 = <_lpi2c2>;
> > + status = "okay";
> > +
> > + pmic@25 {
>
> > + adp5585gpio: gpio@34 {
> > + compatible = "adp5585";
> > + reg = <0x34>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
>
> Please add a comment saying these nodes are already available in 6.9-rc1.
Just gave a check on linux-next/master, the nodes are not there.
Thanks,
Peng
>
> > --- a/arch/arm/mach-imx/imx9/Kconfig
> > +++ b/arch/arm/mach-imx/imx9/Kconfig
> > @@ -31,6 +31,7 @@ choice
> > config TARGET_IMX93_11X11_EVK
> > bool "imx93_11x11_evk"
> > select IMX93
> > + imply OF_UPSTREAM
>
> Sumit and I asked you to add OF_UPSTREAM to all imx93 boards, not just this
> one.
>
> Please don't ignore review comments.
[PATCH v2 4/4] imx: imx8mp_evk: convert to OF_UPSTREAM
From: Peng Fan
Convert to OF_UPSTREAM for i.MX8MP EVK
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile | 1 -
arch/arm/dts/imx8mp-evk.dts | 684
arch/arm/mach-imx/imx8m/Kconfig | 1 +
configs/imx8mp_evk_defconfig| 2 +-
4 files changed, 2 insertions(+), 686 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 56623d01240..7b7788f7550 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1101,7 +1101,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mp-dhcom-pdk2.dtb \
imx8mp-dhcom-pdk3.dtb \
imx8mp-dhcom-pdk3-overlay-rev100.dtbo \
- imx8mp-evk.dtb \
imx8mp-icore-mx8mp-edimm2.2.dtb \
imx8mp-msc-sm2s.dtb \
imx8mp-phyboard-pollux-rdk.dtb \
diff --git a/arch/arm/dts/imx8mp-evk.dts b/arch/arm/dts/imx8mp-evk.dts
deleted file mode 100644
index 9f1469db554..000
--- a/arch/arm/dts/imx8mp-evk.dts
+++ /dev/null
@@ -1,684 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2019 NXP
- */
-
-/dts-v1/;
-
-#include
-#include "imx8mp.dtsi"
-
-/ {
- model = "NXP i.MX8MPlus EVK board";
- compatible = "fsl,imx8mp-evk", "fsl,imx8mp";
-
- chosen {
- stdout-path =
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <_gpio_led>;
-
- status {
- label = "yellow:status";
- gpios = < 16 GPIO_ACTIVE_HIGH>;
- default-state = "on";
- };
- };
-
- memory@4000 {
- device_type = "memory";
- reg = <0x0 0x4000 0 0xc000>,
- <0x1 0x 0 0xc000>;
- };
-
- pcie0_refclk: pcie0-refclk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <1>;
- };
-
- reg_can1_stby: regulator-can1-stby {
- compatible = "regulator-fixed";
- regulator-name = "can1-stby";
- pinctrl-names = "default";
- pinctrl-0 = <_flexcan1_reg>;
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 5 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_can2_stby: regulator-can2-stby {
- compatible = "regulator-fixed";
- regulator-name = "can2-stby";
- pinctrl-names = "default";
- pinctrl-0 = <_flexcan2_reg>;
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 27 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_pcie0: regulator-pcie {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <_pcie0_reg>;
- regulator-name = "MPCIE_3V3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 6 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_usdhc2_vmmc: regulator-usdhc2 {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <_reg_usdhc2_vmmc>;
- regulator-name = "VSD_3V3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 19 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-};
-
-_0 {
- cpu-supply = <_arm>;
-};
-
-_1 {
- cpu-supply = <_arm>;
-};
-
-_2 {
- cpu-supply = <_arm>;
-};
-
-_3 {
- cpu-supply = <_arm>;
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_eqos>;
- phy-mode = "rgmii-id";
- phy-handle = <>;
- snps,force_thresh_dma_mode;
- snps,mtl-tx-config = <_tx_setup>;
- snps,mtl-rx-config = <_rx_setup>;
- status = "okay";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@1 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <1>;
- eee-broken-1000t;
-
[PATCH v2 3/4] imx: imx8mn-evk: convert to OF_UPSTREAM
From: Peng Fan
Convert i.MX8MN-EVK and i.MX8MN-DDR4-EVK to OF_UPSTREAM
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile | 2 -
arch/arm/dts/imx8mn-ddr4-evk.dts | 160 --
arch/arm/dts/imx8mn-evk.dts | 128 --
arch/arm/mach-imx/imx8m/Kconfig | 2 +
configs/imx8mn_ddr4_evk_defconfig | 2 +-
configs/imx8mn_evk_defconfig | 2 +-
6 files changed, 4 insertions(+), 292 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b7992491389..56623d01240 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1085,9 +1085,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mm-verdin-wifi-dev.dtb \
imx8mn-bsh-smm-s2.dtb \
imx8mn-bsh-smm-s2pro.dtb \
- imx8mn-ddr4-evk.dtb \
imx8mq-cm.dtb \
- imx8mn-evk.dtb \
imx8mn-var-som-symphony.dtb \
imx8mm-beacon-kit.dtb \
imx8mn-beacon-kit.dtb \
diff --git a/arch/arm/dts/imx8mn-ddr4-evk.dts b/arch/arm/dts/imx8mn-ddr4-evk.dts
deleted file mode 100644
index d8ce217c601..000
--- a/arch/arm/dts/imx8mn-ddr4-evk.dts
+++ /dev/null
@@ -1,160 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2019 NXP
- */
-
-/dts-v1/;
-
-#include "imx8mn.dtsi"
-#include "imx8mn-evk.dtsi"
-
-/ {
- model = "NXP i.MX8MNano DDR4 EVK board";
- compatible = "fsl,imx8mn-ddr4-evk", "fsl,imx8mn";
-};
-
-_0 {
- cpu-supply = <_reg>;
-};
-
-_1 {
- cpu-supply = <_reg>;
-};
-
-_2 {
- cpu-supply = <_reg>;
-};
-
-_3 {
- cpu-supply = <_reg>;
-};
-
- {
- operating-points-v2 = <_opp_table>;
-
- ddrc_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-25M {
- opp-hz = /bits/ 64 <2500>;
- };
-
- opp-100M {
- opp-hz = /bits/ 64 <1>;
- };
-
- opp-600M {
- opp-hz = /bits/ 64 <6>;
- };
- };
-};
-
- {
- pmic@4b {
- compatible = "rohm,bd71847";
- reg = <0x4b>;
- pinctrl-names = "default";
- pinctrl-0 = <_pmic>;
- interrupt-parent = <>;
- interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
- rohm,reset-snvs-powered;
-
- #clock-cells = <0>;
- clocks = <_32k 0>;
- clock-output-names = "clk-32k-out";
-
- regulators {
- buck1_reg: BUCK1 {
- regulator-name = "buck1";
- regulator-min-microvolt = <70>;
- regulator-max-microvolt = <130>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <1250>;
- };
-
- buck2_reg: BUCK2 {
- regulator-name = "buck2";
- regulator-min-microvolt = <70>;
- regulator-max-microvolt = <130>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <1250>;
- };
-
- buck3_reg: BUCK3 {
- // BUCK5 in datasheet
- regulator-name = "buck3";
- regulator-min-microvolt = <70>;
- regulator-max-microvolt = <135>;
- };
-
- buck4_reg: BUCK4 {
- // BUCK6 in datasheet
- regulator-name = "buck4";
- regulator-min-microvolt = <300>;
- regulator-max-microvolt = <330>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck5_reg: BUCK5 {
- // BUCK7 in datasheet
- regulator-name = "buck5";
- regulator-min-microvolt = <1605000>;
- regulator-max-microvolt = <1995000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck6_reg: BUCK6 {
- // BUCK8 in datashee
[PATCH v2 2/4] imx: imx8mm_evk: convert to OF_UPSTREAM
From: Peng Fan
Convert i.MX8MM EVK to OF_UPSTREAM
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile | 1 -
arch/arm/dts/imx8mm-evk.dts | 128
arch/arm/dts/imx8mm-evk.dtsi | 615 --
arch/arm/mach-imx/imx8m/Kconfig | 1 +
configs/imx8mm_evk_defconfig | 2 +-
configs/imx8mm_evk_fspi_defconfig | 2 +-
6 files changed, 3 insertions(+), 746 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b76ee4d609b..b7992491389 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1074,7 +1074,6 @@ dtb-$(CONFIG_ARCH_IMX8ULP) += \
dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mm-data-modul-edm-sbc.dtb \
- imx8mm-evk.dtb \
imx8mm-icore-mx8mm-ctouch2.dtb \
imx8mm-icore-mx8mm-edimm2.2.dtb \
imx8mm-kontron-bl.dtb \
diff --git a/arch/arm/dts/imx8mm-evk.dts b/arch/arm/dts/imx8mm-evk.dts
deleted file mode 100644
index a2b24d4d4e3..000
--- a/arch/arm/dts/imx8mm-evk.dts
+++ /dev/null
@@ -1,128 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2019-2020 NXP
- */
-
-/dts-v1/;
-
-#include
-#include "imx8mm-evk.dtsi"
-
-/ {
- model = "FSL i.MX8MM EVK board";
- compatible = "fsl,imx8mm-evk", "fsl,imx8mm";
-
- aliases {
- spi0 =
- };
-};
-
- {
- operating-points-v2 = <_opp_table>;
-
- ddrc_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-25M {
- opp-hz = /bits/ 64 <2500>;
- };
-
- opp-100M {
- opp-hz = /bits/ 64 <1>;
- };
-
- opp-750M {
- opp-hz = /bits/ 64 <75000>;
- };
- };
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_flexspi>;
- status = "okay";
-
- flash@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- spi-max-frequency = <8000>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <4>;
- };
-};
-
- {
- assigned-clocks = < IMX8MM_CLK_USDHC3_ROOT>;
- assigned-clock-rates = <4>;
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <_usdhc3>;
- pinctrl-1 = <_usdhc3_100mhz>;
- pinctrl-2 = <_usdhc3_200mhz>;
- bus-width = <8>;
- non-removable;
- status = "okay";
-};
-
- {
- pinctrl_flexspi: flexspigrp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
- MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B0x82
- MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
- MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
- MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
- MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
- >;
- };
-
- pinctrl_usdhc3: usdhc3grp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA50x1d0
- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA60x1d0
- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
- >;
- };
-
- pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x
[PATCH v2 1/4] imx: imx8mq_evk: convert to OF_UPSTREAM
From: Peng Fan
Convert i.MX8MQ EVK to OF_UPSTREAM
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile | 1 -
arch/arm/dts/imx8mq-evk.dts | 712
arch/arm/mach-imx/imx8m/Kconfig | 1 +
configs/imx8mq_evk_defconfig| 2 +-
4 files changed, 2 insertions(+), 714 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d85a33055c9..b76ee4d609b 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1090,7 +1090,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-cm.dtb \
imx8mn-evk.dtb \
imx8mn-var-som-symphony.dtb \
- imx8mq-evk.dtb \
imx8mm-beacon-kit.dtb \
imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
diff --git a/arch/arm/dts/imx8mq-evk.dts b/arch/arm/dts/imx8mq-evk.dts
deleted file mode 100644
index 82387b9cb80..000
--- a/arch/arm/dts/imx8mq-evk.dts
+++ /dev/null
@@ -1,712 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2017 NXP
- * Copyright (C) 2017-2018 Pengutronix, Lucas Stach
- */
-
-/dts-v1/;
-
-#include "imx8mq.dtsi"
-
-/ {
- model = "NXP i.MX8MQ EVK";
- compatible = "fsl,imx8mq-evk", "fsl,imx8mq";
-
- chosen {
- stdout-path =
- };
-
- memory@4000 {
- device_type = "memory";
- reg = <0x 0x4000 0 0xc000>;
- };
-
- pcie0_refclk: pcie0-refclk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <1>;
- };
-
- reg_pcie1: regulator-pcie {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <_pcie1_reg>;
- regulator-name = "MPCIE_3V3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 10 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_usdhc2_vmmc: regulator-vsd-3v3 {
- pinctrl-names = "default";
- pinctrl-0 = <_reg_usdhc2>;
- compatible = "regulator-fixed";
- regulator-name = "VSD_3V3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 19 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- buck2_reg: regulator-buck2 {
- pinctrl-names = "default";
- pinctrl-0 = <_buck2>;
- compatible = "regulator-gpio";
- regulator-name = "vdd_arm";
- regulator-min-microvolt = <90>;
- regulator-max-microvolt = <100>;
- gpios = < 13 GPIO_ACTIVE_HIGH>;
- states = <100 0x0
- 90 0x1>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ir-receiver {
- compatible = "gpio-ir-receiver";
- gpios = < 12 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <_ir>;
- linux,autosuspend-period = <125>;
- };
-
- audio_codec_bt_sco: audio-codec-bt-sco {
- compatible = "linux,bt-sco";
- #sound-dai-cells = <1>;
- };
-
- wm8524: audio-codec {
- #sound-dai-cells = <0>;
- compatible = "wlf,wm8524";
- wlf,mute-gpios = < 8 GPIO_ACTIVE_LOW>;
- };
-
- sound-bt-sco {
- compatible = "simple-audio-card";
- simple-audio-card,name = "bt-sco-audio";
- simple-audio-card,format = "dsp_a";
- simple-audio-card,bitclock-inversion;
- simple-audio-card,frame-master = <>;
- simple-audio-card,bitclock-master = <>;
-
- btcpu: simple-audio-card,cpu {
- sound-dai = <>;
- dai-tdm-slot-num = <2>;
- dai-tdm-slot-width = <16>;
- };
-
- simple-audio-card,codec {
- sound-dai = <_codec_bt_sco 1>;
- };
- };
-
- sound-wm8524 {
- compatible = "simple-audio-card";
- simple-audio-card,name = "wm8524-audio";
- simple-audio-card,format = "i2s";
- simple-audio-card,frame-master = <>;
- simple-audio-card,bitclock-master = <>;
- simple-audio-card,widgets =
-
[PATCH v2 0/4] imx8m: convert i.MX8MM/Q/N/P-EVK to OF_UPSTREAM
This patchset is to convert NXP i.MX8M[Q,M,N,P] EVK boards to OF_UPSTREAM Signed-off-by: Peng Fan --- Changes in v2: - Sorry for the quick respin. - Drop the dtb build in arch/arm/dts/Makefile - Link to v1: https://lore.kernel.org/r/20240328-imx8m-v1-0-2be5e6657...@nxp.com --- Peng Fan (4): imx: imx8mq_evk: convert to OF_UPSTREAM imx: imx8mm_evk: convert to OF_UPSTREAM imx: imx8mn-evk: convert to OF_UPSTREAM imx: imx8mp_evk: convert to OF_UPSTREAM arch/arm/dts/Makefile | 5 - arch/arm/dts/imx8mm-evk.dts | 128 --- arch/arm/dts/imx8mm-evk.dtsi | 615 arch/arm/dts/imx8mn-ddr4-evk.dts | 160 - arch/arm/dts/imx8mn-evk.dts | 128 --- arch/arm/dts/imx8mp-evk.dts | 684 arch/arm/dts/imx8mq-evk.dts | 712 -- arch/arm/mach-imx/imx8m/Kconfig | 5 + configs/imx8mm_evk_defconfig | 2 +- configs/imx8mm_evk_fspi_defconfig | 2 +- configs/imx8mn_ddr4_evk_defconfig | 2 +- configs/imx8mn_evk_defconfig | 2 +- configs/imx8mp_evk_defconfig | 2 +- configs/imx8mq_evk_defconfig | 2 +- 14 files changed, 11 insertions(+), 2438 deletions(-) --- base-commit: ab8d9ca3044acf51d8ff3bf3c4718c48f30ad606 change-id: 20240328-imx8m-b6e89715c5dc Best regards, -- Peng Fan
RE: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM
> Subject: Re: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to > OF_UPSTREAM > > Hi Peng, > > On Wed, Mar 27, 2024 at 9:40 PM Peng Fan wrote: > > > I could help convert all imx93 boards, but I could only test nxp > > imx93 boards, not able to test others. > > Just copy the board maintainers in your patch and they could help test the > conversion to OF_UPSTREAM. ok, I need use v6.9-rc1-dts for the dts upstream. Some dts not in v6.8-dts. Thanks, Peng. > > Thanks!
RE: [PATCH 4/4] imx: imx8mp_evk: convert to OF_UPSTREAM
> Subject: Re: [PATCH 4/4] imx: imx8mp_evk: convert to OF_UPSTREAM > > Hi Peng, > > On Wed, Mar 27, 2024 at 10:27 PM Peng Fan (OSS) > wrote: > > > --- a/arch/arm/dts/Makefile > > +++ b/arch/arm/dts/Makefile > > @@ -1105,7 +1105,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \ > > imx8mp-dhcom-pdk2.dtb \ > > imx8mp-dhcom-pdk3.dtb \ > > imx8mp-dhcom-pdk3-overlay-rev100.dtbo \ > > - imx8mp-evk.dtb \ > > Here you removed imx8mp-evk.dtb from the Makefile, which is correct. > > You should do the same on the other patches. Oh, yes. > > Have you boot-tested all these boards? Tested imx8m/n/p evk. Not have imx8mq evk at hand. But checked dts for imx8mq, there is no difference that would affect uboot boot. Regards, Peng.
[PATCH 4/4] imx: imx8mp_evk: convert to OF_UPSTREAM
From: Peng Fan
Convert to OF_UPSTREAM for i.MX8MP EVK
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile | 1 -
arch/arm/dts/imx8mp-evk.dts | 684
arch/arm/mach-imx/imx8m/Kconfig | 1 +
configs/imx8mp_evk_defconfig| 2 +-
4 files changed, 2 insertions(+), 686 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d85a33055c9..55e9ab0725e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1105,7 +1105,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mp-dhcom-pdk2.dtb \
imx8mp-dhcom-pdk3.dtb \
imx8mp-dhcom-pdk3-overlay-rev100.dtbo \
- imx8mp-evk.dtb \
imx8mp-icore-mx8mp-edimm2.2.dtb \
imx8mp-msc-sm2s.dtb \
imx8mp-phyboard-pollux-rdk.dtb \
diff --git a/arch/arm/dts/imx8mp-evk.dts b/arch/arm/dts/imx8mp-evk.dts
deleted file mode 100644
index 9f1469db554..000
--- a/arch/arm/dts/imx8mp-evk.dts
+++ /dev/null
@@ -1,684 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2019 NXP
- */
-
-/dts-v1/;
-
-#include
-#include "imx8mp.dtsi"
-
-/ {
- model = "NXP i.MX8MPlus EVK board";
- compatible = "fsl,imx8mp-evk", "fsl,imx8mp";
-
- chosen {
- stdout-path =
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <_gpio_led>;
-
- status {
- label = "yellow:status";
- gpios = < 16 GPIO_ACTIVE_HIGH>;
- default-state = "on";
- };
- };
-
- memory@4000 {
- device_type = "memory";
- reg = <0x0 0x4000 0 0xc000>,
- <0x1 0x 0 0xc000>;
- };
-
- pcie0_refclk: pcie0-refclk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <1>;
- };
-
- reg_can1_stby: regulator-can1-stby {
- compatible = "regulator-fixed";
- regulator-name = "can1-stby";
- pinctrl-names = "default";
- pinctrl-0 = <_flexcan1_reg>;
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 5 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_can2_stby: regulator-can2-stby {
- compatible = "regulator-fixed";
- regulator-name = "can2-stby";
- pinctrl-names = "default";
- pinctrl-0 = <_flexcan2_reg>;
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 27 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_pcie0: regulator-pcie {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <_pcie0_reg>;
- regulator-name = "MPCIE_3V3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 6 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_usdhc2_vmmc: regulator-usdhc2 {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <_reg_usdhc2_vmmc>;
- regulator-name = "VSD_3V3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 19 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-};
-
-_0 {
- cpu-supply = <_arm>;
-};
-
-_1 {
- cpu-supply = <_arm>;
-};
-
-_2 {
- cpu-supply = <_arm>;
-};
-
-_3 {
- cpu-supply = <_arm>;
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_eqos>;
- phy-mode = "rgmii-id";
- phy-handle = <>;
- snps,force_thresh_dma_mode;
- snps,mtl-tx-config = <_tx_setup>;
- snps,mtl-rx-config = <_rx_setup>;
- status = "okay";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@1 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <1>;
- eee-broken-1000t;
-
[PATCH 3/4] imx: imx8mn-evk: convert to OF_UPSTREAM
From: Peng Fan
Convert i.MX8MN-EVK and i.MX8MN-DDR4-EVK to OF_UPSTREAM
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mn-ddr4-evk.dts | 160 --
arch/arm/dts/imx8mn-evk.dts | 128 --
arch/arm/mach-imx/imx8m/Kconfig | 2 +
configs/imx8mn_ddr4_evk_defconfig | 2 +-
configs/imx8mn_evk_defconfig | 2 +-
5 files changed, 4 insertions(+), 290 deletions(-)
diff --git a/arch/arm/dts/imx8mn-ddr4-evk.dts b/arch/arm/dts/imx8mn-ddr4-evk.dts
deleted file mode 100644
index d8ce217c601..000
--- a/arch/arm/dts/imx8mn-ddr4-evk.dts
+++ /dev/null
@@ -1,160 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2019 NXP
- */
-
-/dts-v1/;
-
-#include "imx8mn.dtsi"
-#include "imx8mn-evk.dtsi"
-
-/ {
- model = "NXP i.MX8MNano DDR4 EVK board";
- compatible = "fsl,imx8mn-ddr4-evk", "fsl,imx8mn";
-};
-
-_0 {
- cpu-supply = <_reg>;
-};
-
-_1 {
- cpu-supply = <_reg>;
-};
-
-_2 {
- cpu-supply = <_reg>;
-};
-
-_3 {
- cpu-supply = <_reg>;
-};
-
- {
- operating-points-v2 = <_opp_table>;
-
- ddrc_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-25M {
- opp-hz = /bits/ 64 <2500>;
- };
-
- opp-100M {
- opp-hz = /bits/ 64 <1>;
- };
-
- opp-600M {
- opp-hz = /bits/ 64 <6>;
- };
- };
-};
-
- {
- pmic@4b {
- compatible = "rohm,bd71847";
- reg = <0x4b>;
- pinctrl-names = "default";
- pinctrl-0 = <_pmic>;
- interrupt-parent = <>;
- interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
- rohm,reset-snvs-powered;
-
- #clock-cells = <0>;
- clocks = <_32k 0>;
- clock-output-names = "clk-32k-out";
-
- regulators {
- buck1_reg: BUCK1 {
- regulator-name = "buck1";
- regulator-min-microvolt = <70>;
- regulator-max-microvolt = <130>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <1250>;
- };
-
- buck2_reg: BUCK2 {
- regulator-name = "buck2";
- regulator-min-microvolt = <70>;
- regulator-max-microvolt = <130>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <1250>;
- };
-
- buck3_reg: BUCK3 {
- // BUCK5 in datasheet
- regulator-name = "buck3";
- regulator-min-microvolt = <70>;
- regulator-max-microvolt = <135>;
- };
-
- buck4_reg: BUCK4 {
- // BUCK6 in datasheet
- regulator-name = "buck4";
- regulator-min-microvolt = <300>;
- regulator-max-microvolt = <330>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck5_reg: BUCK5 {
- // BUCK7 in datasheet
- regulator-name = "buck5";
- regulator-min-microvolt = <1605000>;
- regulator-max-microvolt = <1995000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck6_reg: BUCK6 {
- // BUCK8 in datasheet
- regulator-name = "buck6";
- regulator-min-microvolt = <80>;
- regulator-max-microvolt = <140>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo1_reg: LDO1 {
- regulator-name = "ldo1";
- regulator-min-microvolt = <160>;
-
[PATCH 2/4] imx: imx8mm_evk: convert to OF_UPSTREAM
From: Peng Fan
Convert i.MX8MM EVK to OF_UPSTREAM
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mm-evk.dts | 128
arch/arm/dts/imx8mm-evk.dtsi | 615 --
arch/arm/mach-imx/imx8m/Kconfig | 1 +
configs/imx8mm_evk_defconfig | 2 +-
configs/imx8mm_evk_fspi_defconfig | 2 +-
5 files changed, 3 insertions(+), 745 deletions(-)
diff --git a/arch/arm/dts/imx8mm-evk.dts b/arch/arm/dts/imx8mm-evk.dts
deleted file mode 100644
index a2b24d4d4e3..000
--- a/arch/arm/dts/imx8mm-evk.dts
+++ /dev/null
@@ -1,128 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2019-2020 NXP
- */
-
-/dts-v1/;
-
-#include
-#include "imx8mm-evk.dtsi"
-
-/ {
- model = "FSL i.MX8MM EVK board";
- compatible = "fsl,imx8mm-evk", "fsl,imx8mm";
-
- aliases {
- spi0 =
- };
-};
-
- {
- operating-points-v2 = <_opp_table>;
-
- ddrc_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-25M {
- opp-hz = /bits/ 64 <2500>;
- };
-
- opp-100M {
- opp-hz = /bits/ 64 <1>;
- };
-
- opp-750M {
- opp-hz = /bits/ 64 <75000>;
- };
- };
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_flexspi>;
- status = "okay";
-
- flash@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- spi-max-frequency = <8000>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <4>;
- };
-};
-
- {
- assigned-clocks = < IMX8MM_CLK_USDHC3_ROOT>;
- assigned-clock-rates = <4>;
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <_usdhc3>;
- pinctrl-1 = <_usdhc3_100mhz>;
- pinctrl-2 = <_usdhc3_200mhz>;
- bus-width = <8>;
- non-removable;
- status = "okay";
-};
-
- {
- pinctrl_flexspi: flexspigrp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
- MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B0x82
- MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
- MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
- MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
- MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
- >;
- };
-
- pinctrl_usdhc3: usdhc3grp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA50x1d0
- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA60x1d0
- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
- >;
- };
-
- pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA50x1d4
- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA60x1d4
- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
- >;
- };
-
- pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
- fsl,pi
[PATCH 1/4] imx: imx8mq_evk: convert to OF_UPSTREAM
From: Peng Fan
Convert i.MX8MQ EVK to OF_UPSTREAM
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mq-evk.dts | 712
arch/arm/mach-imx/imx8m/Kconfig | 1 +
configs/imx8mq_evk_defconfig| 2 +-
3 files changed, 2 insertions(+), 713 deletions(-)
diff --git a/arch/arm/dts/imx8mq-evk.dts b/arch/arm/dts/imx8mq-evk.dts
deleted file mode 100644
index 82387b9cb80..000
--- a/arch/arm/dts/imx8mq-evk.dts
+++ /dev/null
@@ -1,712 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2017 NXP
- * Copyright (C) 2017-2018 Pengutronix, Lucas Stach
- */
-
-/dts-v1/;
-
-#include "imx8mq.dtsi"
-
-/ {
- model = "NXP i.MX8MQ EVK";
- compatible = "fsl,imx8mq-evk", "fsl,imx8mq";
-
- chosen {
- stdout-path =
- };
-
- memory@4000 {
- device_type = "memory";
- reg = <0x 0x4000 0 0xc000>;
- };
-
- pcie0_refclk: pcie0-refclk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <1>;
- };
-
- reg_pcie1: regulator-pcie {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <_pcie1_reg>;
- regulator-name = "MPCIE_3V3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 10 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_usdhc2_vmmc: regulator-vsd-3v3 {
- pinctrl-names = "default";
- pinctrl-0 = <_reg_usdhc2>;
- compatible = "regulator-fixed";
- regulator-name = "VSD_3V3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 19 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- buck2_reg: regulator-buck2 {
- pinctrl-names = "default";
- pinctrl-0 = <_buck2>;
- compatible = "regulator-gpio";
- regulator-name = "vdd_arm";
- regulator-min-microvolt = <90>;
- regulator-max-microvolt = <100>;
- gpios = < 13 GPIO_ACTIVE_HIGH>;
- states = <100 0x0
- 90 0x1>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ir-receiver {
- compatible = "gpio-ir-receiver";
- gpios = < 12 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <_ir>;
- linux,autosuspend-period = <125>;
- };
-
- audio_codec_bt_sco: audio-codec-bt-sco {
- compatible = "linux,bt-sco";
- #sound-dai-cells = <1>;
- };
-
- wm8524: audio-codec {
- #sound-dai-cells = <0>;
- compatible = "wlf,wm8524";
- wlf,mute-gpios = < 8 GPIO_ACTIVE_LOW>;
- };
-
- sound-bt-sco {
- compatible = "simple-audio-card";
- simple-audio-card,name = "bt-sco-audio";
- simple-audio-card,format = "dsp_a";
- simple-audio-card,bitclock-inversion;
- simple-audio-card,frame-master = <>;
- simple-audio-card,bitclock-master = <>;
-
- btcpu: simple-audio-card,cpu {
- sound-dai = <>;
- dai-tdm-slot-num = <2>;
- dai-tdm-slot-width = <16>;
- };
-
- simple-audio-card,codec {
- sound-dai = <_codec_bt_sco 1>;
- };
- };
-
- sound-wm8524 {
- compatible = "simple-audio-card";
- simple-audio-card,name = "wm8524-audio";
- simple-audio-card,format = "i2s";
- simple-audio-card,frame-master = <>;
- simple-audio-card,bitclock-master = <>;
- simple-audio-card,widgets =
- "Line", "Left Line Out Jack",
- "Line", "Right Line Out Jack";
- simple-audio-card,routing =
- "Left Line Out Jack", "LINEVOUTL",
- "Right Line Out Jack", "LINEVOUTR";
-
- cpudai: simple-audio-card,cpu {
- sound-dai = <>;
-
[PATCH 0/4] imx8m: convert i.MX8MM/Q/N/P-EVK to OF_UPSTREAM
This patchset is to convert NXP i.MX8M[Q,M,N,P] EVK boards to OF_UPSTREAM Signed-off-by: Peng Fan --- Peng Fan (4): imx: imx8mq_evk: convert to OF_UPSTREAM imx: imx8mm_evk: convert to OF_UPSTREAM imx: imx8mn-evk: convert to OF_UPSTREAM imx: imx8mp_evk: convert to OF_UPSTREAM arch/arm/dts/Makefile | 1 - arch/arm/dts/imx8mm-evk.dts | 128 --- arch/arm/dts/imx8mm-evk.dtsi | 615 arch/arm/dts/imx8mn-ddr4-evk.dts | 160 - arch/arm/dts/imx8mn-evk.dts | 128 --- arch/arm/dts/imx8mp-evk.dts | 684 arch/arm/dts/imx8mq-evk.dts | 712 -- arch/arm/mach-imx/imx8m/Kconfig | 5 + configs/imx8mm_evk_defconfig | 2 +- configs/imx8mm_evk_fspi_defconfig | 2 +- configs/imx8mn_ddr4_evk_defconfig | 2 +- configs/imx8mn_evk_defconfig | 2 +- configs/imx8mp_evk_defconfig | 2 +- configs/imx8mq_evk_defconfig | 2 +- 14 files changed, 11 insertions(+), 2434 deletions(-) --- base-commit: ab8d9ca3044acf51d8ff3bf3c4718c48f30ad606 change-id: 20240328-imx8m-b6e89715c5dc Best regards, -- Peng Fan
RE: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM
> Subject: Re: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to
> OF_UPSTREAM
>
> On Wed, Mar 27, 2024 at 8:53 PM Peng Fan (OSS)
> wrote:
>
> > + {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + clock-frequency = <40>;
> > + pinctrl-names = "default", "sleep";
> > + pinctrl-0 = <_lpi2c2>;
> > + pinctrl-1 = <_lpi2c2>;
> > + status = "okay";
> > +
> > + pmic@25 {
>
> > + adp5585gpio: gpio@34 {
> > + compatible = "adp5585";
> > + reg = <0x34>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
>
> Please add a comment saying these nodes are already available in 6.9-rc1.
>
> > --- a/arch/arm/mach-imx/imx9/Kconfig
> > +++ b/arch/arm/mach-imx/imx9/Kconfig
> > @@ -31,6 +31,7 @@ choice
> > config TARGET_IMX93_11X11_EVK
> > bool "imx93_11x11_evk"
> > select IMX93
> > + imply OF_UPSTREAM
>
> Sumit and I asked you to add OF_UPSTREAM to all imx93 boards, not just this
> one.
I could help convert all imx93 boards, but I could only test nxp
imx93 boards, not able to test others.
Thanks,
Peng.
>
> Please don't ignore review comments.
[PATCH v3 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM
From: Peng Fan
Convert to OF_UPSTREAM for i.MX93 11x11 EVK.
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile| 1 -
arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 118 +++
arch/arm/dts/imx93-11x11-evk.dts | 322 ---
arch/arm/dts/imx93-u-boot.dtsi | 15 ++
arch/arm/mach-imx/imx9/Kconfig | 1 +
configs/imx93_11x11_evk_defconfig| 2 +-
configs/imx93_11x11_evk_ld_defconfig | 2 +-
7 files changed, 136 insertions(+), 325 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d85a33055c9..71c2facfb5e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1115,7 +1115,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-librem5-r4.dtb
dtb-$(CONFIG_ARCH_IMX9) += \
- imx93-11x11-evk.dtb \
imx93-var-som-symphony.dtb \
imx93-phyboard-segin.dtb
diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
index a99ba99bfb4..408e601bc90 100644
--- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
@@ -26,6 +26,111 @@
bootph-pre-ram;
};
+ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <40>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_lpi2c2>;
+ pinctrl-1 = <_lpi2c2>;
+ status = "okay";
+
+ pmic@25 {
+ compatible = "nxp,pca9451a";
+ reg = <0x25>;
+ interrupt-parent = <>;
+ interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+
+ regulators {
+ buck1: BUCK1 {
+ regulator-name = "BUCK1";
+ regulator-min-microvolt = <65>;
+ regulator-max-microvolt = <2237500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck2: BUCK2 {
+ regulator-name = "BUCK2";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <2187500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck4: BUCK4{
+ regulator-name = "BUCK4";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck5: BUCK5{
+ regulator-name = "BUCK5";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck6: BUCK6 {
+ regulator-name = "BUCK6";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1: LDO1 {
+ regulator-name = "LDO1";
+ regulator-min-microvolt = <160>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo4: LDO4 {
+ regulator-name = "LDO4";
+ regulator-min-microvolt = <80>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo5: LDO5 {
+ regulator-name = "LDO5";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
[PATCH v3 5/6] dt-bindings: imx93: sync clock header
From: Peng Fan Sync clock header with kernel 6.8 Signed-off-by: Peng Fan --- include/dt-bindings/clock/imx93-clock.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/dt-bindings/clock/imx93-clock.h b/include/dt-bindings/clock/imx93-clock.h index 35a1f62053a..787c9e74dc9 100644 --- a/include/dt-bindings/clock/imx93-clock.h +++ b/include/dt-bindings/clock/imx93-clock.h @@ -203,6 +203,7 @@ #define IMX93_CLK_ARM_PLL 198 #define IMX93_CLK_A55_SEL 199 #define IMX93_CLK_A55_CORE 200 -#define IMX93_CLK_END 201 +#define IMX93_CLK_PDM_IPG 201 +#define IMX93_CLK_END 202 #endif -- 2.35.3
[PATCH v3 4/6] clk: imx93: fix anatop base
From: Peng Fan
The PLL clk needs use anatop base, otherwise wrong PLL address will
be used.
Fixes: 9c153e46661b ("clk: imx: add i.MX93 CCF driver")
Signed-off-by: Peng Fan
---
drivers/clk/imx/clk-imx93.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
index ce10d795316..f0cb797d975 100644
--- a/drivers/clk/imx/clk-imx93.c
+++ b/drivers/clk/imx/clk-imx93.c
@@ -289,7 +289,7 @@ static int imx93_clk_probe(struct udevice *dev)
clk_dm(IMX93_CLK_SYS_PLL_PFD2_DIV2,
imx_clk_fixed_factor("sys_pll_pfd2_div2", "sys_pll_pfd2", 1, 2));
- base = (void *)ANATOP_BASE_ADDR;
+ anatop_base = (void *)ANATOP_BASE_ADDR;
clk_dm(IMX93_CLK_ARM_PLL,
imx_clk_fracn_gppll_integer("arm_pll", "clock-osc-24m",
--
2.35.3
[PATCH v3 3/6] cpu: drop imx9_cpu
From: Peng Fan
This was wrongly committed, no user, remove it.
Signed-off-by: Peng Fan
---
drivers/cpu/imx9_cpu.c | 224 -
1 file changed, 224 deletions(-)
diff --git a/drivers/cpu/imx9_cpu.c b/drivers/cpu/imx9_cpu.c
deleted file mode 100644
index 66534fe6d17..000
--- a/drivers/cpu/imx9_cpu.c
+++ /dev/null
@@ -1,224 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2019 NXP
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct cpu_imx_plat {
- const char *name;
- const char *rev;
- const char *type;
- u32 cpu_rsrc;
- u32 cpurev;
- u32 freq_mhz;
- u32 mpidr;
-};
-
-const char *get_imx9_type(u32 imxtype)
-{
- switch (imxtype) {
- case MXC_CPU_IMX93:
- return "93";
- default:
- return "??";
- }
-}
-
-const char *get_imx9_rev(u32 rev)
-{
- switch (rev) {
- case CHIP_REV_1_0:
- return "1.";
- case CHIP_REV_B:
- return "B";
- case CHIP_REV_C:
- return "C";
- default:
- return "?";
- }
-}
-
-static void set_core_data(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (device_is_compatible(dev, "arm,cortex-a35"))
- plat->name = "A35";
- else
- plat->name = "?";
-}
-
-#if IS_ENABLED(CONFIG_IMX_SCU_THERMAL)
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- struct udevice *thermal_dev;
- int cpu_tmp, ret;
- int idx = 1; /* use "cpu-thermal0" device */
-
- if (plat->cpu_rsrc == SC_R_A72)
- idx = 2; /* use "cpu-thermal1" device */
-
- ret = uclass_get_device(UCLASS_THERMAL, idx, _dev);
- if (!ret) {
- ret = thermal_get_temp(thermal_dev, _tmp);
- if (ret)
- return 0xdeadbeef;
- } else {
- return 0xdeadbeef;
- }
-
- return cpu_tmp;
-}
-#else
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- return 0;
-}
-#endif
-
-int cpu_imx_get_desc(const struct udevice *dev, char *buf, int size)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
- int ret, temp;
-
- if (size < 100)
- return -ENOSPC;
-
- ret = snprintf(buf, size, "NXP i.MX8%s Rev%s %s at %u MHz",
- plat->type, plat->rev, plat->name, plat->freq_mhz);
-
- if (IS_ENABLED(CONFIG_IMX_SCU_THERMAL)) {
- temp = cpu_imx_get_temp(plat);
- buf = buf + ret;
- size = size - ret;
- if (temp != 0xdeadbeef)
- ret = snprintf(buf, size, " at %dC", temp);
- else
- ret = snprintf(buf, size, " - invalid sensor data");
- }
-
- snprintf(buf + ret, size - ret, "\n");
-
- return 0;
-}
-
-static int cpu_imx_get_info(const struct udevice *dev, struct cpu_info *info)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- info->cpu_freq = plat->freq_mhz * 1000;
- info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU);
- return 0;
-}
-
-static int cpu_imx_get_count(const struct udevice *dev)
-{
- ofnode node;
- int num = 0;
-
- ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) {
- const char *device_type;
-
- if (!ofnode_is_enabled(node))
- continue;
-
- device_type = ofnode_read_string(node, "device_type");
- if (!device_type)
- continue;
-
- if (!strcmp(device_type, "cpu"))
- num++;
- }
-
- return num;
-}
-
-static int cpu_imx_get_vendor(const struct udevice *dev, char *buf, int size)
-{
- snprintf(buf, size, "NXP");
- return 0;
-}
-
-static int cpu_imx_is_current(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (plat->mpidr == (read_mpidr() & 0x))
- return 1;
-
- return 0;
-}
-
-static const struct cpu_ops cpu_imx9_ops = {
- .get_desc = cpu_imx_get_desc,
- .get_info = cpu_imx_get_info,
- .get_count = cpu_imx_get_count,
- .get_vendor = cpu_imx_get_vendor,
- .is_current = cpu_imx_is_current,
-};
-
-static const struct udevice_id cpu_imx9_ids[] = {
- { .compatible = "arm,cortex-a35" },
- { .compatible = "arm,cortex-a53" },
- { .compatible = "arm,cortex-a72" },
- { }
-};
-
-static ulong imx9_ge
[PATCH v3 2/6] serial: lpuart: use ipg clk for i.MX7ULP
From: Peng Fan
To i.MX7ULP compatible lpuart, there is only ipg clk, no per clk.
So add a devtype check for i.MX7ULP.
Signed-off-by: Peng Fan
---
drivers/serial/serial_lpuart.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index ce08a6b4486..653ff99e67b 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -111,11 +111,18 @@ u32 __weak get_lpuart_clk(void)
#if CONFIG_IS_ENABLED(CLK)
static int get_lpuart_clk_rate(struct udevice *dev, u32 *clk)
{
+ struct lpuart_serial_plat *plat = dev_get_plat(dev);
struct clk per_clk;
ulong rate;
int ret;
+ char *name;
- ret = clk_get_by_name(dev, "per", _clk);
+ if (plat->devtype == DEV_MX7ULP)
+ name = "ipg";
+ else
+ name = "per";
+
+ ret = clk_get_by_name(dev, name, _clk);
if (ret) {
dev_err(dev, "Failed to get per clk: %d\n", ret);
return ret;
--
2.35.3
[PATCH v3 1/6] gpio: imx_rgpio2p: support one address
From: Peng Fan
The i.MX8ULP/93 gpio dt-schema have been updated to only have one
address entry, update the driver to support it.
Signed-off-by: Peng Fan
---
drivers/gpio/imx_rgpio2p.c | 42 ++
1 file changed, 38 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/imx_rgpio2p.c b/drivers/gpio/imx_rgpio2p.c
index 175e460aff5..3227a8d5b57 100644
--- a/drivers/gpio/imx_rgpio2p.c
+++ b/drivers/gpio/imx_rgpio2p.c
@@ -21,6 +21,12 @@ enum imx_rgpio2p_direction {
#define GPIO_PER_BANK 32
+struct imx_rgpio2p_soc_data {
+ bool have_dual_base;
+};
+
+#define IMX8ULP_GPIO_BASE_OFF 0x40
+
struct imx_rgpio2p_data {
struct gpio_regs *regs;
};
@@ -165,6 +171,9 @@ static int imx_rgpio2p_probe(struct udevice *dev)
static int imx_rgpio2p_bind(struct udevice *dev)
{
struct imx_rgpio2p_plat *plat = dev_get_plat(dev);
+ struct imx_rgpio2p_soc_data *data =
+ (struct imx_rgpio2p_soc_data *)dev_get_driver_data(dev);
+ bool dual_base = data->have_dual_base;
fdt_addr_t addr;
/*
@@ -176,9 +185,26 @@ static int imx_rgpio2p_bind(struct udevice *dev)
if (plat)
return 0;
- addr = devfdt_get_addr_index(dev, 1);
- if (addr == FDT_ADDR_T_NONE)
- return -EINVAL;
+ /*
+* Handle legacy compatible combinations which used two reg values
+* for the i.MX8ULP and i.MX93.
+*/
+ if (device_is_compatible(dev, "fsl,imx7ulp-gpio") &&
+ (device_is_compatible(dev, "fsl,imx93-gpio") ||
+ (device_is_compatible(dev, "fsl,imx8ulp-gpio"
+ dual_base = true;
+
+ if (dual_base) {
+ addr = devfdt_get_addr_index(dev, 1);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+ } else {
+ addr = devfdt_get_addr_index(dev, 0);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ addr += IMX8ULP_GPIO_BASE_OFF;
+ }
/*
* TODO:
@@ -202,9 +228,17 @@ static int imx_rgpio2p_bind(struct udevice *dev)
return 0;
}
+static struct imx_rgpio2p_soc_data imx7ulp_data = {
+ .have_dual_base = true,
+};
+
+static struct imx_rgpio2p_soc_data imx8ulp_data = {
+ .have_dual_base = false,
+};
static const struct udevice_id imx_rgpio2p_ids[] = {
- { .compatible = "fsl,imx7ulp-gpio" },
+ { .compatible = "fsl,imx7ulp-gpio", .data = (ulong)_data },
+ { .compatible = "fsl,imx8ulp-gpio", .data = (ulong)_data },
{ }
};
--
2.35.3
[PATCH v3 0/6] imx93-11x11-evk: convert to OF_UPSTREAM
To support OF_UPSTREAM, a few driver changes are included. For TMU, still use U-Boot node, I will prepare a kernel update, then back to U-Boot support. Add the pmic nodes to x-u-boot.dtsi, since upstream still not has it. imx93.dtsi still kept because other boards still use it as of now. Signed-off-by: Peng Fan --- Changes in v3: - Update patch 5, to drop the imx8mp-evk changes which are wrongly included - Link to v2: https://lore.kernel.org/r/20240328-imx93-of-v2-0-909f5d37d...@nxp.com Changes in v2: - Add a new patch to sync clock header to avoid breaking - Drop the Makefile change which change including order - Link to v1: https://lore.kernel.org/r/20240327-imx93-of-v1-0-afab6b314...@nxp.com --- Peng Fan (6): gpio: imx_rgpio2p: support one address serial: lpuart: use ipg clk for i.MX7ULP cpu: drop imx9_cpu clk: imx93: fix anatop base dt-bindings: imx93: sync clock header imx: imx93-11x11-evk: convert to OF_UPSTREAM arch/arm/dts/Makefile| 1 - arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 118 +++ arch/arm/dts/imx93-11x11-evk.dts | 322 --- arch/arm/dts/imx93-u-boot.dtsi | 15 ++ arch/arm/mach-imx/imx9/Kconfig | 1 + configs/imx93_11x11_evk_defconfig| 2 +- configs/imx93_11x11_evk_ld_defconfig | 2 +- drivers/clk/imx/clk-imx93.c | 2 +- drivers/cpu/imx9_cpu.c | 224 - drivers/gpio/imx_rgpio2p.c | 42 +++- drivers/serial/serial_lpuart.c | 9 +- include/dt-bindings/clock/imx93-clock.h | 3 +- 12 files changed, 185 insertions(+), 556 deletions(-) --- base-commit: ab8d9ca3044acf51d8ff3bf3c4718c48f30ad606 change-id: 20240327-imx93-of-56ef2b96f2e2 Best regards, -- Peng Fan
RE: [PATCH v2 0/6] imx93-11x11-evk: convert to OF_UPSTREAM
Please ignore this patchset. I need resend. Thanks. > -Original Message- > From: Peng Fan (OSS) > Sent: Thursday, March 28, 2024 8:47 AM > To: Stefano Babic ; Fabio Estevam ; > dl-uboot-imx > Cc: Sumit Garg ; Tom Rini ; u- > b...@lists.denx.de; Peng Fan > Subject: [PATCH v2 0/6] imx93-11x11-evk: convert to OF_UPSTREAM > > To support OF_UPSTREAM, a few driver changes are included. > For TMU, still use U-Boot node, I will prepare a kernel update, then back to > U- > Boot support. > Add the pmic nodes to x-u-boot.dtsi, since upstream still not has it. > imx93.dtsi still kept because other boards still use it as of now. > > Signed-off-by: Peng Fan > --- > Changes in v2: > - Add a new patch to sync clock header to avoid breaking > - Drop the Makefile change which change including order > - Link to v1: https://lore.kernel.org/r/20240327-imx93-of-v1-0- > afab6b314...@nxp.com > > --- > Peng Fan (6): > gpio: imx_rgpio2p: support one address > serial: lpuart: use ipg clk for i.MX7ULP > cpu: drop imx9_cpu > clk: imx93: fix anatop base > dt-bindings: imx93: sync clock header > imx: imx93-11x11-evk: convert to OF_UPSTREAM > > arch/arm/dts/Makefile| 1 - > arch/arm/dts/imx8mp-evk.dts | 684 > --- > arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 118 ++ > arch/arm/dts/imx93-11x11-evk.dts | 322 --- > arch/arm/dts/imx93-u-boot.dtsi | 15 + > arch/arm/mach-imx/imx9/Kconfig | 1 + > configs/imx93_11x11_evk_defconfig| 2 +- > configs/imx93_11x11_evk_ld_defconfig | 2 +- > drivers/clk/imx/clk-imx93.c | 2 +- > drivers/cpu/imx9_cpu.c | 224 -- > drivers/gpio/imx_rgpio2p.c | 42 +- > drivers/serial/serial_lpuart.c | 9 +- > include/dt-bindings/clock/imx93-clock.h | 3 +- > 13 files changed, 185 insertions(+), 1240 deletions(-) > --- > base-commit: ab8d9ca3044acf51d8ff3bf3c4718c48f30ad606 > change-id: 20240327-imx93-of-56ef2b96f2e2 > > Best regards, > -- > Peng Fan
[PATCH v2 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM
From: Peng Fan
Convert to OF_UPSTREAM for i.MX93 11x11 EVK.
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile| 1 -
arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 118 +++
arch/arm/dts/imx93-11x11-evk.dts | 322 ---
arch/arm/dts/imx93-u-boot.dtsi | 15 ++
arch/arm/mach-imx/imx9/Kconfig | 1 +
configs/imx93_11x11_evk_defconfig| 2 +-
configs/imx93_11x11_evk_ld_defconfig | 2 +-
7 files changed, 136 insertions(+), 325 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d85a33055c9..71c2facfb5e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1115,7 +1115,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-librem5-r4.dtb
dtb-$(CONFIG_ARCH_IMX9) += \
- imx93-11x11-evk.dtb \
imx93-var-som-symphony.dtb \
imx93-phyboard-segin.dtb
diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
index a99ba99bfb4..408e601bc90 100644
--- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
@@ -26,6 +26,111 @@
bootph-pre-ram;
};
+ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <40>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_lpi2c2>;
+ pinctrl-1 = <_lpi2c2>;
+ status = "okay";
+
+ pmic@25 {
+ compatible = "nxp,pca9451a";
+ reg = <0x25>;
+ interrupt-parent = <>;
+ interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+
+ regulators {
+ buck1: BUCK1 {
+ regulator-name = "BUCK1";
+ regulator-min-microvolt = <65>;
+ regulator-max-microvolt = <2237500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck2: BUCK2 {
+ regulator-name = "BUCK2";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <2187500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck4: BUCK4{
+ regulator-name = "BUCK4";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck5: BUCK5{
+ regulator-name = "BUCK5";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck6: BUCK6 {
+ regulator-name = "BUCK6";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1: LDO1 {
+ regulator-name = "LDO1";
+ regulator-min-microvolt = <160>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo4: LDO4 {
+ regulator-name = "LDO4";
+ regulator-min-microvolt = <80>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo5: LDO5 {
+ regulator-name = "LDO5";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
[PATCH v2 5/6] dt-bindings: imx93: sync clock header
From: Peng Fan
Sync clock header with kernel 6.8
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mp-evk.dts | 684
include/dt-bindings/clock/imx93-clock.h | 3 +-
2 files changed, 2 insertions(+), 685 deletions(-)
diff --git a/arch/arm/dts/imx8mp-evk.dts b/arch/arm/dts/imx8mp-evk.dts
deleted file mode 100644
index 9f1469db554..000
--- a/arch/arm/dts/imx8mp-evk.dts
+++ /dev/null
@@ -1,684 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2019 NXP
- */
-
-/dts-v1/;
-
-#include
-#include "imx8mp.dtsi"
-
-/ {
- model = "NXP i.MX8MPlus EVK board";
- compatible = "fsl,imx8mp-evk", "fsl,imx8mp";
-
- chosen {
- stdout-path =
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <_gpio_led>;
-
- status {
- label = "yellow:status";
- gpios = < 16 GPIO_ACTIVE_HIGH>;
- default-state = "on";
- };
- };
-
- memory@4000 {
- device_type = "memory";
- reg = <0x0 0x4000 0 0xc000>,
- <0x1 0x 0 0xc000>;
- };
-
- pcie0_refclk: pcie0-refclk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <1>;
- };
-
- reg_can1_stby: regulator-can1-stby {
- compatible = "regulator-fixed";
- regulator-name = "can1-stby";
- pinctrl-names = "default";
- pinctrl-0 = <_flexcan1_reg>;
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 5 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_can2_stby: regulator-can2-stby {
- compatible = "regulator-fixed";
- regulator-name = "can2-stby";
- pinctrl-names = "default";
- pinctrl-0 = <_flexcan2_reg>;
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 27 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_pcie0: regulator-pcie {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <_pcie0_reg>;
- regulator-name = "MPCIE_3V3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 6 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_usdhc2_vmmc: regulator-usdhc2 {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <_reg_usdhc2_vmmc>;
- regulator-name = "VSD_3V3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 19 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-};
-
-_0 {
- cpu-supply = <_arm>;
-};
-
-_1 {
- cpu-supply = <_arm>;
-};
-
-_2 {
- cpu-supply = <_arm>;
-};
-
-_3 {
- cpu-supply = <_arm>;
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_eqos>;
- phy-mode = "rgmii-id";
- phy-handle = <>;
- snps,force_thresh_dma_mode;
- snps,mtl-tx-config = <_tx_setup>;
- snps,mtl-rx-config = <_rx_setup>;
- status = "okay";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@1 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <1>;
- eee-broken-1000t;
- reset-gpios = < 22 GPIO_ACTIVE_LOW>;
- reset-assert-us = <1>;
- reset-deassert-us = <8>;
- realtek,clkout-disable;
- };
- };
-
- mtl_tx_setup: tx-queues-config {
- snps,tx-queues-to-use = <5>;
- snps,tx-sched-sp;
-
- queue0 {
- snps,dcb-algorithm;
- snps,priority = <0x1>;
- };
-
- queue1 {
-
[PATCH v2 4/6] clk: imx93: fix anatop base
From: Peng Fan
The PLL clk needs use anatop base, otherwise wrong PLL address will
be used.
Fixes: 9c153e46661b ("clk: imx: add i.MX93 CCF driver")
Signed-off-by: Peng Fan
---
drivers/clk/imx/clk-imx93.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
index ce10d795316..f0cb797d975 100644
--- a/drivers/clk/imx/clk-imx93.c
+++ b/drivers/clk/imx/clk-imx93.c
@@ -289,7 +289,7 @@ static int imx93_clk_probe(struct udevice *dev)
clk_dm(IMX93_CLK_SYS_PLL_PFD2_DIV2,
imx_clk_fixed_factor("sys_pll_pfd2_div2", "sys_pll_pfd2", 1, 2));
- base = (void *)ANATOP_BASE_ADDR;
+ anatop_base = (void *)ANATOP_BASE_ADDR;
clk_dm(IMX93_CLK_ARM_PLL,
imx_clk_fracn_gppll_integer("arm_pll", "clock-osc-24m",
--
2.35.3
[PATCH v2 3/6] cpu: drop imx9_cpu
From: Peng Fan
This was wrongly committed, no user, remove it.
Signed-off-by: Peng Fan
---
drivers/cpu/imx9_cpu.c | 224 -
1 file changed, 224 deletions(-)
diff --git a/drivers/cpu/imx9_cpu.c b/drivers/cpu/imx9_cpu.c
deleted file mode 100644
index 66534fe6d17..000
--- a/drivers/cpu/imx9_cpu.c
+++ /dev/null
@@ -1,224 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2019 NXP
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct cpu_imx_plat {
- const char *name;
- const char *rev;
- const char *type;
- u32 cpu_rsrc;
- u32 cpurev;
- u32 freq_mhz;
- u32 mpidr;
-};
-
-const char *get_imx9_type(u32 imxtype)
-{
- switch (imxtype) {
- case MXC_CPU_IMX93:
- return "93";
- default:
- return "??";
- }
-}
-
-const char *get_imx9_rev(u32 rev)
-{
- switch (rev) {
- case CHIP_REV_1_0:
- return "1.";
- case CHIP_REV_B:
- return "B";
- case CHIP_REV_C:
- return "C";
- default:
- return "?";
- }
-}
-
-static void set_core_data(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (device_is_compatible(dev, "arm,cortex-a35"))
- plat->name = "A35";
- else
- plat->name = "?";
-}
-
-#if IS_ENABLED(CONFIG_IMX_SCU_THERMAL)
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- struct udevice *thermal_dev;
- int cpu_tmp, ret;
- int idx = 1; /* use "cpu-thermal0" device */
-
- if (plat->cpu_rsrc == SC_R_A72)
- idx = 2; /* use "cpu-thermal1" device */
-
- ret = uclass_get_device(UCLASS_THERMAL, idx, _dev);
- if (!ret) {
- ret = thermal_get_temp(thermal_dev, _tmp);
- if (ret)
- return 0xdeadbeef;
- } else {
- return 0xdeadbeef;
- }
-
- return cpu_tmp;
-}
-#else
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- return 0;
-}
-#endif
-
-int cpu_imx_get_desc(const struct udevice *dev, char *buf, int size)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
- int ret, temp;
-
- if (size < 100)
- return -ENOSPC;
-
- ret = snprintf(buf, size, "NXP i.MX8%s Rev%s %s at %u MHz",
- plat->type, plat->rev, plat->name, plat->freq_mhz);
-
- if (IS_ENABLED(CONFIG_IMX_SCU_THERMAL)) {
- temp = cpu_imx_get_temp(plat);
- buf = buf + ret;
- size = size - ret;
- if (temp != 0xdeadbeef)
- ret = snprintf(buf, size, " at %dC", temp);
- else
- ret = snprintf(buf, size, " - invalid sensor data");
- }
-
- snprintf(buf + ret, size - ret, "\n");
-
- return 0;
-}
-
-static int cpu_imx_get_info(const struct udevice *dev, struct cpu_info *info)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- info->cpu_freq = plat->freq_mhz * 1000;
- info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU);
- return 0;
-}
-
-static int cpu_imx_get_count(const struct udevice *dev)
-{
- ofnode node;
- int num = 0;
-
- ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) {
- const char *device_type;
-
- if (!ofnode_is_enabled(node))
- continue;
-
- device_type = ofnode_read_string(node, "device_type");
- if (!device_type)
- continue;
-
- if (!strcmp(device_type, "cpu"))
- num++;
- }
-
- return num;
-}
-
-static int cpu_imx_get_vendor(const struct udevice *dev, char *buf, int size)
-{
- snprintf(buf, size, "NXP");
- return 0;
-}
-
-static int cpu_imx_is_current(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (plat->mpidr == (read_mpidr() & 0x))
- return 1;
-
- return 0;
-}
-
-static const struct cpu_ops cpu_imx9_ops = {
- .get_desc = cpu_imx_get_desc,
- .get_info = cpu_imx_get_info,
- .get_count = cpu_imx_get_count,
- .get_vendor = cpu_imx_get_vendor,
- .is_current = cpu_imx_is_current,
-};
-
-static const struct udevice_id cpu_imx9_ids[] = {
- { .compatible = "arm,cortex-a35" },
- { .compatible = "arm,cortex-a53" },
- { .compatible = "arm,cortex-a72" },
- { }
-};
-
-static ulong imx9_ge
[PATCH v2 2/6] serial: lpuart: use ipg clk for i.MX7ULP
From: Peng Fan
To i.MX7ULP compatible lpuart, there is only ipg clk, no per clk.
So add a devtype check for i.MX7ULP.
Signed-off-by: Peng Fan
---
drivers/serial/serial_lpuart.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index ce08a6b4486..653ff99e67b 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -111,11 +111,18 @@ u32 __weak get_lpuart_clk(void)
#if CONFIG_IS_ENABLED(CLK)
static int get_lpuart_clk_rate(struct udevice *dev, u32 *clk)
{
+ struct lpuart_serial_plat *plat = dev_get_plat(dev);
struct clk per_clk;
ulong rate;
int ret;
+ char *name;
- ret = clk_get_by_name(dev, "per", _clk);
+ if (plat->devtype == DEV_MX7ULP)
+ name = "ipg";
+ else
+ name = "per";
+
+ ret = clk_get_by_name(dev, name, _clk);
if (ret) {
dev_err(dev, "Failed to get per clk: %d\n", ret);
return ret;
--
2.35.3
[PATCH v2 1/6] gpio: imx_rgpio2p: support one address
From: Peng Fan
The i.MX8ULP/93 gpio dt-schema have been updated to only have one
address entry, update the driver to support it.
Signed-off-by: Peng Fan
---
drivers/gpio/imx_rgpio2p.c | 42 ++
1 file changed, 38 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/imx_rgpio2p.c b/drivers/gpio/imx_rgpio2p.c
index 175e460aff5..3227a8d5b57 100644
--- a/drivers/gpio/imx_rgpio2p.c
+++ b/drivers/gpio/imx_rgpio2p.c
@@ -21,6 +21,12 @@ enum imx_rgpio2p_direction {
#define GPIO_PER_BANK 32
+struct imx_rgpio2p_soc_data {
+ bool have_dual_base;
+};
+
+#define IMX8ULP_GPIO_BASE_OFF 0x40
+
struct imx_rgpio2p_data {
struct gpio_regs *regs;
};
@@ -165,6 +171,9 @@ static int imx_rgpio2p_probe(struct udevice *dev)
static int imx_rgpio2p_bind(struct udevice *dev)
{
struct imx_rgpio2p_plat *plat = dev_get_plat(dev);
+ struct imx_rgpio2p_soc_data *data =
+ (struct imx_rgpio2p_soc_data *)dev_get_driver_data(dev);
+ bool dual_base = data->have_dual_base;
fdt_addr_t addr;
/*
@@ -176,9 +185,26 @@ static int imx_rgpio2p_bind(struct udevice *dev)
if (plat)
return 0;
- addr = devfdt_get_addr_index(dev, 1);
- if (addr == FDT_ADDR_T_NONE)
- return -EINVAL;
+ /*
+* Handle legacy compatible combinations which used two reg values
+* for the i.MX8ULP and i.MX93.
+*/
+ if (device_is_compatible(dev, "fsl,imx7ulp-gpio") &&
+ (device_is_compatible(dev, "fsl,imx93-gpio") ||
+ (device_is_compatible(dev, "fsl,imx8ulp-gpio"
+ dual_base = true;
+
+ if (dual_base) {
+ addr = devfdt_get_addr_index(dev, 1);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+ } else {
+ addr = devfdt_get_addr_index(dev, 0);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ addr += IMX8ULP_GPIO_BASE_OFF;
+ }
/*
* TODO:
@@ -202,9 +228,17 @@ static int imx_rgpio2p_bind(struct udevice *dev)
return 0;
}
+static struct imx_rgpio2p_soc_data imx7ulp_data = {
+ .have_dual_base = true,
+};
+
+static struct imx_rgpio2p_soc_data imx8ulp_data = {
+ .have_dual_base = false,
+};
static const struct udevice_id imx_rgpio2p_ids[] = {
- { .compatible = "fsl,imx7ulp-gpio" },
+ { .compatible = "fsl,imx7ulp-gpio", .data = (ulong)_data },
+ { .compatible = "fsl,imx8ulp-gpio", .data = (ulong)_data },
{ }
};
--
2.35.3
[PATCH v2 0/6] imx93-11x11-evk: convert to OF_UPSTREAM
To support OF_UPSTREAM, a few driver changes are included. For TMU, still use U-Boot node, I will prepare a kernel update, then back to U-Boot support. Add the pmic nodes to x-u-boot.dtsi, since upstream still not has it. imx93.dtsi still kept because other boards still use it as of now. Signed-off-by: Peng Fan --- Changes in v2: - Add a new patch to sync clock header to avoid breaking - Drop the Makefile change which change including order - Link to v1: https://lore.kernel.org/r/20240327-imx93-of-v1-0-afab6b314...@nxp.com --- Peng Fan (6): gpio: imx_rgpio2p: support one address serial: lpuart: use ipg clk for i.MX7ULP cpu: drop imx9_cpu clk: imx93: fix anatop base dt-bindings: imx93: sync clock header imx: imx93-11x11-evk: convert to OF_UPSTREAM arch/arm/dts/Makefile| 1 - arch/arm/dts/imx8mp-evk.dts | 684 --- arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 118 ++ arch/arm/dts/imx93-11x11-evk.dts | 322 --- arch/arm/dts/imx93-u-boot.dtsi | 15 + arch/arm/mach-imx/imx9/Kconfig | 1 + configs/imx93_11x11_evk_defconfig| 2 +- configs/imx93_11x11_evk_ld_defconfig | 2 +- drivers/clk/imx/clk-imx93.c | 2 +- drivers/cpu/imx9_cpu.c | 224 -- drivers/gpio/imx_rgpio2p.c | 42 +- drivers/serial/serial_lpuart.c | 9 +- include/dt-bindings/clock/imx93-clock.h | 3 +- 13 files changed, 185 insertions(+), 1240 deletions(-) --- base-commit: ab8d9ca3044acf51d8ff3bf3c4718c48f30ad606 change-id: 20240327-imx93-of-56ef2b96f2e2 Best regards, -- Peng Fan
RE: [PATCH] warp7: Convert to watchdog driver model
> Subject: [PATCH] warp7: Convert to watchdog driver model
>
> Commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()") caused
> the 'reset' command in U-Boot to not cause a board reset.
>
> Fix it by switching to the watchdog driver model via sysreset, which is the
> preferred method for implementing the watchdog reset.
>
> Signed-off-by: Fabio Estevam
Reviewed-by: Peng Fan
> ---
> arch/arm/dts/imx7s-warp-u-boot.dtsi | 10 ++
> configs/warp7_defconfig | 3 +++
> 2 files changed, 13 insertions(+)
>
> diff --git a/arch/arm/dts/imx7s-warp-u-boot.dtsi b/arch/arm/dts/imx7s-warp-
> u-boot.dtsi
> index 4f44598c9a27..98784fd7a2ef 100644
> --- a/arch/arm/dts/imx7s-warp-u-boot.dtsi
> +++ b/arch/arm/dts/imx7s-warp-u-boot.dtsi
> @@ -7,6 +7,12 @@
> chosen {
> stdout-path =
> };
> +
> + wdt-reboot {
> + compatible = "wdt-reboot";
> + wdt = <>;
> + bootph-pre-ram;
> + };
> };
>
> {
> @@ -24,3 +30,7 @@
> {
> bootph-all;
> };
> +
> + {
> + bootph-pre-ram;
> +};
> diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index
> 9b518a121be6..48042b702c22 100644
> --- a/configs/warp7_defconfig
> +++ b/configs/warp7_defconfig
> @@ -67,6 +67,8 @@ CONFIG_DM_REGULATOR_GPIO=y
> CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_DM_SERIAL=y
> CONFIG_MXC_UART=y
> +CONFIG_SYSRESET=y
> +CONFIG_SYSRESET_WATCHDOG=y
> CONFIG_IMX_THERMAL=y
> CONFIG_USB=y
> CONFIG_USB_EHCI_HCD=y
> @@ -80,5 +82,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
> CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y
> CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
> +CONFIG_IMX_WATCHDOG=y
> CONFIG_OPTEE_TZDRAM_SIZE=0x300
> CONFIG_BOOTM_OPTEE=y
> --
> 2.34.1
RE: [PATCH 5/6] Makefile: tune the include order
> Subject: Re: [PATCH 5/6] Makefile: tune the include order > > Hi Peng, > > On Wed, 27 Mar 2024 at 18:41, Peng Fan (OSS) > wrote: > > > > From: Peng Fan > > > > For OF_UPSTREAM support, the U-Boot headers under dt-bindings/ maybe > > different with OF_UPSTREAM headers. So let OF_UPSTREAM headers be > > included first when migrating to OF_UPSTREAM. > > No, please don't do that. The current include order gives preference to the U- > Boot headers under dt-bindings/ such that we don't break platforms which > haven't converted to OF_UPSTREAM. > > So while migrating to OF_UPSTREAM, you should just drop redundant > headers under dt-bindings/ instead. But while in the middle that some boards using OF_UPSTREAM, some not, we could not drop that. I could sync the dt-bindings header first to avoid break anyway. Regards, Peng. > > -Sumit > > > > > Signed-off-by: Peng Fan > > --- > > Makefile | 6 +++--- > > 1 file changed, 3 insertions(+), 3 deletions(-) > > > > diff --git a/Makefile b/Makefile > > index b80924241ec..b9c2d896c2e 100644 > > --- a/Makefile > > +++ b/Makefile > > @@ -827,6 +827,7 @@ KBUILD_HOSTCFLAGS += $(if > > $(CONFIG_TOOLS_DEBUG),-g) # Use UBOOTINCLUDE when you must > reference the include/ directory. > > # Needed to be compatible with the O= option > > UBOOTINCLUDE:= \ > > + -I$(srctree)/dts/upstream/include \ > > -Iinclude \ > > $(if $(KBUILD_SRC), -I$(srctree)/include) \ > > $(if $(CONFIG_$(SPL_)SYS_THUMB_BUILD), \ > > @@ -835,8 +836,7 @@ UBOOTINCLUDE:= \ > > -I$(srctree)/arch/arm/thumb1/include), \ > > -I$(srctree)/arch/arm/thumb1/include)) \ > > -I$(srctree)/arch/$(ARCH)/include \ > > - -include $(srctree)/include/linux/kconfig.h \ > > - -I$(srctree)/dts/upstream/include > > + -include $(srctree)/include/linux/kconfig.h > > > > NOSTDINC_FLAGS += -nostdinc -isystem $(shell $(CC) > > -print-file-name=include) > > > > @@ -907,7 +907,7 @@ ifeq ($(CONFIG_USE_PRIVATE_LIBGCC),y) > > PLATFORM_LIBGCC = arch/$(ARCH)/lib/lib.a else ifndef > > CONFIG_CC_IS_CLANG -PLATFORM_LIBGCC := -L $(shell dirname `$(CC) > > $(c_flags) -print-libgcc-file-name`) -lgcc > > +PLATFORM_LIBGCC := -L $(shell dirname `$(CC) $(c_flags) > > +-print-libgcc-file-name`) > > endif > > endif > > PLATFORM_LIBS += $(PLATFORM_LIBGCC) > > > > -- > > 2.35.3 > >
[PATCH 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM
From: Peng Fan
Convert to OF_UPSTREAM for i.MX93 11x11 EVK.
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile| 1 -
arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 118 +++
arch/arm/dts/imx93-11x11-evk.dts | 322 ---
arch/arm/dts/imx93-u-boot.dtsi | 15 ++
arch/arm/mach-imx/imx9/Kconfig | 1 +
configs/imx93_11x11_evk_defconfig| 2 +-
configs/imx93_11x11_evk_ld_defconfig | 2 +-
7 files changed, 136 insertions(+), 325 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d85a33055c9..71c2facfb5e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1115,7 +1115,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-librem5-r4.dtb
dtb-$(CONFIG_ARCH_IMX9) += \
- imx93-11x11-evk.dtb \
imx93-var-som-symphony.dtb \
imx93-phyboard-segin.dtb
diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
index a99ba99bfb4..408e601bc90 100644
--- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
@@ -26,6 +26,111 @@
bootph-pre-ram;
};
+ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <40>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <_lpi2c2>;
+ pinctrl-1 = <_lpi2c2>;
+ status = "okay";
+
+ pmic@25 {
+ compatible = "nxp,pca9451a";
+ reg = <0x25>;
+ interrupt-parent = <>;
+ interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+
+ regulators {
+ buck1: BUCK1 {
+ regulator-name = "BUCK1";
+ regulator-min-microvolt = <65>;
+ regulator-max-microvolt = <2237500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck2: BUCK2 {
+ regulator-name = "BUCK2";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <2187500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck4: BUCK4{
+ regulator-name = "BUCK4";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck5: BUCK5{
+ regulator-name = "BUCK5";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck6: BUCK6 {
+ regulator-name = "BUCK6";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <340>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1: LDO1 {
+ regulator-name = "LDO1";
+ regulator-min-microvolt = <160>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo4: LDO4 {
+ regulator-name = "LDO4";
+ regulator-min-microvolt = <80>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo5: LDO5 {
+ regulator-name = "LDO5";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
[PATCH 5/6] Makefile: tune the include order
From: Peng Fan For OF_UPSTREAM support, the U-Boot headers under dt-bindings/ maybe different with OF_UPSTREAM headers. So let OF_UPSTREAM headers be included first when migrating to OF_UPSTREAM. Signed-off-by: Peng Fan --- Makefile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Makefile b/Makefile index b80924241ec..b9c2d896c2e 100644 --- a/Makefile +++ b/Makefile @@ -827,6 +827,7 @@ KBUILD_HOSTCFLAGS += $(if $(CONFIG_TOOLS_DEBUG),-g) # Use UBOOTINCLUDE when you must reference the include/ directory. # Needed to be compatible with the O= option UBOOTINCLUDE:= \ + -I$(srctree)/dts/upstream/include \ -Iinclude \ $(if $(KBUILD_SRC), -I$(srctree)/include) \ $(if $(CONFIG_$(SPL_)SYS_THUMB_BUILD), \ @@ -835,8 +836,7 @@ UBOOTINCLUDE:= \ -I$(srctree)/arch/arm/thumb1/include), \ -I$(srctree)/arch/arm/thumb1/include)) \ -I$(srctree)/arch/$(ARCH)/include \ - -include $(srctree)/include/linux/kconfig.h \ - -I$(srctree)/dts/upstream/include + -include $(srctree)/include/linux/kconfig.h NOSTDINC_FLAGS += -nostdinc -isystem $(shell $(CC) -print-file-name=include) @@ -907,7 +907,7 @@ ifeq ($(CONFIG_USE_PRIVATE_LIBGCC),y) PLATFORM_LIBGCC = arch/$(ARCH)/lib/lib.a else ifndef CONFIG_CC_IS_CLANG -PLATFORM_LIBGCC := -L $(shell dirname `$(CC) $(c_flags) -print-libgcc-file-name`) -lgcc +PLATFORM_LIBGCC := -L $(shell dirname `$(CC) $(c_flags) -print-libgcc-file-name`) endif endif PLATFORM_LIBS += $(PLATFORM_LIBGCC) -- 2.35.3
[PATCH 4/6] clk: imx93: fix anatop base
From: Peng Fan
The PLL clk needs use anatop base, otherwise wrong PLL address will
be used.
Fixes: 9c153e46661b ("clk: imx: add i.MX93 CCF driver")
Signed-off-by: Peng Fan
---
drivers/clk/imx/clk-imx93.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
index ce10d795316..f0cb797d975 100644
--- a/drivers/clk/imx/clk-imx93.c
+++ b/drivers/clk/imx/clk-imx93.c
@@ -289,7 +289,7 @@ static int imx93_clk_probe(struct udevice *dev)
clk_dm(IMX93_CLK_SYS_PLL_PFD2_DIV2,
imx_clk_fixed_factor("sys_pll_pfd2_div2", "sys_pll_pfd2", 1, 2));
- base = (void *)ANATOP_BASE_ADDR;
+ anatop_base = (void *)ANATOP_BASE_ADDR;
clk_dm(IMX93_CLK_ARM_PLL,
imx_clk_fracn_gppll_integer("arm_pll", "clock-osc-24m",
--
2.35.3
[PATCH 3/6] cpu: drop imx9_cpu
From: Peng Fan
This was wrongly committed, no user, remove it.
Signed-off-by: Peng Fan
---
drivers/cpu/imx9_cpu.c | 224 -
1 file changed, 224 deletions(-)
diff --git a/drivers/cpu/imx9_cpu.c b/drivers/cpu/imx9_cpu.c
deleted file mode 100644
index 66534fe6d17..000
--- a/drivers/cpu/imx9_cpu.c
+++ /dev/null
@@ -1,224 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2019 NXP
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct cpu_imx_plat {
- const char *name;
- const char *rev;
- const char *type;
- u32 cpu_rsrc;
- u32 cpurev;
- u32 freq_mhz;
- u32 mpidr;
-};
-
-const char *get_imx9_type(u32 imxtype)
-{
- switch (imxtype) {
- case MXC_CPU_IMX93:
- return "93";
- default:
- return "??";
- }
-}
-
-const char *get_imx9_rev(u32 rev)
-{
- switch (rev) {
- case CHIP_REV_1_0:
- return "1.";
- case CHIP_REV_B:
- return "B";
- case CHIP_REV_C:
- return "C";
- default:
- return "?";
- }
-}
-
-static void set_core_data(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (device_is_compatible(dev, "arm,cortex-a35"))
- plat->name = "A35";
- else
- plat->name = "?";
-}
-
-#if IS_ENABLED(CONFIG_IMX_SCU_THERMAL)
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- struct udevice *thermal_dev;
- int cpu_tmp, ret;
- int idx = 1; /* use "cpu-thermal0" device */
-
- if (plat->cpu_rsrc == SC_R_A72)
- idx = 2; /* use "cpu-thermal1" device */
-
- ret = uclass_get_device(UCLASS_THERMAL, idx, _dev);
- if (!ret) {
- ret = thermal_get_temp(thermal_dev, _tmp);
- if (ret)
- return 0xdeadbeef;
- } else {
- return 0xdeadbeef;
- }
-
- return cpu_tmp;
-}
-#else
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- return 0;
-}
-#endif
-
-int cpu_imx_get_desc(const struct udevice *dev, char *buf, int size)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
- int ret, temp;
-
- if (size < 100)
- return -ENOSPC;
-
- ret = snprintf(buf, size, "NXP i.MX8%s Rev%s %s at %u MHz",
- plat->type, plat->rev, plat->name, plat->freq_mhz);
-
- if (IS_ENABLED(CONFIG_IMX_SCU_THERMAL)) {
- temp = cpu_imx_get_temp(plat);
- buf = buf + ret;
- size = size - ret;
- if (temp != 0xdeadbeef)
- ret = snprintf(buf, size, " at %dC", temp);
- else
- ret = snprintf(buf, size, " - invalid sensor data");
- }
-
- snprintf(buf + ret, size - ret, "\n");
-
- return 0;
-}
-
-static int cpu_imx_get_info(const struct udevice *dev, struct cpu_info *info)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- info->cpu_freq = plat->freq_mhz * 1000;
- info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU);
- return 0;
-}
-
-static int cpu_imx_get_count(const struct udevice *dev)
-{
- ofnode node;
- int num = 0;
-
- ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) {
- const char *device_type;
-
- if (!ofnode_is_enabled(node))
- continue;
-
- device_type = ofnode_read_string(node, "device_type");
- if (!device_type)
- continue;
-
- if (!strcmp(device_type, "cpu"))
- num++;
- }
-
- return num;
-}
-
-static int cpu_imx_get_vendor(const struct udevice *dev, char *buf, int size)
-{
- snprintf(buf, size, "NXP");
- return 0;
-}
-
-static int cpu_imx_is_current(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (plat->mpidr == (read_mpidr() & 0x))
- return 1;
-
- return 0;
-}
-
-static const struct cpu_ops cpu_imx9_ops = {
- .get_desc = cpu_imx_get_desc,
- .get_info = cpu_imx_get_info,
- .get_count = cpu_imx_get_count,
- .get_vendor = cpu_imx_get_vendor,
- .is_current = cpu_imx_is_current,
-};
-
-static const struct udevice_id cpu_imx9_ids[] = {
- { .compatible = "arm,cortex-a35" },
- { .compatible = "arm,cortex-a53" },
- { .compatible = "arm,cortex-a72" },
- { }
-};
-
-static ulong imx9_ge
[PATCH 2/6] serial: lpuart: use ipg clk for i.MX7ULP
From: Peng Fan
To i.MX7ULP compatible lpuart, there is only ipg clk, no per clk.
So add a devtype check for i.MX7ULP.
Signed-off-by: Peng Fan
---
drivers/serial/serial_lpuart.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index ce08a6b4486..653ff99e67b 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -111,11 +111,18 @@ u32 __weak get_lpuart_clk(void)
#if CONFIG_IS_ENABLED(CLK)
static int get_lpuart_clk_rate(struct udevice *dev, u32 *clk)
{
+ struct lpuart_serial_plat *plat = dev_get_plat(dev);
struct clk per_clk;
ulong rate;
int ret;
+ char *name;
- ret = clk_get_by_name(dev, "per", _clk);
+ if (plat->devtype == DEV_MX7ULP)
+ name = "ipg";
+ else
+ name = "per";
+
+ ret = clk_get_by_name(dev, name, _clk);
if (ret) {
dev_err(dev, "Failed to get per clk: %d\n", ret);
return ret;
--
2.35.3
[PATCH 1/6] gpio: imx_rgpio2p: support one address
From: Peng Fan
The i.MX8ULP/93 gpio dt-schema have been updated to only have one
address entry, update the driver to support it.
Signed-off-by: Peng Fan
---
drivers/gpio/imx_rgpio2p.c | 42 ++
1 file changed, 38 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/imx_rgpio2p.c b/drivers/gpio/imx_rgpio2p.c
index 175e460aff5..3227a8d5b57 100644
--- a/drivers/gpio/imx_rgpio2p.c
+++ b/drivers/gpio/imx_rgpio2p.c
@@ -21,6 +21,12 @@ enum imx_rgpio2p_direction {
#define GPIO_PER_BANK 32
+struct imx_rgpio2p_soc_data {
+ bool have_dual_base;
+};
+
+#define IMX8ULP_GPIO_BASE_OFF 0x40
+
struct imx_rgpio2p_data {
struct gpio_regs *regs;
};
@@ -165,6 +171,9 @@ static int imx_rgpio2p_probe(struct udevice *dev)
static int imx_rgpio2p_bind(struct udevice *dev)
{
struct imx_rgpio2p_plat *plat = dev_get_plat(dev);
+ struct imx_rgpio2p_soc_data *data =
+ (struct imx_rgpio2p_soc_data *)dev_get_driver_data(dev);
+ bool dual_base = data->have_dual_base;
fdt_addr_t addr;
/*
@@ -176,9 +185,26 @@ static int imx_rgpio2p_bind(struct udevice *dev)
if (plat)
return 0;
- addr = devfdt_get_addr_index(dev, 1);
- if (addr == FDT_ADDR_T_NONE)
- return -EINVAL;
+ /*
+* Handle legacy compatible combinations which used two reg values
+* for the i.MX8ULP and i.MX93.
+*/
+ if (device_is_compatible(dev, "fsl,imx7ulp-gpio") &&
+ (device_is_compatible(dev, "fsl,imx93-gpio") ||
+ (device_is_compatible(dev, "fsl,imx8ulp-gpio"
+ dual_base = true;
+
+ if (dual_base) {
+ addr = devfdt_get_addr_index(dev, 1);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+ } else {
+ addr = devfdt_get_addr_index(dev, 0);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ addr += IMX8ULP_GPIO_BASE_OFF;
+ }
/*
* TODO:
@@ -202,9 +228,17 @@ static int imx_rgpio2p_bind(struct udevice *dev)
return 0;
}
+static struct imx_rgpio2p_soc_data imx7ulp_data = {
+ .have_dual_base = true,
+};
+
+static struct imx_rgpio2p_soc_data imx8ulp_data = {
+ .have_dual_base = false,
+};
static const struct udevice_id imx_rgpio2p_ids[] = {
- { .compatible = "fsl,imx7ulp-gpio" },
+ { .compatible = "fsl,imx7ulp-gpio", .data = (ulong)_data },
+ { .compatible = "fsl,imx8ulp-gpio", .data = (ulong)_data },
{ }
};
--
2.35.3
[PATCH 0/6] imx93-11x11-evk: convert to OF_UPSTREAM
To support OF_UPSTREAM, a few driver changes are included. For TMU, still use U-Boot node, I will prepare a kernel update, then back to U-Boot support. Add the pmic nodes to x-u-boot.dtsi, since upstream still not has it. imx93.dtsi still kept because other boards still use it as of now. Signed-off-by: Peng Fan --- Peng Fan (6): gpio: imx_rgpio2p: support one address serial: lpuart: use ipg clk for i.MX7ULP cpu: drop imx9_cpu clk: imx93: fix anatop base Makefile: tune the include order imx: imx93-11x11-evk: convert to OF_UPSTREAM Makefile | 6 +- arch/arm/dts/Makefile| 1 - arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 118 +++ arch/arm/dts/imx93-11x11-evk.dts | 322 --- arch/arm/dts/imx93-u-boot.dtsi | 15 ++ arch/arm/mach-imx/imx9/Kconfig | 1 + configs/imx93_11x11_evk_defconfig| 2 +- configs/imx93_11x11_evk_ld_defconfig | 2 +- drivers/clk/imx/clk-imx93.c | 2 +- drivers/cpu/imx9_cpu.c | 224 - drivers/gpio/imx_rgpio2p.c | 42 +++- drivers/serial/serial_lpuart.c | 9 +- 12 files changed, 186 insertions(+), 558 deletions(-) --- base-commit: ab8d9ca3044acf51d8ff3bf3c4718c48f30ad606 change-id: 20240327-imx93-of-56ef2b96f2e2 Best regards, -- Peng Fan
RE: [PATCH] arm: imx: fix signature_block_hdr struct fields order
+Ye
> Subject: [PATCH] arm: imx: fix signature_block_hdr struct fields order
>
> According to the documentation (for example AN13994), for AHAB-enabled
> devices the format of the signature block is:
>
> +--+--+--+-+
> | Tag | Length - msb | Length - lsb | Version |
> +--+--+--+-+
> | SRK Table offset| Certificate offset |
> +-++
> | Blob offset | Signature offset |
> +-++
>
> Signed-off-by: Javier Viguera
> ---
> include/imx_container.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/include/imx_container.h b/include/imx_container.h index
> 54cd684e35d5..691c764b3e5b 100644
> --- a/include/imx_container.h
> +++ b/include/imx_container.h
> @@ -50,10 +50,10 @@ struct signature_block_hdr {
> u8 length_lsb;
> u8 length_msb;
> u8 tag;
> - u16 srk_table_offset;
> u16 cert_offset;
> - u16 blob_offset;
> + u16 srk_table_offset;
> u16 signature_offset;
> + u16 blob_offset;
> u32 reserved;
> } __packed;
>
RE: [PATCH] apalis-imx8: Fix sc_misc_otp_fuse_read() error check
> -Original Message-
> From: Fabio Estevam
> Sent: Wednesday, March 13, 2024 9:00 AM
> To: feste...@gmail.com
> Cc: Marcel Ziswiler ;
> hiago.fra...@toradex.com; Francesco Dolcini
> ; u-boot@lists.denx.de; Peng Fan
> ; joao.goncal...@toradex.com
> Subject: [PATCH] apalis-imx8: Fix sc_misc_otp_fuse_read() error check
>
> Commit bfb3409d676f ("imx: toradex/apalis-imx8: correct SCU API usage")
> made an incorrect logic change in the error code check of
> sc_misc_otp_fuse_read():
>
> - if (scierr == SC_ERR_NONE) {
> + if (scierr) {
> /* QP has one A72 core disabled */
> is_quadplus = ((val >> 4) & 0x3) != 0x0;
> }
>
> The other changes in this commit are correct.
>
> sc_misc_otp_fuse_read() returns 0 on a successful fuse read.
>
> This inversion causes board_mem_get_layout() to report incorrect RAM size.
>
> Go back the original error check logic to fix the problem.
>
> Fixes: bfb3409d676f ("imx: toradex/apalis-imx8: correct SCU API usage")
> Signed-off-by: Fabio Estevam
Reviewed-by: Peng Fan
> ---
> board/toradex/apalis-imx8/apalis-imx8.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/board/toradex/apalis-imx8/apalis-imx8.c b/board/toradex/apalis-
> imx8/apalis-imx8.c
> index 2483a63c6733..49719f2f5533 100644
> --- a/board/toradex/apalis-imx8/apalis-imx8.c
> +++ b/board/toradex/apalis-imx8/apalis-imx8.c
> @@ -133,7 +133,7 @@ void board_mem_get_layout(u64
> *phys_sdram_1_start,
> struct tdx_user_fuses tdxramfuses;
> int scierr = sc_misc_otp_fuse_read(-1, 6, );
>
> - if (scierr) {
> + if (!scierr) {
> /* QP has one A72 core disabled */
> is_quadplus = ((val >> 4) & 0x3) != 0x0;
> }
> --
> 2.34.1
RE: [PATCH] colibri-imx8x: Fix sc_misc_otp_fuse_read() error check
> Subject: [PATCH] colibri-imx8x: Fix sc_misc_otp_fuse_read() error check
>
> Commit aa6e698a7acd ("imx: toradex/colibri-imx8x: correct SCU API usage")
> made an incorrect logic change in the error code check of
> sc_misc_otp_fuse_read():
>
> - if (sc_err == SC_ERR_NONE) {
> + if (sc_err) {
> /* DX has two A35 cores disabled */
> return (val & 0xf) != 0x0;
> }
>
> The other changes in this commit are correct.
>
> sc_misc_otp_fuse_read() returns 0 on a successful fuse read.
>
> This inversion causes board_mem_get_layout() to report incorrect RAM size.
>
> Go back the original error check logic to fix the problem.
>
> Fixes: aa6e698a7acd ("imx: toradex/colibri-imx8x: correct SCU API usage")
> Reported-by: Hiago De Franco
> Signed-off-by: Fabio Estevam
Reviewed-by: Peng Fan
> ---
> board/toradex/colibri-imx8x/colibri-imx8x.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/board/toradex/colibri-imx8x/colibri-imx8x.c
> b/board/toradex/colibri-imx8x/colibri-imx8x.c
> index 2c673a4a6b06..6fc8076163c6 100644
> --- a/board/toradex/colibri-imx8x/colibri-imx8x.c
> +++ b/board/toradex/colibri-imx8x/colibri-imx8x.c
> @@ -46,7 +46,7 @@ static int is_imx8dx(void)
> u32 val = 0;
> int sc_err = sc_misc_otp_fuse_read(-1, 6, );
>
> - if (sc_err) {
> + if (!sc_err) {
> /* DX has two A35 cores disabled */
> return (val & 0xf) != 0x0;
> }
> --
> 2.34.1
RE: [PATCH] arm: dts: imx8mp-beacon-kit: Resync DTS with Linux 6.8
> Subject: [PATCH] arm: dts: imx8mp-beacon-kit: Resync DTS with Linux 6.8
>
> The device tree has evolved over time, so re-sync. This also partial reverts
> one change on the PCIe, because U-Boot doesn't have a proper driver.
> However, since the clock is configured to generate a 100MHz reference clock
> by default, a proper driver isn't really necessary.
>
> Signed-off-by: Adam Ford
Acked-by: Peng Fan
>
> diff --git a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
> b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
> index 393fd8ec2e..ed183f83a7 100644
> --- a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
> @@ -6,6 +6,13 @@
> #include "imx8mp-u-boot.dtsi"
>
> / {
> + /* U-Boot does not yet have a proper PCIe clk driver */
> + pcie0_refclk: clock-pcie {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <1>;
> + };
> +
> wdt-reboot {
> compatible = "wdt-reboot";
> wdt = <>;
> @@ -13,6 +20,10 @@
> };
> };
>
> +_phy {
> + clocks = <_refclk>;
> +};
> +
> &{/soc@0/bus@3080/i2c@30a2/pmic@25} {
> bootph-pre-ram;
> };
> diff --git a/arch/arm/dts/imx8mp-beacon-kit.dts b/arch/arm/dts/imx8mp-
> beacon-kit.dts
> index cdae45a48c..a08057410b 100644
> --- a/arch/arm/dts/imx8mp-beacon-kit.dts
> +++ b/arch/arm/dts/imx8mp-beacon-kit.dts
> @@ -23,6 +23,12 @@
> stdout-path =
> };
>
> + clk_xtal25: clock-xtal25 {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <2500>;
> + };
> +
> connector {
> compatible = "usb-c-connector";
> label = "USB-C";
> @@ -49,6 +55,12 @@
> };
> };
>
> + dmic_codec: dmic-codec {
> + compatible = "dmic-codec";
> + num-channels = <1>;
> + #sound-dai-cells = <0>;
> + };
> +
> gpio-keys {
> compatible = "gpio-keys";
> autorepeat;
> @@ -82,6 +94,17 @@
> };
> };
>
> + bridge-connector {
> + compatible = "hdmi-connector";
> + type = "a";
> +
> + port {
> + hdmi_con: endpoint {
> + remote-endpoint = <_out>;
> + };
> + };
> + };
> +
> leds {
> compatible = "gpio-leds";
> pinctrl-names = "default";
> @@ -112,10 +135,13 @@
> };
> };
>
> - pcie0_refclk: clock-pcie {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <1>;
> + reg_audio: regulator-wm8962 {
> + compatible = "regulator-fixed";
> + regulator-name = "3v3_aud";
> + regulator-min-microvolt = <330>;
> + regulator-max-microvolt = <330>;
> + gpio = <_1 11 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> };
>
> reg_usdhc2_vmmc: regulator-usdhc2 {
> @@ -137,6 +163,68 @@
> gpio = <_1 0 GPIO_ACTIVE_HIGH>;
> enable-active-high;
> };
> +
> + sound-adv7535 {
> + compatible = "simple-audio-card";
> + simple-audio-card,name = "sound-adv7535";
> + simple-audio-card,format = "i2s";
> +
> + simple-audio-card,cpu {
> + sound-dai = <>;
> + system-clock-direction-out;
> + };
> +
> + simple-audio-card,codec {
> + sound-dai = <_bridge>;
> + };
> + };
> +
> + sound-dmic {
> + compatible = "simple-audio-card";
> + simple-audio-card,name = "sound-pdm";
> + simple-audio-card,format = "i2s";
> + simple-audio-card,bitclock-master = <_master>;
> + simple-audio-card,frame-master = <_master>;
> +
> + dailink_master: simple-audio-card,cpu {
> + sound-dai = <>;
> + };
> +
> + simple-audio-card,codec {
> + sound-dai = <_codec&g
RE: [PATCH 2/2] clk: clk-imx8qm: Add LPUART IPG entries
> Subject: [PATCH 2/2] clk: clk-imx8qm: Add LPUART IPG entries
>
> Since commit cc7df0b9e8bc ("serial: lpuart: Enable IPG clock") the apalis-
> imx8qm board no longer boots.
>
> The reason is that the imx8qm clock driver does not handle the LPUART IPG
> clocks inside get_rate(), set_rate() and enable() functions.
>
> Fix the boot regression by adding the LPUART IPG entries.
>
> Fixes: cc7df0b9e8bc ("serial: lpuart: Enable IPG clock")
> Reported-by: Marcel Ziswiler
> Signed-off-by: Fabio Estevam
Reviewed-by: Peng Fan
> ---
> drivers/clk/imx/clk-imx8qm.c | 13 -
> 1 file changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-imx8qm.c b/drivers/clk/imx/clk-imx8qm.c
> index 6c05d07c340..01e33de9d63 100644
> --- a/drivers/clk/imx/clk-imx8qm.c
> +++ b/drivers/clk/imx/clk-imx8qm.c
> @@ -95,20 +95,23 @@ ulong imx8_clk_get_rate(struct clk *clk)
> resource = SC_R_SDHC_2;
> pm_clk = SC_PM_CLK_PER;
> break;
> - case IMX8QM_UART0_IPG_CLK:
> case IMX8QM_UART0_CLK:
> + case IMX8QM_UART0_IPG_CLK:
> resource = SC_R_UART_0;
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QM_UART1_CLK:
> + case IMX8QM_UART1_IPG_CLK:
> resource = SC_R_UART_1;
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QM_UART2_CLK:
> + case IMX8QM_UART2_IPG_CLK:
> resource = SC_R_UART_2;
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QM_UART3_CLK:
> + case IMX8QM_UART3_IPG_CLK:
> resource = SC_R_UART_3;
> pm_clk = SC_PM_CLK_PER;
> break;
> @@ -181,18 +184,22 @@ ulong imx8_clk_set_rate(struct clk *clk, unsigned
> long rate)
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QM_UART0_CLK:
> + case IMX8QM_UART0_IPG_CLK:
> resource = SC_R_UART_0;
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QM_UART1_CLK:
> + case IMX8QM_UART1_IPG_CLK:
> resource = SC_R_UART_1;
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QM_UART2_CLK:
> + case IMX8QM_UART2_IPG_CLK:
> resource = SC_R_UART_2;
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QM_UART3_CLK:
> + case IMX8QM_UART3_IPG_CLK:
> resource = SC_R_UART_3;
> pm_clk = SC_PM_CLK_PER;
> break;
> @@ -283,18 +290,22 @@ int __imx8_clk_enable(struct clk *clk, bool enable)
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QM_UART0_CLK:
> + case IMX8QM_UART0_IPG_CLK:
> resource = SC_R_UART_0;
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QM_UART1_CLK:
> + case IMX8QM_UART1_IPG_CLK:
> resource = SC_R_UART_1;
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QM_UART2_CLK:
> + case IMX8QM_UART2_IPG_CLK:
> resource = SC_R_UART_2;
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QM_UART3_CLK:
> + case IMX8QM_UART3_IPG_CLK:
> resource = SC_R_UART_3;
> pm_clk = SC_PM_CLK_PER;
> break;
> --
> 2.34.1
RE: [PATCH 1/2] clk: clk-imx8qxp: Add LPUART IPG entries
> Subject: [PATCH 1/2] clk: clk-imx8qxp: Add LPUART IPG entries
>
> Since commit cc7df0b9e8bc ("serial: lpuart: Enable IPG clock") the colibri-
> imx8qxp board no longer boots.
>
> The reason is that the imx8qxp clock driver does not handle the LPUART IPG
> clocks inside get_rate(), set_rate() and enable() functions.
>
> Fix the boot regression by adding the LPUART IPG entries.
>
> Fixes: cc7df0b9e8bc ("serial: lpuart: Enable IPG clock")
> Reported-by: Marcel Ziswiler
> Signed-off-by: Fabio Estevam
Reviewed-by: Peng Fan
> ---
> drivers/clk/imx/clk-imx8qxp.c | 13 -
> 1 file changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c
> index 8bf7e325481..d900d4cd528 100644
> --- a/drivers/clk/imx/clk-imx8qxp.c
> +++ b/drivers/clk/imx/clk-imx8qxp.c
> @@ -88,20 +88,23 @@ ulong imx8_clk_get_rate(struct clk *clk)
> resource = SC_R_SDHC_1;
> pm_clk = SC_PM_CLK_PER;
> break;
> - case IMX8QXP_UART0_IPG_CLK:
> case IMX8QXP_UART0_CLK:
> + case IMX8QXP_UART0_IPG_CLK:
> resource = SC_R_UART_0;
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QXP_UART1_CLK:
> + case IMX8QXP_UART1_IPG_CLK:
> resource = SC_R_UART_1;
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QXP_UART2_CLK:
> + case IMX8QXP_UART2_IPG_CLK:
> resource = SC_R_UART_2;
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QXP_UART3_CLK:
> + case IMX8QXP_UART3_IPG_CLK:
> resource = SC_R_UART_3;
> pm_clk = SC_PM_CLK_PER;
> break;
> @@ -170,18 +173,22 @@ ulong imx8_clk_set_rate(struct clk *clk, unsigned
> long rate)
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QXP_UART0_CLK:
> + case IMX8QXP_UART0_IPG_CLK:
> resource = SC_R_UART_0;
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QXP_UART1_CLK:
> + case IMX8QXP_UART1_IPG_CLK:
> resource = SC_R_UART_1;
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QXP_UART2_CLK:
> + case IMX8QXP_UART2_IPG_CLK:
> resource = SC_R_UART_2;
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QXP_UART3_CLK:
> + case IMX8QXP_UART3_IPG_CLK:
> resource = SC_R_UART_3;
> pm_clk = SC_PM_CLK_PER;
> break;
> @@ -263,18 +270,22 @@ int __imx8_clk_enable(struct clk *clk, bool enable)
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QXP_UART0_CLK:
> + case IMX8QXP_UART0_IPG_CLK:
> resource = SC_R_UART_0;
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QXP_UART1_CLK:
> + case IMX8QXP_UART1_IPG_CLK:
> resource = SC_R_UART_1;
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QXP_UART2_CLK:
> + case IMX8QXP_UART2_IPG_CLK:
> resource = SC_R_UART_2;
> pm_clk = SC_PM_CLK_PER;
> break;
> case IMX8QXP_UART3_CLK:
> + case IMX8QXP_UART3_IPG_CLK:
> resource = SC_R_UART_3;
> pm_clk = SC_PM_CLK_PER;
> break;
> --
> 2.34.1
[GIT PULL] please pull fsl-qoriq-2024-2-8
Hi Tom, Please pull fsl-qoriq-2024-2-8. Sorry for not being active in the past time, will try to catch up. --- Add TJA1120 driver support fsl-layerscape/soc.c: do not destroy bootcmd environment --- CI: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/19562 Thanks, Peng. The following changes since commit 0101a2ffe125911ebf89172b495f5ff14f2fd058: Merge branch '2024-02-06-assorted-fixes' (2024-02-07 09:47:47 -0500) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq.git tags/fsl-qoriq-2024-2-8 for you to fetch changes up to 121696c957d741d17125f5416d1210b11ef8afdd: fsl-layerscape/soc.c: do not destroy bootcmd environment (2024-02-08 10:45:32 +0800) Mike Looijmans (1): fsl-layerscape/soc.c: do not destroy bootcmd environment Radu Pirea (NXP OSS) (4): net: phy: nxp-c45-tja11xx: use local definion of features net: phy: nxp-c45-tja11xx: read PHY the speed from hardware net: phy: nxp-c45-tja11xx: rename nxp_c45_tja11xx structure net: phy: nxp-c45-tja11xx: add tja1120 support arch/arm/cpu/armv8/fsl-layerscape/soc.c | 5 + drivers/net/phy/nxp-c45-tja11xx.c | 43 --- include/phy.h | 4 3 files changed, 45 insertions(+), 7 deletions(-)
[PATCH] xen: xenguest_arm64: map all VIRTIO MMIO region
From: Peng Fan
When run `virtio scan` on i.MX95, there is abort when accessing virtio
mmio region. The issue is the mmio region is not mapped. So let's map
all virtio mmio regions.
Signed-off-by: Peng Fan
---
board/xen/xenguest_arm64/xenguest_arm64.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/board/xen/xenguest_arm64/xenguest_arm64.c
b/board/xen/xenguest_arm64/xenguest_arm64.c
index 244070a242d..1d2946f4fde 100644
--- a/board/xen/xenguest_arm64/xenguest_arm64.c
+++ b/board/xen/xenguest_arm64/xenguest_arm64.c
@@ -31,6 +31,9 @@
DECLARE_GLOBAL_DATA_PTR;
+#define GUEST_VIRTIO_MMIO_BASE 0x200
+#define GUEST_VIRTIO_MMIO_SIZE 0x10
+
int board_init(void)
{
return 0;
@@ -212,6 +215,15 @@ static int setup_mem_map(void)
PTE_BLOCK_INNER_SHARE);
i++;
+ if (CONFIG_IS_ENABLED(VIRTIO_MMIO)) {
+ xen_mem_map[i].virt = GUEST_VIRTIO_MMIO_BASE;
+ xen_mem_map[i].phys = GUEST_VIRTIO_MMIO_BASE;
+ xen_mem_map[i].size = GUEST_VIRTIO_MMIO_SIZE;
+ xen_mem_map[i].attrs = (PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE);
+ i++;
+ }
+
mem = get_next_memory_node(blob, -1);
if (mem < 0) {
printf("%s: Missing /memory node\n", __func__);
@@ -219,6 +231,11 @@ static int setup_mem_map(void)
}
for (; i < MAX_MEM_MAP_REGIONS; i++) {
+ if (CONFIG_IS_ENABLED(VIRTIO_MMIO)) {
+ ret = fdt_node_check_compatible(blob, mem,
"virtio,mmio");
+ if (!ret)
+ continue;
+ }
ret = fdt_get_resource(blob, mem, "reg", reg++, );
if (ret == -FDT_ERR_NOTFOUND) {
reg = 0;
--
2.35.3
Re: FIELD_RETURN on i.MX8MNANOLPD4 EVK
+Ye 在 1/9/2024 4:52 PM, Thomas Schaefer 写道: Hi all, We are trying to enable FIELD RETURN on the NXP i.MX8MNano LPD4 EVK board. We enabled Secure Boot in u-boot in the first step. After checking proper execution of a signed bootloader image we closed the board blowing the SEC_CONFIG fuse. In the next step we created the board specific signature with UID of the CPU included to remove the FIELD RETURN lock. After that we were able to blow the FIELD_RETURN fuse with 'fuse prog 8 3 0x1' command. But now, the board cannot boot any more, it will hang after execution of the SPL bootloader part. We can observe this behavior with both signed and unsigned bootloader images. Is the FIELD_RETURN feature for the i.MX8MNano supported with u-boot v2024.01? Best regards, Thomas Thomas Schäfer SW Design Engineer thomas.schae...@kontron.com www.kontron.com Kontron Europe GmbH Heinrich-Barth-Straße 1-1a | 66115 Saarbrücken | Germany
Re: [PATCH 3/3] imx8m: Select BINMAN at SoC level
On 1/9/2024 5:11 AM, Fabio Estevam wrote: From: Fabio Estevam All i.MX8M targets rely on using binman to generate the U-Boot binary. Select it at the SoC level instead of per board. Signed-off-by: Fabio Estevam Reviewed-by: Peng Fan
Re: [PATCH 2/3] imx9: Select BINMAN at SoC level
On 1/9/2024 5:11 AM, Fabio Estevam wrote: From: Fabio Estevam All i.MX93 targets rely on using binman to generate the U-Boot binary. Select it at the SoC level instead of per board. Signed-off-by: Fabio Estevam Reviewed-by: Peng Fan
Re: [PATCH 1/3] doc: imx93_var_som: Adjust the underline length
On 1/9/2024 5:11 AM, Fabio Estevam wrote: From: Fabio Estevam Adjust the underline length so that it matches the title length. Signed-off-by: Fabio Estevam Reviewed-by: Peng Fan
Re: [PATCH v6 0/4] Add imx93-var-som support
Thanks for working on the binman for i.MX9. On 1/8/2024 5:24 PM, Mathieu Othacehe wrote: Hello, This v6 fixes CI checks on IMX9 by allowing binman to keep working even though some binary blobs are absent. Thanks, Mathieu v5: https://lists.denx.de/pipermail/u-boot/2024-January/542579.html Mathieu Othacehe (4): spl: binman: Disable u_boot_any symbols for i.MX93 boards mach-imx: Add i.MX93 binman support. imx9: imx93_evk: Add binman support. Add imx93-var-som support The patchset looks good to me. Reviewed-by: Peng Fan arch/arm/dts/Makefile |3 +- arch/arm/dts/imx93-11x11-evk-u-boot.dtsi |2 + arch/arm/dts/imx93-u-boot.dtsi| 88 + .../dts/imx93-var-som-symphony-u-boot.dtsi| 266 +++ arch/arm/dts/imx93-var-som-symphony.dts | 305 arch/arm/dts/imx93-var-som.dtsi | 111 ++ arch/arm/include/asm/arch-imx9/clock.h|1 + arch/arm/mach-imx/Makefile| 27 +- arch/arm/mach-imx/imx9/Kconfig|8 + arch/arm/mach-imx/imx9/container.cfg | 10 + arch/arm/mach-imx/imx9/imximage.cfg | 10 + board/variscite/common/eth.c | 58 + board/variscite/common/eth.h | 12 + board/variscite/common/imx9_eeprom.c | 190 +++ board/variscite/common/imx9_eeprom.h | 83 + board/variscite/common/mmc.c | 47 + board/variscite/imx93_var_som/Kconfig | 12 + board/variscite/imx93_var_som/MAINTAINERS |7 + board/variscite/imx93_var_som/Makefile| 17 + board/variscite/imx93_var_som/imx93_var_som.c | 126 ++ .../variscite/imx93_var_som/imx93_var_som.env | 99 ++ .../variscite/imx93_var_som/lpddr4x_timing.c | 1488 + board/variscite/imx93_var_som/spl.c | 143 ++ common/spl/Kconfig|2 +- common/spl/Kconfig.tpl|2 +- common/spl/Kconfig.vpl|2 +- configs/imx93_11x11_evk_defconfig |2 + configs/imx93_11x11_evk_ld_defconfig |2 + configs/imx93_var_som_defconfig | 156 ++ doc/board/nxp/imx93_11x11_evk.rst | 68 + doc/board/nxp/index.rst |1 + doc/board/variscite/imx93_var_som.rst | 68 + doc/board/variscite/index.rst |1 + include/configs/imx93_var_som.h | 48 + tools/imx9_image.sh | 31 + 35 files changed, 3491 insertions(+), 5 deletions(-) create mode 100644 arch/arm/dts/imx93-u-boot.dtsi create mode 100644 arch/arm/dts/imx93-var-som-symphony-u-boot.dtsi create mode 100644 arch/arm/dts/imx93-var-som-symphony.dts create mode 100644 arch/arm/dts/imx93-var-som.dtsi create mode 100644 arch/arm/mach-imx/imx9/container.cfg create mode 100644 arch/arm/mach-imx/imx9/imximage.cfg create mode 100644 board/variscite/common/eth.c create mode 100644 board/variscite/common/eth.h create mode 100644 board/variscite/common/imx9_eeprom.c create mode 100644 board/variscite/common/imx9_eeprom.h create mode 100644 board/variscite/common/mmc.c create mode 100644 board/variscite/imx93_var_som/Kconfig create mode 100644 board/variscite/imx93_var_som/MAINTAINERS create mode 100644 board/variscite/imx93_var_som/Makefile create mode 100644 board/variscite/imx93_var_som/imx93_var_som.c create mode 100644 board/variscite/imx93_var_som/imx93_var_som.env create mode 100644 board/variscite/imx93_var_som/lpddr4x_timing.c create mode 100644 board/variscite/imx93_var_som/spl.c create mode 100644 configs/imx93_var_som_defconfig create mode 100644 doc/board/nxp/imx93_11x11_evk.rst create mode 100644 doc/board/variscite/imx93_var_som.rst create mode 100644 include/configs/imx93_var_som.h create mode 100755 tools/imx9_image.sh
Re: [PATCH v4] imx8mp-evk: Add USB0 OTG support
On 10/16/2023 8:24 AM, Fabio Estevam wrote:
From: Fabio Estevam
Add USB0 OTG support.
Currently, the USB0 OTG nodes are not enabled in the Linux kernel
devicetree.
For this reason, enable the USB0 OTG nodes inside imx8mp-evk-u-boot.dtsi
for now.
Also select several useful options such as USB gadget and fastboot.
Tested by running "ums 0 mmc 2".
Signed-off-by: Fabio Estevam
Reviewed-by: Marek Vasut
Reviewed-by: Peng Fan
---
Changes since v3:
- Fixed the alphabetical order once again.
arch/arm/dts/imx8mp-evk-u-boot.dtsi | 13
configs/imx8mp_evk_defconfig| 31 +
2 files changed, 44 insertions(+)
diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi
b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
index 6784ed2e7c92..f4fd2432ca8f 100644
--- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
@@ -111,6 +111,19 @@
bootph-pre-ram;
};
+_dwc3_0 {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+_0 {
+ status = "okay";
+};
+
+_phy0 {
+ status = "okay";
+};
+
{
bootph-pre-ram;
};
diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig
index 14c749f44308..820dc36e9cdd 100644
--- a/configs/imx8mp_evk_defconfig
+++ b/configs/imx8mp_evk_defconfig
@@ -59,6 +59,9 @@ CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_SDP=y
+CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT4_WRITE=y
@@ -74,6 +77,14 @@ CONFIG_ETHPRIME="eth1"
CONFIG_SPL_DM=y
CONFIG_CLK_COMPOSITE_CCF=y
CONFIG_CLK_IMX8MP=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x4280
+CONFIG_FASTBOOT_BUF_SIZE=0x2000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_UUU_SUPPORT=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=2
+CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y
+CONFIG_FASTBOOT_MMC_USER_SUPPORT=y
CONFIG_MXC_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
@@ -94,10 +105,15 @@ CONFIG_DWC_ETH_QOS=y
CONFIG_DWC_ETH_QOS_IMX=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
+CONFIG_PHY=y
+CONFIG_PHY_IMX8MQ_USB=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
CONFIG_SPL_POWER_LEGACY=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_IMX8M_POWER_DOMAIN=y
+CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y
CONFIG_POWER_PCA9450=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
@@ -109,4 +125,19 @@ CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_PSCI=y
CONFIG_SYSRESET_WATCHDOG=y
+CONFIG_USB=y
+# CONFIG_SPL_DM_USB is not set
+CONFIG_DM_USB_GADGET=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_MX7 is not set
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_SDP_LOADADDR=0x0
CONFIG_IMX_WATCHDOG=y
Re: [PATCH 2/2] imx8mp_evk: Add myself to MAINTAINERS
On 10/19/2023 3:17 AM, Fabio Estevam wrote: From: Fabio Estevam I would like to help maintaining the imx8mp_evk board. Add myself to MAINTAINERS. Signed-off-by: Fabio Estevam Acked-by: Peng Fan --- board/freescale/imx8mp_evk/MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/imx8mp_evk/MAINTAINERS b/board/freescale/imx8mp_evk/MAINTAINERS index 2759652cc425..c2c7c830b5d2 100644 --- a/board/freescale/imx8mp_evk/MAINTAINERS +++ b/board/freescale/imx8mp_evk/MAINTAINERS @@ -1,4 +1,5 @@ i.MX8MP EVK BOARD +M: Fabio Estevm M:Peng Fan S:Maintained F:board/freescale/imx8mp_evk/
Re: [PATCH 1/2] imx8mp_evk: Convert to DM_PMIC
On 10/19/2023 3:17 AM, Fabio Estevam wrote:
From: Fabio Estevam
Currently, the imx8mp_evk uses the non-DM code to initialize the PMIC.
Convert to DM_PMIC, which is the recommended way to access the PMIC.
While at it, fix multi-line comments style.
Signed-off-by: Fabio Estevam
Reviewed-by: Peng Fan
---
arch/arm/dts/imx8mp-evk-u-boot.dtsi | 18 ++-
board/freescale/imx8mp_evk/spl.c| 50 +++--
configs/imx8mp_evk_defconfig| 12 +++
3 files changed, 47 insertions(+), 33 deletions(-)
diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi
b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
index 9ed62f1bb02d..0bf489b46248 100644
--- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
@@ -13,6 +13,22 @@
};
};
+_i2c1 {
+ bootph-all;
+};
+
+_pmic {
+ bootph-all;
+};
+
+&{/soc@0/bus@3080/i2c@30a2/pmic@25} {
+ bootph-all;
+};
+
+&{/soc@0/bus@3080/i2c@30a2/pmic@25/regulators} {
+ bootph-all;
+};
+
_usdhc2_vmmc {
u-boot,off-on-delay-us = <2>;
};
@@ -66,7 +82,7 @@
};
{
- bootph-pre-ram;
+ bootph-all;
};
{
diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c
index 246826a0d482..9dd2cbc799c3 100644
--- a/board/freescale/imx8mp_evk/spl.c
+++ b/board/freescale/imx8mp_evk/spl.c
@@ -67,40 +67,44 @@ struct i2c_pads_info i2c_pad_info1 = {
},
};
-#if CONFIG_IS_ENABLED(POWER_LEGACY)
-#define I2C_PMIC 0
+#if CONFIG_IS_ENABLED(DM_PMIC_PCA9450)
int power_init_board(void)
{
- struct pmic *p;
+ struct udevice *dev;
int ret;
- ret = power_pca9450_init(I2C_PMIC, 0x25);
- if (ret)
- printf("power init failed");
- p = pmic_get("PCA9450");
- pmic_probe(p);
+ ret = pmic_get("pmic@25", );
+ if (ret == -ENODEV) {
+ puts("No pmic@25\n");
+ return 0;
+ }
+ if (ret < 0)
+ return ret;
/* BUCKxOUT_DVS0/1 control BUCK123 output */
- pmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29);
+ pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
/*
-* increase VDD_SOC to typical value 0.95V before first
-* DRAM access, set DVS1 to 0.85v for suspend.
+* Increase VDD_SOC to typical value 0.95V before first
+* DRAM access, set DVS1 to 0.85V for suspend.
* Enable DVS control through PMIC_STBY_REQ and
* set B1_ENMODE=1 (ON by PMIC_ON_REQ=H)
*/
-#ifdef CONFIG_IMX8M_VDD_SOC_850MV
- /* set DVS0 to 0.85v for special case*/
- pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x14);
-#else
- pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C);
-#endif
- pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14);
- pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59);
+ if (CONFIG_IS_ENABLED(IMX8M_VDD_SOC_850MV))
+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x14);
+ else
+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C);
- /* Kernel uses OD/OD freq for SOC */
- /* To avoid timing risk from SOC to ARM,increase VDD_ARM to OD voltage
0.95v */
- pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1C);
+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14);
+ pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
+
+ /*
+* Kernel uses OD/OD freq for SOC.
+* To avoid timing risk from SOC to ARM,increase VDD_ARM to OD
+* voltage 0.95V.
+*/
+
+ pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1C);
return 0;
}
@@ -135,8 +139,6 @@ void board_init_f(ulong dummy)
enable_tzc380();
- setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, _pad_info1);
-
power_init_board();
/* DDR initialization */
diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig
index 820dc36e9cdd..0675f0f4f41b 100644
--- a/configs/imx8mp_evk_defconfig
+++ b/configs/imx8mp_evk_defconfig
@@ -7,9 +7,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x40
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mp-evk"
CONFIG_SPL_TEXT_BASE=0x92
@@ -88,8 +85,6 @@ CONFIG_FASTBOOT_MMC_USER_SUPPORT=y
CONFIG_MXC_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
-# CONFIG_SPL_DM_I2C is not set
-CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_SUPPORT_EMMC_BOOT=y
@@ -110,15 +105,16 @@ CONFIG_PHY_IMX8MQ_USB=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
-CONFIG_SPL_POWER_LEGACY=y
CONFIG_POWER_DOMAIN=y
CONFIG_IMX8M_POWER_DOMAIN=y
CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y
-CONFIG_POWER_PCA9450=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PCA9450=y
+CONFIG_SPL_DM_PMIC_PCA9450=y
CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_P
[GIT PULL] please pull fsl-qoirq-2023-10-10
Hi Tom, Please pull fsl-qoirq-2023-10-10 --- Drop legacy PPA secure FW support support for MC reserved memory reset the FLSHxCR1 registers for nxp_fspi --- CI: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/18067 I merged the patch 1 [1] and patch 2 [1] into one patch [1]https://lore.kernel.org/all/20230822150334.15703-1-laurentiu.tu...@nxp.com/ Thanks, Peng. The following changes since commit d9bb6d779b69c2548891e568e5e2a23e1b7eedaa: Merge tag 'u-boot-rockchip-20231007' of https://source.denx.de/u-boot/custodians/u-boot-rockchip (2023-10-08 09:58:55 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq.git tags/fsl-qoirq-2023-10-10 for you to fetch changes up to 131e44c5448fb0ba9f8b6084cb848a84d729b2c5: spi: nxp_fspi: reset the FLSHxCR1 registers (2023-10-10 10:13:51 +0800) Han Xu (1): spi: nxp_fspi: reset the FLSHxCR1 registers Laurentiu Tudor (6): configs: layerscape: delete defconfigs using legacy PPA secure FW fsl-layerscape: drop obsolete PPA secure firmware support armv8: fsl-layerscape: make some functions static drivers: net: fsl-mc: add support for MC reserved memory board: freescale: ls2080a: declare MC reserved regions board: freescale: ls1088a: declare MC reserved regions arch/arm/cpu/armv8/fsl-layerscape/Kconfig| 60 --- arch/arm/cpu/armv8/fsl-layerscape/Makefile | 1 - arch/arm/cpu/armv8/fsl-layerscape/icid.c | 12 ++-- arch/arm/cpu/armv8/fsl-layerscape/ppa.c | 284 - arch/arm/cpu/armv8/fsl-layerscape/spl.c | 34 --- arch/arm/include/asm/arch-fsl-layerscape/ppa.h | 12 arch/arm/include/asm/fsl_secure_boot.h | 9 --- board/freescale/ls1012afrdm/Kconfig | 11 board/freescale/ls1012afrdm/ls1012afrdm.c| 6 -- board/freescale/ls1012aqds/Kconfig | 8 --- board/freescale/ls1012aqds/ls1012aqds.c | 6 -- board/freescale/ls1012ardb/Kconfig | 12 board/freescale/ls1012ardb/ls1012ardb.c | 6 -- board/freescale/ls1028a/Kconfig | 12 board/freescale/ls1028a/ls1028a.c| 7 --- board/freescale/ls1043aqds/Kconfig | 16 - board/freescale/ls1043aqds/ls1043aqds.c | 5 -- board/freescale/ls1043ardb/Kconfig | 14 - board/freescale/ls1043ardb/ls1043ardb.c | 5 -- board/freescale/ls1046aqds/Kconfig | 16 - board/freescale/ls1046aqds/ls1046aqds.c | 5 -- board/freescale/ls1046ardb/Kconfig | 14 - board/freescale/ls1046ardb/ls1046ardb.c | 5 -- board/freescale/ls1088a/Kconfig | 28 - board/freescale/ls1088a/ls1088a.c| 6 +- board/freescale/ls2080aqds/Kconfig | 16 - board/freescale/ls2080aqds/ls2080aqds.c | 6 +- board/freescale/ls2080ardb/Kconfig | 16 - board/freescale/ls2080ardb/ls2080ardb.c | 6 +- board/freescale/lx2160a/lx2160a.c| 1 + board/traverse/ten64/ten64.c | 1 - configs/ls1012a2g5rdb_qspi_defconfig | 69 -- configs/ls1012afrdm_qspi_defconfig | 67 - configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig | 72 --- configs/ls1012afrwy_qspi_defconfig | 72 --- configs/ls1012aqds_qspi_defconfig| 95 -- configs/ls1012ardb_qspi_SECURE_BOOT_defconfig| 77 configs/ls1012ardb_qspi_defconfig| 77 configs/ls1043aqds_defconfig | 107 -- configs/ls1043aqds_lpuart_defconfig | 109 -- configs/ls1043aqds_nand_defconfig| 138 --- configs/ls1043aqds_nor_ddr3_defconfig| 108 -- configs/ls1043aqds_qspi_defconfig| 98 --- configs/ls1043aqds_sdcard_ifc_defconfig | 135 -- configs/ls1043aqds_sdcard_qspi_defconfig | 124 --- configs/ls1043ardb_SECURE_BOOT_defconfig | 99 --- configs/ls1043ardb_defconfig
Re: [RFC 0/6] firmware: scmi: add SCMI pinctrl protocol support
On 9/7/2023 5:58 PM, AKASHI Takahiro wrote:
Hi Peng,
On Wed, Sep 06, 2023 at 12:09:45AM -0300, Fabio Estevam wrote:
Adding Peng Fan, who is working on scmi/pinctrl support for i.MX9:
Thanks for looping me.
https://lore.kernel.org/all/ZO9GLG5tQynYyAvR@pluto/T/
I made a comment there.
Thanks for help reviewing.
BTW, do you already have your own implementation of SCMI pin control
protocol at SCMI firmware(server)?
We follow the SCMI 3.2 pinctrl protocol, but use OEM config type.
Is it public available?
The firmware is not public for now, but I could share
the config set array, something like this:
MUX TYPE, MUX REG, CONF_TYPE, CONF REG,
DAISY TYPE, DAISY ID, DAISY VALUE.
Regards,
Peng.
-Takahiro Akashi
On Tue, Sep 5, 2023 at 11:41 PM AKASHI Takahiro
wrote:
This is an RFC and meant to get feedback from other developers as
- the specification (pinctrl part) is still in a draft
- the upstream patch for linux, including dt bindings, is still WIP
- I'm not confident the drivers are generic enough to cover most HWs
- The tests ("ut") doesn't cover all the features yet
This patch series allows users to access SCMI pin control protocol provided
by SCMI server (platform). See SCMI specification document v3.2 beta 2[1]
for more details about SCMI pin control protocol.
The implementation consists of two layers:
- basic helper functions for SCMI pin control protocol
in drivers/firmware/scmi/pinctrl.c (patch#2)
- DM-compliant pinctrl/gpio drivers, which utilizes the helper functions,
in drivers/pinctrl/pinctrl-scmi.c (patch#3,#4)
[1] https://developer.arm.com/documentation/den0056/e/?lang=en
DT bindings
===
Upstream pinctrl patch for linux defines the bindings in [2] though
it doesn't say much.
I expect that my implementation basically complies with U-Boot's generic
bindings described in [3], but not all the features are verified.
As for gpio, unless you hard-code pin assignments directly in a device
driver, my implementation allows the following alternatives in DT.
Either way, we may need an additional binding description for gpio.
(A)
scmi {
... // other protocols
scmi_pinctrl: protocol@19 { // Pin control protocol
...
{pinmux definitions}... // if any, including GPIO?
}
}
scmi_gpio: scmi_gpio {
compatible = "arm,scmi-gpio-generic";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <_pinctrl 0 5 4>,
<_pinctrl 4 0 0>;
gpio-ranges-group-names = "",
"ANOTHER_GPIO_GROUP";
}
some_device {
...
reset-gpios = <_gpio 0 GPIO_ACTIVE_HIGH>;
}
(B)
scmi {
... // other protocols
scmi_pinctrl: protocol@19 { // Pin control protocol
...
{pinmux definitions}... // if any, including GPIO?
scmi_gpio: scmi_gpio {
// no need for "compatible"
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <_pinctrl 0 5 4>,
<_pinctrl 4 0 0>;
gpio-ranges-group-names = "",
"ANOTHER_GPIO_GROUP";
}
}
}
some_device {
...
reset-gpios = <_gpio 0 GPIO_ACTIVE_HIGH>;
}
(C)
if "gpio-ranges" is missing in gpio definition, assume 1:1 mapping,
i.e. use a native pinctrl pin number (5).
some_device {
...
reset-gpios = <_gpio 5 GPIO_ACTIVE_HIGH>;
}
[2] https://lkml.iu.edu/hypermail/linux/kernel/2308.1/01084.html
[3] /doc/device-tree-bindings/pinctrl/pinctrl-bindings.txt
/doc/device-tree-bindings/gpio/gpio.txt
Test
The patch series was tested on the following platforms:
* sandbox ("ut dm pinmux" and manually using gpio command)
Prerequisite:
=
* This patch series is based on my WIP "Base protocol support" patches
on v2023.10-rc3. You can fetch the whole code from [4].
[4] https://git.linaro.org/people/takahiro.akashi/u-boot.git
branch:scmi/pinctrl
Patches:
Patch#1: Add SCMI base protocol driver
Patch#2-#4: Add drivers
Patch#5-#6: Test related
Change history:
===
RFC (Sep 6, 2023)
* initial release as RFC
AKASHI Takahiro (6):
firmware: scmi: fix protocol enumeration logic
firmware: scmi: add pinctrl protocol support
pinctrl: add scmi driver
gpio: add scmi driver based on pinctrl
firmware: scmi: add pseudo pinctrl protocol support on sandbox
test: dm: add SCMI pinctrl test
arch/sandbox/dts/test.dts | 115 +++
cmd/scmi.c |1 +
drivers/firmware/scmi/Kconfig |3 +
drivers/firmware/scmi/Makefile
Re: [PATCH 0/2] fsl-layerscape: drop support for obsolete PPA secure firmware
On 8/18/2023 9:43 PM, Laurentiu Tudor wrote: From: Laurentiu Tudor Support for this in-house secure firmware was discontinued long time ago so remove it. First patch deletes the defconfigs that use it and the second one removes the actual support. Laurentiu Tudor (2): configs: layerscape: delete defconfigs using legacy PPA secure FW fsl-layerscape: drop obsolete PPA secure firmware support Good to see this. Acked-by: Peng Fan
