Re: [U-Boot] [PATCH] x86: qemu: Drop our own ACPI implementation
Hi Simon, Do you want me to rework this with DM PCI ? Regards, Saket Sinha On Wed, Apr 20, 2016 at 6:43 PM, Simon Glass wrote: > Hi Bin, > > On 13 April 2016 at 01:52, Bin Meng wrote: >> Our own ACPI implementation (when CONFIG_QEMU_ACPI_TABLE is not set) >> does not build anymore after x86 has been fully converted to DM PCI. >> Instead of trying to fix the build errors, given we now have the ACPI >> support via QEMU's fw_cfg interface, which is a more reliable way to >> generate correct ACPI tables then by ourselves, hence drop our own >> ACPI implementation. >> >> Signed-off-by: Bin Meng >> >> --- >> >> arch/x86/cpu/qemu/Makefile | 3 - >> arch/x86/cpu/qemu/acpi.c | 176 -- >> arch/x86/cpu/qemu/acpi/cpu-hotplug.asl | 80 --- >> arch/x86/cpu/qemu/acpi/dbug.asl | 25 -- >> arch/x86/cpu/qemu/acpi/hpet.asl | 31 --- >> arch/x86/cpu/qemu/acpi/isa.asl | 102 >> arch/x86/cpu/qemu/acpi/pci-crs.asl | 61 - >> arch/x86/cpu/qemu/dsdt.asl | 412 - >> 8 files changed, 890 deletions(-) >> delete mode 100644 arch/x86/cpu/qemu/acpi.c >> delete mode 100644 arch/x86/cpu/qemu/acpi/cpu-hotplug.asl >> delete mode 100644 arch/x86/cpu/qemu/acpi/dbug.asl >> delete mode 100644 arch/x86/cpu/qemu/acpi/hpet.asl >> delete mode 100644 arch/x86/cpu/qemu/acpi/isa.asl >> delete mode 100644 arch/x86/cpu/qemu/acpi/pci-crs.asl >> delete mode 100644 arch/x86/cpu/qemu/dsdt.asl > > Reviewed-by: Simon Glass > > My only concern is that this was supposed to lead to ACPI support for real > hardware. If you drop this, does it make it harder? > > Regards, > Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] x86: qemu: Drop our own ACPI implementation
Hi Stefan/Bin, >>> >>> No, the infrastructure is still there. Only the QEMU ASL (manual) part >>> was removed. I am going to add ACPI support to BayTrail soon >>> (hopefully). >> >> >> Interesting. This is also on my to-do list. We should definitely >> coordinate our efforts here. So please keep me updated once you >> really start here. I'll do the same. :) >> > > Definitely. I plan to ping you before I really start to write anything > as I remember you did mention ACPI before. I don't want to see any > duplicated effort :-) > I am planning to resume my ACPI work for Minnowmax and have shared the Minnowmax ACPI patches (with some issues and which would now be broken due to DM PCI). I would need some guidance for this so let me know how we can co-ordinate on the same. Regards, Saket Sinha ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/7] add fw_cfg interface support for qemu-x86 targets
+ dst = -1;
+ for (j = 0; j < i; j++) {
+ if (s[j].command !=
BIOS_LINKER_LOADER_COMMAND_ALLOCATE)
+ continue;
+ if (strcmp(s[j].alloc.file,
s[i].cksum.file) == 0)
+ dst = j;
+ }
+ if (dst == -1)
+ goto err;
+
+ ptr4 = (uint32_t*)(addrs[dst] + s[i].cksum.offset);
+ *ptr4 = 0;
+ *ptr4 = acpi_checksum((void *)(addrs[dst] +
s[i].cksum.start),
+ s[i].cksum.length);
+ break;
+
+ default:
+ goto err;
+ };
+ }
+
+ free(s);
+ free(addrs);
+ return ALIGN(current, 16);
+
+err:
+ free(s);
+ free(addrs);
+ return 0;
+}
+
+u8 acpi_checksum(u8 *table, u32 length)
+{
+ u8 ret=0;
+
+ while(length --){
+ret += *table;
+table++;
+ }
+ return -ret;
+}
+
diff --git a/arch/x86/include/asm/fw_cfg.h b/arch/x86/include/asm/fw_cfg.h
new file mode 100644
index 000..9f512ca
--- /dev/null
+++ b/arch/x86/include/asm/fw_cfg.h
@@ -0,0 +1,81 @@
+#include
+
+#define FW_CFG_SIGNATURE0x00
+#define FW_CFG_ID 0x01
+#define FW_CFG_UUID 0x02
+#define FW_CFG_RAM_SIZE 0x03
+#define FW_CFG_NOGRAPHIC0x04
+#define FW_CFG_NB_CPUS 0x05
+#define FW_CFG_MACHINE_ID 0x06
+#define FW_CFG_KERNEL_ADDR 0x07
+#define FW_CFG_KERNEL_SIZE 0x08
+#define FW_CFG_KERNEL_CMDLINE 0x09
+#define FW_CFG_INITRD_ADDR 0x0a
+#define FW_CFG_INITRD_SIZE 0x0b
+#define FW_CFG_BOOT_DEVICE 0x0c
+#define FW_CFG_NUMA 0x0d
+#define FW_CFG_BOOT_MENU0x0e
+#define FW_CFG_MAX_CPUS 0x0f
+#define FW_CFG_KERNEL_ENTRY 0x10
+#define FW_CFG_KERNEL_DATA 0x11
+#define FW_CFG_INITRD_DATA 0x12
+#define FW_CFG_CMDLINE_ADDR 0x13
+#define FW_CFG_CMDLINE_SIZE 0x14
+#define FW_CFG_CMDLINE_DATA 0x15
+#define FW_CFG_SETUP_ADDR 0x16
+#define FW_CFG_SETUP_SIZE 0x17
+#define FW_CFG_SETUP_DATA 0x18
+#define FW_CFG_FILE_DIR 0x19
+
+#define FW_CFG_FILE_FIRST 0x20
+#define FW_CFG_FILE_SLOTS 0x10
+#define FW_CFG_MAX_ENTRY(FW_CFG_FILE_FIRST+FW_CFG_FILE_SLOTS)
+
+#define FW_CFG_WRITE_CHANNEL0x4000
+#define FW_CFG_ARCH_LOCAL 0x8000
+#define FW_CFG_ENTRY_MASK ~(FW_CFG_WRITE_CHANNEL | FW_CFG_ARCH_LOCAL)
+
+#define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
+#define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
+#define FW_CFG_IRQ0_OVERRIDE(FW_CFG_ARCH_LOCAL + 2)
+#define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
+#define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4)
+
+#define FW_CFG_INVALID 0x
+
+typedef struct FWCfgFile {
+uint32_t size;/* file size */
+uint16_t select; /* write this to 0x510 to read it */
+uint16_t reserved;
+char name[56];
+} FWCfgFile;
+
+typedef struct FWCfgFiles {
+uint32_t count;
+FWCfgFile f[];
+} FWCfgFiles;
+
+typedef struct FwCfgE820Entry {
+uint64_t address;
+uint64_t length;
+uint32_t type;
+} FwCfgE820Entry __attribute((__aligned__(4)));
+
+
+#define SMBIOS_FIELD_ENTRY 0
+#define SMBIOS_TABLE_ENTRY 1
+
+typedef struct FwCfgSmbios {
+uint16_t length;
+uint8_t headertype;
+uint8_t tabletype;
+uint16_t fieldoffset;
+} FwCfgSmbios;
+
+
+void fw_cfg_get(int entry, void *dst, int dstlen);
+int fw_cfg_check_file(const char *name);
+void fw_cfg_load_file(const char *name, void *dst);
+int fw_cfg_max_cpus(void);
+unsigned long fw_cfg_acpi_tables(unsigned long start);
+u8 acpi_checksum(u8 *table, u32 length);
diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c
index 8031201..eb49478 100644
--- a/arch/x86/lib/tables.c
+++ b/arch/x86/lib/tables.c
@@ -7,6 +7,7 @@
#include
#include
#include
+#include
u8 table_compute_checksum(void *v, int len)
{
@@ -32,4 +33,6 @@ void write_tables(void)
rom_table_end = write_sfi_table(rom_table_end);
rom_table_end = ALIGN(rom_table_end, 1024);
#endif
+ rom_table_end = fw_cfg_acpi_tables(rom_table_end);
+ rom_table_end = ALIGN(rom_table_end, 1024);
}
Apart from this, there is Bin's fix for a bug in the patch -
> diff --git a/arch/x86/cpu/qemu/fw_cfg.c b/arch/x86/cpu/qemu/fw_cfg.c
> index c6ef5cd..b5f3e0a 100644
> --- a/arch/x86/cpu/qemu/fw_cfg.c
> +++ b/arch/x86/cpu/qemu/fw_cfg.c
> @@ -34,7 +34,8 @@ void fw_cfg_get(int entry, void *dst, int dstlen)
>
> static void fw_cfg_init_file(void)
> {
> - u32 i, size, count = 0;
> + u32 i, size;
> + volatile u32 count = 0;
>
> if (fw_files != NULL)
> return;
>
Lets see if we can get this patch functional and able to utilize
fw_cfg to load tables for U-boot like SeaBIOS for qemu targets.
Regards,
Saket Sinha
___
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Re: [U-Boot] [PATCH 0/7] add fw_cfg interface support for qemu-x86 targets
Hi Miao, Find my response inline. > > The main purpose of my patch is: > + directly loads kernel from qemu > + eliminate the cpu number limits in smp boot > Our patches are similar in case of fw_cfg apis support it brings to u-boot but our use case of using them are different. My patches target tables (ACPI tables to be specific.) > I am not familiar with the acpi part, but if you have a > basic configuration to reproduce the error, maybe I can > have a try. > I shared the patch with you on the separate thread. If you read through the thread, you can find the details how to reproduce it. Anyways, I am sharing how you can test my patch to reproduce the error. 1. Apply the patch file(sahred seprately) to u-boot-x86 tree. patch -p1 *.patch 2. make qemu-x86_defconfig, make all 3. qemu-system-i386 -nographic -bios u-boot.rom -net nic -net user,tftp=/tftpboot Regards, Saket Sinha ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Fwd: [PATCH] Initial fw_cfg support for qemu-x86 targets.
Hi Mian, This was the initial attempt to add fw_cfg interface support for qemu-x86 targets to mainly support ACPI tables. The patches were dropped due to the issues discussed in the thread. If we can collaborate the patches in the sense that we are able to load ACPI tables(and other tables) successfully, it would be great. Regards, Saket Sinha -- Forwarded message -- From: Bin Meng Date: Fri, Jun 5, 2015 at 2:36 PM Subject: Re: [PATCH] Initial fw_cfg support for qemu-x86 targets. To: Saket Sinha Cc: Simon Glass Hi Saket, On Fri, Jun 5, 2015 at 4:50 PM, Saket Sinha wrote: > Hi Bin, > >>> Error: Hardware did not enter ACPI mode >>> Unable to enable ACPI >>> Interpreter disabled. >>> >>> What can be the reason for these errors ? >> >> Sorry I have no idea. I think you have to read the whole ACPI >> specification to understand how the ACPI is used to be the interface >> between OS and the underlying hardware, and that's your primary GSoC >> job I believe :) >> > > Sure. I have been going through the ACPI specification. > Hope to find how to debug this error soon. > > Would it be reasonable to send this patch to mainline now, with the > present fw_cfg support that we have got working so far? > I would recommend we investigate the kernel ACPI error first and see what's going on there. Also I noticed that the QEMU fw_cfg ACPI table is huge (exactly 128KB). But lots of its memory space is just zero. I think this needs to be investigated. Also before sending patches to mainline, you need do some house keeping like fixing up all these camel case variables/structure names. > The next thing I am looking forward to is adding builtin ACPI support > for qemu targets in u-boot. > > If getting tables from fw_cfg fails, then all these ACPI tables would > be written. > Since it would fail for all non-qemu targets, this code snipet would > also apply for minnowboard and other x86 targets. > > Something like this - > fw = fw_cfg_acpi_tables(current); > if (fw) > return fw; > else > write_acpi_tables(current); Please follow the same way we write PIRQ/SFI tables. See arch/x86/Kconfig for a Kconfig option control. > I would deliberatley get it failed for qemu targets to see if builtin > ACPI table works. > Once these builtin table start working on qemu, it should work on > minnowmax too with little or no changes. > Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/7] add fw_cfg interface support for qemu-x86 targets
Hi Miao, Thanks for the patches. I made an initial attempt to support the fw_cfg in U-boot for QEMU to get acpi tables by fw_cfg for qemu-x86 targets. The idea was if we find acpi tables in fw_cfg try loading them, otherwise fallback to the builtin acpi tables. The patch was dropped mainly because ACPI tables loaded by fw_cfg had some issues which I could not figure out. The patches were discussed(me, Simon and Bin) offline(off the mailing list), so I am forwarding it to you and the community. If we can collaborate the patches in the sense that we are able to load ACPI tables(and other tables) successfully, it would be great. Regards, Saket Sinha On Mon, Dec 28, 2015 at 2:48 PM, Miao Yan wrote: > The fw_cfg interface provided by QEMU allow guests to retrieve various > information > about the system, e.g. cpu number, variaous firmware data, kernel setup, etc. > The > fw_cfg interface can be accessed through 3 IO ports (on x86), using x86 in/out > instructions. > > - 0x510: select configuration items to access > - 0x511: reading this port will return data selected in 0x510 > - 0x514: this can be used to detect if DMA interface is available > > If fw_cfg DMA interface is available, it can be used to accelerate > accesses. > > This patchset adds the following supports for qemu-x86 targets: > > + the fw_cfg driver itself > > + add a U-Boot command 'fw' to support direct accessing kernel informtion > from fw_cfg interface, this saves the time of loading them from hard disk > or > network again, through emulated devices. > > + use fw_cfg to get cpu number at runtime, so smp boot no longer relies on > the cpu node hard-coded in dts files. > > Miao Yan (7): > x86: qemu: add fw_cfg support > x86: qemu: add a cpu uclass driver for qemu target > x86: fix a typo in function name > x86: qemu: use actual CPU number for allocating memory > x86: qemu: add qemu_fwcfg_fdt_fixup() > x86: qemu: fixup cpu node in device tree > qemu-x86: add documentaion for the fw_cfg interface > > arch/x86/cpu/mp_init.c | 12 +- > arch/x86/cpu/qemu/Makefile | 2 +- > arch/x86/cpu/qemu/cpu.c | 58 > arch/x86/cpu/qemu/fw_cfg.c | 281 > +++ > arch/x86/cpu/qemu/fw_cfg.h | 85 > arch/x86/cpu/qemu/qemu.c | 7 + > arch/x86/dts/qemu-x86_i440fx.dts | 18 +-- > arch/x86/dts/qemu-x86_q35.dts| 19 +-- > doc/README.x86 | 36 - > 9 files changed, 473 insertions(+), 45 deletions(-) > create mode 100644 arch/x86/cpu/qemu/cpu.c > create mode 100644 arch/x86/cpu/qemu/fw_cfg.c > create mode 100644 arch/x86/cpu/qemu/fw_cfg.h > > -- > 1.9.1 > > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Next for x86?
Hi Simon, >>> >> >> Two biggest feature gaps so far are complete ACPI support, and SMM >> support. ACPI is pretty much a must-have if we want power management >> feature in the OS. F). >> >> ACPI support seems to be a must if we want to support booting Windows, >> also we may need help from SeaBIOS (chain-loaded from U-Boot). > > Yes we should try to get that finished. It seems pretty close at least > on qemu and minnowboard max. > I have been going through the PCI emulation driver of QEMU as to understand the BAR entries errors we are getting on the current qemu support. I hope to fix it for QEMU soon and would be sharing with Bin and yourself, my findings(and patches soon). For Minnowmax, apart from the PCI configuration errors(that we get similar to QEMU), the power management via the API needs to work too so that may take some more time. Regards, Saket Sinha ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] PCI issues for bringing up ACPI support on QEMU and Minnowmax target
Hi, This is regarding the PCI configuration issue I am facing for bringing up ACPI Support on QEMU and Minnowmax. Please find below my observations for the QEMU architecture. I am comparing arch/x86/cpu/qemu/acpi/pci-crs.asl and arch/x86/dts/qemu-x86_q35.dts and we find there are different ranges been specified for PCI configuration in both the files. I have found out the following things -- a) What does ACPI tell the OS - The most important chips which responsible for the BIOS code handling are the southbridge and northbridge. The northbridge acts as the address forwarder, meaning: it responds to this "special" memory address in different fashion compared to "normal" memory address which is forwarded directly to RAM. The southbridge acts as the address decoder, meaning: it decodes this "special" memory addresses into the right chip "beneath" it, such as the BIOS chip. Below is an example:*Physical Address**Also Known As**Used by**Address Aliasing Note*000F_h - 000F_hF_seg / F_segment1 Mbit, 2 MBit, and 4 Mbit BIOSalias to _h - _h in *all* chipset just after power-up000E_h - 000E_hE_seg / E_segment1 Mbit, 2 Mbit, and 4 Mbit BIOSalias to FFFE_h - FFFE_h in *some* chipset just after power-upFFFD_h - FFFD_hD_seg / D_segment2 Mbit, and 4 Mbit BIOS-FFFC_h - FFFC_hC_seg / C_segment2 Mbit, and 4 Mbit BIOS-FFF8_h - FFFB_h-4 Mbit BIOS- The address ranges shown above contain the BIOS code(part of the ACPI) and pretty much system specific. Thus all this is communicated by the ACPI to the OS. b) What does Device Tree tell the OS - >From 0x8000 to 0xe000 is the PCI memory space, I/O space and prefetch space where memory mapping of the PCI bus. This is what device tree is dictating. To sum up Device Tree and ACPI do NOT the same things and thus play different values to make devices connected to PCI bus available. The issue I am facing is that I am getting configuration errors with BARs. >> [0.660567] pci :00:01.0: can't claim BAR 0 [mem >> 0xd000-0xd0ff pref]: no compatible bridge window >> [0.662083] pci :00:01.0: can't claim BAR 2 [mem >> 0xc000-0xcfff]: no compatible bridge window >> [0.663062] pci :00:02.0: can't claim BAR 0 [mem >> 0xc002-0xc003]: no compatible bridge window >> [0.664164] pci :00:1f.2: can't claim BAR 5 [mem >> 0xc008-0xc0080fff]: no compatible bridge window BARs are part of the so-called PCI configuration register. Every PCI device must implement the PCI configuration register dictated by the PCI specification. Otherwise, the device will not be regarded as a valid PCI device. As per my understanding for Qemu q35 (emulation of the ICH9 hostchipset) where we have PCIe support which is made possible by PCI express enhanced accessmechanism (ECAM). This address is 0xe000 which is what I have put in arch/x86/dts/qemu-x86_q35.dts when I am memory mapping the PCI bus. Any inputs regarding the issue, as to what I am doing wrong here, are welcome. Regards, Saket Sinha ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] PCI configuration Issue for QEMU ACPI Support
Hi, This is regarding the PCI configuration Issue for QEMU ACPI Support. I am comparing arch/x86/cpu/qemu/acpi/pci-crs.asl and arch/x86/dts/qemu-x86_q35.dts and we find there are different ranges been specified for PCI configuration in both the files. As per my understanding for Qemu q35 (emulation of the ICH9 host chipset) where we have PCIe support which is made possible by PCI express enhanced accessmechanism (ECAM). This address is 0xe000 which is what I have put in arch/x86/dts/qemu-x86_q35.dts when I am memory mapping the PCI bus. I do not find this range in listed in arch/x86/dts/qemu-x86_q35.dts where 0x8000 which is the start of the range in the device tree. Thus U-Boot sets PCI to map into memory starting at 0x8000 but when Linux starts booting with ACPI support it gets different values and we get PCI configuration errors in the Linux boot bootup logs. Regards, Saket Sinha ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [UBOOT PATCH v1 2/2] x86: Add DSDT table for supporting ACPI on Minnowmax
Hi Bin, On Mon, Aug 31, 2015 at 8:58 AM, Bin Meng wrote: > Hi Saket, > > On Sun, Aug 30, 2015 at 8:10 AM, Saket Sinha wrote: >> The DSDT table contains a bytecode that is executed by a driver in the >> kernel. >> >> Signed-off-by: Saket Sinha >> --- >> >And any errors did you see? > I am getting PCI configuration errors on Minnowmax similar to those we have on QEMU. I am trying to solve them. > > What tests have you run with ACPI on MinnowMax? I am fixing the errors first before going into testing. The first step is to let Linux parse the ACPI table without any errors. Then we can go into the testing aspect for different power stages. Regards, Saket Sinha ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [UBOOT PATCH v1 0/2] Add ACPI table support on Minnowmax
This series adds ACPI table support on Minnowmax. Saket Sinha (2): x86: Add ACPI table support to Minnowmax x86: Add DSDT table for supporting ACPI on Minnowmax board/intel/minnowmax/Makefile | 1 + board/intel/minnowmax/acpi.c| 234 +++ board/intel/minnowmax/acpi/cpu.asl | 65 +++ board/intel/minnowmax/acpi/device_nvs.asl | 75 board/intel/minnowmax/acpi/globalnvs.asl| 88 + board/intel/minnowmax/acpi/mainboard.asl| 13 ++ board/intel/minnowmax/acpi/platform.asl | 62 ++ board/intel/minnowmax/acpi/sleepstates.asl | 14 ++ board/intel/minnowmax/acpi/southcluster.asl | 286 board/intel/minnowmax/dsdt.asl | 46 + 10 files changed, 884 insertions(+) create mode 100644 board/intel/minnowmax/acpi.c create mode 100644 board/intel/minnowmax/acpi/cpu.asl create mode 100644 board/intel/minnowmax/acpi/device_nvs.asl create mode 100644 board/intel/minnowmax/acpi/globalnvs.asl create mode 100644 board/intel/minnowmax/acpi/mainboard.asl create mode 100644 board/intel/minnowmax/acpi/platform.asl create mode 100644 board/intel/minnowmax/acpi/sleepstates.asl create mode 100644 board/intel/minnowmax/acpi/southcluster.asl create mode 100644 board/intel/minnowmax/dsdt.asl -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [UBOOT PATCH v6 2/3] x86: Add ACPI table support to QEMU
Hi Bin,
On Sun, Aug 23, 2015 at 5:14 PM, Bin Meng wrote:
> Hi Saket,
>
> On Sun, Aug 23, 2015 at 7:33 PM, Saket Sinha wrote:
>> Hi Bin,
>>
>>
>> On Sun, Aug 23, 2015 at 3:03 PM, Bin Meng wrote:
>>> Hi Saket,
>>>
>>> On Sat, Aug 22, 2015 at 2:50 PM, Saket Sinha
>>> wrote:
>>>> This patch mainly adds ACPI support to QEMU.
>>>> Verified by booting Linux kernel on QEMU i440FX and Q35.
>>>
>>> I don't think ACPI is for i440FX. Although it boots, but that does not
>>> mean ACPI really works. These ASL files describing Q35 platform, not
>>> i440FX.
>>>
>>>>
>>>> Signed-off-by: Saket Sinha
>>>> ---
>>>>
>>>> arch/x86/cpu/qemu/Makefile | 1 +
>>>> arch/x86/cpu/qemu/acpi.c | 179
>>>> +
>>>> 2 files changed, 180 insertions(+)
>>>> create mode 100644 arch/x86/cpu/qemu/acpi.c
>>>>
>>>> diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
>>>> index 9a66b16..8c3884c 100644
>>>> --- a/arch/x86/cpu/qemu/Makefile
>>>> +++ b/arch/x86/cpu/qemu/Makefile
>>>> @@ -8,4 +8,5 @@ ifndef CONFIG_EFI_STUB
>>>> obj-y += car.o dram.o
>>>> endif
>>>> obj-y += qemu.o
>>>> +obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o
>>>> obj-$(CONFIG_PCI) += pci.o
>>>> diff --git a/arch/x86/cpu/qemu/acpi.c b/arch/x86/cpu/qemu/acpi.c
>>>> new file mode 100644
>>>> index 000..2496da7
>>>> --- /dev/null
>>>> +++ b/arch/x86/cpu/qemu/acpi.c
>>>> @@ -0,0 +1,179 @@
>>>> +/*
>>>> + * Copyright (C) 2015, Saket Sinha
>>>> + *
>>>> + * SPDX-License-Identifier: GPL-2.0+
>>>> + */
>>>> +
>>>> +#include
>>>> +#include
>>>> +#include
>>>> +#include
>>>> +
>>>> +void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
>>>> + void *dsdt)
>>>> +{
>>>> + acpi_header_t *header = &(fadt->header);
>>>> + u16 pmbase;
>>>> +
>>>> + pci_dev_t bdf = PCI_BDF(0, 0x1f, 0);
>>>> + pci_read_config_word(bdf, 0x40, &pmbase);
>>>> +
>>>> + /*
>>>
>>> Nits: misaligned
>>>
>>>> +* TODO(saket.sinh...@gmail.com): wrong value
>>>> +* of pmbase by above function. Harcoding it to
>>>
>>> Typo: Hardcoding
>>>
>>>> +* correct value. Since no PCI register is
>>>> +* programmed Power Management Interface is
>>>> +* not working
>>>> +*/
>>>> +
>>>
>>> You still did not address this issue before sending v6. I don't
>>> understand why don't you just prepare a separate patch to program this
>>> PMBASE register by yourself. Are you waiting for me or Simon to do
>>> this, or are you looking for something else?
>>>
>>
>> As discussed with Simon, he wants me to come up with ACPI support on
>> Minnowmax
>> first and look up for QEMU fixes later before the deadline of this
>> program(GSOC) ends.
>>
>> Currently, I have been working on Minnowmax ACPI support and post a
>> workable patch for the same on mailing list ASAP.
>>
>> If you want me to currently stop on this activity and work on the Qemu
>> patch which programs PMBASE register first,
>> let us discuss it with Simon and plan accordingly.
>>
>
> OK, thanks for the update. It's better you'd send this clarification
> in your v5 patch thread which should have addressed my concern before
> sending v6.
>
> Frankly speaking, working on MinnowMax now without a basically working
> ACPI platform does not save us time. So far ACPI on QEMU is just
> partially working. We only addressed the Configuration part, but
> nothing in the Power management part was looked at. That's where this
> PMBASE is concerned.
I agree with you on this but what I believe is that if I post a
minimal working patch of minnowmax on the mailing list, others can
review and gauge the work done and current progress.
Let Simon has his opinion on this and then we can decide as to what
actions to take from here.
Regards,
Saket Sinha
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Re: [U-Boot] [UBOOT PATCH v6 2/3] x86: Add ACPI table support to QEMU
Hi Bin,
On Sun, Aug 23, 2015 at 3:03 PM, Bin Meng wrote:
> Hi Saket,
>
> On Sat, Aug 22, 2015 at 2:50 PM, Saket Sinha wrote:
>> This patch mainly adds ACPI support to QEMU.
>> Verified by booting Linux kernel on QEMU i440FX and Q35.
>
> I don't think ACPI is for i440FX. Although it boots, but that does not
> mean ACPI really works. These ASL files describing Q35 platform, not
> i440FX.
>
>>
>> Signed-off-by: Saket Sinha
>> ---
>>
>> arch/x86/cpu/qemu/Makefile | 1 +
>> arch/x86/cpu/qemu/acpi.c | 179
>> +
>> 2 files changed, 180 insertions(+)
>> create mode 100644 arch/x86/cpu/qemu/acpi.c
>>
>> diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
>> index 9a66b16..8c3884c 100644
>> --- a/arch/x86/cpu/qemu/Makefile
>> +++ b/arch/x86/cpu/qemu/Makefile
>> @@ -8,4 +8,5 @@ ifndef CONFIG_EFI_STUB
>> obj-y += car.o dram.o
>> endif
>> obj-y += qemu.o
>> +obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o
>> obj-$(CONFIG_PCI) += pci.o
>> diff --git a/arch/x86/cpu/qemu/acpi.c b/arch/x86/cpu/qemu/acpi.c
>> new file mode 100644
>> index 000..2496da7
>> --- /dev/null
>> +++ b/arch/x86/cpu/qemu/acpi.c
>> @@ -0,0 +1,179 @@
>> +/*
>> + * Copyright (C) 2015, Saket Sinha
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
>> + void *dsdt)
>> +{
>> + acpi_header_t *header = &(fadt->header);
>> + u16 pmbase;
>> +
>> + pci_dev_t bdf = PCI_BDF(0, 0x1f, 0);
>> + pci_read_config_word(bdf, 0x40, &pmbase);
>> +
>> + /*
>
> Nits: misaligned
>
>> +* TODO(saket.sinh...@gmail.com): wrong value
>> +* of pmbase by above function. Harcoding it to
>
> Typo: Hardcoding
>
>> +* correct value. Since no PCI register is
>> +* programmed Power Management Interface is
>> +* not working
>> +*/
>> +
>
> You still did not address this issue before sending v6. I don't
> understand why don't you just prepare a separate patch to program this
> PMBASE register by yourself. Are you waiting for me or Simon to do
> this, or are you looking for something else?
>
As discussed with Simon, he wants me to come up with ACPI support on Minnowmax
first and look up for QEMU fixes later before the deadline of this
program(GSOC) ends.
Currently, I have been working on Minnowmax ACPI support and post a
workable patch for the same on mailing list ASAP.
If you want me to currently stop on this activity and work on the Qemu
patch which programs PMBASE register first,
let us discuss it with Simon and plan accordingly.
Regards,
Saket Sinha
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[U-Boot] [UBOOT PATCH v6 1/3] x86: Generate a valid ACPI table
Implement write_acpi_table() to create a minimal working ACPI table.
This includes writing FACS, XSDT, RSDP, FADT, MCFG, MADT, DSDT & SSDT
ACPI table entries.
Use a Kconfig option GENERATE_ACPI_TABLE to tell U-Boot whether we need
actually write the APCI table just like we did for PIRQ routing, MP table
and SFI tables. With ACPI table existence, linux kernel gets control of
power management, thermal management, configuration management and
monitoring in hardware.
Signed-off-by: Saket Sinha
---
arch/x86/Kconfig | 9 +
arch/x86/include/asm/acpi_table.h | 390 ++
arch/x86/lib/Makefile | 1 +
arch/x86/lib/acpi_table.c | 436 ++
arch/x86/lib/tables.c | 5 +
scripts/Makefile.lib | 11 +
6 files changed, 852 insertions(+)
create mode 100644 arch/x86/include/asm/acpi_table.h
create mode 100644 arch/x86/lib/acpi_table.c
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 273f08f..5e42d7d 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -349,6 +349,15 @@ config GENERATE_MP_TABLE
multiprocessing as well as symmetric I/O interrupt handling with
the local APIC and I/O APIC.
+config GENERATE_ACPI_TABLE
+ bool "Generate an ACPI (Advanced Configuration and Power Interface)
table"
+ default n
+ help
+ The Advanced Configuration and Power Interface (ACPI) specification
+ provides an open standard for device configuration and management
+ by the operating system. It defines platform-independent interfaces
+ for configuration and power management monitoring.
+
endmenu
config MAX_PIRQ_LINKS
diff --git a/arch/x86/include/asm/acpi_table.h
b/arch/x86/include/asm/acpi_table.h
new file mode 100644
index 000..cceed97
--- /dev/null
+++ b/arch/x86/include/asm/acpi_table.h
@@ -0,0 +1,390 @@
+/*
+ * Based on acpi.c from coreboot
+ *
+ * Copyright (C) 2015, Saket Sinha
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+
+#defineRSDP_SIG"RSD PTR " /* RSDT pointer signature */
+#defineACPI_TABLE_CREATOR "UBOOT " /* Must be 8 bytes
long! */
+#defineOEM_ID "UBOOT "/* Must be 6 bytes long! */
+#defineASLC"INTL" /* Must be exactly 4 bytes long! */
+
+#defineOEM_REVISION42
+#defineASL_COMPILER_REVISION 42
+
+/*IO ports to generate SMIs*/
+#defineAPM_CNT 0xb2
+#defineAPM_CNT_CST_CONTROL 0x85
+#defineAPM_CNT_PST_CONTROL 0x80
+#defineAPM_CNT_ACPI_DISABLE0x1e
+#defineAPM_CNT_ACPI_ENABLE 0xe1
+#defineAPM_CNT_MBI_UPDATE 0xeb
+#defineAPM_CNT_GNVS_UPDATE 0xea
+#defineAPM_CNT_FINALIZE0xcb
+#defineAPM_CNT_LEGACY 0xcc
+#defineAPM_ST 0xb3
+
+/* Multiple Processor Interrupts*/
+#defineMP_IRQ_POLARITY_DEFAULT 0x0
+#defineMP_IRQ_POLARITY_HIGH0x1
+#defineMP_IRQ_POLARITY_LOW 0x3
+#defineMP_IRQ_POLARITY_MASK0x3
+#defineMP_IRQ_TRIGGER_DEFAULT 0x0
+#defineMP_IRQ_TRIGGER_EDGE 0x4
+#defineMP_IRQ_TRIGGER_LEVEL0xc
+#defineMP_IRQ_TRIGGER_MASK 0xc
+
+/*
+ * Interrupt assigned for SCI in order to
+ * create the ACPI MADT IRQ override entry
+ */
+#defineACTL0x00
+#defineSCIS_MASK 0x07
+#defineSCIS_IRQ9 0x00
+#defineSCIS_IRQ10 0x01
+#defineSCIS_IRQ11 0x02
+#defineSCIS_IRQ20 0x04
+#defineSCIS_IRQ21 0x05
+#defineSCIS_IRQ22 0x06
+#defineSCIS_IRQ23 0x07
+
+#defineACPI_REV_ACPI_1_0 1
+#defineACPI_REV_ACPI_2_0 1
+#defineACPI_REV_ACPI_3_0 2
+#defineACPI_REV_ACPI_4_0 3
+#defineACPI_REV_ACPI_5_0 5
+
+#defineACPI_RSDP_REV_ACPI_1_0 0
+#defineACPI_RSDP_REV_ACPI_2_0 2
+
+typedef struct acpi_gen_regaddr {
+ u8 space_id;/* Address space ID */
+ u8 bit_width; /* Register size in bits */
+ u8 bit_offset; /* Register bit offset */
+ union {
+ /* Reserved in ACPI 2.0 - 2.0b */
+ u8 resv;
+ /* Access size in ACPI 2.0c/3.0/4.0/5.0 */
+ u8 access_size;
+ };
+ u32 addrl; /* Register address, low 32 bits */
+ u32 addrh; /* Register address, high 32 bits */
+} acpi_addr_t;
+
+
+/* RSDP (Root System Description Pointer)
+Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum. */
+struct acpi_rsdp {
+ char signature[8]; /* RSDP signature */
+ u8checksum; /* Checksum of the first 20 bytes */
+ char oem_id[6];/* OEM ID */
+ u8revision; /* 0 for ACPI 1.0, 2 for ACPI 2.0/3.0/4.0 */
+ u
[U-Boot] [UBOOT PATCH v6 0/3] Add ACPI table support
ACPI(Advanced Configuration and Power Interface), is a Power Management and configuration standard allowing the operating system to control the amount of power each device is given (allowing it to put certain devices on standby or power-off for example). It is also used to control and/or check thermal zones (temperature sensors, fan speeds, etc), battery levels, PCI IRQ routing, CPUs, NUMA domains and many other things. This series adds ACPI support to QEMU targets. Currently, the Linux kernel graphics console does not work with this series. Changes in v6: - Incoporated Bin's review comments. Saket Sinha (3): x86: Generate a valid ACPI table x86: Add ACPI table support to QEMU x86: Add DSDT table for supporting ACPI on QEMU arch/x86/Kconfig | 9 + arch/x86/cpu/qemu/Makefile | 1 + arch/x86/cpu/qemu/acpi.c | 179 ++ arch/x86/cpu/qemu/acpi/cpu-hotplug.asl | 80 ++ arch/x86/cpu/qemu/acpi/dbug.asl| 25 ++ arch/x86/cpu/qemu/acpi/hpet.asl| 31 +++ arch/x86/cpu/qemu/acpi/isa.asl | 102 arch/x86/cpu/qemu/acpi/pci-crs.asl | 61 + arch/x86/cpu/qemu/dsdt.asl | 412 +++ arch/x86/include/asm/acpi_table.h | 390 + arch/x86/lib/Makefile | 1 + arch/x86/lib/acpi_table.c | 436 + arch/x86/lib/tables.c | 5 + scripts/Makefile.lib | 11 + 14 files changed, 1743 insertions(+) create mode 100644 arch/x86/cpu/qemu/acpi.c create mode 100644 arch/x86/cpu/qemu/acpi/cpu-hotplug.asl create mode 100644 arch/x86/cpu/qemu/acpi/dbug.asl create mode 100644 arch/x86/cpu/qemu/acpi/hpet.asl create mode 100644 arch/x86/cpu/qemu/acpi/isa.asl create mode 100644 arch/x86/cpu/qemu/acpi/pci-crs.asl create mode 100644 arch/x86/cpu/qemu/dsdt.asl create mode 100644 arch/x86/include/asm/acpi_table.h create mode 100644 arch/x86/lib/acpi_table.c -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [UBOOT PATCH v6 2/3] x86: Add ACPI table support to QEMU
This patch mainly adds ACPI support to QEMU.
Verified by booting Linux kernel on QEMU i440FX and Q35.
Signed-off-by: Saket Sinha
---
arch/x86/cpu/qemu/Makefile | 1 +
arch/x86/cpu/qemu/acpi.c | 179 +
2 files changed, 180 insertions(+)
create mode 100644 arch/x86/cpu/qemu/acpi.c
diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
index 9a66b16..8c3884c 100644
--- a/arch/x86/cpu/qemu/Makefile
+++ b/arch/x86/cpu/qemu/Makefile
@@ -8,4 +8,5 @@ ifndef CONFIG_EFI_STUB
obj-y += car.o dram.o
endif
obj-y += qemu.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o
obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/x86/cpu/qemu/acpi.c b/arch/x86/cpu/qemu/acpi.c
new file mode 100644
index 000..2496da7
--- /dev/null
+++ b/arch/x86/cpu/qemu/acpi.c
@@ -0,0 +1,179 @@
+/*
+ * Copyright (C) 2015, Saket Sinha
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+
+void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
+ void *dsdt)
+{
+ acpi_header_t *header = &(fadt->header);
+ u16 pmbase;
+
+ pci_dev_t bdf = PCI_BDF(0, 0x1f, 0);
+ pci_read_config_word(bdf, 0x40, &pmbase);
+
+ /*
+* TODO(saket.sinh...@gmail.com): wrong value
+* of pmbase by above function. Harcoding it to
+* correct value. Since no PCI register is
+* programmed Power Management Interface is
+* not working
+*/
+
+ pmbase = 0x0600;
+
+ memset((void *)fadt, 0, sizeof(struct acpi_fadt));
+ memcpy(header->signature, "FACP", 4);
+ header->length = sizeof(struct acpi_fadt);
+ header->revision = 3;
+ memcpy(header->oem_id, OEM_ID, 6);
+ memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+ memcpy(header->asl_compiler_id, ASLC, 4);
+ header->asl_compiler_revision = 0;
+
+ fadt->firmware_ctrl = (unsigned long) facs;
+ fadt->dsdt = (unsigned long) dsdt;
+ fadt->model = 0x00;
+ fadt->preferred_pm_profile = PM_MOBILE;
+ fadt->sci_int = 0x9;
+ fadt->smi_cmd = 0;
+ fadt->acpi_enable = 0;
+ fadt->acpi_disable = 0;
+ fadt->s4bios_req = 0x0;
+ fadt->pstate_cnt = 0;
+ fadt->pm1a_evt_blk = pmbase;
+ fadt->pm1b_evt_blk = 0x0;
+ fadt->pm1a_cnt_blk = pmbase + 0x4;
+ fadt->pm1b_cnt_blk = 0x0;
+ fadt->pm2_cnt_blk = pmbase + 0x50;
+ fadt->pm_tmr_blk = pmbase + 0x8;
+ fadt->gpe0_blk = pmbase + 0x20;
+ fadt->gpe1_blk = 0;
+ fadt->pm1_evt_len = 4;
+ /*
+* Upper word is reserved and
+* Linux complains about 32 bit
+*/
+ fadt->pm1_cnt_len = 2;
+ fadt->pm2_cnt_len = 1;
+ fadt->pm_tmr_len = 4;
+ fadt->gpe0_blk_len = 16;
+ fadt->gpe1_blk_len = 0;
+ fadt->gpe1_base = 0;
+ fadt->cst_cnt = 0;
+ fadt->p_lvl2_lat = 1;
+ fadt->p_lvl3_lat = 0x39;
+ fadt->flush_size = 0;
+ fadt->flush_stride = 0;
+ fadt->duty_offset = 1;
+ fadt->duty_width = 3;
+ fadt->day_alrm = 0xd;
+ fadt->mon_alrm = 0x00;
+ fadt->century = 0x32;
+ fadt->iapc_boot_arch = 0x00;
+ fadt->flags = ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
+ ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE |
+ ACPI_FADT_DOCKING_SUPPORTED | ACPI_FADT_RESET_REGISTER |
+ ACPI_FADT_PLATFORM_CLOCK;
+ fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
+ fadt->reset_reg.bit_width = 8;
+ fadt->reset_reg.bit_offset = 0;
+ fadt->reset_reg.resv = 0;
+ fadt->reset_reg.addrl = 0xcf9;
+ fadt->reset_reg.addrh = 0;
+ fadt->reset_value = 0x06;
+ /*
+* Set X_FIRMWARE_CTRL only if FACS is
+* above 4GB. If X_FIRMWARE_CTRL is set,
+* then FIRMWARE_CTRL must be zero
+*/
+ fadt->x_firmware_ctl_l = 0;
+ fadt->x_firmware_ctl_h = 0;
+ fadt->x_dsdt_l = (unsigned long)dsdt;
+ fadt->x_dsdt_h = 0;
+ fadt->x_pm1a_evt_blk.space_id = 1;
+ fadt->x_pm1a_evt_blk.bit_width = 32;
+ fadt->x_pm1a_evt_blk.bit_offset = 0;
+ fadt->x_pm1a_evt_blk.resv = 0;
+ fadt->x_pm1a_evt_blk.addrl = pmbase;
+ fadt->x_pm1a_evt_blk.addrh = 0x0;
+ fadt->x_pm1b_evt_blk.space_id = 0;
+ fadt->x_pm1b_evt_blk.bit_width = 0;
+ fadt->x_pm1b_evt_blk.bit_offset = 0;
+ fadt->x_pm1b_evt_blk.resv = 0;
+ fadt->x_pm1b_evt_blk.addrl = 0x0;
+ fadt->x_pm1b_evt_blk.addrh = 0x0;
+ fadt->x_pm1a_cnt_blk.space_id = 1;
+ /*
+* Upper word is reserved and
+* Linux complains about 32 bit
+*/
+ fadt->x_pm1a_cnt_blk.bit_wi
[U-Boot] [UBOOT PATCH v6 3/3] x86: Add DSDT table for supporting ACPI on QEMU
The DSDT table contains a bytecode that is executed by a driver in the kernel.
Signed-off-by: Saket Sinha
---
arch/x86/cpu/qemu/Makefile | 2 +-
arch/x86/cpu/qemu/acpi/cpu-hotplug.asl | 80 +++
arch/x86/cpu/qemu/acpi/dbug.asl| 25 ++
arch/x86/cpu/qemu/acpi/hpet.asl| 31 +++
arch/x86/cpu/qemu/acpi/isa.asl | 102
arch/x86/cpu/qemu/acpi/pci-crs.asl | 61 +
arch/x86/cpu/qemu/dsdt.asl | 412 +
7 files changed, 712 insertions(+), 1 deletion(-)
create mode 100644 arch/x86/cpu/qemu/acpi/cpu-hotplug.asl
create mode 100644 arch/x86/cpu/qemu/acpi/dbug.asl
create mode 100644 arch/x86/cpu/qemu/acpi/hpet.asl
create mode 100644 arch/x86/cpu/qemu/acpi/isa.asl
create mode 100644 arch/x86/cpu/qemu/acpi/pci-crs.asl
create mode 100644 arch/x86/cpu/qemu/dsdt.asl
diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
index 8c3884c..1c00d1d 100644
--- a/arch/x86/cpu/qemu/Makefile
+++ b/arch/x86/cpu/qemu/Makefile
@@ -8,5 +8,5 @@ ifndef CONFIG_EFI_STUB
obj-y += car.o dram.o
endif
obj-y += qemu.o
-obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o dsdt.o
obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/x86/cpu/qemu/acpi/cpu-hotplug.asl
b/arch/x86/cpu/qemu/acpi/cpu-hotplug.asl
new file mode 100644
index 000..a290a4c
--- /dev/null
+++ b/arch/x86/cpu/qemu/acpi/cpu-hotplug.asl
@@ -0,0 +1,80 @@
+/* CPU hotplug */
+
+Scope(\_SB) {
+/* Objects filled in by run-time generated SSDT */
+External(NTFY, MethodObj)
+External(CPON, PkgObj)
+
+/* Methods called by run-time generated SSDT Processor objects */
+Method(CPMA, 1, NotSerialized) {
+ /*
+* _MAT method - create an madt apic buffer
+* Arg0 = Processor ID = Local APIC ID
+* Local0 = CPON flag for this cpu
+*/
+Store(DerefOf(Index(CPON, Arg0)), Local0)
+/* Local1 = Buffer (in madt apic form) to return */
+Store(Buffer(8) {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0}, Local1)
+/* Update the processor id, lapic id, and enable/disable status */
+Store(Arg0, Index(Local1, 2))
+Store(Arg0, Index(Local1, 3))
+Store(Local0, Index(Local1, 4))
+Return (Local1)
+}
+Method(CPST, 1, NotSerialized) {
+ /*
+* _STA method - return ON status of cpu
+* Arg0 = Processor ID = Local APIC ID
+* Local0 = CPON flag for this cpu
+*/
+Store(DerefOf(Index(CPON, Arg0)), Local0)
+If (Local0) {
+Return (0xf)
+} Else {
+Return (0x0)
+}
+}
+Method(CPEJ, 2, NotSerialized) {
+/* _EJ0 method - eject callback */
+Sleep(200)
+}
+
+/* CPU hotplug notify method */
+OperationRegion(PRST, SystemIO, 0xaf00, 32)
+Field(PRST, ByteAcc, NoLock, Preserve) {
+PRS, 256
+}
+Method(PRSC, 0) {
+/* Local5 = active cpu bitmap */
+Store(PRS, Local5)
+/* Local2 = last read byte from bitmap */
+Store(Zero, Local2)
+/* Local0 = Processor ID / APIC ID iterator */
+Store(Zero, Local0)
+While (LLess(Local0, SizeOf(CPON))) {
+/* Local1 = CPON flag for this cpu */
+Store(DerefOf(Index(CPON, Local0)), Local1)
+If (And(Local0, 0x07)) {
+/* Shift down previously read bitmap byte */
+ShiftRight(Local2, 1, Local2)
+} Else {
+/* Read next byte from cpu bitmap */
+Store(DerefOf(Index(Local5, ShiftRight(Local0, 3))), Local2)
+}
+/* Local3 = active state for this cpu */
+Store(And(Local2, 1), Local3)
+
+If (LNotEqual(Local1, Local3)) {
+/* State change - update CPON with new state */
+Store(Local3, Index(CPON, Local0))
+/* Do CPU notify */
+If (LEqual(Local3, 1)) {
+NTFY(Local0, 1)
+} Else {
+NTFY(Local0, 3)
+}
+}
+Increment(Local0)
+}
+}
+}
diff --git a/arch/x86/cpu/qemu/acpi/dbug.asl b/arch/x86/cpu/qemu/acpi/dbug.asl
new file mode 100644
index 000..38a6526
--- /dev/null
+++ b/arch/x86/cpu/qemu/acpi/dbug.asl
@@ -0,0 +1,25 @@
+/* Debugging */
+
+Scope(\) {
+/* Debug Output */
+OperationRegion(DBG, SystemIO, 0x0402, 0x01)
+Field(DBG, ByteAcc, NoLock, Preserve) {
+DBGB, 8,
+}
+ /*
+* Debug method - use this method to send output to the QEMU
+* BIOS debug port. This method handles strings, integers,
+* and buffers. For example: DBUG("abc") DBUG(0x123)
+*/
+Method(DBUG, 1) {
+ToHexString(Arg0, Local0)
+ToBuffer(Local0, Local0)
+Subtract(SizeOf(Local0), 1, Local1)
+Store(Zero, Local2)
+
Re: [U-Boot] [UBOOT PATCH v5 0/3] Add ACPI table support
Hi Bin , Please find my response inline - On Tue, Aug 18, 2015 at 2:53 PM, Bin Meng wrote: > Hi Saket, > > On Tue, Aug 18, 2015 at 3:10 PM, Bin Meng wrote: >> Hi Saket, >> >> On Tue, Aug 18, 2015 at 9:25 AM, Bin Meng wrote: >>> Hi Saket, >>> >>> On Tue, Aug 18, 2015 at 3:29 AM, Saket Sinha >>> wrote: >>>> >>>> ACPI(Advanced Configuration and Power Interface), is a Power Management and >>>> configuration standard allowing the operating system to control the amount >>>> of >>>> power each device is given (allowing it to put certain devices on standby >>>> or >>>> power-off for example). It is also used to control and/or check thermal >>>> zones >>>> (temperature sensors, fan speeds, etc), battery levels, PCI IRQ routing, >>>> CPUs, >>>> NUMA domains and many other things. >>>> >>>> Changes in v5: >>>> - Incoporated Simon's review comments. >>> >>> Please wait until a day or two before you post new version. I haven't >>> got a chance to review v4, but you've already posted v5. Also when you >>> reply our review comments, please keep the U-Boot mailing list cc'ed. >>> >> >> I finished reviewing v5, but still see lots of coding convention >> issues :( I suggest you read your codes line by line and make sure you >> do not catch those obvious issues before you send the v6. >> > > Some additional comments: > > 1). When I applied the patch in my git repo, I got: > > $ git am U-Boot-v5-1-3-x86-Generate-a-valid-ACPI-table.patch > Applying: x86: Generate a valid ACPI table > ~/work/git/u-boot/.git/rebase-apply/patch:428: new blank line at EOF. > + > ~/git/u-boot/.git/rebase-apply/patch:879: new blank line at EOF. > + > warning: 2 lines add whitespace errors. > $ git am U-Boot-v5-2-3-x86-Add-ACPI-table-support-to-QEMU.patch > Applying: x86: Add ACPI table support to QEMU > ~/work/git/u-boot/.git/rebase-apply/patch:202: new blank line at EOF. > + > warning: 1 line adds whitespace errors. > > Please fix them too. > Addressed in patchset series v6. > 2). When I build qemu-x86, I noticed that: > > Intel ACPI Component Architecture > ASL Optimizing Compiler version 20140828-64 [Sep 18 2014] > Copyright (c) 2000 - 2014 Intel Corporation > > ASL Input: arch/x86/cpu/qemu/dsdt.asl.tmp - 443 lines, 25927 > bytes, 342 keywords > Hex Dump: arch/x86/cpu/qemu/dsdt.hex - 65515 bytes > > Compilation complete. 1 Errors, 0 Warnings, 1 Remarks, 432 Optimizations > > Looks that there is 1 Error? Could you please investigate this? > Addressed in patchset series v6. > 3). Testing shows that: the Linux kernel graphics console does not > work with this series. > I've tested that with PIRQ table and MP table, the same kernel image > and rootfs does have a working graphics console. > Please investigate this. > Yes sadly it does not. What I could debug here is that some values in the qemu dsdt table needs to be fixed to make it working. I can only put it as a TODO now and will dig into the issue deeper to investigate this. > Regards, > Bin Regards, Saket Sinha ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [UBOOT PATCH v5 1/3] x86: Generate a valid ACPI table
Hi Bin,
Please find my response inline -
On Tue, Aug 18, 2015 at 12:36 PM, Bin Meng wrote:
> Hi Saket,
>
> On Tue, Aug 18, 2015 at 3:29 AM, Saket Sinha wrote:
>> Implement write_acpi_table() to create a minimal working ACPI table.
>> This includes writing FACS, XSDT, RSDP, FADT, MCFG, MADT, DSDT & SSDT
>> ACPI table entries.
>>
>> Use a Kconfig option GENERATE_ACPI_TABLE to tell U-Boot whether we need
>> actually write the APCI table just like we did for PIRQ routing, MP table
>> and SFI tables. With ACPI table existence, linux kernel gets control of
>> power management, thermal management, configuration management and
>> monitoring in hardware.
>>
>
> Nice write-up!
>
>> Signed-off-by: Saket Sinha
>> ---
>>
>> arch/x86/Kconfig | 9 +
>> arch/x86/include/asm/acpi_table.h | 390 ++
>> arch/x86/lib/Makefile | 1 +
>> arch/x86/lib/acpi_table.c | 433
>> ++
>> arch/x86/lib/tables.c | 5 +
>> scripts/Makefile.lib | 11 +
>> 6 files changed, 849 insertions(+)
>> create mode 100644 arch/x86/include/asm/acpi_table.h
>> create mode 100644 arch/x86/lib/acpi_table.c
>>
>> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
>> index 01ed760..ae881a1 100644
>> --- a/arch/x86/Kconfig
>> +++ b/arch/x86/Kconfig
>> @@ -344,6 +344,15 @@ config GENERATE_MP_TABLE
>> multiprocessing as well as symmetric I/O interrupt handling with
>> the local APIC and I/O APIC.
>>
>> +config GENERATE_ACPI_TABLE
>> + bool "Generate an ACPI (Advanced Configuration and Power Interface)
>> table"
>> + default n
>> + help
>> + The Advanced Configuration and Power Interface (ACPI) specification
>> + provides an open standard for device configuration and management
>> + by the operating system. It defines platform-independent interfaces
>> + for configuration and power management monitoring.
>> +
>> endmenu
>>
>> config MAX_PIRQ_LINKS
>> diff --git a/arch/x86/include/asm/acpi_table.h
>> b/arch/x86/include/asm/acpi_table.h
>> new file mode 100644
>> index 000..a813a0a
>> --- /dev/null
>> +++ b/arch/x86/include/asm/acpi_table.h
>> @@ -0,0 +1,390 @@
>> +/*
>> + * Based on acpi.c from coreboot
>> + *
>> + * Copyright (C) 2015, Saket Sinha
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +#define RSDP_SIG "RSD PTR " /* RSDT pointer signature */
>> +#define ACPI_TABLE_CREATOR "UBOOT " /* Must be exactly 8 bytes long! */
>> +#define OEM_ID "UBOOT "/* Must be exactly 6 bytes long! */
>> +#define ASLC "INTL" /* Must be exactly 4 bytes long! */
>> +
>
> Nits: could we use tab to between macro names, value and comments?
Addressed in patchset series v6.
>
>> +#define OEM_REVISION 42
>> +#define ASL_COMPILER_REVISION 42
>> +
>
> ditto
>
Addressed in patchset series v6.
>> +#define APM_CNT 0xb2
>> +#define APM_CNT_CST_CONTROL 0x85
>> +#define APM_CNT_PST_CONTROL 0x80
>> +#define APM_CNT_ACPI_DISABLE 0x1e
>> +#define APM_CNT_ACPI_ENABLE 0xe1
>> +#define APM_CNT_MBI_UPDATE 0xeb
>> +#define APM_CNT_GNVS_UPDATE 0xea
>> +#define APM_CNT_FINALIZE 0xcb
>> +#define APM_CNT_LEGACY 0xcc
>> +#define APM_ST 0xb3
>> +
>
> ditto, and can you add some comments on what these are?
>
Addressed in patchset series v6.
>> +#define MP_IRQ_POLARITY_DEFAULT 0x0
>> +#define MP_IRQ_POLARITY_HIGH 0x1
>> +#define MP_IRQ_POLARITY_LOW 0x3
>> +#define MP_IRQ_POLARITY_MASK 0x3
>> +#define MP_IRQ_TRIGGER_DEFAULT 0x0
>> +#define MP_IRQ_TRIGGER_EDGE 0x4
>> +#define MP_IRQ_TRIGGER_LEVEL 0xc
>> +#define MP_IRQ_TRIGGER_MASK 0xc
>> +
>
> ditto, and can you add some comments on what these are?
>
Addressed in patchset series v6.
>> +#define ACTL 0x00
>> +#define SCIS_MASK 0x07
>> +#define SCIS_IRQ9 0x00
>> +#define SCIS_IRQ10 0x01
>> +#define SCIS_IRQ11 0x02
>> +#define SCIS_IRQ20 0x04
>> +#define SCIS_IRQ21 0x05
>> +#define SCIS_IRQ22 0x06
>> +#define SCIS_IRQ23 0x07
>> +
>
> ditto, and can you add some comments on what these are?
>
Addressed in patchset series v6.
>> +enum acpi_bus_type {
>> + PIC = 0,
>> + APIC = 2,
>> +
Re: [U-Boot] [UBOOT PATCH v5 2/3] x86: Add ACPI table support to QEMU
Hi Bin,
Please find my response inline.
On Tue, Aug 18, 2015 at 12:36 PM, Bin Meng wrote:
> Hi Saket,
>
> On Tue, Aug 18, 2015 at 3:29 AM, Saket Sinha wrote:
>> This patch mainly adds ACPI support to QEMU.
>> Verified by booting Linux kernel on QEMU i440FX and Q35.
>>
>> Signed-off-by: Saket Sinha
>> ---
>>
>> arch/x86/cpu/qemu/Makefile | 1 +
>> arch/x86/cpu/qemu/acpi.c | 179
>> +
>> 2 files changed, 180 insertions(+)
>> create mode 100644 arch/x86/cpu/qemu/acpi.c
>>
>> diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
>> index 9a66b16..8c3884c 100644
>> --- a/arch/x86/cpu/qemu/Makefile
>> +++ b/arch/x86/cpu/qemu/Makefile
>> @@ -8,4 +8,5 @@ ifndef CONFIG_EFI_STUB
>> obj-y += car.o dram.o
>> endif
>> obj-y += qemu.o
>> +obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o
>> obj-$(CONFIG_PCI) += pci.o
>> diff --git a/arch/x86/cpu/qemu/acpi.c b/arch/x86/cpu/qemu/acpi.c
>> new file mode 100644
>> index 000..7c981d0
>> --- /dev/null
>> +++ b/arch/x86/cpu/qemu/acpi.c
>> @@ -0,0 +1,179 @@
>> +/*
>> + * Copyright (C) 2015, Saket Sinha
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
>> + void *dsdt)
>> +{
>> + acpi_header_t *header = &(fadt->header);
>> + u16 pmbase;
>> +
>> + pci_dev_t bdf = PCI_BDF(0, 0x1f, 0);
>> + pci_read_config_word(bdf, 0x40, &pmbase);
>> +
>> + /*
>> +* TODO(saket.sinh...@gmail.com): wrong value
>> +* of pmbase by above function. Harcoding it to
>> +* correct value. Since no PCI register is
>> +* programmed Power Management Interface is
>> +* not working
>> +*/
>
> Given you already know the root cause here (PMBASE is not programmed),
> can you program this register in the QEMU codes to make it work?
Please elaborate on this. Do you want me to hack QEMU code to verify
that it works ?
> you can check arch/x86/cpu/quark/Kconfig to use common names for these
> ACPI register blocks, like the one used in quark. (I remember I
> mentioned this comment before)
>
This is not clear. I know these registers are defined in
arch/x86/cpu/quark/Kconfig where configurable values can be assigned
to it.
But here I am trying to create fadt table structure which have these
registers for sure but I am trying to fill those values after reading
them from the hardware( in our case QEMU)
>> +
>> + pmbase = 0x0600;
>> +
>> + memset((void *)fadt, 0, sizeof(struct acpi_fadt));
>> + memcpy(header->signature, "FACP", 4);
>> + header->length = sizeof(struct acpi_fadt);
>> + header->revision = 3;
>> + memcpy(header->oem_id, OEM_ID, 6);
>> + memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
>> + memcpy(header->asl_compiler_id, ASLC, 4);
>> + header->asl_compiler_revision = 0;
>> +
>> + fadt->firmware_ctrl = (unsigned long) facs;
>> + fadt->dsdt = (unsigned long) dsdt;
>> + fadt->model = 0x00;
>> + fadt->preferred_pm_profile = PM_MOBILE;
>> + fadt->sci_int = 0x9;
>> + fadt->smi_cmd = 0;
>> + fadt->acpi_enable = 0;
>> + fadt->acpi_disable = 0;
>> + fadt->s4bios_req = 0x0;
>> + fadt->pstate_cnt = 0;
>> + fadt->pm1a_evt_blk = pmbase;
>> + fadt->pm1b_evt_blk = 0x0;
>> + fadt->pm1a_cnt_blk = pmbase + 0x4;
>> + fadt->pm1b_cnt_blk = 0x0;
>> + fadt->pm2_cnt_blk = pmbase + 0x50;
>> + fadt->pm_tmr_blk = pmbase + 0x8;
>> + fadt->gpe0_blk = pmbase + 0x20;
>> + fadt->gpe1_blk = 0;
>> + fadt->pm1_evt_len = 4;
>> + /*
>> +* Upper word is reserved and
>> +* Linux complains about 32 bit
>> +*/
>> + fadt->pm1_cnt_len = 2;
>> + fadt->pm2_cnt_len = 1;
>> + fadt->pm_tmr_len = 4;
>> + fadt->gpe0_blk_len = 16;
>> + fadt->gpe1_blk_len = 0;
>> + fadt->gpe1_base = 0;
>> + fadt->cst_cnt = 0;
>> + fadt->p_lvl2_lat = 1;
>> + fadt->p_lvl3_lat = 0x39;
>> + fadt->flush_size = 0;
>> + fadt->flush_stride = 0;
>
Re: [U-Boot] [UBOOT PATCH v5 3/3] x86: Add DSDT table for supporting ACPI on QEMU
Hi Bin,
Please find my response inline -
On Tue, Aug 18, 2015 at 12:36 PM, Bin Meng wrote:
> Hi Saket,
>
> On Tue, Aug 18, 2015 at 3:29 AM, Saket Sinha wrote:
>> The DSDT table contains a bytecode that is executed by a driver in the
>> kernel.
>>
>> Signed-off-by: Saket Sinha
>> ---
>>
>> arch/x86/cpu/qemu/Makefile | 2 +-
>> arch/x86/cpu/qemu/acpi/cpu-hotplug.asl | 78 +++
>> arch/x86/cpu/qemu/acpi/dbug.asl| 26 +++
>> arch/x86/cpu/qemu/acpi/hpet.asl| 33 +++
>> arch/x86/cpu/qemu/acpi/isa.asl | 102
>> arch/x86/cpu/qemu/acpi/pci-crs.asl | 61 +
>> arch/x86/cpu/qemu/dsdt.asl | 414
>> +
>> 7 files changed, 715 insertions(+), 1 deletion(-)
>> create mode 100644 arch/x86/cpu/qemu/acpi/cpu-hotplug.asl
>> create mode 100644 arch/x86/cpu/qemu/acpi/dbug.asl
>> create mode 100644 arch/x86/cpu/qemu/acpi/hpet.asl
>> create mode 100644 arch/x86/cpu/qemu/acpi/isa.asl
>> create mode 100644 arch/x86/cpu/qemu/acpi/pci-crs.asl
>> create mode 100644 arch/x86/cpu/qemu/dsdt.asl
>>
>> diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
>> index 8c3884c..1c00d1d 100644
>> --- a/arch/x86/cpu/qemu/Makefile
>> +++ b/arch/x86/cpu/qemu/Makefile
>> @@ -8,5 +8,5 @@ ifndef CONFIG_EFI_STUB
>> obj-y += car.o dram.o
>> endif
>> obj-y += qemu.o
>> -obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o
>> +obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o dsdt.o
>> obj-$(CONFIG_PCI) += pci.o
>> diff --git a/arch/x86/cpu/qemu/acpi/cpu-hotplug.asl
>> b/arch/x86/cpu/qemu/acpi/cpu-hotplug.asl
>> new file mode 100644
>> index 000..15b40a4
>> --- /dev/null
>> +++ b/arch/x86/cpu/qemu/acpi/cpu-hotplug.asl
>> @@ -0,0 +1,78 @@
>> +/
>> + * CPU hotplug
>> + /
>
> /* CPU hotplug */
>
Addressed in patchset series v6.
>> +
>> +Scope(\_SB) {
>> +/* Objects filled in by run-time generated SSDT */
>> +External(NTFY, MethodObj)
>> +External(CPON, PkgObj)
>> +
>> +/* Methods called by run-time generated SSDT Processor objects */
>> +Method(CPMA, 1, NotSerialized) {
>> +/* _MAT method - create an madt apic buffer
>> + Arg0 = Processor ID = Local APIC ID
>> + Local0 = CPON flag for this cpu */
>
> Please use correct multi-line comment format.
>
Addressed in patchset series v6.
>> +Store(DerefOf(Index(CPON, Arg0)), Local0)
>> +/* Local1 = Buffer (in madt apic form) to return */
>> +Store(Buffer(8) {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0}, Local1)
>> +/* Update the processor id, lapic id, and enable/disable status */
>> +Store(Arg0, Index(Local1, 2))
>> +Store(Arg0, Index(Local1, 3))
>> +Store(Local0, Index(Local1, 4))
>> +Return (Local1)
>> +}
>> +Method(CPST, 1, NotSerialized) {
>> +/* _STA method - return ON status of cpu
>> + Arg0 = Processor ID = Local APIC ID
>> + Local0 = CPON flag for this cpu */
>
> ditto.
>
Addressed in patchset series v6.
>> +Store(DerefOf(Index(CPON, Arg0)), Local0)
>> +If (Local0) {
>> +Return (0xf)
>> +} Else {
>> +Return (0x0)
>> +}
>> +}
>> +Method(CPEJ, 2, NotSerialized) {
>> +/* _EJ0 method - eject callback */
>> +Sleep(200)
>> +}
>> +
>> +/* CPU hotplug notify method */
>> +OperationRegion(PRST, SystemIO, 0xaf00, 32)
>> +Field(PRST, ByteAcc, NoLock, Preserve) {
>> +PRS, 256
>> +}
>> +Method(PRSC, 0) {
>> +/* Local5 = active cpu bitmap */
>> +Store(PRS, Local5)
>> +/* Local2 = last read byte from bitmap */
>> +Store(Zero, Local2)
>> +/* Local0 = Processor ID / APIC ID iterator */
>> +Store(Zero, Local0)
>> +While (LLess(Local0, SizeOf(CPON))) {
>> +/* Local1 = CPON flag for this cpu */
>> +Store(DerefOf(Index(CPON, Local0)), Local1)
>> +If (And(Local0, 0x07)) {
>> +/* Shift down previously read bitmap byte */
>> +ShiftRight(Local2, 1, Local2)
>> +} Else {
>> +/* Read next byte from cpu bitmap */
>> +
[U-Boot] [UBOOT PATCH v5 3/3] x86: Add DSDT table for supporting ACPI on QEMU
The DSDT table contains a bytecode that is executed by a driver in the kernel.
Signed-off-by: Saket Sinha
---
arch/x86/cpu/qemu/Makefile | 2 +-
arch/x86/cpu/qemu/acpi/cpu-hotplug.asl | 78 +++
arch/x86/cpu/qemu/acpi/dbug.asl| 26 +++
arch/x86/cpu/qemu/acpi/hpet.asl| 33 +++
arch/x86/cpu/qemu/acpi/isa.asl | 102
arch/x86/cpu/qemu/acpi/pci-crs.asl | 61 +
arch/x86/cpu/qemu/dsdt.asl | 414 +
7 files changed, 715 insertions(+), 1 deletion(-)
create mode 100644 arch/x86/cpu/qemu/acpi/cpu-hotplug.asl
create mode 100644 arch/x86/cpu/qemu/acpi/dbug.asl
create mode 100644 arch/x86/cpu/qemu/acpi/hpet.asl
create mode 100644 arch/x86/cpu/qemu/acpi/isa.asl
create mode 100644 arch/x86/cpu/qemu/acpi/pci-crs.asl
create mode 100644 arch/x86/cpu/qemu/dsdt.asl
diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
index 8c3884c..1c00d1d 100644
--- a/arch/x86/cpu/qemu/Makefile
+++ b/arch/x86/cpu/qemu/Makefile
@@ -8,5 +8,5 @@ ifndef CONFIG_EFI_STUB
obj-y += car.o dram.o
endif
obj-y += qemu.o
-obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o dsdt.o
obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/x86/cpu/qemu/acpi/cpu-hotplug.asl
b/arch/x86/cpu/qemu/acpi/cpu-hotplug.asl
new file mode 100644
index 000..15b40a4
--- /dev/null
+++ b/arch/x86/cpu/qemu/acpi/cpu-hotplug.asl
@@ -0,0 +1,78 @@
+/
+ * CPU hotplug
+ /
+
+Scope(\_SB) {
+/* Objects filled in by run-time generated SSDT */
+External(NTFY, MethodObj)
+External(CPON, PkgObj)
+
+/* Methods called by run-time generated SSDT Processor objects */
+Method(CPMA, 1, NotSerialized) {
+/* _MAT method - create an madt apic buffer
+ Arg0 = Processor ID = Local APIC ID
+ Local0 = CPON flag for this cpu */
+Store(DerefOf(Index(CPON, Arg0)), Local0)
+/* Local1 = Buffer (in madt apic form) to return */
+Store(Buffer(8) {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0}, Local1)
+/* Update the processor id, lapic id, and enable/disable status */
+Store(Arg0, Index(Local1, 2))
+Store(Arg0, Index(Local1, 3))
+Store(Local0, Index(Local1, 4))
+Return (Local1)
+}
+Method(CPST, 1, NotSerialized) {
+/* _STA method - return ON status of cpu
+ Arg0 = Processor ID = Local APIC ID
+ Local0 = CPON flag for this cpu */
+Store(DerefOf(Index(CPON, Arg0)), Local0)
+If (Local0) {
+Return (0xf)
+} Else {
+Return (0x0)
+}
+}
+Method(CPEJ, 2, NotSerialized) {
+/* _EJ0 method - eject callback */
+Sleep(200)
+}
+
+/* CPU hotplug notify method */
+OperationRegion(PRST, SystemIO, 0xaf00, 32)
+Field(PRST, ByteAcc, NoLock, Preserve) {
+PRS, 256
+}
+Method(PRSC, 0) {
+/* Local5 = active cpu bitmap */
+Store(PRS, Local5)
+/* Local2 = last read byte from bitmap */
+Store(Zero, Local2)
+/* Local0 = Processor ID / APIC ID iterator */
+Store(Zero, Local0)
+While (LLess(Local0, SizeOf(CPON))) {
+/* Local1 = CPON flag for this cpu */
+Store(DerefOf(Index(CPON, Local0)), Local1)
+If (And(Local0, 0x07)) {
+/* Shift down previously read bitmap byte */
+ShiftRight(Local2, 1, Local2)
+} Else {
+/* Read next byte from cpu bitmap */
+Store(DerefOf(Index(Local5, ShiftRight(Local0, 3))), Local2)
+}
+/* Local3 = active state for this cpu */
+Store(And(Local2, 1), Local3)
+
+If (LNotEqual(Local1, Local3)) {
+/* State change - update CPON with new state */
+Store(Local3, Index(CPON, Local0))
+/* Do CPU notify */
+If (LEqual(Local3, 1)) {
+NTFY(Local0, 1)
+} Else {
+NTFY(Local0, 3)
+}
+}
+Increment(Local0)
+}
+}
+}
diff --git a/arch/x86/cpu/qemu/acpi/dbug.asl b/arch/x86/cpu/qemu/acpi/dbug.asl
new file mode 100644
index 000..55c932a
--- /dev/null
+++ b/arch/x86/cpu/qemu/acpi/dbug.asl
@@ -0,0 +1,26 @@
+/
+ * Debugging
+ /
+
+Scope(\) {
+/* Debug Output */
+OperationRegion(DBG, SystemIO, 0x0402, 0x01)
+Field(DBG, ByteAcc, NoLock, Preserve) {
+DBGB, 8,
+}
+
+/* Debug method - use this method to send output to the QEMU
+ * BIOS debug port. This method handles strings, integers,
+ * and buffers. For example: DBUG("abc") DBUG(0x123) */
+M
[U-Boot] [UBOOT PATCH v5 2/3] x86: Add ACPI table support to QEMU
This patch mainly adds ACPI support to QEMU.
Verified by booting Linux kernel on QEMU i440FX and Q35.
Signed-off-by: Saket Sinha
---
arch/x86/cpu/qemu/Makefile | 1 +
arch/x86/cpu/qemu/acpi.c | 179 +
2 files changed, 180 insertions(+)
create mode 100644 arch/x86/cpu/qemu/acpi.c
diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
index 9a66b16..8c3884c 100644
--- a/arch/x86/cpu/qemu/Makefile
+++ b/arch/x86/cpu/qemu/Makefile
@@ -8,4 +8,5 @@ ifndef CONFIG_EFI_STUB
obj-y += car.o dram.o
endif
obj-y += qemu.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o
obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/x86/cpu/qemu/acpi.c b/arch/x86/cpu/qemu/acpi.c
new file mode 100644
index 000..7c981d0
--- /dev/null
+++ b/arch/x86/cpu/qemu/acpi.c
@@ -0,0 +1,179 @@
+/*
+ * Copyright (C) 2015, Saket Sinha
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+
+void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
+ void *dsdt)
+{
+ acpi_header_t *header = &(fadt->header);
+ u16 pmbase;
+
+ pci_dev_t bdf = PCI_BDF(0, 0x1f, 0);
+ pci_read_config_word(bdf, 0x40, &pmbase);
+
+ /*
+* TODO(saket.sinh...@gmail.com): wrong value
+* of pmbase by above function. Harcoding it to
+* correct value. Since no PCI register is
+* programmed Power Management Interface is
+* not working
+*/
+
+ pmbase = 0x0600;
+
+ memset((void *)fadt, 0, sizeof(struct acpi_fadt));
+ memcpy(header->signature, "FACP", 4);
+ header->length = sizeof(struct acpi_fadt);
+ header->revision = 3;
+ memcpy(header->oem_id, OEM_ID, 6);
+ memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+ memcpy(header->asl_compiler_id, ASLC, 4);
+ header->asl_compiler_revision = 0;
+
+ fadt->firmware_ctrl = (unsigned long) facs;
+ fadt->dsdt = (unsigned long) dsdt;
+ fadt->model = 0x00;
+ fadt->preferred_pm_profile = PM_MOBILE;
+ fadt->sci_int = 0x9;
+ fadt->smi_cmd = 0;
+ fadt->acpi_enable = 0;
+ fadt->acpi_disable = 0;
+ fadt->s4bios_req = 0x0;
+ fadt->pstate_cnt = 0;
+ fadt->pm1a_evt_blk = pmbase;
+ fadt->pm1b_evt_blk = 0x0;
+ fadt->pm1a_cnt_blk = pmbase + 0x4;
+ fadt->pm1b_cnt_blk = 0x0;
+ fadt->pm2_cnt_blk = pmbase + 0x50;
+ fadt->pm_tmr_blk = pmbase + 0x8;
+ fadt->gpe0_blk = pmbase + 0x20;
+ fadt->gpe1_blk = 0;
+ fadt->pm1_evt_len = 4;
+ /*
+* Upper word is reserved and
+* Linux complains about 32 bit
+*/
+ fadt->pm1_cnt_len = 2;
+ fadt->pm2_cnt_len = 1;
+ fadt->pm_tmr_len = 4;
+ fadt->gpe0_blk_len = 16;
+ fadt->gpe1_blk_len = 0;
+ fadt->gpe1_base = 0;
+ fadt->cst_cnt = 0;
+ fadt->p_lvl2_lat = 1;
+ fadt->p_lvl3_lat = 0x39;
+ fadt->flush_size = 0;
+ fadt->flush_stride = 0;
+ fadt->duty_offset = 1;
+ fadt->duty_width = 3;
+ fadt->day_alrm = 0xd;
+ fadt->mon_alrm = 0x00;
+ fadt->century = 0x32;
+ fadt->iapc_boot_arch = 0x00;
+ fadt->flags = ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
+ ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE |
+ ACPI_FADT_DOCKING_SUPPORTED | ACPI_FADT_RESET_REGISTER |
+ ACPI_FADT_PLATFORM_CLOCK;
+ fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
+ fadt->reset_reg.bit_width = 8;
+ fadt->reset_reg.bit_offset = 0;
+ fadt->reset_reg.resv = 0;
+ fadt->reset_reg.addrl = 0xcf9;
+ fadt->reset_reg.addrh = 0;
+ fadt->reset_value = 0x06;
+ /*
+* Set X_FIRMWARE_CTRL only if FACS is
+* above 4GB. If X_FIRMWARE_CTRL is set,
+* then FIRMWARE_CTRL must be zero
+*/
+ fadt->x_firmware_ctl_l = 0;
+ fadt->x_firmware_ctl_h = 0;
+ fadt->x_dsdt_l = (unsigned long)dsdt;
+ fadt->x_dsdt_h = 0;
+ fadt->x_pm1a_evt_blk.space_id = 1;
+ fadt->x_pm1a_evt_blk.bit_width = 32;
+ fadt->x_pm1a_evt_blk.bit_offset = 0;
+ fadt->x_pm1a_evt_blk.resv = 0;
+ fadt->x_pm1a_evt_blk.addrl = pmbase;
+ fadt->x_pm1a_evt_blk.addrh = 0x0;
+ fadt->x_pm1b_evt_blk.space_id = 0;
+ fadt->x_pm1b_evt_blk.bit_width = 0;
+ fadt->x_pm1b_evt_blk.bit_offset = 0;
+ fadt->x_pm1b_evt_blk.resv = 0;
+ fadt->x_pm1b_evt_blk.addrl = 0x0;
+ fadt->x_pm1b_evt_blk.addrh = 0x0;
+ fadt->x_pm1a_cnt_blk.space_id = 1;
+ /*
+* Upper word is reserved and
+* Linux complains about 32 bit
+*/
+ fadt->x_pm1a_cnt_blk.bit_wi
[U-Boot] [UBOOT PATCH v5 1/3] x86: Generate a valid ACPI table
Implement write_acpi_table() to create a minimal working ACPI table.
This includes writing FACS, XSDT, RSDP, FADT, MCFG, MADT, DSDT & SSDT
ACPI table entries.
Use a Kconfig option GENERATE_ACPI_TABLE to tell U-Boot whether we need
actually write the APCI table just like we did for PIRQ routing, MP table
and SFI tables. With ACPI table existence, linux kernel gets control of
power management, thermal management, configuration management and
monitoring in hardware.
Signed-off-by: Saket Sinha
---
arch/x86/Kconfig | 9 +
arch/x86/include/asm/acpi_table.h | 390 ++
arch/x86/lib/Makefile | 1 +
arch/x86/lib/acpi_table.c | 433 ++
arch/x86/lib/tables.c | 5 +
scripts/Makefile.lib | 11 +
6 files changed, 849 insertions(+)
create mode 100644 arch/x86/include/asm/acpi_table.h
create mode 100644 arch/x86/lib/acpi_table.c
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 01ed760..ae881a1 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -344,6 +344,15 @@ config GENERATE_MP_TABLE
multiprocessing as well as symmetric I/O interrupt handling with
the local APIC and I/O APIC.
+config GENERATE_ACPI_TABLE
+ bool "Generate an ACPI (Advanced Configuration and Power Interface)
table"
+ default n
+ help
+ The Advanced Configuration and Power Interface (ACPI) specification
+ provides an open standard for device configuration and management
+ by the operating system. It defines platform-independent interfaces
+ for configuration and power management monitoring.
+
endmenu
config MAX_PIRQ_LINKS
diff --git a/arch/x86/include/asm/acpi_table.h
b/arch/x86/include/asm/acpi_table.h
new file mode 100644
index 000..a813a0a
--- /dev/null
+++ b/arch/x86/include/asm/acpi_table.h
@@ -0,0 +1,390 @@
+/*
+ * Based on acpi.c from coreboot
+ *
+ * Copyright (C) 2015, Saket Sinha
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+
+#define RSDP_SIG "RSD PTR " /* RSDT pointer signature */
+#define ACPI_TABLE_CREATOR "UBOOT " /* Must be exactly 8 bytes long! */
+#define OEM_ID "UBOOT "/* Must be exactly 6 bytes long! */
+#define ASLC "INTL" /* Must be exactly 4 bytes long! */
+
+#define OEM_REVISION 42
+#define ASL_COMPILER_REVISION 42
+
+#define APM_CNT 0xb2
+#define APM_CNT_CST_CONTROL 0x85
+#define APM_CNT_PST_CONTROL 0x80
+#define APM_CNT_ACPI_DISABLE 0x1e
+#define APM_CNT_ACPI_ENABLE 0xe1
+#define APM_CNT_MBI_UPDATE 0xeb
+#define APM_CNT_GNVS_UPDATE 0xea
+#define APM_CNT_FINALIZE 0xcb
+#define APM_CNT_LEGACY 0xcc
+#define APM_ST 0xb3
+
+#define MP_IRQ_POLARITY_DEFAULT 0x0
+#define MP_IRQ_POLARITY_HIGH 0x1
+#define MP_IRQ_POLARITY_LOW 0x3
+#define MP_IRQ_POLARITY_MASK 0x3
+#define MP_IRQ_TRIGGER_DEFAULT 0x0
+#define MP_IRQ_TRIGGER_EDGE 0x4
+#define MP_IRQ_TRIGGER_LEVEL 0xc
+#define MP_IRQ_TRIGGER_MASK 0xc
+
+#define ACTL 0x00
+#define SCIS_MASK 0x07
+#define SCIS_IRQ9 0x00
+#define SCIS_IRQ10 0x01
+#define SCIS_IRQ11 0x02
+#define SCIS_IRQ20 0x04
+#define SCIS_IRQ21 0x05
+#define SCIS_IRQ22 0x06
+#define SCIS_IRQ23 0x07
+
+enum acpi_bus_type {
+ PIC = 0,
+ APIC = 2,
+ ETHIGH = 5
+};
+
+#define ACPI_REV_ACPI_1_0 1
+#define ACPI_REV_ACPI_2_0 1
+#define ACPI_REV_ACPI_3_0 2
+#define ACPI_REV_ACPI_4_0 3
+#define ACPI_REV_ACPI_5_0 5
+
+#define ACPI_RSDP_REV_ACPI_1_0 0
+#define ACPI_RSDP_REV_ACPI_2_0 2
+
+typedef struct acpi_gen_regaddr {
+ u8 space_id;/* Address space ID */
+ u8 bit_width; /* Register size in bits */
+ u8 bit_offset; /* Register bit offset */
+ union {
+ /* Reserved in ACPI 2.0 - 2.0b */
+ u8 resv;
+ /* Access size in ACPI 2.0c/3.0/4.0/5.0 */
+ u8 access_size;
+ };
+ u32 addrl; /* Register address, low 32 bits */
+ u32 addrh; /* Register address, high 32 bits */
+} acpi_addr_t;
+
+
+/* RSDP (Root System Description Pointer)
+Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum. */
+struct acpi_rsdp {
+ char signature[8]; /* RSDP signature */
+ u8checksum; /* Checksum of the first 20 bytes */
+ char oem_id[6];/* OEM ID */
+ u8revision; /* 0 for ACPI 1.0, 2 for ACPI 2.0/3.0/4.0 */
+ u32 rsdt_address; /* Physical address of RSDT (32 bits) */
+ u32 length; /* Total RSDP length (incl. extended part) */
+ u64 xsdt_address; /* Physical address of XSDT (64 bits) */
+ u8ext_checksum; /* Checksum of the whole table */
+ u8reserved[3];
+};
+
+enum acpi_address_space_type {
+ ACPI_ADDRESS_SPACE_MEMORY = 0, /* System memory */
+ ACPI_ADDRESS_SPACE_IO = 1, /* System I/O */
+ ACPI_ADDRESS_SPACE_PCI = 2,
[U-Boot] [UBOOT PATCH v5 0/3] Add ACPI table support
ACPI(Advanced Configuration and Power Interface), is a Power Management and configuration standard allowing the operating system to control the amount of power each device is given (allowing it to put certain devices on standby or power-off for example). It is also used to control and/or check thermal zones (temperature sensors, fan speeds, etc), battery levels, PCI IRQ routing, CPUs, NUMA domains and many other things. Changes in v5: - Incoporated Simon's review comments. Saket Sinha (3): x86: Generate a valid ACPI table x86: Add ACPI table support to QEMU x86: Add DSDT table for supporting ACPI on QEMU arch/x86/Kconfig | 9 + arch/x86/cpu/qemu/Makefile | 1 + arch/x86/cpu/qemu/acpi.c | 179 ++ arch/x86/cpu/qemu/acpi/cpu-hotplug.asl | 78 ++ arch/x86/cpu/qemu/acpi/dbug.asl| 26 ++ arch/x86/cpu/qemu/acpi/hpet.asl| 33 +++ arch/x86/cpu/qemu/acpi/isa.asl | 102 arch/x86/cpu/qemu/acpi/pci-crs.asl | 61 + arch/x86/cpu/qemu/dsdt.asl | 414 +++ arch/x86/include/asm/acpi_table.h | 390 + arch/x86/lib/Makefile | 1 + arch/x86/lib/acpi_table.c | 433 + arch/x86/lib/tables.c | 5 + scripts/Makefile.lib | 11 + 14 files changed, 1743 insertions(+) create mode 100644 arch/x86/cpu/qemu/acpi.c create mode 100644 arch/x86/cpu/qemu/acpi/cpu-hotplug.asl create mode 100644 arch/x86/cpu/qemu/acpi/dbug.asl create mode 100644 arch/x86/cpu/qemu/acpi/hpet.asl create mode 100644 arch/x86/cpu/qemu/acpi/isa.asl create mode 100644 arch/x86/cpu/qemu/acpi/pci-crs.asl create mode 100644 arch/x86/cpu/qemu/dsdt.asl create mode 100644 arch/x86/include/asm/acpi_table.h create mode 100644 arch/x86/lib/acpi_table.c -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [UBOOT PATCH v4 2/3] x86: Add ACPI table support to QEMU
Hi Simon,
Please find my response inline -
On Mon, Aug 17, 2015 at 2:44 AM, Simon Glass wrote:
> Hi Saket,
>
> On 15 August 2015 at 23:10, Saket Sinha wrote:
>> This patch mainly adds ACPI support to QEMU.
>> Verified by booting Linux kernel on QEMU i440FX and Q35.
>>
>> Signed-off-by: Saket Sinha
>> ---
>>
>> arch/x86/cpu/qemu/Makefile | 1 +
>> arch/x86/cpu/qemu/acpi.c | 161
>> +
>> 2 files changed, 162 insertions(+)
>> create mode 100644 arch/x86/cpu/qemu/acpi.c
>
> Reviewed-by: Simon Glass
>
>>
>> diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
>> index 9a66b16..8c3884c 100644
>> --- a/arch/x86/cpu/qemu/Makefile
>> +++ b/arch/x86/cpu/qemu/Makefile
>> @@ -8,4 +8,5 @@ ifndef CONFIG_EFI_STUB
>> obj-y += car.o dram.o
>> endif
>> obj-y += qemu.o
>> +obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o
>> obj-$(CONFIG_PCI) += pci.o
>> diff --git a/arch/x86/cpu/qemu/acpi.c b/arch/x86/cpu/qemu/acpi.c
>> new file mode 100644
>> index 000..24da586
>> --- /dev/null
>> +++ b/arch/x86/cpu/qemu/acpi.c
>> @@ -0,0 +1,161 @@
>> +/*
>> + * Copyright (C) 2015, Saket Sinha
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>
> Must include common.h here
>
>> +#include
>> +#include
>> +#include
>> +
>> +void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
>> + void *dsdt)
>> +{
>> + acpi_header_t *header = &(fadt->header);
>> + u16 pmbase;
>> +
>> + pci_dev_t bdf = PCI_BDF(0, 0x1f, 0);
>> + pci_read_config_word(bdf, 0x40, &pmbase);
>> +
>> + /*TODO: wrong value of pmbase by above function.
>> + Harcoding it to correct value. Since no PCI register
>> + is programmed Power Management Interface is not working*/
>
> Space after /* and before */. Also add your email as in
> TODO(saket.sinh...@gmail.com): ...
>
> Multi-line comment style is always like this
>
> /*
> * first line
> * second line
> * ...
> */
>
> Please fix globally.
Would fix in next patchset.
>
> Try to word-wrap the comments to around 75 columns.
>
>> + pmbase = 0x0600;
>> +
>> + memset((void *)fadt, 0, sizeof(struct acpi_fadt));
>> + memcpy(header->signature, "FACP", 4);
>> + header->length = sizeof(struct acpi_fadt);
>> + header->revision = 3;
>> + memcpy(header->oem_id, OEM_ID, 6);
>> + memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
>> + memcpy(header->asl_compiler_id, ASLC, 4);
>> + header->asl_compiler_revision = 0;
>> +
>> + fadt->firmware_ctrl = (unsigned long) facs;
>> + fadt->dsdt = (unsigned long) dsdt;
>> + fadt->model = 0x00;
>> + fadt->preferred_pm_profile = PM_MOBILE;
>> + fadt->sci_int = 0x9;
>> + fadt->smi_cmd = 0;
>> + fadt->acpi_enable = 0;
>> + fadt->acpi_disable = 0;
>> + fadt->s4bios_req = 0x0;
>> + fadt->pstate_cnt = 0;
>> + fadt->pm1a_evt_blk = pmbase;
>> + fadt->pm1b_evt_blk = 0x0;
>> + fadt->pm1a_cnt_blk = pmbase + 0x4;
>> + fadt->pm1b_cnt_blk = 0x0;
>> + fadt->pm2_cnt_blk = pmbase + 0x50;
>> + fadt->pm_tmr_blk = pmbase + 0x8;
>> + fadt->gpe0_blk = pmbase + 0x20;
>> + fadt->gpe1_blk = 0;
>> + fadt->pm1_evt_len = 4;
>> + fadt->pm1_cnt_len = 2; /* Upper word is reserved and
>> + Linux complains about 32 bit. */
>
> Put this comment on the previous line. It's OK to have a multi-line
> comment but it must stand along, not split across code lines. Please
> fix globally.
>
> Also you don't need a period to the end of the comment.
Would fix in next patchset.
>
>> + fadt->pm2_cnt_len = 1;
>> + fadt->pm_tmr_len = 4;
>> + fadt->gpe0_blk_len = 16;
>> + fadt->gpe1_blk_len = 0;
>> + fadt->gpe1_base = 0;
>> + fadt->cst_cnt = 0;
>> + fadt->p_lvl2_lat = 1;
>> + fadt->p_lvl3_lat = 0x39;
>> + fadt->flush_size = 0;
>> + fadt->flush_stride = 0;
>> + fadt->duty_offset = 1;
>> + fadt->duty_width = 3;
>> + fadt->day_alrm = 0xd;
>> + fadt->mon_alrm
[U-Boot] [UBOOT PATCH v4 3/3] x86: Add DSDT table for supporting ACPI on QEMU
The DSDT table contains a bytecode that is executed by a driver in the kernel.
Signed-off-by: Saket Sinha
---
arch/x86/cpu/qemu/Makefile | 2 +-
arch/x86/cpu/qemu/acpi/cpu-hotplug.asl | 78 +++
arch/x86/cpu/qemu/acpi/dbug.asl| 26 +++
arch/x86/cpu/qemu/acpi/hpet.asl| 33 +++
arch/x86/cpu/qemu/acpi/isa.asl | 102
arch/x86/cpu/qemu/acpi/pci-crs.asl | 61 +
arch/x86/cpu/qemu/dsdt.asl | 414 +
7 files changed, 715 insertions(+), 1 deletion(-)
create mode 100644 arch/x86/cpu/qemu/acpi/cpu-hotplug.asl
create mode 100644 arch/x86/cpu/qemu/acpi/dbug.asl
create mode 100644 arch/x86/cpu/qemu/acpi/hpet.asl
create mode 100644 arch/x86/cpu/qemu/acpi/isa.asl
create mode 100644 arch/x86/cpu/qemu/acpi/pci-crs.asl
create mode 100644 arch/x86/cpu/qemu/dsdt.asl
diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
index 8c3884c..1c00d1d 100644
--- a/arch/x86/cpu/qemu/Makefile
+++ b/arch/x86/cpu/qemu/Makefile
@@ -8,5 +8,5 @@ ifndef CONFIG_EFI_STUB
obj-y += car.o dram.o
endif
obj-y += qemu.o
-obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o dsdt.o
obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/x86/cpu/qemu/acpi/cpu-hotplug.asl
b/arch/x86/cpu/qemu/acpi/cpu-hotplug.asl
new file mode 100644
index 000..15b40a4
--- /dev/null
+++ b/arch/x86/cpu/qemu/acpi/cpu-hotplug.asl
@@ -0,0 +1,78 @@
+/
+ * CPU hotplug
+ /
+
+Scope(\_SB) {
+/* Objects filled in by run-time generated SSDT */
+External(NTFY, MethodObj)
+External(CPON, PkgObj)
+
+/* Methods called by run-time generated SSDT Processor objects */
+Method(CPMA, 1, NotSerialized) {
+/* _MAT method - create an madt apic buffer
+ Arg0 = Processor ID = Local APIC ID
+ Local0 = CPON flag for this cpu */
+Store(DerefOf(Index(CPON, Arg0)), Local0)
+/* Local1 = Buffer (in madt apic form) to return */
+Store(Buffer(8) {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0}, Local1)
+/* Update the processor id, lapic id, and enable/disable status */
+Store(Arg0, Index(Local1, 2))
+Store(Arg0, Index(Local1, 3))
+Store(Local0, Index(Local1, 4))
+Return (Local1)
+}
+Method(CPST, 1, NotSerialized) {
+/* _STA method - return ON status of cpu
+ Arg0 = Processor ID = Local APIC ID
+ Local0 = CPON flag for this cpu */
+Store(DerefOf(Index(CPON, Arg0)), Local0)
+If (Local0) {
+Return (0xf)
+} Else {
+Return (0x0)
+}
+}
+Method(CPEJ, 2, NotSerialized) {
+/* _EJ0 method - eject callback */
+Sleep(200)
+}
+
+/* CPU hotplug notify method */
+OperationRegion(PRST, SystemIO, 0xaf00, 32)
+Field(PRST, ByteAcc, NoLock, Preserve) {
+PRS, 256
+}
+Method(PRSC, 0) {
+/* Local5 = active cpu bitmap */
+Store(PRS, Local5)
+/* Local2 = last read byte from bitmap */
+Store(Zero, Local2)
+/* Local0 = Processor ID / APIC ID iterator */
+Store(Zero, Local0)
+While (LLess(Local0, SizeOf(CPON))) {
+/* Local1 = CPON flag for this cpu */
+Store(DerefOf(Index(CPON, Local0)), Local1)
+If (And(Local0, 0x07)) {
+/* Shift down previously read bitmap byte */
+ShiftRight(Local2, 1, Local2)
+} Else {
+/* Read next byte from cpu bitmap */
+Store(DerefOf(Index(Local5, ShiftRight(Local0, 3))), Local2)
+}
+/* Local3 = active state for this cpu */
+Store(And(Local2, 1), Local3)
+
+If (LNotEqual(Local1, Local3)) {
+/* State change - update CPON with new state */
+Store(Local3, Index(CPON, Local0))
+/* Do CPU notify */
+If (LEqual(Local3, 1)) {
+NTFY(Local0, 1)
+} Else {
+NTFY(Local0, 3)
+}
+}
+Increment(Local0)
+}
+}
+}
diff --git a/arch/x86/cpu/qemu/acpi/dbug.asl b/arch/x86/cpu/qemu/acpi/dbug.asl
new file mode 100644
index 000..55c932a
--- /dev/null
+++ b/arch/x86/cpu/qemu/acpi/dbug.asl
@@ -0,0 +1,26 @@
+/
+ * Debugging
+ /
+
+Scope(\) {
+/* Debug Output */
+OperationRegion(DBG, SystemIO, 0x0402, 0x01)
+Field(DBG, ByteAcc, NoLock, Preserve) {
+DBGB, 8,
+}
+
+/* Debug method - use this method to send output to the QEMU
+ * BIOS debug port. This method handles strings, integers,
+ * and buffers. For example: DBUG("abc") DBUG(0x123) */
+M
[U-Boot] [UBOOT PATCH v4 2/3] x86: Add ACPI table support to QEMU
This patch mainly adds ACPI support to QEMU.
Verified by booting Linux kernel on QEMU i440FX and Q35.
Signed-off-by: Saket Sinha
---
arch/x86/cpu/qemu/Makefile | 1 +
arch/x86/cpu/qemu/acpi.c | 161 +
2 files changed, 162 insertions(+)
create mode 100644 arch/x86/cpu/qemu/acpi.c
diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
index 9a66b16..8c3884c 100644
--- a/arch/x86/cpu/qemu/Makefile
+++ b/arch/x86/cpu/qemu/Makefile
@@ -8,4 +8,5 @@ ifndef CONFIG_EFI_STUB
obj-y += car.o dram.o
endif
obj-y += qemu.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o
obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/x86/cpu/qemu/acpi.c b/arch/x86/cpu/qemu/acpi.c
new file mode 100644
index 000..24da586
--- /dev/null
+++ b/arch/x86/cpu/qemu/acpi.c
@@ -0,0 +1,161 @@
+/*
+ * Copyright (C) 2015, Saket Sinha
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+
+void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
+ void *dsdt)
+{
+ acpi_header_t *header = &(fadt->header);
+ u16 pmbase;
+
+ pci_dev_t bdf = PCI_BDF(0, 0x1f, 0);
+ pci_read_config_word(bdf, 0x40, &pmbase);
+
+ /*TODO: wrong value of pmbase by above function.
+ Harcoding it to correct value. Since no PCI register
+ is programmed Power Management Interface is not working*/
+ pmbase = 0x0600;
+
+ memset((void *)fadt, 0, sizeof(struct acpi_fadt));
+ memcpy(header->signature, "FACP", 4);
+ header->length = sizeof(struct acpi_fadt);
+ header->revision = 3;
+ memcpy(header->oem_id, OEM_ID, 6);
+ memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+ memcpy(header->asl_compiler_id, ASLC, 4);
+ header->asl_compiler_revision = 0;
+
+ fadt->firmware_ctrl = (unsigned long) facs;
+ fadt->dsdt = (unsigned long) dsdt;
+ fadt->model = 0x00;
+ fadt->preferred_pm_profile = PM_MOBILE;
+ fadt->sci_int = 0x9;
+ fadt->smi_cmd = 0;
+ fadt->acpi_enable = 0;
+ fadt->acpi_disable = 0;
+ fadt->s4bios_req = 0x0;
+ fadt->pstate_cnt = 0;
+ fadt->pm1a_evt_blk = pmbase;
+ fadt->pm1b_evt_blk = 0x0;
+ fadt->pm1a_cnt_blk = pmbase + 0x4;
+ fadt->pm1b_cnt_blk = 0x0;
+ fadt->pm2_cnt_blk = pmbase + 0x50;
+ fadt->pm_tmr_blk = pmbase + 0x8;
+ fadt->gpe0_blk = pmbase + 0x20;
+ fadt->gpe1_blk = 0;
+ fadt->pm1_evt_len = 4;
+ fadt->pm1_cnt_len = 2; /* Upper word is reserved and
+ Linux complains about 32 bit. */
+ fadt->pm2_cnt_len = 1;
+ fadt->pm_tmr_len = 4;
+ fadt->gpe0_blk_len = 16;
+ fadt->gpe1_blk_len = 0;
+ fadt->gpe1_base = 0;
+ fadt->cst_cnt = 0;
+ fadt->p_lvl2_lat = 1;
+ fadt->p_lvl3_lat = 0x39;
+ fadt->flush_size = 0;
+ fadt->flush_stride = 0;
+ fadt->duty_offset = 1;
+ fadt->duty_width = 3;
+ fadt->day_alrm = 0xd;
+ fadt->mon_alrm = 0x00;
+ fadt->century = 0x32;
+ fadt->iapc_boot_arch = 0x00;
+ fadt->flags = ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
+ ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE |
+ ACPI_FADT_DOCKING_SUPPORTED | ACPI_FADT_RESET_REGISTER |
+ ACPI_FADT_PLATFORM_CLOCK;
+ fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
+ fadt->reset_reg.bit_width = 8;
+ fadt->reset_reg.bit_offset = 0;
+ fadt->reset_reg.resv = 0;
+ fadt->reset_reg.addrl = 0xcf9;
+ fadt->reset_reg.addrh = 0;
+ fadt->reset_value = 0x06;
+ fadt->x_firmware_ctl_l = 0; /* Set X_FIRMWARE_CTRL only if FACS is */
+ fadt->x_firmware_ctl_h = 0; /* above 4GB. If X_FIRMWARE_CTRL is set, */
+ /* then FIRMWARE_CTRL must be zero. */
+
+ fadt->x_dsdt_l = (unsigned long)dsdt;
+ fadt->x_dsdt_h = 0;
+ fadt->x_pm1a_evt_blk.space_id = 1;
+ fadt->x_pm1a_evt_blk.bit_width = 32;
+ fadt->x_pm1a_evt_blk.bit_offset = 0;
+ fadt->x_pm1a_evt_blk.resv = 0;
+ fadt->x_pm1a_evt_blk.addrl = pmbase;
+ fadt->x_pm1a_evt_blk.addrh = 0x0;
+ fadt->x_pm1b_evt_blk.space_id = 0;
+ fadt->x_pm1b_evt_blk.bit_width = 0;
+ fadt->x_pm1b_evt_blk.bit_offset = 0;
+ fadt->x_pm1b_evt_blk.resv = 0;
+ fadt->x_pm1b_evt_blk.addrl = 0x0;
+ fadt->x_pm1b_evt_blk.addrh = 0x0;
+ fadt->x_pm1a_cnt_blk.space_id = 1;
+ fadt->x_pm1a_cnt_blk.bit_width = 16; /* Upper word is reserved and
+ Linux complains about 32 bit. */
+ fadt->x_pm1a_cnt_blk.bit_offset = 0;
[U-Boot] [UBOOT] [PATCH v4 0/3] Add ACPI table support
ACPI(Advanced Configuration and Power Interface), is a Power Management and configuration standard allowing the operating system to control the amount of power each device is given (allowing it to put certain devices on standby or power-off for example). It is also used to control and/or check thermal zones (temperature sensors, fan speeds, etc), battery levels, PCI IRQ routing, CPUs, NUMA domains and many other things. Changes in v4: - Incoporated Bin's review comments. Saket Sinha (3): x86: Generate a valid ACPI table x86: Add ACPI table support to QEMU x86: Add DSDT table for supporting ACPI on QEMU arch/x86/Kconfig | 9 + arch/x86/cpu/qemu/Makefile | 1 + arch/x86/cpu/qemu/acpi.c | 161 arch/x86/cpu/qemu/acpi/cpu-hotplug.asl | 78 ++ arch/x86/cpu/qemu/acpi/dbug.asl| 26 ++ arch/x86/cpu/qemu/acpi/hpet.asl| 33 +++ arch/x86/cpu/qemu/acpi/isa.asl | 102 arch/x86/cpu/qemu/acpi/pci-crs.asl | 61 + arch/x86/cpu/qemu/dsdt.asl | 414 +++ arch/x86/include/asm/acpi_table.h | 398 ++ arch/x86/lib/Makefile | 1 + arch/x86/lib/acpi_table.c | 438 + arch/x86/lib/tables.c | 5 + scripts/Makefile.lib | 11 + 14 files changed, 1738 insertions(+) create mode 100644 arch/x86/cpu/qemu/acpi.c create mode 100644 arch/x86/cpu/qemu/acpi/cpu-hotplug.asl create mode 100644 arch/x86/cpu/qemu/acpi/dbug.asl create mode 100644 arch/x86/cpu/qemu/acpi/hpet.asl create mode 100644 arch/x86/cpu/qemu/acpi/isa.asl create mode 100644 arch/x86/cpu/qemu/acpi/pci-crs.asl create mode 100644 arch/x86/cpu/qemu/dsdt.asl create mode 100644 arch/x86/include/asm/acpi_table.h create mode 100644 arch/x86/lib/acpi_table.c -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [UBOOT PATCH v4 1/3] x86: Generate a valid ACPI table
Implement write_acpi_table() to create a minimal working ACPI table.
This includes writing FACS, XSDT, RSDP, FADT, MCFG, MADT, DSDT & SSDT
ACPI table entries.
Use a Kconfig option GENERATE_ACPI_TABLE to tell U-Boot whether we need
actually write the APCI table just like we did for PIRQ routing, MP table
and SFI tables. With ACPI table existence, linux kernel gets control of
power management, thermal management, configuration management and
monitoring in hardware.
Signed-off-by: Saket Sinha
---
arch/x86/Kconfig | 9 +
arch/x86/include/asm/acpi_table.h | 398 ++
arch/x86/lib/Makefile | 1 +
arch/x86/lib/acpi_table.c | 438 ++
arch/x86/lib/tables.c | 5 +
scripts/Makefile.lib | 11 +
6 files changed, 862 insertions(+)
create mode 100644 arch/x86/include/asm/acpi_table.h
create mode 100644 arch/x86/lib/acpi_table.c
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 01ed760..ae881a1 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -344,6 +344,15 @@ config GENERATE_MP_TABLE
multiprocessing as well as symmetric I/O interrupt handling with
the local APIC and I/O APIC.
+config GENERATE_ACPI_TABLE
+ bool "Generate an ACPI (Advanced Configuration and Power Interface)
table"
+ default n
+ help
+ The Advanced Configuration and Power Interface (ACPI) specification
+ provides an open standard for device configuration and management
+ by the operating system. It defines platform-independent interfaces
+ for configuration and power management monitoring.
+
endmenu
config MAX_PIRQ_LINKS
diff --git a/arch/x86/include/asm/acpi_table.h
b/arch/x86/include/asm/acpi_table.h
new file mode 100644
index 000..971adde
--- /dev/null
+++ b/arch/x86/include/asm/acpi_table.h
@@ -0,0 +1,398 @@
+/*
+ * From coreboot
+ *
+ * Copyright (C) 2004 SUSE LINUX AG
+ * Copyright (C) 2004 Nick Barker
+ * Copyright (C) 2008-2009 coresystems GmbH
+ * (Written by Stefan Reinauer )
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include
+#include
+#include
+#include
+
+#define RSDP_SIG "RSD PTR " /* RSDT pointer signature */
+#define ACPI_TABLE_CREATOR "UBOOT " /* Must be exactly 8 bytes long! */
+#define OEM_ID "UBOOT "/* Must be exactly 6 bytes long! */
+#define ASLC "INTL" /* Must be exactly 4 bytes long! */
+
+#define OEM_REVISION 42
+#define ASL_COMPILER_REVISION 42
+
+#define APM_CNT 0xb2
+#define APM_CNT_CST_CONTROL 0x85
+#define APM_CNT_PST_CONTROL 0x80
+#define APM_CNT_ACPI_DISABLE 0x1e
+#define APM_CNT_ACPI_ENABLE 0xe1
+#define APM_CNT_MBI_UPDATE 0xeb
+#define APM_CNT_GNVS_UPDATE 0xea
+#define APM_CNT_FINALIZE 0xcb
+#define APM_CNT_LEGACY 0xcc
+#define APM_ST 0xb3
+
+#define MP_IRQ_POLARITY_DEFAULT 0x0
+#define MP_IRQ_POLARITY_HIGH 0x1
+#define MP_IRQ_POLARITY_LOW 0x3
+#define MP_IRQ_POLARITY_MASK 0x3
+#define MP_IRQ_TRIGGER_DEFAULT 0x0
+#define MP_IRQ_TRIGGER_EDGE 0x4
+#define MP_IRQ_TRIGGER_LEVEL 0xc
+#define MP_IRQ_TRIGGER_MASK 0xc
+
+#define ACTL 0x00
+#define SCIS_MASK 0x07
+#define SCIS_IRQ9 0x00
+#define SCIS_IRQ10 0x01
+#define SCIS_IRQ11 0x02
+#define SCIS_IRQ20 0x04
+#define SCIS_IRQ21 0x05
+#define SCIS_IRQ22 0x06
+#define SCIS_IRQ23 0x07
+
+enum acpi_bus_type {
+ PIC = 0,
+ APIC = 2,
+ ETHIGH = 5
+};
+
+#define ACPI_REV_ACPI_1_0 1
+#define ACPI_REV_ACPI_2_0 1
+#define ACPI_REV_ACPI_3_0 2
+#define ACPI_REV_ACPI_4_0 3
+#define ACPI_REV_ACPI_5_0 5
+
+#define ACPI_RSDP_REV_ACPI_1_0 0
+#define ACPI_RSDP_REV_ACPI_2_0 2
+
+typedef struct acpi_gen_regaddr {
+ u8 space_id;/* Address space ID */
+ u8 bit_width; /* Register size in bits */
+ u8 bit_offset; /* Register bit offset */
+ union {
+ /* Reserved in ACPI 2.0 - 2.0b */
+ u8 resv;
+ /* Access size in ACPI 2.0c/3.0/4.0/5.0 */
+ u8 access_size;
+ };
+ u32 addrl; /* Register address, low 32 bits */
+ u32 addrh; /* Register address, high 32 bits */
+} acpi_addr_t;
+
+
+/* RSDP (Root System Description Pointer)
+Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum. */
+struct acpi_rsdp {
+ char signature[8]; /* RSDP signature */
+ u8checksum; /* Checksum of the first 20 bytes */
+ char oem_id[6];/* OEM ID */
+ u8revision; /* 0 for ACPI 1.0, 2 for ACPI 2.0/3.0/4.0 */
+ u32 rsdt_address; /* Physical address of RSDT (32 bits) */
+ u32 length; /* Total RSDP length (incl. extended part) */
+ u64 xsdt_address; /* Physical address of XSDT (64 bits) */
+ u8ext_checksum; /* Checksum of the whole table */
+ u8reserved[3];
+};
+
+enum acpi_address_space_type {
+ ACPI_ADDRESS_SPACE_MEMORY = 0, /* System memo
[U-Boot] [U-BOOT PATCH v3 4/4] x86: Added dsdt tables for Qemu ACPI implementation.
For ACPI, on QEMU x86 emulated platform things like control and/or check
thermal zones (temperature sensors, fan speeds, etc), battery levels & power
levels do not exist but we can emulate PCI IRQ routing, CPUs, NUMA domains.
Signed-off-by: Saket Sinha
---
arch/x86/cpu/qemu/Makefile | 2 +-
arch/x86/cpu/qemu/acpi/cpu-hotplug.asl | 78 ++
arch/x86/cpu/qemu/acpi/dbug.asl| 26 ++
arch/x86/cpu/qemu/acpi/hpet.asl| 36 +++
arch/x86/cpu/qemu/acpi/isa.asl | 102
arch/x86/cpu/qemu/acpi/pci-crs.asl | 94 +++
arch/x86/cpu/qemu/dsdt.asl | 440 +
7 files changed, 777 insertions(+), 1 deletion(-)
create mode 100644 arch/x86/cpu/qemu/acpi/cpu-hotplug.asl
create mode 100644 arch/x86/cpu/qemu/acpi/dbug.asl
create mode 100644 arch/x86/cpu/qemu/acpi/hpet.asl
create mode 100644 arch/x86/cpu/qemu/acpi/isa.asl
create mode 100644 arch/x86/cpu/qemu/acpi/pci-crs.asl
create mode 100644 arch/x86/cpu/qemu/dsdt.asl
diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
index 8c3884c..8a5a59c 100644
--- a/arch/x86/cpu/qemu/Makefile
+++ b/arch/x86/cpu/qemu/Makefile
@@ -7,6 +7,6 @@
ifndef CONFIG_EFI_STUB
obj-y += car.o dram.o
endif
-obj-y += qemu.o
+obj-y += qemu.o dsdt.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o
obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/x86/cpu/qemu/acpi/cpu-hotplug.asl
b/arch/x86/cpu/qemu/acpi/cpu-hotplug.asl
new file mode 100644
index 000..0f3e83b
--- /dev/null
+++ b/arch/x86/cpu/qemu/acpi/cpu-hotplug.asl
@@ -0,0 +1,78 @@
+/
+ * CPU hotplug
+ /
+
+Scope(\_SB) {
+/* Objects filled in by run-time generated SSDT */
+External(NTFY, MethodObj)
+External(CPON, PkgObj)
+
+/* Methods called by run-time generated SSDT Processor objects */
+Method(CPMA, 1, NotSerialized) {
+// _MAT method - create an madt apic buffer
+// Arg0 = Processor ID = Local APIC ID
+// Local0 = CPON flag for this cpu
+Store(DerefOf(Index(CPON, Arg0)), Local0)
+// Local1 = Buffer (in madt apic form) to return
+Store(Buffer(8) {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0}, Local1)
+// Update the processor id, lapic id, and enable/disable status
+Store(Arg0, Index(Local1, 2))
+Store(Arg0, Index(Local1, 3))
+Store(Local0, Index(Local1, 4))
+Return (Local1)
+}
+Method(CPST, 1, NotSerialized) {
+// _STA method - return ON status of cpu
+// Arg0 = Processor ID = Local APIC ID
+// Local0 = CPON flag for this cpu
+Store(DerefOf(Index(CPON, Arg0)), Local0)
+If (Local0) {
+Return (0xF)
+} Else {
+Return (0x0)
+}
+}
+Method(CPEJ, 2, NotSerialized) {
+// _EJ0 method - eject callback
+Sleep(200)
+}
+
+/* CPU hotplug notify method */
+OperationRegion(PRST, SystemIO, 0xaf00, 32)
+Field(PRST, ByteAcc, NoLock, Preserve) {
+PRS, 256
+}
+Method(PRSC, 0) {
+// Local5 = active cpu bitmap
+Store(PRS, Local5)
+// Local2 = last read byte from bitmap
+Store(Zero, Local2)
+// Local0 = Processor ID / APIC ID iterator
+Store(Zero, Local0)
+While (LLess(Local0, SizeOf(CPON))) {
+// Local1 = CPON flag for this cpu
+Store(DerefOf(Index(CPON, Local0)), Local1)
+If (And(Local0, 0x07)) {
+// Shift down previously read bitmap byte
+ShiftRight(Local2, 1, Local2)
+} Else {
+// Read next byte from cpu bitmap
+Store(DerefOf(Index(Local5, ShiftRight(Local0, 3))), Local2)
+}
+// Local3 = active state for this cpu
+Store(And(Local2, 1), Local3)
+
+If (LNotEqual(Local1, Local3)) {
+// State change - update CPON with new state
+Store(Local3, Index(CPON, Local0))
+// Do CPU notify
+If (LEqual(Local3, 1)) {
+NTFY(Local0, 1)
+} Else {
+NTFY(Local0, 3)
+}
+}
+Increment(Local0)
+}
+}
+}
diff --git a/arch/x86/cpu/qemu/acpi/dbug.asl b/arch/x86/cpu/qemu/acpi/dbug.asl
new file mode 100644
index 000..276321f
--- /dev/null
+++ b/arch/x86/cpu/qemu/acpi/dbug.asl
@@ -0,0 +1,26 @@
+/
+ * Debugging
+ /
+
+Scope(\) {
+/* Debug Output */
+OperationRegion(DBG, SystemIO, 0x0402, 0x01)
+Field(DBG, ByteAcc, NoLock, Preserve) {
+DBGB, 8,
+}
+
+/* Debug method - use this method to send output to the QEMU
+ * BIOS debug port. This method handles strings, inte
[U-Boot] [U-BOOT PATCH v3 2/4] x86: Added support for ACPI table generation at the generic layer.
Signed-off-by: Saket Sinha
---
arch/x86/include/asm/acpi_table.h | 387 +++
arch/x86/lib/Makefile | 1 +
arch/x86/lib/acpi_table.c | 413 ++
arch/x86/lib/tables.c | 5 +
scripts/Makefile.lib | 11 +
5 files changed, 817 insertions(+)
create mode 100644 arch/x86/include/asm/acpi_table.h
create mode 100644 arch/x86/lib/acpi_table.c
diff --git a/arch/x86/include/asm/acpi_table.h
b/arch/x86/include/asm/acpi_table.h
new file mode 100644
index 000..7b52e7d
--- /dev/null
+++ b/arch/x86/include/asm/acpi_table.h
@@ -0,0 +1,387 @@
+#include
+#include
+#include
+#include
+
+#define RSDP_SIG "RSD PTR " /* RSDT pointer signature */
+#define ACPI_TABLE_CREATOR "UBOOT " /* Must be exactly 8 bytes long! */
+#define OEM_ID "UBOOT "/* Must be exactly 6 bytes long! */
+#define ASLC "UBOO" /* Must be exactly 4 bytes long! */
+
+#define APM_CNT 0xb2
+#define APM_CNT_CST_CONTROL 0x85
+#define APM_CNT_PST_CONTROL 0x80
+#define APM_CNT_ACPI_DISABLE0x1e
+#define APM_CNT_ACPI_ENABLE 0xe1
+#define APM_CNT_MBI_UPDATE 0xeb
+#define APM_CNT_GNVS_UPDATE 0xea
+#define APM_CNT_FINALIZE0xcb
+#define APM_CNT_LEGACY 0xcc
+#define APM_STS 0xb3
+
+
+#define MP_IRQ_POLARITY_DEFAULT 0x0
+#define MP_IRQ_POLARITY_HIGH0x1
+#define MP_IRQ_POLARITY_LOW 0x3
+#define MP_IRQ_POLARITY_MASK0x3
+#define MP_IRQ_TRIGGER_DEFAULT 0x0
+#define MP_IRQ_TRIGGER_EDGE 0x4
+#define MP_IRQ_TRIGGER_LEVEL0xc
+#define MP_IRQ_TRIGGER_MASK 0xc
+
+#define ACTL0x00
+# define SCIS_MASK 0x07
+# define SCIS_IRQ9 0x00
+# define SCIS_IRQ10 0x01
+# define SCIS_IRQ11 0x02
+# define SCIS_IRQ20 0x04
+# define SCIS_IRQ21 0x05
+# define SCIS_IRQ22 0x06
+# define SCIS_IRQ23 0x07
+
+#define ILB_BASE_ADDRESS0xfed08000
+#define ILB_BASE_SIZE 0x400
+
+enum bus_type {
+ PIC = 0,
+ APIC = 2,
+ ETHIGH = 5
+};
+
+
+typedef struct acpi_gen_regaddr {
+ u8 space_id; /* Address space ID */
+ u8 bit_width; /* Register size in bits */
+ u8 bit_offset; /* Register bit offset */
+ union {
+ u8 resv; /* Reserved in ACPI 2.0
- 2.0b */
+ u8 access_size;/* Access size in ACPI
2.0c/3.0/4.0/5.0 */
+ };
+ u32 addrl; /* Register address, low 32 bits */
+ u32 addrh; /* Register address, high 32 bits */
+} __attribute__ ((packed)) acpi_addr_t;
+
+
+/* RSDP (Root System Description Pointer) */
+struct __packed acpi_rsdp {
+ char signature[8]; /* RSDP signature */
+ u8checksum; /* Checksum of the first 20 bytes */
+ char oem_id[6];/* OEM ID */
+ u8revision; /* 0 for ACPI 1.0, 2 for ACPI 2.0/3.0/4.0 */
+ u32 rsdt_address; /* Physical address of RSDT (32 bits) */
+ u32 length; /* Total RSDP length (incl. extended part) */
+ u64 xsdt_address; /* Physical address of XSDT (64 bits) */
+ u8ext_checksum; /* Checksum of the whole table */
+ u8reserved[3];
+};
+/* Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum. */
+
+enum acpi_address_space_type {
+ ACPI_ADDRESS_SPACE_MEMORY = 0, /* System memory */
+ ACPI_ADDRESS_SPACE_IO = 1, /* System I/O */
+ ACPI_ADDRESS_SPACE_PCI = 2, /* PCI config space */
+ ACPI_ADDRESS_SPACE_EC = 3, /* Embedded controller */
+ ACPI_ADDRESS_SPACE_SMBUS = 4, /* SMBus */
+ ACPI_ADDRESS_SPACE_PCC = 0x0A, /* Platform Comm. Channel */
+ ACPI_ADDRESS_SPACE_FIXED = 0x7f /* Functional fixed hardware */
+};
+
+#define ACPI_FFIXEDHW_VENDOR_INTEL 1/* Intel */
+#define ACPI_FFIXEDHW_CLASS_HLT 0/* C1 Halt */
+#define ACPI_FFIXEDHW_CLASS_IO_HLT 1/* C1 I/O then Halt */
+#define ACPI_FFIXEDHW_CLASS_MWAIT2/* MWAIT Native C-state */
+#define ACPI_FFIXEDHW_FLAG_HW_COORD 1/* Hardware Coordination bit */
+#define ACPI_FFIXEDHW_FLAG_BM_STS2/* BM_STS avoidance bit */
+/* 0x80-0xbf: Reserved */
+/* 0xc0-0xff: OEM defined */
+
+/* Access size definitions for Generic address structure */
+enum acpi_address_space_size {
+ ACPI_ACCESS_SIZE_UNDEFINED = 0, /* Undefined (legacy reasons) */
+ ACPI_ACCESS_SIZE_BYTE_ACCESS = 1,
+ ACPI_ACCESS_SIZE_WORD_ACCESS = 2,
+ ACPI_ACCESS_SIZE_DWORD_ACCESS =
[U-Boot] [U-BOOT PATCH v3 3/4] x86: Added ACPI support for Qemu.
Signed-off-by: Saket Sinha
---
arch/x86/cpu/qemu/Makefile | 1 +
arch/x86/cpu/qemu/acpi.c | 157 +
2 files changed, 158 insertions(+)
create mode 100644 arch/x86/cpu/qemu/acpi.c
diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
index 9a66b16..8c3884c 100644
--- a/arch/x86/cpu/qemu/Makefile
+++ b/arch/x86/cpu/qemu/Makefile
@@ -8,4 +8,5 @@ ifndef CONFIG_EFI_STUB
obj-y += car.o dram.o
endif
obj-y += qemu.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o
obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/x86/cpu/qemu/acpi.c b/arch/x86/cpu/qemu/acpi.c
new file mode 100644
index 000..ea2bdc6
--- /dev/null
+++ b/arch/x86/cpu/qemu/acpi.c
@@ -0,0 +1,157 @@
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, void
*dsdt)
+{
+ acpi_header_t *header = &(fadt->header);
+ u16 pmbase;
+
+ /*TODO get this value from pci rather than harcoding it.*/
+ pmbase = 0x0600;
+
+ memset((void *) fadt, 0, sizeof(struct acpi_fadt));
+ memcpy(header->signature, "FACP", 4);
+ header->length = sizeof(struct acpi_fadt);
+ header->revision = 3;
+ memcpy(header->oem_id, OEM_ID, 6);
+ memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+ memcpy(header->asl_compiler_id, ASLC, 4);
+ header->asl_compiler_revision = 0;
+
+ fadt->firmware_ctrl = (unsigned long)facs;
+ fadt->dsdt = (unsigned long)dsdt;
+ fadt->model = 0x00;
+ fadt->preferred_pm_profile = PM_MOBILE;
+ fadt->sci_int = 0x9;
+ fadt->smi_cmd = 0;
+ fadt->acpi_enable = 0;
+ fadt->acpi_disable = 0;
+ fadt->s4bios_req = 0x0;
+ fadt->pstate_cnt = 0;
+ fadt->pm1a_evt_blk = pmbase;
+ fadt->pm1b_evt_blk = 0x0;
+ fadt->pm1a_cnt_blk = pmbase + 0x4;
+ fadt->pm1b_cnt_blk = 0x0;
+ fadt->pm2_cnt_blk = pmbase + 0x50;
+ fadt->pm_tmr_blk = pmbase + 0x8;
+ fadt->gpe0_blk = pmbase + 0x20;
+ fadt->gpe1_blk = 0;
+ fadt->pm1_evt_len = 4;
+ fadt->pm1_cnt_len = 2; /* Upper word is reserved and
+Linux complains about 32 bit.
*/
+ fadt->pm2_cnt_len = 1;
+ fadt->pm_tmr_len = 4;
+ fadt->gpe0_blk_len = 16;
+ fadt->gpe1_blk_len = 0;
+ fadt->gpe1_base = 0;
+ fadt->cst_cnt = 0;
+ fadt->p_lvl2_lat = 1;
+ fadt->p_lvl3_lat = 0x39;
+ fadt->flush_size = 0;
+ fadt->flush_stride = 0;
+ fadt->duty_offset = 1;
+ fadt->duty_width = 3;
+ fadt->day_alrm = 0xd;
+ fadt->mon_alrm = 0x00;
+ fadt->century = 0x32;
+ fadt->iapc_boot_arch = 0x00;
+ fadt->flags = ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
+ ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE |
+ ACPI_FADT_DOCKING_SUPPORTED | ACPI_FADT_RESET_REGISTER |
+ ACPI_FADT_PLATFORM_CLOCK;
+ fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
+ fadt->reset_reg.bit_width = 8;
+ fadt->reset_reg.bit_offset = 0;
+ fadt->reset_reg.resv = 0;
+ fadt->reset_reg.addrl = 0xcf9;
+ fadt->reset_reg.addrh = 0;
+ fadt->reset_value = 0x06;
+ fadt->x_firmware_ctl_l = 0; /* Set X_FIRMWARE_CTRL only if FACS is */
+ fadt->x_firmware_ctl_h = 0; /* above 4GB. If X_FIRMWARE_CTRL is set, */
+ /* then FIRMWARE_CTRL
must be zero. */
+
+ fadt->x_dsdt_l = (unsigned long)dsdt;
+ fadt->x_dsdt_h = 0;
+ fadt->x_pm1a_evt_blk.space_id = 1;
+ fadt->x_pm1a_evt_blk.bit_width = 32;
+ fadt->x_pm1a_evt_blk.bit_offset = 0;
+ fadt->x_pm1a_evt_blk.resv = 0;
+ fadt->x_pm1a_evt_blk.addrl = pmbase;
+ fadt->x_pm1a_evt_blk.addrh = 0x0;
+ fadt->x_pm1b_evt_blk.space_id = 0;
+ fadt->x_pm1b_evt_blk.bit_width = 0;
+ fadt->x_pm1b_evt_blk.bit_offset = 0;
+ fadt->x_pm1b_evt_blk.resv = 0;
+ fadt->x_pm1b_evt_blk.addrl = 0x0;
+ fadt->x_pm1b_evt_blk.addrh = 0x0;
+ fadt->x_pm1a_cnt_blk.space_id = 1;
+ fadt->x_pm1a_cnt_blk.bit_width = 16; /* Upper word is reserved and
+ Linux
complains about 32 bit. */
+ fadt->x_pm1a_cnt_blk.bit_offset = 0;
+ fadt->x_pm1a_cnt_blk.resv = 0;
+ fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4;
+ fadt->x_pm1a_cnt_blk.addrh = 0x0;
+ fadt->x_pm1b_cnt_blk.space_id = 0;
+ fadt->x_pm1b_cnt_blk.bit_width = 0;
+ fadt->x_pm1b_cnt_blk.bit_offset = 0;
+ fadt->x_
[U-Boot] [U-BOOT PATCH v3 0/4] x86: This series adds ACPI support for qemu targets.
ACPI(Advanced Configuration and Power Interface), a Power Management and configuration standard allowing the operating system to controlthe amount of power each device is given (allowing it to put certain devices on standby or power-off for example). It is also used to control and/or check thermal zones (temperature sensors, fan speeds, etc), battery levels, PCI IRQ routing, CPUs, NUMA domains and many other things. To begin using ACPI, the operating system must look for the RSDP (Root System Description Pointer). If the RSDP is found, the verification is valid, it contains a pointer to the RSDT (Root System Description Table) and XSDT (extended System Description Table). For the run time part of ACPI the main table to detect is the FADT (Fixed ACPI Description Table) as this contains information needed to enable ACPI. The DSDT table contains a bytecode that is executed by a driver in the kernel. Changes from v2: - Fixes issues with using MMCONFIG for q35. - Fixes various entries in ACPI tables that OS was not able to parse. Changes from v1: - Dynamic generation of AML code for DSDT table. -Reading PCI registers for FADT table. -Incorporated review comments. Saket Sinha (4): x86: Added ACPI support as a configuration option. x86: Added support for ACPI table generation at the generic layer. x86: Added ACPI support for Qemu. x86: Added dsdt tables for Qemu ACPI implementation. arch/x86/Kconfig | 6 + arch/x86/cpu/qemu/Makefile | 3 +- arch/x86/cpu/qemu/acpi.c | 157 arch/x86/cpu/qemu/acpi/cpu-hotplug.asl | 78 ++ arch/x86/cpu/qemu/acpi/dbug.asl| 26 ++ arch/x86/cpu/qemu/acpi/hpet.asl| 36 +++ arch/x86/cpu/qemu/acpi/isa.asl | 102 arch/x86/cpu/qemu/acpi/pci-crs.asl | 94 +++ arch/x86/cpu/qemu/dsdt.asl | 440 + arch/x86/include/asm/acpi_table.h | 387 + arch/x86/lib/Makefile | 1 + arch/x86/lib/acpi_table.c | 413 +++ arch/x86/lib/tables.c | 5 + scripts/Makefile.lib | 11 + 14 files changed, 1758 insertions(+), 1 deletion(-) create mode 100644 arch/x86/cpu/qemu/acpi.c create mode 100644 arch/x86/cpu/qemu/acpi/cpu-hotplug.asl create mode 100644 arch/x86/cpu/qemu/acpi/dbug.asl create mode 100644 arch/x86/cpu/qemu/acpi/hpet.asl create mode 100644 arch/x86/cpu/qemu/acpi/isa.asl create mode 100644 arch/x86/cpu/qemu/acpi/pci-crs.asl create mode 100644 arch/x86/cpu/qemu/dsdt.asl create mode 100644 arch/x86/include/asm/acpi_table.h create mode 100644 arch/x86/lib/acpi_table.c -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [U-BOOT PATCH v3 1/4] x86: Added ACPI support as a configuration option.
Signed-off-by: Saket Sinha --- arch/x86/Kconfig | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 01ed760..36eae6d 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -346,6 +346,12 @@ config GENERATE_MP_TABLE endmenu +config GENERATE_ACPI_TABLE + bool "Generate ACPI(Advanced Configuration and Power Interface) table" + default y + help + The Advanced Configuration and Power Interface (ACPI) specification provides an open standard for device configuration and management by the operating system. It defines platform-independent interfaces for configuration, power management monitoring. + config MAX_PIRQ_LINKS int default 8 -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] Support ACPI on minnowmax and qemu-x86 targets
This is an initial attempt to support ACPI on minnowmax and qemu-x86 targets. This is still a work in progress. The Linux kernel boot logs on minnowmax can be found at http://pastebin.com/Vdk8PqaV . Saket Sinha (1): x86: Initial ACPI support for minnowmax and qemu. arch/x86/Kconfig | 7 + arch/x86/cpu/qemu/Makefile | 3 +- arch/x86/cpu/qemu/acpi.c | 176 +++ arch/x86/cpu/qemu/acpi/cpu-hotplug.asl | 78 + arch/x86/cpu/qemu/acpi/dbug.asl| 26 ++ arch/x86/cpu/qemu/acpi/hpet.asl| 36 +++ arch/x86/cpu/qemu/acpi/isa.asl | 102 +++ arch/x86/cpu/qemu/acpi/pci-crs.asl | 94 ++ arch/x86/cpu/qemu/dsdt.asl | 454 + arch/x86/include/asm/acpi_table.h | 387 arch/x86/lib/Makefile | 1 + arch/x86/lib/acpi_table.c | 395 + arch/x86/lib/tables.c | 5 + board/intel/minnowmax/Makefile | 3 +- board/intel/minnowmax/acpi.c | 251 board/intel/minnowmax/acpi/cpu.asl | 56 board/intel/minnowmax/acpi/device_nvs.asl | 66 + board/intel/minnowmax/acpi/ec.asl | 0 board/intel/minnowmax/acpi/globalnvs.asl | 83 ++ board/intel/minnowmax/acpi/mainboard.asl | 4 + board/intel/minnowmax/acpi/platform.asl| 52 board/intel/minnowmax/acpi/sleepstates.asl | 5 + board/intel/minnowmax/acpi/superio.asl | 0 board/intel/minnowmax/dsdt.asl | 29 ++ scripts/Makefile.lib | 11 + 25 files changed, 2322 insertions(+), 2 deletions(-) create mode 100644 arch/x86/cpu/qemu/acpi.c create mode 100644 arch/x86/cpu/qemu/acpi/cpu-hotplug.asl create mode 100644 arch/x86/cpu/qemu/acpi/dbug.asl create mode 100644 arch/x86/cpu/qemu/acpi/hpet.asl create mode 100644 arch/x86/cpu/qemu/acpi/isa.asl create mode 100644 arch/x86/cpu/qemu/acpi/pci-crs.asl create mode 100644 arch/x86/cpu/qemu/dsdt.asl create mode 100644 arch/x86/include/asm/acpi_table.h create mode 100644 arch/x86/lib/acpi_table.c create mode 100644 board/intel/minnowmax/acpi.c create mode 100644 board/intel/minnowmax/acpi/cpu.asl create mode 100644 board/intel/minnowmax/acpi/device_nvs.asl create mode 100644 board/intel/minnowmax/acpi/ec.asl create mode 100644 board/intel/minnowmax/acpi/globalnvs.asl create mode 100644 board/intel/minnowmax/acpi/mainboard.asl create mode 100644 board/intel/minnowmax/acpi/platform.asl create mode 100644 board/intel/minnowmax/acpi/sleepstates.asl create mode 100644 board/intel/minnowmax/acpi/superio.asl create mode 100644 board/intel/minnowmax/dsdt.asl -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] x86: Initial ACPI support for minnowmax and qemu.
Signed-off-by: Saket Sinha
---
arch/x86/Kconfig | 7 +
arch/x86/cpu/qemu/Makefile | 3 +-
arch/x86/cpu/qemu/acpi.c | 176 +++
arch/x86/cpu/qemu/acpi/cpu-hotplug.asl | 78 +
arch/x86/cpu/qemu/acpi/dbug.asl| 26 ++
arch/x86/cpu/qemu/acpi/hpet.asl| 36 +++
arch/x86/cpu/qemu/acpi/isa.asl | 102 +++
arch/x86/cpu/qemu/acpi/pci-crs.asl | 94 ++
arch/x86/cpu/qemu/dsdt.asl | 454 +
arch/x86/include/asm/acpi_table.h | 387
arch/x86/lib/Makefile | 1 +
arch/x86/lib/acpi_table.c | 395 +
arch/x86/lib/tables.c | 5 +
board/intel/minnowmax/Makefile | 3 +-
board/intel/minnowmax/acpi.c | 251
board/intel/minnowmax/acpi/cpu.asl | 56
board/intel/minnowmax/acpi/device_nvs.asl | 66 +
board/intel/minnowmax/acpi/ec.asl | 0
board/intel/minnowmax/acpi/globalnvs.asl | 83 ++
board/intel/minnowmax/acpi/mainboard.asl | 4 +
board/intel/minnowmax/acpi/platform.asl| 52
board/intel/minnowmax/acpi/sleepstates.asl | 5 +
board/intel/minnowmax/acpi/superio.asl | 0
board/intel/minnowmax/dsdt.asl | 29 ++
scripts/Makefile.lib | 11 +
25 files changed, 2322 insertions(+), 2 deletions(-)
create mode 100644 arch/x86/cpu/qemu/acpi.c
create mode 100644 arch/x86/cpu/qemu/acpi/cpu-hotplug.asl
create mode 100644 arch/x86/cpu/qemu/acpi/dbug.asl
create mode 100644 arch/x86/cpu/qemu/acpi/hpet.asl
create mode 100644 arch/x86/cpu/qemu/acpi/isa.asl
create mode 100644 arch/x86/cpu/qemu/acpi/pci-crs.asl
create mode 100644 arch/x86/cpu/qemu/dsdt.asl
create mode 100644 arch/x86/include/asm/acpi_table.h
create mode 100644 arch/x86/lib/acpi_table.c
create mode 100644 board/intel/minnowmax/acpi.c
create mode 100644 board/intel/minnowmax/acpi/cpu.asl
create mode 100644 board/intel/minnowmax/acpi/device_nvs.asl
create mode 100644 board/intel/minnowmax/acpi/ec.asl
create mode 100644 board/intel/minnowmax/acpi/globalnvs.asl
create mode 100644 board/intel/minnowmax/acpi/mainboard.asl
create mode 100644 board/intel/minnowmax/acpi/platform.asl
create mode 100644 board/intel/minnowmax/acpi/sleepstates.asl
create mode 100644 board/intel/minnowmax/acpi/superio.asl
create mode 100644 board/intel/minnowmax/dsdt.asl
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index cbbaa4f..7beda01 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -338,6 +338,13 @@ config GENERATE_MP_TABLE
endmenu
+config GENERATE_ACPI_TABLE
+ bool "Generate ACPI(Advanced Configuration and Power Interface) table"
+ default y
+ help
+ The Advanced Configuration and Power Interface (ACPI) specification
provides an open standard for device configuration and management by
the operating system. It defines platform-independent interfaces for hardware
discovery, configuration, power management & monitoring.
+
+
config MAX_PIRQ_LINKS
int
default 8
diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
index be79723..1fbfbc5 100644
--- a/arch/x86/cpu/qemu/Makefile
+++ b/arch/x86/cpu/qemu/Makefile
@@ -4,5 +4,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += car.o dram.o qemu.o
+obj-y += car.o dram.o qemu.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o dsdt.o
obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/x86/cpu/qemu/acpi.c b/arch/x86/cpu/qemu/acpi.c
new file mode 100644
index 000..aab374a
--- /dev/null
+++ b/arch/x86/cpu/qemu/acpi.c
@@ -0,0 +1,176 @@
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+void acpi_create_fadt(struct acpi_fadt * fadt, struct acpi_facs * facs, void
*dsdt)
+{
+ acpi_header_t *header = &(fadt->header);
+ u16 pmbase;
+
+ pci_dev_t bdf = PCI_BDF(0, 0x1f, 0);
+ pci_read_config_word(bdf, 0x40, &pmbase);
+
+ memset((void *) fadt, 0, sizeof(struct acpi_fadt));
+ memcpy(header->signature, "FACP", 4);
+ header->length = sizeof(struct acpi_fadt);
+ header->revision = 3;
+ memcpy(header->oem_id, OEM_ID, 6);
+ memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
+ memcpy(header->asl_compiler_id, ASLC, 4);
+ header->asl_compiler_revision = 0;
+
+ fadt->firmware_ctrl = (unsigned long) facs;
+ fadt->dsdt = (unsigned long) dsdt;
+ fadt->model = 0x00;
+ fadt->preferred_pm_profile = PM_MOBILE;
+ fadt->sci_int = 0x9;
+ fadt->smi_cmd = 0;
+ fadt->acpi_enable = 0;
+ fadt->acpi_disable = 0;
+ fadt->s4bios_req = 0x0;
+ fadt->pstate_cnt = 0;
+ fadt->pm1a_evt_
Re: [U-Boot] [PATCH v2] Initial support for ACPI Tables for qemu-x86 target.
Hi Bin,
>>>> +static unsigned long acpi_fill_mcfg(unsigned long current)
>>>> +{
>>>> + pci_dev_t qemu_dev;
>>>> + struct pci_device_id qemu_id[] = { { 0x8086, 0x29c0 } };
>>>> +u32 reg;
>>>> +
>>>> +qemu_dev = pci_find_devices(qemu_id, 0);
>>>> +if (!qemu_dev)
>>>> +return current;
>>>> +
>>>> +reg = pci_read_config_dword(qemu_dev, 0x60, ®);
>>>> +if ((reg & 0x07) != 0x01) // require enabled + 256MB size
>>>> +return current;
>>>> +
>>>> +current += acpi_create_mcfg_mmconfig((struct acpi_mcfg_mmconfig
>>>> *) current,
>>>> + reg & 0xf000, 0x0, 0x0,
>>>> 255);
>>>
>>> We need actually programming the chipset to enable the ECAM. This
>>> needs to be done in the arch/x86/cpu/qemu/qemu.c.
>>>
>>
>> Would be needing your guidance for this. Would need some info about
>> qemu working and ECAM's role.
>
> ECAM is PCIe enhanced configuration access mechanism. QEMU i440FX is a
> PCI chipset, which does not support ECAM. For QEMU Q35 which supports
> PCIe, you need check the Q35 chipset. I just checked that, it's on
> D0:F0:R60h a register called PCIEXBAR. You need hook U-Boot's PCI
> configuration RW routines to actually use ECAM to verify it is really
> working.
>
As suggested by you, I have added below patch -
diff --git a/arch/x86/cpu/qemu/pci.c b/arch/x86/cpu/qemu/pci.c
index 1a9140b..ba8f470 100644
--- a/arch/x86/cpu/qemu/pci.c
+++ b/arch/x86/cpu/qemu/pci.c
@@ -11,6 +11,8 @@
#include
#include
+#define Q35_PCIEXBAR_ADDR 0xb000
+
DECLARE_GLOBAL_DATA_PTR;
void board_pci_setup_hose(struct pci_controller *hose)
@@ -83,7 +85,10 @@ int board_pci_post_scan(struct pci_controller *hose)
x86_pci_write_config16(PIIX_IDE, IDE0_TIM, IDE_DECODE_EN);
x86_pci_write_config16(PIIX_IDE, IDE1_TIM, IDE_DECODE_EN);
}
-
+ else {
+ /* setup mmconfig */
+ x86_pci_write_config32(device, 0x60, Q35_PCIEXBAR_ADDR | 1);
+ }
/*
* QEMU emulated graphic card shows in the PCI configuration space with
* PCI vendor id and device id as an artificial pair 0x1234:0x.
In the bootup logs, with this patch applied, I am getting -
[0.432000] ACPI: Using PIC for interrupt routing
[0.436000] PCI: Using host bridge windows from ACPI; if necessary,
use "pci=nocrs" and report a bug
[0.486000] ACPI: PCI Root Bridge [PCI0] (domain [bus 00-ff])
[0.488000] acpi PNP0A08:00: _OSC: OS supports [ASPM ClockPM Segments MSI]
[0.491000] acpi PNP0A08:00: _OSC: not requesting OS control; OS
requires [ExtendedConfig ASPM ClockPM MSI]
[0.494000] acpi PNP0A08:00: fail to add MMCONFIG information,
can't access extended PCI configuration space under this bridge.
[0.496000] PCI host bridge to bus :00
[0.497000] pci_bus :00: root bus resource [bus 00-ff]
[0.498000] pci_bus :00: root bus resource [io 0x-0x0cf7 window]
[0.498000] pci_bus :00: root bus resource [io 0x0d00-0x window]
[0.50] pci_bus :00: root bus resource [mem
0x000a-0x000b window]
[0.501000] pci_bus :00: root bus resource [mem
0xe000-0xfebf window]
In the log "fail to add MMCONFIG information, can't access extended
PCI configuration space under this bridge." shows I am still not able
to use ECAM.
Regards,
Saket Sinha
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Re: [U-Boot] [PATCH v2] Initial support for ACPI Tables for qemu-x86 target.
Hi Bin,
>>> +
>>> +static int acpi_create_madt_lapic(struct acpi_madt_lapic *lapic, u8 cpu,
>>> u8 apic)
>>> +{
>>> +lapic->type = 0; /* Local APIC structure */
>>> +lapic->length = sizeof(struct acpi_madt_lapic);
>>> +lapic->flags = (1 << 0); /* Processor/LAPIC enabled */
>>> +lapic->processor_id = cpu;
>>> +lapic->apic_id = apic;
>>> +
>>> +return lapic->length;
>>> +}
>>> +
>>> +static unsigned long acpi_create_madt_lapics(unsigned long current)
>>> +{
>>> + struct udevice *dev;
>>> +
>>> +for (uclass_find_first_device(UCLASS_CPU, &dev);
>>> + dev;
>>> + uclass_find_next_device(&dev)) {
>>> +struct cpu_platdata *plat = dev_get_parent_platdata(dev);
>>> +
>>> + current += acpi_create_madt_lapic((struct acpi_madt_lapic
>>> *)current, plat->cpu_id, plat->cpu_id);
>>
>> The processor id (2nd parameter) is not equal to lapic id. Per the
>> ACPI spec, it should match the ProcessorID in the ASL file, format
>> below.
>>
>> Processor (ProcessorName, ProcessorID, PBlockAddress, PblockLength)
>> {ObjectList}
>>
>
> Thanks for bringing this to my notice.
> In my boot up logs, I am getting "ACPI: No LAPIC entries present".
> This might be the reason for that.
>
As per our previous discussion, I reported an error in bringing up
u-boot for qemu -
" Cannot find uclass for id 10: please add the UCLASS_DRIVER()
declaration for this UCLASS_... id"
You told me that this is because QEMU has not been converted to use dm
cpu driver.
If this issue is resolved, and thus UCLASS_CPU would be available for
qemu, the patch below would fix the lapic error.
diff --git a/arch/x86/cpu/qemu/acpi_table.c b/arch/x86/cpu/qemu/acpi_table.c
index cefd5f4..f055646 100644
--- a/arch/x86/cpu/qemu/acpi_table.c
+++ b/arch/x86/cpu/qemu/acpi_table.c
@@ -98,13 +98,15 @@ static int acpi_create_madt_lapic(struct
acpi_madt_lapic *lapic, u8 cpu, u8 apic
static unsigned long acpi_create_madt_lapics(unsigned long current)
{
struct udevice *dev;
+ int index = 0;
for (uclass_find_first_device(UCLASS_CPU, &dev);
dev;
uclass_find_next_device(&dev)) {
struct cpu_platdata *plat = dev_get_parent_platdata(dev);
- current += acpi_create_madt_lapic((struct
acpi_madt_lapic *)current, plat->cpu_id, plat->cpu_id);
+ current += acpi_create_madt_lapic((struct
acpi_madt_lapic *)current, index, plat->cpu_id);
+ index++;
}
return current;
}
Regards,
Saket Sinha
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] Initial support for ACPI Tables for qemu-x86 target.
Hi Simon,
Please find my comments inline -
>> diff --git a/arch/x86/cpu/qemu/acpi_table.c b/arch/x86/cpu/qemu/acpi_table.c
>> new file mode 100755
>> index 000..cefd5f4
>> --- /dev/null
>> +++ b/arch/x86/cpu/qemu/acpi_table.c
>
> We should split the routines below in this file into two parts: common
> routines which are really common stuff into file arch/x86/lib/acpi.c,
> and cpu/board-specific codes which reside in cpu/board directory.
>
Would bring it this way in next patchset.
>> @@ -0,0 +1,575 @@
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +#define LOCAL_APIC_ADDR 0xfee
>> +
>> +extern const unsigned char AmlCode[];
>> +
>> +u8 acpi_checksum(u8 *table, u32 length)
>> +{
>> + u8 ret = 0;
>> + while (length--) {
>> + ret += *table;
>> + table++;
>> + }
>> + return -ret;
>> +}
>> +/**
>> + * Add an ACPI table to the RSDT (and XSDT) structure, recalculate length
>> + * and checksum.
>> + */
>> +void acpi_add_table(struct acpi_rsdp *rsdp, void *table)
>> +{
>> + int i, entries_num;
>> + struct acpi_rsdt *rsdt;
>> + struct acpi_xsdt *xsdt = NULL;
>> +
>> + /* The RSDT is mandatory... */
>> + rsdt = (struct acpi_rsdt *)rsdp->rsdt_address;
>> +
>> + /* ...while the XSDT is not. */
>> + if (rsdp->xsdt_address)
>> + xsdt = (struct acpi_xsdt *)((u32)rsdp->xsdt_address);
>> +
>> + /* This should always be MAX_ACPI_TABLES. */
>> + entries_num = ARRAY_SIZE(rsdt->entry);
>> +
>> + for (i = 0; i < entries_num; i++) {
>> + if (rsdt->entry[i] == 0)
>> + break;
>> + }
>> +
>> + if (i >= entries_num) {
>> + printf("ACPI: Error: Could not add ACPI table, "
>> + "too many tables.\n");
>> + return;
>> + }
>> +
>> + /* Add table to the RSDT. */
>> + rsdt->entry[i] = (u32)table;
>> +
>> + /* Fix RSDT length or the kernel will assume invalid entries. */
>> + rsdt->header.length = sizeof(acpi_header_t) + (sizeof(u32) * (i +
>> 1));
>> +
>> + /* Re-calculate checksum. */
>> + rsdt->header.checksum = 0; /* Hope this won't get optimized away */
>> + rsdt->header.checksum = acpi_checksum((u8 *)rsdt,
>> rsdt->header.length);
>> +
>> + /*
>> +* And now the same thing for the XSDT. We use the same index as for
>> +* now we want the XSDT and RSDT to always be in sync in coreboot.
>> +*/
>> + if (xsdt) {
>> + /* Add table to the XSDT. */
>> + xsdt->entry[i] = (u64)(u32)table;
>> +
>> + /* Fix XSDT length. */
>> + xsdt->header.length = sizeof(acpi_header_t) +
>> + (sizeof(u64) * (i + 1));
>> +
>> + /* Re-calculate checksum. */
>> + xsdt->header.checksum = 0;
>> + xsdt->header.checksum = acpi_checksum((u8 *)xsdt,
>> + xsdt->header.length);
>> + }
>> +
>> +}
>> +
>> +static int acpi_create_madt_lapic(struct acpi_madt_lapic *lapic, u8 cpu, u8
>> apic)
>> +{
>> +lapic->type = 0; /* Local APIC structure */
>> +lapic->length = sizeof(struct acpi_madt_lapic);
>> +lapic->flags = (1 << 0); /* Processor/LAPIC enabled */
>> +lapic->processor_id = cpu;
>> +lapic->apic_id = apic;
>> +
>> +return lapic->length;
>> +}
>> +
>> +static unsigned long acpi_create_madt_lapics(unsigned long current)
>> +{
>> + struct udevice *dev;
>> +
>> +for (uclass_find_first_device(UCLASS_CPU, &dev);
>> + dev;
>> + uclass_find_next_device(&dev)) {
>> +struct cpu_platdata *plat = dev_get_parent_platdata(dev);
>> +
>> + current += acpi_create_madt_lapic((struct acpi_madt_lapic
>> *)current, plat->cpu_id, plat->cpu_id);
>
> The processor id (2nd parameter) is not equal to lapic id. Per the
> ACPI spec, it should match the ProcessorID in the ASL file, format
> below.
>
> Processor (ProcessorName, ProcessorID, PBlockAddress, PblockLength)
> {ObjectList}
>
Thanks for bringing this to my notice.
In my boot up logs, I am getting "ACPI: No LAPIC entries present".
This might be the reason for that.
>> + }
>> +return current;
>> +}
>> +
>> +static int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id,
>> u32 addr,
>> +u32 gsi_base)
>> +{
>> +ioapic->type = 1; /* I/O APIC structure */
>> +ioapic->length = sizeof(struct acpi_madt_ioapic);
>> +ioapic->reserved = 0x00;
>> +ioapic->gsi_base = gsi_base;
>> +ioapic->ioapic_id = id;
>> +ioapic->ioapic_addr = addr;
>> +
>> +return ioapic->length;
>> +}
>> +
>> +static int acpi_create
Re: [U-Boot] [PATCH v2] Initial support for ACPI Tables for qemu-x86 target.
Hi Bin,
On Wed, Jun 17, 2015 at 6:29 PM, Bin Meng wrote:
> +Simon
>
> Hi Saket,
>
> Since you just sent the patch to U-Boot mailing list for the first
> time, this is officially the v1 patch that is visible to the mailing
> list, although we know you sent us the 'v1' patch offline before.
> Please check my initial review comments below. I will continue
> reviewing after I checked the specs.
>
> On Wed, Jun 17, 2015 at 10:25 AM, Saket Sinha wrote:
>> This patchset is an initial attempt to support ACPI Tables for qemu-x86
>> target.
>>
>> Changes in v2:
>> Dynamic generation of AML code for DSDT table.
>> Reading PCI registers for FADT table.
>> Incorporated Simon's review comments.
>>
>
> In the future, please do not include the changelog in the commit
> message. Instead, put it below the 'Signed-off-by:'.
>
>> Signed-off-by: Saket Sinha
>> ---
>> Makefile | 5 +
>> arch/x86/Kconfig | 5 +
>> arch/x86/cpu/qemu/Makefile| 2 +-
>> arch/x86/cpu/qemu/acpi_table.c| 575
>> ++
>> arch/x86/cpu/qemu/cpu-hotplug.asl | 78 ++
>> arch/x86/cpu/qemu/dbug.asl| 26 ++
>> arch/x86/cpu/qemu/dsdt.asl| 221 +++
>> arch/x86/cpu/qemu/hpet.asl| 36 +++
>> arch/x86/cpu/qemu/pci-crs.asl | 94 +++
>> arch/x86/include/asm/acpi_table.h | 318 +
>> arch/x86/include/asm/acpigen.h| 85 ++
>> arch/x86/lib/tables.c | 5 +
>> configs/qemu-x86_defconfig| 1 +
>> 13 files changed, 1450 insertions(+), 1 deletion(-)
>> create mode 100755 arch/x86/cpu/qemu/acpi_table.c
>> create mode 100644 arch/x86/cpu/qemu/cpu-hotplug.asl
>> create mode 100644 arch/x86/cpu/qemu/dbug.asl
>> create mode 100644 arch/x86/cpu/qemu/dsdt.asl
>> create mode 100644 arch/x86/cpu/qemu/hpet.asl
>> create mode 100644 arch/x86/cpu/qemu/pci-crs.asl
>> create mode 100755 arch/x86/include/asm/acpi_table.h
>> create mode 100755 arch/x86/include/asm/acpigen.h
>>
>> diff --git a/Makefile b/Makefile
>> index 0a674bf..94388e6 100644
>> --- a/Makefile
>> +++ b/Makefile
>> @@ -389,6 +389,11 @@ export RCS_TAR_IGNORE := --exclude SCCS --exclude
>> BitKeeper --exclude .svn \
>> #
>> ===
>> # Rules shared between *config targets and build targets
>>
>> +PHONY += acpi
>> +acpi:
>> + $(Q)iasl -p dsdt -tc arch/x86/cpu/qemu/dsdt.asl
>> + $(Q)mv dsdt.hex arch/x86/cpu/qemu/dsdt.c
>> +
>
> Please do not use hardcoded path here to compile the asl file.
>
>> # Basic helpers built in scripts/
>> PHONY += scripts_basic
>> scripts_basic:
>> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
>> index 1aeae9d..c44ac07 100644
>> --- a/arch/x86/Kconfig
>> +++ b/arch/x86/Kconfig
>> @@ -321,6 +321,11 @@ config GENERATE_SFI_TABLE
>>
>> endmenu
>>
>> +config GENERATE_ACPI_TABLE
>> + bool "Generate ACPI(Advanced Configuration and Power Interface)
>> table"
>
> Please include a help paragraph to describe the ACPI table.
>
>> + default y
>
> We should say 'default n' here.
>
>> +
>> +
>> config MAX_PIRQ_LINKS
>> int
>> default 8
>> diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
>> index be79723..3a570bb 100644
>> --- a/arch/x86/cpu/qemu/Makefile
>> +++ b/arch/x86/cpu/qemu/Makefile
>> @@ -4,5 +4,5 @@
>> # SPDX-License-Identifier: GPL-2.0+
>> #
>>
>> -obj-y += car.o dram.o qemu.o
>> +obj-y += car.o dram.o qemu.o dsdt.o acpi_table.o
>> obj-$(CONFIG_PCI) += pci.o
>> diff --git a/arch/x86/cpu/qemu/acpi_table.c b/arch/x86/cpu/qemu/acpi_table.c
>> new file mode 100755
>> index 000..cefd5f4
>> --- /dev/null
>> +++ b/arch/x86/cpu/qemu/acpi_table.c
>> @@ -0,0 +1,575 @@
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>
> I don't think is need here.
>
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +#define LOCAL_APIC_ADDR 0xfee
>
> Please use the macro directly from
>
>> +
>> +extern const unsigned char AmlCode[];
>
> Please do not use camel case.
>
>> +
>> +u8 acpi_checksum(u8 *table, u32 length)
>> +{
[U-Boot] [PATCH v2] Initial support for ACPI Tables for qemu-x86 target.
This patchset is an initial attempt to support ACPI Tables for qemu-x86 target.
Changes in v2:
Dynamic generation of AML code for DSDT table.
Reading PCI registers for FADT table.
Incorporated Simon's review comments.
Signed-off-by: Saket Sinha
---
Makefile | 5 +
arch/x86/Kconfig | 5 +
arch/x86/cpu/qemu/Makefile| 2 +-
arch/x86/cpu/qemu/acpi_table.c| 575 ++
arch/x86/cpu/qemu/cpu-hotplug.asl | 78 ++
arch/x86/cpu/qemu/dbug.asl| 26 ++
arch/x86/cpu/qemu/dsdt.asl| 221 +++
arch/x86/cpu/qemu/hpet.asl| 36 +++
arch/x86/cpu/qemu/pci-crs.asl | 94 +++
arch/x86/include/asm/acpi_table.h | 318 +
arch/x86/include/asm/acpigen.h| 85 ++
arch/x86/lib/tables.c | 5 +
configs/qemu-x86_defconfig| 1 +
13 files changed, 1450 insertions(+), 1 deletion(-)
create mode 100755 arch/x86/cpu/qemu/acpi_table.c
create mode 100644 arch/x86/cpu/qemu/cpu-hotplug.asl
create mode 100644 arch/x86/cpu/qemu/dbug.asl
create mode 100644 arch/x86/cpu/qemu/dsdt.asl
create mode 100644 arch/x86/cpu/qemu/hpet.asl
create mode 100644 arch/x86/cpu/qemu/pci-crs.asl
create mode 100755 arch/x86/include/asm/acpi_table.h
create mode 100755 arch/x86/include/asm/acpigen.h
diff --git a/Makefile b/Makefile
index 0a674bf..94388e6 100644
--- a/Makefile
+++ b/Makefile
@@ -389,6 +389,11 @@ export RCS_TAR_IGNORE := --exclude SCCS --exclude
BitKeeper --exclude .svn \
# ===
# Rules shared between *config targets and build targets
+PHONY += acpi
+acpi:
+ $(Q)iasl -p dsdt -tc arch/x86/cpu/qemu/dsdt.asl
+ $(Q)mv dsdt.hex arch/x86/cpu/qemu/dsdt.c
+
# Basic helpers built in scripts/
PHONY += scripts_basic
scripts_basic:
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 1aeae9d..c44ac07 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -321,6 +321,11 @@ config GENERATE_SFI_TABLE
endmenu
+config GENERATE_ACPI_TABLE
+ bool "Generate ACPI(Advanced Configuration and Power Interface) table"
+ default y
+
+
config MAX_PIRQ_LINKS
int
default 8
diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
index be79723..3a570bb 100644
--- a/arch/x86/cpu/qemu/Makefile
+++ b/arch/x86/cpu/qemu/Makefile
@@ -4,5 +4,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += car.o dram.o qemu.o
+obj-y += car.o dram.o qemu.o dsdt.o acpi_table.o
obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/x86/cpu/qemu/acpi_table.c b/arch/x86/cpu/qemu/acpi_table.c
new file mode 100755
index 000..cefd5f4
--- /dev/null
+++ b/arch/x86/cpu/qemu/acpi_table.c
@@ -0,0 +1,575 @@
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define LOCAL_APIC_ADDR 0xfee
+
+extern const unsigned char AmlCode[];
+
+u8 acpi_checksum(u8 *table, u32 length)
+{
+ u8 ret = 0;
+ while (length--) {
+ ret += *table;
+ table++;
+ }
+ return -ret;
+}
+/**
+ * Add an ACPI table to the RSDT (and XSDT) structure, recalculate length
+ * and checksum.
+ */
+void acpi_add_table(struct acpi_rsdp *rsdp, void *table)
+{
+ int i, entries_num;
+ struct acpi_rsdt *rsdt;
+ struct acpi_xsdt *xsdt = NULL;
+
+ /* The RSDT is mandatory... */
+ rsdt = (struct acpi_rsdt *)rsdp->rsdt_address;
+
+ /* ...while the XSDT is not. */
+ if (rsdp->xsdt_address)
+ xsdt = (struct acpi_xsdt *)((u32)rsdp->xsdt_address);
+
+ /* This should always be MAX_ACPI_TABLES. */
+ entries_num = ARRAY_SIZE(rsdt->entry);
+
+ for (i = 0; i < entries_num; i++) {
+ if (rsdt->entry[i] == 0)
+ break;
+ }
+
+ if (i >= entries_num) {
+ printf("ACPI: Error: Could not add ACPI table, "
+ "too many tables.\n");
+ return;
+ }
+
+ /* Add table to the RSDT. */
+ rsdt->entry[i] = (u32)table;
+
+ /* Fix RSDT length or the kernel will assume invalid entries. */
+ rsdt->header.length = sizeof(acpi_header_t) + (sizeof(u32) * (i + 1));
+
+ /* Re-calculate checksum. */
+ rsdt->header.checksum = 0; /* Hope this won't get optimized away */
+ rsdt->header.checksum = acpi_checksum((u8 *)rsdt, rsdt->header.length);
+
+ /*
+* And now the same thing for the XSDT. We use the same index as for
+* now we want the XSDT and RSDT to always be in sync in coreboot.
+*/
+ if (xsdt) {
+ /* Add table to the XSDT. */
+ xsdt->entry[i] = (u64)(u32)table;
+
+ /* Fix XSDT length. */
+ xsdt->header.length = siz
Re: [U-Boot] Building u-boot.rom for Minnowboard
Hi Bin, >> After applying both the patches, I am able to get the u-boot prompt >> with u-boot.rom . >> Thanks for these wonderful patches. > > This is good news! I believe you can continue your work for the ACPI > support now :) Sure. Thanks a lot for making this possible. Regards, Saket Sinha ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Building u-boot.rom for Minnowboard
Hi Bin, > > I've created two patches to include a D0 stepping microcode for > BayTrail-I. The microcode was generated from the microcode header in > the coreboot source tree. > > The first patch is waiting for the list moderator's approval as it > exceeds the mailing list size. The second patch is at > http://patchwork.ozlabs.org/patch/480673/ > I will send the first patch to you offline. Please have a try. After applying both the patches, I am able to get the u-boot prompt with u-boot.rom . Please find the logs below - U-Boot 2015.07-rc1-20956-g5d3c2c5-dirty (Jun 04 2015 - 19:27:32 +0530) CPU: x86_64, vendor Intel, device 30679h DRAM: 2 GiB MMC: ValleyView SDHCI: 0, ValleyView SDHCI: 1 Using default environment Video: 1280x1024x16 Model: Intel Minnowboard Max SCSI: SATA link 0 timeout. SATA link 1 timeout. AHCI 0001.0300 32 slots 2 ports 3 Gbps 0x3 impl SATA mode flags: 64bit ncq stag pm led clo pio slum part sxs scanning bus for devices... Found 0 device(s). Net: RTL8169#0 Warning: RTL8169#0 using MAC address from net device => Thanks for these wonderful patches. Regards, Saket Sinha ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Building u-boot.rom for Minnowboard
Hi, > I'm 99% sure that's the issue. try with FSP 3 gold." > > I am now trying to build the u-boot.rom from FSP 3 gold and would let > you know about the results ASAP. u-boot.rom prepared from FSP3-Gold dowmloaded from https://downloadcenter.intel.com/download/24496 doesn't work with the minnowmax I have. Regards, Saket Sinha ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Building u-boot.rom for Minnowboard
Hi Simon, >>> I might be able to create an image that prints out post_code() calls. > > I added a debug UART image here: > https://drive.google.com/folderview?id=0B7WYZbZ9zd-3flBfMEk3WHRSclJDWHFxOWlQTlBEUHg3aGM0aUZhLTdMYWVGbm9HNXNYTlU&usp=sharing > The results are identical as that of previous image. I still get no output on serial. Tried flashing the image with both falshrom(Linux) and Dediprog software(Windows). I even began to doubt my serial connection on Linux so switched to Teraterm on Windows but still no output on serial. > Are you able to progress by using qemu in the meantime? Yes. My first approach was to extract the acpi tables from fw_cfg. That is failing for u-boot but works for coreboot. I have discussed this issue with Bin. Now I am trying to write ACPI tables(i.e. builtin ACPI) for qemu-x86. This is case that should be generic and would be hit for minnowmax also. >>> Will wait to hear from John. Just had a word with John.he seems to get identical results as me for both the images that you shared. Would like to quote him - "so my suspicion is that Simon is building the firmware with a slightly older FSP specifically an FSP that doesn't support the newer stepping on the CPU. I just flashed the debug one on an A0 (ancient board obviously) and I get some output. I get nothing on my newer A2 w/ a D0 stepped CPU . All that needs to happen is to use a newer FSP. The board you have I'm pretty sure is an A2 board with a D0 stepping cpu. It's possible that Simon got his board long enough ago that he's got an A1 or A2 with a B3 stepping cpu I.E. that explains why it works for him, and not you. I'm 99% sure that's the issue. try with FSP 3 gold." I am now trying to build the u-boot.rom from FSP 3 gold and would let you know about the results ASAP. Regards, Saket Sinha ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Building u-boot.rom for Minnowboard
Hi Simon, > > Also do you know which MinnowMAX board you have? I think there are two > versions. The pcb does not speak of any particular versions. I found there are two hardware revisions - http://www.elinux.org/Minnowboard:Hardware_Revisions#MinnowMax But I would not be able to tell my minnowmax belongs to which revision without the Multimeter and other stuff which currently I am not possessing. Moreover, the changes are not of the nature to have stopped the u-boot from booting. > > I might be able to create an image that prints out post_code() calls. > That would be a real help. > Will wait to hear from John. > Same here. Regards, Saket Sinha ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Building u-boot.rom for Minnowboard
Hi John, >> Can you punt me a copy of the image so I can try it here >> and double check? >> > Please see below for the drive link. >> >>> >> >>> https://drive.google.com/file/d/0B7WYZbZ9zd-3eDFaNHpFN2JrcUE/view?usp=sharing Are you able to see any output with Simon's u-boot.rom shared above on the serial? Regards, Saket Sinha ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Building u-boot.rom for Minnowboard
Hi John, > Are we assuming a serial port being 11520n8 on ttyS0 (I.E. the same port > we normally use for early serial)? > I access my serial port through "screen /dev/ttyUSB0 115200" using USB to Serial TTL Level cable. When I flash MinnowBoard.MAX.X64.079.R01.bin, I get all the UEFI outputs but with u-boot.rom sent by Simon, I do not get any output with the same setup. >>> Shouldn't be an appreciable differences in the boards, how are you >>> flashing it? I have tried flashing both the u-boot.rom and MinnowBoard.MAX.X64.079.R01.bin with flashrom on Linux and the Dediprog Engineering software on Windows with exactly same results. Regards, Saket Sinha ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Building u-boot.rom for Minnowboard
Hi Simon, >> >> >> >> 5. Now when I am powering Minnowmax and collecting the output on serial >> >> >> Nothing appears. >> >> >> > > It seems to boot OK for me. See details and download link below: > Download u-boot.rom from: > https://drive.google.com/file/d/0B7WYZbZ9zd-3eDFaNHpFN2JrcUE/view?usp=sharing > With this image also, I do not get any output on my serial port(though two blue leds D1 & D2 are lighted up) which I run by "screen /dev/ttyUSB0 115200" using USB to Serial TTL Level sent to me by John. When I flash MinnowBoard.MAX.X64.079.R01.bin instead of the u-boot.rom, I get all the UEFI outputs on the same setup. >> >> >> >> Can you confirm that you have setup the flashrom tool correctly? >> >> As of now I am trying to burn u-boot.rom with SPI programmer/software >> on Windows to check the sanity of my flashrom setup. >> I have tried flashing both the u-boot.rom and MinnowBoard.MAX.X64.079.R01.bin with the Dediprog Engineering software on Windows with exactly same results for both the cases as with flashrom so atleast flashrom setup is correct. Regards, Saket Sinha ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Building u-boot.rom for Minnowboard
Hi Bin, Please find my response inline. >> >> root@saket-HP-PC:# /u-boot-x86/tools/ifdtool -x BayleyBay/SPI.bin >> >> Flash Region 0 (Flash Descriptor): - 0fff >> >> Flash Region 1 (BIOS): 0050 - 007f >> >> Flash Region 2 (Intel ME): 1000 - 004f >> >> Flash Region 3 (GbE): 00fff000 - 0fff (unused) >> >> Error while writing: Bad address >> >> Flash Region 4 (Platform Data): 00fff000 - 0fff (unused) >> >> Error while writing: Bad address >> >> >> >> >> >> a)./tools/ifdtool -x MNW2MAX1.X64.0073.R02.1409160934.bin >> >> From the generted files, copying flashregion_0_flashdescriptor.bin as >> >> board/intel/minnowmax/descriptor.bin >> >> >> >> Though the o/p files are generated, I get the following error after >> >> this command - >> >> root@saket-PC:# /u-boot-x86/tools/ifdtool -x >> >> MNW2MAX1.X64.0073.R02.1409160934.bin >> >> Flash Region 0 (Flash Descriptor): - 0fff >> >> Flash Region 1 (BIOS): 0050 - 007f >> >> Flash Region 2 (Intel ME): 1000 - 004f >> >> Flash Region 3 (GbE): - 0fff >> >> Flash Region 4 (Platform Data): 00fff000 - 0fff (unused) >> >> Error while writing: Bad address >> >> >> >> I've seen this error before. It is a bug of the ifdtool, but I think >> it can be ignored. I have a patch sent out. Please check >> http://patchwork.ozlabs.org/patch/478590/ >> Your patch fixes the Error message but still I do not get any o/p on serial with the resulting u-boot.rom >> >> 4. Flashing u-boot.rom to Minnowmax by desiprog sf100 >> >> ./flashrom -p dediprog -w u-boot.rom >> >> >> >> Can you confirm that you have setup the flashrom tool correctly? I >> don't use flashrom on Linux as I normally do the SPI flash programming >> on a Windows machine. Can you dump the whole SPI flash image back >> after you program the u-boot.rom and compare the dumped file with the >> u-boot.rom you generated to see whether they are exactly the same? >> I only way I have dumped SPI flash has been through flashrom only. How else can I do it on Linux? As of now I am trying to burn u-boot.rom with SPI programmer/software on Windows to check the sanity of my flashrom setup. >> >> 5. Now when I am powering Minnowmax and collecting the output on serial >> >> - >> >> Nothing appears. >> >> >> >> Kindly let me know, if I am missing something here. >> >> >> >> Sorry but I don't have a MinnowMax board here, so cannot try it on my >> side. > > I'm on holiday but should be able to try this on Monday or Tuesday. > Thanks Simon. Regards, Saket Sinha ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Building u-boot.rom for Minnowboard
Hi Simon, I am building u-boot.rom for MinnowboardMax as per the steps mentioned in the README.x86. 1. Downloading BAY_TRAIL_FSP_KIT_GOLD3.tgz a) copying BAYTRAIL_FSP_GOLD_003_16-SEP-2014.fd as board/intel/minnowmax/fsp.bin b) copying Vga.dat as board/intel/minnowmax/vga.bin c) ./tools/ifdtool -x BayleyBay/SPI.bin >From the generted files, copying flashregion_2_intel_me.bin as board/intel/minnowmax/me.bin Though the o/p files are generated, I get the following error after this command - root@saket-HP-PC:# /u-boot-x86/tools/ifdtool -x BayleyBay/SPI.bin Flash Region 0 (Flash Descriptor): - 0fff Flash Region 1 (BIOS): 0050 - 007f Flash Region 2 (Intel ME): 1000 - 004f Flash Region 3 (GbE): 00fff000 - 0fff (unused) Error while writing: Bad address Flash Region 4 (Platform Data): 00fff000 - 0fff (unused) Error while writing: Bad address 2. Downloading 2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip a)./tools/ifdtool -x MNW2MAX1.X64.0073.R02.1409160934.bin >From the generted files, copying flashregion_0_flashdescriptor.bin as board/intel/minnowmax/descriptor.bin Though the o/p files are generated, I get the following error after this command - root@saket-PC:# /u-boot-x86/tools/ifdtool -x MNW2MAX1.X64.0073.R02.1409160934.bin Flash Region 0 (Flash Descriptor): - 0fff Flash Region 1 (BIOS): 0050 - 007f Flash Region 2 (Intel ME): 1000 - 004f Flash Region 3 (GbE): - 0fff Flash Region 4 (Platform Data): 00fff000 - 0fff (unused) Error while writing: Bad address 3. Building u-boot.rom export BUILD_ROM=y make minnowmax_defconfig make all 4. Flashing u-boot.rom to Minnowmax by desiprog sf100 ./flashrom -p dediprog -w u-boot.rom 5. Now when I am powering Minnowmax and collecting the output on serial - Nothing appears. Kindly let me know, if I am missing something here. Regards, Saket Sinha ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] U-boot qemu-x86 :load acpi tables from fw_cfg.
Hi Simon, >> >> Is it possible for us to add support to qemu to provide acpi tables >> via fw_cfg in u-boot ? >> >> If we find acpi tables in fw_cfg try loading them, otherwise fallback >> to the builtin acpi tables. >> >> Coreboot does it in the following way - >> http://review.coreboot.org/#/c/4040/ > > It seems like it might be useful to implement this in U-Boot. Perhaps > look at this after you have the built-in support running? > I guess it would be extremely useful for u-boot. It is being used by q-boot, a new minimal x86 firmware for QEMU. http://lwn.net/Articles/645455/ https://github.com/bonzini/qboot q-boot is able to give a minimal booting time, with the help of fw_cfg, by reading both the kernel and initrd image from fw_cfg. I guess ACPI support for both q-boot and qemu-x86 in u-boot can be implemented on similar lines. Regards, Saket Sinha ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] bringing up u-boot on qemu-x86
Hi Bin, I am one of the students working on adding ACPI support to u-boot for Minnowboard as a part of GSOC-2015. In this endeavor, I have been trying to bring up u-boot on qemu-x86. I request you to guide me as to how this can be done. Regards, Saket Sinha ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
