[U-Boot] [PATCH] armv8: layerscape: Avoid code duplication for TZASC Instantiation
TZASC controller configurations are similar. Put them in a macro and avoid code duplication. Signed-off-by: Priyanka Jain Signed-off-by: Sriram Dash --- arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 62 +++- 1 file changed, 34 insertions(+), 28 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S index c089cee..edbf2a8 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S +++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S @@ -234,39 +234,45 @@ ENTRY(lowlevel_init) * NOTE: As per the CCSR map doc, TZASC 3 and TZASC 4 are just * placeholders. */ -#ifdef CONFIG_FSL_TZASC_1 - ldr x1, =TZASC_GATE_KEEPER(0) - ldr w0, [x1]/* Filter 0 Gate Keeper Register */ - orr w0, w0, #1 << 0 /* Set open_request for Filter 0 */ - str w0, [x1] - ldr x1, =TZASC_REGION_ATTRIBUTES_0(0) - ldr w0, [x1]/* Region-0 Attributes Register */ - orr w0, w0, #1 << 31/* Set Sec global write en, Bit[31] */ - orr w0, w0, #1 << 30/* Set Sec global read en, Bit[30] */ - str w0, [x1] +.macro tzasc_prog, xreg + + mov x12, TZASC1_BASE + mov x16, #0x1 + mul x14, \xreg, x16 + add x14, x14,x12 + mov x1, #0x8 + add x1, x1, x14 + + ldr w0, [x1]/* Filter 0 Gate Keeper Register */ + orr w0, w0, #1 << 0 /* Set open_request for Filter 0 */ + str w0, [x1] + + mov x1, #0x110 + add x1, x1, x14 + + ldr w0, [x1]/* Region-0 Attributes Register */ + orr w0, w0, #1 << 31/* Set Sec global write en, Bit[31] */ + orr w0, w0, #1 << 30/* Set Sec global read en, Bit[30] */ + str w0, [x1] + + mov x1, #0x114 + add x1, x1, x14 + + ldr w0, [x1]/* Region-0 Access Register */ + mov w0, #0x /* Set nsaid_wr_en and nsaid_rd_en */ + str w0, [x1] +.endm + +#ifdef CONFIG_FSL_TZASC_1 + mov x13, #0 + tzasc_prog x13 - ldr x1, =TZASC_REGION_ID_ACCESS_0(0) - ldr w0, [x1]/* Region-0 Access Register */ - mov w0, #0x /* Set nsaid_wr_en and nsaid_rd_en */ - str w0, [x1] #endif #ifdef CONFIG_FSL_TZASC_2 - ldr x1, =TZASC_GATE_KEEPER(1) - ldr w0, [x1]/* Filter 0 Gate Keeper Register */ - orr w0, w0, #1 << 0 /* Set open_request for Filter 0 */ - str w0, [x1] - - ldr x1, =TZASC_REGION_ATTRIBUTES_0(1) - ldr w0, [x1]/* Region-1 Attributes Register */ - orr w0, w0, #1 << 31/* Set Sec global write en, Bit[31] */ - orr w0, w0, #1 << 30/* Set Sec global read en, Bit[30] */ - str w0, [x1] + mov x13, #1 + tzasc_prog x13 - ldr x1, =TZASC_REGION_ID_ACCESS_0(1) - ldr w0, [x1]/* Region-1 Attributes Register */ - mov w0, #0x /* Set nsaid_wr_en and nsaid_rd_en */ - str w0, [x1] #endif isb dsb sy -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] drivers: i2c: mxc: Update SYS_I2C_MXC_I2C support in Kconfig
>From: Sriram Dash >Subject: [PATCH 1/2] drivers: i2c: mxc: Update SYS_I2C_MXC_I2C support in >Kconfig > >NXP layerscape platforms like ls1088a, ls2088a uses MXC I2C Controller. >-Remove dependency of MX6 for the same. > >Update related configs to use Kconfig file. >-Add SYS_I2C_MXC_I2C1,_I2C2,_I2C3,_I2C4 in Kconfig -Add >CONFIG_SYS_MXC_I2C1_SPEED,_I2C2_,_I2C3_,_I2C4_ in Kconfig -Add >CONFIG_SYS_MXC_I2C1_SLAVE,_I2C2_,_I2C3_,_I2C4_ in Kconfig > >Signed-off-by: Sriram Dash >Signed-off-by: Priyanka Jain >--- Hello Stefano, Any updates. > arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 23 > drivers/i2c/Kconfig | 89 +-- > include/configs/ls1012a_common.h | 3 -- > include/configs/ls1043a_common.h | 5 -- > include/configs/ls1046a_common.h | 5 -- > include/configs/ls1088a_common.h | 5 -- > include/configs/ls2080a_common.h | 5 -- > include/configs/ls2080a_emu.h | 3 -- > include/configs/ls2080a_simu.h| 3 -- > 9 files changed, 109 insertions(+), 32 deletions(-) > >diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig >b/arch/arm/cpu/armv8/fsl- >layerscape/Kconfig >index cefbdfe..ebccd16 100644 >--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig >+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig >@@ -12,6 +12,9 @@ config ARCH_LS1012A > select SYS_FSL_ERRATUM_A009008 > select ARCH_EARLY_INIT_R > select BOARD_EARLY_INIT_F >+ select SYS_I2C_MXC >+ select SYS_I2C_MXC_I2C1 >+ select SYS_I2C_MXC_I2C2 > imply PANIC_HANG > > config ARCH_LS1043A >@@ -37,6 +40,11 @@ config ARCH_LS1043A > select SYS_FSL_HAS_DDR4 > select ARCH_EARLY_INIT_R > select BOARD_EARLY_INIT_F >+ select SYS_I2C_MXC >+ select SYS_I2C_MXC_I2C1 >+ select SYS_I2C_MXC_I2C2 >+ select SYS_I2C_MXC_I2C3 >+ select SYS_I2C_MXC_I2C4 > imply SCSI > imply SCSI_AHCI > imply CMD_PCI >@@ -64,6 +72,11 @@ config ARCH_LS1046A > select SYS_FSL_SRDS_2 > select ARCH_EARLY_INIT_R > select BOARD_EARLY_INIT_F >+ select SYS_I2C_MXC >+ select SYS_I2C_MXC_I2C1 >+ select SYS_I2C_MXC_I2C2 >+ select SYS_I2C_MXC_I2C3 >+ select SYS_I2C_MXC_I2C4 > imply SCSI > imply SCSI_AHCI > >@@ -94,6 +107,11 @@ config ARCH_LS1088A > select FSL_TZASC_1 > select ARCH_EARLY_INIT_R > select BOARD_EARLY_INIT_F >+ select SYS_I2C_MXC >+ select SYS_I2C_MXC_I2C1 >+ select SYS_I2C_MXC_I2C2 >+ select SYS_I2C_MXC_I2C3 >+ select SYS_I2C_MXC_I2C4 > imply SCSI > imply PANIC_HANG > >@@ -134,6 +152,11 @@ config ARCH_LS2080A > select SYS_FSL_ERRATUM_A009203 > select ARCH_EARLY_INIT_R > select BOARD_EARLY_INIT_F >+ select SYS_I2C_MXC >+ select SYS_I2C_MXC_I2C1 >+ select SYS_I2C_MXC_I2C2 >+ select SYS_I2C_MXC_I2C3 >+ select SYS_I2C_MXC_I2C4 > imply PANIC_HANG > > config FSL_LSCH2 >diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 17d21bb..7cad493 >100644 >--- a/drivers/i2c/Kconfig >+++ b/drivers/i2c/Kconfig >@@ -149,13 +149,96 @@ config SYS_I2C_MESON > both 7-bit and 10-bit addresses. > > config SYS_I2C_MXC >- bool "NXP i.MX I2C driver" >- depends on MX6 >+ bool "NXP MXC I2C driver" > help >-Add support for the NXP i.MX I2C driver. This supports upto for bus >+Add support for the NXP I2C driver. This supports upto for bus > channels and operating on standard mode upto 100 kbits/s and fast > mode upto 400 kbits/s. > >+if SYS_I2C_MXC >+config SYS_I2C_MXC_I2C1 >+ bool "NXP MXC I2C1" >+ help >+ Add support for NXP MXC I2C Controller 1. >+ Required for SoCs which have I2C MXC controller 1 eg LS1088A, LS2080A >+ >+config SYS_I2C_MXC_I2C2 >+ bool "NXP MXC I2C2" >+ help >+ Add support for NXP MXC I2C Controller 2. >+ Required for SoCs which have I2C MXC controller 2 eg LS1088A, LS2080A >+ >+config SYS_I2C_MXC_I2C3 >+ bool "NXP MXC I2C3" >+ help >+ Add support for NXP MXC I2C Controller 3. >+ Required for SoCs which have I2C MXC controller 3 eg LS1088A, LS2080A >+ >+config SYS_I2C_MXC_I2C4 >+ bool "NXP MXC I2C4" >+ help >+ Add support for NXP MXC I2C Controller 4. >+ Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A >+endif >+ >+if SYS_I2C_MXC_I2C1 >+config SYS_MXC_I2C1_SPEED >+ int "I2C Channel
[U-Boot] [PATCH 2/2] drivers: i2c: mxc: Update support to 8 I2C controllers
Existing driver supports upto 4 I2C controllers.
But some of future NXPs SoCs like lx2160a has
eight I2C controllers.
Update MXC driver to support upto 8 I2C controllers
Signed-off-by: Sriram Dash
Signed-off-by: Priyanka Jain
---
drivers/i2c/Kconfig | 80 +++
drivers/i2c/mxc_i2c.c | 56
2 files changed, 136 insertions(+)
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 7cad493..c863a6e 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -179,6 +179,30 @@ config SYS_I2C_MXC_I2C4
help
Add support for NXP MXC I2C Controller 4.
Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A
+
+config SYS_I2C_MXC_I2C5
+ bool "NXP MXC I2C5"
+ help
+Add support for NXP MXC I2C Controller 5.
+Required for SoCs which have I2C MXC controller 5 eg LX2160A
+
+config SYS_I2C_MXC_I2C6
+ bool "NXP MXC I2C6"
+ help
+Add support for NXP MXC I2C Controller 6.
+Required for SoCs which have I2C MXC controller 6 eg LX2160A
+
+config SYS_I2C_MXC_I2C7
+ bool "NXP MXC I2C7"
+ help
+Add support for NXP MXC I2C Controller 7.
+Required for SoCs which have I2C MXC controller 7 eg LX2160A
+
+config SYS_I2C_MXC_I2C8
+ bool "NXP MXC I2C8"
+ help
+Add support for NXP MXC I2C Controller 8.
+Required for SoCs which have I2C MXC controller 8 eg LX2160A
endif
if SYS_I2C_MXC_I2C1
@@ -239,6 +263,62 @@ config SYS_MXC_I2C4_SLAVE
MXC I2C4 Slave
endif
+if SYS_I2C_MXC_I2C5
+config SYS_MXC_I2C5_SPEED
+ int "I2C Channel 5 speed"
+ default 10
+ help
+MXC I2C Channel 5 speed
+
+config SYS_MXC_I2C5_SLAVE
+ int "I2C5 Slave"
+ default 0
+ help
+MXC I2C5 Slave
+endif
+
+if SYS_I2C_MXC_I2C6
+config SYS_MXC_I2C6_SPEED
+ int "I2C Channel 6 speed"
+ default 10
+ help
+MXC I2C Channel 6 speed
+
+config SYS_MXC_I2C6_SLAVE
+ int "I2C6 Slave"
+ default 0
+ help
+MXC I2C6 Slave
+endif
+
+if SYS_I2C_MXC_I2C7
+config SYS_MXC_I2C7_SPEED
+ int "I2C Channel 7 speed"
+ default 10
+ help
+MXC I2C Channel 7 speed
+
+config SYS_MXC_I2C7_SLAVE
+ int "I2C7 Slave"
+ default 0
+ help
+MXC I2C7 Slave
+endif
+
+if SYS_I2C_MXC_I2C8
+config SYS_MXC_I2C8_SPEED
+ int "I2C Channel 8 speed"
+ default 10
+ help
+MXC I2C Channel 8 speed
+
+config SYS_MXC_I2C8_SLAVE
+ int "I2C8 Slave"
+ default 0
+ help
+MXC I2C8 Slave
+endif
+
config SYS_I2C_OMAP24XX
bool "TI OMAP2+ I2C driver"
depends on ARCH_OMAP2PLUS
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 79228c2..a17c1ec 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -589,6 +589,22 @@ static int bus_i2c_write(struct mxc_i2c_bus *i2c_bus, u8
chip, u32 addr,
#define I2C4_BASE_ADDR 0
#endif
+#if !defined(I2C5_BASE_ADDR)
+#define I2C5_BASE_ADDR 0
+#endif
+
+#if !defined(I2C6_BASE_ADDR)
+#define I2C6_BASE_ADDR 0
+#endif
+
+#if !defined(I2C7_BASE_ADDR)
+#define I2C7_BASE_ADDR 0
+#endif
+
+#if !defined(I2C8_BASE_ADDR)
+#define I2C8_BASE_ADDR 0
+#endif
+
static struct mxc_i2c_bus mxc_i2c_buses[] = {
#if defined(CONFIG_ARCH_LS1021A) || defined(CONFIG_VF610) || \
defined(CONFIG_FSL_LAYERSCAPE)
@@ -596,11 +612,19 @@ static struct mxc_i2c_bus mxc_i2c_buses[] = {
{ 1, I2C2_BASE_ADDR, I2C_QUIRK_FLAG },
{ 2, I2C3_BASE_ADDR, I2C_QUIRK_FLAG },
{ 3, I2C4_BASE_ADDR, I2C_QUIRK_FLAG },
+ { 4, I2C5_BASE_ADDR, I2C_QUIRK_FLAG },
+ { 5, I2C6_BASE_ADDR, I2C_QUIRK_FLAG },
+ { 6, I2C7_BASE_ADDR, I2C_QUIRK_FLAG },
+ { 7, I2C8_BASE_ADDR, I2C_QUIRK_FLAG },
#else
{ 0, I2C1_BASE_ADDR, 0 },
{ 1, I2C2_BASE_ADDR, 0 },
{ 2, I2C3_BASE_ADDR, 0 },
{ 3, I2C4_BASE_ADDR, 0 },
+ { 4, I2C5_BASE_ADDR, 0 },
+ { 5, I2C6_BASE_ADDR, 0 },
+ { 6, I2C7_BASE_ADDR, 0 },
+ { 7, I2C8_BASE_ADDR, 0 },
#endif
};
@@ -738,6 +762,38 @@ U_BOOT_I2C_ADAP_COMPLETE(mxc3, mxc_i2c_init, mxc_i2c_probe,
CONFIG_SYS_MXC_I2C4_SLAVE, 3)
#endif
+#ifdef CONFIG_SYS_I2C_MXC_I2C5
+U_BOOT_I2C_ADAP_COMPLETE(mxc4, mxc_i2c_init, mxc_i2c_probe,
+mxc_i2c_read, mxc_i2c_write,
+mxc_i2c_set_bus_speed,
+CONFIG_SYS_MXC_I2C5_SPEED,
+CONFIG_SYS_MXC_I2C5_SLAVE, 4)
+#endif
+
+#ifdef CONFIG_SYS_I2C_MXC_I2C6
+U_BOOT_I2C_ADAP_COMPLETE(mxc5, mxc_i2c_init, mxc_i2c_probe,
+mxc_i2c_read, mxc_i2c_write,
+mxc_i2c_set_bus_speed,
+CONFIG_SYS_MXC_I2C6_SPEE
[U-Boot] [PATCH 1/2] drivers: i2c: mxc: Update SYS_I2C_MXC_I2C support in Kconfig
NXP layerscape platforms like ls1088a, ls2088a uses MXC I2C Controller. -Remove dependency of MX6 for the same. Update related configs to use Kconfig file. -Add SYS_I2C_MXC_I2C1,_I2C2,_I2C3,_I2C4 in Kconfig -Add CONFIG_SYS_MXC_I2C1_SPEED,_I2C2_,_I2C3_,_I2C4_ in Kconfig -Add CONFIG_SYS_MXC_I2C1_SLAVE,_I2C2_,_I2C3_,_I2C4_ in Kconfig Signed-off-by: Sriram Dash Signed-off-by: Priyanka Jain --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 23 drivers/i2c/Kconfig | 89 +-- include/configs/ls1012a_common.h | 3 -- include/configs/ls1043a_common.h | 5 -- include/configs/ls1046a_common.h | 5 -- include/configs/ls1088a_common.h | 5 -- include/configs/ls2080a_common.h | 5 -- include/configs/ls2080a_emu.h | 3 -- include/configs/ls2080a_simu.h| 3 -- 9 files changed, 109 insertions(+), 32 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index cefbdfe..ebccd16 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -12,6 +12,9 @@ config ARCH_LS1012A select SYS_FSL_ERRATUM_A009008 select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F + select SYS_I2C_MXC + select SYS_I2C_MXC_I2C1 + select SYS_I2C_MXC_I2C2 imply PANIC_HANG config ARCH_LS1043A @@ -37,6 +40,11 @@ config ARCH_LS1043A select SYS_FSL_HAS_DDR4 select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F + select SYS_I2C_MXC + select SYS_I2C_MXC_I2C1 + select SYS_I2C_MXC_I2C2 + select SYS_I2C_MXC_I2C3 + select SYS_I2C_MXC_I2C4 imply SCSI imply SCSI_AHCI imply CMD_PCI @@ -64,6 +72,11 @@ config ARCH_LS1046A select SYS_FSL_SRDS_2 select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F + select SYS_I2C_MXC + select SYS_I2C_MXC_I2C1 + select SYS_I2C_MXC_I2C2 + select SYS_I2C_MXC_I2C3 + select SYS_I2C_MXC_I2C4 imply SCSI imply SCSI_AHCI @@ -94,6 +107,11 @@ config ARCH_LS1088A select FSL_TZASC_1 select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F + select SYS_I2C_MXC + select SYS_I2C_MXC_I2C1 + select SYS_I2C_MXC_I2C2 + select SYS_I2C_MXC_I2C3 + select SYS_I2C_MXC_I2C4 imply SCSI imply PANIC_HANG @@ -134,6 +152,11 @@ config ARCH_LS2080A select SYS_FSL_ERRATUM_A009203 select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F + select SYS_I2C_MXC + select SYS_I2C_MXC_I2C1 + select SYS_I2C_MXC_I2C2 + select SYS_I2C_MXC_I2C3 + select SYS_I2C_MXC_I2C4 imply PANIC_HANG config FSL_LSCH2 diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 17d21bb..7cad493 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -149,13 +149,96 @@ config SYS_I2C_MESON both 7-bit and 10-bit addresses. config SYS_I2C_MXC - bool "NXP i.MX I2C driver" - depends on MX6 + bool "NXP MXC I2C driver" help - Add support for the NXP i.MX I2C driver. This supports upto for bus + Add support for the NXP I2C driver. This supports upto for bus channels and operating on standard mode upto 100 kbits/s and fast mode upto 400 kbits/s. +if SYS_I2C_MXC +config SYS_I2C_MXC_I2C1 + bool "NXP MXC I2C1" + help +Add support for NXP MXC I2C Controller 1. +Required for SoCs which have I2C MXC controller 1 eg LS1088A, LS2080A + +config SYS_I2C_MXC_I2C2 + bool "NXP MXC I2C2" + help +Add support for NXP MXC I2C Controller 2. +Required for SoCs which have I2C MXC controller 2 eg LS1088A, LS2080A + +config SYS_I2C_MXC_I2C3 + bool "NXP MXC I2C3" + help +Add support for NXP MXC I2C Controller 3. +Required for SoCs which have I2C MXC controller 3 eg LS1088A, LS2080A + +config SYS_I2C_MXC_I2C4 + bool "NXP MXC I2C4" + help +Add support for NXP MXC I2C Controller 4. +Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A +endif + +if SYS_I2C_MXC_I2C1 +config SYS_MXC_I2C1_SPEED + int "I2C Channel 1 speed" + default 4000 if TARGET_LS2080A_SIMU || TARGET_LS2080A_EMU + default 10 + help +MXC I2C Channel 1 speed + +config SYS_MXC_I2C1_SLAVE + int "I2C1 Slave" + default 0 + help +MXC I2C1 Slave +endif + +if SYS_I2C_MXC_I2C2 +config SYS_MXC_I2C2_SPEED + int "I2C Channel 2 speed" + default 4000 if TARGET_LS2080A_SIMU || TARGET_LS2080A_EMU + default 10 + help +MXC I2C Channel 2 speed + +config SYS_MXC_I2C2_SLAVE + int "I2C2 Slave" + default 0 +
[U-Boot] [PATCH v3] armv8: Remove dependency of SERDES for LSCH2 and LSCH3
Remove dependency of SYS_HAS_SERDES for Layerscape Chasis 3/2. Signed-off-by: Sriram Dash --- Changes in v3: - Rebase to latest code. - Include changes for LSCH2. Changes in v2: - Remove ifdef when including fsl_serdes.h arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 14 ++ 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index cefbdfe..7b59dc9 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -3,6 +3,8 @@ config ARCH_LS1012A select ARMV8_SET_SMPEN select ARM_ERRATA_855873 select FSL_LSCH2 + select SYS_FSL_SRDS_1 + select SYS_HAS_SERDES select SYS_FSL_DDR_BE select SYS_FSL_MMDC select SYS_FSL_ERRATUM_A010315 @@ -19,6 +21,8 @@ config ARCH_LS1043A select ARMV8_SET_SMPEN select ARM_ERRATA_855873 select FSL_LSCH2 + select SYS_FSL_SRDS_1 + select SYS_HAS_SERDES select SYS_FSL_DDR select SYS_FSL_DDR_BE select SYS_FSL_DDR_VER_50 @@ -45,6 +49,8 @@ config ARCH_LS1046A bool select ARMV8_SET_SMPEN select FSL_LSCH2 + select SYS_FSL_SRDS_1 + select SYS_HAS_SERDES select SYS_FSL_DDR select SYS_FSL_DDR_BE select SYS_FSL_DDR_VER_50 @@ -72,6 +78,8 @@ config ARCH_LS1088A select ARMV8_SET_SMPEN select ARM_ERRATA_855873 select FSL_LSCH3 + select SYS_FSL_SRDS_1 + select SYS_HAS_SERDES select SYS_FSL_DDR select SYS_FSL_DDR_LE select SYS_FSL_DDR_VER_50 @@ -105,6 +113,8 @@ config ARCH_LS2080A select ARM_ERRATA_829520 select ARM_ERRATA_833471 select FSL_LSCH3 + select SYS_FSL_SRDS_1 + select SYS_HAS_SERDES select SYS_FSL_DDR select SYS_FSL_DDR_LE select SYS_FSL_DDR_VER_50 @@ -142,13 +152,9 @@ config FSL_LSCH2 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_COMPAT_5 select SYS_FSL_SEC_BE - select SYS_FSL_SRDS_1 - select SYS_HAS_SERDES config FSL_LSCH3 bool - select SYS_FSL_SRDS_1 - select SYS_HAS_SERDES config FSL_MC_ENET bool "Management Complex network" -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2] armv8: Remove dependency of SERDES for LS CHASIS3
>From: York Sun >Subject: Re: [PATCH v2] armv8: Remove dependency of SERDES for LS CHASIS3 > >On 01/10/2018 01:15 AM, Sriram Dash wrote: >> Remove dependency of SYS_HAS_SERDES for Layerscape Chasis 3. >> >> Signed-off-by: Sriram Dash >> --- >> Changes in v2: >> - Remove ifdef when including fsl_serdes.h >> >> arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 6 -- >> 1 file changed, 4 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig >> b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig >> index 6c03dfb..0aa0673 100644 >> --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig >> +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig >> @@ -69,6 +69,8 @@ config ARCH_LS1088A >> bool >> select ARMV8_SET_SMPEN >> select FSL_LSCH3 >> +select SYS_FSL_SRDS_1 >> +select SYS_HAS_SERDES >> select SYS_FSL_DDR >> select SYS_FSL_DDR_LE >> select SYS_FSL_DDR_VER_50 >> @@ -102,6 +104,8 @@ config ARCH_LS2080A >> select ARM_ERRATA_829520 >> select ARM_ERRATA_833471 >> select FSL_LSCH3 >> +select SYS_FSL_SRDS_1 >> +select SYS_HAS_SERDES >> select SYS_FSL_DDR >> select SYS_FSL_DDR_LE >> select SYS_FSL_DDR_VER_50 >> @@ -144,8 +148,6 @@ config FSL_LSCH2 >> >> config FSL_LSCH3 >> bool >> -select SYS_FSL_SRDS_1 >> -select SYS_HAS_SERDES >> >> config FSL_MC_ENET >> bool "Management Complex network" >> > >This patch is simple but your base seems to be different. Please rebase and >check >LSCH2 SoCs. > OK. Will rebase to latest Uboot and will include these changes for LSCH2 Socs also. >York ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2] armv8: Remove dependency of SERDES for LS CHASIS3
Remove dependency of SYS_HAS_SERDES for Layerscape Chasis 3. Signed-off-by: Sriram Dash --- Changes in v2: - Remove ifdef when including fsl_serdes.h arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 6c03dfb..0aa0673 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -69,6 +69,8 @@ config ARCH_LS1088A bool select ARMV8_SET_SMPEN select FSL_LSCH3 + select SYS_FSL_SRDS_1 + select SYS_HAS_SERDES select SYS_FSL_DDR select SYS_FSL_DDR_LE select SYS_FSL_DDR_VER_50 @@ -102,6 +104,8 @@ config ARCH_LS2080A select ARM_ERRATA_829520 select ARM_ERRATA_833471 select FSL_LSCH3 + select SYS_FSL_SRDS_1 + select SYS_HAS_SERDES select SYS_FSL_DDR select SYS_FSL_DDR_LE select SYS_FSL_DDR_VER_50 @@ -144,8 +148,6 @@ config FSL_LSCH2 config FSL_LSCH3 bool - select SYS_FSL_SRDS_1 - select SYS_HAS_SERDES config FSL_MC_ENET bool "Management Complex network" -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] serial: lpuart: Proper device identification
Identify and distinguish between platform device type of MX7ULP
and LS1021A.
This is a fix to: 7edf5c45 serial: lpuart: add i.MX7ULP support
Signed-off-by: Sriram Dash
Acked-by: Peng Fan
---
drivers/serial/serial_lpuart.c | 18 +++---
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index 382f8ba..536d30f 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -265,11 +265,9 @@ static int _lpuart32_serial_getc(struct
lpuart_serial_platdata *plat)
lpuart_read32(plat->flags, &base->data, &val);
- if (plat->devtype & DEV_MX7ULP) {
- lpuart_read32(plat->flags, &base->stat, &stat);
- if (stat & STAT_OR)
- lpuart_write32(plat->flags, &base->stat, STAT_OR);
- }
+ lpuart_read32(plat->flags, &base->stat, &stat);
+ if (stat & STAT_OR)
+ lpuart_write32(plat->flags, &base->stat, STAT_OR);
return val & 0x3ff;
}
@@ -280,10 +278,8 @@ static void _lpuart32_serial_putc(struct
lpuart_serial_platdata *plat,
struct lpuart_fsl_reg32 *base = plat->reg;
u32 stat;
- if (plat->devtype & DEV_MX7ULP) {
- if (c == '\n')
- serial_putc('\r');
- }
+ if (c == '\n')
+ serial_putc('\r');
while (true) {
lpuart_read32(plat->flags, &base->stat, &stat);
@@ -330,7 +326,7 @@ static int _lpuart32_serial_init(struct
lpuart_serial_platdata *plat)
lpuart_write32(plat->flags, &base->match, 0);
- if (plat->devtype & DEV_MX7ULP) {
+ if (plat->devtype == DEV_MX7ULP) {
_lpuart32_serial_setbrg_7ulp(plat, gd->baudrate);
} else {
/* provide data bits, parity, stop bit, etc */
@@ -347,7 +343,7 @@ static int lpuart_serial_setbrg(struct udevice *dev, int
baudrate)
struct lpuart_serial_platdata *plat = dev->platdata;
if (is_lpuart32(dev)) {
- if (plat->devtype & DEV_MX7ULP)
+ if (plat->devtype == DEV_MX7ULP)
_lpuart32_serial_setbrg_7ulp(plat, baudrate);
else
_lpuart32_serial_setbrg(plat, baudrate);
--
1.9.1
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Re: [U-Boot] [PATCH] armv8: Remove dependency of SERDES for LS CHASIS3
>From: York Sun >Subject: Re: [PATCH] armv8: Remove dependency of SERDES for LS CHASIS3 > >On 09/04/2017 03:14 AM, Sriram Dash wrote: >> Remove dependency of SYS_HAS_SERDES for Layerscape Chasis 3. >> >> Signed-off-by: Sriram Dash >> --- >> arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 4 ++-- >> arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 2 ++ >> arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 ++ >> 3 files changed, 6 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig >> b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig >> index cdeef26..355f8bb 100644 >> --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig >> +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig >> @@ -58,6 +58,8 @@ config ARCH_LS2080A >> select ARM_ERRATA_829520 >> select ARM_ERRATA_833471 >> select FSL_LSCH3 >> +select SYS_FSL_SRDS_1 >> +select SYS_HAS_SERDES >> select SYS_FSL_DDR >> select SYS_FSL_DDR_LE >> select SYS_FSL_DDR_VER_50 >> @@ -93,8 +95,6 @@ config FSL_LSCH2 >> >> config FSL_LSCH3 >> bool >> -select SYS_FSL_SRDS_1 >> -select SYS_HAS_SERDES >> >> config FSL_MC_ENET >> bool "Management Complex network" >> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c >> b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c >> index c6fede3..3ce2ffc 100644 >> --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c >> +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c >> @@ -12,7 +12,9 @@ >> #include >> #include >> #include >> +#ifdef CONFIG_SYS_HAS_SERDES >> #include >> +#endif > >Do not use ifdef here. Instead, fix fsl_serdes.h for proper include. >CONFIG_SYS_HAS_SERDES is already being check there. You can adjust it if >needed. > Sure. This will be better. I will make necessary changes in the next rev. >York ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] armv8: fsl: i2c: Put I2C related code under CONFIG_SYS_I2C
I2C code is put under CONFIG_SYS_I2C
Signed-off-by: Sriram Dash
---
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 639e9d2..66afcea 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -155,8 +155,8 @@ static void erratum_rcw_src(void)
#ifdef CONFIG_SYS_FSL_ERRATUM_A009203
static void erratum_a009203(void)
{
- u8 __iomem *ptr;
#ifdef CONFIG_SYS_I2C
+ u8 __iomem *ptr;
#ifdef I2C1_BASE_ADDR
ptr = (u8 __iomem *)(I2C1_BASE_ADDR + I2C_DEBUG_REG);
--
1.9.1
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[U-Boot] [PATCH] armv8: fsl: ifc: Put IFC related code under CONFIG_FSL_IFC
IFC code is put under CONFIG_FSL_IFC
Signed-off-by: Sriram Dash
---
arch/arm/cpu/armv8/fsl-layerscape/soc.c| 2 ++
arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 10 ++
2 files changed, 12 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 639e9d2..a538d76 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -192,7 +192,9 @@ void bypass_smmu(void)
void fsl_lsch3_early_init_f(void)
{
erratum_rcw_src();
+#ifdef CONFIG_FSL_IFC
init_early_memctl_regs(); /* tighten IFC timing */
+#endif
#ifdef CONFIG_SYS_FSL_ERRATUM_A009203
erratum_a009203();
#endif
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
index c4e5ecc..f231688 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
@@ -102,6 +102,7 @@ static struct mm_region early_map[] = {
{ CONFIG_SYS_FSL_QSPI_BASE1, CONFIG_SYS_FSL_QSPI_BASE1,
CONFIG_SYS_FSL_QSPI_SIZE1,
PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_NON_SHARE},
+#ifdef CONFIG_FSL_IFC
/* For IFC Region #1, only the first 4MB is cache-enabled */
{ CONFIG_SYS_FSL_IFC_BASE1, CONFIG_SYS_FSL_IFC_BASE1,
CONFIG_SYS_FSL_IFC_SIZE1_1,
@@ -116,6 +117,7 @@ static struct mm_region early_map[] = {
CONFIG_SYS_FSL_IFC_SIZE1,
PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE
},
+#endif
{ CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1,
CONFIG_SYS_FSL_DRAM_SIZE1,
#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
@@ -125,11 +127,13 @@ static struct mm_region early_map[] = {
#endif
PTE_BLOCK_OUTER_SHARE | PTE_BLOCK_NS
},
+#ifdef CONFIG_FSL_IFC
/* Map IFC region #2 up to CONFIG_SYS_FLASH_BASE for NAND boot */
{ CONFIG_SYS_FSL_IFC_BASE2, CONFIG_SYS_FSL_IFC_BASE2,
CONFIG_SYS_FLASH_BASE - CONFIG_SYS_FSL_IFC_BASE2,
PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE
},
+#endif
{ CONFIG_SYS_FSL_DCSR_BASE, CONFIG_SYS_FSL_DCSR_BASE,
CONFIG_SYS_FSL_DCSR_SIZE,
PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
@@ -159,10 +163,12 @@ static struct mm_region early_map[] = {
CONFIG_SYS_FSL_QSPI_SIZE,
PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE
},
+#ifdef CONFIG_FSL_IFC
{ CONFIG_SYS_FSL_IFC_BASE, CONFIG_SYS_FSL_IFC_BASE,
CONFIG_SYS_FSL_IFC_SIZE,
PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE
},
+#endif
{ CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1,
CONFIG_SYS_FSL_DRAM_SIZE1,
#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
@@ -206,10 +212,12 @@ static struct mm_region final_map[] = {
PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN
},
+#ifdef CONFIG_FSL_IFC
{ CONFIG_SYS_FSL_IFC_BASE2, CONFIG_SYS_FSL_IFC_BASE2,
CONFIG_SYS_FSL_IFC_SIZE2,
PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE
},
+#endif
{ CONFIG_SYS_FSL_DCSR_BASE, CONFIG_SYS_FSL_DCSR_BASE,
CONFIG_SYS_FSL_DCSR_SIZE,
PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
@@ -304,10 +312,12 @@ static struct mm_region final_map[] = {
PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN
},
+#ifdef CONFIG_FSL_IFC
{ CONFIG_SYS_FSL_IFC_BASE, CONFIG_SYS_FSL_IFC_BASE,
CONFIG_SYS_FSL_IFC_SIZE,
PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE
},
+#endif
{ CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1,
CONFIG_SYS_FSL_DRAM_SIZE1,
PTE_BLOCK_MEMTYPE(MT_NORMAL) |
--
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[U-Boot] [PATCH] armv8: Remove dependency of SERDES for LS CHASIS3
Remove dependency of SYS_HAS_SERDES for Layerscape Chasis 3. Signed-off-by: Sriram Dash --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 4 ++-- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 2 ++ arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 ++ 3 files changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index cdeef26..355f8bb 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -58,6 +58,8 @@ config ARCH_LS2080A select ARM_ERRATA_829520 select ARM_ERRATA_833471 select FSL_LSCH3 + select SYS_FSL_SRDS_1 + select SYS_HAS_SERDES select SYS_FSL_DDR select SYS_FSL_DDR_LE select SYS_FSL_DDR_VER_50 @@ -93,8 +95,6 @@ config FSL_LSCH2 config FSL_LSCH3 bool - select SYS_FSL_SRDS_1 - select SYS_HAS_SERDES config FSL_MC_ENET bool "Management Complex network" diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index c6fede3..3ce2ffc 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -12,7 +12,9 @@ #include #include #include +#ifdef CONFIG_SYS_HAS_SERDES #include +#endif #include #include #include diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 639e9d2..72acb45 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -8,7 +8,9 @@ #include #include #include +#ifdef CONFIG_SYS_HAS_SERDES #include +#endif #include #include #include -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3] drivers: usb: fsl-dt-fixup: Fix the dt for multiple USB nodes in single traversal of device tree
>From: Marek Vasut [mailto:ma...@denx.de]
>On 10/27/2016 08:56 AM, Sriram Dash wrote:
>> For FSL USB node fixup, the dt is walked multiple times for fixing
>> erratum and phy type. This patch walks the tree and fixes the node
>> till no more USB nodes are left.
>>
>> Signed-off-by: Sriram Dash
>> ---
>> Depends on the following patch:
>> https://patchwork.ozlabs.org/patch/682139/
>>
>> Changes in v3:
>> - Remove ENOSPC.
>> - Create a table of USB erratum, to be used to fix dt.
>>
>> Changes in v2:
>> - Modify patch description and title
>> - Remove counting the dt nodes
>>
>> drivers/usb/common/fsl-dt-fixup.c | 209
>> --
>> 1 file changed, 109 insertions(+), 100 deletions(-)
>>
>> diff --git a/drivers/usb/common/fsl-dt-fixup.c
>> b/drivers/usb/common/fsl-dt-fixup.c
>> index 63a24f7..addeb8c 100644
>> --- a/drivers/usb/common/fsl-dt-fixup.c
>> +++ b/drivers/usb/common/fsl-dt-fixup.c
>> @@ -16,10 +16,6 @@
>> #include
>> #include
>>
>> -#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT -#define
>> CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#endif
>> -
>> /* USB Controllers */
>> #define FSL_USB2_MPH"fsl-usb2-mph"
>> #define FSL_USB2_DR "fsl-usb2-dr"
>> @@ -33,6 +29,52 @@ static const char * const compat_usb_fsl[] = {
>> NULL
>> };
>>
>> +enum usb_node_type {
>> +USB2_MPH = 0,
>> +USB2_DR,
>> +SNPS,
>> +USB_COMPAT_END
>> +};
>> +
>> +enum fdt_fsl_usb_erratum {
>> +A006261,
>> +A007075,
>> +A007792,
>> +A005697,
>> +A008751,
>> +FSL_USB_ERRATUM_END
>
>The compiler can assign completely arbitrary numbers to the enum elements.
>Moreover, you don't need this "terminating entry" anyway, see below.
>
I will be using 3 linear arrays for mph, dr and snps erratum and selecting
the array to fix with node type(fdt_node_check_compatible).
So, enum will not be required now.
>> +};
>> +
>> +struct fsl_dt_usb_erratum {
>> +bool (*has_fsl_usb_erratum)(void);
>> +char *dt_set_prop;
>> +};
>> +
>> +struct fsl_dt_usb_erratum
>> +erratum_tlb[USB_COMPAT_END][FSL_USB_ERRATUM_END] = { /*MPH
>Erratum
>> +*/
>> +[USB2_MPH][A006261] = {&has_erratum_a006261,
>> + "fsl,usb-erratum-a006261"},
>> +[USB2_MPH][A007075] = {&has_erratum_a007075,
>> + "fsl,usb-erratum-a007075"},
>> +[USB2_MPH][A007792] = {&has_erratum_a007792,
>> + "fsl,usb-erratum-a007792"},
>> +[USB2_MPH][A005697] = {&has_erratum_a005697,
>> + "fsl,usb-erratum-a005697"}, /*DR Erratum */
>> +[USB2_DR][A006261] = {&has_erratum_a006261,
>> + "fsl,usb-erratum-a006261"},
>> +[USB2_DR][A007075] = {&has_erratum_a007075,
>> + "fsl,usb-erratum-a007075"},
>> +[USB2_DR][A007792] = {&has_erratum_a007792,
>> + "fsl,usb-erratum-a007792"},
>> +[USB2_DR][A005697] = {&has_erratum_a005697,
>> + "fsl,usb-erratum-a005697"},
>> +/*SNPS Erratum */
>> +[SNPS][A008751] = {&has_erratum_a008751,
>> + "fsl,usb-erratum-a008751"},
>
>Please just split this into three arrays.
>
Ok. Will split the erratum_tlb into 3 linear arrays, namely
erratum_mph, erratum_dr, erratum_snps, with the respective
has_erratum and strings. Then, select the appropriate array
according to the node_type, via fdt_node_check_compatible().
>> +};
>> +
>> static int fdt_usb_get_node_type(void *blob, int start_offset,
>> int *node_offset, const char **node_type) { @@
>-54,25 +96,19 @@
>> static int fdt_usb_get_node_type(void *blob, int start_offset, }
>>
>> static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
>> - const char *phy_type, int start_offset)
>> + const char *phy_type, int node_offset,
>> + const char **node_type)
>> {
>> const char *prop_mode = "dr_mode";
>> const char *prop_type = "phy_type";
>> -const char *node_type = NULL;
>> -int node_offset;
>> -int err;
>> -
>> -err
[U-Boot] [PATCH v3] drivers: usb: fsl-dt-fixup: Fix the dt for multiple USB nodes in single traversal of device tree
For FSL USB node fixup, the dt is walked multiple times for
fixing erratum and phy type. This patch walks the tree and
fixes the node till no more USB nodes are left.
Signed-off-by: Sriram Dash
---
Depends on the following patch:
https://patchwork.ozlabs.org/patch/682139/
Changes in v3:
- Remove ENOSPC.
- Create a table of USB erratum, to be used to fix dt.
Changes in v2:
- Modify patch description and title
- Remove counting the dt nodes
drivers/usb/common/fsl-dt-fixup.c | 209 --
1 file changed, 109 insertions(+), 100 deletions(-)
diff --git a/drivers/usb/common/fsl-dt-fixup.c
b/drivers/usb/common/fsl-dt-fixup.c
index 63a24f7..addeb8c 100644
--- a/drivers/usb/common/fsl-dt-fixup.c
+++ b/drivers/usb/common/fsl-dt-fixup.c
@@ -16,10 +16,6 @@
#include
#include
-#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#endif
-
/* USB Controllers */
#define FSL_USB2_MPH "fsl-usb2-mph"
#define FSL_USB2_DR"fsl-usb2-dr"
@@ -33,6 +29,52 @@ static const char * const compat_usb_fsl[] = {
NULL
};
+enum usb_node_type {
+ USB2_MPH = 0,
+ USB2_DR,
+ SNPS,
+ USB_COMPAT_END
+};
+
+enum fdt_fsl_usb_erratum {
+ A006261,
+ A007075,
+ A007792,
+ A005697,
+ A008751,
+ FSL_USB_ERRATUM_END
+};
+
+struct fsl_dt_usb_erratum {
+ bool (*has_fsl_usb_erratum)(void);
+ char *dt_set_prop;
+};
+
+struct fsl_dt_usb_erratum
+ erratum_tlb[USB_COMPAT_END][FSL_USB_ERRATUM_END] = {
+/*MPH Erratum */
+ [USB2_MPH][A006261] = {&has_erratum_a006261,
+ "fsl,usb-erratum-a006261"},
+ [USB2_MPH][A007075] = {&has_erratum_a007075,
+ "fsl,usb-erratum-a007075"},
+ [USB2_MPH][A007792] = {&has_erratum_a007792,
+ "fsl,usb-erratum-a007792"},
+ [USB2_MPH][A005697] = {&has_erratum_a005697,
+ "fsl,usb-erratum-a005697"},
+/*DR Erratum */
+ [USB2_DR][A006261] = {&has_erratum_a006261,
+ "fsl,usb-erratum-a006261"},
+ [USB2_DR][A007075] = {&has_erratum_a007075,
+ "fsl,usb-erratum-a007075"},
+ [USB2_DR][A007792] = {&has_erratum_a007792,
+ "fsl,usb-erratum-a007792"},
+ [USB2_DR][A005697] = {&has_erratum_a005697,
+ "fsl,usb-erratum-a005697"},
+/*SNPS Erratum */
+ [SNPS][A008751] = {&has_erratum_a008751,
+ "fsl,usb-erratum-a008751"},
+};
+
static int fdt_usb_get_node_type(void *blob, int start_offset,
int *node_offset, const char **node_type)
{
@@ -54,25 +96,19 @@ static int fdt_usb_get_node_type(void *blob, int
start_offset,
}
static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
- const char *phy_type, int start_offset)
+ const char *phy_type, int node_offset,
+ const char **node_type)
{
const char *prop_mode = "dr_mode";
const char *prop_type = "phy_type";
- const char *node_type = NULL;
- int node_offset;
- int err;
-
- err = fdt_usb_get_node_type(blob, start_offset,
- &node_offset, &node_type);
- if (err < 0)
- return err;
+ int err = 0;
if (mode) {
err = fdt_setprop(blob, node_offset, prop_mode, mode,
strlen(mode) + 1);
if (err < 0)
printf("WARNING: could not set %s for %s: %s.\n",
- prop_mode, node_type, fdt_strerror(err));
+ prop_mode, *node_type, fdt_strerror(err));
}
if (phy_type) {
@@ -80,79 +116,77 @@ static int fdt_fixup_usb_mode_phy_type(void *blob, const
char *mode,
strlen(phy_type) + 1);
if (err < 0)
printf("WARNING: could not set %s for %s: %s.\n",
- prop_type, node_type, fdt_strerror(err));
+ prop_type, *node_type, fdt_strerror(err));
}
- return node_offset;
+ return err;
}
-static int fsl_fdt_fixup_usb_erratum(void *blob, const char *prop_erratum,
-const char *controller_type,
-int start_offset)
+static int fsl_fdt_fixup_usb_erratum(int node_offset, void *blob,
+int dt_node_type)
{
- int node_offset, err;
- const char *node_type = NULL;
- const char *node_
Re: [U-Boot] [PATCH] powerpc: mpc512x: Add support for get_svr() for mpc512x devices
>From: Bin Meng [mailto:bmeng...@gmail.com] >On Fri, Oct 14, 2016 at 1:49 PM, Sriram Dash wrote: >> Defines get_svr() for mpc512x devices >> >> Signed-off-by: Sriram Dash >> --- >> arch/powerpc/cpu/mpc512x/start.S | 5 + >> 1 file changed, 5 insertions(+) >> >> diff --git a/arch/powerpc/cpu/mpc512x/start.S >b/arch/powerpc/cpu/mpc512x/start.S >> index 471d401..2507842 100644 >> --- a/arch/powerpc/cpu/mpc512x/start.S >> +++ b/arch/powerpc/cpu/mpc512x/start.S >> @@ -443,6 +443,11 @@ get_pvr: >> mfspr r3, PVR >> blr >> >> + .globl get_svr >> +get_svr: >> + mfspr r3,SVR > >nits: need a space after , > Ok. Will take care in next version. >> + blr >> + > >Other than that, >Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] powerpc: mpc512x: Add support for get_svr() for mpc512x devices
Defines get_svr() for mpc512x devices Signed-off-by: Sriram Dash Reviewed-by: Bin Meng --- Changes in v2: - cosmetic changes arch/powerpc/cpu/mpc512x/start.S | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/powerpc/cpu/mpc512x/start.S b/arch/powerpc/cpu/mpc512x/start.S index 471d401..dd3066e 100644 --- a/arch/powerpc/cpu/mpc512x/start.S +++ b/arch/powerpc/cpu/mpc512x/start.S @@ -443,6 +443,11 @@ get_pvr: mfspr r3, PVR blr + .globl get_svr +get_svr: + mfspr r3, SVR + blr + /*---*/ /* -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc: mpc512x: Add support for get_svr() for mpc512x devices
Defines get_svr() for mpc512x devices Signed-off-by: Sriram Dash --- arch/powerpc/cpu/mpc512x/start.S | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/powerpc/cpu/mpc512x/start.S b/arch/powerpc/cpu/mpc512x/start.S index 471d401..2507842 100644 --- a/arch/powerpc/cpu/mpc512x/start.S +++ b/arch/powerpc/cpu/mpc512x/start.S @@ -443,6 +443,11 @@ get_pvr: mfspr r3, PVR blr + .globl get_svr +get_svr: + mfspr r3,SVR + blr + /*---*/ /* -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 0/3] Enable DM support for USB in LS2080
Add the device tree support for LS2080RDB nand boot. Enable the CONFIG_DM_USB in defconfigs and add the usb node in dts for LS2080. Sriram Dash (3): armv8: LS2080A: Add device tree support for nand boot armv8: ls2080: Enable CONFIG_DM_USB in defconfigs armv8: ls2080: Add USB node in dts for ls2080 arch/arm/dts/fsl-ls2080a.dtsi| 14 ++ configs/ls2080aqds_SECURE_BOOT_defconfig | 1 + configs/ls2080aqds_defconfig | 1 + configs/ls2080aqds_nand_defconfig| 1 + configs/ls2080aqds_qspi_defconfig| 1 + configs/ls2080ardb_SECURE_BOOT_defconfig | 1 + configs/ls2080ardb_defconfig | 1 + configs/ls2080ardb_nand_defconfig| 4 8 files changed, 24 insertions(+) -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/3] armv8: LS2080A: Add device tree support for nand boot
Add device tree support for LS2080ARDB nand boot. Signed-off-by: Sriram Dash --- configs/ls2080ardb_nand_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 551f158..7183d76 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_LS2080ARDB=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y @@ -27,6 +28,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETDEVICES=y CONFIG_E1000=y -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 3/3] armv8: ls2080: Add USB node in dts for ls2080
Add the USB node for LS2080 in dts.
Signed-off-by: Sriram Dash
---
Changes in v2
- No change
arch/arm/dts/fsl-ls2080a.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index b308c8b..f76e981 100644
--- a/arch/arm/dts/fsl-ls2080a.dtsi
+++ b/arch/arm/dts/fsl-ls2080a.dtsi
@@ -75,4 +75,18 @@
reg-names = "QuadSPI", "QuadSPI-memory";
num-cs = <4>;
};
+
+ usb0: usb3@310 {
+ compatible = "fsl,layerscape-dwc3";
+ reg = <0x0 0x310 0x0 0x1>;
+ interrupts = <0 80 0x4>; /* Level high type */
+ dr_mode = "host";
+ };
+
+ usb1: usb3@311 {
+ compatible = "fsl,layerscape-dwc3";
+ reg = <0x0 0x311 0x0 0x1>;
+ interrupts = <0 81 0x4>; /* Level high type */
+ dr_mode = "host";
+ };
};
--
2.1.0
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[U-Boot] [PATCH v2 2/3] armv8: ls2080: Enable CONFIG_DM_USB in defconfigs
Enables driver model flag CONFIG_DM_USB for LS2080A platform defconfigs. Signed-off-by: Sriram Dash --- Changes in v2 - Rebase configs/ls2080aqds_SECURE_BOOT_defconfig | 1 + configs/ls2080aqds_defconfig | 1 + configs/ls2080aqds_nand_defconfig| 1 + configs/ls2080aqds_qspi_defconfig| 1 + configs/ls2080ardb_SECURE_BOOT_defconfig | 1 + configs/ls2080ardb_defconfig | 1 + configs/ls2080ardb_nand_defconfig| 2 ++ 7 files changed, 8 insertions(+) diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index 6a434c0..31e69b4 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -33,6 +33,7 @@ CONFIG_FSL_DSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_RSA=y CONFIG_SPL_RSA=y diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index 53d5774..af52818 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -33,5 +33,6 @@ CONFIG_FSL_DSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index 8eb4121..f09809d 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -42,5 +42,6 @@ CONFIG_FSL_QSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig index 5917f60..2b24a94 100644 --- a/configs/ls2080aqds_qspi_defconfig +++ b/configs/ls2080aqds_qspi_defconfig @@ -34,5 +34,6 @@ CONFIG_FSL_QSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index 932a4bd..a62d864 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -33,6 +33,7 @@ CONFIG_FSL_DSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_RSA=y CONFIG_SPL_RSA=y diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index c477961..bbf2a74 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -33,5 +33,6 @@ CONFIG_FSL_DSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 7183d76..98a00e2 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -33,9 +33,11 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y +CONFIG_DM=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] armv8: ls2080: Enable CONFIG_DM_USB in defconfigs
>From: york sun >Sent: Thursday, October 06, 2016 9:33 PM >To: Sriram Dash ; u-boot@lists.denx.de >Cc: Prabhakar Kushwaha ; >albert.u.b...@aribaud.net; Suresh Gupta >Subject: Re: [PATCH 1/2] armv8: ls2080: Enable CONFIG_DM_USB in defconfigs > >On 10/05/2016 11:03 PM, Sriram Dash wrote: >>> From: york sun >>> Sent: Thursday, October 06, 2016 12:37 AM >>> To: Sriram Dash ; u-boot@lists.denx.de >>> Cc: Prabhakar Kushwaha ; >>> albert.u.b...@aribaud.net; Suresh Gupta >>> Subject: Re: [PATCH 1/2] armv8: ls2080: Enable CONFIG_DM_USB in >>> defconfigs >>> >>> On 09/28/2016 11:18 PM, Sriram Dash wrote: >>>> Enables driver model flag CONFIG_DM_USB for LS2080A platform >>>> defconfigs. >>>> >>>> Signed-off-by: Sriram Dash >>>> --- >>>> configs/ls2080aqds_SECURE_BOOT_defconfig | 1 + >>>> configs/ls2080aqds_defconfig | 1 + >>>> configs/ls2080aqds_nand_defconfig| 1 + >>>> configs/ls2080aqds_qspi_defconfig| 1 + >>>> configs/ls2080ardb_SECURE_BOOT_defconfig | 1 + >>>> configs/ls2080ardb_defconfig | 1 + >>>> configs/ls2080ardb_nand_defconfig| 2 ++ >>>> 7 files changed, 8 insertions(+) >>> >>> Sriram, >>> >>> Please retest ls2080ardb_nand. It fails in my build. >>> >>> "undefined reference to `dm_scan_fdt_dev'" >>> >> >> Hello York, >> >> As of now, nand boot is disfeatured and hence, the config is missing >> some features > >NAND boot may be defeatured for the SDK, but not for U-Boot. It is not big >burden >to maintain it. Let's keep it running, shall we? > OK. >> for the nand boot. For this case, as the device tree is not enabled, >> the function isn't compiled. Setting CONFIG_OF_CONTROL and >CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" >> will make it compile without errors. >> >> However, I will remove the the USB DM feature for nand in the next revision. > >Can you add the device tree support for NAND boot? > Sure. I will add the support for the device tree in next patch rev. >York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] armv8: ls2080: Enable CONFIG_DM_USB in defconfigs
>From: york sun >Sent: Thursday, October 06, 2016 12:37 AM >To: Sriram Dash ; u-boot@lists.denx.de >Cc: Prabhakar Kushwaha ; >albert.u.b...@aribaud.net; Suresh Gupta >Subject: Re: [PATCH 1/2] armv8: ls2080: Enable CONFIG_DM_USB in defconfigs > >On 09/28/2016 11:18 PM, Sriram Dash wrote: >> Enables driver model flag CONFIG_DM_USB for LS2080A platform >> defconfigs. >> >> Signed-off-by: Sriram Dash >> --- >> configs/ls2080aqds_SECURE_BOOT_defconfig | 1 + >> configs/ls2080aqds_defconfig | 1 + >> configs/ls2080aqds_nand_defconfig| 1 + >> configs/ls2080aqds_qspi_defconfig| 1 + >> configs/ls2080ardb_SECURE_BOOT_defconfig | 1 + >> configs/ls2080ardb_defconfig | 1 + >> configs/ls2080ardb_nand_defconfig| 2 ++ >> 7 files changed, 8 insertions(+) > >Sriram, > >Please retest ls2080ardb_nand. It fails in my build. > >"undefined reference to `dm_scan_fdt_dev'" > Hello York, As of now, nand boot is disfeatured and hence, the config is missing some features for the nand boot. For this case, as the device tree is not enabled, the function isn't compiled. Setting CONFIG_OF_CONTROL and CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" will make it compile without errors. However, I will remove the the USB DM feature for nand in the next revision. >York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] armv8: fsl: Enable USB only when SYSCLK is 100 MHz
SYSCLK is used as a reference clock for USB. When the USB controller
is used, SYSCLK must meet the additional requirement of 100 MHz.
Signed-off-by: Sriram Dash
---
arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index 40d6a76..1a8321b 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -108,6 +108,24 @@ remove_psci_node:
}
#endif
+void fsl_fdt_disable_usb(void *blob)
+{
+ int off;
+ /*
+* SYSCLK is used as a reference clock for USB. When the USB
+* controller is used, SYSCLK must meet the additional requirement
+* of 100 MHz.
+*/
+ if (CONFIG_SYS_CLK_FREQ != 1) {
+ off = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3");
+ while (off != -FDT_ERR_NOTFOUND) {
+ fdt_status_disabled(blob, off);
+ off = fdt_node_offset_by_compatible(blob, off,
+ "snps,dwc3");
+ }
+ }
+}
+
void ft_cpu_setup(void *blob, bd_t *bd)
{
#ifdef CONFIG_FSL_LSCH2
@@ -150,4 +168,6 @@ void ft_cpu_setup(void *blob, bd_t *bd)
#ifdef CONFIG_SYS_DPAA_FMAN
fdt_fixup_fman_firmware(blob);
#endif
+ fsl_fdt_disable_usb(blob);
+
}
--
2.1.0
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[U-Boot] [PATCH 1/2] armv8: ls1043: Enable CONFIG_DM_USB in defconfigs
Enables driver model flag CONFIG_DM_USB for LS1043A platform defconfigs. Signed-off-by: Sriram Dash --- configs/ls1043aqds_defconfig | 1 + configs/ls1043aqds_lpuart_defconfig | 1 + configs/ls1043aqds_nand_defconfig| 1 + configs/ls1043aqds_nor_ddr3_defconfig| 1 + configs/ls1043aqds_qspi_defconfig| 1 + configs/ls1043aqds_sdcard_ifc_defconfig | 1 + configs/ls1043aqds_sdcard_qspi_defconfig | 1 + configs/ls1043ardb_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_defconfig | 1 + configs/ls1043ardb_nand_defconfig| 1 + configs/ls1043ardb_sdcard_defconfig | 1 + 11 files changed, 11 insertions(+) diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index b209486..243ef68 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -29,4 +29,5 @@ CONFIG_DM_SPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index a60ea68..32c8122 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -30,4 +30,5 @@ CONFIG_DM_SPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index 593f244..24f378e 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -40,4 +40,5 @@ CONFIG_DM_SPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index a844d9d..01f4a7a 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -28,4 +28,5 @@ CONFIG_DM_SPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index 92e5e80..54e57bb 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -31,4 +31,5 @@ CONFIG_DM_SPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index e360906..82a57fd 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -40,4 +40,5 @@ CONFIG_DM_SPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index b6ece37..59dffc9 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -41,4 +41,5 @@ CONFIG_DM_SPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index f51e020..d2f80a8 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -25,6 +25,7 @@ CONFIG_DM_SPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_RSA=y CONFIG_SPL_RSA=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index 5c20e44..66d3653 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -25,4 +25,5 @@ CONFIG_DM_SPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index a203030..ce89602 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -36,4 +36,5 @@ CONFIG_DM_SPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index 323bb77..50f8532 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -36,4 +36,5 @@ CONFIG_DM_SPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] armv8: ls1043: Add USB node in dts for ls1043
Add the USB node for LS1043 in dts.
Signed-off-by: Sriram Dash
---
arch/arm/dts/fsl-ls1043a.dtsi | 21 +
1 file changed, 21 insertions(+)
diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi
index a8bffba..f038f96 100644
--- a/arch/arm/dts/fsl-ls1043a.dtsi
+++ b/arch/arm/dts/fsl-ls1043a.dtsi
@@ -215,5 +215,26 @@
big-endian;
status = "disabled";
};
+
+ usb0: usb3@2f0 {
+ compatible = "fsl,layerscape-dwc3";
+ reg = <0x0 0x2f0 0x0 0x1>;
+ interrupts = <0 60 0x4>;
+ dr_mode = "host";
+ };
+
+ usb1: usb3@300 {
+ compatible = "fsl,layerscape-dwc3";
+ reg = <0x0 0x300 0x0 0x1>;
+ interrupts = <0 61 0x4>;
+ dr_mode = "host";
+ };
+
+ usb2: usb3@310 {
+ compatible = "fsl,layerscape-dwc3";
+ reg = <0x0 0x310 0x0 0x1>;
+ interrupts = <0 63 0x4>;
+ dr_mode = "host";
+ };
};
};
--
2.1.0
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[U-Boot] [PATCH 0/2] Enable DM support for USB in LS1043
Enable the CONFIG_DM_USB in defconfigs and add the usb node in dts for LS1043 Sriram Dash (2): armv8: ls1043: Enable CONFIG_DM_USB in defconfigs armv8: ls1043: Add USB node in dts for ls1043 arch/arm/dts/fsl-ls1043a.dtsi| 21 + configs/ls1043aqds_defconfig | 1 + configs/ls1043aqds_lpuart_defconfig | 1 + configs/ls1043aqds_nand_defconfig| 1 + configs/ls1043aqds_nor_ddr3_defconfig| 1 + configs/ls1043aqds_qspi_defconfig| 1 + configs/ls1043aqds_sdcard_ifc_defconfig | 1 + configs/ls1043aqds_sdcard_qspi_defconfig | 1 + configs/ls1043ardb_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_defconfig | 1 + configs/ls1043ardb_nand_defconfig| 1 + configs/ls1043ardb_sdcard_defconfig | 1 + 12 files changed, 32 insertions(+) -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] armv8: ls2080: Add USB node in dts for ls2080
Add the USB node for LS2080 in dts.
Signed-off-by: Sriram Dash
---
arch/arm/dts/fsl-ls2080a.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index b308c8b..f76e981 100644
--- a/arch/arm/dts/fsl-ls2080a.dtsi
+++ b/arch/arm/dts/fsl-ls2080a.dtsi
@@ -75,4 +75,18 @@
reg-names = "QuadSPI", "QuadSPI-memory";
num-cs = <4>;
};
+
+ usb0: usb3@310 {
+ compatible = "fsl,layerscape-dwc3";
+ reg = <0x0 0x310 0x0 0x1>;
+ interrupts = <0 80 0x4>; /* Level high type */
+ dr_mode = "host";
+ };
+
+ usb1: usb3@311 {
+ compatible = "fsl,layerscape-dwc3";
+ reg = <0x0 0x311 0x0 0x1>;
+ interrupts = <0 81 0x4>; /* Level high type */
+ dr_mode = "host";
+ };
};
--
2.1.0
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[U-Boot] [PATCH 1/2] armv8: ls2080: Enable CONFIG_DM_USB in defconfigs
Enables driver model flag CONFIG_DM_USB for LS2080A platform defconfigs. Signed-off-by: Sriram Dash --- configs/ls2080aqds_SECURE_BOOT_defconfig | 1 + configs/ls2080aqds_defconfig | 1 + configs/ls2080aqds_nand_defconfig| 1 + configs/ls2080aqds_qspi_defconfig| 1 + configs/ls2080ardb_SECURE_BOOT_defconfig | 1 + configs/ls2080ardb_defconfig | 1 + configs/ls2080ardb_nand_defconfig| 2 ++ 7 files changed, 8 insertions(+) diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index 6a434c0..31e69b4 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -33,6 +33,7 @@ CONFIG_FSL_DSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_RSA=y CONFIG_SPL_RSA=y diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index 53d5774..af52818 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -33,5 +33,6 @@ CONFIG_FSL_DSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index 8eb4121..f09809d 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -42,5 +42,6 @@ CONFIG_FSL_QSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig index 5917f60..2b24a94 100644 --- a/configs/ls2080aqds_qspi_defconfig +++ b/configs/ls2080aqds_qspi_defconfig @@ -34,5 +34,6 @@ CONFIG_FSL_QSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index 932a4bd..a62d864 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -33,6 +33,7 @@ CONFIG_FSL_DSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_RSA=y CONFIG_SPL_RSA=y diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index c477961..bbf2a74 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -33,5 +33,6 @@ CONFIG_FSL_DSPI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 551f158..cdeb1dd 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -31,9 +31,11 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y +CONFIG_DM=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/2] Enable DM support for USB in LS2080
Enable the CONFIG_DM_USB in defconfigs and add the usb node in dts for LS2080. Sriram Dash (2): armv8: ls2080: Enable CONFIG_DM_USB in defconfigs armv8: ls2080: Add USB node in dts for ls2080 arch/arm/dts/fsl-ls2080a.dtsi| 14 ++ configs/ls2080aqds_SECURE_BOOT_defconfig | 1 + configs/ls2080aqds_defconfig | 1 + configs/ls2080aqds_nand_defconfig| 1 + configs/ls2080aqds_qspi_defconfig| 1 + configs/ls2080ardb_SECURE_BOOT_defconfig | 1 + configs/ls2080ardb_defconfig | 1 + configs/ls2080ardb_nand_defconfig| 2 ++ 8 files changed, 22 insertions(+) -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4] drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controller
Currently the controller by default enables the Receive Detect feature in P3
mode in USB 3.0 PHY. However, USB 3.0 PHY does not reliably support receive
detection in P3 mode.
Enabling the USB3 controller to configure USB in P2 mode whenever the Receive
Detect feature is required.
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
Changes in v4:
- Removing the dedicated function for setting rxdetect bit
and doing the operation by writing to register directly.
- Added comment about the support of Rx Detect by DWC3
- Use clrsetbits_le32 instead of setbits_le32.
Changes in v3:
- Rebase
Changes in v2:
- Do Soc ver checking for applying erratum
drivers/usb/common/fsl-errata.c | 26 ++
drivers/usb/host/xhci-fsl.c | 13 +
include/fsl_usb.h | 1 +
include/linux/usb/dwc3.h| 1 +
4 files changed, 41 insertions(+)
diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c
index 183bf2b..f2bffba 100644
--- a/drivers/usb/common/fsl-errata.c
+++ b/drivers/usb/common/fsl-errata.c
@@ -190,4 +190,30 @@ bool has_erratum_a008751(void)
return false;
}
+bool has_erratum_a010151(void)
+{
+ u32 svr = get_svr();
+ u32 soc = SVR_SOC_VER(svr);
+
+ switch (soc) {
+#ifdef CONFIG_ARM64
+ case SVR_LS2080A:
+ case SVR_LS2085A:
+ case SVR_LS1046A:
+ case SVR_LS1012A:
+ return IS_SVR_REV(svr, 1, 0);
+ case SVR_LS1043A:
+ return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
+#endif
+#ifdef CONFIG_LS102XA
+ case SOC_VER_LS1020:
+ case SOC_VER_LS1021:
+ case SOC_VER_LS1022:
+ case SOC_VER_SLS1020:
+ return IS_SVR_REV(svr, 2, 0);
+#endif
+ }
+ return false;
+}
+
#endif
diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
index 0e3e056..6feb93d 100644
--- a/drivers/usb/host/xhci-fsl.c
+++ b/drivers/usb/host/xhci-fsl.c
@@ -84,6 +84,19 @@ static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci)
/* Change beat burst and outstanding pipelined transfers requests */
fsl_xhci_set_beat_burst_length(fsl_xhci->dwc3_reg);
+ /*
+* A-010151: The dwc3 phy TSMC 28-nm HPM 0.9/1.8 V does not
+* reliably support Rx Detect in P3 mode(P3 is the default
+* setting). Therefore, some USB3.0 devices may not be detected
+* reliably in Super Speed mode. So, USB controller to configure
+* USB in P2 mode whenever the Receive Detect feature is required.
+* whenever the Receive Detect feature is required.
+*/
+ if (has_erratum_a010151())
+ clrsetbits_le32(&fsl_xhci->dwc3_reg->g_usb3pipectl[0],
+ DWC3_GUSB3PIPECTL_DISRXDETP3,
+ DWC3_GUSB3PIPECTL_DISRXDETP3);
+
return ret;
}
diff --git a/include/fsl_usb.h b/include/fsl_usb.h
index fc72fb9..73235b8 100644
--- a/include/fsl_usb.h
+++ b/include/fsl_usb.h
@@ -95,5 +95,6 @@ bool has_erratum_a007792(void);
bool has_erratum_a005697(void);
bool has_erratum_a004477(void);
bool has_erratum_a008751(void);
+bool has_erratum_a010151(void);
#endif
#endif /*_ASM_FSL_USB_H_ */
diff --git a/include/linux/usb/dwc3.h b/include/linux/usb/dwc3.h
index a027446..c1b23b2 100644
--- a/include/linux/usb/dwc3.h
+++ b/include/linux/usb/dwc3.h
@@ -198,6 +198,7 @@ struct dwc3 { /*
offset: 0xC100 */
/* Global USB3 PIPE Control Register */
#define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31)
+#define DWC3_GUSB3PIPECTL_DISRXDETP3 (1 << 28)
#define DWC3_GUSB3PIPECTL_SUSPHY (1 << 17)
/* Global TX Fifo Size Register */
--
2.1.0
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Re: [U-Boot] [PATCH v3] drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controller
>From: Marek Vasut [mailto:ma...@denx.de] >On 09/16/2016 11:35 AM, Sriram Dash wrote: > >[...] > >>>> I agree to your point. We can set the bit from fsl specific file >>>> with the function setbits_le32(fsl_xhci->dwc3_reg->g_usb3pipectl[0], >>>> DWC3_GUSB3PIPECTL_DISRXDETP3); >>>> If any other Soc, other than fsl/nxp wants the functionality, they >>>> will be using the same in their respective code. What do you say? >>> >>> Why do you use setbits_le32() instead of writel() ? >>> >> >> We will be modifying a single bit. So, better to use setbit_le32 and >> leave other bits unchanged. > >In that case, you should use clrsetbits_le32() to clear the bit first in case >someone >decided to clear it instead. > OK. Will modify in v4. >[...] > > >-- >Best regards, >Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] drivers: usb: fsl-dt-fixup: Fix the dt for multiple USB nodes in single traversal of device tree
>From: Marek Vasut [mailto:ma...@denx.de]
>On 09/16/2016 10:47 AM, Sriram Dash wrote:
>>> From: Marek Vasut [mailto:ma...@denx.de] On 09/15/2016 12:29 AM, york
>>> sun wrote:
>>>> On 09/14/2016 02:35 PM, Marek Vasut wrote:
>>>>> On 09/14/2016 07:22 AM, Sriram Dash wrote:
>>>>>>> From: Sriram Dash [mailto:sriram.d...@nxp.com]
>>>>>>>
>>>>>>
>>>>>> Hello Marek,
>>>>>>
>>>>>> Any comments?
>>>>>
>>>>> Waiting for York to review this.
>>>>>
>>>>> It's a bulky patch V2 without changelog, shall I review the whole
>>>>> thing again ?
>>>>>
>>>>>>> For FSL USB node fixup, the dt is walked multiple times for
>>>>>>> fixing erratum and phy type. This patch walks the tree and fixes
>>>>>>> the node till no
>>> more USB nodes are left.
>>>>>>>
>>>>>>> Signed-off-by: Sriram Dash
>>>>>>> Signed-off-by: Rajesh Bhagat
>>>>>>> ---
>>>>>>> drivers/usb/common/fsl-dt-fixup.c | 108
>>>>>>> +-
>>>>>>> 1 file changed, 47 insertions(+), 61 deletions(-)
>>>>>>>
>>>>>>> diff --git a/drivers/usb/common/fsl-dt-fixup.c
>>>>>>> b/drivers/usb/common/fsl-dt-fixup.c
>>>>>>> index 9c48852..df785a6 100644
>>>>>>> --- a/drivers/usb/common/fsl-dt-fixup.c
>>>>>>> +++ b/drivers/usb/common/fsl-dt-fixup.c
>>>>>>> @@ -54,25 +54,19 @@ static int fdt_usb_get_node_type(void *blob,
>>>>>>> int start_offset, }
>>>>>>>
>>>>>>> static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
>>>>>>> - const char *phy_type, int
>>>>>>> start_offset)
>>>>>>> + const char *phy_type, int
>>>>>>> node_offset,
>>>>>>> + const char **node_type)
>>>>>>> {
>>>>>>> const char *prop_mode = "dr_mode";
>>>>>>> const char *prop_type = "phy_type";
>>>>>>> - const char *node_type = NULL;
>>>>>>> - int node_offset;
>>>>>>> - int err;
>>>>>>> -
>>>>>>> - err = fdt_usb_get_node_type(blob, start_offset,
>>>>>>> - &node_offset, &node_type);
>>>>>>> - if (err < 0)
>>>>>>> - return err;
>>>>>>> + int err = 0;
>>>>>>>
>>>>>>> if (mode) {
>>>>>>> err = fdt_setprop(blob, node_offset, prop_mode, mode,
>>>>>>> strlen(mode) + 1);
>>>>>>> if (err < 0)
>>>>>>> printf("WARNING: could not set %s for %s:
>>>>>>> %s.\n",
>>>>>>> - prop_mode, node_type, fdt_strerror(err));
>>>>>>> + prop_mode, *node_type,
>>>>>>> fdt_strerror(err));
>>>>>>> }
>>>>>>>
>>>>>>> if (phy_type) {
>>>>>>> @@ -80,52 +74,48 @@ static int fdt_fixup_usb_mode_phy_type(void
>>>>>>> *blob, const char *mode,
>>>>>>> strlen(phy_type) + 1);
>>>>>>> if (err < 0)
>>>>>>> printf("WARNING: could not set %s for %s:
>>>>>>> %s.\n",
>>>>>>> - prop_type, node_type, fdt_strerror(err));
>>>>>>> + prop_type, *node_type,
>>>>>>> fdt_strerror(err));
>>>>>>> }
>>>>>>>
>>>>>>> - return node_offset;
>>>>>>> + return err;
>>>>>>> }
>>>>>>>
>>>>>>> static int fdt_fixup_usb_erratum(voi
[U-Boot] [PATCH 2/2] usb: fsl: Renaming fdt_fixup_erratum and fdt_fixup_usb_erratum
The functions fdt_fixup_erratum and fdt_fixup_usb_erratum are
fsl/nxp specific. So, make them explicit by renaming them
fsl_fdt_fixup_erratum and fsl_fdt_fixup_usb_erratum
Signed-off-by: Sriram Dash
---
drivers/usb/common/fsl-dt-fixup.c | 45 ---
1 file changed, 23 insertions(+), 22 deletions(-)
diff --git a/drivers/usb/common/fsl-dt-fixup.c
b/drivers/usb/common/fsl-dt-fixup.c
index 906f9df..63a24f7 100644
--- a/drivers/usb/common/fsl-dt-fixup.c
+++ b/drivers/usb/common/fsl-dt-fixup.c
@@ -86,8 +86,9 @@ static int fdt_fixup_usb_mode_phy_type(void *blob, const char
*mode,
return node_offset;
}
-static int fdt_fixup_usb_erratum(void *blob, const char *prop_erratum,
-const char *controller_type, int start_offset)
+static int fsl_fdt_fixup_usb_erratum(void *blob, const char *prop_erratum,
+const char *controller_type,
+int start_offset)
{
int node_offset, err;
const char *node_type = NULL;
@@ -114,17 +115,17 @@ static int fdt_fixup_usb_erratum(void *blob, const char
*prop_erratum,
return node_offset;
}
-static int fdt_fixup_erratum(int *usb_erratum_off, void *blob,
-const char *controller_type, char *str,
-bool (*has_erratum)(void))
+static int fsl_fdt_fixup_erratum(int *usb_erratum_off, void *blob,
+const char *controller_type, char *str,
+bool (*has_erratum)(void))
{
char buf[32] = {0};
snprintf(buf, sizeof(buf), "fsl,usb-erratum-%s", str);
if (!has_erratum())
return -EINVAL;
- *usb_erratum_off = fdt_fixup_usb_erratum(blob, buf, controller_type,
-*usb_erratum_off);
+ *usb_erratum_off = fsl_fdt_fixup_usb_erratum(blob, buf, controller_type,
+*usb_erratum_off);
if (*usb_erratum_off < 0)
return -ENOSPC;
debug("Adding USB erratum %s\n", str);
@@ -198,29 +199,29 @@ void fsl_fdt_fixup_dr_usb(void *blob, bd_t *bd)
if (usb_phy_off < 0)
return;
- ret = fdt_fixup_erratum(&usb_erratum_a006261_off, blob,
- CHIPIDEA_USB2, "a006261",
- has_erratum_a006261);
+ ret = fsl_fdt_fixup_erratum(&usb_erratum_a006261_off, blob,
+ CHIPIDEA_USB2, "a006261",
+ has_erratum_a006261);
if (ret == -ENOSPC)
return;
- ret = fdt_fixup_erratum(&usb_erratum_a007075_off, blob,
- CHIPIDEA_USB2, "a007075",
- has_erratum_a007075);
+ ret = fsl_fdt_fixup_erratum(&usb_erratum_a007075_off, blob,
+ CHIPIDEA_USB2, "a007075",
+ has_erratum_a007075);
if (ret == -ENOSPC)
return;
- ret = fdt_fixup_erratum(&usb_erratum_a007792_off, blob,
- CHIPIDEA_USB2, "a007792",
- has_erratum_a007792);
+ ret = fsl_fdt_fixup_erratum(&usb_erratum_a007792_off, blob,
+ CHIPIDEA_USB2, "a007792",
+ has_erratum_a007792);
if (ret == -ENOSPC)
return;
- ret = fdt_fixup_erratum(&usb_erratum_a005697_off, blob,
- CHIPIDEA_USB2, "a005697",
- has_erratum_a005697);
+ ret = fsl_fdt_fixup_erratum(&usb_erratum_a005697_off, blob,
+ CHIPIDEA_USB2, "a005697",
+ has_erratum_a005697);
if (ret == -ENOSPC)
return;
- ret = fdt_fixup_erratum(&usb_erratum_a008751_off, blob,
- SNPS_DWC3, "a008751",
- has_erratum_a008751);
+ ret = fsl_fdt_fixup_erratum(&usb_erratum_a008751_off, blob,
+ SNPS_DWC3, "a008751",
+ has_erratum_a008751);
if (ret == -ENOSPC)
return;
--
2.1.0
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/2] Renaming the fsl/nxp specific functions
The functions fdt_fixup_dr_usb, fdt_fixup_erratum and fdt_fixup_usb_erratum are renamed to fsl_fdt_fixup_dr_usb, fsl_fdt_fixup_erratum and fsl_fdt_fixup_usb_erratum respectively.This makes more sense as these are not generic functions. Sriram Dash (2): usb: fsl: Rename fdt_fixup_dr_usb usb: fsl: Renaming fdt_fixup_erratum and fdt_fixup_usb_erratum board/Arcturus/ucp1020/ucp1020.c| 2 +- board/freescale/b4860qds/b4860qds.c | 2 +- board/freescale/bsc9131rdb/bsc9131rdb.c | 2 +- board/freescale/bsc9132qds/bsc9132qds.c | 2 +- board/freescale/corenet_ds/corenet_ds.c | 2 +- board/freescale/ls2080aqds/ls2080aqds.c | 2 +- board/freescale/ls2080ardb/ls2080ardb.c | 2 +- board/freescale/mpc8308rdb/mpc8308rdb.c | 2 +- board/freescale/mpc8315erdb/mpc8315erdb.c | 2 +- board/freescale/mpc837xemds/mpc837xemds.c | 2 +- board/freescale/mpc837xerdb/mpc837xerdb.c | 2 +- board/freescale/mpc8536ds/mpc8536ds.c | 2 +- board/freescale/p1010rdb/p1010rdb.c | 2 +- board/freescale/p1022ds/p1022ds.c | 2 +- board/freescale/p1023rdb/p1023rdb.c | 2 +- board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 2 +- board/freescale/p1_twr/p1_twr.c | 2 +- board/freescale/p2041rdb/p2041rdb.c | 2 +- board/freescale/t102xqds/t102xqds.c | 2 +- board/freescale/t102xrdb/t102xrdb.c | 2 +- board/freescale/t1040qds/t1040qds.c | 2 +- board/freescale/t104xrdb/t104xrdb.c | 2 +- board/freescale/t208xqds/t208xqds.c | 2 +- board/freescale/t208xrdb/t208xrdb.c | 2 +- board/freescale/t4qds/t4240emu.c| 2 +- board/freescale/t4qds/t4240qds.c| 2 +- board/freescale/t4rdb/t4240rdb.c| 2 +- board/gdsys/mpc8308/hrcon.c | 2 +- board/gdsys/mpc8308/strider.c | 2 +- board/gdsys/p1022/controlcenterd.c | 2 +- board/keymile/kmp204x/kmp204x.c | 2 +- board/mpc8308_p1m/mpc8308_p1m.c | 2 +- board/varisys/cyrus/cyrus.c | 2 +- drivers/usb/common/fsl-dt-fixup.c | 47 +++-- include/fdt_support.h | 4 +-- 35 files changed, 59 insertions(+), 58 deletions(-) -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] usb: fsl: Rename fdt_fixup_dr_usb
The function fdt_fixup_dr_usb is specific to fsl/nxp. So,
make the function name explicit and rename fdt_fixup_dr_usb
into fsl_fdt_fixup_dr_usb.
Signed-off-by: Sriram Dash
---
board/Arcturus/ucp1020/ucp1020.c| 2 +-
board/freescale/b4860qds/b4860qds.c | 2 +-
board/freescale/bsc9131rdb/bsc9131rdb.c | 2 +-
board/freescale/bsc9132qds/bsc9132qds.c | 2 +-
board/freescale/corenet_ds/corenet_ds.c | 2 +-
board/freescale/ls2080aqds/ls2080aqds.c | 2 +-
board/freescale/ls2080ardb/ls2080ardb.c | 2 +-
board/freescale/mpc8308rdb/mpc8308rdb.c | 2 +-
board/freescale/mpc8315erdb/mpc8315erdb.c | 2 +-
board/freescale/mpc837xemds/mpc837xemds.c | 2 +-
board/freescale/mpc837xerdb/mpc837xerdb.c | 2 +-
board/freescale/mpc8536ds/mpc8536ds.c | 2 +-
board/freescale/p1010rdb/p1010rdb.c | 2 +-
board/freescale/p1022ds/p1022ds.c | 2 +-
board/freescale/p1023rdb/p1023rdb.c | 2 +-
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 2 +-
board/freescale/p1_twr/p1_twr.c | 2 +-
board/freescale/p2041rdb/p2041rdb.c | 2 +-
board/freescale/t102xqds/t102xqds.c | 2 +-
board/freescale/t102xrdb/t102xrdb.c | 2 +-
board/freescale/t1040qds/t1040qds.c | 2 +-
board/freescale/t104xrdb/t104xrdb.c | 2 +-
board/freescale/t208xqds/t208xqds.c | 2 +-
board/freescale/t208xrdb/t208xrdb.c | 2 +-
board/freescale/t4qds/t4240emu.c| 2 +-
board/freescale/t4qds/t4240qds.c| 2 +-
board/freescale/t4rdb/t4240rdb.c| 2 +-
board/gdsys/mpc8308/hrcon.c | 2 +-
board/gdsys/mpc8308/strider.c | 2 +-
board/gdsys/p1022/controlcenterd.c | 2 +-
board/keymile/kmp204x/kmp204x.c | 2 +-
board/mpc8308_p1m/mpc8308_p1m.c | 2 +-
board/varisys/cyrus/cyrus.c | 2 +-
drivers/usb/common/fsl-dt-fixup.c | 2 +-
include/fdt_support.h | 4 ++--
35 files changed, 36 insertions(+), 36 deletions(-)
diff --git a/board/Arcturus/ucp1020/ucp1020.c b/board/Arcturus/ucp1020/ucp1020.c
index 0fc2bac..0d086e8 100644
--- a/board/Arcturus/ucp1020/ucp1020.c
+++ b/board/Arcturus/ucp1020/ucp1020.c
@@ -315,7 +315,7 @@ int ft_board_setup(void *blob, bd_t *bd)
FT_FSL_PCI_SETUP;
#if defined(CONFIG_HAS_FSL_DR_USB)
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#endif
#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
diff --git a/board/freescale/b4860qds/b4860qds.c
b/board/freescale/b4860qds/b4860qds.c
index e582abb..5dd314e 100644
--- a/board/freescale/b4860qds/b4860qds.c
+++ b/board/freescale/b4860qds/b4860qds.c
@@ -1209,7 +1209,7 @@ int ft_board_setup(void *blob, bd_t *bd)
fdt_fixup_liodn(blob);
#ifdef CONFIG_HAS_FSL_DR_USB
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#endif
#ifdef CONFIG_SYS_DPAA_FMAN
diff --git a/board/freescale/bsc9131rdb/bsc9131rdb.c
b/board/freescale/bsc9131rdb/bsc9131rdb.c
index 75e1142..fb8bb39 100644
--- a/board/freescale/bsc9131rdb/bsc9131rdb.c
+++ b/board/freescale/bsc9131rdb/bsc9131rdb.c
@@ -73,7 +73,7 @@ int ft_board_setup(void *blob, bd_t *bd)
fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
#endif
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
return 0;
}
diff --git a/board/freescale/bsc9132qds/bsc9132qds.c
b/board/freescale/bsc9132qds/bsc9132qds.c
index 71a7bb5..2c836da 100644
--- a/board/freescale/bsc9132qds/bsc9132qds.c
+++ b/board/freescale/bsc9132qds/bsc9132qds.c
@@ -394,7 +394,7 @@ int ft_board_setup(void *blob, bd_t *bd)
/* remove dts usb node */
fdt_del_node_compat(blob, "fsl-usb2-dr");
} else {
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
fdt_del_node_and_alias(blob, "serial2");
}
}
diff --git a/board/freescale/corenet_ds/corenet_ds.c
b/board/freescale/corenet_ds/corenet_ds.c
index f41985d..8a44a9a 100644
--- a/board/freescale/corenet_ds/corenet_ds.c
+++ b/board/freescale/corenet_ds/corenet_ds.c
@@ -201,7 +201,7 @@ int ft_board_setup(void *blob, bd_t *bd)
#endif
fdt_fixup_liodn(blob);
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#ifdef CONFIG_SYS_DPAA_FMAN
fdt_fixup_fman_ethernet(blob);
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c
b/board/freescale/ls2080aqds/ls2080aqds.c
index 7d95deb..e1b17f6 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -317,7 +317,7 @@ int ft_board_setup(void *blob, bd_t *bd)
fdt_fixup_memory_banks(blob, base, size, 2);
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#ifdef CONFIG_FSL_MC_ENET
fdt_fixup_board_enet(blob);
diff --g
Re: [U-Boot] [PATCH v2] drivers: usb: fsl-dt-fixup: Fix the dt for multiple USB nodes in single traversal of device tree
>From: Marek Vasut [mailto:ma...@denx.de]
>On 09/15/2016 12:29 AM, york sun wrote:
>> On 09/14/2016 02:35 PM, Marek Vasut wrote:
>>> On 09/14/2016 07:22 AM, Sriram Dash wrote:
>>>>> From: Sriram Dash [mailto:sriram.d...@nxp.com]
>>>>>
>>>>
>>>> Hello Marek,
>>>>
>>>> Any comments?
>>>
>>> Waiting for York to review this.
>>>
>>> It's a bulky patch V2 without changelog, shall I review the whole
>>> thing again ?
>>>
>>>>> For FSL USB node fixup, the dt is walked multiple times for fixing
>>>>> erratum and phy type. This patch walks the tree and fixes the node till no
>more USB nodes are left.
>>>>>
>>>>> Signed-off-by: Sriram Dash
>>>>> Signed-off-by: Rajesh Bhagat
>>>>> ---
>>>>> drivers/usb/common/fsl-dt-fixup.c | 108
>>>>> +-
>>>>> 1 file changed, 47 insertions(+), 61 deletions(-)
>>>>>
>>>>> diff --git a/drivers/usb/common/fsl-dt-fixup.c
>>>>> b/drivers/usb/common/fsl-dt-fixup.c
>>>>> index 9c48852..df785a6 100644
>>>>> --- a/drivers/usb/common/fsl-dt-fixup.c
>>>>> +++ b/drivers/usb/common/fsl-dt-fixup.c
>>>>> @@ -54,25 +54,19 @@ static int fdt_usb_get_node_type(void *blob,
>>>>> int start_offset, }
>>>>>
>>>>> static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
>>>>> -const char *phy_type, int start_offset)
>>>>> +const char *phy_type, int node_offset,
>>>>> +const char **node_type)
>>>>> {
>>>>> const char *prop_mode = "dr_mode";
>>>>> const char *prop_type = "phy_type";
>>>>> - const char *node_type = NULL;
>>>>> - int node_offset;
>>>>> - int err;
>>>>> -
>>>>> - err = fdt_usb_get_node_type(blob, start_offset,
>>>>> - &node_offset, &node_type);
>>>>> - if (err < 0)
>>>>> - return err;
>>>>> + int err = 0;
>>>>>
>>>>> if (mode) {
>>>>> err = fdt_setprop(blob, node_offset, prop_mode, mode,
>>>>> strlen(mode) + 1);
>>>>> if (err < 0)
>>>>> printf("WARNING: could not set %s for %s: %s.\n",
>>>>> -prop_mode, node_type, fdt_strerror(err));
>>>>> +prop_mode, *node_type, fdt_strerror(err));
>>>>> }
>>>>>
>>>>> if (phy_type) {
>>>>> @@ -80,52 +74,48 @@ static int fdt_fixup_usb_mode_phy_type(void
>>>>> *blob, const char *mode,
>>>>> strlen(phy_type) + 1);
>>>>> if (err < 0)
>>>>> printf("WARNING: could not set %s for %s: %s.\n",
>>>>> -prop_type, node_type, fdt_strerror(err));
>>>>> +prop_type, *node_type, fdt_strerror(err));
>>>>> }
>>>>>
>>>>> - return node_offset;
>>>>> + return err;
>>>>> }
>>>>>
>>>>> static int fdt_fixup_usb_erratum(void *blob, const char *prop_erratum,
>>>>> - const char *controller_type, int start_offset)
>>>>> + const char *controller_type, int node_offset,
>>>>> + const char **node_type)
>>>>> {
>>>>> - int node_offset, err;
>>>>> - const char *node_type = NULL;
>>>>> + int err = -1;
>>>>> const char *node_name = NULL;
>>>>>
>>>>> - err = fdt_usb_get_node_type(blob, start_offset,
>>>>> - &node_offset, &node_type);
>>>>> - if (err < 0)
>>>>> - return err;
>>>>> -
>>>>> - if (!strcmp(node_type, FSL_USB2_MPH) || !strcmp(node_type,
>>>>> FSL_USB2_DR))
>>>>> + if (!strcmp(*node_type, FSL_USB2_MPH) ||
>>>>> + !strcmp(*node_type, FSL_USB2_DR))
>>>>> node_name = CHIPIDEA_USB2
Re: [U-Boot] [PATCH v3] drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controller
>From: Marek Vasut [mailto:ma...@denx.de]
>On 09/16/2016 07:50 AM, Sriram Dash wrote:
>>> From: Marek Vasut [mailto:ma...@denx.de] On 09/15/2016 08:31 AM,
>>> Sriram Dash wrote:
>>>>> From: Marek Vasut [mailto:ma...@denx.de] On 09/14/2016 07:15 AM,
>>>>> Sriram Dash wrote:
>>>>>> Currently the controller by default enables the Receive Detect
>>>>>> feature in P3 mode in USB 3.0 PHY. However, USB 3.0 PHY does not
>>>>>> reliably support receive detection in P3 mode.
>>>>>> Enabling the USB3 controller to configure USB in P2 mode whenever
>>>>>> the Receive Detect feature is required.
>>>>>>
>>>>>> Signed-off-by: Sriram Dash
>>>>>> Signed-off-by: Rajesh Bhagat
>>>>>> ---
>>>>>> Changes in v3:
>>>>>> - Fixing conflicts and repost
>>>>>
>>>>> Changelog of this verbosity is completely useless.
>>>>>
>>>>
>>>> I will take care the next time.
>>>>
>>>>>> Changes in v2:
>>>>>> - Do Soc ver checking for applying erratum
>>>>>>
>>>>>> drivers/usb/common/fsl-errata.c | 26 ++
>>>>>> drivers/usb/host/xhci-dwc3.c| 5 +
>>>>>> drivers/usb/host/xhci-fsl.c | 8
>>>>>> include/fsl_usb.h | 1 +
>>>>>> include/linux/usb/dwc3.h| 2 ++
>>>>>> 5 files changed, 42 insertions(+)
>>>>>>
>>>>>> diff --git a/drivers/usb/common/fsl-errata.c
>>>>>> b/drivers/usb/common/fsl-errata.c index 183bf2b..f2bffba 100644
>>>>>> --- a/drivers/usb/common/fsl-errata.c
>>>>>> +++ b/drivers/usb/common/fsl-errata.c
>>>>>> @@ -190,4 +190,30 @@ bool has_erratum_a008751(void)
>>>>>> return false;
>>>>>> }
>>>>>>
>>>>>> +bool has_erratum_a010151(void)
>>>>>> +{
>>>>>> +u32 svr = get_svr();
>>>>>> +u32 soc = SVR_SOC_VER(svr);
>>>>>> +
>>>>>> +switch (soc) {
>>>>>> +#ifdef CONFIG_ARM64
>>>>>> +case SVR_LS2080A:
>>>>>> +case SVR_LS2085A:
>>>>>> +case SVR_LS1046A:
>>>>>> +case SVR_LS1012A:
>>>>>> +return IS_SVR_REV(svr, 1, 0);
>>>>>> +case SVR_LS1043A:
>>>>>> +return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
>>>>>> #endif
>>>>>> +#ifdef CONFIG_LS102XA
>>>>>> +case SOC_VER_LS1020:
>>>>>> +case SOC_VER_LS1021:
>>>>>> +case SOC_VER_LS1022:
>>>>>> +case SOC_VER_SLS1020:
>>>>>> +return IS_SVR_REV(svr, 2, 0);
>>>>>> +#endif
>>>>>> +}
>>>>>> +return false;
>>>>>> +}
>>>>>> +
>>>>>> #endif
>>>>>> diff --git a/drivers/usb/host/xhci-dwc3.c
>>>>>> b/drivers/usb/host/xhci-dwc3.c index 33961cd..adbd9b5 100644
>>>>>> --- a/drivers/usb/host/xhci-dwc3.c
>>>>>> +++ b/drivers/usb/host/xhci-dwc3.c
>>>>>> @@ -97,3 +97,8 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
>>>>>> setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL |
>>>>>> GFLADJ_30MHZ(val));
>>>>>> }
>>>>>> +
>>>>>> +void dwc3_set_rxdetect_power_mode(struct dwc3 *dwc3_reg, u32 val) {
>>>>>> +setbits_le32(&dwc3_reg->g_usb3pipectl[0], val);
>>>>>
>>>>> So what would happen if I wanted to clean some bits instead ?
>>>>
>>>> Setting the Rx detect in P2 mode is a one time job, and it does not
>>>> change. Hence, IMO, the clear bit functionality is not required.
>>>
>>> Until an SoC comes which has some bits set there and someone wants to
>>> clear them . At which point, this code will serve as a trap .
>>>
>>
>> The default value of the register bit g_usb3pipectl is 0.
>
>For this particular hardware revision. That can be changed in some later
>revision
>and
Re: [U-Boot] [PATCH v3] drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controller
>From: Marek Vasut [mailto:ma...@denx.de]
>On 09/15/2016 08:31 AM, Sriram Dash wrote:
>>> From: Marek Vasut [mailto:ma...@denx.de] On 09/14/2016 07:15 AM,
>>> Sriram Dash wrote:
>>>> Currently the controller by default enables the Receive Detect
>>>> feature in P3 mode in USB 3.0 PHY. However, USB 3.0 PHY does not
>>>> reliably support receive detection in P3 mode.
>>>> Enabling the USB3 controller to configure USB in P2 mode whenever
>>>> the Receive Detect feature is required.
>>>>
>>>> Signed-off-by: Sriram Dash
>>>> Signed-off-by: Rajesh Bhagat
>>>> ---
>>>> Changes in v3:
>>>> - Fixing conflicts and repost
>>>
>>> Changelog of this verbosity is completely useless.
>>>
>>
>> I will take care the next time.
>>
>>>> Changes in v2:
>>>> - Do Soc ver checking for applying erratum
>>>>
>>>> drivers/usb/common/fsl-errata.c | 26 ++
>>>> drivers/usb/host/xhci-dwc3.c| 5 +
>>>> drivers/usb/host/xhci-fsl.c | 8
>>>> include/fsl_usb.h | 1 +
>>>> include/linux/usb/dwc3.h| 2 ++
>>>> 5 files changed, 42 insertions(+)
>>>>
>>>> diff --git a/drivers/usb/common/fsl-errata.c
>>>> b/drivers/usb/common/fsl-errata.c index 183bf2b..f2bffba 100644
>>>> --- a/drivers/usb/common/fsl-errata.c
>>>> +++ b/drivers/usb/common/fsl-errata.c
>>>> @@ -190,4 +190,30 @@ bool has_erratum_a008751(void)
>>>>return false;
>>>> }
>>>>
>>>> +bool has_erratum_a010151(void)
>>>> +{
>>>> + u32 svr = get_svr();
>>>> + u32 soc = SVR_SOC_VER(svr);
>>>> +
>>>> + switch (soc) {
>>>> +#ifdef CONFIG_ARM64
>>>> + case SVR_LS2080A:
>>>> + case SVR_LS2085A:
>>>> + case SVR_LS1046A:
>>>> + case SVR_LS1012A:
>>>> + return IS_SVR_REV(svr, 1, 0);
>>>> + case SVR_LS1043A:
>>>> + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1); #endif
>>>> +#ifdef CONFIG_LS102XA
>>>> + case SOC_VER_LS1020:
>>>> + case SOC_VER_LS1021:
>>>> + case SOC_VER_LS1022:
>>>> + case SOC_VER_SLS1020:
>>>> + return IS_SVR_REV(svr, 2, 0);
>>>> +#endif
>>>> + }
>>>> + return false;
>>>> +}
>>>> +
>>>> #endif
>>>> diff --git a/drivers/usb/host/xhci-dwc3.c
>>>> b/drivers/usb/host/xhci-dwc3.c index 33961cd..adbd9b5 100644
>>>> --- a/drivers/usb/host/xhci-dwc3.c
>>>> +++ b/drivers/usb/host/xhci-dwc3.c
>>>> @@ -97,3 +97,8 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
>>>>setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL |
>>>>GFLADJ_30MHZ(val));
>>>> }
>>>> +
>>>> +void dwc3_set_rxdetect_power_mode(struct dwc3 *dwc3_reg, u32 val) {
>>>> + setbits_le32(&dwc3_reg->g_usb3pipectl[0], val);
>>>
>>> So what would happen if I wanted to clean some bits instead ?
>>
>> Setting the Rx detect in P2 mode is a one time job, and it does not
>> change. Hence, IMO, the clear bit functionality is not required.
>
>Until an SoC comes which has some bits set there and someone wants to clear
>them . At which point, this code will serve as a trap .
>
The default value of the register bit g_usb3pipectl is 0. And the default value
is
not modified anytime during execution. For the unreliable rxdetect, it is set
to P2 mode(by setting the bit to 1). So, if any Soc chooses the rxdetect as P3,
they will not use the function dwc3_set_rxdetect_power_mode
to set the bit.
>>> Why do you even need a dedicated function to write a single register?
>>>
>>
>> The dwc3 phy for the specific controller version
>
>This should be explicitly documented with a comment here.
>
OK. Will take care in the next patch v4.
>> does not reliably
>> support Rx Detect in P3 mode(P3 is the default setting). So, this
>> setting can be used by any other Soc, apart from freescale. IMO, this
>> function is required.
>
>So why won't such a system call single register write directly ?
>
I agree to your point. We can set the bit from fsl specific file
with the function
setbits_le32(fsl_xhci->dwc3_reg->g_usb3pipectl[0],
DWC3_GUSB3PIPECTL_DISRXDETP3);
If any other Soc, other than fsl/nxp wants t
Re: [U-Boot] [PATCH v3] drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controller
>From: Marek Vasut [mailto:ma...@denx.de]
>On 09/14/2016 07:15 AM, Sriram Dash wrote:
>> Currently the controller by default enables the Receive Detect feature
>> in P3 mode in USB 3.0 PHY. However, USB 3.0 PHY does not reliably
>> support receive detection in P3 mode.
>> Enabling the USB3 controller to configure USB in P2 mode whenever the
>> Receive Detect feature is required.
>>
>> Signed-off-by: Sriram Dash
>> Signed-off-by: Rajesh Bhagat
>> ---
>> Changes in v3:
>> - Fixing conflicts and repost
>
>Changelog of this verbosity is completely useless.
>
I will take care the next time.
>> Changes in v2:
>> - Do Soc ver checking for applying erratum
>>
>> drivers/usb/common/fsl-errata.c | 26 ++
>> drivers/usb/host/xhci-dwc3.c| 5 +
>> drivers/usb/host/xhci-fsl.c | 8
>> include/fsl_usb.h | 1 +
>> include/linux/usb/dwc3.h| 2 ++
>> 5 files changed, 42 insertions(+)
>>
>> diff --git a/drivers/usb/common/fsl-errata.c
>> b/drivers/usb/common/fsl-errata.c index 183bf2b..f2bffba 100644
>> --- a/drivers/usb/common/fsl-errata.c
>> +++ b/drivers/usb/common/fsl-errata.c
>> @@ -190,4 +190,30 @@ bool has_erratum_a008751(void)
>> return false;
>> }
>>
>> +bool has_erratum_a010151(void)
>> +{
>> +u32 svr = get_svr();
>> +u32 soc = SVR_SOC_VER(svr);
>> +
>> +switch (soc) {
>> +#ifdef CONFIG_ARM64
>> +case SVR_LS2080A:
>> +case SVR_LS2085A:
>> +case SVR_LS1046A:
>> +case SVR_LS1012A:
>> +return IS_SVR_REV(svr, 1, 0);
>> +case SVR_LS1043A:
>> +return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1); #endif
>> +#ifdef CONFIG_LS102XA
>> +case SOC_VER_LS1020:
>> +case SOC_VER_LS1021:
>> +case SOC_VER_LS1022:
>> +case SOC_VER_SLS1020:
>> +return IS_SVR_REV(svr, 2, 0);
>> +#endif
>> +}
>> +return false;
>> +}
>> +
>> #endif
>> diff --git a/drivers/usb/host/xhci-dwc3.c
>> b/drivers/usb/host/xhci-dwc3.c index 33961cd..adbd9b5 100644
>> --- a/drivers/usb/host/xhci-dwc3.c
>> +++ b/drivers/usb/host/xhci-dwc3.c
>> @@ -97,3 +97,8 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
>> setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL |
>> GFLADJ_30MHZ(val));
>> }
>> +
>> +void dwc3_set_rxdetect_power_mode(struct dwc3 *dwc3_reg, u32 val) {
>> +setbits_le32(&dwc3_reg->g_usb3pipectl[0], val);
>
>So what would happen if I wanted to clean some bits instead ?
Setting the Rx detect in P2 mode is a one time job,
and it does not change. Hence, IMO, the clear bit
functionality is not required.
>Why do you even need a dedicated function to write a single register?
>
The dwc3 phy for the specific controller version does not reliably
support Rx Detect in P3 mode(P3 is the default setting). So, this
setting can be used by any other Soc, apart from freescale. IMO, this
function is required.
>> +}
>> diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
>> index 0e3e056..9297ced 100644
>> --- a/drivers/usb/host/xhci-fsl.c
>> +++ b/drivers/usb/host/xhci-fsl.c
>> @@ -84,6 +84,14 @@ static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci)
>> /* Change beat burst and outstanding pipelined transfers requests */
>> fsl_xhci_set_beat_burst_length(fsl_xhci->dwc3_reg);
>>
>> +/*
>> + * A-010151: USB controller to configure USB in P2 mode
>> + * whenever the Receive Detect feature is required
>> + */
>> +if (has_erratum_a010151())
>> +dwc3_set_rxdetect_power_mode(fsl_xhci->dwc3_reg,
>> + DWC3_GUSB3PIPECTL_DISRXDETP3);
>
>Can't you parse these errata infos from device tree ?
>
Currently, all the freescale Socs using this controller are not using DM.
Shall we proceed with this solution currently, and then when the DM is
supported by all Socs, modify the implementation according to device tree?
What do you suggest?
>> return ret;
>> }
>>
>> diff --git a/include/fsl_usb.h b/include/fsl_usb.h index
>> fc72fb9..73235b8 100644
>> --- a/include/fsl_usb.h
>> +++ b/include/fsl_usb.h
>> @@ -95,5 +95,6 @@ bool has_erratum_a007792(void); bool
>> has_erratum_a005697(void); bool has_erratum_a004477(void); bool
>> has_erratum_a008751(void);
>> +bool has_erratum_a010151(void);
>> #endif
>> #endif /*_ASM_FSL_USB_H_ */
Re: [U-Boot] [PATCH v2] drivers: usb: fsl-dt-fixup: Fix the dt for multiple USB nodes in single traversal of device tree
>From: york sun
>On 09/14/2016 02:35 PM, Marek Vasut wrote:
>> On 09/14/2016 07:22 AM, Sriram Dash wrote:
>>>> From: Sriram Dash [mailto:sriram.d...@nxp.com]
>>>>
>>>
>>> Hello Marek,
>>>
>>> Any comments?
>>
>> Waiting for York to review this.
>>
>> It's a bulky patch V2 without changelog, shall I review the whole
>> thing again ?
>>
Will take care the next time for changelog. I agree the patch is
completely changed from v1. The major change is that the dt traversal
is reduced.
>>>> For FSL USB node fixup, the dt is walked multiple times for fixing
>>>> erratum and phy type. This patch walks the tree and fixes the node till no
>>>> more
>USB nodes are left.
>>>>
>>>> Signed-off-by: Sriram Dash
>>>> Signed-off-by: Rajesh Bhagat
>>>> ---
>>>> drivers/usb/common/fsl-dt-fixup.c | 108
>>>> +-
>>>> 1 file changed, 47 insertions(+), 61 deletions(-)
>>>>
>>>> diff --git a/drivers/usb/common/fsl-dt-fixup.c
>>>> b/drivers/usb/common/fsl-dt-fixup.c
>>>> index 9c48852..df785a6 100644
>>>> --- a/drivers/usb/common/fsl-dt-fixup.c
>>>> +++ b/drivers/usb/common/fsl-dt-fixup.c
>>>> @@ -54,25 +54,19 @@ static int fdt_usb_get_node_type(void *blob, int
>>>> start_offset, }
>>>>
>>>> static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
>>>> - const char *phy_type, int start_offset)
>>>> + const char *phy_type, int node_offset,
>>>> + const char **node_type)
>>>> {
>>>>const char *prop_mode = "dr_mode";
>>>>const char *prop_type = "phy_type";
>>>> - const char *node_type = NULL;
>>>> - int node_offset;
>>>> - int err;
>>>> -
>>>> - err = fdt_usb_get_node_type(blob, start_offset,
>>>> - &node_offset, &node_type);
>>>> - if (err < 0)
>>>> - return err;
>>>> + int err = 0;
>>>>
>>>>if (mode) {
>>>>err = fdt_setprop(blob, node_offset, prop_mode, mode,
>>>> strlen(mode) + 1);
>>>>if (err < 0)
>>>>printf("WARNING: could not set %s for %s: %s.\n",
>>>> - prop_mode, node_type, fdt_strerror(err));
>>>> + prop_mode, *node_type, fdt_strerror(err));
>>>>}
>>>>
>>>>if (phy_type) {
>>>> @@ -80,52 +74,48 @@ static int fdt_fixup_usb_mode_phy_type(void
>>>> *blob, const char *mode,
>>>> strlen(phy_type) + 1);
>>>>if (err < 0)
>>>>printf("WARNING: could not set %s for %s: %s.\n",
>>>> - prop_type, node_type, fdt_strerror(err));
>>>> + prop_type, *node_type, fdt_strerror(err));
>>>>}
>>>>
>>>> - return node_offset;
>>>> + return err;
>>>> }
>>>>
>>>> static int fdt_fixup_usb_erratum(void *blob, const char *prop_erratum,
>>>> - const char *controller_type, int start_offset)
>>>> + const char *controller_type, int node_offset,
>>>> + const char **node_type)
>>>> {
>>>> - int node_offset, err;
>>>> - const char *node_type = NULL;
>>>> + int err = -1;
>>>>const char *node_name = NULL;
>>>>
>>>> - err = fdt_usb_get_node_type(blob, start_offset,
>>>> - &node_offset, &node_type);
>>>> - if (err < 0)
>>>> - return err;
>>>> -
>>>> - if (!strcmp(node_type, FSL_USB2_MPH) || !strcmp(node_type,
>>>> FSL_USB2_DR))
>>>> + if (!strcmp(*node_type, FSL_USB2_MPH) ||
>>>> + !strcmp(*node_type, FSL_USB2_DR))
>>>>node_name = CHIPIDEA_USB2;
>>>>else
>>>> - node_name = node_type;
>>>> + node_name = *node_type;
>>>>if (strcmp(node_name, controller_type))
>>>>return err;
Re: [U-Boot] [PATCH v2] drivers: usb: fsl-dt-fixup: Fix the dt for multiple USB nodes in single traversal of device tree
>From: Sriram Dash [mailto:sriram.d...@nxp.com]
>
Hello Marek,
Any comments?
>For FSL USB node fixup, the dt is walked multiple times for fixing erratum and
>phy
>type. This patch walks the tree and fixes the node till no more USB nodes are
>left.
>
>Signed-off-by: Sriram Dash
>Signed-off-by: Rajesh Bhagat
>---
> drivers/usb/common/fsl-dt-fixup.c | 108 +-
> 1 file changed, 47 insertions(+), 61 deletions(-)
>
>diff --git a/drivers/usb/common/fsl-dt-fixup.c
>b/drivers/usb/common/fsl-dt-fixup.c
>index 9c48852..df785a6 100644
>--- a/drivers/usb/common/fsl-dt-fixup.c
>+++ b/drivers/usb/common/fsl-dt-fixup.c
>@@ -54,25 +54,19 @@ static int fdt_usb_get_node_type(void *blob, int
>start_offset, }
>
> static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
>- const char *phy_type, int start_offset)
>+ const char *phy_type, int node_offset,
>+ const char **node_type)
> {
> const char *prop_mode = "dr_mode";
> const char *prop_type = "phy_type";
>- const char *node_type = NULL;
>- int node_offset;
>- int err;
>-
>- err = fdt_usb_get_node_type(blob, start_offset,
>- &node_offset, &node_type);
>- if (err < 0)
>- return err;
>+ int err = 0;
>
> if (mode) {
> err = fdt_setprop(blob, node_offset, prop_mode, mode,
> strlen(mode) + 1);
> if (err < 0)
> printf("WARNING: could not set %s for %s: %s.\n",
>- prop_mode, node_type, fdt_strerror(err));
>+ prop_mode, *node_type, fdt_strerror(err));
> }
>
> if (phy_type) {
>@@ -80,52 +74,48 @@ static int fdt_fixup_usb_mode_phy_type(void *blob, const
>char *mode,
> strlen(phy_type) + 1);
> if (err < 0)
> printf("WARNING: could not set %s for %s: %s.\n",
>- prop_type, node_type, fdt_strerror(err));
>+ prop_type, *node_type, fdt_strerror(err));
> }
>
>- return node_offset;
>+ return err;
> }
>
> static int fdt_fixup_usb_erratum(void *blob, const char *prop_erratum,
>- const char *controller_type, int start_offset)
>+ const char *controller_type, int node_offset,
>+ const char **node_type)
> {
>- int node_offset, err;
>- const char *node_type = NULL;
>+ int err = -1;
> const char *node_name = NULL;
>
>- err = fdt_usb_get_node_type(blob, start_offset,
>- &node_offset, &node_type);
>- if (err < 0)
>- return err;
>-
>- if (!strcmp(node_type, FSL_USB2_MPH) || !strcmp(node_type,
>FSL_USB2_DR))
>+ if (!strcmp(*node_type, FSL_USB2_MPH) ||
>+ !strcmp(*node_type, FSL_USB2_DR))
> node_name = CHIPIDEA_USB2;
> else
>- node_name = node_type;
>+ node_name = *node_type;
> if (strcmp(node_name, controller_type))
> return err;
>
> err = fdt_setprop(blob, node_offset, prop_erratum, NULL, 0);
> if (err < 0) {
> printf("ERROR: could not set %s for %s: %s.\n",
>- prop_erratum, node_type, fdt_strerror(err));
>+ prop_erratum, *node_type, fdt_strerror(err));
> }
>
>- return node_offset;
>+ return err;
> }
>
>-static int fdt_fixup_erratum(int *usb_erratum_off, void *blob,
>+static int fdt_fixup_erratum(int node_offset, void *blob,
>const char *controller_type, char *str,
>- bool (*has_erratum)(void))
>+ bool (*has_erratum)(void), const char **node_type)
> {
> char buf[32] = {0};
>
> snprintf(buf, sizeof(buf), "fsl,usb-erratum-%s", str);
> if (!has_erratum())
> return -EINVAL;
>- *usb_erratum_off = fdt_fixup_usb_erratum(blob, buf, controller_type,
>- *usb_erratum_off);
>- if (*usb_erratum_off < 0)
>+ node_offset = fdt_fixup_usb_erratum(blob, buf, controller_type,
>+ node_offset, node_type);
>+ if (node_offset < 0)
> return -ENOSPC;
> debug("Adding USB erratum %s\n
[U-Boot] [PATCH v3] drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controller
Currently the controller by default enables the Receive Detect feature in P3
mode in USB 3.0 PHY. However, USB 3.0 PHY does not reliably support receive
detection in P3 mode.
Enabling the USB3 controller to configure USB in P2 mode whenever the Receive
Detect feature is required.
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
Changes in v3:
- Fixing conflicts and repost
Changes in v2:
- Do Soc ver checking for applying erratum
drivers/usb/common/fsl-errata.c | 26 ++
drivers/usb/host/xhci-dwc3.c| 5 +
drivers/usb/host/xhci-fsl.c | 8
include/fsl_usb.h | 1 +
include/linux/usb/dwc3.h| 2 ++
5 files changed, 42 insertions(+)
diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c
index 183bf2b..f2bffba 100644
--- a/drivers/usb/common/fsl-errata.c
+++ b/drivers/usb/common/fsl-errata.c
@@ -190,4 +190,30 @@ bool has_erratum_a008751(void)
return false;
}
+bool has_erratum_a010151(void)
+{
+ u32 svr = get_svr();
+ u32 soc = SVR_SOC_VER(svr);
+
+ switch (soc) {
+#ifdef CONFIG_ARM64
+ case SVR_LS2080A:
+ case SVR_LS2085A:
+ case SVR_LS1046A:
+ case SVR_LS1012A:
+ return IS_SVR_REV(svr, 1, 0);
+ case SVR_LS1043A:
+ return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
+#endif
+#ifdef CONFIG_LS102XA
+ case SOC_VER_LS1020:
+ case SOC_VER_LS1021:
+ case SOC_VER_LS1022:
+ case SOC_VER_SLS1020:
+ return IS_SVR_REV(svr, 2, 0);
+#endif
+ }
+ return false;
+}
+
#endif
diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index 33961cd..adbd9b5 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -97,3 +97,8 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL |
GFLADJ_30MHZ(val));
}
+
+void dwc3_set_rxdetect_power_mode(struct dwc3 *dwc3_reg, u32 val)
+{
+ setbits_le32(&dwc3_reg->g_usb3pipectl[0], val);
+}
diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
index 0e3e056..9297ced 100644
--- a/drivers/usb/host/xhci-fsl.c
+++ b/drivers/usb/host/xhci-fsl.c
@@ -84,6 +84,14 @@ static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci)
/* Change beat burst and outstanding pipelined transfers requests */
fsl_xhci_set_beat_burst_length(fsl_xhci->dwc3_reg);
+ /*
+* A-010151: USB controller to configure USB in P2 mode
+* whenever the Receive Detect feature is required
+*/
+ if (has_erratum_a010151())
+ dwc3_set_rxdetect_power_mode(fsl_xhci->dwc3_reg,
+DWC3_GUSB3PIPECTL_DISRXDETP3);
+
return ret;
}
diff --git a/include/fsl_usb.h b/include/fsl_usb.h
index fc72fb9..73235b8 100644
--- a/include/fsl_usb.h
+++ b/include/fsl_usb.h
@@ -95,5 +95,6 @@ bool has_erratum_a007792(void);
bool has_erratum_a005697(void);
bool has_erratum_a004477(void);
bool has_erratum_a008751(void);
+bool has_erratum_a010151(void);
#endif
#endif /*_ASM_FSL_USB_H_ */
diff --git a/include/linux/usb/dwc3.h b/include/linux/usb/dwc3.h
index 6d1e365..f68cdd2 100644
--- a/include/linux/usb/dwc3.h
+++ b/include/linux/usb/dwc3.h
@@ -184,6 +184,7 @@ struct dwc3 { /*
offset: 0xC100 */
/* Global USB3 PIPE Control Register */
#define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31)
+#define DWC3_GUSB3PIPECTL_DISRXDETP3 (1 << 28)
#define DWC3_GUSB3PIPECTL_SUSPHY (1 << 17)
/* Global TX Fifo Size Register */
@@ -205,5 +206,6 @@ void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode);
void dwc3_core_soft_reset(struct dwc3 *dwc3_reg);
int dwc3_core_init(struct dwc3 *dwc3_reg);
void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val);
+void dwc3_set_rxdetect_power_mode(struct dwc3 *dwc3_reg, u32 val);
#endif
#endif /* __DWC3_H_ */
--
2.1.0
___
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U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controller
>From: Marek Vasut [mailto:ma...@denx.de] >On 08/24/2016 12:39 PM, Sriram Dash wrote: >> Currently the controller by default enables the Receive Detect feature >> in P3 mode in USB 3.0 PHY. However, USB 3.0 PHY does not reliably >> support receive detection in P3 mode. >> Enabling the USB3 controller to configure USB in P2 mode whenever the >> Receive Detect feature is required. >> >> Signed-off-by: Sriram Dash >> Signed-off-by: Rajesh Bhagat >> --- >> Changes in v2: >> - Do Soc ver checking for applying erratum > >I tried applying this on u-boot-usb/next , but it fails to apply, please fix >and repost. > It might be conflicting with the patch for changing burst beat "drivers: usb: xhci-fsl: Change burst beat and outstanding pipelined transfers requests". https://patchwork.ozlabs.org/patch/661426/ I will repost with the burst beat setting applied earlier. >-- >Best regards, >Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controller
>From: Marek Vasut [mailto:ma...@denx.de]
>On 08/26/2016 12:31 PM, Sriram Dash wrote:
>>> From: Marek Vasut [mailto:ma...@denx.de] On 08/25/2016 08:47 AM,
>>> Sriram Dash wrote:
>>>>> From: Marek Vasut [mailto:ma...@denx.de] On 08/24/2016 12:39 PM,
>>>>> Sriram Dash wrote:
>>>>>> Currently the controller by default enables the Receive Detect
>>>>>> feature in P3 mode in USB 3.0 PHY. However, USB 3.0 PHY does not
>>>>>> reliably support receive detection in P3 mode.
>>>>>> Enabling the USB3 controller to configure USB in P2 mode whenever
>>>>>> the Receive Detect feature is required.
>>>>>>
>>>>>> Signed-off-by: Sriram Dash
>>>>>> Signed-off-by: Rajesh Bhagat
>>>>>> ---
>>>>>> Changes in v2:
>>>>>> - Do Soc ver checking for applying erratum
>>>>>>
>>>>>> drivers/usb/common/fsl-errata.c | 26 ++
>>>>>> drivers/usb/host/xhci-dwc3.c| 5 +
>>>>>> drivers/usb/host/xhci-fsl.c | 8
>>>>>> include/fsl_usb.h | 1 +
>>>>>> include/linux/usb/dwc3.h| 2 ++
>>>>>> 5 files changed, 42 insertions(+)
>>>>>>
>>>>>> diff --git a/drivers/usb/common/fsl-errata.c
>>>>>> b/drivers/usb/common/fsl-errata.c index 183bf2b..f2bffba 100644
>>>>>> --- a/drivers/usb/common/fsl-errata.c
>>>>>> +++ b/drivers/usb/common/fsl-errata.c
>>>>>> @@ -190,4 +190,30 @@ bool has_erratum_a008751(void)
>>>>>> return false;
>>>>>> }
>>>>>>
>>>>>> +bool has_erratum_a010151(void)
>>>>>> +{
>>>>>> +u32 svr = get_svr();
>>>>>> +u32 soc = SVR_SOC_VER(svr);
>>>>>> +
>>>>>> +switch (soc) {
>>>>>> +#ifdef CONFIG_ARM64
>>>>>> +case SVR_LS2080A:
>>>>>> +case SVR_LS2085A:
>>>>>> +case SVR_LS1046A:
>>>>>> +case SVR_LS1012A:
>>>>>> +return IS_SVR_REV(svr, 1, 0);
>>>>>> +case SVR_LS1043A:
>>>>>> +return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
>>>>>> #endif
>>>>>> +#ifdef CONFIG_LS102XA
>>>>>> +case SOC_VER_LS1020:
>>>>>> +case SOC_VER_LS1021:
>>>>>> +case SOC_VER_LS1022:
>>>>>> +case SOC_VER_SLS1020:
>>>>>> +return IS_SVR_REV(svr, 2, 0);
>>>>>> +#endif
>>>>>> +}
>>>>>
>>>>> Is the ifdef really needed ?
>>>>>
>>>>
>>>> Yes. The SVR (SVR_LS2080A, SOC_VER_LS1020) are defined in different
>>>> ARCH specific files. So, we have used the ifdefs.
>>>
>>> Or you can just include all of the headers and then you don't need the
>>> ifdef, no ?
>>>
>>
>> The headers for the respective ARCHs are included in fsl_errata.h
>> file. But, there are some macros/structs/variables which are common
>> across the ARCHs, for example: DCFG_DCSR_PORCR1, RCW_SB_EN_REG_INDEX,
>> sys_info, etc. So, they are also kept inside the ifdefs.
>
>I don't understand your argument. What happens if you remove the ifdefs?
>
The fsl_errata.h file includes the headers asm/processor.h(for PPC),
asm/arch-ls102xa/immap_ls102xa.h( for LS1), asm/arch/soc.h(for Layerscape).
As some macros/structs are common across the ARCH, if we remove the ifdefs,
we may experience compilation error on redefinition of the macros and structs.
So, the ifdefs are necessary.
>--
>Best regards,
>Marek Vasut
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Re: [U-Boot] [PATCH v2] drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controller
>From: Marek Vasut [mailto:ma...@denx.de]
>On 08/25/2016 08:47 AM, Sriram Dash wrote:
>>> From: Marek Vasut [mailto:ma...@denx.de] On 08/24/2016 12:39 PM,
>>> Sriram Dash wrote:
>>>> Currently the controller by default enables the Receive Detect
>>>> feature in P3 mode in USB 3.0 PHY. However, USB 3.0 PHY does not
>>>> reliably support receive detection in P3 mode.
>>>> Enabling the USB3 controller to configure USB in P2 mode whenever
>>>> the Receive Detect feature is required.
>>>>
>>>> Signed-off-by: Sriram Dash
>>>> Signed-off-by: Rajesh Bhagat
>>>> ---
>>>> Changes in v2:
>>>> - Do Soc ver checking for applying erratum
>>>>
>>>> drivers/usb/common/fsl-errata.c | 26 ++
>>>> drivers/usb/host/xhci-dwc3.c| 5 +
>>>> drivers/usb/host/xhci-fsl.c | 8
>>>> include/fsl_usb.h | 1 +
>>>> include/linux/usb/dwc3.h| 2 ++
>>>> 5 files changed, 42 insertions(+)
>>>>
>>>> diff --git a/drivers/usb/common/fsl-errata.c
>>>> b/drivers/usb/common/fsl-errata.c index 183bf2b..f2bffba 100644
>>>> --- a/drivers/usb/common/fsl-errata.c
>>>> +++ b/drivers/usb/common/fsl-errata.c
>>>> @@ -190,4 +190,30 @@ bool has_erratum_a008751(void)
>>>>return false;
>>>> }
>>>>
>>>> +bool has_erratum_a010151(void)
>>>> +{
>>>> + u32 svr = get_svr();
>>>> + u32 soc = SVR_SOC_VER(svr);
>>>> +
>>>> + switch (soc) {
>>>> +#ifdef CONFIG_ARM64
>>>> + case SVR_LS2080A:
>>>> + case SVR_LS2085A:
>>>> + case SVR_LS1046A:
>>>> + case SVR_LS1012A:
>>>> + return IS_SVR_REV(svr, 1, 0);
>>>> + case SVR_LS1043A:
>>>> + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1); #endif
>>>> +#ifdef CONFIG_LS102XA
>>>> + case SOC_VER_LS1020:
>>>> + case SOC_VER_LS1021:
>>>> + case SOC_VER_LS1022:
>>>> + case SOC_VER_SLS1020:
>>>> + return IS_SVR_REV(svr, 2, 0);
>>>> +#endif
>>>> + }
>>>
>>> Is the ifdef really needed ?
>>>
>>
>> Yes. The SVR (SVR_LS2080A, SOC_VER_LS1020) are defined in different
>> ARCH specific files. So, we have used the ifdefs.
>
>Or you can just include all of the headers and then you don't need the ifdef,
>no ?
>
The headers for the respective ARCHs are included in fsl_errata.h file. But,
there are some macros/structs/variables which are common across
the ARCHs, for example: DCFG_DCSR_PORCR1, RCW_SB_EN_REG_INDEX,
sys_info, etc. So, they are also kept inside the ifdefs.
>--
>Best regards,
>Marek Vasut
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Re: [U-Boot] [PATCH v2] drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controller
>From: Marek Vasut [mailto:ma...@denx.de]
>On 08/26/2016 12:57 PM, Sriram Dash wrote:
>>> From: Marek Vasut [mailto:ma...@denx.de] On 08/26/2016 12:31 PM,
>>> Sriram Dash wrote:
>>>>> From: Marek Vasut [mailto:ma...@denx.de] On 08/25/2016 08:47 AM,
>>>>> Sriram Dash wrote:
>>>>>>> From: Marek Vasut [mailto:ma...@denx.de] On 08/24/2016 12:39 PM,
>>>>>>> Sriram Dash wrote:
>>>>>>>> Currently the controller by default enables the Receive Detect
>>>>>>>> feature in P3 mode in USB 3.0 PHY. However, USB 3.0 PHY does not
>>>>>>>> reliably support receive detection in P3 mode.
>>>>>>>> Enabling the USB3 controller to configure USB in P2 mode
>>>>>>>> whenever the Receive Detect feature is required.
>>>>>>>>
>>>>>>>> Signed-off-by: Sriram Dash
>>>>>>>> Signed-off-by: Rajesh Bhagat
>>>>>>>> ---
>>>>>>>> Changes in v2:
>>>>>>>> - Do Soc ver checking for applying erratum
>>>>>>>>
>>>>>>>> drivers/usb/common/fsl-errata.c | 26 ++
>>>>>>>> drivers/usb/host/xhci-dwc3.c| 5 +
>>>>>>>> drivers/usb/host/xhci-fsl.c | 8
>>>>>>>> include/fsl_usb.h | 1 +
>>>>>>>> include/linux/usb/dwc3.h| 2 ++
>>>>>>>> 5 files changed, 42 insertions(+)
>>>>>>>>
>>>>>>>> diff --git a/drivers/usb/common/fsl-errata.c
>>>>>>>> b/drivers/usb/common/fsl-errata.c index 183bf2b..f2bffba 100644
>>>>>>>> --- a/drivers/usb/common/fsl-errata.c
>>>>>>>> +++ b/drivers/usb/common/fsl-errata.c
>>>>>>>> @@ -190,4 +190,30 @@ bool has_erratum_a008751(void)
>>>>>>>>return false;
>>>>>>>> }
>>>>>>>>
>>>>>>>> +bool has_erratum_a010151(void)
>>>>>>>> +{
>>>>>>>> + u32 svr = get_svr();
>>>>>>>> + u32 soc = SVR_SOC_VER(svr);
>>>>>>>> +
>>>>>>>> + switch (soc) {
>>>>>>>> +#ifdef CONFIG_ARM64
>>>>>>>> + case SVR_LS2080A:
>>>>>>>> + case SVR_LS2085A:
>>>>>>>> + case SVR_LS1046A:
>>>>>>>> + case SVR_LS1012A:
>>>>>>>> + return IS_SVR_REV(svr, 1, 0);
>>>>>>>> + case SVR_LS1043A:
>>>>>>>> + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
>#endif
>>>>>>>> +#ifdef CONFIG_LS102XA
>>>>>>>> + case SOC_VER_LS1020:
>>>>>>>> + case SOC_VER_LS1021:
>>>>>>>> + case SOC_VER_LS1022:
>>>>>>>> + case SOC_VER_SLS1020:
>>>>>>>> + return IS_SVR_REV(svr, 2, 0); #endif
>>>>>>>> + }
>>>>>>>
>>>>>>> Is the ifdef really needed ?
>>>>>>>
>>>>>>
>>>>>> Yes. The SVR (SVR_LS2080A, SOC_VER_LS1020) are defined in
>>>>>> different ARCH specific files. So, we have used the ifdefs.
>>>>>
>>>>> Or you can just include all of the headers and then you don't need the
>>>>> ifdef, no
>?
>>>>>
>>>>
>>>> The headers for the respective ARCHs are included in fsl_errata.h
>>>> file. But, there are some macros/structs/variables which are common
>>>> across the ARCHs, for example: DCFG_DCSR_PORCR1,
>>>> RCW_SB_EN_REG_INDEX, sys_info, etc. So, they are also kept inside the
>>>> ifdefs.
>>>
>>> I don't understand your argument. What happens if you remove the ifdefs?
>>>
>>
>> The fsl_errata.h file includes the headers asm/processor.h(for PPC),
>> asm/arch-ls102xa/immap_ls102xa.h( for LS1), asm/arch/soc.h(for Layerscape).
>> As some macros/structs are common across the ARCH, if we remove the
>> ifdefs, we may
>
>may or will ?
>
They will cause compilation issues.
>> experience compilation error on redefinition of the macros and structs.
>
>And these are not easy to fix ?
>
There will be many ARCH specific modifications required for carrying
out the changes involving a lot of affected Socs. We will take it up in
the near future.
>> So, the ifdefs are necessary.
>>
>>> --
>>> Best regards,
>>> Marek Vasut
>
>
>--
>Best regards,
>Marek Vasut
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Re: [U-Boot] [PATCH v2] drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controller
>From: Marek Vasut [mailto:ma...@denx.de]
>On 08/24/2016 12:39 PM, Sriram Dash wrote:
>> Currently the controller by default enables the Receive Detect feature
>> in P3 mode in USB 3.0 PHY. However, USB 3.0 PHY does not reliably
>> support receive detection in P3 mode.
>> Enabling the USB3 controller to configure USB in P2 mode whenever the
>> Receive Detect feature is required.
>>
>> Signed-off-by: Sriram Dash
>> Signed-off-by: Rajesh Bhagat
>> ---
>> Changes in v2:
>> - Do Soc ver checking for applying erratum
>>
>> drivers/usb/common/fsl-errata.c | 26 ++
>> drivers/usb/host/xhci-dwc3.c| 5 +
>> drivers/usb/host/xhci-fsl.c | 8
>> include/fsl_usb.h | 1 +
>> include/linux/usb/dwc3.h| 2 ++
>> 5 files changed, 42 insertions(+)
>>
>> diff --git a/drivers/usb/common/fsl-errata.c
>> b/drivers/usb/common/fsl-errata.c index 183bf2b..f2bffba 100644
>> --- a/drivers/usb/common/fsl-errata.c
>> +++ b/drivers/usb/common/fsl-errata.c
>> @@ -190,4 +190,30 @@ bool has_erratum_a008751(void)
>> return false;
>> }
>>
>> +bool has_erratum_a010151(void)
>> +{
>> +u32 svr = get_svr();
>> +u32 soc = SVR_SOC_VER(svr);
>> +
>> +switch (soc) {
>> +#ifdef CONFIG_ARM64
>> +case SVR_LS2080A:
>> +case SVR_LS2085A:
>> +case SVR_LS1046A:
>> +case SVR_LS1012A:
>> +return IS_SVR_REV(svr, 1, 0);
>> +case SVR_LS1043A:
>> +return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1); #endif
>> +#ifdef CONFIG_LS102XA
>> +case SOC_VER_LS1020:
>> +case SOC_VER_LS1021:
>> +case SOC_VER_LS1022:
>> +case SOC_VER_SLS1020:
>> +return IS_SVR_REV(svr, 2, 0);
>> +#endif
>> +}
>
>Is the ifdef really needed ?
>
Yes. The SVR (SVR_LS2080A, SOC_VER_LS1020) are defined in different ARCH
specific files. So, we have used the ifdefs.
>--
>Best regards,
>Marek Vasut
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[U-Boot] [PATCH v2] drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controller
Currently the controller by default enables the Receive Detect feature in P3
mode in USB 3.0 PHY. However, USB 3.0 PHY does not reliably support receive
detection in P3 mode.
Enabling the USB3 controller to configure USB in P2 mode whenever the Receive
Detect feature is required.
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
Changes in v2:
- Do Soc ver checking for applying erratum
drivers/usb/common/fsl-errata.c | 26 ++
drivers/usb/host/xhci-dwc3.c| 5 +
drivers/usb/host/xhci-fsl.c | 8
include/fsl_usb.h | 1 +
include/linux/usb/dwc3.h| 2 ++
5 files changed, 42 insertions(+)
diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c
index 183bf2b..f2bffba 100644
--- a/drivers/usb/common/fsl-errata.c
+++ b/drivers/usb/common/fsl-errata.c
@@ -190,4 +190,30 @@ bool has_erratum_a008751(void)
return false;
}
+bool has_erratum_a010151(void)
+{
+ u32 svr = get_svr();
+ u32 soc = SVR_SOC_VER(svr);
+
+ switch (soc) {
+#ifdef CONFIG_ARM64
+ case SVR_LS2080A:
+ case SVR_LS2085A:
+ case SVR_LS1046A:
+ case SVR_LS1012A:
+ return IS_SVR_REV(svr, 1, 0);
+ case SVR_LS1043A:
+ return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
+#endif
+#ifdef CONFIG_LS102XA
+ case SOC_VER_LS1020:
+ case SOC_VER_LS1021:
+ case SOC_VER_LS1022:
+ case SOC_VER_SLS1020:
+ return IS_SVR_REV(svr, 2, 0);
+#endif
+ }
+ return false;
+}
+
#endif
diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index 33961cd..adbd9b5 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -97,3 +97,8 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL |
GFLADJ_30MHZ(val));
}
+
+void dwc3_set_rxdetect_power_mode(struct dwc3 *dwc3_reg, u32 val)
+{
+ setbits_le32(&dwc3_reg->g_usb3pipectl[0], val);
+}
diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
index bdcd4f1..8392285 100644
--- a/drivers/usb/host/xhci-fsl.c
+++ b/drivers/usb/host/xhci-fsl.c
@@ -74,6 +74,14 @@ static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci)
/* Set GFLADJ_30MHZ as 20h as per XHCI spec default value */
dwc3_set_fladj(fsl_xhci->dwc3_reg, GFLADJ_30MHZ_DEFAULT);
+ /*
+* A-010151: USB controller to configure USB in P2 mode
+* whenever the Receive Detect feature is required
+*/
+ if (has_erratum_a010151())
+ dwc3_set_rxdetect_power_mode(fsl_xhci->dwc3_reg,
+DWC3_GUSB3PIPECTL_DISRXDETP3);
+
return ret;
}
diff --git a/include/fsl_usb.h b/include/fsl_usb.h
index fc72fb9..73235b8 100644
--- a/include/fsl_usb.h
+++ b/include/fsl_usb.h
@@ -95,5 +95,6 @@ bool has_erratum_a007792(void);
bool has_erratum_a005697(void);
bool has_erratum_a004477(void);
bool has_erratum_a008751(void);
+bool has_erratum_a010151(void);
#endif
#endif /*_ASM_FSL_USB_H_ */
diff --git a/include/linux/usb/dwc3.h b/include/linux/usb/dwc3.h
index 6d1e365..f68cdd2 100644
--- a/include/linux/usb/dwc3.h
+++ b/include/linux/usb/dwc3.h
@@ -184,6 +184,7 @@ struct dwc3 { /*
offset: 0xC100 */
/* Global USB3 PIPE Control Register */
#define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31)
+#define DWC3_GUSB3PIPECTL_DISRXDETP3 (1 << 28)
#define DWC3_GUSB3PIPECTL_SUSPHY (1 << 17)
/* Global TX Fifo Size Register */
@@ -205,5 +206,6 @@ void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode);
void dwc3_core_soft_reset(struct dwc3 *dwc3_reg);
int dwc3_core_init(struct dwc3 *dwc3_reg);
void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val);
+void dwc3_set_rxdetect_power_mode(struct dwc3 *dwc3_reg, u32 val);
#endif
#endif /* __DWC3_H_ */
--
2.1.0
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Re: [U-Boot] [PATCH v2] drivers: usb: xhci-fsl: Change burst beat and outstanding pipelined transfers requests
>From: york sun >On 08/22/2016 06:54 AM, Marek Vasut wrote: >> On 08/22/2016 02:25 PM, Sriram Dash wrote: >>> This is required for better performance, and performs below tuning: >>> 1. Enable burst length set, and define it as 4/8/16. > >Isn't it odd to put a date here? > Hello York, Here we are enabling the INCR4, INCR 8 and INCR16 burst type for the usb transfers. >>> 2. Set burst request limit to 16 requests. >>> >>> Signed-off-by: Rajesh Bhagat >>> Signed-off-by: Sriram Dash >> >> Looks OK to me. York ? >> > >Other than that, Reviewed-by: York Sun ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controller
>From: york sun
>On 08/19/2016 03:13 AM, Sriram Dash wrote:
>> Currently the controller by default enables the Receive Detect feature
>> in P3 mode in USB 3.0 PHY. However, USB 3.0 PHY does not reliably
>> support receive detection in P3 mode.
>> Enabling the USB3 controller to configure USB in P2 mode whenever the
>> Receive Detect feature is required.
>>
>> Signed-off-by: Sriram Dash
>> Signed-off-by: Rajesh Bhagat
>> ---
>> drivers/usb/host/xhci-dwc3.c | 5 + drivers/usb/host/xhci-fsl.c
>> | 7 +++
>> include/linux/usb/dwc3.h | 2 ++
>> 3 files changed, 14 insertions(+)
>>
>> diff --git a/drivers/usb/host/xhci-dwc3.c
>> b/drivers/usb/host/xhci-dwc3.c index 33961cd..adbd9b5 100644
>> --- a/drivers/usb/host/xhci-dwc3.c
>> +++ b/drivers/usb/host/xhci-dwc3.c
>> @@ -97,3 +97,8 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
>> setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL |
>> GFLADJ_30MHZ(val));
>> }
>> +
>> +void dwc3_set_rxdetect_power_mode(struct dwc3 *dwc3_reg, u32 val) {
>> +setbits_le32(&dwc3_reg->g_usb3pipectl[0], val); }
>> diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
>> index bdcd4f1..d9dbf1f 100644
>> --- a/drivers/usb/host/xhci-fsl.c
>> +++ b/drivers/usb/host/xhci-fsl.c
>> @@ -74,6 +74,13 @@ static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci)
>> /* Set GFLADJ_30MHZ as 20h as per XHCI spec default value */
>> dwc3_set_fladj(fsl_xhci->dwc3_reg, GFLADJ_30MHZ_DEFAULT);
>>
>> +/*
>> + * A-010151: USB controller to configure USB in P2 mode
>> + * whenever the Receive Detect feature is required
>> + */
>> +dwc3_set_rxdetect_power_mode(fsl_xhci->dwc3_reg,
>> + DWC3_GUSB3PIPECTL_DISRXDETP3);
>> +
>
>Would it be appropriate to gate the code by checking SoC version?
>
Yes York. Will modify in v2.
>York
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Re: [U-Boot] [PATCH] drivers: usb: xhci-fsl: Change burst beat and outstanding pipelined transfers requests
>From: Marek Vasut [mailto:ma...@denx.de]
>On 08/19/2016 07:51 AM, Sriram Dash wrote:
>> This is required for better performance, and performs below tuning:
>> 1. Enable burst length set, and define it as 4/8/16.
>> 2. Set burst request limit to 16 requests.
>>
>> Signed-off-by: Rajesh Bhagat
>> Signed-off-by: Sriram Dash
>> ---
>> drivers/usb/host/xhci-fsl.c | 13 +
>> include/linux/usb/xhci-fsl.h | 3 +++
>> 2 files changed, 16 insertions(+)
>>
>> diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
>> index bdcd4f1..082924f 100644
>> --- a/drivers/usb/host/xhci-fsl.c
>> +++ b/drivers/usb/host/xhci-fsl.c
>> @@ -58,6 +58,16 @@ static void fsl_apply_xhci_errata(void)
>> }
>> }
>>
>> +static void fsl_xhci_set_beat_burst_length(struct dwc3 *dwc3_reg) {
>> +int val = readl(&dwc3_reg->g_sbuscfg0);
>> +
>> +val &= ~USB3_ENABLE_BEAT_BURST_MASK;
>> +writel(val | USB3_ENABLE_BEAT_BURST, &dwc3_reg->g_sbuscfg0);
>> +val = readl(&dwc3_reg->g_sbuscfg1);
>> +writel(val | USB3_SET_BEAT_BURST_LIMIT, &dwc3_reg->g_sbuscfg1);
>
>setbits_le32() ?
>
Ok. Instead of writel, I will use clrsetbits_le32. What do you say?
>> +}
>> +
>> static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci) {
>> int ret = 0;
>> @@ -74,6 +84,9 @@ static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci)
>> /* Set GFLADJ_30MHZ as 20h as per XHCI spec default value */
>> dwc3_set_fladj(fsl_xhci->dwc3_reg, GFLADJ_30MHZ_DEFAULT);
>>
>> +/* Change beat burst and outstanding pipelined transfers requests */
>> +fsl_xhci_set_beat_burst_length(fsl_xhci->dwc3_reg);
>> +
>> return ret;
>> }
>>
>> diff --git a/include/linux/usb/xhci-fsl.h
>> b/include/linux/usb/xhci-fsl.h index 199f366..1032763 100644
>> --- a/include/linux/usb/xhci-fsl.h
>> +++ b/include/linux/usb/xhci-fsl.h
>> @@ -20,6 +20,9 @@
>> #define USB3_PHY_TX_RX_POWERON (USB3_PHY_RX_POWERON |
>USB3_PHY_TX_POWERON)
>> #define USB3_PWRCTL_CLK_CMD_SHIFT 14
>> #define USB3_PWRCTL_CLK_FREQ_SHIFT 22
>> +#define USB3_ENABLE_BEAT_BURST 0xF
>> +#define USB3_ENABLE_BEAT_BURST_MASK 0xFF
>> +#define USB3_SET_BEAT_BURST_LIMIT 0xF00
>>
>> /* USBOTGSS_WRAPPER definitions */
>> #define USBOTGSS_WRAPRESET BIT(17)
>>
>
>
>--
>Best regards,
>Marek Vasut
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[U-Boot] [PATCH v2] drivers: usb: xhci-fsl: Change burst beat and outstanding pipelined transfers requests
This is required for better performance, and performs below tuning:
1. Enable burst length set, and define it as 4/8/16.
2. Set burst request limit to 16 requests.
Signed-off-by: Rajesh Bhagat
Signed-off-by: Sriram Dash
---
Changes in v2:
- using clrsetbits_le32 and setbits_le32 instead of writel
drivers/usb/host/xhci-fsl.c | 10 ++
include/linux/usb/xhci-fsl.h | 3 +++
2 files changed, 13 insertions(+)
diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
index bdcd4f1..0e3e056 100644
--- a/drivers/usb/host/xhci-fsl.c
+++ b/drivers/usb/host/xhci-fsl.c
@@ -58,6 +58,13 @@ static void fsl_apply_xhci_errata(void)
}
}
+static void fsl_xhci_set_beat_burst_length(struct dwc3 *dwc3_reg)
+{
+ clrsetbits_le32(&dwc3_reg->g_sbuscfg0, USB3_ENABLE_BEAT_BURST_MASK,
+ USB3_ENABLE_BEAT_BURST);
+ setbits_le32(&dwc3_reg->g_sbuscfg1, USB3_SET_BEAT_BURST_LIMIT);
+}
+
static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci)
{
int ret = 0;
@@ -74,6 +81,9 @@ static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci)
/* Set GFLADJ_30MHZ as 20h as per XHCI spec default value */
dwc3_set_fladj(fsl_xhci->dwc3_reg, GFLADJ_30MHZ_DEFAULT);
+ /* Change beat burst and outstanding pipelined transfers requests */
+ fsl_xhci_set_beat_burst_length(fsl_xhci->dwc3_reg);
+
return ret;
}
diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h
index 199f366..1032763 100644
--- a/include/linux/usb/xhci-fsl.h
+++ b/include/linux/usb/xhci-fsl.h
@@ -20,6 +20,9 @@
#define USB3_PHY_TX_RX_POWERON (USB3_PHY_RX_POWERON | USB3_PHY_TX_POWERON)
#define USB3_PWRCTL_CLK_CMD_SHIFT 14
#define USB3_PWRCTL_CLK_FREQ_SHIFT 22
+#define USB3_ENABLE_BEAT_BURST 0xF
+#define USB3_ENABLE_BEAT_BURST_MASK0xFF
+#define USB3_SET_BEAT_BURST_LIMIT 0xF00
/* USBOTGSS_WRAPPER definitions */
#define USBOTGSS_WRAPRESET BIT(17)
--
2.1.0
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Re: [U-Boot] [PATCH] drivers: usb: xhci-fsl: Change burst beat and outstanding pipelined transfers requests
>From: Marek Vasut [mailto:ma...@denx.de]
>On 08/22/2016 10:24 AM, Sriram Dash wrote:
>>> From: Marek Vasut [mailto:ma...@denx.de] On 08/19/2016 07:51 AM,
>>> Sriram Dash wrote:
>>>> This is required for better performance, and performs below tuning:
>>>> 1. Enable burst length set, and define it as 4/8/16.
>>>> 2. Set burst request limit to 16 requests.
>>>>
>>>> Signed-off-by: Rajesh Bhagat
>>>> Signed-off-by: Sriram Dash
>>>> ---
>>>> drivers/usb/host/xhci-fsl.c | 13 +
>>>> include/linux/usb/xhci-fsl.h | 3 +++
>>>> 2 files changed, 16 insertions(+)
>>>>
>>>> diff --git a/drivers/usb/host/xhci-fsl.c
>>>> b/drivers/usb/host/xhci-fsl.c index bdcd4f1..082924f 100644
>>>> --- a/drivers/usb/host/xhci-fsl.c
>>>> +++ b/drivers/usb/host/xhci-fsl.c
>>>> @@ -58,6 +58,16 @@ static void fsl_apply_xhci_errata(void)
>>>>}
>>>> }
>>>>
>>>> +static void fsl_xhci_set_beat_burst_length(struct dwc3 *dwc3_reg) {
>>>> + int val = readl(&dwc3_reg->g_sbuscfg0);
>>>> +
>>>> + val &= ~USB3_ENABLE_BEAT_BURST_MASK;
>>>> + writel(val | USB3_ENABLE_BEAT_BURST, &dwc3_reg->g_sbuscfg0);
>>>> + val = readl(&dwc3_reg->g_sbuscfg1);
>>>> + writel(val | USB3_SET_BEAT_BURST_LIMIT, &dwc3_reg->g_sbuscfg1);
>>>
>>> setbits_le32() ?
>>>
>>
>> Ok. Instead of writel, I will use clrsetbits_le32. What do you say?
>
>For the top part, yes. For the bottom part, use setbits_le32() only .
>
OK. Will take care in V2.
>>>> +}
>>>> +
>>>> static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci) {
>>>>int ret = 0;
>>>> @@ -74,6 +84,9 @@ static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci)
>>>>/* Set GFLADJ_30MHZ as 20h as per XHCI spec default value */
>>>>dwc3_set_fladj(fsl_xhci->dwc3_reg, GFLADJ_30MHZ_DEFAULT);
>>>>
>>>> + /* Change beat burst and outstanding pipelined transfers requests */
>>>> + fsl_xhci_set_beat_burst_length(fsl_xhci->dwc3_reg);
>>>> +
>>>>return ret;
>>>> }
>>>>
>>>> diff --git a/include/linux/usb/xhci-fsl.h
>>>> b/include/linux/usb/xhci-fsl.h index 199f366..1032763 100644
>>>> --- a/include/linux/usb/xhci-fsl.h
>>>> +++ b/include/linux/usb/xhci-fsl.h
>>>> @@ -20,6 +20,9 @@
>>>> #define USB3_PHY_TX_RX_POWERON(USB3_PHY_RX_POWERON |
>>> USB3_PHY_TX_POWERON)
>>>> #define USB3_PWRCTL_CLK_CMD_SHIFT 14
>>>> #define USB3_PWRCTL_CLK_FREQ_SHIFT22
>>>> +#define USB3_ENABLE_BEAT_BURST0xF
>>>> +#define USB3_ENABLE_BEAT_BURST_MASK 0xFF
>>>> +#define USB3_SET_BEAT_BURST_LIMIT 0xF00
>>>>
>>>> /* USBOTGSS_WRAPPER definitions */
>>>> #define USBOTGSS_WRAPRESETBIT(17)
>>>>
>>>
>>>
>>> --
>>> Best regards,
>>> Marek Vasut
>
>
>--
>Best regards,
>Marek Vasut
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[U-Boot] [PATCH] drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controller
Currently the controller by default enables the Receive Detect feature in P3
mode in USB 3.0 PHY. However, USB 3.0 PHY does not reliably support receive
detection in P3 mode.
Enabling the USB3 controller to configure USB in P2 mode whenever the Receive
Detect feature is required.
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
drivers/usb/host/xhci-dwc3.c | 5 +
drivers/usb/host/xhci-fsl.c | 7 +++
include/linux/usb/dwc3.h | 2 ++
3 files changed, 14 insertions(+)
diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index 33961cd..adbd9b5 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -97,3 +97,8 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL |
GFLADJ_30MHZ(val));
}
+
+void dwc3_set_rxdetect_power_mode(struct dwc3 *dwc3_reg, u32 val)
+{
+ setbits_le32(&dwc3_reg->g_usb3pipectl[0], val);
+}
diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
index bdcd4f1..d9dbf1f 100644
--- a/drivers/usb/host/xhci-fsl.c
+++ b/drivers/usb/host/xhci-fsl.c
@@ -74,6 +74,13 @@ static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci)
/* Set GFLADJ_30MHZ as 20h as per XHCI spec default value */
dwc3_set_fladj(fsl_xhci->dwc3_reg, GFLADJ_30MHZ_DEFAULT);
+ /*
+* A-010151: USB controller to configure USB in P2 mode
+* whenever the Receive Detect feature is required
+*/
+ dwc3_set_rxdetect_power_mode(fsl_xhci->dwc3_reg,
+DWC3_GUSB3PIPECTL_DISRXDETP3);
+
return ret;
}
diff --git a/include/linux/usb/dwc3.h b/include/linux/usb/dwc3.h
index 6d1e365..f68cdd2 100644
--- a/include/linux/usb/dwc3.h
+++ b/include/linux/usb/dwc3.h
@@ -184,6 +184,7 @@ struct dwc3 { /*
offset: 0xC100 */
/* Global USB3 PIPE Control Register */
#define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31)
+#define DWC3_GUSB3PIPECTL_DISRXDETP3 (1 << 28)
#define DWC3_GUSB3PIPECTL_SUSPHY (1 << 17)
/* Global TX Fifo Size Register */
@@ -205,5 +206,6 @@ void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode);
void dwc3_core_soft_reset(struct dwc3 *dwc3_reg);
int dwc3_core_init(struct dwc3 *dwc3_reg);
void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val);
+void dwc3_set_rxdetect_power_mode(struct dwc3 *dwc3_reg, u32 val);
#endif
#endif /* __DWC3_H_ */
--
2.1.0
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[U-Boot] [PATCH] drivers: usb: xhci-fsl: Change burst beat and outstanding pipelined transfers requests
This is required for better performance, and performs below tuning:
1. Enable burst length set, and define it as 4/8/16.
2. Set burst request limit to 16 requests.
Signed-off-by: Rajesh Bhagat
Signed-off-by: Sriram Dash
---
drivers/usb/host/xhci-fsl.c | 13 +
include/linux/usb/xhci-fsl.h | 3 +++
2 files changed, 16 insertions(+)
diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
index bdcd4f1..082924f 100644
--- a/drivers/usb/host/xhci-fsl.c
+++ b/drivers/usb/host/xhci-fsl.c
@@ -58,6 +58,16 @@ static void fsl_apply_xhci_errata(void)
}
}
+static void fsl_xhci_set_beat_burst_length(struct dwc3 *dwc3_reg)
+{
+ int val = readl(&dwc3_reg->g_sbuscfg0);
+
+ val &= ~USB3_ENABLE_BEAT_BURST_MASK;
+ writel(val | USB3_ENABLE_BEAT_BURST, &dwc3_reg->g_sbuscfg0);
+ val = readl(&dwc3_reg->g_sbuscfg1);
+ writel(val | USB3_SET_BEAT_BURST_LIMIT, &dwc3_reg->g_sbuscfg1);
+}
+
static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci)
{
int ret = 0;
@@ -74,6 +84,9 @@ static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci)
/* Set GFLADJ_30MHZ as 20h as per XHCI spec default value */
dwc3_set_fladj(fsl_xhci->dwc3_reg, GFLADJ_30MHZ_DEFAULT);
+ /* Change beat burst and outstanding pipelined transfers requests */
+ fsl_xhci_set_beat_burst_length(fsl_xhci->dwc3_reg);
+
return ret;
}
diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h
index 199f366..1032763 100644
--- a/include/linux/usb/xhci-fsl.h
+++ b/include/linux/usb/xhci-fsl.h
@@ -20,6 +20,9 @@
#define USB3_PHY_TX_RX_POWERON (USB3_PHY_RX_POWERON | USB3_PHY_TX_POWERON)
#define USB3_PWRCTL_CLK_CMD_SHIFT 14
#define USB3_PWRCTL_CLK_FREQ_SHIFT 22
+#define USB3_ENABLE_BEAT_BURST 0xF
+#define USB3_ENABLE_BEAT_BURST_MASK0xFF
+#define USB3_SET_BEAT_BURST_LIMIT 0xF00
/* USBOTGSS_WRAPPER definitions */
#define USBOTGSS_WRAPRESET BIT(17)
--
2.1.0
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[U-Boot] [PATCH v2] drivers: usb: fsl-dt-fixup: Fix the dt for multiple USB nodes in single traversal of device tree
For FSL USB node fixup, the dt is walked multiple times for
fixing erratum and phy type. This patch walks the tree and
fixes the node till no more USB nodes are left.
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
drivers/usb/common/fsl-dt-fixup.c | 108 +-
1 file changed, 47 insertions(+), 61 deletions(-)
diff --git a/drivers/usb/common/fsl-dt-fixup.c
b/drivers/usb/common/fsl-dt-fixup.c
index 9c48852..df785a6 100644
--- a/drivers/usb/common/fsl-dt-fixup.c
+++ b/drivers/usb/common/fsl-dt-fixup.c
@@ -54,25 +54,19 @@ static int fdt_usb_get_node_type(void *blob, int
start_offset,
}
static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
- const char *phy_type, int start_offset)
+ const char *phy_type, int node_offset,
+ const char **node_type)
{
const char *prop_mode = "dr_mode";
const char *prop_type = "phy_type";
- const char *node_type = NULL;
- int node_offset;
- int err;
-
- err = fdt_usb_get_node_type(blob, start_offset,
- &node_offset, &node_type);
- if (err < 0)
- return err;
+ int err = 0;
if (mode) {
err = fdt_setprop(blob, node_offset, prop_mode, mode,
strlen(mode) + 1);
if (err < 0)
printf("WARNING: could not set %s for %s: %s.\n",
- prop_mode, node_type, fdt_strerror(err));
+ prop_mode, *node_type, fdt_strerror(err));
}
if (phy_type) {
@@ -80,52 +74,48 @@ static int fdt_fixup_usb_mode_phy_type(void *blob, const
char *mode,
strlen(phy_type) + 1);
if (err < 0)
printf("WARNING: could not set %s for %s: %s.\n",
- prop_type, node_type, fdt_strerror(err));
+ prop_type, *node_type, fdt_strerror(err));
}
- return node_offset;
+ return err;
}
static int fdt_fixup_usb_erratum(void *blob, const char *prop_erratum,
-const char *controller_type, int start_offset)
+const char *controller_type, int node_offset,
+const char **node_type)
{
- int node_offset, err;
- const char *node_type = NULL;
+ int err = -1;
const char *node_name = NULL;
- err = fdt_usb_get_node_type(blob, start_offset,
- &node_offset, &node_type);
- if (err < 0)
- return err;
-
- if (!strcmp(node_type, FSL_USB2_MPH) || !strcmp(node_type, FSL_USB2_DR))
+ if (!strcmp(*node_type, FSL_USB2_MPH) ||
+ !strcmp(*node_type, FSL_USB2_DR))
node_name = CHIPIDEA_USB2;
else
- node_name = node_type;
+ node_name = *node_type;
if (strcmp(node_name, controller_type))
return err;
err = fdt_setprop(blob, node_offset, prop_erratum, NULL, 0);
if (err < 0) {
printf("ERROR: could not set %s for %s: %s.\n",
- prop_erratum, node_type, fdt_strerror(err));
+ prop_erratum, *node_type, fdt_strerror(err));
}
- return node_offset;
+ return err;
}
-static int fdt_fixup_erratum(int *usb_erratum_off, void *blob,
+static int fdt_fixup_erratum(int node_offset, void *blob,
const char *controller_type, char *str,
-bool (*has_erratum)(void))
+bool (*has_erratum)(void), const char **node_type)
{
char buf[32] = {0};
snprintf(buf, sizeof(buf), "fsl,usb-erratum-%s", str);
if (!has_erratum())
return -EINVAL;
- *usb_erratum_off = fdt_fixup_usb_erratum(blob, buf, controller_type,
-*usb_erratum_off);
- if (*usb_erratum_off < 0)
+ node_offset = fdt_fixup_usb_erratum(blob, buf, controller_type,
+ node_offset, node_type);
+ if (node_offset < 0)
return -ENOSPC;
debug("Adding USB erratum %s\n", str);
return 0;
@@ -135,23 +125,23 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
{
static const char * const modes[] = { "host", "peripheral", "otg" };
static const char * const phys[] = { "ulpi", "utmi", "utmi_dual" };
- int usb_erratum_a006261_off = -1;
- int usb_erratum_a007075_off = -1;
- int usb_erratum_a007792_off = -1;
- int us
[U-Boot] [PATCH v3 3/3] mpc85xx: powerpc: usb: Update the list of Socs afftected by erratum A006261
Apply the erratum A006261 for the following Socs: P2041 rev 2.0, P2040 rev 2.0, P5040 rev 2.0, 2.1 Do not apply erratum A006261 for the following Socs: T4160, T4080, T1040, T1042, T1020, T1022, T2080, T2081 Erratum A006261 is applicable for the following Socs: P1010(1.0, 2.0), P2041(1.0, 1.1, 2.0, 2.1), P2040(1.0, 1.1, 2.0, 2.1), P3041(1.0, 1.1, 2.0, 2.1), P5010(1.0, 2.0), P5020(1.0, 2.0), P5021(1.0, 2.0), T4240(1.0, 2.0), P5040(1.0,2.0,2.1). Signed-off-by: Sriram Dash Signed-off-by: Rajesh Bhagat --- Changes in v3: - Modify the commit message - Modify the commit description - Make a single patch for all the Socs getting affected by erratum A6261. Also, list the current Socs in description, for which erratum A006261 is applicable. arch/powerpc/include/asm/config_mpc85xx.h | 4 +--- drivers/usb/common/fsl-errata.c | 13 - 2 files changed, 5 insertions(+), 12 deletions(-) diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 9b7feda..6d845e8 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -641,6 +641,7 @@ #define CONFIG_SYS_NUM_FM2_DTSEC 8 #define CONFIG_SYS_NUM_FM2_10GEC 2 #define CONFIG_NUM_DDR_CONTROLLERS 3 +#define CONFIG_SYS_FSL_ERRATUM_A006261 #else #define CONFIG_SYS_NUM_FM1_DTSEC 6 #define CONFIG_SYS_NUM_FM1_10GEC 1 @@ -682,7 +683,6 @@ #define CONFIG_SYS_FSL_ERRATUM_A004468 #define CONFIG_SYS_FSL_ERRATUM_A_004934 #define CONFIG_SYS_FSL_ERRATUM_A005871 -#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A006379 #define CONFIG_SYS_FSL_ERRATUM_A007186 #define CONFIG_SYS_FSL_ERRATUM_A006593 @@ -800,7 +800,6 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022) #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4" #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY -#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe00 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE @@ -908,7 +907,6 @@ defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013) #define CONFIG_SYS_FSL_SFP_VER_3_0 #define CONFIG_SYS_FSL_ISBC_VER2 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 -#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A006593 #define CONFIG_SYS_FSL_ERRATUM_A007186 #define CONFIG_SYS_FSL_ERRATUM_A006379 diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index 183bf2b..972016c 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -53,7 +53,8 @@ bool has_erratum_a006261(void) case SVR_P2041: case SVR_P2040: return IS_SVR_REV(svr, 1, 0) || - IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1); + IS_SVR_REV(svr, 1, 1) || + IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1); case SVR_P3041: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1) || @@ -63,16 +64,10 @@ bool has_erratum_a006261(void) case SVR_P5021: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); case SVR_T4240: - case SVR_T4160: - case SVR_T4080: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); - case SVR_T1040: - return IS_SVR_REV(svr, 1, 0); - case SVR_T2080: - case SVR_T2081: - return IS_SVR_REV(svr, 1, 0); case SVR_P5040: - return IS_SVR_REV(svr, 1, 0); + return IS_SVR_REV(svr, 1, 0) || + IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1); #endif } -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 1/3] mpc85xx: powerpc: usb: Modified the erratum A006261 according to endianness
Modifies erratum implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian. Signed-off-by: Sriram Dash Signed-off-by: Rajesh Bhagat --- Changes in v3: - Modify the commit message - Modify the commit description Changes in v2: - Adds the errata number to title of patch - Makes separate patch for addition of errata to specific Socs. arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index ace4279..53b3729 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -114,10 +114,10 @@ void fsl_erratum_a006261_workaround(struct ccsr_usb_phy __iomem *usb_phy) setbits_be32(&usb_phy->config2, CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL); - temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0; + temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3; out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp); - temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3; + temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0; out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp); #endif } -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 2/3] mpc85xx: powerpc: usb: Enable Usb phy initialisation settings for P1010
CONFIG_SYS_FSL_USB1_PHY_ENABLE is set and the USB Phy
offset are set to enable the initial setting of Usb Phy for P1010.
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
Changes in v3:
- Modify the commit message
- Modify the commit description
arch/powerpc/include/asm/config_mpc85xx.h | 1 +
arch/powerpc/include/asm/immap_85xx.h | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h
b/arch/powerpc/include/asm/config_mpc85xx.h
index 505d355..9b7feda 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -162,6 +162,7 @@
#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
#define CONFIG_SYS_FSL_ERRATUM_A004508
#define CONFIG_SYS_FSL_ERRATUM_A007075
+#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
#define CONFIG_SYS_FSL_ERRATUM_A006261
#define CONFIG_SYS_FSL_ERRATUM_A004477
#define CONFIG_SYS_FSL_A004447_SVR_REV 0x10
diff --git a/arch/powerpc/include/asm/immap_85xx.h
b/arch/powerpc/include/asm/immap_85xx.h
index c045a24..07ad22d 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2953,6 +2953,8 @@ struct ccsr_pman {
#define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000
#define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x22000
#define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000
+#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0xE5000
+#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0xE5100
#ifdef CONFIG_TSECV2
#define CONFIG_SYS_TSEC1_OFFSET0xB
#elif defined(CONFIG_TSECV2_1)
--
2.1.0
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[U-Boot] [PATCH v3 0/3] Modifies the erratum A006261 according to endianness
Modifies erratum A006261 implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian. Enables the Phy init settings for P1010 Soc. Also, applies the erratum for P2041 rev 2.0, P2040 rev 2.0, P5040 rev 2.0, 2.1 and removes the erratum for T4160, T4080, T1040, T1042, T1020, T1022, T2080, T2081. Sriram Dash (3): mpc85xx: powerpc: usb: Modified the erratum A006261 according to endianness mpc85xx: powerpc: usb: Enable Usb phy initialisation settings for P1010 mpc85xx: powerpc: usb: Update the list of Socs afftected by erratum A006261 arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- arch/powerpc/include/asm/config_mpc85xx.h | 5 ++--- arch/powerpc/include/asm/immap_85xx.h | 2 ++ drivers/usb/common/fsl-errata.c | 13 - 4 files changed, 10 insertions(+), 14 deletions(-) -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/5] mpc85xx/powerpc:cpu_init: Modified the errata A006261 according to endianness
>From: york sun > >Sriram, > >Please pay attention to the language. "errata" is the plural noun of >"erratum". You >are dealing with one erratum, aren't you? And you are modifying the workaround, >not the erratum itself. > >The tags in the subject should be separated by either "/", or ":", but not >both. I don't >believe "cpu_init" should be in the tag. > Hello York, Will take care from next time onwards. Will change in v3. > >On 07/17/2016 08:47 PM, Sriram Dash wrote: >> Modifies errata implementation due to the fact that P3041, >> P5020, and P5040 are all big endian for the USB PHY registers, but >> they were specified little endian. > >If your change is correct, can you explain why the original format >didn't cause any harm before? > >York > If it is working due to SWAP most likely reason would be bit[9] of confige1 which might be getting mapped to HS Disconnect decrement by 50mV. Whereas Errata intends to increase the threshold by 100mV though bit C1[8:9] which map to C1[23:22] in BG. I mean in full swap, this value will have maximum impact, although complete write is expected to be done properly. >> >> Signed-off-by: Sriram Dash >> Signed-off-by: Rajesh Bhagat >> --- >> Changes in v2: >> - Adds the errata number to title of patch >> - Makes separate patch for addition of errata to specific Socs. >> >> >> arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c >b/arch/powerpc/cpu/mpc85xx/cpu_init.c >> index 61f5639..61dedfc 100644 >> --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c >> +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c >> @@ -114,10 +114,10 @@ void fsl_erratum_a006261_workaround(struct >ccsr_usb_phy __iomem *usb_phy) >> setbits_be32(&usb_phy->config2, >> CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL); >> >> -temp = squelch_prog_rd_0_2 << >CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0; >> +temp = squelch_prog_rd_0_2 << >CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3; >> out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp); >> >> -temp = squelch_prog_rd_3_5 << >CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3; >> +temp = squelch_prog_rd_3_5 << >CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0; >> out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp); >> #endif >> } >> ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/5] mpc85xx/powerpc: P5040: Apply errata A006261 for P5040
>From: york sun > >Same comment to the subject line. > Ok. Will modify patch title and commit message in v3. >On 07/17/2016 08:47 PM, Sriram Dash wrote: >> Apply USB errata A006261 for P5040. > >Please add explanation the same erratum applies to P5040 rev 2.0. > Ok. Will modify patch title and commit message in v3. >> >> Signed-off-by: Sriram Dash >> Signed-off-by: Rajesh Bhagat >> --- >> drivers/usb/common/fsl-errata.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/usb/common/fsl-errata.c >> b/drivers/usb/common/fsl-errata.c index 122e17b..765b25a 100644 >> --- a/drivers/usb/common/fsl-errata.c >> +++ b/drivers/usb/common/fsl-errata.c >> @@ -73,7 +73,8 @@ bool has_erratum_a006261(void) >> case SVR_T2081: >> return IS_SVR_REV(svr, 1, 0); >> case SVR_P5040: >> -return IS_SVR_REV(svr, 1, 0); >> +return IS_SVR_REV(svr, 1, 0) || >> +IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1); > >Because the official document doesn't include these versions, please add a >comment saying this erratum applies to affected revisions. > >York > Ok. Will modify patch title and commit message in v3. > >> #endif >> } >> >> ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 3/5] mpc85xx/powerpc: P2041: Apply errata A006261 for P2041
>From: york sun > >Same comment to the subject. > Ok. Will modify patch title and commit message in v3. >On 07/17/2016 08:47 PM, Sriram Dash wrote: >> Apply USB errata A006261 for P2041, P2040. >> >> Signed-off-by: Sriram Dash >> Signed-off-by: Rajesh Bhagat >> --- >> drivers/usb/common/fsl-errata.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/usb/common/fsl-errata.c >> b/drivers/usb/common/fsl-errata.c index 183bf2b..122e17b 100644 >> --- a/drivers/usb/common/fsl-errata.c >> +++ b/drivers/usb/common/fsl-errata.c >> @@ -53,7 +53,8 @@ bool has_erratum_a006261(void) >> case SVR_P2041: >> case SVR_P2040: >> return IS_SVR_REV(svr, 1, 0) || >> -IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1); >> +IS_SVR_REV(svr, 1, 1) || >> +IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1); > >Please explain in the commit message why you replace rev 1.1 with rev 2.0. > >York > I have not removed the rev 1.1 support, only added the rev 2.0 support. Will modify patch title and commit message in v3. > >> case SVR_P3041: >> return IS_SVR_REV(svr, 1, 0) || >> IS_SVR_REV(svr, 1, 1) || >> ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/5] mpc85xx/powerpc:P1010: Apply errata A006261 for P1010
>From: york sun
>
>Sriram,
>
>Same comment here, please fix the subject.
>
Ok. Will modify patch title and commit message in v3.
>On 07/17/2016 08:47 PM, Sriram Dash wrote:
>> Apply USB errata A006261 for P1010.
>
>A006261 is already applied to P1010.
>
>
>>
>> Signed-off-by: Sriram Dash
>> Signed-off-by: Rajesh Bhagat
>> ---
>> arch/powerpc/include/asm/config_mpc85xx.h | 1 +
>> arch/powerpc/include/asm/immap_85xx.h | 2 ++
>> 2 files changed, 3 insertions(+)
>>
>> diff --git a/arch/powerpc/include/asm/config_mpc85xx.h
>> b/arch/powerpc/include/asm/config_mpc85xx.h
>> index 505d355..9b7feda 100644
>> --- a/arch/powerpc/include/asm/config_mpc85xx.h
>> +++ b/arch/powerpc/include/asm/config_mpc85xx.h
>> @@ -162,6 +162,7 @@
>> #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
>> #define CONFIG_SYS_FSL_ERRATUM_A004508 #define
>> CONFIG_SYS_FSL_ERRATUM_A007075
>> +#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
>
>This is not enabling A006261. Please rewrite the commit message.
>
Ok. Will modify patch title and commit message in v3.
>> #define CONFIG_SYS_FSL_ERRATUM_A006261 #define
>> CONFIG_SYS_FSL_ERRATUM_A004477
>> #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10
>> diff --git a/arch/powerpc/include/asm/immap_85xx.h
>> b/arch/powerpc/include/asm/immap_85xx.h
>> index c045a24..07ad22d 100644
>> --- a/arch/powerpc/include/asm/immap_85xx.h
>> +++ b/arch/powerpc/include/asm/immap_85xx.h
>> @@ -2953,6 +2953,8 @@ struct ccsr_pman {
>> #define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000
>> #define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x22000
>> #define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000
>> +#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0xE5000
>> +#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0xE5100
>
>This is not for the workaround.
>
>York
>
Ok. Will modify patch title and commit message in v3.
>
>> #ifdef CONFIG_TSECV2
>> #define CONFIG_SYS_TSEC1_OFFSET 0xB
>> #elif defined(CONFIG_TSECV2_1)
>>
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Re: [U-Boot] [PATCH v2 5/5] mpc85xx/powerpc: Do not apply errata A006261 for T4160, T1040, T2080
>From: york sun >On 07/17/2016 08:47 PM, Sriram Dash wrote: >> Do not apply errata A006261 for T4160 and T4080(rev 1.0, 2.0), >> T1040(rev 1.0), T2080(rev 1.0), T2081(rev 1.0). > >I don't see mentioning the revision numbers helps here. Your patch is removing >the >erratum from T4160, T4080, T1040, T1042, T1020, T1022, T2080, T2081. It would >be much clear if you put all A006261 related patches into one, and list all >the SoCs >affected by this erratum since the official released document contradicts with >your >list. > >York > Ok. I will divide the patchset into 3 patches. First patch for modifying the erratum. Second patch for enabling the init for P1010 so that erratum can be applied on it. Third patch to take care of the Socs addition and deletion. > >> >> Signed-off-by: Sriram Dash >> Signed-off-by: Rajesh Bhagat >> --- >> arch/powerpc/include/asm/config_mpc85xx.h | 4 +--- >> drivers/usb/common/fsl-errata.c | 7 --- >> 2 files changed, 1 insertion(+), 10 deletions(-) >> >> diff --git a/arch/powerpc/include/asm/config_mpc85xx.h >> b/arch/powerpc/include/asm/config_mpc85xx.h >> index 9b7feda..6d845e8 100644 >> --- a/arch/powerpc/include/asm/config_mpc85xx.h >> +++ b/arch/powerpc/include/asm/config_mpc85xx.h >> @@ -641,6 +641,7 @@ >> #define CONFIG_SYS_NUM_FM2_DTSEC8 >> #define CONFIG_SYS_NUM_FM2_10GEC2 >> #define CONFIG_NUM_DDR_CONTROLLERS 3 >> +#define CONFIG_SYS_FSL_ERRATUM_A006261 >> #else >> #define CONFIG_SYS_NUM_FM1_DTSEC6 >> #define CONFIG_SYS_NUM_FM1_10GEC1 >> @@ -682,7 +683,6 @@ >> #define CONFIG_SYS_FSL_ERRATUM_A004468 #define >> CONFIG_SYS_FSL_ERRATUM_A_004934 #define >> CONFIG_SYS_FSL_ERRATUM_A005871 -#define >CONFIG_SYS_FSL_ERRATUM_A006261 >> #define CONFIG_SYS_FSL_ERRATUM_A006379 #define >> CONFIG_SYS_FSL_ERRATUM_A007186 #define >CONFIG_SYS_FSL_ERRATUM_A006593 >> @@ -800,7 +800,6 @@ defined(CONFIG_PPC_T1020) || >defined(CONFIG_PPC_T1022) >> #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4" >> #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE >> #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY >> -#define CONFIG_SYS_FSL_ERRATUM_A006261 >> #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe00 >> #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define >> ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE @@ -908,7 +907,6 @@ >> defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013) #define >> CONFIG_SYS_FSL_SFP_VER_3_0 >> #define CONFIG_SYS_FSL_ISBC_VER 2 >> #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 -#define >> CONFIG_SYS_FSL_ERRATUM_A006261 #define >CONFIG_SYS_FSL_ERRATUM_A006593 >> #define CONFIG_SYS_FSL_ERRATUM_A007186 #define >> CONFIG_SYS_FSL_ERRATUM_A006379 diff --git >> a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c >> index 765b25a..972016c 100644 >> --- a/drivers/usb/common/fsl-errata.c >> +++ b/drivers/usb/common/fsl-errata.c >> @@ -64,14 +64,7 @@ bool has_erratum_a006261(void) >> case SVR_P5021: >> return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); >> case SVR_T4240: >> -case SVR_T4160: >> -case SVR_T4080: >> return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); >> -case SVR_T1040: >> -return IS_SVR_REV(svr, 1, 0); >> -case SVR_T2080: >> -case SVR_T2081: >> -return IS_SVR_REV(svr, 1, 0); >> case SVR_P5040: >> return IS_SVR_REV(svr, 1, 0) || >> IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1); >> ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] drivers:usb:common:fsl-dt-fixup: Fix the dt for all type of usb controllers
>From: Marek Vasut [mailto:ma...@denx.de]
>On 06/20/2016 06:15 AM, Sriram Dash wrote:
>> Currently, U-boot doesn't allow to compile more than one type of USB
>> protocol simultaneously. Hence, EHCI and XHCI controllers cannot
>> co-exist and CONFIG_USB_MAX_CONTROLLER_COUNT macro represents count
>of
>> only one type of controller.
>
>This does not make sense, with DM we can support all sorts of controllers.
>
Ok. Will change the commit message description in v2.
>> For the Socs which have more than one type of controller e.g. EHCI and
>> XHCI, and the device tree has to support both of them, the macro
>> CONFIG_USB_MAX_CONTROLLER_COUNT will not work for fixing dt from u boot.
>>
>> So, instead of taking the hard coded number of controller from U boot,
>> count the total number of controller present in dt and then fix the dt
>> accordingly.
>>
>> Signed-off-by: Sriram Dash
>> Signed-off-by: Rajesh Bhagat
>> ---
>> drivers/usb/common/fsl-dt-fixup.c | 27 ++-
>> 1 file changed, 26 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/usb/common/fsl-dt-fixup.c
>> b/drivers/usb/common/fsl-dt-fixup.c
>> index 9c48852..1edf146 100644
>> --- a/drivers/usb/common/fsl-dt-fixup.c
>> +++ b/drivers/usb/common/fsl-dt-fixup.c
>> @@ -131,10 +131,29 @@ static int fdt_fixup_erratum(int *usb_erratum_off, void
>*blob,
>> return 0;
>> }
>>
>> +static int fdt_max_controller_count(void *blob) {
>> +int count = 0;
>> +int node_offset = -1;
>> +int i;
>> +
>> +for (i = 0; compat_usb_fsl[i]; i++) {
>> +do {
>> +node_offset = fdt_node_offset_by_compatible
>> +(blob, node_offset,
>> + compat_usb_fsl[i]);
>> +if (node_offset >= 0)
>> +count++;
>> +} while (node_offset != -FDT_ERR_NOTFOUND);
>> +}
>> +return count;
>> +}
>> +
>> void fdt_fixup_dr_usb(void *blob, bd_t *bd) {
>> static const char * const modes[] = { "host", "peripheral", "otg" };
>> static const char * const phys[] = { "ulpi", "utmi", "utmi_dual" };
>> +unsigned int usb_max_controller_count;
>> int usb_erratum_a006261_off = -1;
>> int usb_erratum_a007075_off = -1;
>> int usb_erratum_a007792_off = -1;
>> @@ -146,7 +165,13 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
>> int i, j;
>> int ret;
>>
>> -for (i = 1; i <= CONFIG_USB_MAX_CONTROLLER_COUNT; i++) {
>> +usb_max_controller_count = fdt_max_controller_count(blob);
>
>Since you walk the tree below anyway, why do you even need to count the
>elements? Just walk the tree until you can find no more nodes.
>
Ok. Will traverse the dt and find the node. Then fix the node and afterwards,
Traverse the device tree till no nodes are left for fixing.
>> +if (!usb_max_controller_count) {
>> +printf("ERROR: FDT fixup erratum fail.\n");
>> +return;
>> +}
>> +
>> +for (i = 1; i <= usb_max_controller_count; i++) {
>> const char *dr_mode_type = NULL;
>> const char *dr_phy_type = NULL;
>> int mode_idx = -1, phy_idx = -1;
>>
>
>
>--
>Best regards,
>Marek Vasut
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[U-Boot] [PATCH v2 2/5] mpc85xx/powerpc:P1010: Apply errata A006261 for P1010
Apply USB errata A006261 for P1010.
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
arch/powerpc/include/asm/config_mpc85xx.h | 1 +
arch/powerpc/include/asm/immap_85xx.h | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h
b/arch/powerpc/include/asm/config_mpc85xx.h
index 505d355..9b7feda 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -162,6 +162,7 @@
#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
#define CONFIG_SYS_FSL_ERRATUM_A004508
#define CONFIG_SYS_FSL_ERRATUM_A007075
+#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
#define CONFIG_SYS_FSL_ERRATUM_A006261
#define CONFIG_SYS_FSL_ERRATUM_A004477
#define CONFIG_SYS_FSL_A004447_SVR_REV 0x10
diff --git a/arch/powerpc/include/asm/immap_85xx.h
b/arch/powerpc/include/asm/immap_85xx.h
index c045a24..07ad22d 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2953,6 +2953,8 @@ struct ccsr_pman {
#define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000
#define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x22000
#define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000
+#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0xE5000
+#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0xE5100
#ifdef CONFIG_TSECV2
#define CONFIG_SYS_TSEC1_OFFSET0xB
#elif defined(CONFIG_TSECV2_1)
--
2.1.0
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[U-Boot] [PATCH v2 4/5] mpc85xx/powerpc: P5040: Apply errata A006261 for P5040
Apply USB errata A006261 for P5040. Signed-off-by: Sriram Dash Signed-off-by: Rajesh Bhagat --- drivers/usb/common/fsl-errata.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index 122e17b..765b25a 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -73,7 +73,8 @@ bool has_erratum_a006261(void) case SVR_T2081: return IS_SVR_REV(svr, 1, 0); case SVR_P5040: - return IS_SVR_REV(svr, 1, 0); + return IS_SVR_REV(svr, 1, 0) || + IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1); #endif } -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 5/5] mpc85xx/powerpc: Do not apply errata A006261 for T4160, T1040, T2080
Do not apply errata A006261 for T4160 and T4080(rev 1.0, 2.0), T1040(rev 1.0), T2080(rev 1.0), T2081(rev 1.0). Signed-off-by: Sriram Dash Signed-off-by: Rajesh Bhagat --- arch/powerpc/include/asm/config_mpc85xx.h | 4 +--- drivers/usb/common/fsl-errata.c | 7 --- 2 files changed, 1 insertion(+), 10 deletions(-) diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 9b7feda..6d845e8 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -641,6 +641,7 @@ #define CONFIG_SYS_NUM_FM2_DTSEC 8 #define CONFIG_SYS_NUM_FM2_10GEC 2 #define CONFIG_NUM_DDR_CONTROLLERS 3 +#define CONFIG_SYS_FSL_ERRATUM_A006261 #else #define CONFIG_SYS_NUM_FM1_DTSEC 6 #define CONFIG_SYS_NUM_FM1_10GEC 1 @@ -682,7 +683,6 @@ #define CONFIG_SYS_FSL_ERRATUM_A004468 #define CONFIG_SYS_FSL_ERRATUM_A_004934 #define CONFIG_SYS_FSL_ERRATUM_A005871 -#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A006379 #define CONFIG_SYS_FSL_ERRATUM_A007186 #define CONFIG_SYS_FSL_ERRATUM_A006593 @@ -800,7 +800,6 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022) #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4" #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY -#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe00 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE @@ -908,7 +907,6 @@ defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013) #define CONFIG_SYS_FSL_SFP_VER_3_0 #define CONFIG_SYS_FSL_ISBC_VER2 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 -#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A006593 #define CONFIG_SYS_FSL_ERRATUM_A007186 #define CONFIG_SYS_FSL_ERRATUM_A006379 diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index 765b25a..972016c 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -64,14 +64,7 @@ bool has_erratum_a006261(void) case SVR_P5021: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); case SVR_T4240: - case SVR_T4160: - case SVR_T4080: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); - case SVR_T1040: - return IS_SVR_REV(svr, 1, 0); - case SVR_T2080: - case SVR_T2081: - return IS_SVR_REV(svr, 1, 0); case SVR_P5040: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1); -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 0/5] Modified the errata A006261 according to endianness
Modifies errata implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian. Applies the errata for P1010, P2041, P5040. Removes the errata for T4160, T1040, T2080. Sriram Dash (5): mpc85xx/powerpc:cpu_init: Modified the errata A006261 according to endianness mpc85xx/powerpc:P1010: Apply errata A006261 for P1010 mpc85xx/powerpc: P2041: Apply errata A006261 for P2041 mpc85xx/powerpc: P5040: Apply errata A006261 for P5040 mpc85xx/powerpc: Do not apply errata A006261 for T4160, T1040, T2080 arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- arch/powerpc/include/asm/config_mpc85xx.h | 5 ++--- arch/powerpc/include/asm/immap_85xx.h | 2 ++ drivers/usb/common/fsl-errata.c | 13 - 4 files changed, 10 insertions(+), 14 deletions(-) -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 3/5] mpc85xx/powerpc: P2041: Apply errata A006261 for P2041
Apply USB errata A006261 for P2041, P2040. Signed-off-by: Sriram Dash Signed-off-by: Rajesh Bhagat --- drivers/usb/common/fsl-errata.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index 183bf2b..122e17b 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -53,7 +53,8 @@ bool has_erratum_a006261(void) case SVR_P2041: case SVR_P2040: return IS_SVR_REV(svr, 1, 0) || - IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1); + IS_SVR_REV(svr, 1, 1) || + IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1); case SVR_P3041: return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1) || -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/5] mpc85xx/powerpc:cpu_init: Modified the errata A006261 according to endianness
Modifies errata implementation due to the fact that P3041, P5020, and P5040 are all big endian for the USB PHY registers, but they were specified little endian. Signed-off-by: Sriram Dash Signed-off-by: Rajesh Bhagat --- Changes in v2: - Adds the errata number to title of patch - Makes separate patch for addition of errata to specific Socs. arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 61f5639..61dedfc 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -114,10 +114,10 @@ void fsl_erratum_a006261_workaround(struct ccsr_usb_phy __iomem *usb_phy) setbits_be32(&usb_phy->config2, CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL); - temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0; + temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3; out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp); - temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3; + temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0; out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp); #endif } -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/mpc85xx: Fix SPL_BUILD compilation by adding CONFIG_USB_EHCI_FSL flag
>From: Marek Vasut [mailto:ma...@denx.de] >On 07/04/2016 01:11 PM, Sriram Dash wrote: >> Commit 9262367 moved USB errata workaround to a C file but didn't >> build it for SPL targets. The EHCI errata should be applied/checked >> only when EHCI is defined. >> >> Signed-off-by: Rajesh Bhagat >> Signed-off-by: Sriram Dash >> --- >> arch/powerpc/include/asm/config_mpc85xx.h | 32 >> +-- > >So why don't you fix arch/powerpc/cpu/mpc85xx/cmd_errata.c instead of adding >zillion ifdefs into the config_mpc85xx.h ? > Hello Marek, The phy errata is applied at cpu init time for some boards. Due to this, the code has been added in the file arch/powerpc/cpu/mpc85xx/cpu_init.c also. Now, this file is also required for SPL build. Hence, rather than fixing in every file currently and the future implementations, I am thinking of fixing this at a common place. >> include/configs/km/kmp204x-common.h | 1 + >> 2 files changed, 31 insertions(+), 2 deletions(-) >> >> diff --git a/arch/powerpc/include/asm/config_mpc85xx.h >> b/arch/powerpc/include/asm/config_mpc85xx.h >> index 505d355..c5fe3cf 100644 >> --- a/arch/powerpc/include/asm/config_mpc85xx.h >> +++ b/arch/powerpc/include/asm/config_mpc85xx.h >> @@ -161,9 +161,11 @@ >> #define CONFIG_SYS_FSL_ERRATUM_A005125 #define >> CONFIG_SYS_FSL_ERRATUM_I2C_A004447 >> #define CONFIG_SYS_FSL_ERRATUM_A004508 >> +#ifdef CONFIG_USB_EHCI_FSL >> #define CONFIG_SYS_FSL_ERRATUM_A007075 #define >> CONFIG_SYS_FSL_ERRATUM_A006261 #define >CONFIG_SYS_FSL_ERRATUM_A004477 >> +#endif /* CONFIG_USB_EHCI_FSL */ >> #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10 >> #define CONFIG_ESDHC_HC_BLK_ADDR >> >> @@ -295,7 +297,9 @@ >> #define CONFIG_FSL_SATA_ERRATUM_A001 >> #define CONFIG_SYS_FSL_ERRATUM_A004508 #define >> CONFIG_SYS_FSL_ERRATUM_A005125 >> +#ifdef CONFIG_USB_EHCI_FSL >> #define CONFIG_SYS_FSL_ERRATUM_A004477 >> +#endif /* CONFIG_USB_EHCI_FSL */ >> >> #elif defined(CONFIG_P1023) >> #define CONFIG_MAX_CPUS 2 >> @@ -376,7 +380,9 @@ >> #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM2 >> #define CONFIG_SYS_FSL_ERRATUM_A004508 #define >> CONFIG_SYS_FSL_ERRATUM_A005125 >> +#ifdef CONFIG_USB_EHCI_FSL >> #define CONFIG_SYS_FSL_ERRATUM_A004477 >> +#endif /* CONFIG_USB_EHCI_FSL */ >> #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 >> >> #elif defined(CONFIG_PPC_P2041) /* also supports P2040 */ @@ -414,7 >> +420,9 @@ #define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034 >> #define CONFIG_SYS_FSL_ERRATUM_A004849 #define >> CONFIG_SYS_FSL_ERRATUM_I2C_A004447 >> +#ifdef CONFIG_USB_EHCI_FSL >> #define CONFIG_SYS_FSL_ERRATUM_A006261 >> +#endif /* CONFIG_USB_EHCI_FSL */ >> #define CONFIG_SYS_FSL_A004447_SVR_REV 0x11 >> >> #elif defined(CONFIG_PPC_P3041) >> @@ -454,7 +462,9 @@ >> #define CONFIG_SYS_FSL_ERRATUM_A004849 #define >> CONFIG_SYS_FSL_ERRATUM_A005812 #define >> CONFIG_SYS_FSL_ERRATUM_I2C_A004447 >> +#ifdef CONFIG_USB_EHCI_FSL >> #define CONFIG_SYS_FSL_ERRATUM_A006261 >> +#endif /* CONFIG_USB_EHCI_FSL */ >> #define CONFIG_SYS_FSL_A004447_SVR_REV 0x20 >> >> #elif defined(CONFIG_PPC_P4080) /* also supports P4040 */ @@ -505,7 >> +515,9 @@ #define CONFIG_SYS_P4080_ERRATUM_PCIE_A003 >> #define CONFIG_SYS_FSL_ERRATUM_A005812 #define >> CONFIG_SYS_FSL_ERRATUM_I2C_A004447 >> +#ifdef CONFIG_USB_EHCI_FSL >> #define CONFIG_SYS_FSL_ERRATUM_A007075 >> +#endif /* CONFIG_USB_EHCI_FSL */ >> #define CONFIG_SYS_FSL_A004447_SVR_REV 0x20 >> >> #elif defined(CONFIG_PPC_P5020) /* also supports P5010 */ @@ -541,7 >> +553,9 @@ #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY >0xc000 >> #define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034 >> #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 >> +#ifdef CONFIG_USB_EHCI_FSL >> #define CONFIG_SYS_FSL_ERRATUM_A006261 >> +#endif /* CONFIG_USB_EHCI_FSL */ >> #define CONFIG_SYS_FSL_A004447_SVR_REV 0x20 >> >> #elif defined(CONFIG_PPC_P5040) >> @@ -574,7 +588,9 @@ >> #define CONFIG_SYS_FSL_ERRATUM_A004699 #define >> CONFIG_SYS_FSL_ERRATUM_A004510 >> #define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV 0x10 >> +#ifdef CONFIG_USB_EHCI_FSL >> #define CONFIG_SYS_FSL_ERRATUM_A006261 >> +#endif /* CONFIG_USB_EHCI_FSL */ >> #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf000 >#define >> CONFIG_SYS_FSL_ERRATUM_A005812 >> >> @@ -594,7 +610,9 @@ >> #define CONFIG_NAND_F
[U-Boot] [PATCH] powerpc/mpc85xx: Fix SPL_BUILD compilation by adding CONFIG_USB_EHCI_FSL flag
Commit 9262367 moved USB errata workaround to a C file but didn't build it for SPL targets. The EHCI errata should be applied/checked only when EHCI is defined. Signed-off-by: Rajesh Bhagat Signed-off-by: Sriram Dash --- arch/powerpc/include/asm/config_mpc85xx.h | 32 +-- include/configs/km/kmp204x-common.h | 1 + 2 files changed, 31 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 505d355..c5fe3cf 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -161,9 +161,11 @@ #define CONFIG_SYS_FSL_ERRATUM_A005125 #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 #define CONFIG_SYS_FSL_ERRATUM_A004508 +#ifdef CONFIG_USB_EHCI_FSL #define CONFIG_SYS_FSL_ERRATUM_A007075 #define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A004477 +#endif /* CONFIG_USB_EHCI_FSL */ #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10 #define CONFIG_ESDHC_HC_BLK_ADDR @@ -295,7 +297,9 @@ #define CONFIG_FSL_SATA_ERRATUM_A001 #define CONFIG_SYS_FSL_ERRATUM_A004508 #define CONFIG_SYS_FSL_ERRATUM_A005125 +#ifdef CONFIG_USB_EHCI_FSL #define CONFIG_SYS_FSL_ERRATUM_A004477 +#endif /* CONFIG_USB_EHCI_FSL */ #elif defined(CONFIG_P1023) #define CONFIG_MAX_CPUS2 @@ -376,7 +380,9 @@ #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2 #define CONFIG_SYS_FSL_ERRATUM_A004508 #define CONFIG_SYS_FSL_ERRATUM_A005125 +#ifdef CONFIG_USB_EHCI_FSL #define CONFIG_SYS_FSL_ERRATUM_A004477 +#endif /* CONFIG_USB_EHCI_FSL */ #define CONFIG_USB_MAX_CONTROLLER_COUNT1 #elif defined(CONFIG_PPC_P2041) /* also supports P2040 */ @@ -414,7 +420,9 @@ #define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034 #define CONFIG_SYS_FSL_ERRATUM_A004849 #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 +#ifdef CONFIG_USB_EHCI_FSL #define CONFIG_SYS_FSL_ERRATUM_A006261 +#endif /* CONFIG_USB_EHCI_FSL */ #define CONFIG_SYS_FSL_A004447_SVR_REV 0x11 #elif defined(CONFIG_PPC_P3041) @@ -454,7 +462,9 @@ #define CONFIG_SYS_FSL_ERRATUM_A004849 #define CONFIG_SYS_FSL_ERRATUM_A005812 #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 +#ifdef CONFIG_USB_EHCI_FSL #define CONFIG_SYS_FSL_ERRATUM_A006261 +#endif /* CONFIG_USB_EHCI_FSL */ #define CONFIG_SYS_FSL_A004447_SVR_REV 0x20 #elif defined(CONFIG_PPC_P4080) /* also supports P4040 */ @@ -505,7 +515,9 @@ #define CONFIG_SYS_P4080_ERRATUM_PCIE_A003 #define CONFIG_SYS_FSL_ERRATUM_A005812 #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 +#ifdef CONFIG_USB_EHCI_FSL #define CONFIG_SYS_FSL_ERRATUM_A007075 +#endif /* CONFIG_USB_EHCI_FSL */ #define CONFIG_SYS_FSL_A004447_SVR_REV 0x20 #elif defined(CONFIG_PPC_P5020) /* also supports P5010 */ @@ -541,7 +553,9 @@ #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xc000 #define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034 #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 +#ifdef CONFIG_USB_EHCI_FSL #define CONFIG_SYS_FSL_ERRATUM_A006261 +#endif /* CONFIG_USB_EHCI_FSL */ #define CONFIG_SYS_FSL_A004447_SVR_REV 0x20 #elif defined(CONFIG_PPC_P5040) @@ -574,7 +588,9 @@ #define CONFIG_SYS_FSL_ERRATUM_A004699 #define CONFIG_SYS_FSL_ERRATUM_A004510 #define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV 0x10 +#ifdef CONFIG_USB_EHCI_FSL #define CONFIG_SYS_FSL_ERRATUM_A006261 +#endif /* CONFIG_USB_EHCI_FSL */ #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf000 #define CONFIG_SYS_FSL_ERRATUM_A005812 @@ -594,7 +610,9 @@ #define CONFIG_NAND_FSL_IFC #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define CONFIG_SYS_FSL_ERRATUM_A005125 +#ifdef CONFIG_USB_EHCI_FSL #define CONFIG_SYS_FSL_ERRATUM_A004477 +#endif /* CONFIG_USB_EHCI_FSL */ #define CONFIG_ESDHC_HC_BLK_ADDR #elif defined(CONFIG_BSC9132) @@ -619,7 +637,9 @@ #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" #define CONFIG_SYS_FSL_ERRATUM_A005125 #define CONFIG_SYS_FSL_ERRATUM_A005434 +#ifdef CONFIG_USB_EHCI_FSL #define CONFIG_SYS_FSL_ERRATUM_A004477 +#endif /* CONFIG_USB_EHCI_FSL */ #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x11 #define CONFIG_ESDHC_HC_BLK_ADDR @@ -681,11 +701,13 @@ #define CONFIG_SYS_FSL_ERRATUM_A004468 #define CONFIG_SYS_FSL_ERRATUM_A_004934 #define CONFIG_SYS_FSL_ERRATUM_A005871 -#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A006379 #define CONFIG_SYS_FSL_ERRATUM_A007186 #define CONFIG_SYS_FSL_ERRATUM_A006593 +#ifdef CONFIG_USB_EHCI_FSL +#define CONFIG_SYS_FSL_ERRATUM_A006261 #define CONFIG_SYS_FSL_ERRATUM_A007798 +#endif /* CONFIG_USB_EHCI_FSL */ #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe00 #define CONFIG_SYS_FSL_SFP_VER_3_0 #define CONFIG_SYS_FSL_PCI_VER_3_X @@ -724,11 +746,13 @@ #define CONFIG_SYS_FSL_ERRATUM_A006379 #define CONFIG_SYS_FSL_ERRATUM_A007186 #define CONFIG_SYS_FSL_ERRATUM_A006593 -#define CONFIG_SYS_FSL_ERRATUM_A007075 #define CONFIG_SYS_FSL_ERRATUM_A006475 #define CONFIG_SYS_FSL_ERRATUM_A
Re: [U-Boot] [RFC PATCH v1] usb: spl: fix USB errata for FSL SPL targets
>From: york sun >On 06/28/2016 12:02 AM, Sriram Dash wrote: >>> From: Marek Vasut [mailto:ma...@denx.de] On 06/28/2016 01:02 AM, York >>> Sun wrote: >>>> Commit 9262367 moved USB errata workaround to a C file but didn't >>>> build it for SPL targets. >>>> >>>> Signed-off-by: York Sun >>>> CC: Sriram Dash >>>> CC: Rajesh Bhagat >>>> >>>> --- >>>> Please review this patch. It fixed the compiling errors introduced >>>> by 9262367. Not sure if this is the way USB errata should be handled. >>>> >>>> drivers/Makefile| 7 +++ >>>> drivers/usb/common/Makefile | 8 ++-- >>>> include/configs/km/kmp204x-common.h | 1 + >>>> 3 files changed, 14 insertions(+), 2 deletions(-) >>>> >>>> diff --git a/drivers/Makefile b/drivers/Makefile index >>>> 1723958..88774ba 100644 >>>> --- a/drivers/Makefile >>>> +++ b/drivers/Makefile >>>> @@ -39,6 +39,13 @@ obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/ >>>> obj-$(CONFIG_SPL_SATA_SUPPORT) += block/ >>>> obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += block/ >>>> obj-$(CONFIG_SPL_MMC_SUPPORT) += block/ >>>> +ifdef CONFIG_USB_EHCI_FSL >>>> +CONFIG_SPL_USB_ERRATA = y >>>> +endif >>>> +ifdef CONFIG_USB_XHCI_FSL >>>> +CONFIG_SPL_USB_ERRATA = y >>>> +endif >>>> +obj-$(CONFIG_SPL_USB_ERRATA) += usb/common/ >>> >>> I really dislike the naming here, I'd say just do >>> >>> obj-$(CONFIG_USB_EHCI_FSL) += usb/common/ >>> obj-$(CONFIG_USB_XHCI_FSL) += usb/common/ > >Better. > >>> >> >> Hello York/Marek, >> >> IMO, the build for SPL is failing in PPC as the cmd_errata is not >> getting the definition of the has_erratum_aNN functions. So, >> instead of EHCI or XHCI flags, i think we can use CONFIG_CMD_ERRATA >> for SPL build for the errata applicability. >> >> +obj-$(CONFIG_CMD_ERRATA) += usb/common/fsl-errata.o >> >> What is your opinion? >> > >Sriram, > >I think it is not a good idea. CONFIG_CMD_ERRATA has nothing to do with USB >errata specifically. It means to enable the command "errata", and nothing more. > >What's broken here is the mechanism to detect if an erratum applies to a >particular >SoC version. Before your change, the functions were included from the header >file. >You moved those functions into a C file. That's fine. We need to build this >file for >both normal image and SPL. I don't think the workarounds are optional, unless >USB >is not used at all for SPL. > >I think Marek's comments make sense. >1) obj-$(CONFIG_USB_EHCI_FSL) += usb/common/ >obj-$(CONFIG_USB_XHCI_FSL) += usb/common/ OK. This looks generic also. > For this to work, we need to fix >kmp204x-common.h, which I noticed CONFIG_USB_EHCI_FSL is not defined. Please >examine if this macro should be defined at SoC level, instead of board level. The kmp204x-common does not need to define CONFIG_USB_EHCI_FSL. Currently, the board is not using the USB. But, they are using CONFIG_CMD_ERRATA. So, instead of having a flag of CONFIG_USB_EHCI_FSL in the board specific file, drivers/usb/common/Makefile should include fsl-errata.o for the config CONFIG_CMD_ERRATA. What is your opinion? >2) Use a proper macro for fsl-dt-fixup.o The entry point is >fdt_fixup_dr_usb(), which >is only called by >ft_board_setup() when CONFIG_OF_BOARD_SETUP is defined. > Yes. You are correct. fdt_fixup_dr_usb is only called when CONFIG_OF_BOARD_SETUP is defined. So, I guess it will be fine for drivers/usb/common/Makefile obj-$(CONFIG_USB_EHCI_FSL) += fsl-errata.o obj-$(CONFIG_USB_XHCI_FSL) += fsl-errata.o obj-$( CONFIG_CMD_ERRATA) += fsl-errata.o obj-$(CONFIG_OF_BOARD_SETUP) += fsl-dt-fixup.o What is your opinion? >Please take the lead to fix this issue. > >York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mpc85xx/powerpc:cpu_init: Modified the errata according to endianness
>From: york sun
>
>+Suresh Gupta
>
>On 06/21/2016 12:22 AM, Sriram Dash wrote:
>> Modifies errata implementation due to the fact that P3041, P5020, and
>> P5040 are all big endian for the USB PHY registers, but they were
>> specified little endian. Also, Adds errata for P1010 and
>> P2041 2.0.
>
>It would be helpful to mention erratum number A-006261 in the commit message in
>case you need to find this commit later.
>
Hello York,
OK. Will take care in v2.
>>
>> Signed-off-by: Sriram Dash
>> Signed-off-by: Rajesh Bhagat
>> ---
>> arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++--
>> arch/powerpc/include/asm/config_mpc85xx.h | 1 +
>> arch/powerpc/include/asm/immap_85xx.h | 2 ++
>> drivers/usb/common/fsl-errata.c | 6 --
>> 4 files changed, 9 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
>> b/arch/powerpc/cpu/mpc85xx/cpu_init.c
>> index 61f5639..61dedfc 100644
>> --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
>> +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
>> @@ -114,10 +114,10 @@ void fsl_erratum_a006261_workaround(struct
>ccsr_usb_phy __iomem *usb_phy)
>> setbits_be32(&usb_phy->config2,
>> CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL);
>>
>> -temp = squelch_prog_rd_0_2 <<
>CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0;
>> +temp = squelch_prog_rd_0_2 <<
>CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3;
>> out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
>>
>> -temp = squelch_prog_rd_3_5 <<
>CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3;
>> +temp = squelch_prog_rd_3_5 <<
>CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0;
>
>Has this been wrong all the time? If the disconnect voltage threshold was
>wrong,
>did someone observe abnormal behavior?
>
>Suresh, please comment here.
>
>> out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
>> #endif
>> }
>> diff --git a/arch/powerpc/include/asm/config_mpc85xx.h
>> b/arch/powerpc/include/asm/config_mpc85xx.h
>> index 505d355..9b7feda 100644
>> --- a/arch/powerpc/include/asm/config_mpc85xx.h
>> +++ b/arch/powerpc/include/asm/config_mpc85xx.h
>> @@ -162,6 +162,7 @@
>> #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
>> #define CONFIG_SYS_FSL_ERRATUM_A004508
>> #define CONFIG_SYS_FSL_ERRATUM_A007075
>> +#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
>
>Enabling the workaround for another SoC should be in a separated patch.
>
OK. Will take care in v2.
>> #define CONFIG_SYS_FSL_ERRATUM_A006261
>> #define CONFIG_SYS_FSL_ERRATUM_A004477
>> #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10
>> diff --git a/arch/powerpc/include/asm/immap_85xx.h
>> b/arch/powerpc/include/asm/immap_85xx.h
>> index c045a24..07ad22d 100644
>> --- a/arch/powerpc/include/asm/immap_85xx.h
>> +++ b/arch/powerpc/include/asm/immap_85xx.h
>> @@ -2953,6 +2953,8 @@ struct ccsr_pman {
>> #define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000
>> #define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x22000
>> #define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000
>> +#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0xE5000
>> +#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0xE5100
>> #ifdef CONFIG_TSECV2
>> #define CONFIG_SYS_TSEC1_OFFSET0xB
>> #elif defined(CONFIG_TSECV2_1)
>> diff --git a/drivers/usb/common/fsl-errata.c
>> b/drivers/usb/common/fsl-errata.c index ebe60a8..a69b977 100644
>> --- a/drivers/usb/common/fsl-errata.c
>> +++ b/drivers/usb/common/fsl-errata.c
>> @@ -53,7 +53,8 @@ bool has_erratum_a006261(void)
>> case SVR_P2041:
>> case SVR_P2040:
>> return IS_SVR_REV(svr, 1, 0) ||
>> -IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1);
>> +IS_SVR_REV(svr, 1, 1) ||
>> +IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);
>> case SVR_P3041:
>> return IS_SVR_REV(svr, 1, 0) ||
>> IS_SVR_REV(svr, 1, 1) ||
>> @@ -72,7 +73,8 @@ bool has_erratum_a006261(void)
>> case SVR_T2081:
>> return IS_SVR_REV(svr, 1, 0);
>> case SVR_P5040:
>> -return IS_SVR_REV(svr, 1, 0);
>> +return IS_SVR_REV(svr, 1, 0) ||
>> + IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);
>> #endif
>> }
>
>Are you sure this erratum applies to P5040 rev 2.0 and rev 2.1? My document
>shows
>it doesn't (only applies to rev 1.0).
>
Yes. Apparently, some more boards are using the same phy. There has been some
addition and removal off Socs for the errata, which is to be updated. I will
add another
patch for the removal of Socs, in which the errata is not applicable, in v2.
>York
Regards,
Sriram
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Re: [U-Boot] [RFC PATCH v1] usb: spl: fix USB errata for FSL SPL targets
>From: Marek Vasut [mailto:ma...@denx.de] >On 06/28/2016 01:02 AM, York Sun wrote: >> Commit 9262367 moved USB errata workaround to a C file but didn't >> build it for SPL targets. >> >> Signed-off-by: York Sun >> CC: Sriram Dash >> CC: Rajesh Bhagat >> >> --- >> Please review this patch. It fixed the compiling errors introduced by >> 9262367. Not sure if this is the way USB errata should be handled. >> >> drivers/Makefile| 7 +++ >> drivers/usb/common/Makefile | 8 ++-- >> include/configs/km/kmp204x-common.h | 1 + >> 3 files changed, 14 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/Makefile b/drivers/Makefile index >> 1723958..88774ba 100644 >> --- a/drivers/Makefile >> +++ b/drivers/Makefile >> @@ -39,6 +39,13 @@ obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/ >> obj-$(CONFIG_SPL_SATA_SUPPORT) += block/ >> obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += block/ >> obj-$(CONFIG_SPL_MMC_SUPPORT) += block/ >> +ifdef CONFIG_USB_EHCI_FSL >> +CONFIG_SPL_USB_ERRATA = y >> +endif >> +ifdef CONFIG_USB_XHCI_FSL >> +CONFIG_SPL_USB_ERRATA = y >> +endif >> +obj-$(CONFIG_SPL_USB_ERRATA) += usb/common/ > >I really dislike the naming here, I'd say just do > >obj-$(CONFIG_USB_EHCI_FSL) += usb/common/ >obj-$(CONFIG_USB_XHCI_FSL) += usb/common/ > Hello York/Marek, IMO, the build for SPL is failing in PPC as the cmd_errata is not getting the definition of the has_erratum_aNN functions. So, instead of EHCI or XHCI flags, i think we can use CONFIG_CMD_ERRATA for SPL build for the errata applicability. +obj-$(CONFIG_CMD_ERRATA) += usb/common/fsl-errata.o What is your opinion? Regards, Sriram >> else >> >> diff --git a/drivers/usb/common/Makefile b/drivers/usb/common/Makefile >> index aee7e32..f073e1c 100644 >> --- a/drivers/usb/common/Makefile >> +++ b/drivers/usb/common/Makefile >> @@ -4,5 +4,9 @@ >> # >> >> obj-$(CONFIG_DM_USB) += common.o >> -obj-$(CONFIG_USB_EHCI_FSL) += fsl-dt-fixup.o fsl-errata.o >> -obj-$(CONFIG_USB_XHCI_FSL) += fsl-dt-fixup.o fsl-errata.o >> +obj-$(CONFIG_USB_EHCI_FSL) += fsl-errata.o >> +obj-$(CONFIG_USB_XHCI_FSL) += fsl-errata.o ifndef CONFIG_SPL_BUILD >> +obj-$(CONFIG_USB_EHCI_FSL) += fsl-dt-fixup.o >> +obj-$(CONFIG_USB_XHCI_FSL) += fsl-dt-fixup.o endif > >Either the filename is misnamed or this is real broken design. >I would expect that a filename with -dt- in it's name should depend on >CONFIG_*FDT* , but not on CONFIG_SPL_BUILD. > >> diff --git a/include/configs/km/kmp204x-common.h >> b/include/configs/km/kmp204x-common.h >> index 028623d..5bdda22 100644 >> --- a/include/configs/km/kmp204x-common.h >> +++ b/include/configs/km/kmp204x-common.h >> @@ -406,6 +406,7 @@ int get_scl(void); #endif >> >> #define __USB_PHY_TYPE utmi >> +#define CONFIG_USB_EHCI_FSL >> >> /* >> * Environment Configuration >> > > >-- >Best regards, >Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mpc85xx/powerpc:cpu_init: Modified the errata according to endianness
>From: Marek Vasut [mailto:ma...@denx.de]
>On 06/21/2016 09:22 AM, Sriram Dash wrote:
>> Modifies errata implementation due to the fact that P3041, P5020, and
>> P5040 are all big endian for the USB PHY registers, but they were
>> specified little endian. Also
>
>Please split this into two patches.
>
OK. Will take care in v2.
>, Adds errata for P1010 and
>> P2041 2.0.
>>
>> Signed-off-by: Sriram Dash
>> Signed-off-by: Rajesh Bhagat
>> ---
>> arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++--
>> arch/powerpc/include/asm/config_mpc85xx.h | 1 +
>> arch/powerpc/include/asm/immap_85xx.h | 2 ++
>> drivers/usb/common/fsl-errata.c | 6 --
>> 4 files changed, 9 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
>> b/arch/powerpc/cpu/mpc85xx/cpu_init.c
>> index 61f5639..61dedfc 100644
>> --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
>> +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
>> @@ -114,10 +114,10 @@ void fsl_erratum_a006261_workaround(struct
>ccsr_usb_phy __iomem *usb_phy)
>> setbits_be32(&usb_phy->config2,
>> CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL);
>>
>> -temp = squelch_prog_rd_0_2 <<
>CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0;
>> +temp = squelch_prog_rd_0_2 <<
>CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3;
>> out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
>>
>> -temp = squelch_prog_rd_3_5 <<
>CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3;
>> +temp = squelch_prog_rd_3_5 <<
>CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0;
>> out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
>> #endif } diff --git a/arch/powerpc/include/asm/config_mpc85xx.h
>> b/arch/powerpc/include/asm/config_mpc85xx.h
>> index 505d355..9b7feda 100644
>> --- a/arch/powerpc/include/asm/config_mpc85xx.h
>> +++ b/arch/powerpc/include/asm/config_mpc85xx.h
>> @@ -162,6 +162,7 @@
>> #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
>> #define CONFIG_SYS_FSL_ERRATUM_A004508 #define
>> CONFIG_SYS_FSL_ERRATUM_A007075
>> +#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
>> #define CONFIG_SYS_FSL_ERRATUM_A006261 #define
>> CONFIG_SYS_FSL_ERRATUM_A004477
>> #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10
>> diff --git a/arch/powerpc/include/asm/immap_85xx.h
>> b/arch/powerpc/include/asm/immap_85xx.h
>> index c045a24..07ad22d 100644
>> --- a/arch/powerpc/include/asm/immap_85xx.h
>> +++ b/arch/powerpc/include/asm/immap_85xx.h
>> @@ -2953,6 +2953,8 @@ struct ccsr_pman {
>> #define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000
>> #define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x22000
>> #define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000
>> +#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0xE5000
>> +#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0xE5100
>> #ifdef CONFIG_TSECV2
>> #define CONFIG_SYS_TSEC1_OFFSET 0xB
>> #elif defined(CONFIG_TSECV2_1)
>> diff --git a/drivers/usb/common/fsl-errata.c
>> b/drivers/usb/common/fsl-errata.c index ebe60a8..a69b977 100644
>> --- a/drivers/usb/common/fsl-errata.c
>> +++ b/drivers/usb/common/fsl-errata.c
>> @@ -53,7 +53,8 @@ bool has_erratum_a006261(void)
>> case SVR_P2041:
>> case SVR_P2040:
>> return IS_SVR_REV(svr, 1, 0) ||
>> -IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1);
>> +IS_SVR_REV(svr, 1, 1) ||
>> +IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);
>> case SVR_P3041:
>> return IS_SVR_REV(svr, 1, 0) ||
>> IS_SVR_REV(svr, 1, 1) ||
>> @@ -72,7 +73,8 @@ bool has_erratum_a006261(void)
>> case SVR_T2081:
>> return IS_SVR_REV(svr, 1, 0);
>> case SVR_P5040:
>> -return IS_SVR_REV(svr, 1, 0);
>> +return IS_SVR_REV(svr, 1, 0) ||
>> + IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);
>> #endif
>> }
>>
>>
>
>
>--
>Best regards,
>Marek Vasut
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[U-Boot] [PATCH] mpc85xx/powerpc:cpu_init: Modified the errata according to endianness
Modifies errata implementation due to the fact that P3041,
P5020, and P5040 are all big endian for the USB PHY registers, but
they were specified little endian. Also, Adds errata for P1010 and
P2041 2.0.
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++--
arch/powerpc/include/asm/config_mpc85xx.h | 1 +
arch/powerpc/include/asm/immap_85xx.h | 2 ++
drivers/usb/common/fsl-errata.c | 6 --
4 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 61f5639..61dedfc 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -114,10 +114,10 @@ void fsl_erratum_a006261_workaround(struct ccsr_usb_phy
__iomem *usb_phy)
setbits_be32(&usb_phy->config2,
CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL);
- temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0;
+ temp = squelch_prog_rd_0_2 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3;
out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
- temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3;
+ temp = squelch_prog_rd_3_5 << CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0;
out_be32(&usb_phy->config2, in_be32(&usb_phy->config2) | temp);
#endif
}
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h
b/arch/powerpc/include/asm/config_mpc85xx.h
index 505d355..9b7feda 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -162,6 +162,7 @@
#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
#define CONFIG_SYS_FSL_ERRATUM_A004508
#define CONFIG_SYS_FSL_ERRATUM_A007075
+#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
#define CONFIG_SYS_FSL_ERRATUM_A006261
#define CONFIG_SYS_FSL_ERRATUM_A004477
#define CONFIG_SYS_FSL_A004447_SVR_REV 0x10
diff --git a/arch/powerpc/include/asm/immap_85xx.h
b/arch/powerpc/include/asm/immap_85xx.h
index c045a24..07ad22d 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2953,6 +2953,8 @@ struct ccsr_pman {
#define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000
#define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x22000
#define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000
+#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0xE5000
+#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0xE5100
#ifdef CONFIG_TSECV2
#define CONFIG_SYS_TSEC1_OFFSET0xB
#elif defined(CONFIG_TSECV2_1)
diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c
index ebe60a8..a69b977 100644
--- a/drivers/usb/common/fsl-errata.c
+++ b/drivers/usb/common/fsl-errata.c
@@ -53,7 +53,8 @@ bool has_erratum_a006261(void)
case SVR_P2041:
case SVR_P2040:
return IS_SVR_REV(svr, 1, 0) ||
- IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1);
+ IS_SVR_REV(svr, 1, 1) ||
+ IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);
case SVR_P3041:
return IS_SVR_REV(svr, 1, 0) ||
IS_SVR_REV(svr, 1, 1) ||
@@ -72,7 +73,8 @@ bool has_erratum_a006261(void)
case SVR_T2081:
return IS_SVR_REV(svr, 1, 0);
case SVR_P5040:
- return IS_SVR_REV(svr, 1, 0);
+ return IS_SVR_REV(svr, 1, 0) ||
+ IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);
#endif
}
--
2.1.0
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[U-Boot] [PATCH] drivers:usb:common:fsl-dt-fixup: Fix the dt for all type of usb controllers
Currently, U-boot doesn't allow to compile more than one type of USB protocol
simultaneously. Hence, EHCI and XHCI controllers cannot co-exist and
CONFIG_USB_MAX_CONTROLLER_COUNT macro represents count of only one type of
controller.
For the Socs which have more than one type of controller e.g. EHCI and XHCI,
and the device tree has to support both of them, the macro
CONFIG_USB_MAX_CONTROLLER_COUNT will not work for fixing dt from u boot.
So, instead of taking the hard coded number of controller from U boot,
count the total number of controller present in dt and then fix the dt
accordingly.
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
drivers/usb/common/fsl-dt-fixup.c | 27 ++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/common/fsl-dt-fixup.c
b/drivers/usb/common/fsl-dt-fixup.c
index 9c48852..1edf146 100644
--- a/drivers/usb/common/fsl-dt-fixup.c
+++ b/drivers/usb/common/fsl-dt-fixup.c
@@ -131,10 +131,29 @@ static int fdt_fixup_erratum(int *usb_erratum_off, void
*blob,
return 0;
}
+static int fdt_max_controller_count(void *blob)
+{
+ int count = 0;
+ int node_offset = -1;
+ int i;
+
+ for (i = 0; compat_usb_fsl[i]; i++) {
+ do {
+ node_offset = fdt_node_offset_by_compatible
+ (blob, node_offset,
+compat_usb_fsl[i]);
+ if (node_offset >= 0)
+ count++;
+ } while (node_offset != -FDT_ERR_NOTFOUND);
+ }
+ return count;
+}
+
void fdt_fixup_dr_usb(void *blob, bd_t *bd)
{
static const char * const modes[] = { "host", "peripheral", "otg" };
static const char * const phys[] = { "ulpi", "utmi", "utmi_dual" };
+ unsigned int usb_max_controller_count;
int usb_erratum_a006261_off = -1;
int usb_erratum_a007075_off = -1;
int usb_erratum_a007792_off = -1;
@@ -146,7 +165,13 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
int i, j;
int ret;
- for (i = 1; i <= CONFIG_USB_MAX_CONTROLLER_COUNT; i++) {
+ usb_max_controller_count = fdt_max_controller_count(blob);
+ if (!usb_max_controller_count) {
+ printf("ERROR: FDT fixup erratum fail.\n");
+ return;
+ }
+
+ for (i = 1; i <= usb_max_controller_count; i++) {
const char *dr_mode_type = NULL;
const char *dr_phy_type = NULL;
int mode_idx = -1, phy_idx = -1;
--
2.1.0
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[U-Boot] [Patch v4 2/5] usb: xhci: fsl: code cleanup for device tree fixup for fsl usb controllers
Performs code cleanup for device tree fixup for fsl usb controllers by
making functions to handle these similar errata checking code.
Signed-off-by: Rajesh Bhagat
Signed-off-by: Sriram Dash
---
Changes in v4:
- Removed parenthesis around has_erratum().
- Made USB controllers macros local to fsl-dt-fixup.c
- Changed the "usb2-ci" into "chipidea,usb2", which is a generic one.
Changes in v3:
- Inverted the condition for has_erratum for better readability
- If fdt_fixup_usb_erratum fails, return ENOSPC and exit the fixup
- Added logic for handling the condition with different controllers
with different erratas
- first check if the errata is applicable for the SoC
- then check if it is applicable for the controller
- if both are successful, then fix dt.
Changes in v2:
- Added patch description
- Removed the MACRO and use fdt_fixup_erratum function instead
drivers/usb/common/fsl-dt-fixup.c | 94 +++
1 file changed, 56 insertions(+), 38 deletions(-)
diff --git a/drivers/usb/common/fsl-dt-fixup.c
b/drivers/usb/common/fsl-dt-fixup.c
index 6f31932..1523f98 100644
--- a/drivers/usb/common/fsl-dt-fixup.c
+++ b/drivers/usb/common/fsl-dt-fixup.c
@@ -19,10 +19,16 @@
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#endif
+/* USB Controllers */
+#define FSL_USB2_MPH "fsl-usb2-mph"
+#define FSL_USB2_DR"fsl-usb2-dr"
+#define CHIPIDEA_USB2 "chipidea,usb2"
+#define SNPS_DWC3 "snps,dwc3"
+
static const char * const compat_usb_fsl[] = {
- "fsl-usb2-mph",
- "fsl-usb2-dr",
- "snps,dwc3",
+ FSL_USB2_MPH,
+ FSL_USB2_DR,
+ SNPS_DWC3,
NULL
};
@@ -80,16 +86,24 @@ static int fdt_fixup_usb_mode_phy_type(void *blob, const
char *mode,
}
static int fdt_fixup_usb_erratum(void *blob, const char *prop_erratum,
-int start_offset)
+const char *controller_type, int start_offset)
{
int node_offset, err;
const char *node_type = NULL;
+ const char *node_name = NULL;
err = fdt_usb_get_node_type(blob, start_offset,
&node_offset, &node_type);
if (err < 0)
return err;
+ if (!strcmp(node_type, FSL_USB2_MPH) || !strcmp(node_type, FSL_USB2_DR))
+ node_name = CHIPIDEA_USB2;
+ else
+ node_name = node_type;
+ if (strcmp(node_name, controller_type))
+ return err;
+
err = fdt_setprop(blob, node_offset, prop_erratum, NULL, 0);
if (err < 0) {
printf("ERROR: could not set %s for %s: %s.\n",
@@ -99,6 +113,23 @@ static int fdt_fixup_usb_erratum(void *blob, const char
*prop_erratum,
return node_offset;
}
+static int fdt_fixup_erratum(int *usb_erratum_off, void *blob,
+const char *controller_type, char *str,
+bool (*has_erratum)(void))
+{
+ char buf[32] = {0};
+
+ snprintf(buf, sizeof(buf), "fsl,usb-erratum-%s", str);
+ if (!has_erratum())
+ return -EINVAL;
+ *usb_erratum_off = fdt_fixup_usb_erratum(blob, buf, controller_type,
+*usb_erratum_off);
+ if (*usb_erratum_off < 0)
+ return -ENOSPC;
+ debug("Adding USB erratum %s\n", str);
+ return 0;
+}
+
void fdt_fixup_dr_usb(void *blob, bd_t *bd)
{
static const char * const modes[] = { "host", "peripheral", "otg" };
@@ -111,6 +142,7 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
int usb_phy_off = -1;
char str[5];
int i, j;
+ int ret;
for (i = 1; i <= CONFIG_USB_MAX_CONTROLLER_COUNT; i++) {
const char *dr_mode_type = NULL;
@@ -164,39 +196,25 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
if (usb_phy_off < 0)
return;
- if (has_erratum_a006261()) {
- usb_erratum_a006261_off = fdt_fixup_usb_erratum
- (blob,
- "fsl,usb-erratum-a006261",
- usb_erratum_a006261_off);
- if (usb_erratum_a006261_off < 0)
- return;
- }
-
- if (has_erratum_a007075()) {
- usb_erratum_a007075_off = fdt_fixup_usb_erratum
- (blob,
- "fsl,usb-erratum-a007075",
- usb_erratum_a007075_off);
-
[U-Boot] [Patch v4 5/5] usb: xhci: fsl: Add workaround for USB erratum A-008751
This patch is doing the following:
1. Implementing the errata for LS2080.
2. Adding fixup for fdt for LS2080.
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
Changes in v4:
- Reworked for changes done in errata checking code.
Changes in v3:
- Reworked for changes done in errata checking code.
- made inline bool erratum_a008751 as int erratum_a008751
- return 0 for success, 1 for failure for erratum_a008751
- dropped the APPLY_ERRATUM macro.
Changes in v2:
- Reworked for changes done in errata checking code.
.../include/asm/arch-fsl-layerscape/immap_lsch3.h | 1 +
board/freescale/ls2080aqds/ls2080aqds.c| 2 ++
board/freescale/ls2080ardb/ls2080ardb.c| 2 ++
drivers/usb/common/fsl-dt-fixup.c | 7 +++
drivers/usb/common/fsl-errata.c| 15 ++
drivers/usb/host/xhci-fsl.c| 24 ++
include/fsl_usb.h | 1 +
7 files changed, 52 insertions(+)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index e48bbaf..9b60bd3 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -139,6 +139,7 @@
/* Supplemental Configuration */
#define SCFG_BASE 0x01fc
#define SCFG_USB3PRM1CR0x000
+#define SCFG_USB3PRM1CR_INIT 0x27672b2a
#define TP_ITYP_AV 0x0001 /* Initiator available */
#define TP_ITYP_TYPE(x)(((x) & 0x6) >> 1) /* Initiator Type */
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c
b/board/freescale/ls2080aqds/ls2080aqds.c
index 897793d..479f689 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -298,6 +298,8 @@ int ft_board_setup(void *blob, bd_t *bd)
fdt_fixup_memory_banks(blob, base, size, 2);
+ fdt_fixup_dr_usb(blob, bd);
+
#ifdef CONFIG_FSL_MC_ENET
fdt_fixup_board_enet(blob);
err = fsl_mc_ldpaa_exit(bd);
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c
b/board/freescale/ls2080ardb/ls2080ardb.c
index 52e5e3f..a65cd4a 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -281,6 +281,8 @@ int ft_board_setup(void *blob, bd_t *bd)
fdt_fixup_memory_banks(blob, base, size, 2);
+ fdt_fixup_dr_usb(blob, bd);
+
#ifdef CONFIG_FSL_MC_ENET
fdt_fixup_board_enet(blob);
err = fsl_mc_ldpaa_exit(bd);
diff --git a/drivers/usb/common/fsl-dt-fixup.c
b/drivers/usb/common/fsl-dt-fixup.c
index 930ca1d..9c48852 100644
--- a/drivers/usb/common/fsl-dt-fixup.c
+++ b/drivers/usb/common/fsl-dt-fixup.c
@@ -139,6 +139,7 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
int usb_erratum_a007075_off = -1;
int usb_erratum_a007792_off = -1;
int usb_erratum_a005697_off = -1;
+ int usb_erratum_a008751_off = -1;
int usb_mode_off = -1;
int usb_phy_off = -1;
char str[5];
@@ -217,5 +218,11 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
has_erratum_a005697);
if (ret == -ENOSPC)
return;
+ ret = fdt_fixup_erratum(&usb_erratum_a008751_off, blob,
+ SNPS_DWC3, "a008751",
+ has_erratum_a008751);
+ if (ret == -ENOSPC)
+ return;
+
}
}
diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c
index 95918fc..ebe60a8 100644
--- a/drivers/usb/common/fsl-errata.c
+++ b/drivers/usb/common/fsl-errata.c
@@ -175,4 +175,19 @@ bool has_erratum_a004477(void)
return false;
}
+bool has_erratum_a008751(void)
+{
+ u32 svr = get_svr();
+ u32 soc = SVR_SOC_VER(svr);
+
+ switch (soc) {
+#ifdef CONFIG_ARM64
+ case SVR_LS2080:
+ case SVR_LS2085:
+ return IS_SVR_REV(svr, 1, 0);
+#endif
+ }
+ return false;
+}
+
#endif
diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
index 05f09d7..c12a189 100644
--- a/drivers/usb/host/xhci-fsl.c
+++ b/drivers/usb/host/xhci-fsl.c
@@ -15,6 +15,8 @@
#include
#include
#include "xhci.h"
+#include
+#include
/* Declare global data pointer */
DECLARE_GLOBAL_DATA_PTR;
@@ -27,6 +29,26 @@ __weak int __board_usb_init(int index, enum usb_init_type
init)
return 0;
}
+static int erratum_a008751(void)
+{
+#if defined(CONFIG_TARGET_LS2080AQDS) || defined(CONFIG_TARGET_LS2080ARDB)
+ u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
+ writel(SCFG_USB3PRM1CR_INIT, scfg + SCFG_USB3PRM1CR / 4);
+ return 0;
+#endif
+ return 1;
+}
+
+static void fsl_apply_xhci_errata(void)
+{
+ int ret;
+ if (has_erratum_a008751()) {
+
[U-Boot] [Patch v4 3/5] fsl: usb: make errata function common for PPC and ARM
This patch does the following things:
1. Makes the errata checking code common for PPC and ARM
2. Moves all these static inline functions into a dedicated C file
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
Changes in v4:
- Rework done according to previous patches.
Changes in v3:
- Rework done according to previous patches.
Changes in v2:
- Moves all the static inline functions into a dedicated C file
drivers/usb/common/Makefile | 4 +-
drivers/usb/common/fsl-dt-fixup.c | 1 +
drivers/usb/common/fsl-errata.c | 178 +++
include/fsl_usb.h | 191 ++
4 files changed, 189 insertions(+), 185 deletions(-)
create mode 100644 drivers/usb/common/fsl-errata.c
diff --git a/drivers/usb/common/Makefile b/drivers/usb/common/Makefile
index 2f46d38..aee7e32 100644
--- a/drivers/usb/common/Makefile
+++ b/drivers/usb/common/Makefile
@@ -4,5 +4,5 @@
#
obj-$(CONFIG_DM_USB) += common.o
-obj-$(CONFIG_USB_EHCI_FSL) += fsl-dt-fixup.o
-obj-$(CONFIG_USB_XHCI_FSL) += fsl-dt-fixup.o
+obj-$(CONFIG_USB_EHCI_FSL) += fsl-dt-fixup.o fsl-errata.o
+obj-$(CONFIG_USB_XHCI_FSL) += fsl-dt-fixup.o fsl-errata.o
diff --git a/drivers/usb/common/fsl-dt-fixup.c
b/drivers/usb/common/fsl-dt-fixup.c
index 1523f98..930ca1d 100644
--- a/drivers/usb/common/fsl-dt-fixup.c
+++ b/drivers/usb/common/fsl-dt-fixup.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
#include
#include
diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c
new file mode 100644
index 000..95918fc
--- /dev/null
+++ b/drivers/usb/common/fsl-errata.c
@@ -0,0 +1,178 @@
+/*
+ * Freescale USB Controller
+ *
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+
+/* USB Erratum Checking code */
+#if defined(CONFIG_PPC) || defined(CONFIG_ARM)
+bool has_dual_phy(void)
+{
+ u32 svr = get_svr();
+ u32 soc = SVR_SOC_VER(svr);
+
+ switch (soc) {
+#ifdef CONFIG_PPC
+ case SVR_T1023:
+ case SVR_T1024:
+ case SVR_T1013:
+ case SVR_T1014:
+ return IS_SVR_REV(svr, 1, 0);
+ case SVR_T1040:
+ case SVR_T1042:
+ case SVR_T1020:
+ case SVR_T1022:
+ case SVR_T2080:
+ case SVR_T2081:
+ return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
+ case SVR_T4240:
+ case SVR_T4160:
+ case SVR_T4080:
+ return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+#endif
+ }
+
+ return false;
+}
+
+bool has_erratum_a006261(void)
+{
+ u32 svr = get_svr();
+ u32 soc = SVR_SOC_VER(svr);
+
+ switch (soc) {
+#ifdef CONFIG_PPC
+ case SVR_P1010:
+ return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+ case SVR_P2041:
+ case SVR_P2040:
+ return IS_SVR_REV(svr, 1, 0) ||
+ IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1);
+ case SVR_P3041:
+ return IS_SVR_REV(svr, 1, 0) ||
+ IS_SVR_REV(svr, 1, 1) ||
+ IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);
+ case SVR_P5010:
+ case SVR_P5020:
+ case SVR_P5021:
+ return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+ case SVR_T4240:
+ case SVR_T4160:
+ case SVR_T4080:
+ return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+ case SVR_T1040:
+ return IS_SVR_REV(svr, 1, 0);
+ case SVR_T2080:
+ case SVR_T2081:
+ return IS_SVR_REV(svr, 1, 0);
+ case SVR_P5040:
+ return IS_SVR_REV(svr, 1, 0);
+#endif
+ }
+
+ return false;
+}
+
+bool has_erratum_a007075(void)
+{
+ u32 svr = get_svr();
+ u32 soc = SVR_SOC_VER(svr);
+
+ switch (soc) {
+#ifdef CONFIG_PPC
+ case SVR_B4860:
+ case SVR_B4420:
+ return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+ case SVR_P1010:
+ return IS_SVR_REV(svr, 1, 0);
+ case SVR_P4080:
+ return IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 3, 0);
+#endif
+ }
+ return false;
+}
+
+bool has_erratum_a007798(void)
+{
+#ifdef CONFIG_PPC
+ return SVR_SOC_VER(get_svr()) == SVR_T4240 &&
+ IS_SVR_REV(get_svr(), 2, 0);
+#endif
+ return false;
+}
+
+bool has_erratum_a007792(void)
+{
+ u32 svr = get_svr();
+ u32 soc = SVR_SOC_VER(svr);
+
+ switch (soc) {
+#ifdef CONFIG_PPC
+ case SVR_T4240:
+ case SVR_T4160:
+ case SVR_T4080:
+ return IS_SVR_REV(svr, 2, 0);
+ case SVR_T1024:
+ case SVR_T1023:
+ return IS_SVR_REV(svr, 1, 0);
+ case SVR_T1040:
+ case SVR_T1042:
+ case SVR_T1020:
+ case SVR_T1022:
+ case SVR_T2080:
+ case SVR_T2081:
+ return IS_SVR_RE
[U-Boot] [Patch v4 4/5] armv8/ls2080: Remove workaround for erratum A008751
This errata a008751 is applied on Soc specific file currently.This will be
moved to a file where all the errata implementation will take place for usb
for fsl. This patch removes the errata workaround from soc specific file
for LS2080.
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
Changes in v4:
- No update
Changes in v3:
- Modified commit message
Changes in v2:
- No update
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index dd633f3..d8ec426 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -124,15 +124,6 @@ void erratum_a009635(void)
}
#endif /* CONFIG_SYS_FSL_ERRATUM_A009635 */
-static void erratum_a008751(void)
-{
-#ifdef CONFIG_SYS_FSL_ERRATUM_A008751
- u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
-
- writel(0x27672b2a, scfg + SCFG_USB3PRM1CR / 4);
-#endif
-}
-
static void erratum_rcw_src(void)
{
#if defined(CONFIG_SPL)
@@ -189,7 +180,6 @@ void bypass_smmu(void)
}
void fsl_lsch3_early_init_f(void)
{
- erratum_a008751();
erratum_rcw_src();
init_early_memctl_regs(); /* tighten IFC timing */
erratum_a009203();
--
2.1.0
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[U-Boot] [Patch v4 1/5] arm64: fsl-layerscape: add get_svr and IS_SVR_REV helper
Adds get_svr and IS_SVR_REV helpers for ARMv8 platforms,
similar to PPC and ARMv7.
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
Changes in v4:
- Parenthesis around all the macro args.
Changes in v3:
- Added commit message
Changes in v2:
- No update
arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 7 +++
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 2 ++
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 3 +++
arch/arm/include/asm/arch-fsl-layerscape/soc.h | 2 ++
4 files changed, 14 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 9a5a6b5..9c575c1 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -528,6 +528,13 @@ u32 fsl_qoriq_core_to_type(unsigned int core)
return -1; /* cannot identify the cluster */
}
+uint get_svr(void)
+{
+ struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+
+ return gur_in32(&gur->svr);
+}
+
#ifdef CONFIG_DISPLAY_CPUINFO
int print_cpuinfo(void)
{
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index e98e055..8b8a7c1 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -596,4 +596,6 @@ struct ccsr_cci400 {
#define SCR0_CLIENTPD_MASK 0x0001
#define SCR0_USFCFG_MASK 0x0400
+uint get_svr(void);
+
#endif /* __ARCH_FSL_LSCH2_IMMAP_H__*/
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index 65b3357..e48bbaf 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -319,4 +319,7 @@ struct ccsr_reset {
u32 ip_rev1;/* 0xbf8 */
u32 ip_rev2;/* 0xbfc */
};
+
+uint get_svr(void);
+
#endif /* __ARCH_FSL_LSCH3_IMMAP_H_ */
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index 02ecc62..2cb6c54 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -53,6 +53,8 @@ struct cpu_type {
#define SVR_MIN(svr) (((svr) >> 0) & 0xf)
#define SVR_SOC_VER(svr) (((svr) >> 8) & SVR_WO_E)
#define IS_E_PROCESSOR(svr)(!((svr >> 8) & 0x1))
+#define IS_SVR_REV(svr, maj, min) \
+ ((SVR_MAJ(svr) == (maj)) && (SVR_MIN(svr) == (min)))
/* ahci port register default value */
#define AHCI_PORT_PHY_1_CFG0xa003fffe
--
2.1.0
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[U-Boot] [Patch v4 0/5] Supporting ARM v8 USB errata for FSL
The patch-set does the following : 1. Adds support for ARM for USB Erratum Checking code for implementing the USB Erratum for fsl. 2. Performs code cleanup to reduce redundancy when adding fsl device tree fixup. 3. Implements Erratum A008751 for LS2 platform. Sriram Dash (5): arm64: fsl-layerscape: add get_svr and IS_SVR_REV helper usb: xhci: fsl: code cleanup for device tree fixup for fsl usb controllers fsl: usb: make errata function common for PPC and ARM armv8/ls2080: Remove workaround for erratum A008751 usb: xhci: fsl: Add workaround for USB erratum A-008751 arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 7 + arch/arm/cpu/armv8/fsl-layerscape/soc.c| 10 -- .../include/asm/arch-fsl-layerscape/immap_lsch2.h | 2 + .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 4 + arch/arm/include/asm/arch-fsl-layerscape/soc.h | 2 + board/freescale/ls2080aqds/ls2080aqds.c| 2 + board/freescale/ls2080ardb/ls2080ardb.c| 2 + drivers/usb/common/Makefile| 4 +- drivers/usb/common/fsl-dt-fixup.c | 100 +++ .../fsl_usb.h => drivers/usb/common/fsl-errata.c | 152 drivers/usb/host/xhci-fsl.c| 24 +++ include/fsl_usb.h | 192 + 12 files changed, 153 insertions(+), 348 deletions(-) copy include/fsl_usb.h => drivers/usb/common/fsl-errata.c (50%) -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 2/5] usb: xhci: fsl: code cleanup for device tree fixup for fsl usb controllers
>From: Marek Vasut [mailto:ma...@denx.de]
>On 06/10/2016 07:20 AM, Sriram Dash wrote:
>>> From: Marek Vasut [mailto:ma...@denx.de] On 06/10/2016 05:47 AM,
>>> Sriram Dash wrote:
>>>>> -Original Message-
>>>>> From: Marek Vasut [mailto:ma...@denx.de]
>>>>> Sent: Thursday, June 09, 2016 7:01 PM
>>>>> To: Sriram Dash ; u-boot@lists.denx.de
>>>>> Cc: york sun ; albert.u.b...@aribaud.net; Rajesh
>>>>> Bhagat
>>>>> Subject: Re: [PATCH v3 2/5] usb: xhci: fsl: code cleanup for device
>>>>> tree fixup for fsl usb controllers
>>>
>>> Would you please fix your mailer to omit this useless header ?
>>>
>>> [...]
>>>
>>
>> Will take care next time onwards.
>>
>>>>>> diff --git a/include/fsl_usb.h b/include/fsl_usb.h index
>>>>>> 187e384..882a5f5 100644
>>>>>> --- a/include/fsl_usb.h
>>>>>> +++ b/include/fsl_usb.h
>>>>>> @@ -85,6 +85,12 @@ struct ccsr_usb_phy { #define
>>>>>> CONFIG_SYS_FSL_USB_SQUELCH_PROG_MASK 0x07 #endif
>>>>>>
>>>>>> +/* USB Controllers */
>>>>>> +#define FSL_USB2_MPH"fsl-usb2-mph"
>>>>>> +#define FSL_USB2_DR "fsl-usb2-dr"
>>>>>> +#define USB2_CI "usb2-ci"
>>>
>>> What is this "usb2-ci" string ? Is this some DT property or DT
>>> compatible property or just some random string?
>>>
>>
>> Currently, for chipidea usb 2 controller, there is no generic DT
>> compatible property.
>
>Linux kernel documentation says there is "chipidea,usb2":
>
>https://www.kernel.org/doc/Documentation/devicetree/bindings/usb/ci-hdrc-
>usb2.txt
>
>> Some names used are "qcom,ci-hdrc",
>> "chipidea,usb2","fsl-usb2-dr","fsl-usb2-mph ". This string "usb2-ci"
>> is not used currently for DT property.
>
>The "chipidea,usb2" is generic one, all the others are either heritage from
>the past
>or more precise specifiers of the IP block. Do not invent yet another new
>compatible property in this case, it makes zero sense.
>
Ok. Will change the "usb2-ci" into "chipidea,usb2" and "USB2_CI" into
CHIPIDEA_USB2 in v4.
>>>>>> +#define SNPS_DWC3 "snps,dwc3"
>>>>>
>>>>> Is this needed as a global macro or can it be local to fsl-dt-fixup.c ?
>>>>>
>>>>
>>>> Currently, the macro are only being used for dt fixup for fsl usb.
>>>> However, in the near future, they might be needed for some other
>>>> purpose, for example, board specific settings.
>>>
>>> If they will be used for other purpose, then they can be moved. They
>>> are local now, so keep them local.
>>>
>>
>> Ok. I will move the global macro to fsl-dt-fixup.c.
>>
>>>> So, i think i will stick with the global macro.
>>>>
>>>>>> /* USB Erratum Checking code */
>>>>>> #ifdef CONFIG_PPC
>>>>>> static inline bool has_dual_phy(void)
>>>>>>
>>>>>
>>>>>
>>>>> --
>>>>> Best regards,
>>>>> Marek Vasut
>>>
>>>
>>> --
>>> Best regards,
>>> Marek Vasut
>
>
>--
>Best regards,
>Marek Vasut
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Re: [U-Boot] [PATCH v3 2/5] usb: xhci: fsl: code cleanup for device tree fixup for fsl usb controllers
>From: Marek Vasut [mailto:ma...@denx.de]
>On 06/10/2016 05:47 AM, Sriram Dash wrote:
>>> -Original Message-
>>> From: Marek Vasut [mailto:ma...@denx.de]
>>> Sent: Thursday, June 09, 2016 7:01 PM
>>> To: Sriram Dash ; u-boot@lists.denx.de
>>> Cc: york sun ; albert.u.b...@aribaud.net; Rajesh
>>> Bhagat
>>> Subject: Re: [PATCH v3 2/5] usb: xhci: fsl: code cleanup for device
>>> tree fixup for fsl usb controllers
>
>Would you please fix your mailer to omit this useless header ?
>
>[...]
>
Will take care next time onwards.
>>>> diff --git a/include/fsl_usb.h b/include/fsl_usb.h index
>>>> 187e384..882a5f5 100644
>>>> --- a/include/fsl_usb.h
>>>> +++ b/include/fsl_usb.h
>>>> @@ -85,6 +85,12 @@ struct ccsr_usb_phy { #define
>>>> CONFIG_SYS_FSL_USB_SQUELCH_PROG_MASK 0x07 #endif
>>>>
>>>> +/* USB Controllers */
>>>> +#define FSL_USB2_MPH "fsl-usb2-mph"
>>>> +#define FSL_USB2_DR "fsl-usb2-dr"
>>>> +#define USB2_CI "usb2-ci"
>
>What is this "usb2-ci" string ? Is this some DT property or DT compatible
>property or
>just some random string?
>
Currently, for chipidea usb 2 controller, there is no generic
DT compatible property. Some names used are "qcom,ci-hdrc",
"chipidea,usb2","fsl-usb2-dr","fsl-usb2-mph ". This string "usb2-ci"
is not used currently for DT property.
>>>> +#define SNPS_DWC3 "snps,dwc3"
>>>
>>> Is this needed as a global macro or can it be local to fsl-dt-fixup.c ?
>>>
>>
>> Currently, the macro are only being used for dt fixup for fsl usb.
>> However, in the near future, they might be needed for some other
>> purpose, for example, board specific settings.
>
>If they will be used for other purpose, then they can be moved. They are local
>now,
>so keep them local.
>
Ok. I will move the global macro to fsl-dt-fixup.c.
>> So, i think i will stick with the global macro.
>>
>>>> /* USB Erratum Checking code */
>>>> #ifdef CONFIG_PPC
>>>> static inline bool has_dual_phy(void)
>>>>
>>>
>>>
>>> --
>>> Best regards,
>>> Marek Vasut
>
>
>--
>Best regards,
>Marek Vasut
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Re: [U-Boot] [PATCH v3 2/5] usb: xhci: fsl: code cleanup for device tree fixup for fsl usb controllers
>-Original Message-
>From: Marek Vasut [mailto:ma...@denx.de]
>Sent: Thursday, June 09, 2016 7:01 PM
>To: Sriram Dash ; u-boot@lists.denx.de
>Cc: york sun ; albert.u.b...@aribaud.net; Rajesh Bhagat
>
>Subject: Re: [PATCH v3 2/5] usb: xhci: fsl: code cleanup for device tree fixup
>for fsl
>usb controllers
>
>On 06/09/2016 02:21 PM, Sriram Dash wrote:
>> Performs code cleanup for device tree fixup for fsl usb controllers by
>> making functions to handle these similar errata checking code.
>>
>> Signed-off-by: Rajesh Bhagat
>> Signed-off-by: Sriram Dash
>> ---
>>
>> Changes in v3:
>> - Inverted the condition for has_erratum for better readability
>> - If fdt_fixup_usb_erratum fails, return ENOSPC and exit the fixup
>> - Added logic for handling the condition with different controllers
>> with different erratas
>> - first check if the errata is applicable for the SoC
>> - then check if it is applicable for the controller
>> - if both are successful, then fix dt.
>>
>> Changes in v2:
>> - Added patch description
>> - Removed the MACRO and use fdt_fixup_erratum function instead
>>
>> drivers/usb/common/fsl-dt-fixup.c | 88
>> ++-
>> include/fsl_usb.h | 6 +++
>> 2 files changed, 56 insertions(+), 38 deletions(-)
>>
>> diff --git a/drivers/usb/common/fsl-dt-fixup.c
>> b/drivers/usb/common/fsl-dt-fixup.c
>> index 6f31932..9cbd9d2 100644
>> --- a/drivers/usb/common/fsl-dt-fixup.c
>> +++ b/drivers/usb/common/fsl-dt-fixup.c
>> @@ -20,9 +20,9 @@
>> #endif
>>
>> static const char * const compat_usb_fsl[] = {
>> -"fsl-usb2-mph",
>> -"fsl-usb2-dr",
>> -"snps,dwc3",
>> +FSL_USB2_MPH,
>> +FSL_USB2_DR,
>> +SNPS_DWC3,
>> NULL
>> };
>>
>> @@ -80,16 +80,24 @@ static int fdt_fixup_usb_mode_phy_type(void *blob,
>> const char *mode, }
>>
>> static int fdt_fixup_usb_erratum(void *blob, const char *prop_erratum,
>> - int start_offset)
>> + const char *controller_type, int start_offset)
>> {
>> int node_offset, err;
>> const char *node_type = NULL;
>> +const char *node_name = NULL;
>>
>> err = fdt_usb_get_node_type(blob, start_offset,
>> &node_offset, &node_type);
>> if (err < 0)
>> return err;
>>
>> +if (!strcmp(node_type, FSL_USB2_MPH) || !strcmp(node_type,
>FSL_USB2_DR))
>> +node_name = USB2_CI;
>> +else
>> +node_name = node_type;
>> +if (strcmp(node_name, controller_type))
>> +return err;
>> +
>> err = fdt_setprop(blob, node_offset, prop_erratum, NULL, 0);
>> if (err < 0) {
>> printf("ERROR: could not set %s for %s: %s.\n", @@ -99,6 +107,23
>@@
>> static int fdt_fixup_usb_erratum(void *blob, const char *prop_erratum,
>> return node_offset;
>> }
>>
>> +static int fdt_fixup_erratum(int *usb_erratum_off, void *blob,
>> + const char *controller_type, char *str,
>> + bool (*has_erratum)(void))
>> +{
>> +char buf[32] = {0};
>> +
>> +snprintf(buf, sizeof(buf), "fsl,usb-erratum-%s", str);
>> +if (!(has_erratum()))
>
>No need for the extra parenthesis around has_erratum() .
>
Ok. Will remove parenthesis in v4.
>> +return -EINVAL;
>> +*usb_erratum_off = fdt_fixup_usb_erratum(blob, buf, controller_type,
>> + *usb_erratum_off);
>> +if (*usb_erratum_off < 0)
>> +return -ENOSPC;
>> +debug("Adding USB erratum %s\n", str);
>> +return 0;
>> +}
>> +
>> void fdt_fixup_dr_usb(void *blob, bd_t *bd) {
>> static const char * const modes[] = { "host", "peripheral", "otg" };
>> @@ -111,6 +136,7 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
>> int usb_phy_off = -1;
>> char str[5];
>> int i, j;
>> +int ret;
>>
>> for (i = 1; i <= CONFIG_USB_MAX_CONTROLLER_COUNT; i++) {
>> const char *dr_mode_type = NULL;
>> @@ -164,39 +190,25 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
>> if (usb_phy_off < 0)
>> return;
>>
Re: [U-Boot] [PATCH v3 1/5] arm64: fsl-layerscape: add get_svr and IS_SVR_REV helper
>-Original Message-
>From: Marek Vasut [mailto:ma...@denx.de]
>Sent: Thursday, June 09, 2016 6:58 PM
>To: Sriram Dash ; u-boot@lists.denx.de
>Cc: york sun ; albert.u.b...@aribaud.net; Rajesh Bhagat
>
>Subject: Re: [PATCH v3 1/5] arm64: fsl-layerscape: add get_svr and IS_SVR_REV
>helper
>
>On 06/09/2016 02:21 PM, Sriram Dash wrote:
>> Adds get_svr and IS_SVR_REV helpers for ARMv8 platforms, similar to
>> PPC and ARMv7.
>>
>> Signed-off-by: Sriram Dash
>> Signed-off-by: Rajesh Bhagat
>> ---
>>
>> Changes in v1:
>> - Added commit message
>>
>> Changes in v2:
>> - No update
>
>So what changed in V3 here ?
>
Typo mistake. Will take care in v4.
>> arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 7 +++
>> arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 2 ++
>> arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 3 +++
>> arch/arm/include/asm/arch-fsl-layerscape/soc.h | 2 ++
>> 4 files changed, 14 insertions(+)
>>
>> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
>> b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
>> index 9a5a6b5..9c575c1 100644
>> --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
>> +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
>> @@ -528,6 +528,13 @@ u32 fsl_qoriq_core_to_type(unsigned int core)
>> return -1; /* cannot identify the cluster */
>> }
>>
>> +uint get_svr(void)
>> +{
>> +struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
>> +
>> +return gur_in32(&gur->svr);
>> +}
>> +
>> #ifdef CONFIG_DISPLAY_CPUINFO
>> int print_cpuinfo(void)
>> {
>> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
>> b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
>> index e98e055..8b8a7c1 100644
>> --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
>> +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
>> @@ -596,4 +596,6 @@ struct ccsr_cci400 {
>> #define SCR0_CLIENTPD_MASK 0x0001
>> #define SCR0_USFCFG_MASK0x0400
>>
>> +uint get_svr(void);
>> +
>> #endif /* __ARCH_FSL_LSCH2_IMMAP_H__*/
>> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
>> b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
>> index 65b3357..e48bbaf 100644
>> --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
>> +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
>> @@ -319,4 +319,7 @@ struct ccsr_reset {
>> u32 ip_rev1;/* 0xbf8 */
>> u32 ip_rev2;/* 0xbfc */
>> };
>> +
>> +uint get_svr(void);
>> +
>> #endif /* __ARCH_FSL_LSCH3_IMMAP_H_ */ diff --git
>> a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
>> b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
>> index 02ecc62..f244904 100644
>> --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
>> +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
>> @@ -53,6 +53,8 @@ struct cpu_type {
>> #define SVR_MIN(svr)(((svr) >> 0) & 0xf)
>> #define SVR_SOC_VER(svr)(((svr) >> 8) & SVR_WO_E)
>> #define IS_E_PROCESSOR(svr) (!((svr >> 8) & 0x1))
>> +#define IS_SVR_REV(svr, maj, min) \
>> +((SVR_MAJ(svr) == maj) && (SVR_MIN(svr) == min))
>
>This is susceptible to macro expansion problems, you need parenthesis around
>all
>the macro args:
>((SVR_MAJ(svr) == (maj)) && (SVR_MIN(svr) == (min)))
>
Ok. Will take care in v4.
>> /* ahci port register default value */
>> #define AHCI_PORT_PHY_1_CFG0xa003fffe
>>
>
>
>--
>Best regards,
>Marek Vasut
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[U-Boot] [PATCH v3 5/5] usb: xhci: fsl: Add workaround for USB erratum A-008751
This patch is doing the following:
1. Implementing the errata for LS2080.
2. Adding fixup for fdt for LS2080.
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
Changes in v3:
- Reworked for changes done in errata checking code.
- made inline bool erratum_a008751 as int erratum_a008751
- return 0 for success, 1 for failure for erratum_a008751
- dropped the APPLY_ERRATUM macro.
Changes in v2:
- Reworked for changes done in errata checking code.
.../include/asm/arch-fsl-layerscape/immap_lsch3.h | 1 +
board/freescale/ls2080aqds/ls2080aqds.c| 2 ++
board/freescale/ls2080ardb/ls2080ardb.c| 2 ++
drivers/usb/common/fsl-dt-fixup.c | 7 +++
drivers/usb/common/fsl-errata.c| 15 ++
drivers/usb/host/xhci-fsl.c| 24 ++
include/fsl_usb.h | 1 +
7 files changed, 52 insertions(+)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index e48bbaf..9b60bd3 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -139,6 +139,7 @@
/* Supplemental Configuration */
#define SCFG_BASE 0x01fc
#define SCFG_USB3PRM1CR0x000
+#define SCFG_USB3PRM1CR_INIT 0x27672b2a
#define TP_ITYP_AV 0x0001 /* Initiator available */
#define TP_ITYP_TYPE(x)(((x) & 0x6) >> 1) /* Initiator Type */
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c
b/board/freescale/ls2080aqds/ls2080aqds.c
index 897793d..479f689 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -298,6 +298,8 @@ int ft_board_setup(void *blob, bd_t *bd)
fdt_fixup_memory_banks(blob, base, size, 2);
+ fdt_fixup_dr_usb(blob, bd);
+
#ifdef CONFIG_FSL_MC_ENET
fdt_fixup_board_enet(blob);
err = fsl_mc_ldpaa_exit(bd);
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c
b/board/freescale/ls2080ardb/ls2080ardb.c
index 52e5e3f..a65cd4a 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -281,6 +281,8 @@ int ft_board_setup(void *blob, bd_t *bd)
fdt_fixup_memory_banks(blob, base, size, 2);
+ fdt_fixup_dr_usb(blob, bd);
+
#ifdef CONFIG_FSL_MC_ENET
fdt_fixup_board_enet(blob);
err = fsl_mc_ldpaa_exit(bd);
diff --git a/drivers/usb/common/fsl-dt-fixup.c
b/drivers/usb/common/fsl-dt-fixup.c
index 49d1140..2133b88 100644
--- a/drivers/usb/common/fsl-dt-fixup.c
+++ b/drivers/usb/common/fsl-dt-fixup.c
@@ -133,6 +133,7 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
int usb_erratum_a007075_off = -1;
int usb_erratum_a007792_off = -1;
int usb_erratum_a005697_off = -1;
+ int usb_erratum_a008751_off = -1;
int usb_mode_off = -1;
int usb_phy_off = -1;
char str[5];
@@ -211,5 +212,11 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
has_erratum_a005697);
if (ret == -ENOSPC)
return;
+ ret = fdt_fixup_erratum(&usb_erratum_a008751_off, blob,
+ SNPS_DWC3, "a008751",
+ has_erratum_a008751);
+ if (ret == -ENOSPC)
+ return;
+
}
}
diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c
index 95918fc..ebe60a8 100644
--- a/drivers/usb/common/fsl-errata.c
+++ b/drivers/usb/common/fsl-errata.c
@@ -175,4 +175,19 @@ bool has_erratum_a004477(void)
return false;
}
+bool has_erratum_a008751(void)
+{
+ u32 svr = get_svr();
+ u32 soc = SVR_SOC_VER(svr);
+
+ switch (soc) {
+#ifdef CONFIG_ARM64
+ case SVR_LS2080:
+ case SVR_LS2085:
+ return IS_SVR_REV(svr, 1, 0);
+#endif
+ }
+ return false;
+}
+
#endif
diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
index 05f09d7..c12a189 100644
--- a/drivers/usb/host/xhci-fsl.c
+++ b/drivers/usb/host/xhci-fsl.c
@@ -15,6 +15,8 @@
#include
#include
#include "xhci.h"
+#include
+#include
/* Declare global data pointer */
DECLARE_GLOBAL_DATA_PTR;
@@ -27,6 +29,26 @@ __weak int __board_usb_init(int index, enum usb_init_type
init)
return 0;
}
+static int erratum_a008751(void)
+{
+#if defined(CONFIG_TARGET_LS2080AQDS) || defined(CONFIG_TARGET_LS2080ARDB)
+ u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
+ writel(SCFG_USB3PRM1CR_INIT, scfg + SCFG_USB3PRM1CR / 4);
+ return 0;
+#endif
+ return 1;
+}
+
+static void fsl_apply_xhci_errata(void)
+{
+ int ret;
+ if (has_erratum_a008751()) {
+ ret = erratum_a008751();
+ if (ret != 0)
+
[U-Boot] [PATCH v3 4/5] armv8/ls2080: Remove workaround for erratum A008751
This errata a008751 is applied on Soc specific file currently.This will be
moved to a file where all the errata implementation will take place for usb
for fsl. This patch removes the errata workaround from soc specific file
for LS2080.
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
Changes in v2:
- Modified commit message
Changes in v2:
- No update
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index dd633f3..d8ec426 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -124,15 +124,6 @@ void erratum_a009635(void)
}
#endif /* CONFIG_SYS_FSL_ERRATUM_A009635 */
-static void erratum_a008751(void)
-{
-#ifdef CONFIG_SYS_FSL_ERRATUM_A008751
- u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
-
- writel(0x27672b2a, scfg + SCFG_USB3PRM1CR / 4);
-#endif
-}
-
static void erratum_rcw_src(void)
{
#if defined(CONFIG_SPL)
@@ -189,7 +180,6 @@ void bypass_smmu(void)
}
void fsl_lsch3_early_init_f(void)
{
- erratum_a008751();
erratum_rcw_src();
init_early_memctl_regs(); /* tighten IFC timing */
erratum_a009203();
--
2.1.0
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[U-Boot] [PATCH v3 2/5] usb: xhci: fsl: code cleanup for device tree fixup for fsl usb controllers
Performs code cleanup for device tree fixup for fsl usb controllers by
making functions to handle these similar errata checking code.
Signed-off-by: Rajesh Bhagat
Signed-off-by: Sriram Dash
---
Changes in v3:
- Inverted the condition for has_erratum for better readability
- If fdt_fixup_usb_erratum fails, return ENOSPC and exit the fixup
- Added logic for handling the condition with different controllers
with different erratas
- first check if the errata is applicable for the SoC
- then check if it is applicable for the controller
- if both are successful, then fix dt.
Changes in v2:
- Added patch description
- Removed the MACRO and use fdt_fixup_erratum function instead
drivers/usb/common/fsl-dt-fixup.c | 88 ++-
include/fsl_usb.h | 6 +++
2 files changed, 56 insertions(+), 38 deletions(-)
diff --git a/drivers/usb/common/fsl-dt-fixup.c
b/drivers/usb/common/fsl-dt-fixup.c
index 6f31932..9cbd9d2 100644
--- a/drivers/usb/common/fsl-dt-fixup.c
+++ b/drivers/usb/common/fsl-dt-fixup.c
@@ -20,9 +20,9 @@
#endif
static const char * const compat_usb_fsl[] = {
- "fsl-usb2-mph",
- "fsl-usb2-dr",
- "snps,dwc3",
+ FSL_USB2_MPH,
+ FSL_USB2_DR,
+ SNPS_DWC3,
NULL
};
@@ -80,16 +80,24 @@ static int fdt_fixup_usb_mode_phy_type(void *blob, const
char *mode,
}
static int fdt_fixup_usb_erratum(void *blob, const char *prop_erratum,
-int start_offset)
+const char *controller_type, int start_offset)
{
int node_offset, err;
const char *node_type = NULL;
+ const char *node_name = NULL;
err = fdt_usb_get_node_type(blob, start_offset,
&node_offset, &node_type);
if (err < 0)
return err;
+ if (!strcmp(node_type, FSL_USB2_MPH) || !strcmp(node_type, FSL_USB2_DR))
+ node_name = USB2_CI;
+ else
+ node_name = node_type;
+ if (strcmp(node_name, controller_type))
+ return err;
+
err = fdt_setprop(blob, node_offset, prop_erratum, NULL, 0);
if (err < 0) {
printf("ERROR: could not set %s for %s: %s.\n",
@@ -99,6 +107,23 @@ static int fdt_fixup_usb_erratum(void *blob, const char
*prop_erratum,
return node_offset;
}
+static int fdt_fixup_erratum(int *usb_erratum_off, void *blob,
+const char *controller_type, char *str,
+bool (*has_erratum)(void))
+{
+ char buf[32] = {0};
+
+ snprintf(buf, sizeof(buf), "fsl,usb-erratum-%s", str);
+ if (!(has_erratum()))
+ return -EINVAL;
+ *usb_erratum_off = fdt_fixup_usb_erratum(blob, buf, controller_type,
+*usb_erratum_off);
+ if (*usb_erratum_off < 0)
+ return -ENOSPC;
+ debug("Adding USB erratum %s\n", str);
+ return 0;
+}
+
void fdt_fixup_dr_usb(void *blob, bd_t *bd)
{
static const char * const modes[] = { "host", "peripheral", "otg" };
@@ -111,6 +136,7 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
int usb_phy_off = -1;
char str[5];
int i, j;
+ int ret;
for (i = 1; i <= CONFIG_USB_MAX_CONTROLLER_COUNT; i++) {
const char *dr_mode_type = NULL;
@@ -164,39 +190,25 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
if (usb_phy_off < 0)
return;
- if (has_erratum_a006261()) {
- usb_erratum_a006261_off = fdt_fixup_usb_erratum
- (blob,
- "fsl,usb-erratum-a006261",
- usb_erratum_a006261_off);
- if (usb_erratum_a006261_off < 0)
- return;
- }
-
- if (has_erratum_a007075()) {
- usb_erratum_a007075_off = fdt_fixup_usb_erratum
- (blob,
- "fsl,usb-erratum-a007075",
- usb_erratum_a007075_off);
- if (usb_erratum_a007075_off < 0)
- return;
- }
-
- if (has_erratum_a007792()) {
- usb_erratum_a007792_off = fdt_fixup_usb_erratum
- (blob,
- "fsl,usb-erratum-a007792",
- usb_erratu
[U-Boot] [PATCH v3 3/5] fsl: usb: make errata function common for PPC and ARM
This patch does the following things:
1. Makes the errata checking code common for PPC and ARM
2. Moves all these static inline functions into a dedicated C file
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
Changes in v3:
- Rework done according to previous patches.
Changes in v2:
- Moves all the static inline functions into a dedicated C file
drivers/usb/common/Makefile | 4 +-
drivers/usb/common/fsl-dt-fixup.c | 1 +
drivers/usb/common/fsl-errata.c | 178 +++
include/fsl_usb.h | 191 ++
4 files changed, 189 insertions(+), 185 deletions(-)
create mode 100644 drivers/usb/common/fsl-errata.c
diff --git a/drivers/usb/common/Makefile b/drivers/usb/common/Makefile
index 2f46d38..aee7e32 100644
--- a/drivers/usb/common/Makefile
+++ b/drivers/usb/common/Makefile
@@ -4,5 +4,5 @@
#
obj-$(CONFIG_DM_USB) += common.o
-obj-$(CONFIG_USB_EHCI_FSL) += fsl-dt-fixup.o
-obj-$(CONFIG_USB_XHCI_FSL) += fsl-dt-fixup.o
+obj-$(CONFIG_USB_EHCI_FSL) += fsl-dt-fixup.o fsl-errata.o
+obj-$(CONFIG_USB_XHCI_FSL) += fsl-dt-fixup.o fsl-errata.o
diff --git a/drivers/usb/common/fsl-dt-fixup.c
b/drivers/usb/common/fsl-dt-fixup.c
index 9cbd9d2..49d1140 100644
--- a/drivers/usb/common/fsl-dt-fixup.c
+++ b/drivers/usb/common/fsl-dt-fixup.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
#include
#include
diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c
new file mode 100644
index 000..95918fc
--- /dev/null
+++ b/drivers/usb/common/fsl-errata.c
@@ -0,0 +1,178 @@
+/*
+ * Freescale USB Controller
+ *
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+
+/* USB Erratum Checking code */
+#if defined(CONFIG_PPC) || defined(CONFIG_ARM)
+bool has_dual_phy(void)
+{
+ u32 svr = get_svr();
+ u32 soc = SVR_SOC_VER(svr);
+
+ switch (soc) {
+#ifdef CONFIG_PPC
+ case SVR_T1023:
+ case SVR_T1024:
+ case SVR_T1013:
+ case SVR_T1014:
+ return IS_SVR_REV(svr, 1, 0);
+ case SVR_T1040:
+ case SVR_T1042:
+ case SVR_T1020:
+ case SVR_T1022:
+ case SVR_T2080:
+ case SVR_T2081:
+ return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
+ case SVR_T4240:
+ case SVR_T4160:
+ case SVR_T4080:
+ return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+#endif
+ }
+
+ return false;
+}
+
+bool has_erratum_a006261(void)
+{
+ u32 svr = get_svr();
+ u32 soc = SVR_SOC_VER(svr);
+
+ switch (soc) {
+#ifdef CONFIG_PPC
+ case SVR_P1010:
+ return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+ case SVR_P2041:
+ case SVR_P2040:
+ return IS_SVR_REV(svr, 1, 0) ||
+ IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1);
+ case SVR_P3041:
+ return IS_SVR_REV(svr, 1, 0) ||
+ IS_SVR_REV(svr, 1, 1) ||
+ IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);
+ case SVR_P5010:
+ case SVR_P5020:
+ case SVR_P5021:
+ return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+ case SVR_T4240:
+ case SVR_T4160:
+ case SVR_T4080:
+ return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+ case SVR_T1040:
+ return IS_SVR_REV(svr, 1, 0);
+ case SVR_T2080:
+ case SVR_T2081:
+ return IS_SVR_REV(svr, 1, 0);
+ case SVR_P5040:
+ return IS_SVR_REV(svr, 1, 0);
+#endif
+ }
+
+ return false;
+}
+
+bool has_erratum_a007075(void)
+{
+ u32 svr = get_svr();
+ u32 soc = SVR_SOC_VER(svr);
+
+ switch (soc) {
+#ifdef CONFIG_PPC
+ case SVR_B4860:
+ case SVR_B4420:
+ return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+ case SVR_P1010:
+ return IS_SVR_REV(svr, 1, 0);
+ case SVR_P4080:
+ return IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 3, 0);
+#endif
+ }
+ return false;
+}
+
+bool has_erratum_a007798(void)
+{
+#ifdef CONFIG_PPC
+ return SVR_SOC_VER(get_svr()) == SVR_T4240 &&
+ IS_SVR_REV(get_svr(), 2, 0);
+#endif
+ return false;
+}
+
+bool has_erratum_a007792(void)
+{
+ u32 svr = get_svr();
+ u32 soc = SVR_SOC_VER(svr);
+
+ switch (soc) {
+#ifdef CONFIG_PPC
+ case SVR_T4240:
+ case SVR_T4160:
+ case SVR_T4080:
+ return IS_SVR_REV(svr, 2, 0);
+ case SVR_T1024:
+ case SVR_T1023:
+ return IS_SVR_REV(svr, 1, 0);
+ case SVR_T1040:
+ case SVR_T1042:
+ case SVR_T1020:
+ case SVR_T1022:
+ case SVR_T2080:
+ case SVR_T2081:
+ return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
+#endif
+ }
+
[U-Boot] [PATCH v3 1/5] arm64: fsl-layerscape: add get_svr and IS_SVR_REV helper
Adds get_svr and IS_SVR_REV helpers for ARMv8 platforms,
similar to PPC and ARMv7.
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
Changes in v1:
- Added commit message
Changes in v2:
- No update
arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 7 +++
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 2 ++
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 3 +++
arch/arm/include/asm/arch-fsl-layerscape/soc.h | 2 ++
4 files changed, 14 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 9a5a6b5..9c575c1 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -528,6 +528,13 @@ u32 fsl_qoriq_core_to_type(unsigned int core)
return -1; /* cannot identify the cluster */
}
+uint get_svr(void)
+{
+ struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+
+ return gur_in32(&gur->svr);
+}
+
#ifdef CONFIG_DISPLAY_CPUINFO
int print_cpuinfo(void)
{
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index e98e055..8b8a7c1 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -596,4 +596,6 @@ struct ccsr_cci400 {
#define SCR0_CLIENTPD_MASK 0x0001
#define SCR0_USFCFG_MASK 0x0400
+uint get_svr(void);
+
#endif /* __ARCH_FSL_LSCH2_IMMAP_H__*/
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index 65b3357..e48bbaf 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -319,4 +319,7 @@ struct ccsr_reset {
u32 ip_rev1;/* 0xbf8 */
u32 ip_rev2;/* 0xbfc */
};
+
+uint get_svr(void);
+
#endif /* __ARCH_FSL_LSCH3_IMMAP_H_ */
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index 02ecc62..f244904 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -53,6 +53,8 @@ struct cpu_type {
#define SVR_MIN(svr) (((svr) >> 0) & 0xf)
#define SVR_SOC_VER(svr) (((svr) >> 8) & SVR_WO_E)
#define IS_E_PROCESSOR(svr)(!((svr >> 8) & 0x1))
+#define IS_SVR_REV(svr, maj, min) \
+ ((SVR_MAJ(svr) == maj) && (SVR_MIN(svr) == min))
/* ahci port register default value */
#define AHCI_PORT_PHY_1_CFG0xa003fffe
--
2.1.0
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[U-Boot] [PATCH v3 0/5] Supporting ARM v8 USB errata for FSL
The patch-set does the following : 1. Adds support for ARM for USB Erratum Checking code for implementing the USB Erratum for fsl. 2. Performs code cleanup to reduce redundancy when adding fsl device tree fixup. 3. Implements Erratum A008751 for LS2 platform. Sriram Dash (5): arm64: fsl-layerscape: add get_svr and IS_SVR_REV helper usb: xhci: fsl: code cleanup for device tree fixup for fsl usb controllers fsl: usb: make errata function common for PPC and ARM armv8/ls2080: Remove workaround for erratum A008751 usb: xhci: fsl: Add workaround for USB erratum A-008751 arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 7 + arch/arm/cpu/armv8/fsl-layerscape/soc.c| 10 -- .../include/asm/arch-fsl-layerscape/immap_lsch2.h | 2 + .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 4 + arch/arm/include/asm/arch-fsl-layerscape/soc.h | 2 + board/freescale/ls2080aqds/ls2080aqds.c| 2 + board/freescale/ls2080ardb/ls2080ardb.c| 2 + drivers/usb/common/Makefile| 4 +- drivers/usb/common/fsl-dt-fixup.c | 94 ++ .../fsl_usb.h => drivers/usb/common/fsl-errata.c | 152 drivers/usb/host/xhci-fsl.c| 24 +++ include/fsl_usb.h | 198 ++--- 12 files changed, 153 insertions(+), 348 deletions(-) copy include/fsl_usb.h => drivers/usb/common/fsl-errata.c (50%) -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/5] arm64: fsl-layerscape: add get_svr and IS_SVR_REV helper
>-Original Message-
>From: Marek Vasut [mailto:ma...@denx.de]
>Sent: Monday, June 06, 2016 6:21 PM
>To: Sriram Dash ; u-boot@lists.denx.de
>Cc: york sun ; albert.u.b...@aribaud.net; Rajesh Bhagat
>
>Subject: Re: [PATCH v2 1/5] arm64: fsl-layerscape: add get_svr and IS_SVR_REV
>helper
>
>On 06/06/2016 06:21 AM, Sriram Dash wrote:
>>> -Original Message-
>>> From: Marek Vasut [mailto:ma...@denx.de]
>>> Sent: Thursday, June 02, 2016 6:18 PM
>>> To: Sriram Dash ; u-boot@lists.denx.de
>>> Cc: york sun ; albert.u.b...@aribaud.net; Rajesh
>>> Bhagat
>>> Subject: Re: [PATCH v2 1/5] arm64: fsl-layerscape: add get_svr and
>>> IS_SVR_REV helper
>>>
>>> On 06/02/2016 08:54 AM, Sriram Dash wrote:
>>>> Signed-off-by: Sriram Dash
>>>> Signed-off-by: Rajesh Bhagat
>>>> ---
>>>> Changes in v2:
>>>> - No update
>>>>
>>>> arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 7 +++
>>>> arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 2 ++
>>>> arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 3 +++
>>>> arch/arm/include/asm/arch-fsl-layerscape/soc.h | 2 ++
>>>> 4 files changed, 14 insertions(+)
>>>>
>>>> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
>>>> b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
>>>> index 9a5a6b5..9c575c1 100644
>>>> --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
>>>> +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
>>>> @@ -528,6 +528,13 @@ u32 fsl_qoriq_core_to_type(unsigned int core)
>>>>return -1; /* cannot identify the cluster */
>>>> }
>>>>
>>>> +uint get_svr(void)
>>>
>>> Should be u32 . The function should have some more recognizable name,
>>> fsl_get_svr() or such.
>>>
>>
>> Hello Marek,
>>
>> As done in PPC for all the Socs for FSL, in arch/powerpc/cpu/mpc83xx/start.S
>> ,
>and ARM v7 LS1021, in arch/arm/cpu/armv7/ls102xa/cpu.c, this uint get_svr(void)
>function finds the svr number for the SoC. Now, as i have to make the code
>generic
>for PPC and ARM (in patch 3/5 namely make errata function common for PPC and
>ARM), I am currently having the same name and return type used.
>
>You can rename it now.
>
Somewhat I agree to the point. It is good to have u32 instead of
uint and the get_svr() function should have some more recognizable
name. But, this function is already being used in many files and this
would require for some uncalled 120 + changes for PPC and ARM v7,
which is not in the scope of this patchset.
Currently, I am focusing on the errata implementation, which I want
to make generic, by having the same names across PPC, ARMv7 and
ARMv8. So, I am planning to do this change at a later point of time.
>> Regards,
>> Sriram
>>
>>>> +{
>>>> + struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
>>>> +
>>>> + return gur_in32(&gur->svr);
>>>> +}
>>>> +
>>>> #ifdef CONFIG_DISPLAY_CPUINFO
>>>> int print_cpuinfo(void)
>>>> {
>>>> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
>>>> b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
>>>> index 57b99d4..4151994 100644
>>>> --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
>>>> +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
>>>> @@ -592,4 +592,6 @@ struct ccsr_cci400 {
>>>> #define SCR0_CLIENTPD_MASK0x0001
>>>> #define SCR0_USFCFG_MASK 0x0400
>>>>
>>>> +uint get_svr(void);
>>>> +
>>>> #endif/* __ARCH_FSL_LSCH2_IMMAP_H__*/
>>>> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
>>>> b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
>>>> index 65b3357..e48bbaf 100644
>>>> --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
>>>> +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
>>>> @@ -319,4 +319,7 @@ struct ccsr_reset {
>>>>u32 ip_rev1;/* 0xbf8 */
>>>>u32 ip_rev2;/* 0xbfc */
>>>> };
>>>> +
>>>> +uint get_svr(void);
>>>> +
>>>> #endif /* __ARCH_FSL_LSCH3_IMMAP_H_ */ diff --git
>>>> a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
>>>> b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
>>>> index 831d817..3f1a0a8 100644
>>>> --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
>>>> +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
>>>> @@ -52,6 +52,8 @@ struct cpu_type {
>>>> #define SVR_MIN(svr) (((svr) >> 0) & 0xf)
>>>> #define SVR_SOC_VER(svr) (((svr) >> 8) & SVR_WO_E)
>>>> #define IS_E_PROCESSOR(svr) (!((svr >> 8) & 0x1))
>>>> +#define IS_SVR_REV(svr, maj, min) \
>>>> + ((SVR_MAJ(svr) == maj) && (SVR_MIN(svr) == min))
>>>>
>>>> /* ahci port register default value */
>>>> #define AHCI_PORT_PHY_1_CFG0xa003fffe
>>>>
>>>
>>>
>>> --
>>> Best regards,
>>> Marek Vasut
>
>
>--
>Best regards,
>Marek Vasut
___
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Re: [U-Boot] [PATCH v2 5/5] usb: xhci: fsl: Add workaround for USB erratum A-008751
>-Original Message-
>From: Marek Vasut [mailto:ma...@denx.de]
>Sent: Monday, June 06, 2016 6:15 PM
>To: Sriram Dash ; u-boot@lists.denx.de
>Cc: york sun ; albert.u.b...@aribaud.net; Rajesh Bhagat
>
>Subject: Re: [PATCH v2 5/5] usb: xhci: fsl: Add workaround for USB erratum A-
>008751
>
>On 06/06/2016 06:24 AM, Sriram Dash wrote:
>>> -Original Message-
>>> From: Marek Vasut [mailto:ma...@denx.de]
>>> Sent: Thursday, June 02, 2016 6:31 PM
>>> To: Sriram Dash ; u-boot@lists.denx.de
>>> Cc: york sun ; albert.u.b...@aribaud.net; Rajesh
>>> Bhagat
>>> Subject: Re: [PATCH v2 5/5] usb: xhci: fsl: Add workaround for USB
>>> erratum A-
>>> 008751
>>>
>>> On 06/02/2016 08:54 AM, Sriram Dash wrote:
>>>> This patch is doing the following:
>>>> 1. Implementing the errata for LS2080.
>>>> 2. Adding fixup for fdt for LS2080.
>>>>
>>>> Signed-off-by: Sriram Dash
>>>> Signed-off-by: Rajesh Bhagat
>>>> ---
>>>> Changes in v2:
>>>> - Reworked for changes done in errata checking code.
>>>
>>> [...]
>>>
>>>> diff --git a/drivers/usb/common/fsl-dt-fixup.c
>>>> b/drivers/usb/common/fsl-dt-fixup.c
>>>> index 7c039cb..fd85439 100644
>>>> --- a/drivers/usb/common/fsl-dt-fixup.c
>>>> +++ b/drivers/usb/common/fsl-dt-fixup.c
>>>> @@ -125,6 +125,7 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
>>>>int usb_erratum_a007075_off = -1;
>>>>int usb_erratum_a007792_off = -1;
>>>>int usb_erratum_a005697_off = -1;
>>>> + int usb_erratum_a008751_off = -1;
>>>
>>> Will there be an ever-growing list of unused variables here ?
>>>
>>
>> Same as in Patch 2/5 code cleanup for device tree fixup for fsl usb
>> controllers
>usb_erratum_aNN_off variable are keeping track of the device tree fixup for
>errata NN. The code checks errata applicability for each controller and
>tries
>to fix the device tree accordingly. During this time, the variable
>usb_erratum_aNN_off is updated to the offset of device tree, if the device
>tree is fixed. Now, for the second controller, when it tries to fix the device
>tree, it
>checks from the same offset obtained. As the API for fdt_setprop is such that
>the
>fixup will occur as soon as the API finds first match, if this variable
>usb_erratum_aNN_off is not maintained, the errata will be fixed always for
>the first usb controller it comes across the device tree. So, we need this
>variable.
>
>What will happen if you have two different controllers in the system and each
>of
>them has different set of erratas ? Will this code fail at handling them by
>applying
>wrong sets of erratas ?
>
Yes, you are right.
For the different controllers with different erratas, I am planning
to handle it by passing the controller type(ex: fsl-usb2-dr) from the
fdt_fixup_erratum function, for which , the errata would be applied,
and decided in fdt_fixup_usb_erratum function in V3.
>btw Can you please fix your mailer to break lines at 80 chars ?
>
>>>>int usb_mode_off = -1;
>>>>int usb_phy_off = -1;
>>>>char str[5];
>>>> @@ -190,6 +191,8 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
>>>> "a007792", has_erratum_a007792);
>>>>fdt_fixup_erratum(&usb_erratum_a005697_off, blob,
>>>> "a005697", has_erratum_a005697);
>>>> + fdt_fixup_erratum(&usb_erratum_a008751_off, blob,
>>>> +"a008751", has_erratum_a008751);
>>>>
>>>>}
>>>> }
>>>> diff --git a/drivers/usb/common/fsl-errata.c
>>>> b/drivers/usb/common/fsl-errata.c index 95918fc..ebe60a8 100644
>>>> --- a/drivers/usb/common/fsl-errata.c
>>>> +++ b/drivers/usb/common/fsl-errata.c
>>>> @@ -175,4 +175,19 @@ bool has_erratum_a004477(void)
>>>>return false;
>>>> }
>>>>
>>>> +bool has_erratum_a008751(void)
>>>> +{
>>>> + u32 svr = get_svr();
>>>> + u32 soc = SVR_SOC_VER(svr);
>>>> +
>>>> + switch (soc) {
>>>> +#ifdef CONFIG_ARM64
>>>> + case SVR_LS2080:
>>>> + case SVR_LS2085:
>>>> + return IS_SVR_REV(svr, 1, 0);
>>>> +#endif
>>>> + }
>>>> + return false;
>>>> +}
>>>
Re: [U-Boot] [PATCH v2 5/5] usb: xhci: fsl: Add workaround for USB erratum A-008751
>-Original Message-
>From: Marek Vasut [mailto:ma...@denx.de]
>Sent: Thursday, June 02, 2016 6:31 PM
>To: Sriram Dash ; u-boot@lists.denx.de
>Cc: york sun ; albert.u.b...@aribaud.net; Rajesh Bhagat
>
>Subject: Re: [PATCH v2 5/5] usb: xhci: fsl: Add workaround for USB erratum A-
>008751
>
>On 06/02/2016 08:54 AM, Sriram Dash wrote:
>> This patch is doing the following:
>> 1. Implementing the errata for LS2080.
>> 2. Adding fixup for fdt for LS2080.
>>
>> Signed-off-by: Sriram Dash
>> Signed-off-by: Rajesh Bhagat
>> ---
>> Changes in v2:
>> - Reworked for changes done in errata checking code.
>
>[...]
>
>> diff --git a/drivers/usb/common/fsl-dt-fixup.c
>> b/drivers/usb/common/fsl-dt-fixup.c
>> index 7c039cb..fd85439 100644
>> --- a/drivers/usb/common/fsl-dt-fixup.c
>> +++ b/drivers/usb/common/fsl-dt-fixup.c
>> @@ -125,6 +125,7 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
>> int usb_erratum_a007075_off = -1;
>> int usb_erratum_a007792_off = -1;
>> int usb_erratum_a005697_off = -1;
>> +int usb_erratum_a008751_off = -1;
>
>Will there be an ever-growing list of unused variables here ?
>
Same as in Patch 2/5 code cleanup for device tree fixup for fsl usb controllers
usb_erratum_aNN_off variable are keeping track of the device tree fixup for
errata NN. The code checks errata applicability for each controller and
tries to fix the device tree accordingly. During this time, the variable
usb_erratum_aNN_off is updated to the offset of device tree, if the device
tree is fixed. Now, for the second controller, when it tries to fix the device
tree, it checks from the same offset obtained. As the API for fdt_setprop is
such that the fixup will occur as soon as the API finds first match, if this
variable usb_erratum_aNN_off is not maintained, the errata will be fixed
always for the first usb controller it comes across the device tree. So, we
need this variable.
>> int usb_mode_off = -1;
>> int usb_phy_off = -1;
>> char str[5];
>> @@ -190,6 +191,8 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
>>"a007792", has_erratum_a007792);
>> fdt_fixup_erratum(&usb_erratum_a005697_off, blob,
>>"a005697", has_erratum_a005697);
>> +fdt_fixup_erratum(&usb_erratum_a008751_off, blob,
>> + "a008751", has_erratum_a008751);
>>
>> }
>> }
>> diff --git a/drivers/usb/common/fsl-errata.c
>> b/drivers/usb/common/fsl-errata.c index 95918fc..ebe60a8 100644
>> --- a/drivers/usb/common/fsl-errata.c
>> +++ b/drivers/usb/common/fsl-errata.c
>> @@ -175,4 +175,19 @@ bool has_erratum_a004477(void)
>> return false;
>> }
>>
>> +bool has_erratum_a008751(void)
>> +{
>> +u32 svr = get_svr();
>> +u32 soc = SVR_SOC_VER(svr);
>> +
>> +switch (soc) {
>> +#ifdef CONFIG_ARM64
>> +case SVR_LS2080:
>> +case SVR_LS2085:
>> +return IS_SVR_REV(svr, 1, 0);
>> +#endif
>> +}
>> +return false;
>> +}
>> +
>> #endif
>> diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
>> index 05f09d7..d55ed87 100644
>> --- a/drivers/usb/host/xhci-fsl.c
>> +++ b/drivers/usb/host/xhci-fsl.c
>> @@ -15,6 +15,8 @@
>> #include
>> #include
>> #include "xhci.h"
>> +#include
>> +#include
>>
>> /* Declare global data pointer */
>> DECLARE_GLOBAL_DATA_PTR;
>> @@ -27,6 +29,31 @@ __weak int __board_usb_init(int index, enum usb_init_type
>init)
>> return 0;
>> }
>>
>> +static inline bool erratum_a008751(void)
>
>Drop the inline, let compiler decide. Also, make this an int instead of bool
>and
>return 0 on success, 1 on error.
>
Ok. Will drop inline and make static int from static bool.
Return 0 on success instead of true.
Return 1 on error instead of false.
>> +{
>> +#if defined(CONFIG_TARGET_LS2080AQDS) ||
>defined(CONFIG_TARGET_LS2080ARDB)
>> +u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
>> +writel(SCFG_USB3PRM1CR_INIT, scfg + SCFG_USB3PRM1CR / 4);
>> +return true;
>> +#endif
>> +return false;
>> +}
>> +
>> +#define APPLY_ERRATUM(id) \
>> +do {
>> \
>> +bool ret; \
>> +if (has_erratum_##id()) {
