Re: [U-Boot] [PATCH v2 0/3] cadence-quadspi: Fix issues with non 32bit aligned accesses
On Tuesday 23 January 2018 03:01 PM, Jagan Teki wrote:
[...]
> u-boot-spi/master throws few warnings when I build for my platform:
> ~/workspace/u-boot:0f520af57c60:~ make distclean;make
> k2g_evm_defconfig;make -j4 -s;
>
> In file included from drivers/spi/cadence_qspi_apb.c:31:0:
> include/wait_bit.h: In function 'wait_for_bit_be16':
> include/wait_bit.h:76:31: warning: implicit declaration of function
> 'readw_be' [-Wimplicit-function-declaration]
> BUILD_WAIT_FOR_BIT(be16, u16, readw_be)
> ^
> include/wait_bit.h:48:9: note: in definition of macro
> 'BUILD_WAIT_FOR_BIT'
> val = read(reg); \
> ^~~~
> include/wait_bit.h: In function 'wait_for_bit_be32':
> include/wait_bit.h:78:31: warning: implicit declaration of function
> 'readl_be' [-Wimplicit-function-declaration]
> BUILD_WAIT_FOR_BIT(be32, u32, readl_be)
> ^
> include/wait_bit.h:48:9: note: in definition of macro
> 'BUILD_WAIT_FOR_BIT'
> val = read(reg); \
> ^~~~
Did you change wait_for_bit function with _le32? [1]
[1]
http://git.denx.de/?p=u-boot-spi.git;a=commitdiff;h=9a5ff2669ef185d3a4bf73415c531e8d013993d8
>>> Yes, I am building plain u-boot-spi/master(HEAD: 0f520af57c60f3baba8
>>> ("spi: kirkwood_spi: implement workaround for FE-9144572")). So, above
>>> commit is part of the tree.
>>>
>>> Problem is above commit adds
>>> BUILD_WAIT_FOR_BIT(be32, u32, read*_be) variants.
>>> But, readl_be and readw_be seems to be undefined for ARM?
>>>
>>>
>>
>> Vignesh, I think there's an ongoing discussion about this on the u-boot list
>> to fix this?
>
> didn't get what issue Vignesh, pointing at but with new wait_for_bit
> need a fix[2] to resolve warnings.
>
> [2] https://gist.github.com/Noltari/3e6ed4648b87484c73ca22e2f533f9b0
>
Yes, above patch should help to get rid of warnings. I will rebase, test
and resend.
--
Regards
Vignesh
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Re: [U-Boot] [PATCH v2 0/3] cadence-quadspi: Fix issues with non 32bit aligned accesses
On Tue, Jan 23, 2018 at 2:56 PM, Simon Goldschmidt
wrote:
> On 23.01.2018 10:16, Vignesh R wrote:
>>
>>
>> On Tuesday 23 January 2018 02:37 PM, Jagan Teki wrote:
>>>
>>> On Tue, Jan 23, 2018 at 2:32 PM, Vignesh R wrote:
On Tuesday 23 January 2018 02:15 PM, Jagan Teki wrote:
>
> On Tue, Jan 23, 2018 at 1:42 PM, Simon Goldschmidt
> wrote:
>>
>> Jagan,
>>
>>
>> the merge window is now less than 1 week for 2018.03 if I'm not
>> mistaken.
>> Can you apply this, please?
>
> Can you resend these on-top of u-boot-spi/master, have few changes on
> wait_for_bit good to test those as well.
u-boot-spi/master throws few warnings when I build for my platform:
~/workspace/u-boot:0f520af57c60:~ make distclean;make
k2g_evm_defconfig;make -j4 -s;
In file included from drivers/spi/cadence_qspi_apb.c:31:0:
include/wait_bit.h: In function 'wait_for_bit_be16':
include/wait_bit.h:76:31: warning: implicit declaration of function
'readw_be' [-Wimplicit-function-declaration]
BUILD_WAIT_FOR_BIT(be16, u16, readw_be)
^
include/wait_bit.h:48:9: note: in definition of macro
'BUILD_WAIT_FOR_BIT'
val = read(reg); \
^~~~
include/wait_bit.h: In function 'wait_for_bit_be32':
include/wait_bit.h:78:31: warning: implicit declaration of function
'readl_be' [-Wimplicit-function-declaration]
BUILD_WAIT_FOR_BIT(be32, u32, readl_be)
^
include/wait_bit.h:48:9: note: in definition of macro
'BUILD_WAIT_FOR_BIT'
val = read(reg); \
^~~~
>>>
>>> Did you change wait_for_bit function with _le32? [1]
>>>
>>> [1]
>>> http://git.denx.de/?p=u-boot-spi.git;a=commitdiff;h=9a5ff2669ef185d3a4bf73415c531e8d013993d8
>>>
>> Yes, I am building plain u-boot-spi/master(HEAD: 0f520af57c60f3baba8
>> ("spi: kirkwood_spi: implement workaround for FE-9144572")). So, above
>> commit is part of the tree.
>>
>> Problem is above commit adds
>> BUILD_WAIT_FOR_BIT(be32, u32, read*_be) variants.
>> But, readl_be and readw_be seems to be undefined for ARM?
>>
>>
>
> Vignesh, I think there's an ongoing discussion about this on the u-boot list
> to fix this?
didn't get what issue Vignesh, pointing at but with new wait_for_bit
need a fix[2] to resolve warnings.
[2] https://gist.github.com/Noltari/3e6ed4648b87484c73ca22e2f533f9b0
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Re: [U-Boot] [PATCH v2 0/3] cadence-quadspi: Fix issues with non 32bit aligned accesses
On 23.01.2018 10:16, Vignesh R wrote:
On Tuesday 23 January 2018 02:37 PM, Jagan Teki wrote:
On Tue, Jan 23, 2018 at 2:32 PM, Vignesh R wrote:
On Tuesday 23 January 2018 02:15 PM, Jagan Teki wrote:
On Tue, Jan 23, 2018 at 1:42 PM, Simon Goldschmidt
wrote:
Jagan,
the merge window is now less than 1 week for 2018.03 if I'm not mistaken.
Can you apply this, please?
Can you resend these on-top of u-boot-spi/master, have few changes on
wait_for_bit good to test those as well.
u-boot-spi/master throws few warnings when I build for my platform:
~/workspace/u-boot:0f520af57c60:~ make distclean;make k2g_evm_defconfig;make
-j4 -s;
In file included from drivers/spi/cadence_qspi_apb.c:31:0:
include/wait_bit.h: In function 'wait_for_bit_be16':
include/wait_bit.h:76:31: warning: implicit declaration of function 'readw_be'
[-Wimplicit-function-declaration]
BUILD_WAIT_FOR_BIT(be16, u16, readw_be)
^
include/wait_bit.h:48:9: note: in definition of macro 'BUILD_WAIT_FOR_BIT'
val = read(reg); \
^~~~
include/wait_bit.h: In function 'wait_for_bit_be32':
include/wait_bit.h:78:31: warning: implicit declaration of function 'readl_be'
[-Wimplicit-function-declaration]
BUILD_WAIT_FOR_BIT(be32, u32, readl_be)
^
include/wait_bit.h:48:9: note: in definition of macro 'BUILD_WAIT_FOR_BIT'
val = read(reg); \
^~~~
Did you change wait_for_bit function with _le32? [1]
[1]
http://git.denx.de/?p=u-boot-spi.git;a=commitdiff;h=9a5ff2669ef185d3a4bf73415c531e8d013993d8
Yes, I am building plain u-boot-spi/master(HEAD: 0f520af57c60f3baba8
("spi: kirkwood_spi: implement workaround for FE-9144572")). So, above
commit is part of the tree.
Problem is above commit adds
BUILD_WAIT_FOR_BIT(be32, u32, read*_be) variants.
But, readl_be and readw_be seems to be undefined for ARM?
Vignesh, I think there's an ongoing discussion about this on the u-boot
list to fix this?
Regards,
Simon
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Re: [U-Boot] [PATCH v2 0/3] cadence-quadspi: Fix issues with non 32bit aligned accesses
On Tue, Jan 23, 2018 at 2:46 PM, Vignesh R wrote:
>
>
> On Tuesday 23 January 2018 02:37 PM, Jagan Teki wrote:
>> On Tue, Jan 23, 2018 at 2:32 PM, Vignesh R wrote:
>>>
>>>
>>> On Tuesday 23 January 2018 02:15 PM, Jagan Teki wrote:
On Tue, Jan 23, 2018 at 1:42 PM, Simon Goldschmidt
wrote:
> Jagan,
>
>
> the merge window is now less than 1 week for 2018.03 if I'm not mistaken.
> Can you apply this, please?
Can you resend these on-top of u-boot-spi/master, have few changes on
wait_for_bit good to test those as well.
>>>
>>> u-boot-spi/master throws few warnings when I build for my platform:
>>> ~/workspace/u-boot:0f520af57c60:~ make distclean;make
>>> k2g_evm_defconfig;make -j4 -s;
>>>
>>> In file included from drivers/spi/cadence_qspi_apb.c:31:0:
>>> include/wait_bit.h: In function 'wait_for_bit_be16':
>>> include/wait_bit.h:76:31: warning: implicit declaration of function
>>> 'readw_be' [-Wimplicit-function-declaration]
>>> BUILD_WAIT_FOR_BIT(be16, u16, readw_be)
>>>^
>>> include/wait_bit.h:48:9: note: in definition of macro 'BUILD_WAIT_FOR_BIT'
>>>val = read(reg); \
>>> ^~~~
>>> include/wait_bit.h: In function 'wait_for_bit_be32':
>>> include/wait_bit.h:78:31: warning: implicit declaration of function
>>> 'readl_be' [-Wimplicit-function-declaration]
>>> BUILD_WAIT_FOR_BIT(be32, u32, readl_be)
>>>^
>>> include/wait_bit.h:48:9: note: in definition of macro 'BUILD_WAIT_FOR_BIT'
>>>val = read(reg); \
>>> ^~~~
>>
>> Did you change wait_for_bit function with _le32? [1]
>>
>> [1]
>> http://git.denx.de/?p=u-boot-spi.git;a=commitdiff;h=9a5ff2669ef185d3a4bf73415c531e8d013993d8
>>
>
> Yes, I am building plain u-boot-spi/master(HEAD: 0f520af57c60f3baba8
> ("spi: kirkwood_spi: implement workaround for FE-9144572")). So, above
> commit is part of the tree.
>
> Problem is above commit adds
> BUILD_WAIT_FOR_BIT(be32, u32, read*_be) variants.
> But, readl_be and readw_be seems to be undefined for ARM?
yes, but wait_for_bit_le32 work for arm?
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Re: [U-Boot] [PATCH v2 0/3] cadence-quadspi: Fix issues with non 32bit aligned accesses
On Tuesday 23 January 2018 02:37 PM, Jagan Teki wrote:
> On Tue, Jan 23, 2018 at 2:32 PM, Vignesh R wrote:
>>
>>
>> On Tuesday 23 January 2018 02:15 PM, Jagan Teki wrote:
>>> On Tue, Jan 23, 2018 at 1:42 PM, Simon Goldschmidt
>>> wrote:
Jagan,
the merge window is now less than 1 week for 2018.03 if I'm not mistaken.
Can you apply this, please?
>>>
>>> Can you resend these on-top of u-boot-spi/master, have few changes on
>>> wait_for_bit good to test those as well.
>>
>> u-boot-spi/master throws few warnings when I build for my platform:
>> ~/workspace/u-boot:0f520af57c60:~ make distclean;make k2g_evm_defconfig;make
>> -j4 -s;
>>
>> In file included from drivers/spi/cadence_qspi_apb.c:31:0:
>> include/wait_bit.h: In function 'wait_for_bit_be16':
>> include/wait_bit.h:76:31: warning: implicit declaration of function
>> 'readw_be' [-Wimplicit-function-declaration]
>> BUILD_WAIT_FOR_BIT(be16, u16, readw_be)
>>^
>> include/wait_bit.h:48:9: note: in definition of macro 'BUILD_WAIT_FOR_BIT'
>>val = read(reg); \
>> ^~~~
>> include/wait_bit.h: In function 'wait_for_bit_be32':
>> include/wait_bit.h:78:31: warning: implicit declaration of function
>> 'readl_be' [-Wimplicit-function-declaration]
>> BUILD_WAIT_FOR_BIT(be32, u32, readl_be)
>>^
>> include/wait_bit.h:48:9: note: in definition of macro 'BUILD_WAIT_FOR_BIT'
>>val = read(reg); \
>> ^~~~
>
> Did you change wait_for_bit function with _le32? [1]
>
> [1]
> http://git.denx.de/?p=u-boot-spi.git;a=commitdiff;h=9a5ff2669ef185d3a4bf73415c531e8d013993d8
>
Yes, I am building plain u-boot-spi/master(HEAD: 0f520af57c60f3baba8
("spi: kirkwood_spi: implement workaround for FE-9144572")). So, above
commit is part of the tree.
Problem is above commit adds
BUILD_WAIT_FOR_BIT(be32, u32, read*_be) variants.
But, readl_be and readw_be seems to be undefined for ARM?
--
Regards
Vignesh
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Re: [U-Boot] [PATCH v2 0/3] cadence-quadspi: Fix issues with non 32bit aligned accesses
On Tue, Jan 23, 2018 at 2:32 PM, Vignesh R wrote: > > > On Tuesday 23 January 2018 02:15 PM, Jagan Teki wrote: >> On Tue, Jan 23, 2018 at 1:42 PM, Simon Goldschmidt >> wrote: >>> Jagan, >>> >>> >>> the merge window is now less than 1 week for 2018.03 if I'm not mistaken. >>> Can you apply this, please? >> >> Can you resend these on-top of u-boot-spi/master, have few changes on >> wait_for_bit good to test those as well. > > u-boot-spi/master throws few warnings when I build for my platform: > ~/workspace/u-boot:0f520af57c60:~ make distclean;make k2g_evm_defconfig;make > -j4 -s; > > In file included from drivers/spi/cadence_qspi_apb.c:31:0: > include/wait_bit.h: In function 'wait_for_bit_be16': > include/wait_bit.h:76:31: warning: implicit declaration of function > 'readw_be' [-Wimplicit-function-declaration] > BUILD_WAIT_FOR_BIT(be16, u16, readw_be) >^ > include/wait_bit.h:48:9: note: in definition of macro 'BUILD_WAIT_FOR_BIT' >val = read(reg); \ > ^~~~ > include/wait_bit.h: In function 'wait_for_bit_be32': > include/wait_bit.h:78:31: warning: implicit declaration of function > 'readl_be' [-Wimplicit-function-declaration] > BUILD_WAIT_FOR_BIT(be32, u32, readl_be) >^ > include/wait_bit.h:48:9: note: in definition of macro 'BUILD_WAIT_FOR_BIT' >val = read(reg); \ > ^~~~ Did you change wait_for_bit function with _le32? [1] [1] http://git.denx.de/?p=u-boot-spi.git;a=commitdiff;h=9a5ff2669ef185d3a4bf73415c531e8d013993d8 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/3] cadence-quadspi: Fix issues with non 32bit aligned accesses
On Tuesday 23 January 2018 02:15 PM, Jagan Teki wrote: > On Tue, Jan 23, 2018 at 1:42 PM, Simon Goldschmidt > wrote: >> Jagan, >> >> >> the merge window is now less than 1 week for 2018.03 if I'm not mistaken. >> Can you apply this, please? > > Can you resend these on-top of u-boot-spi/master, have few changes on > wait_for_bit good to test those as well. u-boot-spi/master throws few warnings when I build for my platform: ~/workspace/u-boot:0f520af57c60:~ make distclean;make k2g_evm_defconfig;make -j4 -s; In file included from drivers/spi/cadence_qspi_apb.c:31:0: include/wait_bit.h: In function 'wait_for_bit_be16': include/wait_bit.h:76:31: warning: implicit declaration of function 'readw_be' [-Wimplicit-function-declaration] BUILD_WAIT_FOR_BIT(be16, u16, readw_be) ^ include/wait_bit.h:48:9: note: in definition of macro 'BUILD_WAIT_FOR_BIT' val = read(reg); \ ^~~~ include/wait_bit.h: In function 'wait_for_bit_be32': include/wait_bit.h:78:31: warning: implicit declaration of function 'readl_be' [-Wimplicit-function-declaration] BUILD_WAIT_FOR_BIT(be32, u32, readl_be) ^ include/wait_bit.h:48:9: note: in definition of macro 'BUILD_WAIT_FOR_BIT' val = read(reg); \ ^~~~ -- Regards Vignesh ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/3] cadence-quadspi: Fix issues with non 32bit aligned accesses
On Tue, Jan 23, 2018 at 1:42 PM, Simon Goldschmidt wrote: > Jagan, > > > the merge window is now less than 1 week for 2018.03 if I'm not mistaken. > Can you apply this, please? Can you resend these on-top of u-boot-spi/master, have few changes on wait_for_bit good to test those as well. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/3] cadence-quadspi: Fix issues with non 32bit aligned accesses
Jagan, the merge window is now less than 1 week for 2018.03 if I'm not mistaken. Can you apply this, please? Thanks, Simon On 15.01.2018 14:47, Jason Rush wrote: On 1/15/2018 6:01 AM, Simon Goldschmidt wrote: Pepperl+Fuchs GmbH, Mannheim Geschaeftsfuehrer/Managing Directors: Dr.-Ing. Gunther Kegel (Vors./CEO), Werner Guthier, Mehmet Hatiboglu Vorsitzender des Aufsichtsrats/Chairman of the supervisory board: Claus Michael Registergericht/Register Court: AG Mannheim HRB 4713 On 15.01.2018 12:45, Marek Vasut wrote: On 01/15/2018 12:36 PM, Vignesh R wrote: Marek, On 09-Jan-18 6:49 PM, Vignesh R wrote: This series reverts use of bounce_buf.c for non-DMA related alignment restriction and replaces it with local bounce buffer to handle problems with non 32 bit aligned writes on TI platforms. Based on top of Jason's series: https://patchwork.ozlabs.org/cover/856431/ Tested on K2G EVM. Could you ack this series, if you are okay with the changes? Jagan, Could you pick this up(along with the above dependent patches) for 2018.03 once Marek's Ack is in place? Acked-by: Marek Vasut although you should get ack from Jason and Simon instead, those matter. Acked-by: Simon Goldschmidt If that "Simon" above was me :-) I thought ack was sent by maintainers and TB by me, sorry. Simon Wichtiger Hinweis: Diese E-Mail einschliesslich ihrer Anhaenge enthaelt vertrauliche und rechtlich geschuetzte Informationen, die nur fuer den Adressaten bestimmt sind. Sollten Sie nicht der bezeichnete Adressat sein, so teilen Sie dies bitte dem Absender umgehend mit und loeschen Sie diese Nachricht und ihre Anhaenge. Die unbefugte Weitergabe, das Anfertigen von Kopien und jede Veraenderung der E-Mail ist untersagt. Der Absender haftet nicht fuer Inhalte von veraenderten E-Mails. Important Information: This e-mail message including its attachments contains confidential and legally protected information solely intended for the addressee. If you are not the intended addressee of this message, please contact the addresser immediately and delete this message including its attachments. The unauthorized dissemination, copying and change of this e-mail are strictly forbidden. The addresser shall not be liable for the content of such changed e-mails. Looks good to me. Thanks Vignesh. Reviewed-by: Jason Rush Acked-by: Jason Rush ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/3] cadence-quadspi: Fix issues with non 32bit aligned accesses
On 1/15/2018 6:01 AM, Simon Goldschmidt wrote: > > Pepperl+Fuchs GmbH, Mannheim > Geschaeftsfuehrer/Managing Directors: Dr.-Ing. Gunther Kegel (Vors./CEO), > Werner Guthier, Mehmet Hatiboglu > Vorsitzender des Aufsichtsrats/Chairman of the supervisory board: Claus > Michael > Registergericht/Register Court: AG Mannheim HRB 4713 > On 15.01.2018 12:45, Marek Vasut wrote: >> On 01/15/2018 12:36 PM, Vignesh R wrote: >>> Marek, >>> >>> On 09-Jan-18 6:49 PM, Vignesh R wrote: This series reverts use of bounce_buf.c for non-DMA related alignment restriction and replaces it with local bounce buffer to handle problems with non 32 bit aligned writes on TI platforms. Based on top of Jason's series: https://patchwork.ozlabs.org/cover/856431/ Tested on K2G EVM. >>> Could you ack this series, if you are okay with the changes? >>> >>> Jagan, >>> Could you pick this up(along with the above dependent patches) for >>> 2018.03 once Marek's Ack is in place? >>> >> Acked-by: Marek Vasut >> >> although you should get ack from Jason and Simon instead, those matter. >> > > Acked-by: Simon Goldschmidt > > If that "Simon" above was me :-) I thought ack was sent by maintainers and TB > by me, sorry. > > Simon > > Wichtiger Hinweis: > Diese E-Mail einschliesslich ihrer Anhaenge enthaelt vertrauliche und > rechtlich geschuetzte Informationen, die nur fuer den Adressaten bestimmt > sind. Sollten Sie nicht der bezeichnete Adressat sein, so teilen Sie dies > bitte dem Absender umgehend mit und loeschen Sie diese Nachricht und ihre > Anhaenge. Die unbefugte Weitergabe, das Anfertigen von Kopien und jede > Veraenderung der E-Mail ist untersagt. Der Absender haftet nicht fuer Inhalte > von veraenderten E-Mails. > > > Important Information: > This e-mail message including its attachments contains confidential and > legally protected information solely intended for the addressee. If you are > not the intended addressee of this message, please contact the addresser > immediately and delete this message including its attachments. The > unauthorized dissemination, copying and change of this e-mail are strictly > forbidden. The addresser shall not be liable for the content of such changed > e-mails. Looks good to me. Thanks Vignesh. Reviewed-by: Jason Rush Acked-by: Jason Rush ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/3] cadence-quadspi: Fix issues with non 32bit aligned accesses
Pepperl+Fuchs GmbH, Mannheim Geschaeftsfuehrer/Managing Directors: Dr.-Ing. Gunther Kegel (Vors./CEO), Werner Guthier, Mehmet Hatiboglu Vorsitzender des Aufsichtsrats/Chairman of the supervisory board: Claus Michael Registergericht/Register Court: AG Mannheim HRB 4713 On 15.01.2018 12:45, Marek Vasut wrote: On 01/15/2018 12:36 PM, Vignesh R wrote: Marek, On 09-Jan-18 6:49 PM, Vignesh R wrote: This series reverts use of bounce_buf.c for non-DMA related alignment restriction and replaces it with local bounce buffer to handle problems with non 32 bit aligned writes on TI platforms. Based on top of Jason's series: https://patchwork.ozlabs.org/cover/856431/ Tested on K2G EVM. Could you ack this series, if you are okay with the changes? Jagan, Could you pick this up(along with the above dependent patches) for 2018.03 once Marek's Ack is in place? Acked-by: Marek Vasut although you should get ack from Jason and Simon instead, those matter. Acked-by: Simon Goldschmidt If that "Simon" above was me :-) I thought ack was sent by maintainers and TB by me, sorry. Simon Wichtiger Hinweis: Diese E-Mail einschliesslich ihrer Anhaenge enthaelt vertrauliche und rechtlich geschuetzte Informationen, die nur fuer den Adressaten bestimmt sind. Sollten Sie nicht der bezeichnete Adressat sein, so teilen Sie dies bitte dem Absender umgehend mit und loeschen Sie diese Nachricht und ihre Anhaenge. Die unbefugte Weitergabe, das Anfertigen von Kopien und jede Veraenderung der E-Mail ist untersagt. Der Absender haftet nicht fuer Inhalte von veraenderten E-Mails. Important Information: This e-mail message including its attachments contains confidential and legally protected information solely intended for the addressee. If you are not the intended addressee of this message, please contact the addresser immediately and delete this message including its attachments. The unauthorized dissemination, copying and change of this e-mail are strictly forbidden. The addresser shall not be liable for the content of such changed e-mails. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/3] cadence-quadspi: Fix issues with non 32bit aligned accesses
On 01/15/2018 12:36 PM, Vignesh R wrote: > Marek, > > On 09-Jan-18 6:49 PM, Vignesh R wrote: >> This series reverts use of bounce_buf.c for non-DMA related alignment >> restriction and replaces it with local bounce buffer to handle problems >> with non 32 bit aligned writes on TI platforms. >> Based on top of Jason's series: >> https://patchwork.ozlabs.org/cover/856431/ >> >> Tested on K2G EVM. >> > > Could you ack this series, if you are okay with the changes? > > Jagan, > Could you pick this up(along with the above dependent patches) for > 2018.03 once Marek's Ack is in place? > Acked-by: Marek Vasut although you should get ack from Jason and Simon instead, those matter. -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/3] cadence-quadspi: Fix issues with non 32bit aligned accesses
Marek, On 09-Jan-18 6:49 PM, Vignesh R wrote: > This series reverts use of bounce_buf.c for non-DMA related alignment > restriction and replaces it with local bounce buffer to handle problems > with non 32 bit aligned writes on TI platforms. > Based on top of Jason's series: > https://patchwork.ozlabs.org/cover/856431/ > > Tested on K2G EVM. > Could you ack this series, if you are okay with the changes? Jagan, Could you pick this up(along with the above dependent patches) for 2018.03 once Marek's Ack is in place? > Goldschmidt Simon (1): > Revert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction > when possible" > > Vignesh R (2): > Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction > when possible" > spi: cadence_qspi_apb: Make flash writes 32 bit aligned > > drivers/spi/cadence_qspi_apb.c | 49 > ++-- > include/configs/k2g_evm.h| 1 - > include/configs/socfpga_common.h | 1 - > include/configs/stv0991.h| 1 - > 4 files changed, 22 insertions(+), 30 deletions(-) > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/3] cadence-quadspi: Fix issues with non 32bit aligned accesses
On 01/10/2018 04:33 PM, Goldschmidt Simon wrote: > On Tue 09/01/18 14:19, Vignesh R wrote: >> This series reverts use of bounce_buf.c for non-DMA related alignment >> restriction >> and replaces it with local bounce buffer to handle problems with non 32 bit >> aligned >> writes on TI platforms. >> Based on top of Jason's series: >> https://patchwork.ozlabs.org/cover/856431/ >> >> Tested on K2G EVM. > > For this whole series: > Tested on a socfpga-cyclonev board (with a Micron N25QL256A): > Tested-by: Simon Goldschmidt > > After applying this series on top of Jason's v5, qspi on the socfpga is > finally > working without local fixes! Super, thanks for testing. Also, please fix your mailer so it doesn't break threading. > Regards, > Simon > -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/3] cadence-quadspi: Fix issues with non 32bit aligned accesses
On Tue 09/01/18 14:19, Vignesh R wrote: > This series reverts use of bounce_buf.c for non-DMA related alignment > restriction > and replaces it with local bounce buffer to handle problems with non 32 bit > aligned > writes on TI platforms. > Based on top of Jason's series: > https://patchwork.ozlabs.org/cover/856431/ > > Tested on K2G EVM. For this whole series: Tested on a socfpga-cyclonev board (with a Micron N25QL256A): Tested-by: Simon Goldschmidt After applying this series on top of Jason's v5, qspi on the socfpga is finally working without local fixes! Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 0/3] cadence-quadspi: Fix issues with non 32bit aligned accesses
This series reverts use of bounce_buf.c for non-DMA related alignment restriction and replaces it with local bounce buffer to handle problems with non 32 bit aligned writes on TI platforms. Based on top of Jason's series: https://patchwork.ozlabs.org/cover/856431/ Tested on K2G EVM. Goldschmidt Simon (1): Revert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction when possible" Vignesh R (2): Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible" spi: cadence_qspi_apb: Make flash writes 32 bit aligned drivers/spi/cadence_qspi_apb.c | 49 ++-- include/configs/k2g_evm.h| 1 - include/configs/socfpga_common.h | 1 - include/configs/stv0991.h| 1 - 4 files changed, 22 insertions(+), 30 deletions(-) -- 2.15.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
