Re: [U-Boot-Users] [PATCH 04/10 v2] [ARM] TQMA31: add new board with i.MX31 processor

[Jens Gehrlein]

Jean-Christophe PLAGNIOL-VILLARD schrieb:
> On 11:33 Tue 08 Jul , Jens Gehrlein wrote:
>> Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
>> ---
>>
>> Fixed two bugs:
>> a) added NFS mount option "rw" to default environment
>> b) added prefix $(obj) in front of .depend in Makefile. Thank you Magnus for 
>> catching that.
>>
>>
>>  MAINTAINERS   |4 
>>  MAKEALL   |1 
>>  Makefile  |3 
>>  board/tqc/tqma31/Makefile |   48 
>>  board/tqc/tqma31/config.mk|2 
>>  board/tqc/tqma31/lowlevel_init.S  |  375 
>> +
>>  board/tqc/tqma31/tqma31.c |   95 
>>  board/tqc/tqma31/u-boot.lds   |   72 ++
>>  include/asm-arm/arch-mx31/mx31-regs.h |   42 
>>  include/configs/TQMA31.h  |  271 
>>  10 files changed, 913 insertions(+), 0 deletions(-)
>>  create mode 100644 board/tqc/tqma31/Makefile
>>  create mode 100644 board/tqc/tqma31/config.mk
>>  create mode 100644 board/tqc/tqma31/lowlevel_init.S
>>  create mode 100644 board/tqc/tqma31/tqma31.c
>>  create mode 100644 board/tqc/tqma31/u-boot.lds
>>  create mode 100644 include/configs/TQMA31.h
> 
> Do you have any plan to send a rebase patch?

I suppose in Q1/2009. It depends on our customer and on
my workload with other projects.

But could you possibly consider
"[U-Boot-Users] [PATCH 01/10 v2] [ARM] MXC: insert bus busy check in 
i2c_probe" from 2008-07-08 04:20 PM ?
IMO it's independent of the other patches.

Thank you for asking.

It's curious: always, when replying to your e-mails, my e-mail address
appears in the To field instead of your address.
Do the others have this problem, too? (Thunderbird 2.0.0.14 on Linux)

-- 
Kind regards,
Jens

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Re: [U-Boot-Users] [PATCH 3/7 v6] ARM: Add arm1176 core with S3C6400 SoC

[Jens Gehrlein]

Hi Guennadi,

Guennadi Liakhovetski schrieb:
> On Thu, 7 Aug 2008, Jens Gehrlein wrote:
> 
>> Hi Guennadi,
>>
>> Guennadi Liakhovetski schrieb:
>>
>>> diff --git a/cpu/arm1176/s3c64xx/interrupts.c
>>> b/cpu/arm1176/s3c64xx/interrupts.c
>> [snip]
>>> +void udelay(unsigned long usec)
>>> +{
>>> +   unsigned long long tmp;
>>> +   ulong tmo;
>>> +
>>> +   tmo = (usec + 9) / 10;
>>> +   tmp = get_ticks() + tmo;/* get current timestamp */
>>> +
>>> +   while (get_ticks() < tmp)/* loop till event */
>>> +/*NOP*/;
>>> +}
>> I tried to follow the interrupt init function, but it's difficult.
>> What is the least possible delay with the udelay function?
>> I remember that i.mx31 udelay cannot currently be below 30 microsseconds due
>> to the low input clock. If someone uses udelay(1) in polling loops with
>> timeout, the actual duration is much more longer than assumed.
> 
> Actually, the "/ 10" and this comment
> 
>   /*
>* We use the following scheme for the timer:
>* Prescaler is hard fixed at 167, divider at 1/4.
>* This gives at PCLK frequency 66MHz approx. 10us ticks
>* The timer is set to wrap after 100s, at 66MHz this obviously
>* happens after 10,000,000 ticks. A long variable can thus
>* keep values up to 40,000s, i.e., 11 hours. This should be
>* enough for most uses:-) Possible optimizations: select a
>* binary-friendly frequency, e.g., 1ms / 128. Also calculate
>* the prescaler automatically for other PCLK frequencies.
>*/
> 
> shall make it clear, that the timer resolution is configured to 10us, 
> which is also the minimum udelay. The timer could also do better, but then 
> we get other disadvantages, e.g., shorter wrap-around time.

Okay. Thank you.
I think, it's very useful for a developer to know the limits of high 
resolution timers and to see it immediately, so he can consider it in 
his code.

Kind regards,
Jens

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Re: [U-Boot-Users] [PATCH 3/7 v6] ARM: Add arm1176 core with S3C6400 SoC

[Jens Gehrlein]

Wolfgang Denk schrieb:
> In message <[EMAIL PROTECTED]> you wrote:
>>> That's what we've been doing so far:
>>>
>>> -> ls -l include/s3c*
>>> -rw-rw-r-- 1 wd wd 21763 Dec  9  2007 include/s3c2400.h
>>> -rw-rw-r-- 1 wd wd  7629 Dec  9  2007 include/s3c2410.h
>>> -rw-rw-r-- 1 wd wd 38129 Oct 13  2007 include/s3c24x0.h
>> Sorry, don't understand. So is it okay, that these files reside in the 
>> include directory or not?
> 
> Unless you want to submit a clenaup patch for many existing
> processors, yes.
> 
> What is your suggestion instead?

It was just a question to read your opinion. Personally, I can live with 
it. I thought, CPU specific header files had to go to the 
include/asm-/arch- directory.

Sorry for the noise.

Kind regards,
Jens

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Re: [U-Boot-Users] [PATCH 3/7 v6] ARM: Add arm1176 core with S3C6400 SoC

[Jens Gehrlein]

Wolfgang Denk schrieb:
> In message <[EMAIL PROTECTED]> you wrote:
>> Is it intended to put the CPU specific header files directly into the 
>> include directory (s3c6400.h and s3c64x0.h)?
> 
> That's what we've been doing so far:
> 
>   -> ls -l include/s3c*
>   -rw-rw-r-- 1 wd wd 21763 Dec  9  2007 include/s3c2400.h
>   -rw-rw-r-- 1 wd wd  7629 Dec  9  2007 include/s3c2410.h
>   -rw-rw-r-- 1 wd wd 38129 Oct 13  2007 include/s3c24x0.h

Sorry, don't understand. So is it okay, that these files reside in the 
include directory or not?

-- 
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Jens

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Re: [U-Boot-Users] [PATCH 3/7 v6] ARM: Add arm1176 core with S3C6400 SoC

[Jens Gehrlein]

Hi Guennadi,

Guennadi Liakhovetski schrieb:

> diff --git a/cpu/arm1176/s3c64xx/interrupts.c 
> b/cpu/arm1176/s3c64xx/interrupts.c
[snip]
> +void udelay(unsigned long usec)
> +{
> + unsigned long long tmp;
> + ulong tmo;
> +
> + tmo = (usec + 9) / 10;
> + tmp = get_ticks() + tmo;/* get current timestamp */
> +
> + while (get_ticks() < tmp)/* loop till event */
> +  /*NOP*/;
> +}

I tried to follow the interrupt init function, but it's difficult.
What is the least possible delay with the udelay function?
I remember that i.mx31 udelay cannot currently be below 30 microsseconds 
due to the low input clock. If someone uses udelay(1) in polling loops 
with timeout, the actual duration is much more longer than assumed.

Kind regards,
Jens

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Re: [U-Boot-Users] [PATCH 3/7 v6] ARM: Add arm1176 core with S3C6400 SoC

[Jens Gehrlein]

Guennadi Liakhovetski schrieb:
> Based on the original S3C64XX port by Samsung for U-Boot 1.1.6.
> 
> Signed-off-by: Guennadi Liakhovetski <[EMAIL PROTECTED]>
> ---
>  cpu/arm1176/Makefile|   50 ++
>  cpu/arm1176/config.mk   |   35 ++
>  cpu/arm1176/cpu.c   |  189 +++
>  cpu/arm1176/s3c64xx/Makefile|   48 ++
>  cpu/arm1176/s3c64xx/config.mk   |   34 ++
>  cpu/arm1176/s3c64xx/cpu_init.S  |  142 +
>  cpu/arm1176/s3c64xx/interrupts.c|  280 ++
>  cpu/arm1176/s3c64xx/speed.c |  140 +
>  cpu/arm1176/start.S |  469 
>  include/asm-arm/arch-s3c64xx/hardware.h |   63 +++
>  include/common.h|3 +-
>  include/s3c6400.h   |  884 
> +++
>  include/s3c64x0.h   |   92 

Is it intended to put the CPU specific header files directly into the 
include directory (s3c6400.h and s3c64x0.h)?

Kind regards,
Jens

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Re: [U-Boot-Users] [PATCH] mx31: move freescale's mx31 boards to vendor board dir

[Jens Gehrlein]

Magnus Lilja schrieb:

> Perhaps a 'imx' or 'imx31' directory would be
> better with all i.MX{31} boards in that directory.

Hmm... I propose to keep it consistent: either the boards should be 
sorted by board vendor, or there could be a new directory between 
"board" and "board/" emphasizing the CPU type, which could help 
develepors to find a reference platform faster, e.g. "board//"

Kind regards,
Jens

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Re: [U-Boot-Users] [PATCH] mx31: move freescale's mx31 boards to vendor board dir

[Jens Gehrlein]

Jean-Christophe PLAGNIOL-VILLARD schrieb:
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <[EMAIL PROTECTED]>
> ---
>  Makefile   |6 +++---
>  board/{ => freescale}/imx31_litekit/Makefile   |0 
>  board/{ => freescale}/imx31_litekit/config.mk  |0 
>  .../{ => freescale}/imx31_litekit/imx31_litekit.c  |0 
>  .../{ => freescale}/imx31_litekit/lowlevel_init.S  |0 
>  board/{ => freescale}/imx31_litekit/u-boot.lds |0 
>  board/{ => freescale}/imx31_phycore/Makefile   |0 
>  board/{ => freescale}/imx31_phycore/config.mk  |0 
>  .../{ => freescale}/imx31_phycore/imx31_phycore.c  |0 
>  .../{ => freescale}/imx31_phycore/lowlevel_init.S  |0 
>  board/{ => freescale}/imx31_phycore/u-boot.lds |0 
>  board/{ => freescale}/mx31ads/Makefile |0 
>  board/{ => freescale}/mx31ads/config.mk|0 
>  board/{ => freescale}/mx31ads/lowlevel_init.S  |0 
>  board/{ => freescale}/mx31ads/mx31ads.c|0 
>  board/{ => freescale}/mx31ads/u-boot.lds   |   10 +-
>  16 files changed, 8 insertions(+), 8 deletions(-)
>  rename board/{ => freescale}/imx31_litekit/Makefile (100%)
>  rename board/{ => freescale}/imx31_litekit/config.mk (100%)
>  rename board/{ => freescale}/imx31_litekit/imx31_litekit.c (100%)
>  rename board/{ => freescale}/imx31_litekit/lowlevel_init.S (100%)
>  rename board/{ => freescale}/imx31_litekit/u-boot.lds (100%)
>  rename board/{ => freescale}/imx31_phycore/Makefile (100%)
>  rename board/{ => freescale}/imx31_phycore/config.mk (100%)
>  rename board/{ => freescale}/imx31_phycore/imx31_phycore.c (100%)
>  rename board/{ => freescale}/imx31_phycore/lowlevel_init.S (100%)
>  rename board/{ => freescale}/imx31_phycore/u-boot.lds (100%)
>  rename board/{ => freescale}/mx31ads/Makefile (100%)
>  rename board/{ => freescale}/mx31ads/config.mk (100%)
>  rename board/{ => freescale}/mx31ads/lowlevel_init.S (100%)
>  rename board/{ => freescale}/mx31ads/mx31ads.c (100%)
>  rename board/{ => freescale}/mx31ads/u-boot.lds (90%)

I'm not sure: is the phycore board a Freescale board? Isn't it Phytec?

Kind regards,
Jens

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Re: [U-Boot-Users] RFC: U-Boot version numbering

[Jens Gehrlein]

Feng Kan schrieb:
> Albert ARIBAUD wrote:
>> Wolfgang Denk a écrit :
>>   
>>> Hello,
>>>
>>> I would like to get your general opinion about  changing  the  U-Boot
>>> version numbering scheme.
>>>
>>> To be honest, I never really understood myself how this  is  supposed
>>> to work and if the next version should be 1.3.4 or 1.4.0 or 2.0.0, i.
>>> e.  which  changes  / additions are important enough to increment the
>>> PATCHLEVEL or even VERSION number.
>>>
>>> I therefor suggest to drop this style of version numbering and change
>>> to a timestamp based version  number  system  which  has  been  quite
>>> successfully  used  by  other  projects  (like  Ubuntu)  or  is under
>>> discussion (for Linux).
>>>
>>> My suggestion for the new version numbers is as follows:
>>>
>>> VERSION = 1 (at least for the time being)
>>>
>>> PATCHLEVEL = current year - 2000
>>>
>>> SUBLEVEL = current month
>>>
>>> Both PATCHLEVEL and SUBLEVEL shall always be 2 digits (at  least  for
>>> the  next 91+ years to come) so listings for example on an FTP server
>>> shall be in a sane sorting order.
>>>
>>> If we accept this system, the next release which probably comes out
>>> in October 2008 would be v1.08.10, and assuming the one after that
>>> comes out in January 2009 would be named v1.09.01
>>>
>>> Comments?
>>> 
>> A minor :) issue I can see is that there might be *some* confusion 
>> because of an apparent, numerical rollback from 1.3.4 back to 1.08.xx. 
>> You're bound to encounter some folks who will ask, again and again, why 
>> you're  working on 1.02.yy when 1.3.4 is out there.
>>
>> Now an obvious solution would be to use 2 as the major number. If you're 
>> serious about not knowing when a major number bump-up is required, then 
>> you should be fairly ok with starting at 2.08.01 rather than 1.08.01. :)
>>
>> Joke aside: you'll get questions *anyway*, and the scheme is as fine to 
>> me as it it.
>>
>> Another, maybe trickier, issue is: you won't be able to cleanly number 
>> interim releases if you encounter a really serious bug right after 
>> you've produced this month's release, will you?
>>
>> Amicalement,
>>   
> Perhaps the Version itself can be removed, there doesn't seems to be a 
> point about it.
> You can just do v2008.1. You can add a third field for the day for those 
> really serious
> bugs:)

Partially ack.
In principle, the version prefix is unnecessary, because year and month 
are clear. But it helps when sorting the version due to the existing 
"v1". For subversions I suggest a sequential number as suffix or an 
arbitrary string, e.g.:
v2.2008.10-001
v2.2008.10-rc2
v2.2008.10-projectX
v2.2008.10-experimental_091

Any opinions about upper case / lower case notation?

Kind regards,
Jens

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Re: [U-Boot-Users] using a flat device tree to drive u-boot config

[Jens Gehrlein]

Grant Likely schrieb:
> On Sun, Aug 3, 2008 at 11:49 AM, Timur Tabi <[EMAIL PROTECTED]> wrote:
>> On Sun, Aug 3, 2008 at 10:47 AM, Wolfgang Denk <[EMAIL PROTECTED]> wrote:
>>
>>> If the  DTB  can  be  at  any
>>> flash location, you can for example have a fall-back version which is
>>> used  to bring up U-Boot in a minimal configuration for recovery mode
>>> if the new DTB fails to work.
>> I think that a "recovery DTB" would have to be part of U-Boot itself
>> to be effective.  If the normal DTB is not available, then it's likely
>> the backup one would also be unavailable.
> 
> Better to just not depend on the DTB at all for basic operation.  ie.
> don't brick the board if the DTB is unavailable.

If the DTB is not available or invalid, the settings in the config 
header file could be used as default values. At least, U-Boot should 
start with a limited function volume to be able to load valid DTB.

It's also possible to have no DTB at all for platforms not (or not yet) 
supporting the flat device tree.

Kind regards,
Jens

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Re: [U-Boot-Users] [PATCH 04/10 v2] [ARM] TQMA31: add new board with i.MX31 processor

[Jens Gehrlein]

Wolfgang Denk schrieb:
> In message <[EMAIL PROTECTED]> you wrote:
>> The TQMA31, as well as the mx32ads use the General Purpose Timer 1, 
>> which is feeded by a 32768 clock (possibly imx31_litekit and 
>> imx31_phycore with 32000 Hz? I don't know.). The prescale divider can 
>> only be an integer. 32768/1000 = non-integer.
> 
> I think other architectures hav / had similar issues. See for example
> the MIPS fixes that were added some time ago.

I'll take a look.


>> Currently, I see only one way to solve this:
>> 1. Patch the common file cpu/arm1136/mx31/interrupts.c, function 
>> interrupt_init(), so that the prescaler divides by 33.
>> Alternatively, also make the divider a board specific define.
>> 2. Patch all mx31 board config header files with CFG_HZ 1000.
>> 3. All mx31 boards have to be tested.
> 
> Sounds like a plan.

What do you mean?
It's just a proposal and I like to read comments from others, especially 
those, who wrote this code.


>> And while we are at the timers:
>> The udelay function is the next problem:
>> udelay cannot go below 1/(32768 Hz) = 30.5 micros
>> The current function inserts a theoretical nop if the requested usec 
>> value is below 1000. Therefore, IMHO, this timer is relatively 
>> imprecise, because the resulting delay is below 1 microsecond.
>> IMHO, this all because of that slow input clock.
> 
> How is this handled in Linux? I don't think they would let this go
> through?

I don't no. Where can I start to have a look on? According to 
experience, timer handling in Linux is much more complex.


Question: Why did you accept all the initial patches for 
cpu/arm1136/mx31/interrupts.c and for the boards mx31ads, imx31_litekit, 
imx31_phycore?

Kind regards,
Jens

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Re: [U-Boot-Users] [PATCH 10/10 v2] [ARM] TQMA31: new kernel param. to pass the eth MAC addr to the Linux eth chip driver

[Jens Gehrlein]

Hi Mark,

Mark Jonas schrieb:
> Hi,
> 
>> Some Linux drivers like the smc911x driver, as used on TQMA31, rely on the 
>> MAC address
>> in the appropriate register, but U-Boot resets the controller after every 
>> transfer.
>> A patch for the Linux driver is necessary to extract the MAC address from 
>> the kernel
>> boot parameter line and set the MAC address register accordingly.
>> This patch adds the kernel parameter "ethaddr" to the U-Boot default 
>> environment so that the
>> user cannot forget it.
> 
> Do you know the nwhwconf patch? We used it with a kernel 2.6.22 for
> Renesas SH3. It adds a kernel parameter nwhwconf and one of its
> options is to specify a hwaddr which is the MAC address to use. The
> Ethernet driver does not have to do anything other than to support the
> ethtool interface.
> 
> Example:
>   nwhwconf=device:eth0,hwaddr:12:34:56:78:90:ab
> 
> So I think reading a kernel parameter from the Ethernet driver is not
> a good idea - there are more generic approaches available.
> 
> There has already been a discussion on this topic on the Celinux-dev
> mailing list: 
> http://tree.celinuxforum.org/pipermail/celinux-dev/2007-July/001477.html
> . Wolfgang Denk layed out his POV there as well.
> 
> Regards,
> Mark

I have 2.6.22, too. Thank you very much for the hint and the weblink. I 
will give the patch a try. A first look showed, that the smc911x driver 
supports ethtool.

Kind regards,
Jens

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Re: [U-Boot-Users] [PATCH 04/10 v2] [ARM] TQMA31: add new board with i.MX31 processor

[Jens Gehrlein]

Hi Guennadi,

Guennadi Liakhovetski schrieb:
> On Tue, 8 Jul 2008, Jens Gehrlein wrote:
> 
>> diff --git a/board/tqc/tqma31/Makefile b/board/tqc/tqma31/Makefile
>> new file mode 100644
>> index 000..f7e17c8
>> --- /dev/null
>> +++ b/board/tqc/tqma31/Makefile
>> @@ -0,0 +1,48 @@
>> +#
>> +# Copyright (C) 2008, Guennadi Liakhovetski <[EMAIL PROTECTED]>
>> +# Copyright (C) 2008, Jens Gehrlein <[EMAIL PROTECTED]>
> 
> Thanks for the credit, but, although IANAL, I think, one does not _have_ 
> to preserve the copyright of the original file when it gets copied to a 
> new one. Otherwise most open-source files would have a vry long list 
> of Copyrights:-) Am I right?

I didn't quite understand. So what should I remove:
- your name?
- my name?
- all?
- in all files (much work)?

Thanks.

Neither I'm a lawyer. I just had a look to other source files, were it's 
done similar.

Kind regards,
Jens

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Re: [U-Boot-Users] [PATCH 04/10 v2] [ARM] TQMA31: add new board with i.MX31 processor

[Jens Gehrlein]

Wolfgang Denk schrieb:
> In message <[EMAIL PROTECTED]> you wrote:
>> +/* Timer tick */
>> +#define CFG_HZ  32768
> 
> CFG_HZ is a constant and has to be 1000.

I know, we had a discussion earlier about that issue (see "i.MX31: 
question about CFG_HZ and CKIL" of 7th May). The situation is as follows:

The TQMA31, as well as the mx32ads use the General Purpose Timer 1, 
which is feeded by a 32768 clock (possibly imx31_litekit and 
imx31_phycore with 32000 Hz? I don't know.). The prescale divider can 
only be an integer. 32768/1000 = non-integer.

The counter is just read. There are no real interrupts (I mention it, 
because you wrote about this earlier).
The origin source code is from U-Boot V2, I suppose. Guennadi used it 
for the mx31ads.

Currently, I see only one way to solve this:
1. Patch the common file cpu/arm1136/mx31/interrupts.c, function 
interrupt_init(), so that the prescaler divides by 33.
Alternatively, also make the divider a board specific define.
2. Patch all mx31 board config header files with CFG_HZ 1000.
3. All mx31 boards have to be tested.

The following is impossible:
- changing the HW
- using an internal clock, because maximum is 1000 Hz * 4096 = 4096000 
Hz (the maximum divider is 4096). All internal clocks are much higher.
Please for correction if I'm wrong.

What do you suggest to do and who does it?

And while we are at the timers:
The udelay function is the next problem:
udelay cannot go below 1/(32768 Hz) = 30.5 micros
The current function inserts a theoretical nop if the requested usec 
value is below 1000. Therefore, IMHO, this timer is relatively 
imprecise, because the resulting delay is below 1 microsecond.
IMHO, this all because of that slow input clock.

Kind regards,
Jens

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[U-Boot-Users] [PATCH 10/10 v2] [ARM] TQMA31: new kernel param. to pass the eth MAC addr to the Linux eth chip driver

[Jens Gehrlein]

Some Linux drivers like the smc911x driver, as used on TQMA31, rely on the MAC 
address
in the appropriate register, but U-Boot resets the controller after every 
transfer.
A patch for the Linux driver is necessary to extract the MAC address from the 
kernel
boot parameter line and set the MAC address register accordingly.
This patch adds the kernel parameter "ethaddr" to the U-Boot default 
environment so that the
user cannot forget it.

Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---

Replaced whitespaces by tab.
Fixed typos in patch description.


 include/configs/TQMA31.h |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)


diff --git a/include/configs/TQMA31.h b/include/configs/TQMA31.h
index c753ccc..f79cdd3 100644
--- a/include/configs/TQMA31.h
+++ b/include/configs/TQMA31.h
@@ -271,6 +271,7 @@
"console=ttymxc0,115200\0"  \
"bootargs_nfs=setenv bootargs ${bootargs} " \
"root=/dev/nfs rw " \
+   "ethaddr=${ethaddr} "   \
"ip=${ipaddr}:${serverip}:${gatewayip}:"\
"${netmask}:${hostname}:${netdev}:off " \
"panic=1 "  \


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[U-Boot-Users] [PATCH 09/10 v2] [ARM] TQMA31: add FPGA configuration flash

[Jens Gehrlein]

Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---

Fixed whitespace, tabs isssues. Thank you Jean-Christophe.


 board/tqc/tqma31/tqma31.c |6 ++
 include/asm-arm/arch-mx31/mx31-regs.h |1 +
 include/configs/TQMA31.h  |7 +--
 3 files changed, 12 insertions(+), 2 deletions(-)


diff --git a/board/tqc/tqma31/tqma31.c b/board/tqc/tqma31/tqma31.c
index 05bc000..cea53c4 100644
--- a/board/tqc/tqma31/tqma31.c
+++ b/board/tqc/tqma31/tqma31.c
@@ -36,6 +36,12 @@ static void setup_chipselects (void)
__REG (CSCR_L(0)) = CSCR_L_OEA_10 | CSCR_L_EBWA_3 | CSCR_L_EBWN_3 \
| CSCR_L_EBC_ONLY_WA | CSCR_L_DSZ_16_MUM0 | CSCR_L_CSEN;
 
+   /* FPGA configuration flash on CS1 */
+   __REG (CSCR_U(1)) = CSCR_U_CNC_3 | CSCR_U_WSC_13 | CSCR_U_EDC_4;
+   __REG (CSCR_A(1)) = CSCR_A_RWA_2 | CSCR_A_RWN_2 | CSCR_A_LBN_2_MUM0;
+   __REG (CSCR_L(1)) = CSCR_L_OEA_10 | CSCR_L_EBWA_3 | CSCR_L_EBWN_3 \
+   | CSCR_L_EBC_ONLY_WA | CSCR_L_DSZ_16_MUM0 | CSCR_L_CSEN;
+
/* Ethernet controller on CS4 */
__REG (CSCR_U(4)) = CSCR_U_CNC_1 | CSCR_U_WSC_22 | CSCR_U_EDC_4;
__REG (CSCR_A(4)) = CSCR_A_RWA_2 | CSCR_A_RWN_15;
diff --git a/include/asm-arm/arch-mx31/mx31-regs.h 
b/include/asm-arm/arch-mx31/mx31-regs.h
index 407b2c6..69d7614 100644
--- a/include/asm-arm/arch-mx31/mx31-regs.h
+++ b/include/asm-arm/arch-mx31/mx31-regs.h
@@ -84,6 +84,7 @@
 #define CSCR_U_WSC_9   0x0900
 #define CSCR_U_WSC_12  0x0C00
 #define CSCR_U_WSC_22  0x1600
+#define CSCR_U_WSC_13  0x0D00
 #define CSCR_U_EDC_4   0x0004
 #define CSCR_U_EDC_13  0x000D
 
diff --git a/include/configs/TQMA31.h b/include/configs/TQMA31.h
index c2a8b72..c753ccc 100644
--- a/include/configs/TQMA31.h
+++ b/include/configs/TQMA31.h
@@ -89,18 +89,21 @@
 #define CFG_FLASH_BASE CS0_BASE
 
 /* Max number of memory banks */
-#define CFG_MAX_FLASH_BANKS4
+#define CFG_MAX_FLASH_BANKS5
 
 /*
  * Bank start addresses.
  * 4 x 32 MiB is the maximum for user and U-Boot code. Please adapt the list
  * as well as CFG_MAX_FLASH_BANKS to your TQM. Also consider dual die chips
  * or single die chips, e.g. one dual die chip represents two banks.
+ * The fifth bank is a separate chip for the FPGA configuration. It's
+ * controlled by chipselect 1.
  */
 #define CFG_FLASH_BANKS_LIST   {CFG_FLASH_BASE,
\
CFG_FLASH_BASE + 32 * 1024 * 1024,  
\
CFG_FLASH_BASE + 64 * 1024 * 1024,  
\
-   CFG_FLASH_BASE + 96 * 1024 * 1024}
+   CFG_FLASH_BASE + 96 * 1024 * 1024,  
\
+   CS1_BASE}
 
 /* Max number of sectors on one chip */
 #define CFG_MAX_FLASH_SECT 259


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[U-Boot-Users] [PATCH 01/10 v2] [ARM] MXC: insert bus busy check in i2c_probe

[Jens Gehrlein]

On fast CPUs the time between two chip queries can become too short
to issue clear start and stop conditions. The bus seems to be blocked.
This cannot be compensated by just waiting for completed byte transfer.
The patch introduces polling of the bus busy bit in the I2C
controller's status register before the next bus access is possible.

Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---

Changed timeout value from 100 ms to 1 ms.

 drivers/i2c/mxc_i2c.c |   10 ++
 1 files changed, 10 insertions(+), 0 deletions(-)


diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index a218329..a50a371 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -115,6 +115,16 @@ static int rx_byte(void)
 int i2c_probe(uchar chip)
 {
int ret;
+   int timeout = 1000;
+
+   /* Check if bus is busy before probing next chip */
+   while ((__REG16(I2C_BASE + I2SR) & I2SR_IBB) && --timeout)
+   udelay(1);
+
+   if (timeout == 0) {
+   printf ("\nerror: bus blocked\n");
+   return -1;
+   }
 
__REG16(I2C_BASE + I2CR) = 0; /* Reset module */
__REG16(I2C_BASE + I2CR) = I2CR_IEN;


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[U-Boot-Users] [PATCH 04/10 v3] [ARM] TQMA31: add new board with i.MX31 processor

[Jens Gehrlein]

Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---

Fixed the following issues (compared to v1):
a) Myself: added NFS mount option "rw" to default environment
b) Magnus: added prefix $(obj) in front of .depend in Makefile.
   Thank you for catching that.
c) Jean-Christophe: used $(BOARD) in Makefile,
   fixed whitespace, tabs, special character,
   patched mach-types.h
d) Heiko: removed defines for default netmask, ipaddr, serverip


 MAINTAINERS   |4 
 MAKEALL   |1 
 Makefile  |3 
 board/tqc/tqma31/Makefile |   48 
 board/tqc/tqma31/config.mk|2 
 board/tqc/tqma31/lowlevel_init.S  |  375 +
 board/tqc/tqma31/tqma31.c |   89 
 board/tqc/tqma31/u-boot.lds   |   72 ++
 include/asm-arm/arch-mx31/mx31-regs.h |   42 
 include/asm-arm/mach-types.h  |   13 +
 include/configs/TQMA31.h  |  266 +++
 11 files changed, 915 insertions(+), 0 deletions(-)
 create mode 100644 board/tqc/tqma31/Makefile
 create mode 100644 board/tqc/tqma31/config.mk
 create mode 100644 board/tqc/tqma31/lowlevel_init.S
 create mode 100644 board/tqc/tqma31/tqma31.c
 create mode 100644 board/tqc/tqma31/u-boot.lds
 create mode 100644 include/configs/TQMA31.h


diff --git a/MAINTAINERS b/MAINTAINERS
index a3d70b1..dff1757 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -591,6 +591,10 @@ Michael Schwingen <[EMAIL PROTECTED]>
actux3  xscale
actux4      xscale
 
+Jens Gehrlein <[EMAIL PROTECTED]>
+
+   TQMA31  i.MX31
+
 #
 # x86 Systems: #
 #  #
diff --git a/MAKEALL b/MAKEALL
index 32caab7..4e442c5 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -524,6 +524,7 @@ LIST_ARM11="\
imx31_litekit   \
imx31_phycore   \
mx31ads \
+   TQMA31  \
 "
 
 #
diff --git a/Makefile b/Makefile
index 8bfc891..e3ade25 100644
--- a/Makefile
+++ b/Makefile
@@ -2664,6 +2664,9 @@ imx31_phycore_config  : unconfig
 mx31ads_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads NULL mx31
 
+TQMA31_config  : unconfig
+   @$(MKCONFIG) $(@:_config=) arm arm1136 tqma31 tqc mx31
+
 #
 # i386
 #
diff --git a/board/tqc/tqma31/Makefile b/board/tqc/tqma31/Makefile
new file mode 100644
index 000..a2a9eb3
--- /dev/null
+++ b/board/tqc/tqma31/Makefile
@@ -0,0 +1,48 @@
+#
+# Copyright (C) 2008, Guennadi Liakhovetski <[EMAIL PROTECTED]>
+# Copyright (C) 2008, Jens Gehrlein <[EMAIL PROTECTED]>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS  := $(BOARD).o
+SOBJS  := lowlevel_init.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/tqc/tqma31/config.mk b/board/tqc/tqma31/config.mk
new file mode 100644
index 000..19df69e
--- /dev/null
+++ b/board/tqc/tqma31/config.mk
@@ -0,0 +1,2 @@
+TEXT_BASE = 0x8ff0
+
diff --git a/board/tqc/tqma31/lowlevel_init.S b/board/tqc/tqma31/lowlevel_init.S
new file mode 100644
index 000..7e0a80e
--- /dev/null
+++ b/board/tqc/tqma31/lowlevel_init.S
@@ -0,0 +1,375 @@
+/*
+ * Copyright (C) 2008, Guennadi Liakhovetski <[EMAIL PROTECTED]>
+ * Copyright 

Re: [U-Boot-Users] [PATCH 04/10 v2] [ARM] TQMA31: add new board with i.MX31 processor

[Jens Gehrlein]

Hi Jean-Christophe,

Jean-Christophe PLAGNIOL-VILLARD schrieb:

>> +COBJS   := tqma31.o
> why not use $(BOARD)?
> COBJS := $(BOARD).o

Okay.

>> +SOBJS   := lowlevel_init.o
>> +
>> +SRCS:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
>> +OBJS:= $(addprefix $(obj),$(COBJS))
>> +SOBJS   := $(addprefix $(obj),$(SOBJS))
>> +
>> +#elif defined CONFIG_MX31_CPU_532_MHZ
>> +/* Platform clocks */
>> +REG CCM_PDR0, PDR0_CSI_PODF(0x1ff)  /* camera sensor interface */   
>> \
>> +| PDR0_PER_PODF(8-1)/* periph. if derived from USB 
>> clock */ \
>> +| PDR0_HSP_PODF(4-1)/* IPU 133 MHz */   
>> \
> Please use tab instead of whitespace
>> +| PDR0_NFC_PODF(7-1)/* NAND FC 19 MHz */
>> \
> Please use tab instead of whitespace
>> +| PDR0_IPG_PODF(2-1)/* peripherals 66.5 MHz */  
>> \
> Please use tab instead of whitespace
>> +| PDR0_MAX_PODF(4-1)/* AHB 133 MHz */   
>> \
> Please use tab instead of whitespace
>> +| PDR0_MCU_PODF(1-1)/* core 532 MHz */

Okay.

>> +/* MCU PLL */
>> +REG CCM_MPCTL, PLL_PD(1-1) | PLL_MFD(52-1) | PLL_MFI(10) | 
>> PLL_MFN(12)
>> +#else
>> +#error Please define CPU core frequency (CONFIG_CPU_399_MHZ or 
>> CONFIG_CPU_532_MHZ)!
>> +#endif /* CONFIG_CPU_xxx_MHZ */
>> +
>> +/* Serial PLL. Default: 1, 4, 12, 1 */
>> +REG CCM_SPCTL, PLL_PD(2-1) | PLL_MFD(5-1) | PLL_MFI(12) | PLL_MFN(1)
>> +.endm /* init_sdram */
>> +
>> +
>> +/* setup SDRAM on CSD0 */
>> +.macro init_sdram
>> +/*
>> + * Enhanced SDRAM Miscellaneous Register
>> + *  Latency Hiding Enable
>> + *  LPDDR delay line measure unit is enabled
>> + *  LPDDR Delay Line is not reset
>> + *  Enable Mobile DDR SDRAM operation
>> + *  Soft Reset is disabled
>> + */
>> +REG ESDMISC, 0x0004
>> +
>> +/*
>> + * Enhanced SDRAM Configuration Register 0
>> + *  tXP 4 clock delay before new COMMAND issued to LPDDR
>> + *  tWTR tLPDDR WRITE to READ Command Delay = 2 clock
>> + *  tRP SDRAM Row Precharge Delay = 3 clock
>> + *  tMRD–SDRAM Load Mode Register to ACTIVE Command = 3 clock
> you have a nice char here '<96>' in vim

Uups. Well catched. Got this code from my colleague and missed that. 
Thank you.


>> +
>> +
>> +/*
> Please use tab instead of whitespace
>> + * Enhanced SDRAM Control Register 0
> Please use tab instead of whitespace
>> + *  Enhanced SDRAM Controller Enable = 1
>> + *  SDRAM Controller Operating Mode = 010 Auto-Refresh Command
>> + *  Supervisor Protect = 0 User mode accesses are allowed to this
>> + *  chip select region
>> + *  ROW Row Address Width. = 011 14 Row Addresses
>> + *  COL Column Address Width = 01 9 Col Addresses
>> + *  DSIZ SDRAM Memory Data Width = 00 00 16-bit memory width
>> + *  aligned to D[31:16]
>> + *  SREFR SDRAM Refresh Rate  = 000 Refresh Disabled
>> + *  (bit field reset value)
>> + *  PWDT Power Down = 00 Disabled (bit field reset value) Run Mode
>> + *  FP Full Page = 0 0 Burst Length of the external memory device
>> + *  is not set to Full Page
>> + *  BL Burst Length = 0
>> + *  PRCT Precharge Timer 00 Disabled (Bit field reset value)
>> + */
>> +REG ESDCTL0, 0xa220
>> +REG 0x8000, 0x12344321
>> +REG 0x8000, 0x12344321
>> +
>> +/*
>> + * Enhanced SDRAM Control Register 0
>> + *  Enhanced SDRAM Controller Enable = 1
> Please use tab instead of whitespace
>> + *  SDRAM Controller Operating Mode = 001 Precharge Command
> Please use tab instead of whitespace
>> + *  Supervisor Protect = 0 User mode accesses are allowed to this
> Please use tab instead of whitespace
>> + *  chip select region
>> + *  ROW Row Address Width. = 011 14 Row Addresses
> Please use tab instead of whitespace
>> + *  COL Column Address Width = 01 9 Col Addresses
> Please use tab instead of whitespace
>> + *  DSIZ SDRAM Memory Data Width = 00 00 16-bit memory width
> Please use tab instead of whitespace
>> + *  aligned to D[31:16]
>> + *  SREFR SDRAM Refresh Rate  = 000 Refresh Disabled
> Please use tab instead of whitespace
>> + *  (bit field reset value)
>> + *  PWDT Power Down = 00 Disabled (bit field reset value) Run Mode
> Please use tab instead of whitespace
>> + *  FP Full Page = 0 0 Burst Length of the external memory device
> Please use tab instead of whitespace
>> + *  is not set to Full Page.
>> + *  BL Burst Length = 0
> Please use tab instead of whitespace
>> + *  PRCT Precharge Timer 00 Dis

Re: [U-Boot-Users] [PATCH 04/10 v2] [ARM] TQMA31: add new board with i.MX31 processor

[Jens Gehrlein]

Hi Heiko,

Heiko Schocher schrieb:
> Hello Jens,
> 
> one comment to your patch:
> 
> Jens Gehrlein wrote:
> 
>> Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
>> ---
>>
>> Fixed two bugs:
>> a) added NFS mount option "rw" to default environment
>> b) added prefix $(obj) in front of .depend in Makefile. Thank you Magnus for 
>> catching that.
>>   
> [...]
>> +
>> +/***
>> + * Environment
>> + 
>> **/
>> +
>> +#define CONFIG_BOOTDELAY4
>> +
>> +/* Default values */
>> +#define CONFIG_NETMASK  255.255.255.0
>> +#define CONFIG_IPADDR   172.20.5.100
>> +#define CONFIG_SERVERIP 172.20.5.121
>>   
> Please delete this block. We do not accept such settings in default
> config files.

To understand you properly: do you mean the defines for netmask, ipaddr 
and serverip, i.e. bootdelay and headerline are okay? I ask, because you 
quoted the upper lines, too.

Kind regards,
Jens

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Re: [U-Boot-Users] [PATCH 05/10] [ARM] TQMA31: add support for I2C, I2C temperature sensor and I2C-EEPROM

[Jens Gehrlein]

Jean-Christophe PLAGNIOL-VILLARD schrieb:
>>  #if defined(CONFIG_DISPLAY_CPUINFO)
>>  int print_cpuinfo (void)
>>  {
>> diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
>> index 6f9306f..68d2720 100644
>> --- a/drivers/i2c/mxc_i2c.c
>> +++ b/drivers/i2c/mxc_i2c.c
>> @@ -209,4 +209,17 @@ int i2c_write(uchar chip, uint addr, int alen, uchar 
>> *buf, int len)
>>  return 0;
>>  }
>>  
>> +int i2c_get_bus_speed(void)
>> +{
>> +return -1;
>> +}
>> +
>> +int i2c_set_bus_speed (unsigned int speed)
>> +{
>> +if (speed != CFG_I2C_SPEED)
>> +return -1;
>> +
>> +return 0;
>> +}
> why do you refuse to change the i2c bus speed?

Those two routines were missing at all before I started the board BSP. I 
just added them to compile the U-Boot successfully. Or did I miss 
something (e.g. overlaying-of-functions-technique or so)?
I copied the source code from another driver (can't remember from 
where). It's no real excuse, I know.
So, shall I change it or can I leave it for now?


>> +#define CFG_I2C_SPEED   10
> please use tab instead of whitespace
>> +#define CFG_I2C_SLAVE   0
> please use tab instead of whitespace

Will do. Thank you.


Kind regards,
Jens

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[U-Boot-Users] [PATCH 04/10 v2] [ARM] TQMA31: add new board with i.MX31 processor

[Jens Gehrlein]

Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---

Fixed two bugs:
a) added NFS mount option "rw" to default environment
b) added prefix $(obj) in front of .depend in Makefile. Thank you Magnus for 
catching that.


 MAINTAINERS   |4 
 MAKEALL   |1 
 Makefile  |3 
 board/tqc/tqma31/Makefile |   48 
 board/tqc/tqma31/config.mk|2 
 board/tqc/tqma31/lowlevel_init.S  |  375 +
 board/tqc/tqma31/tqma31.c |   95 
 board/tqc/tqma31/u-boot.lds   |   72 ++
 include/asm-arm/arch-mx31/mx31-regs.h |   42 
 include/configs/TQMA31.h  |  271 
 10 files changed, 913 insertions(+), 0 deletions(-)
 create mode 100644 board/tqc/tqma31/Makefile
 create mode 100644 board/tqc/tqma31/config.mk
 create mode 100644 board/tqc/tqma31/lowlevel_init.S
 create mode 100644 board/tqc/tqma31/tqma31.c
 create mode 100644 board/tqc/tqma31/u-boot.lds
 create mode 100644 include/configs/TQMA31.h


diff --git a/MAINTAINERS b/MAINTAINERS
index a3d70b1..dff1757 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -591,6 +591,10 @@ Michael Schwingen <[EMAIL PROTECTED]>
actux3  xscale
actux4      xscale
 
+Jens Gehrlein <[EMAIL PROTECTED]>
+
+   TQMA31  i.MX31
+
 #
 # x86 Systems: #
 #  #
diff --git a/MAKEALL b/MAKEALL
index 32caab7..4e442c5 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -524,6 +524,7 @@ LIST_ARM11="\
imx31_litekit   \
imx31_phycore   \
mx31ads \
+   TQMA31  \
 "
 
 #
diff --git a/Makefile b/Makefile
index 8bfc891..e3ade25 100644
--- a/Makefile
+++ b/Makefile
@@ -2664,6 +2664,9 @@ imx31_phycore_config  : unconfig
 mx31ads_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads NULL mx31
 
+TQMA31_config  : unconfig
+   @$(MKCONFIG) $(@:_config=) arm arm1136 tqma31 tqc mx31
+
 #
 # i386
 #
diff --git a/board/tqc/tqma31/Makefile b/board/tqc/tqma31/Makefile
new file mode 100644
index 000..f7e17c8
--- /dev/null
+++ b/board/tqc/tqma31/Makefile
@@ -0,0 +1,48 @@
+#
+# Copyright (C) 2008, Guennadi Liakhovetski <[EMAIL PROTECTED]>
+# Copyright (C) 2008, Jens Gehrlein <[EMAIL PROTECTED]>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS  := tqma31.o
+SOBJS  := lowlevel_init.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/tqc/tqma31/config.mk b/board/tqc/tqma31/config.mk
new file mode 100644
index 000..19df69e
--- /dev/null
+++ b/board/tqc/tqma31/config.mk
@@ -0,0 +1,2 @@
+TEXT_BASE = 0x8ff0
+
diff --git a/board/tqc/tqma31/lowlevel_init.S b/board/tqc/tqma31/lowlevel_init.S
new file mode 100644
index 000..50db3a1
--- /dev/null
+++ b/board/tqc/tqma31/lowlevel_init.S
@@ -0,0 +1,375 @@
+/*
+ * Copyright (C) 2008, Guennadi Liakhovetski <[EMAIL PROTECTED]>
+ * Copyright (C) 2008, Jens Gehrlein <[EMAIL PROTECTED]>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the Licens

Re: [U-Boot-Users] [PATCH 07/10] [ARM] TQMA31: adjust voltage regulators in PMIC MC13738

[Jens Gehrlein]

Hi Magnus,

Magnus Lilja schrieb:
> Hi,
> 
> Jens Gehrlein wrote:
>> +static int adjust_voltages (void)
>> +{
>> +u32 reg;
>> +u32 val;
>> +static struct spi_slave *slave = NULL;
>> +
>> +slave = spi_setup_slave(1, 0, 100,
>> +SPI_MODE_2 | SPI_CS_HIGH);
>> +if (!slave)
>> +return -1;
>> +
>> +if (spi_claim_bus(slave))
>> +return -1;
>> +
>> +/* Set PMIC arbitration switchers */
>> +val = 0x20;
>> +reg = 0x1400 | val | 0x8000;
> 
> It seems like it's time to create a MC13783 header file containing some 
> helper macros and symbolic names to the 13783's registers so we can write:
> reg = MC13783_READ_CMD(MC_REG_FOO);
> ...
> val = something_symbolic | something_symbolic2;
> reg = MC13783_WRITE_CMD(MC_REG_FOO, val);
> ...
> etc..
> 
> 
> Also, I'm pretty sure some other i.MX31 boards could benefit from changing 
> some voltages in U-boot so perhaps we could have a mc13783-reg.c (-reg as in 
> regulators) file containing stuff like mc13783_set_regulator(MC_VRFDIG, 
> VRFDIG_1V8)?

Basically, I agree. But would you accept the current patch for now? The 
new routines and macros later could be implemented later.

Kind regards,
Jens

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Re: [U-Boot-Users] [PATCH 01/10] [ARM] MXC: insert bus busy check in i2c_probe

[Jens Gehrlein]

Wolfgang Denk schrieb:
> In message <[EMAIL PROTECTED]> you wrote:
>> You are right. 100 ms is too high, although it should be irrelevant for 
>> a U-Boot command. Measurement showed, that some 100 microseconds would 
>> be enough. Do you agree if I set the timeout value to 1 ms? Other proposals?
> 
> Never say 100 ms is irrelevant for U-Boot. It's 100 ms of total boot
> time that you burn for nothing.

If it was relevant for booting, you would be right. But this routine 
isn't executed at boot time. It's called by the iprobe command invoked 
by the user on the command line.

As I proposed, 1 ms should be sufficient.

Kind regards,
Jens

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Re: [U-Boot-Users] [PATCH 01/10] [ARM] MXC: insert bus busy check in i2c_probe

[Jens Gehrlein]

Jean-Christophe PLAGNIOL-VILLARD schrieb:
> On 16:50 Fri 04 Jul , Jens Gehrlein wrote:
>> On fast CPUs the time between two chip queries can become too short
>> to issue clear start and stop conditions. The bus seems to be blocked.
>> This cannot be compensated by just waiting for completed byte transfer.
>> The patch introduces polling of the bus busy bit in the I2C
>> controller's status register before the next bus access is possible.
>>
>> Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
>> ---
>>
>>  drivers/i2c/mxc_i2c.c |   10 ++
>>  1 files changed, 10 insertions(+), 0 deletions(-)
>>
>>
>> diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
>> index a218329..6f9306f 100644
>> --- a/drivers/i2c/mxc_i2c.c
>> +++ b/drivers/i2c/mxc_i2c.c
>> @@ -115,6 +115,16 @@ static int rx_byte(void)
>>  int i2c_probe(uchar chip)
>>  {
>>  int ret;
>> +int timeout = 10;
> Could you explain why 10?
>> +
>> +/* Check if bus is busy before probing next chip */
>> +while ((__REG16(I2C_BASE + I2SR) & I2SR_IBB) && --timeout)
>> +udelay(1);
>> +
>> +if (timeout == 0) {
>> +printf ("\nerror: bus blocked\n");
>> +return -1;
>> +}
>>  
>>  __REG16(I2C_BASE + I2CR) = 0; /* Reset module */
>>  __REG16(I2C_BASE + I2CR) = I2CR_IEN;

You are right. 100 ms is too high, although it should be irrelevant for 
a U-Boot command. Measurement showed, that some 100 microseconds would 
be enough. Do you agree if I set the timeout value to 1 ms? Other proposals?

Kind regards,
Jens

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Re: [U-Boot-Users] [PATCH 04/10] [ARM] TQMA31: add new board with i.MX31 processor

[Jens Gehrlein]

Hi Detlev,

Detlev Zundel schrieb:
> Hi Jens,
> 
>> +int dram_init (void)
>> +{
>> +gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
>> +gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
>> +
>> +return 0;
>> +}
> 
> Can't you use autodetection code like we do on many (hopefully most)
> PowerPC boards?

I wish I could, believe me. But for a nice C-routine I need a stack 
while running in flash. Unlike the PowerPC code, current U-Boot ARM code 
doesn't provide such mechanism. I think, the effort to provide it isn't 
little.

Kind regards,
Jens

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Re: [U-Boot-Users] [PATCH 10/10] [ARM] TQMA31: new kernel param. to pass the eth MAC addr to the Linux eth chip driver

[Jens Gehrlein]

Hi Jean-Christophe,

Jean-Christophe PLAGNIOL-VILLARD schrieb:

> why don't you use nwhwconf parameter?

Thank you for response.
I found some U-Boot examples how to pass this parameter. But were can I 
find Linux related information? nwhwconf is new to me. I have never 
heard before.
I use Kernel 2.6.22-6 from the LTIB for mx31ads.

Kind regards,
Jens

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Re: [U-Boot-Users] [PATCH 00/10] [ARM] TQMA31: new board

[Jens Gehrlein]

Jens Gehrlein schrieb:

> Who will pick up this patch series (if there are no complaints)? Peter?

Of course, we could put them into the TQ custodian tree.
Awkward, that I forgot this.

Kind regards,
Jens

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[U-Boot-Users] [PATCH 05/10] [ARM] TQMA31: add support for I2C, I2C temperature sensor and I2C-EEPROM

[Jens Gehrlein]

Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---

 board/tqc/tqma31/tqma31.c |6 +
 cpu/arm1136/mx31/generic.c|   17 ++
 drivers/i2c/mxc_i2c.c |   13 +++
 include/asm-arm/arch-mx31/mx31-regs.h |   32 ++
 include/asm-arm/arch-mx31/mx31.h  |1 +
 include/configs/TQMA31.h  |   40 +
 6 files changed, 109 insertions(+), 0 deletions(-)


diff --git a/board/tqc/tqma31/tqma31.c b/board/tqc/tqma31/tqma31.c
index 7cec8db..0c67af3 100644
--- a/board/tqc/tqma31/tqma31.c
+++ b/board/tqc/tqma31/tqma31.c
@@ -49,6 +49,12 @@ static void setup_iomux (void)
mx31_gpio_mux (MUX_TXD1__UART1_TXD_MUX);
mx31_gpio_mux (MUX_RTS1__UART1_RTS_B);
mx31_gpio_mux (MUX_CTS1__UART1_CTS_B);
+
+   /* Pins for I2C1 */
+   mx31_gpio_mux (MUX_I2C_CLK__I2C1_SCL);
+   mx31_gpio_mux (MUX_I2C_DAT__I2C1_SDA);
+   mx31_pad_ctl (PAD_CTL_I2C_CLK, PAD_CTL_IPP_ODE_OD);
+   mx31_pad_ctl (PAD_CTL_I2C_DAT, PAD_CTL_IPP_ODE_OD);
 }
 
 int dram_init (void)
diff --git a/cpu/arm1136/mx31/generic.c b/cpu/arm1136/mx31/generic.c
index bf4c99c..e12 100644
--- a/cpu/arm1136/mx31/generic.c
+++ b/cpu/arm1136/mx31/generic.c
@@ -90,6 +90,23 @@ void mx31_gpio_mux(unsigned long mode)
__REG(reg) = tmp;
 }
 
+void mx31_pad_ctl (u32 field, u32 val)
+{
+   u32 reg, shift, mask, tmp;
+
+   /* extract 32 bit register address and shifter for bit field */
+   reg = IOMUXC_BASE + (field >> 8);
+   shift = field & 0xFF;
+
+   /* field consists of 10 bits */
+   mask = 0x3FF << shift;
+
+   tmp = __REG(reg);
+   tmp &= ~mask;
+   tmp |= (val << shift) & mask;
+   __REG(reg) = tmp;
+}
+
 #if defined(CONFIG_DISPLAY_CPUINFO)
 int print_cpuinfo (void)
 {
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 6f9306f..68d2720 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -209,4 +209,17 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buf, 
int len)
return 0;
 }
 
+int i2c_get_bus_speed(void)
+{
+   return -1;
+}
+
+int i2c_set_bus_speed (unsigned int speed)
+{
+   if (speed != CFG_I2C_SPEED)
+   return -1;
+
+   return 0;
+}
+
 #endif /* CONFIG_HARD_I2C */
diff --git a/include/asm-arm/arch-mx31/mx31-regs.h 
b/include/asm-arm/arch-mx31/mx31-regs.h
index ea15108..c0e516f 100644
--- a/include/asm-arm/arch-mx31/mx31-regs.h
+++ b/include/asm-arm/arch-mx31/mx31-regs.h
@@ -168,6 +168,9 @@
 #define MUX_CTL_CSPI2_SS2  0x87
 #define MUX_CTL_CSPI2_MOSI 0x8b
 
+#define MUX_CTL_I2C_CLK0xa2
+#define MUX_CTL_I2C_DAT0xa3
+
 /* The modes a specific pin can be in
  * these macros can be used in mx31_gpio_mux() and have the form
  * MUX_[contact name]__[pin function]
@@ -180,6 +183,35 @@
 #define MUX_CSPI2_MOSI__I2C2_SCL ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MOSI)
 #define MUX_CSPI2_MISO__I2C2_SDA ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MISO)
 
+#define MUX_I2C_CLK__I2C1_SCL  ((MUX_CTL_FUNC << 8) | MUX_CTL_I2C_CLK)
+#define MUX_I2C_DAT__I2C1_SDA  ((MUX_CTL_FUNC << 8) | MUX_CTL_I2C_DAT)
+
+/* bits in the SW_PAD_CTL registers */
+#define PAD_CTL_LOOPBACK_DIS   (0 << 9)
+#define PAD_CTL_LOOPBACK_ENA   (1 << 9)
+#define PAD_CTL_IPP_PUE_DIS(0 << 7)
+#define PAD_CTL_IPP_PUE_KEEPER (2 << 7)
+#define PAD_CTL_IPP_PUE_PULL   (3 << 7)
+#define PAD_CTL_IPP_PUS_100K_DN(0 << 5)
+#define PAD_CTL_IPP_PUS_100K_UP(1 << 5)
+#define PAD_CTL_IPP_HYS_STD(0 << 4)
+#define PAD_CTL_IPP_HYS_SCHMITT(1 << 4)
+#define PAD_CTL_IPP_ODE_STD(0 << 3)
+#define PAD_CTL_IPP_ODE_OD (1 << 3)
+#define PAD_CTL_IPP_DSE_STD(0 << 1)
+#define PAD_CTL_IPP_DSE_HIGH   (1 << 1)
+#define PAD_CTL_IPP_DSE_MAX(2 << 1)
+#define PAD_CTL_IPP_SRE_SLOW   (0 << 0)
+#define PAD_CTL_IPP_SRE_FAST   (1 << 0)
+
+/* bit fields in the SW_PAD_CTL registers, offsets based on IOMUXC_BASE */
+#definePAD_CTL_IO1_SHIFT   0
+#definePAD_CTL_IO2_SHIFT   10
+#definePAD_CTL_IO3_SHIFT   20
+#define PAD_CTL_I2C_CLK((0x21C << 8) | 
PAD_CTL_IO2_SHIFT)
+#define PAD_CTL_I2C_DAT((0x21C << 8) | 
PAD_CTL_IO1_SHIFT)
+
+
 /*
  * Memory regions and CS
  */
diff --git a/include/asm-arm/arch-mx31/mx31.h b/include/asm-arm/arch-mx31/mx31.h
index 0552c27..7b784e6 100644
--- a/include/asm-arm/arch-mx31/mx31.h
+++ b/include/asm-arm/arch-mx31/mx31.h
@@ -26,5 +26,6 @@
 
 extern u32 mx31_get_ipg_clk(void);
 extern void mx31_gpio_mux(unsigned long mode);
+extern void mx31_pad_ctl (u32 field, u32 val);
 
 #endif /* 

[U-Boot-Users] [PATCH 07/10] [ARM] TQMA31: adjust voltage regulators in PMIC MC13738

[Jens Gehrlein]

VRFDIG: 1.875 V -> 1.8 V
VGEN:   1.5 V -> 1.8 V
VDIG:   1.5 V -> 1.3 V
Unused PMIC switchers and regulators are disabled

Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---

 board/tqc/tqma31/tqma31.c |  142 +
 include/configs/TQMA31.h  |2 +
 2 files changed, 144 insertions(+), 0 deletions(-)


diff --git a/board/tqc/tqma31/tqma31.c b/board/tqc/tqma31/tqma31.c
index c704c41..abb8db0 100644
--- a/board/tqc/tqma31/tqma31.c
+++ b/board/tqc/tqma31/tqma31.c
@@ -22,6 +22,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -70,6 +71,132 @@ static void setup_iomux (void)
mx31_pad_ctl (PAD_CTL_CSPI2_MOSI, 0);
 }
 
+static int adjust_voltages (void)
+{
+   u32 reg;
+   u32 val;
+   static struct spi_slave *slave = NULL;
+
+   slave = spi_setup_slave(1, 0, 100,
+   SPI_MODE_2 | SPI_CS_HIGH);
+   if (!slave)
+   return -1;
+
+   if (spi_claim_bus(slave))
+   return -1;
+
+   /* Set PMIC arbitration switchers */
+   val = 0x20;
+   reg = 0x1400 | val | 0x8000;
+   if (spi_xfer(slave, 32, (uchar *)®, (uchar *)&val,
+   SPI_XFER_BEGIN | SPI_XFER_END))
+   return -1;
+
+   /* Set PMIC regulator enable to 0x0 */
+   val = 0x00;
+   reg = 0x2000 | val | 0x8000;
+   if (spi_xfer(slave, 32, (uchar *)®, (uchar *)&val,
+   SPI_XFER_BEGIN | SPI_XFER_END))
+   return -1;
+
+   /*
+* Set PMIC regulator setting 0
+*  VRFDIG = 1,8V / reset value = 1,875V
+*  VGEN   = 1,8V / reset value = 1,5V
+*  VDIG   = 1,3V / reset value = 1,5V
+*/
+   val = 0x63cdc;
+   reg = 0x3c00 | val | 0x8000;
+   if (spi_xfer(slave, 32, (uchar *)®, (uchar *)&val,
+   SPI_XFER_BEGIN | SPI_XFER_END))
+   return -1;
+
+   /*
+* Set PMIC regulator mode 0 to 0x24924
+*  VAUDIO  = on
+*  VIOH= off
+*  VIOLO   = on
+*  VDIG= on
+*  VGEN= on
+*  VRFDIG  = on
+*  VRFREF  = on
+*  VRFCP   = on
+*/
+   val = 0x249241;
+   reg = 0x4000 | val | 0x8000;
+   if (spi_xfer(slave, 32, (uchar *)®, (uchar *)&val,
+   SPI_XFER_BEGIN | SPI_XFER_END))
+   return -1;
+
+   /*
+* Set PMIC regulator mode 1 to 0x0
+*  VSIM= off
+*  VESIM   = off
+*  VCAM= off
+*  VRFBG   = off
+*  VVIB= off
+*  VRF1= off
+*  VRF2= off
+*  VMMC1   = off
+*  VMMC2   = off
+*/
+   val = 0x0;
+   reg = 0x4200 | val | 0x8000;
+   if (spi_xfer(slave, 32, (uchar *)®, (uchar *)&val,
+   SPI_XFER_BEGIN | SPI_XFER_END))
+   return -1;
+
+   /*
+* FIXME: switcher settings 0 and 1.
+* Kernel hangs when unpacking itself.
+* Workaround:
+* Up to now CPU can operate at maximum allowed voltage 1.6 V.
+*/
+   /*
+* Set PMIC switcher setting 0
+*  SW1A = 1,2V / reset value = 1,6V
+*  SW1ADVS  = 1,6V / reset value = 1,6V
+*  SW1ASTBY = 1,2V / reset value = 1,6V
+*/
+   /*
+   val = 0xc70c;
+   reg = 0x3000 | val | 0x8000;
+   if (spi_xfer(slave, 32, (uchar *)®, (uchar *)&val,
+   SPI_XFER_BEGIN | SPI_XFER_END))
+   return -1;
+   */
+
+   /*
+* Set PMIC switcher setting 1
+*  SW1A = 1,2V / reset value = 1,6V
+*  SW1ADVS  = 1,6V / reset value = 1,6V
+*  SW1ASTBY = 1,2V / reset value = 1,6V
+*/
+   /*
+   val = 0xc70c;
+   reg = 0x3200 | val | 0x8000;
+   if (spi_xfer(slave, 32, (uchar *)®, (uchar *)&val,
+   SPI_XFER_BEGIN | SPI_XFER_END))
+   return -1;
+   */
+
+   /*
+* Set PMIC switcher setting 5
+*  SW5 = 5V
+*  SW5 = off
+*/
+   val = 0x021605;
+   reg = 0x3A00 | val | 0x8000;
+   if (spi_xfer(slave, 32, (uchar *)®, (uchar *)&val,
+   SPI_XFER_BEGIN | SPI_XFER_END))
+   return -1;
+
+   spi_release_bus(slave);
+   spi_free_slave(slave);
+
+   return 0;
+}
+
 int dram_init (void)
 {
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
@@ -112,3 +239,18 @@ int checkboard (void)
printf ("Board: TQMA31\n");
return 0;
 }
+
+int board_late_init(void)
+{
+   /*
+* Must call this function in late init stage, because the SPI driver,
+* required by this function, uses malloc(). The malloc space has not
+* been setup in the board_init() stage.
+*/
+   if (ad

[U-Boot-Users] [PATCH 09/10] [ARM] TQMA31: add FPGA configuration flash

[Jens Gehrlein]

Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---

 board/tqc/tqma31/tqma31.c |6 ++
 include/asm-arm/arch-mx31/mx31-regs.h |1 +
 include/configs/TQMA31.h  |7 +--
 3 files changed, 12 insertions(+), 2 deletions(-)


diff --git a/board/tqc/tqma31/tqma31.c b/board/tqc/tqma31/tqma31.c
index dd2bb0a..30584fe 100644
--- a/board/tqc/tqma31/tqma31.c
+++ b/board/tqc/tqma31/tqma31.c
@@ -36,6 +36,12 @@ static void setup_chipselects (void)
__REG (CSCR_L(0)) = CSCR_L_OEA_10 | CSCR_L_EBWA_3 | CSCR_L_EBWN_3 \
| CSCR_L_EBC_ONLY_WA | CSCR_L_DSZ_16_MUM0 | CSCR_L_CSEN;
 
+   /* FPGA configuration flash on CS1 */
+   __REG (CSCR_U(1)) = CSCR_U_CNC_3 | CSCR_U_WSC_13 | CSCR_U_EDC_4;
+   __REG (CSCR_A(1)) = CSCR_A_RWA_2 | CSCR_A_RWN_2 | CSCR_A_LBN_2_MUM0;
+   __REG (CSCR_L(1)) = CSCR_L_OEA_10 | CSCR_L_EBWA_3 | CSCR_L_EBWN_3 \
+   | CSCR_L_EBC_ONLY_WA | CSCR_L_DSZ_16_MUM0 | CSCR_L_CSEN;
+
/* Ethernet controller on CS4 */
__REG (CSCR_U(4)) = CSCR_U_CNC_1 | CSCR_U_WSC_22 | CSCR_U_EDC_4;
__REG (CSCR_A(4)) = CSCR_A_RWA_2 | CSCR_A_RWN_15;
diff --git a/include/asm-arm/arch-mx31/mx31-regs.h 
b/include/asm-arm/arch-mx31/mx31-regs.h
index 407b2c6..69d7614 100644
--- a/include/asm-arm/arch-mx31/mx31-regs.h
+++ b/include/asm-arm/arch-mx31/mx31-regs.h
@@ -84,6 +84,7 @@
 #define CSCR_U_WSC_9   0x0900
 #define CSCR_U_WSC_12  0x0C00
 #define CSCR_U_WSC_22  0x1600
+#define CSCR_U_WSC_13  0x0D00
 #define CSCR_U_EDC_4   0x0004
 #define CSCR_U_EDC_13  0x000D
 
diff --git a/include/configs/TQMA31.h b/include/configs/TQMA31.h
index a174940..504cb57 100644
--- a/include/configs/TQMA31.h
+++ b/include/configs/TQMA31.h
@@ -89,18 +89,21 @@
 #define CFG_FLASH_BASE CS0_BASE
 
 /* Max number of memory banks */
-#define CFG_MAX_FLASH_BANKS4
+#define CFG_MAX_FLASH_BANKS5
 
 /*
  * Bank start addresses.
  * 4 x 32 MiB is the maximum for user and U-Boot code. Please adapt the list
  * as well as CFG_MAX_FLASH_BANKS to your TQM. Also consider dual die chips
  * or single die chips, e.g. one dual die chip represents two banks.
+ * The fifth bank is a separate chip for the FPGA configuration. It's
+ * controlled by chipselect 1.
  */
 #define CFG_FLASH_BANKS_LIST   {CFG_FLASH_BASE,\
CFG_FLASH_BASE + 32*1024*1024,  \
CFG_FLASH_BASE + 64*1024*1024,  \
-   CFG_FLASH_BASE + 96*1024*1024}
+   CFG_FLASH_BASE + 96*1024*1024,  \
+   CS1_BASE}
 
 /* Max number of sectors on one chip */
 #define CFG_MAX_FLASH_SECT 259


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[U-Boot-Users] [PATCH 06/10] [ARM] TQMA31: add support for SPI and SPI device MC13783-RTC

[Jens Gehrlein]

Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---

 board/tqc/tqma31/tqma31.c |   13 +
 include/asm-arm/arch-mx31/mx31-regs.h |   12 
 include/configs/TQMA31.h  |   20 
 3 files changed, 45 insertions(+), 0 deletions(-)


diff --git a/board/tqc/tqma31/tqma31.c b/board/tqc/tqma31/tqma31.c
index 0c67af3..c704c41 100644
--- a/board/tqc/tqma31/tqma31.c
+++ b/board/tqc/tqma31/tqma31.c
@@ -55,6 +55,19 @@ static void setup_iomux (void)
mx31_gpio_mux (MUX_I2C_DAT__I2C1_SDA);
mx31_pad_ctl (PAD_CTL_I2C_CLK, PAD_CTL_IPP_ODE_OD);
mx31_pad_ctl (PAD_CTL_I2C_DAT, PAD_CTL_IPP_ODE_OD);
+
+   /* Pins for SPI2 */
+   mx31_gpio_mux (MUX_CSPI2_MOSI__CSPI2_MOSI);
+   mx31_gpio_mux (MUX_CSPI2_MISO__CSPI2_MISO);
+   mx31_gpio_mux (MUX_CSPI2_SS0__CSPI2_SS0_B);
+   mx31_gpio_mux (MUX_CSPI2_SCLK__CSPI2_CLK);
+   mx31_pad_ctl (PAD_CTL_CSPI2_SS0, 0);
+   mx31_pad_ctl (PAD_CTL_CSPI2_SS1, 0);
+   mx31_pad_ctl (PAD_CTL_CSPI2_SS2, 0);
+   mx31_pad_ctl (PAD_CTL_CSPI2_SCLK, 0);
+   mx31_pad_ctl (PAD_CTL_CSPI2_SPI_RDY, 0);
+   mx31_pad_ctl (PAD_CTL_CSPI2_MISO, 0);
+   mx31_pad_ctl (PAD_CTL_CSPI2_MOSI, 0);
 }
 
 int dram_init (void)
diff --git a/include/asm-arm/arch-mx31/mx31-regs.h 
b/include/asm-arm/arch-mx31/mx31-regs.h
index c0e516f..4d661e8 100644
--- a/include/asm-arm/arch-mx31/mx31-regs.h
+++ b/include/asm-arm/arch-mx31/mx31-regs.h
@@ -183,6 +183,11 @@
 #define MUX_CSPI2_MOSI__I2C2_SCL ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MOSI)
 #define MUX_CSPI2_MISO__I2C2_SDA ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MISO)
 
+#define MUX_CSPI2_MOSI__CSPI2_MOSI ((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_MOSI)
+#define MUX_CSPI2_MISO__CSPI2_MISO ((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_MISO)
+#define MUX_CSPI2_SS0__CSPI2_SS0_B ((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SS0)
+#define MUX_CSPI2_SCLK__CSPI2_CLK  ((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SCLK)
+
 #define MUX_I2C_CLK__I2C1_SCL  ((MUX_CTL_FUNC << 8) | MUX_CTL_I2C_CLK)
 #define MUX_I2C_DAT__I2C1_SDA  ((MUX_CTL_FUNC << 8) | MUX_CTL_I2C_DAT)
 
@@ -208,6 +213,13 @@
 #definePAD_CTL_IO1_SHIFT   0
 #definePAD_CTL_IO2_SHIFT   10
 #definePAD_CTL_IO3_SHIFT   20
+#define PAD_CTL_CSPI2_SS2  ((0x1F4 << 8) | PAD_CTL_IO3_SHIFT)
+#define PAD_CTL_CSPI2_SCLK ((0x1F4 << 8) | PAD_CTL_IO2_SHIFT)
+#define PAD_CTL_CSPI2_SPI_RDY  ((0x1F4 << 8) | PAD_CTL_IO1_SHIFT)
+#define PAD_CTL_CSPI2_MISO ((0x1F8 << 8) | PAD_CTL_IO3_SHIFT)
+#define PAD_CTL_CSPI2_SS0  ((0x1F8 << 8) | PAD_CTL_IO2_SHIFT)
+#define PAD_CTL_CSPI2_SS1  ((0x1F8 << 8) | PAD_CTL_IO1_SHIFT)
+#define PAD_CTL_CSPI2_MOSI ((0x1FC << 8) | PAD_CTL_IO1_SHIFT)
 #define PAD_CTL_I2C_CLK((0x21C << 8) | 
PAD_CTL_IO2_SHIFT)
 #define PAD_CTL_I2C_DAT((0x21C << 8) | 
PAD_CTL_IO1_SHIFT)
 
diff --git a/include/configs/TQMA31.h b/include/configs/TQMA31.h
index f96fd74..ac81a32 100644
--- a/include/configs/TQMA31.h
+++ b/include/configs/TQMA31.h
@@ -191,6 +191,24 @@
 
 
 
/***
+ * SPI
+ 
**/
+
+/* Use the processor internal controller */
+#define CONFIG_HARD_SPI1
+#define CONFIG_MXC_SPI 1
+
+/* 0=CSPI1, 1=CSPI2, 2=CSPI3 */
+#define CONFIG_DEFAULT_SPI_BUS 1
+
+/* SCLK polarity: high; chipselect: active high */
+#define CONFIG_DEFAULT_SPI_MODE(SPI_MODE_2 | SPI_CS_HIGH)
+
+/* Add PMIC RTC driver */
+#define CONFIG_RTC_MC13783 1
+
+
+/***
  * Commands
  
**/
 
@@ -201,6 +219,8 @@
 #define CONFIG_CMD_I2C
 #define CONFIG_CMD_DTT
 #define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_DATE
 
 
 
/***


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[U-Boot-Users] [PATCH 10/10] [ARM] TQMA31: new kernel param. to pass the eth MAC addr to the Linux eth chip driver

[Jens Gehrlein]

Some Linux drivers like the smc911x driver, as used on TQMA31, rely on the MAC 
address
in the appropriate register, but U-Boot resets the controller after every 
transfer.
A patch for the Linux driver is necessary to extract the MAC address from the 
kernel
boot parameter line and set the MAC address register accordingly.
This patch adds the paramater "ethaddr" to the U-Boot default environment so 
that the
user cannot forget it.

Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---

 include/configs/TQMA31.h |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)


diff --git a/include/configs/TQMA31.h b/include/configs/TQMA31.h
index 504cb57..e9e5d78 100644
--- a/include/configs/TQMA31.h
+++ b/include/configs/TQMA31.h
@@ -275,6 +275,7 @@
"jtag=on "  \
"console=ttymxc0,115200\0"  \
"bootargs_nfs=setenv bootargs ${bootargs} " \
+   "ethaddr=${ethaddr} "   \
"root=/dev/nfs "\
"ip=${ipaddr}:${serverip}:${gatewayip}:"\
"${netmask}:${hostname}:${netdev}:off " \


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[U-Boot-Users] [PATCH 08/10] [ARM] TQMA31: adjust pad property of IPU pin FPSHIFT for the display

[Jens Gehrlein]

Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---

 board/tqc/tqma31/tqma31.c |7 +++
 include/asm-arm/arch-mx31/mx31-regs.h |1 +
 2 files changed, 8 insertions(+), 0 deletions(-)


diff --git a/board/tqc/tqma31/tqma31.c b/board/tqc/tqma31/tqma31.c
index abb8db0..dd2bb0a 100644
--- a/board/tqc/tqma31/tqma31.c
+++ b/board/tqc/tqma31/tqma31.c
@@ -69,6 +69,13 @@ static void setup_iomux (void)
mx31_pad_ctl (PAD_CTL_CSPI2_SPI_RDY, 0);
mx31_pad_ctl (PAD_CTL_CSPI2_MISO, 0);
mx31_pad_ctl (PAD_CTL_CSPI2_MOSI, 0);
+
+   /* Pins for IPU */
+   mx31_pad_ctl (PAD_CTL_FPSHIFT, PAD_CTL_IPP_PUE_PULL \
+   | PAD_CTL_IPP_PUS_100K_DN \
+   | PAD_CTL_IPP_HYS_STD \
+   | PAD_CTL_IPP_ODE_STD \
+   | PAD_CTL_IPP_SRE_FAST);
 }
 
 static int adjust_voltages (void)
diff --git a/include/asm-arm/arch-mx31/mx31-regs.h 
b/include/asm-arm/arch-mx31/mx31-regs.h
index 4d661e8..407b2c6 100644
--- a/include/asm-arm/arch-mx31/mx31-regs.h
+++ b/include/asm-arm/arch-mx31/mx31-regs.h
@@ -213,6 +213,7 @@
 #definePAD_CTL_IO1_SHIFT   0
 #definePAD_CTL_IO2_SHIFT   10
 #definePAD_CTL_IO3_SHIFT   20
+#define PAD_CTL_FPSHIFT((0x184 << 8) | 
PAD_CTL_IO1_SHIFT)
 #define PAD_CTL_CSPI2_SS2  ((0x1F4 << 8) | PAD_CTL_IO3_SHIFT)
 #define PAD_CTL_CSPI2_SCLK ((0x1F4 << 8) | PAD_CTL_IO2_SHIFT)
 #define PAD_CTL_CSPI2_SPI_RDY  ((0x1F4 << 8) | PAD_CTL_IO1_SHIFT)


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[U-Boot-Users] [PATCH 04/10] [ARM] TQMA31: add new board with i.MX31 processor

[Jens Gehrlein]

Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---

 MAINTAINERS   |4 
 MAKEALL   |1 
 Makefile  |3 
 board/tqc/tqma31/Makefile |   48 
 board/tqc/tqma31/config.mk|2 
 board/tqc/tqma31/lowlevel_init.S  |  375 +
 board/tqc/tqma31/tqma31.c |   95 
 board/tqc/tqma31/u-boot.lds   |   72 ++
 include/asm-arm/arch-mx31/mx31-regs.h |   42 
 include/configs/TQMA31.h  |  271 
 10 files changed, 913 insertions(+), 0 deletions(-)
 create mode 100644 board/tqc/tqma31/Makefile
 create mode 100644 board/tqc/tqma31/config.mk
 create mode 100644 board/tqc/tqma31/lowlevel_init.S
 create mode 100644 board/tqc/tqma31/tqma31.c
 create mode 100644 board/tqc/tqma31/u-boot.lds
 create mode 100644 include/configs/TQMA31.h


diff --git a/MAINTAINERS b/MAINTAINERS
index a3d70b1..dff1757 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -591,6 +591,10 @@ Michael Schwingen <[EMAIL PROTECTED]>
actux3  xscale
actux4  xscale
 
+Jens Gehrlein <[EMAIL PROTECTED]>
+
+   TQMA31  i.MX31
+
 #
 # x86 Systems: #
 #  #
diff --git a/MAKEALL b/MAKEALL
index 32caab7..4e442c5 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -524,6 +524,7 @@ LIST_ARM11="\
imx31_litekit   \
imx31_phycore   \
mx31ads \
+   TQMA31  \
 "
 
 #
diff --git a/Makefile b/Makefile
index 8bfc891..e3ade25 100644
--- a/Makefile
+++ b/Makefile
@@ -2664,6 +2664,9 @@ imx31_phycore_config  : unconfig
 mx31ads_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads NULL mx31
 
+TQMA31_config  : unconfig
+   @$(MKCONFIG) $(@:_config=) arm arm1136 tqma31 tqc mx31
+
 #
 # i386
 #
diff --git a/board/tqc/tqma31/Makefile b/board/tqc/tqma31/Makefile
new file mode 100644
index 000..ed403e8
--- /dev/null
+++ b/board/tqc/tqma31/Makefile
@@ -0,0 +1,48 @@
+#
+# Copyright (C) 2008, Guennadi Liakhovetski <[EMAIL PROTECTED]>
+# Copyright (C) 2008, Jens Gehrlein <[EMAIL PROTECTED]>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS  := tqma31.o
+SOBJS  := lowlevel_init.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak .depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/tqc/tqma31/config.mk b/board/tqc/tqma31/config.mk
new file mode 100644
index 000..19df69e
--- /dev/null
+++ b/board/tqc/tqma31/config.mk
@@ -0,0 +1,2 @@
+TEXT_BASE = 0x8ff0
+
diff --git a/board/tqc/tqma31/lowlevel_init.S b/board/tqc/tqma31/lowlevel_init.S
new file mode 100644
index 000..50db3a1
--- /dev/null
+++ b/board/tqc/tqma31/lowlevel_init.S
@@ -0,0 +1,375 @@
+/*
+ * Copyright (C) 2008, Guennadi Liakhovetski <[EMAIL PROTECTED]>
+ * Copyright (C) 2008, Jens Gehrlein <[EMAIL PROTECTED]>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warrant

[U-Boot-Users] [PATCH 03/10] [ARM] MX31: fix typos in defines for UART and SPI IO multiplexer pins

[Jens Gehrlein]

Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---

 board/imx31_litekit/imx31_litekit.c   |2 +-
 board/imx31_phycore/imx31_phycore.c   |4 ++--
 board/mx31ads/mx31ads.c   |2 +-
 include/asm-arm/arch-mx31/mx31-regs.h |4 ++--
 4 files changed, 6 insertions(+), 6 deletions(-)


diff --git a/board/imx31_litekit/imx31_litekit.c 
b/board/imx31_litekit/imx31_litekit.c
index 263dd9f..8cbc26e 100644
--- a/board/imx31_litekit/imx31_litekit.c
+++ b/board/imx31_litekit/imx31_litekit.c
@@ -50,7 +50,7 @@ int board_init (void)
mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
-   mx31_gpio_mux(MUX_RTS1__UART1_CTS_B);
+   mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);
 
/* SPI2 */
mx31_gpio_mux((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SS2);
diff --git a/board/imx31_phycore/imx31_phycore.c 
b/board/imx31_phycore/imx31_phycore.c
index 42ecb1e..ae93444 100644
--- a/board/imx31_phycore/imx31_phycore.c
+++ b/board/imx31_phycore/imx31_phycore.c
@@ -54,11 +54,11 @@ int board_init (void)
mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
-   mx31_gpio_mux(MUX_RTS1__UART1_CTS_B);
+   mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);
 
/* setup pins for I2C2 (for EEPROM, RTC) */
mx31_gpio_mux(MUX_CSPI2_MOSI__I2C2_SCL);
-   mx31_gpio_mux(MUX_CSPI2_MISO__I2C2_SCL);
+   mx31_gpio_mux(MUX_CSPI2_MISO__I2C2_SDA);
 
gd->bd->bi_arch_number = 447;   /* board id for linux */
gd->bd->bi_boot_params = (0x8100);  /* adress of boot parameters */
diff --git a/board/mx31ads/mx31ads.c b/board/mx31ads/mx31ads.c
index dd0e150..b6928fc 100644
--- a/board/mx31ads/mx31ads.c
+++ b/board/mx31ads/mx31ads.c
@@ -55,7 +55,7 @@ int board_init (void)
mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
-   mx31_gpio_mux(MUX_RTS1__UART1_CTS_B);
+   mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);
 
/* SPI2 */
mx31_gpio_mux((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SS2);
diff --git a/include/asm-arm/arch-mx31/mx31-regs.h 
b/include/asm-arm/arch-mx31/mx31-regs.h
index 02b7dcb..abe61f0 100644
--- a/include/asm-arm/arch-mx31/mx31-regs.h
+++ b/include/asm-arm/arch-mx31/mx31-regs.h
@@ -133,10 +133,10 @@
 #define MUX_RXD1__UART1_RXD_MUX((MUX_CTL_FUNC << 8) | MUX_CTL_RXD1)
 #define MUX_TXD1__UART1_TXD_MUX((MUX_CTL_FUNC << 8) | MUX_CTL_TXD1)
 #define MUX_RTS1__UART1_RTS_B  ((MUX_CTL_FUNC << 8) | MUX_CTL_RTS1)
-#define MUX_RTS1__UART1_CTS_B  ((MUX_CTL_FUNC << 8) | MUX_CTL_CTS1)
+#define MUX_CTS1__UART1_CTS_B  ((MUX_CTL_FUNC << 8) | MUX_CTL_CTS1)
 
 #define MUX_CSPI2_MOSI__I2C2_SCL ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MOSI)
-#define MUX_CSPI2_MISO__I2C2_SCL ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MISO)
+#define MUX_CSPI2_MISO__I2C2_SDA ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MISO)
 
 /*
  * Memory regions and CS


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[U-Boot-Users] [PATCH 01/10] [ARM] MXC: insert bus busy check in i2c_probe

[Jens Gehrlein]

On fast CPUs the time between two chip queries can become too short
to issue clear start and stop conditions. The bus seems to be blocked.
This cannot be compensated by just waiting for completed byte transfer.
The patch introduces polling of the bus busy bit in the I2C
controller's status register before the next bus access is possible.

Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---

 drivers/i2c/mxc_i2c.c |   10 ++
 1 files changed, 10 insertions(+), 0 deletions(-)


diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index a218329..6f9306f 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -115,6 +115,16 @@ static int rx_byte(void)
 int i2c_probe(uchar chip)
 {
int ret;
+   int timeout = 10;
+
+   /* Check if bus is busy before probing next chip */
+   while ((__REG16(I2C_BASE + I2SR) & I2SR_IBB) && --timeout)
+   udelay(1);
+
+   if (timeout == 0) {
+   printf ("\nerror: bus blocked\n");
+   return -1;
+   }
 
__REG16(I2C_BASE + I2CR) = 0; /* Reset module */
__REG16(I2C_BASE + I2CR) = I2CR_IEN;


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[U-Boot-Users] [PATCH 02/10] [ARM] MX31: fix bit masks in function mx31_decode_pll()

[Jens Gehrlein]

Bits MPCTL[MFN] and MPCTL[MFD] were not fully covered.

Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---

 cpu/arm1136/mx31/generic.c |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


diff --git a/cpu/arm1136/mx31/generic.c b/cpu/arm1136/mx31/generic.c
index 29c08c1..bf4c99c 100644
--- a/cpu/arm1136/mx31/generic.c
+++ b/cpu/arm1136/mx31/generic.c
@@ -27,8 +27,8 @@
 static u32 mx31_decode_pll(u32 reg, u32 infreq)
 {
u32 mfi = (reg >> 10) & 0xf;
-   u32 mfn = reg & 0x3f;
-   u32 mfd = (reg >> 16) & 0x3f;
+   u32 mfn = reg & 0x3ff;
+   u32 mfd = (reg >> 16) & 0x3ff;
u32 pd =  (reg >> 26) & 0xf;
 
mfi = mfi <= 5 ? 5 : mfi;


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[U-Boot-Users] [PATCH 00/10] [ARM] TQMA31: new board

[Jens Gehrlein]

Hi,

the following patches introduce the i.MX31 (ARM1136) based board TQMA31.
Used toolchain was ELDK 4.1.

The first three patches fix some bugs in mxc/mx31 common parts. I compiled
the im31_phycore, the imx31_litekit and the mx31ads U-Boots for this.
But I don't have boards to test them.

Patch 04/10 cannot successfully be compiled without having Patch 03/10 applied.

Patch 03/10 has been on the mailing list in a similar form, but it seems that
nobody picked it up. So I want give it a chance with my patch series.

Who will pick up this patch series (if there are no complaints)? Peter?

Kind regards,
Jens

---

Jens Gehrlein (10):
  [ARM] TQMA31: new kernel param. to pass the eth MAC addr to the Linux eth 
chip driver
  [ARM] TQMA31: add FPGA configuration flash
  [ARM] TQMA31: adjust pad property of IPU pin FPSHIFT for the display
  [ARM] TQMA31: adjust voltage regulators in PMIC MC13738
  [ARM] TQMA31: add support for SPI and SPI device MC13783-RTC
  [ARM] TQMA31: add support for I2C, I2C temperature sensor and I2C-EEPROM
  [ARM] TQMA31: add new board with i.MX31 processor
  [ARM] MX31: fix typos in defines for UART and SPI IO multiplexer pins
  [ARM] MX31: fix bit masks in function mx31_decode_pll()
  [ARM] MXC: insert bus busy check in i2c_probe


 MAINTAINERS   |4 
 MAKEALL   |1 
 Makefile  |3 
 board/imx31_litekit/imx31_litekit.c   |2 
 board/imx31_phycore/imx31_phycore.c   |4 
 board/mx31ads/mx31ads.c   |2 
 board/tqc/tqma31/Makefile |   48 
 board/tqc/tqma31/config.mk|2 
 board/tqc/tqma31/lowlevel_init.S  |  375 +
 board/tqc/tqma31/tqma31.c |  269 
 board/tqc/tqma31/u-boot.lds   |   72 ++
 cpu/arm1136/mx31/generic.c|   21 ++
 drivers/i2c/mxc_i2c.c |   23 ++
 include/asm-arm/arch-mx31/mx31-regs.h |   92 
 include/asm-arm/arch-mx31/mx31.h  |1 
 include/configs/TQMA31.h  |  337 ++
 16 files changed, 1248 insertions(+), 8 deletions(-)
 create mode 100644 board/tqc/tqma31/Makefile
 create mode 100644 board/tqc/tqma31/config.mk
 create mode 100644 board/tqc/tqma31/lowlevel_init.S
 create mode 100644 board/tqc/tqma31/tqma31.c
 create mode 100644 board/tqc/tqma31/u-boot.lds
 create mode 100644 include/configs/TQMA31.h

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Re: [U-Boot-Users] [PATCH 2/2] Remove prototypes of nand_init() in favor of including nand.h.

[Jens Gehrlein]

Hi Scott,

Scott Wood schrieb:
> Jens Gehrlein wrote:
>> Today, I updated my local git tree to the current U-Boot. Running my 
>> board I saw the message "RAM Configuration:", which didn't appear before.
>>
>> I think the reason is the following:
>> nand.h includes linux/mtd/mtd.h, which defines a macro
>> #define DEBUG(n, args...) do { } while(0).
>> This causes #ifdef DEBUG in line 198 of board.c to become true.
>>
>> Could you please fix this?
>> Thank you very much.
> 
> It's already fixed in u-boot-nand-flash.git.
> 
> -Scott

Okay. Found it. Thank you for the hint.

Kind regards,
Jens

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Re: [U-Boot-Users] [PATCH 2/2] Remove prototypes of nand_init() in favor of including nand.h.

[Jens Gehrlein]

Hi Scott,

Scott Wood schrieb:
> Signed-off-by: Scott Wood <[EMAIL PROTECTED]>
> ---
>  lib_arm/board.c |   10 ++
>  lib_ppc/board.c |4 +---
>  lib_sh/board.c  |2 +-
>  3 files changed, 4 insertions(+), 12 deletions(-)
> 
> diff --git a/lib_arm/board.c b/lib_arm/board.c
> index 67506b3..5e04553 100644
> --- a/lib_arm/board.c
> +++ b/lib_arm/board.c
> @@ -45,6 +45,8 @@
>  #include 
>  #include 
>  #include 
> +#include 

Today, I updated my local git tree to the current U-Boot. Running my 
board I saw the message "RAM Configuration:", which didn't appear before.

I think the reason is the following:
nand.h includes linux/mtd/mtd.h, which defines a macro
#define DEBUG(n, args...) do { } while(0).
This causes #ifdef DEBUG in line 198 of board.c to become true.

Could you please fix this?
Thank you very much.

Best Regards,
Jens

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Re: [U-Boot-Users] TQM823L flash recognition problem

[Jens Gehrlein]

Hi Thomas,

Thomas Maenner schrieb:
> Hi Everybody,
> 
> trying to use the u-boot V1.3.3 on a TQ Module:
> TQM823L-AF Rev.311
> 
> which had u-boot v1.1.4 running without a problem, I now get this on two 
> modules:
> 
> U-Boot 1.3.3 (Jun 27 2008 - 14:45:35)
> 
> CPU:   PPC823EZTnnB2 at 50 MHz: 16 kB I-Cache 8 kB D-Cache
> Board: TQM823LDB0A3-E50I.311
> DRAM:  16 MB
> FLASH: ## Unknown FLASH on Bank 2 - Size = 0x = 0 MB
>  4 MB
> In:serial
> Out:   serial
> Err:   serial
> Net:   SCC ETHERNET
> PCMCIA:   No Card found
> ---
> 
> The module has four AMD L160DB90VI onboard.
> Compiled u-boot after "make TQM823L_config" without modifications.
> 
> - Anything I'm missing here?
> - Was this answered before?
> 
> Thanks much for your help to point me in the right direction.
> 
> Tom

Could you please change TQM823L.h:

-#define CFG_FLASH_BANKS_LIST   { CFG_FLASH_BASE }
+#define CFG_FLASH_BANKS_LIST   { CFG_FLASH_BASE, CFG_FLASH_BASE + 
0x40 }

and try again?

There was a switch-over to use the CFI driver (see git history of file 
TQM823L.h). AFAIK the CFI driver needs a list with fix start addresses 
of each bank to start the CFI query on.

Best Regards,
Jens

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Re: [U-Boot-Users] [PATCH] net: smc911x: Fix can not compile smc911x

[Jens Gehrlein]

Hi Nobuhiro,

Nobuhiro Iwamatsu schrieb:
> When enable CONFIG_DRIVER_SMC911X_16_BIT in smc911x, can not compile it.
> I revised it from "elif" preprocessor to "elif defined".

You are right. It depends on if one writes
#define NAME
or
#define NAME 1

"#elif" and "#elif defined" behave different then.
Probably, I only tested with the "number"-version.

Thank you for catching this.

Best Regards,
Jens

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Re: [U-Boot-Users] How to specify the starting function of aU-boot standalone application.

[Jens Gehrlein]

Hi Jason,

McMullan, Jason schrieb:
> On Wed, 2008-06-25 at 07:44 +0200, Jens Gehrlein wrote:
>> I have the same problem. When I modify the source code the compiler may 
>> or may not rearrange the functions. It is not guaranteed, that the main 
>> function always starts at the same address.
>>
>> How can this be solved? Is it possible/meaningful to put the main 
>> function into a separate linker segment? Any suggestions?
> 
> The simplest way I've found is to make the following C file:
> 
> --- _start.c ---
> void _start(void)
> {
> extern int main(int argc, char **argv);
> char *args[] = { "myprogramname", "-foo", "bar", /* etc. etc. */ };
> main(sizeof(args)/sizeof(args[0]), args);
> /* Wait forever after the program ends */
> for (;;);
> }
> -
> 
> Then, link '_start.o' before *any* other objects in your link step.
> 
> Voila! The text entry should be _start!
> 
> Feel free to add BSS initialization, etc. in _start as needed.

Very nice. Thank you for this tip!

Best Regards,
Jens

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Re: [U-Boot-Users] How to specify the starting function of a U-boot standalone application.

[Jens Gehrlein]

Hi all,

richardretanubun schrieb:
> When I go go , the execution jumps straight to 
> do_func_info() and the application finishes. (which is just a bunch of 
> printf).
> 
> How do I ensure that when compiled, the my_test.bin places the main 
> function at the "go" point?
> 
> I have tried re-ordering the function bodies around, moving main as the 
> last function and thus removing all the function prototypes.
> I tried name matching the "main" function to the file name, none seems 
> to help.

I have the same problem. When I modify the source code the compiler may 
or may not rearrange the functions. It is not guaranteed, that the main 
function always starts at the same address.

How can this be solved? Is it possible/meaningful to put the main 
function into a separate linker segment? Any suggestions?

My temporary solution:
Because I had to patch the U-Boot code, especially the API, anyway for 
my purposes, I decided to implement my test function as U-Boot command 
instead as standalone application.

Best Regards,
Jens

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[U-Boot-Users] smc911x: cannot pass the MAC address from U-Boot to the Linux driver via chip registers

[Jens Gehrlein]

Hi,

in the smc911x U-Boot driver the call of eth_halt() causes a reset of 
the ethernet controller. This also resets the MAC address in the 
according chip registers. This makes it impossible to pass the MAC 
address to an ARM kernel because the smc911x linux driver reads the MAC 
address from the MAC registers and complains if the found values are 
invalid.

Any ideas to solve this problem, e.g.
- rewriting the MAC address after reset?
- not to reset the chip?
- another passing mechanism to the kernel?
- or ...

Best Regards,
Jens

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Re: [U-Boot-Users] Loading a kernel on MX31ADS using U-boot

[Jens Gehrlein]

Hi Fabio,

Fabio Estevam schrieb:
> Hi Jens,
> 
> Have you tried to pass the "jtag=on" option into the kernel command line?

Yippee! This works.
Thank you very much for this hint!
Where is this parameter documented? I didn't found anything in 
linux/Documentation or with google.

...

>> Apart from that, verify that your console=
>>> command line parameter is correct, your machine ID
>> matches, and that you 
>>> don't have a jtag debugger like bdi2000 connected
>> when you're trying to 
>>> boot.
>> I have the same problem on our board: I don't see the
>> console outputs if 
>> the BDI2000 cable is connected to the target, although the
>> BDI is in 
>> mode "reset run". Do have an idea why?


Best Regards,
Jens

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Re: [U-Boot-Users] Loading a kernel on MX31ADS using U-boot

[Jens Gehrlein]

Hi Guennadi,

Guennadi Liakhovetski schrieb:

...

Apart from that, verify that your console=
> command line parameter is correct, your machine ID matches, and that you 
> don't have a jtag debugger like bdi2000 connected when you're trying to 
> boot.

I have the same problem on our board: I don't see the console outputs if 
the BDI2000 cable is connected to the target, although the BDI is in 
mode "reset run". Do have an idea why?

Best Regards,
Jens


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Re: [U-Boot-Users] i.MX31: question about CFG_HZ and CKIL

[Jens Gehrlein]

Hi Wolfgang, Guennadi,

Wolfgang Denk schrieb:
> In message <[EMAIL PROTECTED]> you wrote:
>> If CKIL is the above mentioned 32 kHz clock, the resulting deviation in 
>> the timers is "only" about 2.4% as long as CFG_HZ in mx31ads.h is 32000 
>> Hz. Although it works with the current definition, I'd like to know your 
>> opinions, whether it is necessary to adjust this value.
> 
> Note that CFG_HZ is not really configurable, even if the name suggests
> so. In reality, CFG_HZ is a constant with the value 1000.
> 
> There are some broken boards which don't handle this  correctly,  but
> at least that's what you should set.

So, as far as I understood the function get_timer() must also return a 
value that is counted up 1000 times per second. But according to 
cpu/arm1136/mx31/interrupt.c this is not the case. GPTCNT is updated 
with 32000 or 32768 Hz, and this counter register's value is currently 
returned by get_timer() (minus base, passed by the caller).

If CFG_HZ should be set to 1000 than cpu/arm1136/mx31/interrupt.c should 
be fixed, i.e. the prescaler had to be adjusted from 1 to approx. 33. Do 
you agree or did I understand this timer stuff completely wrong?

Best regards,
Jens


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[U-Boot-Users] i.MX31: question about CFG_HZ and CKIL

[Jens Gehrlein]

Hi all,

in the i.MX31 processor reference manual they mention a 32 kHz clock as 
input for several timers and controllers. Sometimes it's called 
ipg_clk_32k. But the documentation does not clearly state, that this 
clock actually is the CKIL.

As far as I could derive from the ADS schematics the CKIL is feeded with 
32768 Hz instead of 32000 Hz. On our board we use 32768 Hz either.

If CKIL is the above mentioned 32 kHz clock, the resulting deviation in 
the timers is "only" about 2.4% as long as CFG_HZ in mx31ads.h is 32000 
Hz. Although it works with the current definition, I'd like to know your 
opinions, whether it is necessary to adjust this value.

Thank you for comments.

Best Regards,
Jens

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[U-Boot-Users] [PATCH v3] smc911x: add 16 bit support

[Jens Gehrlein]

Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---
Hi,

third attempt:
wrapped the long line, fixed typo, extended README
file and avoided e-mail text above the separator :-)

Sorry, I'm not a raw recruit but I didn't issue many
patches so far.

The title should go into the commit text, so it won't
appear twice. Or do you wish a more detailed description?

Perhaps some corrections concerning English wording in the
README file are necessary?


 README|   15 +++
 drivers/net/smc911x.c |   21 +++--
 2 files changed, 34 insertions(+), 2 deletions(-)


diff --git a/README b/README
index 36ae0fb..67e3152 100644
--- a/README
+++ b/README
@@ -787,6 +787,21 @@ The following options need to be configured:
Define this to use i/o functions instead of macros
(some hardware wont work with macros)
 
+   CONFIG_DRIVER_SMC911X
+   Support for SMSC's LAN911x and LAN921x chips
+
+   CONFIG_DRIVER_SMC911X_BASE
+   Define this to hold the physical address
+   of the device (I/O space)
+
+   CONFIG_DRIVER_SMC911X_32_BIT
+   Define this if data bus is 32 bits
+
+   CONFIG_DRIVER_SMC911X_16_BIT
+   Define this if data bus is 16 bits. If your processor
+   automatically converts one 32 bit word to two 16 bit
+   words you may also try CONFIG_DRIVER_SMC911X_32_BIT.
+
 - USB Support:
At the moment only the UHCI host controller is
supported (PIP405, MIP405, MPC5200); define
diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
index d22c889..f978762 100644
--- a/drivers/net/smc911x.c
+++ b/drivers/net/smc911x.c
@@ -30,6 +30,12 @@
 #include 
 #include 
 
+#if defined (CONFIG_DRIVER_SMC911X_32_BIT) && \
+   defined (CONFIG_DRIVER_SMC911X_16_BIT)
+#error "SMC911X: Only one of CONFIG_DRIVER_SMC911X_32_BIT and \
+   CONFIG_DRIVER_SMC911X_16_BIT shall be set"
+#endif
+
 #ifdef CONFIG_DRIVER_SMC911X_32_BIT
 static inline u32 reg_read(u32 addr)
 {
@@ -39,9 +45,20 @@ static inline void reg_write(u32 addr, u32 val)
 {
*(volatile u32*)addr = val;
 }
+#elif CONFIG_DRIVER_SMC911X_16_BIT
+static inline u32 reg_read(u32 addr)
+{
+   volatile u16 *addr_16 = (u16 *)addr;
+   return ((*addr_16 & 0x) | (*(addr_16 + 1) << 16));
+}
+static inline void reg_write(u32 addr, u32 val)
+{
+   *(volatile u16*)addr = (u16)val;
+   *(volatile u16*)(addr + 2) = (u16)(val >> 16);
+}
 #else
-#error "SMC911X: Only 32-bit bus is supported"
-#endif
+#error "SMC911X: undefined bus width"
+#endif /* CONFIG_DRIVER_SMC911X_16_BIT */
 
 #define mdelay(n)   udelay((n)*1000)
 


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[U-Boot-Users] [PATCH v2] smc911x: add 16 bit support

[Jens Gehrlein]

Incorporated Ben's, Magnus's and Guennadi's proposals.
Thank you for reviewing.

Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---

 drivers/net/smc911x.c |   19 +--
 1 files changed, 17 insertions(+), 2 deletions(-)


diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
index d22c889..bd82cf7 100644
--- a/drivers/net/smc911x.c
+++ b/drivers/net/smc911x.c
@@ -30,6 +30,10 @@
 #include 
 #include 
 
+#if defined (CONFIG_DRIVER_SMC911X_32_BIT) && defined 
(CONFIG_DRIVER_SMC911X_16_BIT)
+#error "SMC911X: Only one of CONFIG_DRIVER_SMC911X_32_BIT and 
CONFIG_DRIVER_SMC911X_16_BIT shall be set"
+#endif
+
 #ifdef CONFIG_DRIVER_SMC911X_32_BIT
 static inline u32 reg_read(u32 addr)
 {
@@ -39,9 +43,20 @@ static inline void reg_write(u32 addr, u32 val)
 {
*(volatile u32*)addr = val;
 }
+#elif CONFIG_DRIVER_SMC911X_16_BIT
+static inline u32 reg_read(u32 addr)
+{
+   volatile u16 *addr_16 = (u16 *)addr;
+   return ((*addr_16 & 0x) | (*(addr_16 + 1) << 16));
+}
+static inline void reg_write(u32 addr, u32 val)
+{
+   *(volatile u16*)addr = (u16)val;
+   *(volatile u16*)(addr + 2) = (u16)(val >> 16);
+}
 #else
-#error "SMC911X: Only 32-bit bus is supported"
-#endif
+#error "SMC911X: undefined buswidth"
+#endif /* CONFIG_DRIVER_SMC911X_16_BIT */
 
 #define mdelay(n)   udelay((n)*1000)
 


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Re: [U-Boot-Users] [PATCH] net: add 16 bit support for smc911x

[Jens Gehrlein]

Guennadi Liakhovetski schrieb:
> On Tue, 29 Apr 2008, Jens Gehrlein wrote:
> 
>> Hi Ben, Magnus,
>>
>> here is my patch to enable 2x16 bit accesses to the LAN9x1x.
>> I still not have a HW, so may I ask you to test it and, if applicable,
>> fix the code?
>>
>> Best Regards,
>> Jens
>>
>> ---
>>
>>  drivers/net/smc911x.c |   17 -
>>  1 files changed, 16 insertions(+), 1 deletions(-)
>>
>>
>> diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
>> index d22c889..841a64d 100644
>> --- a/drivers/net/smc911x.c
>> +++ b/drivers/net/smc911x.c
>> @@ -30,6 +30,8 @@
>>  #include 
>>  #include 
>>  
>> +#define CONFIG_DRIVER_SMC911X_16_BIT 1
>> +
> 
> Looks like an obvious thing - you'll remove this define from the patch for 
> final submission, right?

Oh, ah. You're right. I inserted this to do a compile test and to 
inspect the generated assembler code. This define should be later moved 
to the board specific header file.

Sorry.

Well spotted. Thank you.

Magnus, are you going to fix the code as proposed by Ben and Guennadi or 
  should I resubmit the patch?

Best Regards,
Jens

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[U-Boot-Users] [PATCH] net: add 16 bit support for smc911x

[Jens Gehrlein]

Hi Ben, Magnus,

here is my patch to enable 2x16 bit accesses to the LAN9x1x.
I still not have a HW, so may I ask you to test it and, if applicable,
fix the code?

Best Regards,
Jens

---

 drivers/net/smc911x.c |   17 -
 1 files changed, 16 insertions(+), 1 deletions(-)


diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
index d22c889..841a64d 100644
--- a/drivers/net/smc911x.c
+++ b/drivers/net/smc911x.c
@@ -30,6 +30,8 @@
 #include 
 #include 
 
+#define CONFIG_DRIVER_SMC911X_16_BIT 1
+
 #ifdef CONFIG_DRIVER_SMC911X_32_BIT
 static inline u32 reg_read(u32 addr)
 {
@@ -39,8 +41,21 @@ static inline void reg_write(u32 addr, u32 val)
 {
*(volatile u32*)addr = val;
 }
+#elif CONFIG_DRIVER_SMC911X_16_BIT
+static inline u32 reg_read(u32 addr)
+{
+   u32 val_lo = (u32)(*(volatile u16*)addr);
+   u32 val_hi = (u32)(*(volatile u16*)(addr | 2));
+
+   return (val_hi << 16) | val_lo;
+}
+static inline void reg_write(u32 addr, u32 val)
+{
+   *(volatile u16*)addr = (u16)val;
+   *(volatile u16*)(addr | 2) = (u16)(val >> 16);
+}
 #else
-#error "SMC911X: Only 32-bit bus is supported"
+#error "SMC911X: undefined buswidth"
 #endif
 
 #define mdelay(n)   udelay((n)*1000)


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Re: [U-Boot-Users] Question about smc911x driver (16/32 Bit support)

[Jens Gehrlein]

Hi Magnus, Ben,

Magnus Lilja schrieb:
> Hi Ben,
> 
>>  >  Well, the i.MX31 Litekit board has a 16-bit LAN9117 and that seems to
>>  >  work with the 32-bit flag set in the config file.
>>  >
>>  That's good news.  I would prefer, though, to break this into two
>>  16-bit accesses so we don't need to wonder what architectures it would
>>  work on.  Would you be able to try something out, since you have
>>  hardware?
> 
> If someone publishes a patch I can certainly try it on the hardware.

I already prepared the patch, but currently I can't test it, and I'm not 
sure if I did it right. Please be patient.
Meanwhile, I report successful execution of the current driver yesterday 
on our HW developer's board with 16 bit port size. The i.MX31 splits the 
32 bit word (I knew that from PowerPC, but wasn't sure of ARM).

Regards,
Jens


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Re: [U-Boot-Users] Question about smc911x driver (16/32 Bit support)

[Jens Gehrlein]

Hi Ben,

Ben Warren schrieb:
> Hi Jens,
> 
> On Tue, Apr 22, 2008 at 5:18 AM, Jens Gehrlein <[EMAIL PROTECTED]> wrote:
>> Hi,
>>
>>  in the source code there is a preprocessor directive
>>  #error "SMC911X: Only 32-bit bus is supported".
>>
>>  We use a LAN9215i, which has a 16 Bit data interface only, connected to
>>  an i.MX31.
>>
>>  The LAN9215 is in the driver's ID list.
>>
>>  According to the data sheet accesses have to be 2x16 Bit to build the
>>  device's internal 32 Bit format.
>>
>>  What does this non-32-Bit exclusion exactly mean?
>>  Will the driver work on our HW configuration?
>>
> This #error message was included, because if you look at the code
> you'll see that the read/write accessors are 32-bit operations *(u32 *
> ).  These may or may not work on your configuration.  It should be
> trivial to write accessors for a 16-bit bus, but nobody had hardware
> to try it out on.  Please do so and submit a patch.

Yes, it seems, that we just need two additional functions which split a 
32 Bit access into two 16 Bit accesses. That should be easy. I'm going 
to create a patch as soon as I get the HW. But first I want to test 
whether the processor splits itself automatically.

Thank you very much.

Best Regards,
Jens


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[U-Boot-Users] Question about smc911x driver (16/32 Bit support)

[Jens Gehrlein]

Hi,

in the source code there is a preprocessor directive
#error "SMC911X: Only 32-bit bus is supported".

We use a LAN9215i, which has a 16 Bit data interface only, connected to 
an i.MX31.

The LAN9215 is in the driver's ID list.

According to the data sheet accesses have to be 2x16 Bit to build the 
device's internal 32 Bit format.

What does this non-32-Bit exclusion exactly mean?
Will the driver work on our HW configuration?

Confused,
Jens

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Re: [U-Boot-Users] Loading a kernel on MX31ADS using U-boot

[Jens Gehrlein]

Fabio Estevam schrieb:
> Hi Jens,
> 
> Yes, I used LTIB for building the kernel:
> 
> export SYSCFG_KTARG=uImage
> ./ltib -p kernel -m prep
> ./ltib -p kernel -m scbuild
> ./ltib -p kernel -m scdeploy
> 
> The uImage is generated at:
> .../rpm/BUILD/linux/arch/arm/boot/uImage 
> 
> Regards,
> 
> Fabio Estevam

Thank you very much.
I will try it as soon as I come to the Linux part.

Regards
Jens

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Re: [U-Boot-Users] Loading a kernel on MX31ADS using U-boot

[Jens Gehrlein]

Hi Fabio,

Fabio Estevam schrieb:
> Hi Guennadi,
> 
> Now I generated uImage correctly and it boots fine.

How did you build this Kernel? Did you use the LTIB?

Regards
Jens

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Re: [U-Boot-Users] Generate list file

[Jens Gehrlein]

Hi,

Jerry Van Baren schrieb:
> Avinash Vijayvergia wrote:
>> Hi All
>>
>> I had a question which is trivial but I couldn't find an answer to it. 
>> Can anyone tell me how do I generate a list file from gcc compiler or 
>> even preferred is listing with the interspersed C code.
>>
>> Thanks
>> Avinash
> 
> If I understand your question, I think you are asking for a disassembly 
> output:
>objdump -d
> or, better, a disassembly interspersed with source:
>objdump -S
> 
> 

The following works for me, too:

diff --git a/config.mk b/config.mk
index 22d3398..b6ad763 100644
--- a/config.mk
+++ b/config.mk
@@ -237,7 +237,7 @@ ifndef REMOTE_BUILD
  %.o:  %.S
$(CC) $(AFLAGS) -c -o $@ $<
  %.o:  %.c
-   $(CC) $(CFLAGS) -c -o $@ $<
+   $(CC) $(CFLAGS) -Wa,-ahlncds=$(subst .o,.lst,$@) -c -o $@ $<

But Jerry's solution is better in that you don't have to recompile the 
U-Boot, right?

Best Regards
Jens

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Re: [U-Boot-Users] [PATCH] 83xx: Add support for CFG_I2C_SPEED in fsl_i2c.c

[Jens Gehrlein]

Hi Timur,

Timur Tabi schrieb:
> Jens Gehrlein wrote:
> 
>> When is it planned to apply these patches (especially MPC85xx)?
> 
> Well, it's on my to-do list, but I'm currently busy with something else.  How
> important is this feature for you?
> 

We started a hack on MPC8548 1.5 years before. Later we found your 
announcement on the mailing list. Your patches are the better solution. 
It's not urgent. But it's nice to know, how your "release plans" are.

Best regards
Jens

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Re: [U-Boot-Users] [PATCH] 83xx: Add support for CFG_I2C_SPEED in fsl_i2c.c

[Jens Gehrlein]

Hi,

Timur Tabi schrieb:
> Timur Tabi wrote:
>> Add support to fsl_i2c.c for setting and querying the I2C bus speed.  Current
>> 83xx boards define the CFG_I2C_SPEED, but fsl_i2c.c ignores the value and
>> uses a conservative value of 0x3F when programming the I2C bus speed.
>>
>> Signed-off-by: Timur Tabi <[EMAIL PROTECTED]>
>> ---
>>
>> Unfortunately, only 83xx calculates and stores the I2C clock frequencies,
>> so this code is compiled on 83xx only.
> 
> I've got another patch that adds this feature to 85xx and 86xx, so if that 
> patch 
> is applied, then I will submit another version of *this* patch that extends 
> the 
> code to 85xx and 86xx.
> 

When is it planned to apply these patches (especially MPC85xx)?

Regards,
Jens

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[U-Boot-Users] Question about NAND-Flash Support on MPC831x

[Jens Gehrlein]

Hi,

on 2007-05-16 16:28:05 GMT, Scott Wood submitted a patch with the subject:
"[PATCH 2/2] NAND: Add mpc831x support."

I can't find this patch in any repository. Even, there wasn't any reply 
to his e-mail.

Was the patch rejected?
What's about the current state of NAND-Flash Support for MPC831x in 
U-Boot using the FCM concerning:
- Read/Write/Erase Access
- Booting from NAND

Thanks.

Best Regards
Jens


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[U-Boot-Users] [PATCH 2/2] TQM834x: enable DHCP

[Jens Gehrlein]

Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---

 include/configs/TQM834x.h |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index 0f73400..7373d7b 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -335,6 +335,7 @@ extern int tqm834x_num_flash_banks;
 #define CONFIG_CMD_JFFS2
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
 
 #if defined(CONFIG_PCI)
 #define CONFIG_CMD_PCI


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[U-Boot-Users] [PATCH 1/2] TQM834x: support for Spansion N-type Flashes (sector size = 256 KiB at 2x16 Bit).

[Jens Gehrlein]

Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---

 include/configs/TQM834x.h |6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index 8ef3f09..0f73400 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -181,7 +181,7 @@ extern int tqm834x_num_flash_banks;
 #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
 
 #define CFG_MONITOR_LEN(256 * 1024) /* Reserve 256 kB for Mon 
*/
-#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
+#define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc */
 
 /*
  * Serial Port
@@ -302,7 +302,7 @@ extern int tqm834x_num_flash_banks;
 #ifndef CFG_RAMBOOT
#define CFG_ENV_IS_IN_FLASH 1
#define CFG_ENV_ADDR(CFG_MONITOR_BASE + 0x4)
-   #define CFG_ENV_SECT_SIZE   0x2 /* 256K(one sector) for env */
+   #define CFG_ENV_SECT_SIZE   0x4 /* 256K(one sector) for env */
#define CFG_ENV_SIZE0x2000
 #else
#define CFG_NO_FLASH1   /* Flash is not usable now */
@@ -557,7 +557,7 @@ extern int tqm834x_num_flash_banks;
 #define MTDIDS_DEFAULT "nor0=TQM834x-0"
 
 /* default mtd partition table */
-#define MTDPARTS_DEFAULT   "mtdparts=TQM834x-0:256k(u-boot),128k(env),"\
+#define MTDPARTS_DEFAULT   "mtdparts=TQM834x-0:256k(u-boot),256k(env),"\
"1m(kernel),2m(initrd),"\
"-(user);"\
 


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[U-Boot-Users] [PATCH 0/2] TQM834x: N-Flash support and DHCP

[Jens Gehrlein]

Hi,

the following 2 patches introduce support for NOR-Flash with
sector size 128 KiB (256 KiB at 2x16 Bit) and enable DHCP as
on other TQ modules.

Regards,
Jens

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