585 + (160 + 5)for slowest transactions *999 for the rest of the
instructions!
On Tue, Sep 27, 2011 at 12:49 AM, Gene gene.ress...@gmail.com wrote:
You guys have the right idea except that since it's multiple choice
you can do this with no math. With 1000 data items and only 4 stages,
the
clock period=(slowest stage delay)+(Buffer delay).
slowest stage delay is 160 ns and Buffer delay is 5ns. Buffer delay will
always be there between two stages .
clock period=165ns.
In the pipelining the time it takes =(k+n-1) * (clock period)
k=number of stages and n=number of
Thats right. Clock speed is governed by slowest processing stage + register
delay. With clock cycle of (160+5) ns even the faster stages will be forced
to run slowly. As a result 1st instruction will take 165*4 ns and rest of
following 999 instructions will take 165*999 ns.
On Tue, Sep 27, 2011
@bharat:
for the second part where u multiplied (160+5) with 999, it should be
160*999 because it is max of (150,120,160,140,5). Correct me if i am
wrong.
On Sep 26, 4:02 pm, bharatkumar bagana bagana.bharatku...@gmail.com
wrote:
for the first instruction : 150+5+120+5+160+5+140=585 ns
for the
You guys have the right idea except that since it's multiple choice
you can do this with no math. With 1000 data items and only 4 stages,
the bottleneck has to be the slowest pipeline stage with its register
delay. So you can answer b in 10 seconds and move on to the next
question!
On Sep 26,
