Hello,
There exists differnet google groups for OS related queries. Could you
please move out your discussion there.
Thanks
Pramod Negi
On Thu, May 6, 2010 at 5:34 AM, Yalla Sridhar sridhar2...@gmail.com wrote:
yea if your processor has multiple cores or is Hyper Threading support then
yea if your processor has multiple cores or is Hyper Threading support then
it can execute more than 1 instruction concurrently.
On Thu, May 6, 2010 at 12:10 AM, praba garan prabagara...@gmail.com wrote:
Windows Task Manager Performance tab shows the presence of two processors.
Will 2
I guess with Virtual machines, instructions that simulate instructions
of microprocessor are scheduled onto the real processor. But good
question is how the scheduling of real microprocessor instructions
done in a virtual machine. And the answer is again that its done on
virtual processor, which
Windows Task Manager Performance tab shows the presence of two processors.
Will 2 instructions be executed concurrently??
With Regards,
Prabagaran.
On Wed, May 5, 2010 at 4:56 PM, Varun Nagpal varun.nagp...@gmail.comwrote:
I guess with Virtual machines, instructions that simulate instructions
I think it is necessary to study the full architecture of INTEL MotherBoard
to get a full picture.
How does scheduling happen incase of Virtual Machines??
Then how does a packet coming to the Guest OS is sent to Guest OS.
ie, either directly to Guest OS or through Host OS.
With Regards,
I think its a good question and fairly complicated to explain at
hardware(RTL) level. Anyways, let me give it a try :
You suggested that only 1 instruction is executed by one processor,
which is not true(if you have read computer architecture). Briefly,
lets assume the instruction
@ Pradeep
*CPU stop its current processing and goes to the interrupt subroutine*
you have mentioned that the CPU stops its current processing and goes to the
interrupt subroutine..
My Question is how does the CPU stops its execution(any special hardware
involved) because it is busy in executing
@Prabagaran
Execution of an instruction, by the CPU, is an ATOMIC operation. Interrupts,
if any, will be processed after the execution of the current instruction.
CPU has interrupt pins attached to it. Whenever an interrupt occurs, the CPU
will be informed about the interrupt through these
we know that there are many pins available in microprocessor chips one of
them is INTR(interrupt Req)
When a CPU receives an Interrupt Request (IRQ), it first checks if it must
react to the interrupt. So-called Maskable Interrupts allow a programmer to
specify that the CPU does ignore it, while
although CPU is busy in exexcution...it check's its registers values for the
pending interrupts ..
if any interrupt is pending at the end of the current CPU cycle...it
shedules the interrupt handler to further execute the interrupt
subroutine...
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You received this message because you are
Hi all,
I have a doubt in OS.
The scheduler does the process of preemption.
And one processor can run atmost 1 instruction at a time.
Then how where does the scheduler run??
With Regards,
Prabagaran.
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The scheduler takes control with a clock interruption. Then it analyzes if
it has to preempt or not the running task.
On Sat, May 1, 2010 at 5:00 PM, praba garan prabagara...@gmail.com wrote:
Hi all,
I have a doubt in OS.
The scheduler does the process of preemption.
And one
read here - http://en.wikipedia.org/wiki/Preemption_%28computing%29
Time slice
The period of time for which a process is allowed to run in a preemptive
multitasking system is generally called the *time slice*, or *quantum*. The
scheduler is run once every time slice to choose the next process
@ Guillermo Garcia
The link gives the overall abstract idea.
I am talking in register level.
When a user process executes
1. PC program counter will contain the address of the next instruction in
user code.
2. Processor registers(accumulator ...) contain the current instruction
data.
Then where
lets suppose Processor executing a instruction(process1) and another
process2 tries to take the control of CPU so inorder to inform CPU it has to
interrupt the CPU right
now we know that if interrupt comes CPU stop its current processing and goes
to the interrupt subroutine...now CPU knows that
correct, and in each process switch, the process state (registers, etc. ) is
stored so when the scheduler wants to go back to execute such process, it
restores it to the state exactly before its execution was interrupted
On Sat, May 1, 2010 at 7:32 PM, pradeep verma ppradeep...@gmail.com wrote:
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