Re: [PATCH] drm/amdgpu: add missing NULL check

I can confirm this patch fixes the kernel crash I reported. But as discussed with Christian, we should find the root cause. On 10/6/23 14:11, Christian König wrote: bo->tbo.resource can easily be NULL here. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2

[PATCH v2] drm/amdgpu: fix clearing mappings for BOs that are always valid in VM

are correctly handled there. Cc: sta...@vger.kernel.org Signed-off-by: Samuel Pitoiset Reviewed-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu

[PATCH] drm/amdgpu: fix clearing mappings for BOs that are always valid in VM

-off-by: Samuel Pitoiset --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index 143d11afe0e5..eff73c428b12 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

[ANNOUNCE] libdrm 2.4.110

(1): use standard `__typeof__()` instead of GNU extension `typeof()` Guchun Chen (1): tests/amdgpu: Add VCN test support for Biege Goby Raviteja Goud Talla (1): intel: sync i915_pciids.h with kernel Samuel Pitoiset (4): amdgpu: update_drm.h for new CTX OP to set/get

Re: [ANNOUNCE] mesa 22.0.0-rc2

xed cull/clip distances Samuel Pitoiset (1): Revert "radv: re-apply "Do not access set layout during vkCmdBindDescriptorSets."" Hi Dylan, can we add commit 66f7289d568db8711adb885acc56622e2aff252a Author: Samuel Pitoiset Date: Wed Jan 19 16:15:33 2022 +0100 radv:

Re: [PATCH v3] drm/amdgpu: add support for user trap handlers

Added GF10.3 support. I re-tested this on GFX9 and it still works, though on GFX10+ the trap handler is never reached, is there something obviously wrong in this patch? Thanks! On 5/6/21 8:54 AM, Samuel Pitoiset wrote: A trap handler can be used by userspace to catch shader exceptions like

[PATCH v3] drm/amdgpu: add support for user trap handlers

. At the moment, we don't know how to set them via the CP, so they are only emitted if a VMID is reserved. This introduces a new CS chunk that can be used to set the TBA/TMA virtual address at submit time. Signed-off-by: Samuel Pitoiset --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 31

Re: [Mesa-dev] Outstanding Mesa 21.0 patches

For RADV: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10174 On 4/9/21 6:39 PM, Dylan Baker wrote: Hi all, I've been a little behind on release work recently, and I'm tryinng to cleanup the backlog of patches against the 21.0 branch that haven't been applied but have been

Re: [Mesa-dev] Request for developer access for Tony Wasserka

+1 On 11/20/20 10:44 AM, Daniel Schürmann wrote: Hi, I would like to request developer access for our new team member, Tony Wasserka. He has proven himself capable with a number of MRs and works actively on the ACO backend. His gitlab nick is neobrain. Thanks in advance, Daniel

Re: [PATCH v2] drm/amdgpu: add support for user trap handlers

On 8/28/20 10:23 AM, Christian König wrote: Am 28.08.20 um 10:14 schrieb Samuel Pitoiset: On 8/28/20 9:57 AM, Christian König wrote: Am 25.08.20 um 16:07 schrieb Samuel Pitoiset: A trap handler can be used by userspace to catch shader exceptions like divide by zero, memory violations etc

Re: [PATCH v2] drm/amdgpu: add support for user trap handlers

On 8/28/20 10:23 AM, Christian König wrote: Am 28.08.20 um 10:14 schrieb Samuel Pitoiset: On 8/28/20 9:57 AM, Christian König wrote: Am 25.08.20 um 16:07 schrieb Samuel Pitoiset: A trap handler can be used by userspace to catch shader exceptions like divide by zero, memory violations etc

Re: [PATCH v2] drm/amdgpu: add support for user trap handlers

On 8/28/20 9:57 AM, Christian König wrote: Am 25.08.20 um 16:07 schrieb Samuel Pitoiset: A trap handler can be used by userspace to catch shader exceptions like divide by zero, memory violations etc. On GFX6-GFX8, the registers used to configure TBA/TMA aren't privileged and can be configured

[PATCH v2] drm/amdgpu: add support for user trap handlers

) Signed-off-by: Samuel Pitoiset --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 31 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_ids.h | 4 +++ drivers/gpu/drm/amd/amdgpu/amdgpu_job.h | 4 +++ drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

Re: [RFC PATCH] drm/amdgpu: add support for user trap handlers

On 8/24/20 11:32 PM, Alex Deucher wrote: On Mon, Aug 24, 2020 at 2:33 PM Alex Deucher wrote: On Mon, Aug 24, 2020 at 7:57 AM Samuel Pitoiset wrote: A trap handler can be used by userspace to catch shader exceptions like divide by zero, memory violations etc. On GFX6-GFX8, the registers

Re: [RFC PATCH] drm/amdgpu: add support for user trap handlers

On 8/24/20 8:17 PM, Marek Olšák wrote: SET_SH_REG won't work with CP register shadowing. You need to use WRITE_DATA or WREG32. You are right, will fix. Marek On Mon, Aug 24, 2020 at 7:57 AM Samuel Pitoiset mailto:samuel.pitoi...@gmail.com>> wrote: A trap handler can b

[RFC PATCH] drm/amdgpu: add support for user trap handlers

CS chunk that can be used to set the TBA/TMA virtual address at submit time. TODO: - add GFX 6,7 and 10 support - rebase on top of amd-staging-drm-next (this branch currently hangs my GPU at boot) Signed-off-by: Samuel Pitoiset --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 31

Re: [Mesa-dev] mediump support: future work

On RADV, we already support fp16 with the LLVM backend (not saying it's always optimized though) and with ACO it should be mostly working but not yet enabled because I think we would like fast packed math support first and I'm not sure if fp16 I/O are implemented. There is also some missing

Re: [Mesa-dev] [ANNOUNCE] mesa 20.0.3

no/ir3/ra: fix array liveranges util: fix u_fifo_pop() Samuel Pitoiset (7): radv/gfx10: fix required subgroup size with VK_EXT_subgroup_size_control radv/gfx10: fix required ballot size with VK_EXT_subgroup_size_control radv: fix optional pSizes parameter when bindi

Re: [Mesa-dev] [ANNOUNCE] Mesa 20.0 branchpoint planned for 2020/01/29, Milestone opened

On 1/28/20 8:46 PM, Dylan Baker wrote: Quoting Dylan Baker (2020-01-22 10:27:05) Hi list, due to some last minute changes in plan I'll be managing the 20.0 release. The release calendar has been updated, but the gitlab milestone wasn't opened. That has been corrected, and is here

Re: [Mesa-dev] 12.0 release?

, Samuel Pitoiset wrote: If we can wait end of january that would be highly appreciated :-) On 1/15/20 5:13 PM, Jason Ekstrand wrote: When were we planning to cut the 20.0 release?  We just landed Vulkan 1.2 support for ANV and RADV this morning so it seems like a good time to me.  The release

Re: [Mesa-dev] 12.0 release?

If we can wait end of january that would be highly appreciated :-) On 1/15/20 5:13 PM, Jason Ekstrand wrote: When were we planning to cut the 20.0 release?  We just landed Vulkan 1.2 support for ANV and RADV this morning so it seems like a good time to me.  The release calendar has nothing for

Re: [Mesa-dev] libdrm versioning - switch to 19.0.0?

LGTM It's easier to figure how old is a release with year based versioning. On 10/10/19 10:14 PM, Marek Olšák wrote: Hi, I expect to make a new libdrm release soon. Any objections to changing the versioning scheme? Current: 2.4.n n = starts from 0, incremented per release New proposals:

Re: [Mesa-dev] Switching to Gitlab Issues instead of Bugzilla?

+1 On 8/29/19 8:52 PM, Kenneth Graunke wrote: Hi all, As a lot of you have probably noticed, Bugzilla seems to be getting a lot of spam these days - several of us have been disabling a bunch of accounts per day, sweeping new reports under the rug, hiding comments, etc. This bug spam causes

Re: [Mesa-dev] Navi14 for 19.2

ACK. On 8/26/19 9:05 PM, Marek Olšák wrote: Hi, I'd like to push the Navi14 merge request to 19.2 no later than Tuesday August 27. https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1726 Please ack if it's OK with you, Thanks, Marek ___

[Mesa-dev] [PATCH v2] ac: fix exclusive scans on GFX8-GFX9

gfx10: implement scan & reduce operations" Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_llvm_build.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index 05871f5ea98..5abae00d8f6 100644

Re: [Mesa-dev] [PATCH] ac: fix exclusive scans on GFX8-GFX9

On 8/21/19 3:59 PM, Bas Nieuwenhuizen wrote: On Wed, Aug 21, 2019 at 3:45 PM Samuel Pitoiset wrote: This fixes a regression introduced with scan operations on GFX10. Note that some subgroups CTS still fail on GFX10 but I assume it's a different issue. This fixes dEQP-VK.subgroups.arithmetic

[Mesa-dev] [PATCH] ac: fix exclusive scans on GFX8-GFX9

s" Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_llvm_build.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index 05871f5ea98..d72eaa2db46 100644 --- a/src/amd/common/ac_llvm_build.c +++ b/

[Mesa-dev] [PATCH 2/2] radv/gfx10: do not use NGG with NAVI14

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 64bd0d64401..c049a2844b8 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c

[Mesa-dev] [PATCH 1/2] radv/gfx10: don't initialize VGT_INSTANCE_STEP_RATE_0

Only gfx9 and older use it to get InstanceID in VGPR1. Ported from RadeonSI. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/si_cmd_buffer.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index e37b9498a71

[Mesa-dev] [PATCH] radv: implement VK_AMD_shader_core_properties2

Trivial extension that matches PAL. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_device.c | 9 + src/amd/vulkan/radv_extensions.py | 1 + 2 files changed, 10 insertions(+) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index cc45ac95c08

[Mesa-dev] [PATCH] radv: allow to enable VK_AMD_shader_ballot only on GFX8+

Scans aren't implemented on SI/CIK. Cc: 19.2 Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_device.c | 3 ++- src/amd/vulkan/radv_shader.c | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index

[Mesa-dev] [PATCH 1/2] radv: add a new debug option called RADV_DEBUG=noshaderballot

Shader ballot will be enabled by default for Wolfenstein Youngblood. This follows what we did for sisched. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_debug.h | 1 + src/amd/vulkan/radv_device.c | 1 + 2 files changed, 2 insertions(+) diff --git a/src/amd/vulkan/radv_debug.h b/src

[Mesa-dev] [PATCH 2/2] radv: force enable VK_AMD_shader_ballot for Wolfenstein Youngblood

of some minor artifacts that only happens when ballot is disabled for some reasons. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_device.c | 8 1 file changed, 8 insertions(+) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 49518d43218..c04f6a27e82

[Mesa-dev] [PATCH 2/2] radv/gfx10: hardcode some depth+stencil formats in the format table

The script doesn't handle them correctly and D16_UNORM_S8_UINT isn't supported by the hardware, mark it as invalid. This fixes warning when generating gfx10_format_table.h. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111393 Signed-off-by: Samuel Pitoiset --- src/amd/vulkan

[Mesa-dev] [PATCH 1/2] radv/gfx10: tidy up gfx10_format_table.py

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/gfx10_format_table.py | 20 +--- 1 file changed, 9 insertions(+), 11 deletions(-) diff --git a/src/amd/vulkan/gfx10_format_table.py b/src/amd/vulkan/gfx10_format_table.py index 34ad5f6cdf2..81b0bed92aa 100644 --- a/src/amd

[Mesa-dev] [PATCH 2/2] radv/gfx10: do not emit PA_SC_TILE_STEERING_OVERRIDE twice

CLEAR_STATE emits it for us. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/si_cmd_buffer.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index a5057fe25a2..68ec925f2b5 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b

[Mesa-dev] [PATCH 1/2] radv: do not emit PKT3_CONTEXT_CONTROL with AMDGPU 3.6.0+

It's emitted by the kernel. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_device.c | 9 ++--- src/amd/vulkan/si_cmd_buffer.c | 9 ++--- 2 files changed, 12 insertions(+), 6 deletions(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index

[Mesa-dev] [PATCH] radv: fix image_has_{cmask,fmask}() helpers

10: add missing dcc_tile_swizzle tweak") Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_private.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 49d3c78db98..ee0761e69fe 100644 --- a/src/amd/vulkan/

[Mesa-dev] [PATCH 2/2] radv: remove radv_get_image_fmask_info()

It's unnecessary to duplicate fields in another struct. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_device.c | 12 - src/amd/vulkan/radv_image.c | 44 +++- src/amd/vulkan/radv_meta_clear.c | 12 ++--- src/amd/vulkan/radv_private.h

[Mesa-dev] [PATCH 1/2] radv: remove radv_get_image_cmask_info()

It's unnecessary to duplicate fields in another struct. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_device.c | 4 ++-- src/amd/vulkan/radv_image.c | 38 +--- src/amd/vulkan/radv_meta_clear.c | 11 + src/amd/vulkan/radv_private.h| 13

[Mesa-dev] [PATCH 1/2] radv: only account for tile_swizzle for color surfaces with DCC

It's 0 for depth surfaces with TC compat HTILE enabled. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_image.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index f3237dd5985..221b554e73e 100644

[Mesa-dev] [PATCH 2/2] radv/gfx10: add missing dcc_tile_swizzle tweak

Fixes: c90f46700dd ("radv/gfx10: mask DCC tile swizzle by alignment") Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_image.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 221b554e73e..8

[Mesa-dev] [PATCH 3/4] radv/gfx10: determine correct wave size when lowering subgroups

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_shader.c | 30 +- 1 file changed, 17 insertions(+), 13 deletions(-) diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 97fa80b348c..f0ab2d5e467 100644 --- a/src/amd/vulkan

[Mesa-dev] [PATCH 4/4] radv/gfx10: use the correct target machine for Wave32

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_llvm_helper.cpp | 30 + src/amd/vulkan/radv_shader.c| 3 ++- src/amd/vulkan/radv_shader_helper.h | 3 ++- 3 files changed, 26 insertions(+), 10 deletions(-) diff --git a/src/amd/vulkan

[Mesa-dev] [PATCH 1/4] radv/gfx10: add Wave32 support for fragment shaders

It can be enabled with RADV_PERFTEST=pswave32. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_debug.h | 1 + src/amd/vulkan/radv_device.c | 6 ++ src/amd/vulkan/radv_nir_to_llvm.c | 2 ++ src/amd/vulkan/radv_pipeline.c| 3 ++- src/amd/vulkan/radv_private.h | 1

[Mesa-dev] [PATCH 2/4] radv/gfx10: add Wave32 support for vertex, tessellation and geometry shaders

It can be enabled with RADV_PERFTEST=gewave32. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_debug.h | 1 + src/amd/vulkan/radv_device.c | 5 + src/amd/vulkan/radv_nir_to_llvm.c | 13 +++-- src/amd/vulkan/radv_pipeline.c| 10 +- src/amd/vulkan

[Mesa-dev] [PATCH 2/6] radv/gfx10: implement a bug workaround for NGG -> legacy transitions

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 14 ++ src/amd/vulkan/si_cmd_buffer.c | 9 +++-- 2 files changed, 21 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 37026246aa9

[Mesa-dev] [PATCH 5/6] radv/gfx10: remove an obsolete VGT_REUSE_OFF workaround

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 6 -- 1 file changed, 6 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 4d4f86a7e24..b3952846f43 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan

[Mesa-dev] [PATCH 4/6] radv/gfx10: disable LATE_ALLOC_GS on Navi14

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/si_cmd_buffer.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index 3d6c672dd0f..d48ed804e63 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd

[Mesa-dev] [PATCH 3/6] radv/gfx10: implement a bug workaround for GE_PC_ALLOC

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 17 - src/amd/vulkan/si_cmd_buffer.c | 13 + 2 files changed, 13 insertions(+), 17 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 5c913f29a5a

[Mesa-dev] [PATCH 1/6] radv: skip draw calls with 0-sized index buffers

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index e0ea47b5745..37026246aa9 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan

[Mesa-dev] [PATCH 6/6] radv/gfx10: implement a GE bug workaround

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 27 +++ 1 file changed, 23 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index b3952846f43..d62066cbee4 100644 --- a/src/amd/vulkan

[Mesa-dev] [PATCH] radv/gfx10: add Wave32 support for compute shaders

It can be enabled with RADV_PERFTEST=cswave32. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_debug.h | 1 + src/amd/vulkan/radv_device.c | 12 +++- src/amd/vulkan/radv_nir_to_llvm.c | 14 +- src/amd/vulkan/radv_pipeline.c| 3 ++- src/amd/vulkan

[Mesa-dev] [PATCH] radv/gfx10: only compile the GS copy shader on-demand

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 583b600dfdd..e11196bd82e 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan

Re: [Mesa-dev] [PATCH] radv/gfx10: do not use the fast depth or stencil clear bytes path

On 7/29/19 2:30 PM, Bas Nieuwenhuizen wrote: On Mon, Jul 29, 2019 at 2:20 PM Samuel Pitoiset wrote: On 7/29/19 2:15 PM, Bas Nieuwenhuizen wrote: On Mon, Jul 29, 2019 at 2:11 PM Samuel Pitoiset wrote: The HTILE masks seem to be different and so we need to rework that path. Just disabled

Re: [Mesa-dev] [PATCH] radv/gfx10: do not use the fast depth or stencil clear bytes path

On 7/29/19 2:15 PM, Bas Nieuwenhuizen wrote: On Mon, Jul 29, 2019 at 2:11 PM Samuel Pitoiset wrote: The HTILE masks seem to be different and so we need to rework that path. Just disabled for now and implement later. The HTILE masks are not different per amdvlk? Can you at least rework

[Mesa-dev] [PATCH] radv/gfx10: do not use the fast depth or stencil clear bytes path

The HTILE masks seem to be different and so we need to rework that path. Just disabled for now and implement later. This fixes rendering issues with vkmark and Wreckfest at least. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_meta_clear.c | 5 +++-- 1 file changed, 3 insertions(+), 2

[Mesa-dev] [PATCH] ac: do not crash when the buffer data format is invalid

This might happen when a pipeline doesn't define the vertex input state, so the buffer data format is 0 (aka INVALID). This fixes crashes when compiling some shaders on GFX10. Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_llvm_build.c | 1 + 1 file changed, 1 insertion(+) diff --git

[Mesa-dev] [PATCH] radv: implement VK_EXT_index_type_uint8

Natively supported on VI+. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 60 +++ src/amd/vulkan/radv_device.c | 6 src/amd/vulkan/radv_extensions.py | 1 + 3 files changed, 61 insertions(+), 6 deletions(-) diff --git a/src/amd

Re: [Mesa-dev] [PATCH] radv: Set correct metadata size for GFX9+.

Reviewed-by: Samuel Pitoiset On 7/25/19 4:55 PM, Bas Nieuwenhuizen wrote: Without correct size, radeonsi assumes the metadata is incorrect, which can and will cause issues. Since the metadata is really incorrect without the size, let us fix that. Fixes: e43cc3e3afc "radv/gfx9: handle

Re: [Mesa-dev] [PATCH] radv/gfx10: Disable DCC with scanout.

It's already disabled later in this function? On 7/25/19 4:34 PM, Bas Nieuwenhuizen wrote: (a) radv does not set the DCC fields required yet. (b) radeonsi just broke their DCC metadata. Fixes: f8b6c5a1a63 "radeonsi: rewrite si_get_opaque_metadata, also for gfx10 support" ---

Re: [Mesa-dev] [PATCH] radv/gfx10: use L2 for DMA copy/fill operations

On 7/25/19 3:39 PM, Bas Nieuwenhuizen wrote: r-b though it sounds like some of our cache flushes might be not ideal. Yes. On Thu, Jul 25, 2019 at 3:35 PM Samuel Pitoiset wrote: It's coherent and faster. GFX7-GFX9 should also support this but for now only uses L2 for GFX10 because it's

[Mesa-dev] [PATCH] radv/gfx10: use L2 for DMA copy/fill operations

-off-by: Samuel Pitoiset --- src/amd/vulkan/si_cmd_buffer.c | 16 1 file changed, 16 insertions(+) diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index 21a90cb2514..94f759139ee 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan

[Mesa-dev] [PATCH v2] radv/gfx10: fix intensity formats by setting ALPHA_IS_ON_MSB

This fixes dEQP-VK.rasterization.primitive_size.points.point_size_* This also fixes some black squares with the Sascha SSAO demo. v2: - do not set for multiple channels - call vi_alpha_is_on_msb() for pre-GFX10 - remove unused 'swap' Signed-off-by: Samuel Pitoiset --- src/amd/vulkan

[Mesa-dev] [PATCH] radv/gfx10: fix intensity formats by setting ALPHA_IS_ON_MSB

This fixes dEQP-VK.rasterization.primitive_size.points.point_size_* This also fixes some black squares with the Sascha SSAO demo. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_image.c | 15 ++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan

Re: [Mesa-dev] [PATCH 4/5] radv/gfx10: do not enable NGG if a pipeline uses XFB

On 7/23/19 9:31 PM, Bas Nieuwenhuizen wrote: On Tue, Jul 23, 2019 at 3:21 PM Samuel Pitoiset wrote: NGG GS for streamout requires a bunch of work, so enable it with the legacy path only for now. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 28

[Mesa-dev] [PATCH 1/5] radv/gfx10: update streamout descriptors

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 84d627340e9..c2e3f3b5fd0 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c

[Mesa-dev] [PATCH 3/5] radv/gfx10: emit streamout shader config

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_shader.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 5fd1022b05a..56f421026b7 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd

[Mesa-dev] [PATCH 4/5] radv/gfx10: do not enable NGG if a pipeline uses XFB

NGG GS for streamout requires a bunch of work, so enable it with the legacy path only for now. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 28 1 file changed, 28 insertions(+) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan

[Mesa-dev] [PATCH 5/5] radv/gfx10: enable VK_EXT_transform_feedback

When a pipeline uses transform feedback, the driver fallbacks to the legacy path because NGG support for streamout is a non-trivial amount of work. AMDVLK also uses the legacy path for streamout, while RadeonSI uses the new NGG path. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan

[Mesa-dev] [PATCH 2/5] radv/gfx10: declare streamout user SGPRs

Required for legacy streamout. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index cf73cdc692b..020c6d17771 100644 --- a/src/amd/vulkan

[Mesa-dev] [PATCH v3] radv/gfx10: fix VS input VGPRs with the legacy path

For some reasons, InstanceID is VGPR3 although StepRate0 is set to 1. v3: fix instanceID input VGPR for geometry v2: fix instanceID Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 12 +--- src/amd/vulkan/radv_shader.c | 8 ++-- 2 files changed, 15

[Mesa-dev] [PATCH v2] radv/gfx10: fix VS input VGPRs with the legacy path

For some reasons, InstanceID is VGPR3 although StepRate0 is set to 1. v2: fix instanceID Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 12 +--- src/amd/vulkan/radv_shader.c | 2 +- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/src/amd

Re: [Mesa-dev] [PATCH] radv/gfx10: fix VS input VGPRs with the legacy path

On 7/23/19 1:37 PM, Bas Nieuwenhuizen wrote: So does this work with tests that use multiple instances? Apparently no. If so, r-b. On Tue, Jul 23, 2019 at 1:29 PM Samuel Pitoiset wrote: Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 3 ++- 1 file changed, 2

[Mesa-dev] [PATCH] radv/gfx10: fix VS input VGPRs with the legacy path

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 336bae28614..9cea92e8a69 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b

[Mesa-dev] [PATCH] radv: fix dumping disassembly with RADV_DEBUG=shaders

Fixes: a20a9d0c5e7 ("radv: dont store disasm string unless keep_shader_info flag set") Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_shader.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shad

[Mesa-dev] [PATCH] radv/gfx10: enable CLEAR_state

It actually works. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_device.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 992e12840f7..93b03afda22 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src

Re: [Mesa-dev] [PATCH 2/2] radv/gfx10: correctly determine the number of vertices per primitive

On 7/22/19 6:01 PM, Ilia Mirkin wrote: On Mon, Jul 22, 2019 at 11:49 AM Samuel Pitoiset wrote: For TES as NGG. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 17 - 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan

[Mesa-dev] [PATCH 2/2] radv/gfx10: correctly determine the number of vertices per primitive

For TES as NGG. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 17 - 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 336bae28614..6e5a283f923 100644 --- a/src/amd

[Mesa-dev] [PATCH 1/2] radv/gfx10: reduce max_esverts_base to 128

Same as RadeonSI. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index a7ff0e2d139..fce60a62ee9 100644 --- a/src/amd/vulkan/radv_pipeline.c

[Mesa-dev] [PATCH] radv: fix crash in vkCmdClearAttachments with unused attachment

depth_stencil_attachment and/or ds_resolve attachment can be NULL. This fixes crashes with dEQP-VK.renderpass.suballocation.unused_clear_attachments.* Cc: 19.1 Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_meta_clear.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

Re: [Mesa-dev] [PATCH] ac/nir: fix txf_ms with an offset

Reviewed-by: Samuel Pitoiset On 7/19/19 9:17 PM, Rhys Perry wrote: Seems to fix some hair artifacts in Max Payne 3: https://github.com/daniel-schuermann/mesa/issues/76 Signed-off-by: Rhys Perry Fixes: f4e499ec791 ('radv: add initial non-conformant radv vulkan driver') --- src/amd/common

[Mesa-dev] [PATCH 4/7] radv/gfx10: do not set ELEMENT_SIZE for buffer descriptors

This field doesn't exist. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_device.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 6e313aa9aa1..3c553cb93e7 100644 --- a/src/amd/vulkan

[Mesa-dev] [PATCH 6/7] radv/gfx10: emit the GS NGG prologue before the nested barrier

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 7e623414adc..6feb55e3916 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c

[Mesa-dev] [PATCH 5/7] radv/gfx10: do not allocate space for the ZPASS_DONE bug

GFX10 isn't affected. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 14 -- 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index b6ac14f63a9..84d627340e9 100644 --- a/src/amd

[Mesa-dev] [PATCH 2/7] radv: change a bunch of >= GFX9 to == GFX9

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 6 +++--- src/amd/vulkan/radv_device.c | 2 +- src/amd/vulkan/radv_image.c | 10 +- src/amd/vulkan/si_cmd_buffer.c | 12 ++-- 4 files changed, 15 insertions(+), 15 deletions(-) diff --git a/src

[Mesa-dev] [PATCH 3/7] radv: clean up fill_geom_tess_rings()

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_device.c | 34 +- 1 file changed, 9 insertions(+), 25 deletions(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 15bda6822e8..6e313aa9aa1 100644 --- a/src/amd/vulkan

[Mesa-dev] [PATCH 7/7] radv/gfx10: update descriptors for inline uniform blocks

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 13 ++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 6feb55e3916..19dcae3a476 100644 --- a/src/amd/vulkan

[Mesa-dev] [PATCH 1/7] ac/nir: do not clamp shadow reference on GFX10

RadeonSI only uses Z32_FLOAT_CLAMP for upgraded depth textures on GFX10 and RADV doesn't promotes Z16 or Z24. Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_nir_to_llvm.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd

[Mesa-dev] [PATCH v2 1/3] radv/gfx10: move emitting VGT_PRIMITIVEID_EN into the NGG path

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 14 -- 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 9338fcd550a..bcb7ccc803d 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b

[Mesa-dev] [PATCH v2 3/3] radv/gfx10: set BREAK_WAVE_AT_EOI if TES or GS enable the primitive ID

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 8 1 file changed, 8 insertions(+) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index b11d79f4811..a7ff0e2d139 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan

[Mesa-dev] [PATCH v2 2/3] radv/gfx10: do not emit VGT_GS_MODE

Unnecessary. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index bcb7ccc803d..b11d79f4811 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan

Re: [Mesa-dev] [PATCH 4/4] radv/gfx10: do not always execute a barrier before the second shader

On 7/18/19 2:29 AM, Bas Nieuwenhuizen wrote: On Wed, Jul 17, 2019 at 3:44 PM Samuel Pitoiset wrote: With NGG, empty waves may still be required to export data. This fixes dEQP-VK.ycbcr.format.*_unorm.geometry_*. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 31

Re: [Mesa-dev] [PATCH 1/4] radv: move emitting VGT_GS_MODE into the HW VS path

On 7/18/19 2:10 AM, Bas Nieuwenhuizen wrote: On Thu, Jul 18, 2019 at 2:05 AM Bas Nieuwenhuizen wrote: On Wed, Jul 17, 2019 at 3:44 PM Samuel Pitoiset wrote: It's useless for NGG anyways. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 43

Re: [Mesa-dev] [PATCH] radv: fix crash in shader tracing.

Reviewed-by: Samuel Pitoiset On 7/18/19 2:51 AM, Dave Airlie wrote: From: Dave Airlie Enabling tracing, and then having a vmfault, can leads to a segfault before we print out the traces, as if a meta shader is executing and we don't have the NIR for it. Just pass the stage and give back

Re: [Mesa-dev] [PATCH] radv: reset the window scissor with no clear state.

Reviewed-by: Samuel Pitoiset On 7/18/19 3:20 AM, Dave Airlie wrote: From: Dave Airlie IF we don't have clear state (which gfx10 doesn't currently) we will fix to reset the scissor. AMDVLK will leave it set to something else. Marek also has this fix for radeonsi pending. --- src/amd/vulkan

Re: [Mesa-dev] [PATCH] radv: put back VGT_FLUSH at ring init on gfx10

Reviewed-by: Samuel Pitoiset On 7/18/19 8:14 AM, Dave Airlie wrote: From: Dave Airlie I can find no evidence that removing this is a good idea. Fixes: 9b116173b6a ("radv: do not emit VGT_FLUSH on GFX10") --- src/amd/vulkan/radv_device.c | 6 ++ 1 file changed, 2 insert

[Mesa-dev] [PATCH 4/4] radv/gfx10: do not always execute a barrier before the second shader

With NGG, empty waves may still be required to export data. This fixes dEQP-VK.ycbcr.format.*_unorm.geometry_*. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 31 ++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git a/src/amd

[Mesa-dev] [PATCH 1/4] radv: move emitting VGT_GS_MODE into the HW VS path

It's useless for NGG anyways. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 43 ++ 1 file changed, 33 insertions(+), 10 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index fdeb31c453e..686fd371f0f

[Mesa-dev] [PATCH 3/4] radv/gfx10: set BREAK_WAVE_AT_EOI if TES or GS enable the primitive ID

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 8 1 file changed, 8 insertions(+) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index de933937f03..8b6e62a75f5 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan

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