The HLASM LangRef is, as far as I can see, very explicit and clear about the
effect of the ICTL instruction on the COPY members, viz:
COPY Instruction: The ICTL instruction does not affect the format of statements
brought in by a COPY instruction or generated from a library macro definition.
T
.startCpxhdr
anop , 4
= mnote *,'alcsI 0061001d is &alcsId'
00611018 ** ASMA144E Begin-to-continue columns not blank -
mnote
Curses. These have been line-wrapped into oblivion. How do I stop the
listserv doing that?
i
On Wednesday, March 18, 2020, 03:50:59 PM GMT, Ian Worthington
<0c9b78d54aea-dmarc-requ...@listserv.uga.edu> wrote:
Worthington
<0c9b78d54aea-dmarc-requ...@listserv.uga.edu> wrote:
Curses. These have been line-wrapped into oblivion. How do I stop the
listserv doing that?
i
On Wednesday, March 18, 2020, 03:50:59 PM GMT, Ian Worthington
<0c9b78d54aea-dmarc-requ...@listserv.uga.edu> wrote:
Thanks Jonathan, much appreciated.
Still waiting on access approval to raise an official report for you.
Ian
On Friday, March 20, 2020, 11:38:10 AM GMT, Jonathan Scott
wrote:
Ref: Your note of Wed, 18 Mar 2020 17:58:43 +
Jonathan Scott wrote:
> The problem occurs on the target ins
Microfocus used to have one. It was good enough to get ALCS running on a PC.
There's a few open source projects. z390 and, of course, Hercules, spring to
mind. I think there's one built especially for education too, but its name has
long since slipped into the murky depths of what passes for m
Ah, IBM, we do so love you. If it was difficult to write, it should be
difficult to buy, right?
This, in the z/tpf docs, might provide a clue:
o For standard processors, order the IBM® High Level Assembler for Linux for
IBM Z Feature (5950) of IBM High Level Assembler for z/OS®, z/VM®, and z/
I loved bookmaster back in the day (though the script underpinnings, not so
much), never really found an adequate tool to replace it. Tried lyx for a bit
and was finally persuaded to use latex, but it's still not as productive as bm
was.
Anyone know what IBM uses these days?
Best wishes,
Ian
, November 15, 2021, 11:34:14 AM GMT-5, Paul Gilmartin
<0014e0e4a59b-dmarc-requ...@listserv.uga.edu> wrote:
On Nov 15, 2021, at 08:38:32, Ian Worthington wrote:
>
> I loved bookmaster back in the day (though the script underpinnings, not so
> much), never really found an a
ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: z/Architecture Principles of Operation pdf
On Nov 15, 2021, at 08:38:32, Ian Worthington wrote:
>
> I loved bookmaster back in the day (though the script underpinnings, not so
> much), never really found an adequate tool to replace it. Tried
a Linux machine instead.
-----Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Ian Worthington
Sent: Monday, November 15, 2021 11:16 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: z/Architecture Principles of Operation pdf
Have you considered running a zPDT system, or get
Isn't CDZ2 a crypto instruction?
Best wishes,
Ian ...
On Thursday, December 9, 2021, 09:31:03 AM GMT-5, esst...@juno.com
wrote:
.
Anyone familiar with or hreard of a CDZ2 or CDT2 Assembler instruction ?
A GOOGLE search did not provide any fruitful information.
Why would an applicati
: IBM Mainframe Assembler List [ASSEMBLER-LIST@LISTSERV.UGA.EDU] on behalf
of Ian Worthington [0c9b78d54aea-dmarc-requ...@listserv.uga.edu]
Sent: Thursday, December 9, 2021 9:52 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: CDZ2 Instruction
Isn't CDZ2 a crypto instruction?
Best wi
I noticed today that GCC generates for:
static __uint32_t sumu32; // unsigned int
static __uint64_t sumu64; // unsigned long
void addStuff(__uint64_t a64, __uint64_t b64, __uint32_t a32, __uint32_t b32 ) {
sumu32 = a32 + b32;
sumu64 = a64 + b64;
}
the following:
117: sumu32 = a
...
On Thursday, April 14, 2022, 06:29:42 PM GMT+2, Ngan, Robert (DXC Luxoft)
wrote:
STRL/STGRLl?
Is the GCC compiler generating non-reentrant code?
Robert Ngan
DXC Luxoft
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Ian Worthington
Sent: Thursday
Both signed and unsigned integer operations are required to either wrap or give
undefined results in C. To my mind this is a horrible problem which gets
kicked down the road by the expansion of the size of variable size every few
years, presumably accompanies by the sacrificing of farmyard anim
extension is an issue, e.g., adding a
word to a grande register..
--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3
From: IBM Mainframe Assembler List [ASSEMBLER-LIST@LISTSERV.UGA.EDU] on behalf
of Ian Worthington [0c9b78d54aea-dmarc-requ...@l
Noticed today that the GCC C compiler generated an unexpected sequence of
instructions for an AND and TEST:
bool overflow = (ccpm & carrybit) != 0; // check if carry bit set
109 .loc 1 189 0
110 0078 5810B25C l %r1,604(%r11) # D.7949, ccpm
111 007
of the N operation would stay zero
throughout the LPR / LCR sequence, and the SRL would move
a zero bit in the rightmost bit position.
The final STC moves the rightmost 8 bits to the bool variable;
bool (no C standard type) is probably a typedef which means char.
I hope, I understood the coding
> C programmers don't give a damn about overflows. An unfortunate consequence,
> probably, of hardware architectures which, unlike 360, lack unsigned
> instructions, forcing compilers to generate signed instructions for
> unsigned operations.
I've spent more of the last week finding out more abou
That's a great explanation Thomas.
I'm curious though: how come both compilers produce this same sequence of
instructions? I'd have thought it was a rather obscure combination. Is it
perhaps more common than I'd suspected, or do GCC and Dignus have some common
heritage in the back end?
Best
Whilst looking at reliable techniques to detect signed and unsigned overflow in
integer multiplication I was checking out the late John Erhman's "Assembler
Language Programming for IBM System z™ Servers" in which I discovered he
presented this problem and solution:
18.2.13.(2)+ A programmer want
From: IBM Mainframe Assembler List [ASSEMBLER-LIST@LISTSERV.UGA.EDU] on behalf
of Ian Worthington [0c9b78d54aea-dmarc-requ...@listserv.uga.edu]
Sent: Wednesday, April 20, 2022 9:46 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Detection of integer overflow
Whilst looking at reliable techniques
I believe that to be standards compliant unsigned integers are /required/ to
wrap without warning.
Signed integers can do whatever they want, including, in the final resort, even
behaving sensibly.
Best wishes / Mejores deseos / Meilleurs vœux
Ian ...
On Thursday, April 21, 2022, 02:55
a59b-dmarc-requ...@listserv.uga.edu> wrote:
On Apr 21, 2022, at 06:59:33, Ian Worthington wrote:
>
> I believe that to be standards compliant unsigned integers are /required/ to
> wrap without warning.
>
That's true but irrelevant.
> Signed integers can do whatever the
My assumption is that these instructions are, or at least were, implemented in
hardware gates, so these "boundary conditions" are likely to be mechanistic in
nature rather then implemented via "if it's a funny number then do this
different thing" programming.
We sat down the other day and confi
Non-reentrant programming is /required/ for some platforms -- TPF, ALCS, (and,
I would suspect, CICS?) Many programmers /only/ learn non-reentrant
programming.
I would very much approve of the idea of starting with the simple stuff first:
which in my book would be baseless, non-reentrant progra
I noticed today that
ALSIH R1,I2
has a partner-in-crime
ALSIHN R1,I2
which differs only, as far as I can tell, in that the later does not set the
condition code.
I'm curious what the need was for a distinct instruction to do the second.
Anyone know?
Best wishes / Mejores deseos / Meill
It seems that bit.listserv.ibm-main may have died, at at least have next to
zero traffic, which amounts to the same thing.
Anyone here know of a suitable replacement for z architectural questions?
Best wishes / Mejores deseos / Meilleurs vœux
Ian ...
.
On Tuesday, November 22, 2022 at 02:46:44 PM GMT+1, Steve Smith
wrote:
IBM-MAIN has plenty of traffic, shows no sign of slowing down.
sas
On Tue, Nov 22, 2022 at 5:00 AM Ian Worthington <
0c9b78d54aea-dmarc-requ...@listserv.uga.edu> wrote:
> It seems that bit.listserv.ibm
https://listserv.ua.edu/cgi-bin/wa?A0=IBM-MAIN
And yes, you have to register and login to see the archive.
Peter
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Ian Worthington
Sent: Tuesday, November 22, 2022 8:58 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: R
Iirc, you just put it in quotes? Away from the office now so can't check.
I
Sent from Yahoo Mail on Android
On Thu, 29 Dec 2022 at 13:17, Ze'ev
Atlas<01774d97d104-dmarc-requ...@listserv.uga.edu> wrote: Does any of you
know how how to put a lower case character in the PARM field of JC
Can you show us what you've got?
I
Sent from Yahoo Mail on Android
On Thu, 29 Dec 2022 at 13:23, Ze'ev Atlas wrote: nope,
it is already bracketed with quotes
Ze'ev Atlas
On Thursday, December 29, 2022 at 01:21:00 PM EST, Ian Worthington
<0c9b7
Is this correct? My understanding is that the source is still available but
now only to customers in order to prevent downstream suppliers from using rhel
as their base.
Of course I've slept since I saw this discussion so caveat emptor...
Best wishes / Mejores deseos / Meilleurs vœux
Ian ...
> Java was a language looking for a purpose.
Java was a language designed for set top boxes
Best wishes / Mejores deseos / Meilleurs vœux
Ian ...
On Wednesday, July 19, 2023 at 03:24:34 PM GMT+2, Rick Troth
wrote:
On 7/18/23 19:30, Paul Gilmartin wrote:
>> *Java was a language loo
html
--
Tom Marchant
On Wed, 19 Jul 2023 07:03:05 +, Ian Worthington wrote:
>Is this correct? My understanding is that the source is still available but
>now only to customers in order to prevent downstream suppliers from using rhel
>as their base.
>Of course I've slept s
thheld their changes to GCC?
--
Tom Marchant
On Wed, 19 Jul 2023 19:35:09 +0000, Ian Worthington wrote:
>That's what I had though, but apparently it's not correct. In fact, for many
>years IBM has withheld its own changes to GCC for private sale to its own
>customers, apparently quite legally.
ally known as
"Linux", although Linux is actually just the kernel) is licensed under GPL v3
https://www.gnu.org/licenses/gpl-3.0.en.html
--
Tom Marchant
On Wed, 19 Jul 2023 07:03:05 +, Ian Worthington wrote:
>Is this correct? My understanding is that the source is still ava
Marchant
<00a69b48f3bb-dmarc-requ...@listserv.uga.edu> wrote:
Do you have evidence that IBM has withheld their changes to GCC?
--
Tom Marchant
On Wed, 19 Jul 2023 19:35:09 +, Ian Worthington wrote:
>That's what I had though, but apparently it's not correct. In fact, for many
> Indeed! And the generated code between opt(0) and opt(3) is so different,
> it's hard to believe it's doing the same thing, yet it is. It's impressive as
> hell. In the one compute-intensive case that we measured, unoptimized used
> half again as much CPU.
In fact it convinced me that we shou
work
are being offered to the general public at no charge under subsection 6d.
--
Tom Marchant
On Wed, 19 Jul 2023 20:42:52 +, Ian Worthington wrote:
>Yes.. But, as I said, I believe that they are allowed to do so.
>
>
>Best wishes / Mejores deseos / Meilleurs vœux
>
>Ian
$2,500 per user though.
Best wishes / Mejores deseos / Meilleurs vœux
Ian ...
On Friday, October 6, 2023 at 04:01:14 AM GMT+2, Gary Weinhold
wrote:
Interskill has courses that IBM gives badges for:
https://interskill.com/ibm-credentials/ibm-badges/
I don't really know anything abo
I believe it might be at
http://zseries.marist.edu/enterprisesystemseducation/assemblerlanguageresources/Assembler.V2.alntext%20V2.00.pdf
but my connection is apparently glacial this morning and I can't verify it.
Failing that, search for:
https://www.google.com/search?q=erhman+pdf+%22Assembler+
Maybe then something like https://punctiliousprogrammer.com/the-video-course/ ?
Best wishes / Mejores deseos / Meilleurs vœux
Ian ...
On Friday, October 6, 2023 at 02:54:39 PM GMT+2, Seymour J Metz
wrote:
I'm looking for an actual class, or at least a course outline and exercises?
We have some programs that need to support Y ops. I was planning to just
switch the whole product to assemble with optable(yop) but I found PJ30456
which includes the unsettling comment:
New instructions must be assembled using the YOP instruction set on LINUX
HLASM. The rest of the system is ass
Now that brings back some memories. iirc it was significantly easier to debug
macros under pc370 than hlasm, though the exact reasons I must admit I've
forgotten.
I think it was also available for OS/2, for which one of our esteemed
colleagues modified ALCS to assemble under.
Best wishes / Me
I have a dim and distant memory that the Hercules folks might be on top of this
as, iirc, isn't is possible to change hardware level with a configuration
parameter?
Best wishes / Mejores deseos / Best wishes
Ian ...
On Wednesday, March 20, 2024 at 10:12:03 PM GMT+1, Mark Hammack
wrot
> However, that's not how IBM works.
Now isn't that just the truth?
We identified a missing essential feature in an IBM product recently, coded up
a solution, and sent it in a PMR to the owners.
You can guess their response.
IBM is like the man from Del Monte's evil twin.
Best wishes / Mejores des
Nice reference. That was the first that came to my mind too.
Though the word appears to predate Neale by some 5 centuries:
https://www.etymonline.com/word/yonder
Best wishes / Mejores deseos / Meilleurs vœux
Ian ...
On Monday, July 1, 2024 at 12:55:41 PM GMT+2, Colin Paice
wrote:
49 matches
Mail list logo
