Re: Next instruction needed

Conceptually,the MVCL instruction could treat cases that specified the same register pair for source and target operands as a request to clean or fill the designated storage area. Keven Sent from my iPhone > On Apr 15, 2022, at 13:54, Mike Hochee wrote: > > I apparently stopped reading

Re: Testing address validity

There’s no way to avoid an ABEND unless you use FRR, ARR,ESTAE etc. or unless your thread of execution has some explicit or implicit lock on the virtual storage. There’s no “safe “ instruction that serves you purpose. The archives are replete with discussions on this topic IIRC Regards,

Re: ZAP to expand remainder

The second operand must end on or after the end (last byte) of the first operand for correct results. Regards Keven > On Jan 26, 2022, at 11:45, Frank M. Ramaekers > wrote: > > Will this instruction work? > > ZAP WKPACK,WKPACK+(L'WKPACK-L'KDAYSQC) Expand remainder > > In

Re: SHI instruction

Simpler still: Just code the AHI instruction with a negated argument. Keven > On Dec 20, 2021, at 13:57, Alan Atkinson wrote: > > Which is just what we did - but turned it onto a macro. > > MACRO > SHI , SUBTRACT HALFWORD IMMEDIATE > AHI ,-() >

Re: Strange macro expansion error

Maybe it’s the extra apostrophe on the $T attribute comparison? Keven > On Nov 15, 2021, at 09:28, Tony Thigpen wrote: > > I have a macro that works right when the the following code is actually > 'executed': > > SETC '' > AIF ('' EQ '0').LOPORTOK > AIF (T'' NE

Re: A question about an Authorizing PC Service Routine

Hi Paul Yes, anybody can call this PC and it will branch to the address in R1 with Psw Key 0. The target code probably is expected to issue a PR to return to the instruction following the PC . The System is basically compromised and unsecured Regards, Keven Hall > On Oct 30, 2021, at

Interlocked Acess Facility 2

 Based on my reading of the description of the Interlocked Access Facility 2, I'm led to assume that the following code paths are functionally equivalentt in a multi-threaded/mutli-processing application. If I assume in error, please feel at liberty to point out my folly. Regards, Keven

Re: A Tale of Interleaving WTO messages

Do both routines use branch-entry linkage to WTO? Is there a particular reason for using branch-entry in the function routine? Keven > On Mar 3, 2021, at 17:09, esst...@juno.com wrote: > > Hello, > . > I need to understand why messages written to the JOB LOG, are > *NOT* displayed in the

Re: TBEGINC question

Pretty sure that this constraint is related to cache-size and that your code can cross a page boundary. Code of any length could potentially cross a page boundary so if that were an actual constraint it would be explicitly stated without associating it with a particular byte-length. Keven >

Re: Relocatable immediate values

Echoing Binyamin’s post, why is this not simply flagged by the assembler? Assuming it’s valid code, Is the result of its execution to put the section offset of MYLABEL in the low half of R3 (leaving the high half unaltered)? Keven > On Nov 24, 2020, at 00:06, Binyamin Dissen wrote: > >

Re: CATTR and XATTR

eem to me that if CATTR segregates the code I should be able to > dine how put the external reference for CSR4BLD in that class > > Thanks > > > >> On Nov 22, 2020, at 10:01 PM, Keven Hall wrote: >> >> If your SRB code needs to be in common storage,

Re: CATTR and XATTR

If your SRB code needs to be in common storage, maybe an better solution might be to put it in a separate module and issue a global or a directed LOAD (according to your requirements for module persistence) to put it there. That will also obviate any need to adjust AdCons during relocation

Re: Reversed string macro

Would not L/ST be faster than 4-MVIs? Most every control-block I’ve seen bearing an eye-catcher is Fullword aligned in storage which makes for optimal execution. Keven > On Oct 24, 2020, at 16:57, Tony Thigpen wrote: > > I was thinking that the MVI would be some sort of special

Re: Snap Macro Assembler error ? Here it is thanks

I noticed this benign cyst of codein the SNAPX macro. Obviously this has no effect on code generation but executing it a few million times per day could really chew up some cycles. YMMV .CKLFORM ANOP AIF ('' NE 'L').ARND AIF ('' EQ '').ARND .ARND ANOP Keven ---Original

Re: Dynalloc (was Macro processor)

trust the sender and know the content is safe. Keven, As I said before, I wanted to know why it's not considered an exposure now. I'm not interested in convincing anyone it's an exposure because it won't help to answer my question.  Jon.     On Saturday, December 23, 2017 8:48 PM, Keven

Re: Dynalloc (was Macro processor)

Jon,It seems to me that what you’re saying is that if one works in a badly run z/OS shop with unprotected UserIDs and unscrupulous employees who share their user credentials then that might result in a security exposure.  In

Re: Any real need for sequence numbers in 73-80 any more?

I fail to see how sequence numbers make editing easier or how they make finding/fixing errors easier.I’m pretty certain that HLASM error messages are unambiguous in the way they indicate the provenance of problematic source

Re: Question about CPUs

; > Nope. I give up. You are of course free to believe whatever you wish. Just > please do not write any kernel code. > > Charles > > > -Original Message- > From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] > On Behalf Of Keven Hal

Re: Question about CPUs

Other than for SIGP I can't off the top of my head think of a suituation where one processor interrupts another explicitly during instruction execution. Can you provide some specific details as to what "interruptible" means here? Keven > On Jul 31, 2017, at 21:45, Charles Mills

Re: Table Searchig with a Mask

Pretty sure Jeffrey is referring to storage patterns defined by invoking the REFPAT macro (or HLL equivalent) Keven > On Jun 21, 2017, at 08:14, Tom Marchant > <00a69b48f3bb-dmarc-requ...@listserv.uga.edu> wrote: > >> On Wed, 21 Jun 2017 06:11:23 -0500, Jeffrey Celander wrote: >> >> If

Re: Table Searchig with a Mask

I think the OP's data is unsorted, so regardless of the answer, the question may be moot here Keven > On Jun 18, 2017, at 18:32, Richard Kuebbing wrote: > > Is a binary search ever appropriate on machines like the Z where the penalty > for not being in the cache is so

Re: Quick error termination of an assembler routine (Was: Performance of Decimal Floating Point Instruction)

Regarding code like: > BZNOERROR (If RC==0.) > DCX'00',C'You shouldn'ta done that.' I'd suggest documenting the error in source code rather than the instruction cache (or using a 1-byte numeric error code. Possibly I'm being pedantic. For sure I'm dragging this thread

Re: Rif: Re: CONVTOD Help

Taking no chances with the second Program Return, eh? K3n > On Apr 11, 2017, at 02:38, aldo.cro...@csebo.it wrote: > > > example Cobol program that calls a routine. > the routine returns a field containing two subfields (binary of 64 bits) > that contain the seconds since 01.01.1972 (the

Re: How to automatically position generated data areas after all program-defined areas

Peter, If the END assembler directive is one that can be redefined, you could write your own END macro that inserts any required data areas and generates an _END (or whatever it is that END was redefined as). Keven > On Mar 17, 2017, at 12:29, Farley, Peter x23353

Re: CSA Monitor

I was assuming that there's already a macro or function call that handles accesses to the common storage and that a modification of same would be required in order to have a recovery environment established. Also, the statement regarding accessing page-protected storage seems to imply that

Re: Would ISGQUERY be the proper macro/service

I think you'll need to specify a QNAME of SYSVSAM for your purposes;. SYSDSN might not work for VSAM. You might want to experiment a little to make sure. Keven > On Feb 15, 2016, at 07:52, esst...@juno.com wrote: > > Thanks Mars looks like a good starting point. > > >