We don't need to recompute the entire liveness information for
all cases. This is a preparation patch for further phi copy
optimization.
Signed-off-by: Zhigang Gong
---
backend/src/ir/liveness.cpp | 33 +
backend/src/ir/liveness.hpp | 7 +++
2 files ch
n the current directory, beignet
will not find it.
2. Even if the probram add a "-I." option manually, beignet will search /tmp
firstly, and if there is a .h file in /tmp/ with the eaxct same file
name, beignet will the file located in /tmp.
Signed-off-by: Zhigang Gong
---
back
Pushed, thanks.
On Thu, Aug 13, 2015 at 08:20:44AM +, Song, Ruiling wrote:
> LGTM
>
> > -Original Message-
> > From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of
> > Guo Yejun
> > Sent: Thursday, August 13, 2015 3:35 AM
> > To: beignet@lists.freedesktop.org
> >
gang
> Subject: Re: [Beignet] [PATCH 4/4] GBE: a potential bug in instruction
> scheduling.
>
>
>
> Luo Xionghu
> Best Regards
>
> -Original Message-
> From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of
> Zhigang Gong
>
We need to test large image 1d buffer read and write testing.
Signed-off-by: Zhigang Gong
---
kernels/image_1D_buffer.cl | 11 ++-
utests/image_1D_buffer.cpp | 73 ++
2 files changed, 32 insertions(+), 52 deletions(-)
diff --git a/kernels
Need to take care of the uniform cases.
Signed-off-by: Zhigang Gong
---
backend/src/backend/gen_insn_selection.cpp | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/backend/src/backend/gen_insn_selection.cpp
b/backend/src/backend/gen_insn_selection.cpp
index b84bb4b
ENDIF should be treated as barrier-like instruction
in instruction scheduling.
Signed-off-by: Zhigang Gong
---
backend/src/backend/gen_insn_scheduling.cpp | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/backend/src/backend/gen_insn_scheduling.cpp
b/backend/src/backend
We should treat it as a 2D image as image 1d buffer may be
exceed the 1D image size restrication.
Signed-off-by: Zhigang Gong
---
backend/src/libocl/src/ocl_image.cl | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/backend/src/libocl/src/ocl_image.cl
b/backend
LGTM, thx.
> -Original Message-
> From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of
> xionghu@intel.com
> Sent: Thursday, August 6, 2015 3:58 PM
> To: beignet@lists.freedesktop.org
> Cc: xionghu@intel.com
> Subject: [Beignet] [PATCH] libocl: fix degrees func
> -Original Message-
> From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of
> Yang, Rong R
> Sent: Wednesday, August 5, 2015 1:05 PM
> To: Zhigang Gong; Luo, Xionghu
> Cc: beignet@lists.freedesktop.org
> Subject: Re: [Beignet] [PATCH v2] GetEve
ad to solve this
problem.
Thanks,
Zhigang Gong.
> -Original Message-
> From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of
> Yang, Rong R
> Sent: Wednesday, August 5, 2015 11:38 AM
> To: Zhigang Gong; Luo, Xionghu
> Cc: beignet@lists.freede
) then it
will cause
functional error, I will agree that we need both patches. Even though xionghu's
patch need to refine the commit log message, as it is not to fix
GetEventProfilingInfo()
issue.
Thanks,
Zhigang Gong.
> -Original Message-
> From: Beignet [mailto:beignet-bou
when calling to
clGetEventProfilingInfo(). The patch is as below,
From a5a1b3f372d17f26cc20fba078490b61614f07e5 Mon Sep 17 00:00:00 2001
From: Zhigang Gong
Date: Tue, 4 Aug 2015 13:21:27 +0800
Subject: [PATCH] runtime: always try to update event status in
clGetEventProfilingInfo().
Some applications forgot to call
That's great. Thanks for the feedback.
> -Original Message-
> From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of
> Gerald Baier
> Sent: Friday, July 17, 2015 4:46 PM
> To: Yang, Rong R; Zhigang Gong; 'Gerald Baier'; He, Ju
Thanks for the testing, but my latest patch is still under review, could you
apply it manually and try again?
The patch is at
http://lists.freedesktop.org/archives/beignet/2015-July/005871.html.
Thanks,
Zhigang Gong.
> -Original Message-
> From: Beignet [mailto:beigne
bugzilla and describe how to reproduce
the issue. The bugzilla link is as below:
https://bugs.freedesktop.org/enter_bug.cgi?product=Beignet
Thanks,
Zhigang Gong.
> -Original Message-
> From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of
> Gerald Baier
> Se
eignet-boun...@lists.freedesktop.org] On Behalf Of
> Zhigang Gong
> Sent: Thursday, July 16, 2015 12:48 PM
> To: beignet@lists.freedesktop.org
> Cc: Zhigang Gong
> Subject: [Beignet] [PATCH 2/2] Remove deprecated function
> cl_context_get_static_kernel().
>
> Also fix a spel
This patch fixed two thread-safe bugs in the builtin-kernel
usage code path.
1. The builtin kernel array itself need to be protected.
2. Each caller need to get a dup of the builtin kernel,
rather than share the same kernel structure.
Signed-off-by: Zhigang Gong
---
src/cl_context.c | 22
Also fix a spelling bug - s/internel/internal.
Signed-off-by: Zhigang Gong
---
src/cl_context.c | 73 +---
src/cl_context.h | 2 +-
2 files changed, 12 insertions(+), 63 deletions(-)
diff --git a/src/cl_context.c b/src/cl_context.c
index
for both atomic in L3 and SLM not working case.
v2:
shold set the atomic test result before the second round SLM test.
Signed-off-by: Zhigang Gong
---
src/cl_device_id.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/src/cl_device_id.c b/src/cl_device_id.c
From: Zhigang Gong
last_event and current_event should be thread private data.
Signed-off-by: Zhigang Gong
---
src/cl_api.c | 2 +-
src/cl_command_queue.c | 17 +++--
src/cl_command_queue.h | 2 --
src/cl_event.c | 18 +-
src/cl_thread.c
Please ignore this version as I forgot to remove the debug message.
Just sent out the version 2.
Thanks,
Zhigang Gong.
On Wed, Jul 15, 2015 at 08:54:33AM +0800, Zhigang Gong wrote:
> From: Zhigang Gong
>
> last_event and current_event should be thread private data.
>
> Signed-
From: Zhigang Gong
Signed-off-by: Zhigang Gong
---
src/cl_api.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/cl_api.c b/src/cl_api.c
index 9fdf526..7c91062 100644
--- a/src/cl_api.c
+++ b/src/cl_api.c
@@ -2983,6 +2983,7 @@ clEnqueueNDRangeKernel(cl_command_queue command_queue
From: Zhigang Gong
last_event and current_event should be thread private data.
Signed-off-by: Zhigang Gong
---
src/cl_api.c | 4 +++-
src/cl_command_queue.c | 18 --
src/cl_command_queue.h | 2 --
src/cl_event.c | 18 +-
src/cl_thread.c
for both atomic in L3 and SLM not working case.
Signed-off-by: Zhigang Gong
---
src/cl_device_id.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/src/cl_device_id.c b/src/cl_device_id.c
index f995550..b788137 100644
--- a/src/cl_device_id.c
+++ b/src
Nice catch, LGTM, thanks.
On Fri, Jun 12, 2015 at 09:10:00AM +0800, xionghu@intel.com wrote:
> From: Luo Xionghu
>
> need minus one when fill '\0' to sizeof char type array.
>
> Signed-off-by: Luo Xionghu
> ---
> src/cl_extensions.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
LGTM, thanks.
On Mon, Jun 08, 2015 at 03:19:47PM +0800, xionghu@intel.com wrote:
> From: Luo Xionghu
>
> serial, loop and if pattern match from top to down.
>
> v2: remove recursive sort since the blocks are in order already, just
> copy it from Function;
> add comments to explain the patte
Thanks for the careful review comment. Just fixed it and pushed.
On Tue, Jun 02, 2015 at 06:29:41AM +, Song, Ruiling wrote:
> > if ((regSize == ctx.getSimdWidth()/8 * GEN_REG_SIZE && family ==
> > ir::FAMILY_DWORD)
> > - || (regSize == 2 * ctx.getSimdWidth()/8 * GEN_REG_SIZE &
LGTM, pushed.
Thanks,
Zhigang Gong.
On Tue, Jun 02, 2015 at 03:26:28PM +0800, Ruiling Song wrote:
> The idea is create two additional array for holding
> pointer-base and bti.
>
> v2:
> When pointer operand is exactly the pointer origin, we do not
> insert into pointer
It seems that this patch cause one regression in the unit test cases.
You can reproduce it as below:
utests/utest_run compiler_local_slm
Thanks,
Zhigang Gong.
On Thu, May 21, 2015 at 04:39:05PM +0800, Ruiling Song wrote:
> The idea is create two additional array for holding
> pointer-ba
The patchset LGTM, will push latter.
Thanks,
Zhigang Gong.
On Mon, Jun 01, 2015 at 09:43:06AM +0800, Ruiling Song wrote:
> Signed-off-by: Ruiling Song
> ---
> backend/src/backend/gen75_encoder.cpp | 2 +-
> backend/src/backend/gen8_encoder.cpp | 2 +-
> 2 files changed, 2 i
LGTM, pushed, thanks.
On Thu, May 21, 2015 at 11:31:21AM +0800, Yang Rong wrote:
> If use arg as non add instruction's source directly, for example phi and
> selection, there is no add, just skip it.
>
> Signed-off-by: Yang Rong
> ---
> backend/src/ir/lowering.cpp | 1 +
> 1 file changed, 1 in
unecessary complexity, this patch is to gather the
partially writting registers and don't put these register to
spill candidate set.
Signed-off-by: Zhigang Gong
---
backend/src/backend/gen_insn_selection.cpp | 45 +++---
backend/src/backend/gen_insn_selection.hpp | 2 ++
ba
Beignet supports loop unrolling. We use the LLVM LoopUnrollPass
to do the unrolling. And the Clang's unrolling pragma is supported
in beignet.
On Thu, May 21, 2015 at 01:14:13PM +0200, Stojan Dimitrovski wrote:
> Hi,
>
> Does the Beignet compiler support loop unrolling, if so what are the
> spec
.
v2:
fix the error in examples/CMakeLists.txt.
Signed-off-by: Zhigang Gong
---
examples/CMakeLists.txt | 12 ++--
utests/CMakeLists.txt | 4 ++--
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/examples/CMakeLists.txt b/examples/CMakeLists.txt
index 904f259..2c13eac
.
Signed-off-by: Zhigang Gong
---
examples/CMakeLists.txt | 8
utests/CMakeLists.txt | 4 ++--
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/examples/CMakeLists.txt b/examples/CMakeLists.txt
index 904f259..3dc5e24 100644
--- a/examples/CMakeLists.txt
+++ b/examples
Thanks for the test. And as the patchset works fine, I will push it firstly.
And you may consider to merge your local work based on this patchset to reduce
the self-test overhead.
Thanks,
Zhigang Gong.
On Mon, May 18, 2015 at 06:01:06AM +, Luo, Xionghu wrote:
> I've tested this pat
Thanks for the patches. The whole patch set LGTM. I will push them latter
Actually xionghu is doing very similar thing and will submit patch to record
the self-test
result some where in the system such as $HOME/.config/beignet/beignetrc with
the kernel
tag. Then we can avoid duplciate testing on
I already pushed it. Thanks.
On Mon, May 18, 2015 at 06:44:26AM +, Song, Ruiling wrote:
> Yes, I include it in my patch, but it is good to make a separate patch for
> the fix.
> Looks good. Please merge it.
>
> Thanks!
> Ruiling
>
> > -Original Message-
> > From: Beignet [mailto:bei
Thanks for reporting this issue. We will contact gpuocelot team soon.
On Fri, May 15, 2015 at 6:44 AM, Rebecca N. Palmer
wrote:
> Since commit d47f6dd8f308323919d2acb0c1b9f562c084866c, beignet has
> included backend/src/ir/structural_analysis.* based on gpuocelot.
>
> gpuocelot's license was the
LGTM, will push latter. Thanks.
On Thu, Apr 30, 2015 at 11:49:48AM +0800, Ruiling Song wrote:
> Signed-off-by: Ruiling Song
> ---
> backend/src/backend/gen7_encoder.cpp | 1 -
> backend/src/backend/gen8_encoder.cpp | 1 -
> 2 files changed, 2 deletions(-)
>
> diff --git a/backend/src/backend/ge
LGTM, will push latter. Thanks.
On Thu, Apr 30, 2015 at 11:49:47AM +0800, Ruiling Song wrote:
> Signed-off-by: Ruiling Song
> ---
> backend/src/ir/immediate.hpp | 12 ++--
> backend/src/llvm/llvm_gen_backend.cpp | 2 +-
> 2 files changed, 7 insertions(+), 7 deletions(-)
>
> di
I will push latter. I'm a little bit worry
about whether and how it will impact the performance. We could do some
benchmark test latter, and if it hurts performance, we may need further
refine.
Thanks,
Zhigang Gong.
>this->nodes[index] = node;
> }
> // Con
This test case assume the SIMD width is 16 and will fail if we set SIMD width
to 8.
We need to make sure all utests could pass with both simd8 and simd16, please
fix this minor issue.
The other patches in this patch set LGTM.
Thanks,
Zhigang Gong.
On Tue, May 12, 2015 at 04:28:03PM +0800, Guo
> -Original Message-----
> From: Zhigang Gong [mailto:zhigang.g...@linux.intel.com]
> Sent: Tuesday, May 12, 2015 8:01 AM
> To: Guo, Yejun
> Cc: beignet@lists.freedesktop.org
> Subject: Re: [Beignet] [PATCH] add introduction to build Beignet with yocto
>
> Yejun thanks
hat: lower 5 bits indirect reg SubRegNum and
> +//the lower 5 bits of indirect imm SubRegNum cannot exceed 5 bits.
> +//So can't use AddrImm field, need a add.
> +p->ADD(offset, offset, GenRegister::immuw(baseRegOffset + immoffset));
We should not use offset as destinati
This patch LGTM, will push after the first 2 patches got merged.
Thanks,
Zhigang Gong.
On Mon, May 11, 2015 at 02:02:54PM +0800, Yang Rong wrote:
> 1. Enable compiler_argument_structure_indirect.
> 2. Add compiler_argument_structure_indirect, which has select address and
> load
REMOVE_INSN(add)
> REMOVE_INSN(loadImm)
Actually, we have the same issue for both add and loadImm. Considering those
instructions
will all be eliminated latter in instruction selction stage, we can live with
it currently.
This patch LGTM will push latter.
Thanks,
Zhigang Gong
>
Yejun thanks for the patch. It looks good, but it's better to
get some one help to test this method on Yocto.
On Mon, May 11, 2015 at 01:53:49PM +0800, Guo Yejun wrote:
> Signed-off-by: Guo Yejun
> ---
> docs/Beignet.mdwn| 2 +-
> docs/howto/cross-compiler-howto.mdwn | 75
>
0 MHz"
On Fri, May 08, 2015 at 12:27:30PM +0300, Nikita Orlov wrote:
> Hi!
>
> What is 1 EU?
>
> 08.05.2015, 12:24, "Zhigang Gong" :
> > The previous (0.8.0) count of compute units is incorrect. This issue has
> > been fixed
> > since
The previous (0.8.0) count of compute units is incorrect. This issue has been
fixed
since 0.9.0. Actually, now the unit of compute unit is 1 EU.
Thanks,
Zhigang Gong.
On Wed, May 06, 2015 at 06:52:58PM +0300, Nikita Orlov wrote:
> Hello!
>
> I have strange situation.
> Before, when
s and existing cl_gl sharing code in beignet. And
try to change it to use the above offical EGL extensions.
Thanks,
Zhigang Gong.
>
>
> best regards,
>
> Martijn Berger
> ___
> Beignet mailing list
> Beignet@lists.freede
Junyan,
I haven't found any new response to address this comment from Rong and me.
Do you miss this comment or do I miss your new patch?
Thanks,
Zhigang Gong.
On Thu, Apr 02, 2015 at 12:53:30PM +0800, Zhigang Gong wrote:
> Right, especially for those builtin function which don't c
o you have any suggestion here?
Thanks,
Zhigang Gong.
> -Original Message-
> From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of
> Andi Kleen
> Sent: Thursday, April 30, 2015 12:19 PM
> To: beignet@lists.freedesktop.org
> Cc: zhigang.g...@linux.intel
nd once we get the exact version, I will
submit a
new patch to give some warn if the user is using an unsupported kernel. As now
we
have better solution than patch kernel manually, I will change the document to
suggest
user to upgrade to a supported kernel rather than patch kernel manua
This works fine. Thanks.
On Wed, Apr 29, 2015 at 11:26:41AM +0100, Rebecca N. Palmer wrote:
> On 29/04/15 10:11, Zhigang Gong wrote:
> > Actually, almost all the patches you sent out have similar problem and
> > I had manually applied them line by line before. I think it's be
On Wed, Apr 29, 2015 at 11:07:04AM +0100, Rebecca N. Palmer wrote:
> On 29/04/15 08:54, Zhigang Gong wrote:
> >The patch LGTM too, but the patch seems broken for me, could you check
> >and send a new version?
> Don't know what's wrong with this one: what error do you
il client, as
all other patches work fine so far.
Thanks,
Zhigang Gong.
>
> Make the build scripts work in both Python 2 and Python 3.
> (CMake prefers Python 2 if both are available, but will use
> Python 3 if only it is installed.)
>
> Signed-off-by: Rebecca Palmer
>
&g
il 29, 2015 5:13 PM
> To: Zhigang Gong
> Subject: Re: Re: Re: [Beignet] Must
>
> This problem has been fixed by run in bash directly, not by ssh.
>
> But if I want to run OpenCL program in Putty by ssh, what should I do?
>
>
> > -原始邮件-
> > 发件人: "Zhig
The patch LGTM too, but the patch seems broken for me, could you check
and send a new version?
Thanks,
Zhigang Gong.
On Wed, Apr 29, 2015 at 08:18:18AM +, Song, Ruiling wrote:
>
> The patch looks better than mine, I think we can merge this patch into
> master. Any
Pushed, thanks for the patch and review.
On Thu, Apr 23, 2015 at 04:26:30AM +, Song, Ruiling wrote:
> LGTM
>
> > -Original Message-
> > From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of
> > Rebecca N. Palmer
> > Sent: Saturday, April 18, 2015 5:19 AM
> > To: be
Pushed, thanks for the patch and review.
On Thu, Apr 23, 2015 at 04:30:19AM +, Song, Ruiling wrote:
> Hi Rebecca,
>
> Thanks for the patch, it looks good.
> I find that even with your patch the builtin_tgamma still fails. It turns out
> to be the issue of the test case.
> So I send a patch "
uot;.format(t))
> # Predefined type sets according to the Open CL spec.
> math_gentype = ["math_gentype", gen_vector_type(all_float_type)]
But we can see that the above block delete two lines and add two lines, the
total
lines should be the same. The pach itself is in malformed format.
Could you take a look at it?
Thanks,
Zhigang Gong.
___
Beignet mailing list
Beignet@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/beignet
You may need a completely clean rebuild which need to delete all the old files.
On Wed, Apr 29, 2015 at 02:43:05PM +0800, Gao, Sanshan wrote:
> > > When I run any OpenCL programs, I need root privilege
> > You shouldn't; you may have accidentally built beignet without X support.
> > Run
> >
> >
see
> http://www.freedesktop.org/wiki/Software/Beignet/\n";
> +"'sudo echo 0 >
> /sys/module/i915/parameters/enable_cmd_parser' usually helps\n");
> +}
The above check is also valid for non HSW platform. For example some 3.15/3.16
ke
On Tue, Apr 28, 2015 at 10:03:17PM +0100, Rebecca N. Palmer wrote:
> From http://www.freedesktop.org/wiki/Software/Beignet/ :
> >Based on our test result, LLVM 3.5 has best pass rate on all the test
> >suites. Compare to LLVM 3.5, LLVM 3.6 has slightly lower pass rate(caused by
> >one front end b
aniel's patchset get merged, we can check the kernel version and
remove the kernel parameter checking in step 2 if we get a good new kernel
installed.
Any comments?
Thanks,
Zhigang Gong.
>
> ___
> Beignet mailing list
>
l 23, 2015 2:14 AM
> To: Rebecca N. Palmer; Zhigang Gong
> Cc: beignet@lists.freedesktop.org
> Subject: Re: [Beignet] 9e8874c breaking (more) Haswell systems?
>
> On 2015.04.18 22:16:07 +0100, Rebecca N. Palmer wrote:
> > http://cgit.freedesktop.org/beignet/c
UNDEF value in printf parser.
Rebecca N. Palmer (2):
FindLLVM: allow LLVM/Clang 3.6
Don't crash if device inaccessible
Rebecca Palmer (1):
Use matching versions of clang/llvm and libclang/libllvm
Zhigang Gong (25):
Build: fix the beignet icd name when CMAKE_IN
On Sun, Apr 05, 2015 at 09:07:27AM +0200, Matthias Peter Walther wrote:
> Thank you very much, turns out I missed some of those dependencies.
>
> Maybe you could put that list on the wiki page, so that Debian and
> Ubuntu users will find it quickly.
Good idea, just added it to the wiki page. Thank
reverting that commit is the atomic related workload
will hit
a major performance issue. One example is in darktable, one filter kernel
execution
time will increase to 50s from 0.5s without tat commit.
Thanks,
Zhigang Gong.
On Tue, Apr 14, 2015 at 08:05:43AM +, Meng, Mengmeng wrote:
>
cca N. Palmer wrote:
> On 10/04/15 09:56, Zhigang Gong wrote:
> >I think I know the cause now. Because beignet uses some new registers which
> >are not in the whitelist (not included in c9224f). These new registers are
> >to enable atomic on L3 which is disabled by KMD by defau
Signed-off-by: Zhigang Gong
---
backend/src/backend/context.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/backend/src/backend/context.cpp b/backend/src/backend/context.cpp
index 59ccc79..0dc60b7 100644
--- a/backend/src/backend/context.cpp
+++ b/backend/src/backend
The most possible cause is that it failed to open the cl device.
I just submitted two patches. Could you apply those two patches
and try it again. Then you could send all the output of the
utest_run to the list and we can check the root cause why it failed.
Thanks,
Zhigang Gong.
On Mon, Apr 13
Please ignore these two patches which have been sent by accident. Sorry for
that.
> -Original Message-
> From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of
> Zhigang Gong
> Sent: Tuesday, April 14, 2015 9:55 AM
> To: beignet@lists.freedesktop.org
>
Signed-off-by: Zhigang Gong
---
src/intel/intel_driver.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/intel/intel_driver.c b/src/intel/intel_driver.c
index a6b8a58..5adf09b 100644
--- a/src/intel/intel_driver.c
+++ b/src/intel/intel_driver.c
@@ -223,6 +223,8
Signed-off-by: Zhigang Gong
---
utests/utest_run.cpp | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/utests/utest_run.cpp b/utests/utest_run.cpp
index d797c09..3cc1b6c 100644
--- a/utests/utest_run.cpp
+++ b/utests/utest_run.cpp
@@ -58,7 +58,10 @@ int main(int argc, char
All the gen registers should get the uniform information from the
corresponding virtual registers. The use of GenRegister::xxxgrf
on a virtual register is very dangerous which may cause inconsistency.
This patch eliminate all the use of it in gen_insn_selection stage.
Signed-off-by: Zhigang Gong
Otherwise, it may cause segfault in instruction encoding stage.
Signed-off-by: Zhigang Gong
---
backend/src/backend/gen_encoder.cpp| 2 ++
backend/src/backend/gen_insn_selection.cpp | 29 +
2 files changed, 19 insertions(+), 12 deletions(-)
diff --git a
LGTM, will push latter, thanks.
On Mon, Apr 13, 2015 at 05:15:25PM +0800, Yang Rong wrote:
> Add a function unpacked_ud to handle unpacked_ud from long.
> Also fix a in calculateFullU64MUL when uniform register and offset!=0.
>
> V2: Refined the git log.
> Signed-off-by: Yang Rong
> Signed-off-b
In uniform mode, we should set simd width to 1 and set noMask bit.
Signed-off-by: Zhigang Gong
---
backend/src/backend/gen_insn_selection.cpp | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/backend/src/backend/gen_insn_selection.cpp
b/backend/src/backend
used as send's address or other payload, the
> send payload need continuous register, so I change these registers to scalar
> register.
>
> > -Original Message-
> > From: Zhigang Gong [mailto:zhigang.g...@linux.intel.com]
> > Sent: Wednesday, April 8, 2015
Otherwise, it may cause segfault in instruction encoding stage.
Signed-off-by: Zhigang Gong
---
backend/src/backend/gen_encoder.cpp| 2 ++
backend/src/backend/gen_insn_selection.cpp | 29 +
2 files changed, 19 insertions(+), 12 deletions(-)
diff --git a
some latest changes in the kernel which make our
secure batch disable patch
broken now.
Thanks.
> -Original Message-
> From: Rebecca N. Palmer [mailto:rebecca_pal...@zoho.com]
> Sent: Wednesday, April 8, 2015 4:53 PM
> To: Zhigang Gong; 'Julian Simioni'
> Cc:
or other normal cases, they can still use simd1 mode which has better
performance.
Thanks,
Zhigang Gong.
>
> Signed-off-by: Yang Rong
> ---
> backend/src/backend/gen_insn_selection.cpp | 18 --
> 1 file changed, 8 insertions(+), 10 deletions(-)
>
> diff --g
Then this may be caused by another issue also documented in the README.md if
you are using Linux kernel 3.15 or 3.16.
If you also tried this, please let us know. Thanks.
"
* Almost all unit tests fail on Linux kernel 3.15/3.16.
There is a known issue in some versions of linux kernel which enable
et [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of
> > Zhigang Gong
> > Sent: Thursday, April 02, 2015 12:24 PM
> > To: beignet@lists.freedesktop.org
> > Cc: Gong, Zhigang
> > Subject: [Beignet] [PATCH] GBE: skip current BB if it is not in a PN node
Reproduced. Thanks for reporting the issue and we will look into it soon.
On Mon, Apr 06, 2015 at 09:55:48PM +0100, Rebecca N. Palmer wrote:
> Control: retitle -1 beignet: silently does nothing on large arrays
> (previous discussion:
> https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=781875 )
>
HV_1 || \
> + devid == PCI_CHIP_CHV_2 || \
> + devid == PCI_CHIP_CHV_3)
> +
It's better to keep all the devid aligned to the same column.
Thanks,
Zhigang Gong.
___
Beignet mailing list
Beignet@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/beignet
from cl_driver_update_device_info(), we can simply
return a NULL device and complain the error. Which is much better to keep
going with the possible incorrect EU/slice information and may hang the GPU
sometime latter.
Thanks,
Zhigang Gong.
On Mon, Mar 30, 2015 at 11:23:55AM +0800, Yang Rong
Is this patch to fix a bug in the upack_ud for a uniform register with non-zero
offset?
If so, you may need to rework the commit log to reflect the above purpose.
Thanks,
Zhigang Gong.
On Mon, Mar 30, 2015 at 11:23:38AM +0800, Yang Rong wrote:
> Add a function unpacked_ud to handle unpacked
r
than the current unofficial one.
Thanks,
Zhigang Gong.
On Sat, Mar 28, 2015 at 12:34:17AM +0800, Chuanbo Weng wrote:
> This document includes the steps of using DMABUF buffer sharing between
> v4l2 and Beignet. Also steps to run corresponding example.
>
> Signed-off-by: Chuan
Using the inserPos is good enough. If using --insertPos, there
is one potential issue when the insertPos is the head of a list
then it will trigger an assertion.
Signed-off-by: Zhigang Gong
---
backend/src/llvm/ExpandConstantExpr.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Right, especially for those builtin function which don't care about the sign.
Junyan, could you refine your patch accordingly?
Thanks.
On Tue, Mar 24, 2015 at 07:39:03AM +, Yang, Rong R wrote:
> Zhigang have add function OCLIntrinsicMap.find to handle override function
> name, only need one D
This is a possible situation especially for a complex switch case
lowering.
Signed-off-by: Zhigang Gong
---
backend/src/llvm/llvm_gen_backend.cpp | 4
1 file changed, 4 insertions(+)
diff --git a/backend/src/llvm/llvm_gen_backend.cpp
b/backend/src/llvm/llvm_gen_backend.cpp
index 0487bcb
, the deleted values may be used in the subsequent instructions
which causes fatal error latter.
Signed-off-by: Zhigang Gong
---
backend/src/llvm/llvm_scalarize.cpp | 43 +
1 file changed, 34 insertions(+), 9 deletions(-)
diff --git a/backend/src/llvm/llvm_scalariz
The front end label is still 16 bit. But the auxiliary
label could be larger than that. This is the preparation
to support 32 bit label for both front end and backend.
Signed-off-by: Zhigang Gong
---
backend/src/backend/gen_insn_selection.cpp | 24
backend/src/backend
Signed-off-by: Zhigang Gong
---
backend/src/CMakeLists.txt| 1 +
backend/src/llvm/StripAttributes.cpp | 119 ++
backend/src/llvm/llvm_gen_backend.cpp | 7 +-
backend/src/llvm/llvm_gen_backend.hpp | 4 +-
backend/src/llvm/llvm_scalarize.cpp
For some extremly large kernel, these values may be larger than
0x, we have to extend them to 32 bit.
Signed-off-by: Zhigang Gong
---
backend/src/backend/gen_insn_selection.cpp | 18 +-
backend/src/backend/gen_reg_allocation.cpp | 12 ++--
backend/src/backend
Signed-off-by: Zhigang Gong
---
src/cl_mem.c | 4
src/intel/intel_driver.c | 7 +++
2 files changed, 11 insertions(+)
diff --git a/src/cl_mem.c b/src/cl_mem.c
index 57d27dd..31eb4c1 100644
--- a/src/cl_mem.c
+++ b/src/cl_mem.c
@@ -1974,6 +1974,10 @@ LOCAL cl_mem
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