[casper] MIT Haystack FPGA Opertunity

position: https://careers.peopleclick.com/careerscp/client_mit/external/jobDetails/jobDetail.html?jobPostId=30952&localeCode=en-us Thanks, John Swoboda John Swoboda, Ph.D. (he/him) Geospace Research Scientist MIT Haystack Observatory -- You received this message because you are subscribed to

[casper] Temp FPGA Development Project

framework to test this capability but are also interested in extending this to CASPER. We believe we have the place to start but we need someone with experience using Vivado and VHDL/Verilog. If you're interested in this task, or know someone who might be, please contact me. John Swoboda,

[casper] NEWSDR 2024 Event Registration

: https://newsdr.org/workshops/newsdr2024/ Event Registration: https://forms.gle/9FVRFgJhjSQQAudBA Poster Abstract Submission: https://forms.gle/zj1psWRVgYjSZFC19 John Swoboda, Ph.D. (he/him) Geospace Research Scientist MIT Haystack Observatory Email: swo...@mit.edu<mailto:swo...@mit.edu>

Re: [casper] ZCU 208 PPS Input

ors in the porting process >> as you report them. What was there was a carryover from zcu216 and not >> tested due to lack of hardware). A better approach though may be to allow >> for an -es1 and non-es1 version when making a selection in the yellow block >> mask. I

Re: [casper] ZCU 208 PPS Input

ing on > non-es1 hardware and not need to make adjustments to the underlying > platform files. > > Best, > Mitch > > On Mar 10, 2024, at 3:32 PM, John Swoboda wrote: > > Hi All, > > I've been trying to get my zcu208 to trigger on a pps. I've looked at a

[casper] NEWSDR 2024

ponsor for this event, then please contact us! We look forward to seeing you at the event! John Swoboda, Ph.D. (he/him) Geospace Research Scientist MIT Haystack Observatory Email: swo...@mit.edu<mailto:swo...@mit.edu> Voice: (617) 715-3489 -- You received this message because you are sub