In case you hadn't heard, the DEC archives at CHM are available and here's
the PDF:
http://archive.computerhistory.org/resources/access/text/finding-aids/102733963-DEC/102733963-DEC.pdf
Now, I wonder if it has Firefly docs...
All have been claimed.
Keven Miller
On 06/13/2017 07:59 PM, Chuck Guzis via cctalk wrote:
Well, I didn't say "timing error", I did say "timing
distortion", which is not quite the same thing. My
reference was the "TR1602/TR1863/TR1865 MOS/LSI
Application Notes Asynchronous Receiver Transmitter",
which can be found in the WD 1984
On 06/13/2017 06:27 PM, Eric Smith wrote:
> They sold it, then spent a bunch of money on Field Service trips to make
> it work for customers. It cost them enough to justify multiple
> redesigns, including (finally) switching to a crystal.
The TRS-80 board? Do you have any documentation on
On Tue, Jun 13, 2017 at 6:59 PM, Chuck Guzis via cctalk <
cctalk@classiccmp.org> wrote:
> Well, I didn't say "timing error", I did say "timing distortion", which
> is not quite the same thing. My reference was the "TR1602/TR1863/TR1865
> MOS/LSI Application Notes Asynchronous Receiver
On 06/13/2017 05:29 PM, Eric Smith wrote:
> It's mathematically impossible for a normal UART [*] to handle 49%
> timing error. The cumulative timebase error by the end of a
> character can't be more than one bit time, or the wrong bit will get
> sampled, resulting in incorrect data, or, (if that
> On Jun 13, 2017, at 8:29 PM, Eric Smith via cctalk
> wrote:
>
> ...
> * I refer to a "normal UART" as one that oversamples the receive data
> signal (typically at 16x the bit rate) to find the leading edge of the
> start bit, delays 1/2 bit time, then samples the start
On Tue, Jun 13, 2017 at 5:53 PM, Chuck Guzis via cctalk <
cctalk@classiccmp.org> wrote:
> The TR1602 UART, like its cousin, the AY-3-1013 used in the TVT,
> tolerates a pretty wide range of bit rate distortion. The app note
> gives a figure of something like 49%. And, since it's async, the game
On 06/13/2017 02:26 PM, Eric Smith wrote:
> On Tue, Jun 13, 2017 at 12:39 AM, Chuck Guzis via cctalk
> A person might think so, but as DEC found out with the PDP-11/05
> console serial port, it's really not. The percentage tolerance of
> async serial is not any higher at low bit rates than at
On 2017-Jun-13, at 2:26 PM, Eric Smith via cctalk wrote:
> On Tue, Jun 13, 2017 at 12:39 AM, Chuck Guzis via cctalk <
> cctalk@classiccmp.org> wrote:
>
>> The trimpot on the board says to me that the clock is most likely a
>> simple RC affair.
>
> That does seem likely.
There's a 7493 (4-bit
On Tue, Jun 13, 2017 at 5:45 PM, Ethan Dicks via cctalk <
cctalk@classiccmp.org> wrote:
> On Tue, Jun 13, 2017 at 5:26 PM, Eric Smith via cctalk
> wrote:
> > DEC went through multiple board revisions with changes to the RC
> oscillator
> > in attempt to make it
On Tue, Jun 13, 2017 at 5:26 PM, Eric Smith via cctalk
wrote:
> DEC went through multiple board revisions with changes to the RC oscillator
> in attempt to make it sufficiently reliable. I've heard that they finally
> up and putting a crystal oscillator on the board, but
On Tue, Jun 13, 2017 at 12:39 AM, Chuck Guzis via cctalk <
cctalk@classiccmp.org> wrote:
> The trimpot on the board says to me that the clock is most likely a
> simple RC affair.
That does seem likely.
>For low bitrates, that's perfectly adequate.
>
A person might think so, but as DEC
On 6/13/2017 11:28 AM, Ethan Dicks via cctalk wrote:
On Mon, Jun 12, 2017 at 3:13 PM, Keven Miller(rtt) via cctalk
wrote:
1. IBM 2.10 DOS Technical Reference, Sep 1983
2. IBM Hardware Technical Reference, Jan 1983
Hopefully the picture comes through.
No. It did
On 6/13/17 11:22 AM, Alan Frisbie via cctalk wrote:
> 2. DTC 520-1 disk controller and its DTC-11 Q-Bus host adapter.
>
> Our current project is to replace the ST-506 disks with
> the David Gesswein MFM disk emulators. To do this, we
> need to determine the CRC algorithm used by DTC, which
The CHM has posted this on their blog:
I thought you all (especially DEC buffs) would appreciate this:
https://goo.gl/BV6MXH
I have personally reviewed several boxes of the DEC archives - and they
are a terrific asset in understanding both DEC's business successes
and failures, engineering
In the early 1980's, a company in Toronto, Hazelcom Industries,
produced a music synthesizer based on an LSI-11/23 running
RSX-11M v3.2. The music part of it was written by David McLey,
so the product was called the McLeyvier (pun intended).
Several people in the industry have told me that
On Mon, Jun 12, 2017 at 3:13 PM, Keven Miller(rtt) via cctalk
wrote:
> 1. IBM 2.10 DOS Technical Reference, Sep 1983
> 2. IBM Hardware Technical Reference, Jan 1983
>
> Hopefully the picture comes through.
No. It did not. Attachments are stripped on this list. No
I had the privilege of doing Chuck's oral history for CHM a few years ago.
From: Christine Thacker [mailto:thac...@nhm.org]
Sent: Monday, June 12, 2017 6:58 PM
Subject: Chuck Thacker
Roy, Alan, Butler & Kurt,
I'm sorry to tell you that my father Chuck Thacker passed away in the
early
On Sun, 11 Jun 2017, Jay Jaeger wrote:
Yes, I am doing the drawings at 600DPI, including the drawings that
reside inside a couple of the maintenance manuals (but 400DPI for the
text, etc.)
Please do *everything* at 600dpi, disk space and file sizes for such
documents don't matter these days,
On 06/12/2017 10:23 PM, jim stephens via cctalk wrote:
> Things odd about the board. No 1488 / 1489 or any other transmit /
> receiver chips. No clock circuit. Was there an appropriate
> frequency crystal or clock on the interface to divide to something
> for the 1602 uart clock?
>
> I see
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