[coreboot] [PATCH] Cleanup up HD audio codec / hda_verb.h files

See patch. Most of the hda_verb.h files can be safely dropped as they're unused (and/or incorrect). I own the MSI MS-7260 and will provide a working hda_verb.h file for that at some later point, and also for my upcoming ASUS M2N-E port. Uwe. -- http://hermann-uwe.de | http://sigrok.org

[coreboot] [commit] r6161 - in trunk: . src src/arch/i386 src/arch/x86 src/arch/x86/boot src/arch/x86/init src/arch/x86/lib src/cpu/via/model_c7 src/include src/mainboard/amd/dbm690t src/mainboard/amd

Author: stepan Date: Sat Dec 11 21:33:41 2010 New Revision: 6161 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6161 Log: After this has been brought up many times before, rename src/arch/i386 to src/arch/x86. Signed-off-by: Stefan Reinauer ste...@coreboot.org Acked-by: Patrick

[coreboot] Flag Days reminder

Hi, I just added two new items to our upgrade guide for developers called Flag Days: http://www.coreboot.org/Flag_Days However, it seems we neglected this practice for roughly 140 revisions between r5911 and r6149. If you made any changes that will require people update their uncommitted work,

Re: [coreboot] [PATCH] Cleanup up HD audio codec / hda_verb.h files

Uwe Hermann wrote: Cleanup up HD audio codec / hda_verb.h files. .. Signed-off-by: Uwe Hermann u...@hermann-uwe.de Acked-by: Peter Stuge pe...@stuge.se -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] [PATCH] Cleanup up HD audio codec / hda_verb.h files

On 12/11/10 12:57 PM, Peter Stuge wrote: Uwe Hermann wrote: Cleanup up HD audio codec / hda_verb.h files. .. Signed-off-by: Uwe Hermann u...@hermann-uwe.de Acked-by: Peter Stuge pe...@stuge.se However, please refrain from removing the verb adding code from those boards that actually have

Re: [coreboot] [PATCH] Cleanup up HD audio codec / hda_verb.h files

Ooops that was intended for the list. On 12/11/10 12:21 PM, Stefan Reinauer wrote: On 12/11/10 3:49 AM, Uwe Hermann wrote: The following files can be safely dropped as they don't match the ID of the audio codec and thus will never get actually used (you'll see HDA: no verb! or similar in the

Re: [coreboot] [PATCH] abuild: Don't skip rebuilds

Stefan Reinauer wrote: abuild and machines are reasonably fast. Don't skip already built targets anymore, because a recent change could have broken them again. Instead rely on coreboot's dependencies to figure out what to rebuild. Signed-off-by: Stefan Reinauer ste...@coreboot.org

[coreboot] [PATCH] Implement DIMM loading for DDR on K8

Hello, Attached patch implements the memory speed reductions (and 2T/1T clock logic) for DDR1 memory (939 sockets). The details can be found in BKDG chapter 4.1.3.3. The patch looks at certain DDR configurations (dual rank/single rank) and lowers the clocks to 2T or frequency as guide

[coreboot] [commit] r6162 - trunk/util/abuild

Author: stepan Date: Sat Dec 11 23:07:07 2010 New Revision: 6162 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6162 Log: Don't skip already built targets anymore, because a recent change could have broken them again. Instead rely on coreboot's dependencies to figure out what to

Re: [coreboot] [PATCH] Implement DIMM loading for DDR on K8

* Rudolf Marek r.ma...@assembler.cz [101211 22:37]: Hello, Attached patch implements the memory speed reductions (and 2T/1T clock logic) for DDR1 memory (939 sockets). The details can be found in BKDG chapter 4.1.3.3. The patch looks at certain DDR configurations (dual rank/single rank)

[coreboot] [commit] r6164 - in trunk/src: cpu/intel/model_1067x cpu/intel/model_106cx cpu/intel/model_6ex cpu/intel/model_6fx cpu/intel/speedstep include/cpu/intel

Author: stepan Date: Sat Dec 11 23:14:44 2010 New Revision: 6164 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6164 Log: factor out cpu power management base into a separate file. And fix a bug in model_1067x Signed-off-by: Stefan Reinauer ste...@coreboot.org Acked-by: Stefan

[coreboot] [commit] r6165 - in trunk/src: include mainboard/amd/mahogany mainboard/amd/mahogany_fam10 mainboard/amd/tilapia_fam10 mainboard/asrock/939a785gmh mainboard/asus/m4a785-m mainboard/gigabyte

Author: ruik Date: Sat Dec 11 23:26:10 2010 New Revision: 6165 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6165 Log: Following patch makes just one fadt.c file. For SB700. Signed-off-by: Rudolf Marek r.ma...@assembler.cz Acked-by: Uwe Hermann u...@hermann-uwe.de Deleted:

Re: [coreboot] [PATCH] SB700 common FADT

Committed revision 6165. Rudolf -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] [commit] r6166 - trunk/src/southbridge/amd/sb700

Author: ruik Date: Sat Dec 11 23:41:31 2010 New Revision: 6166 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6166 Log: I was bitten by the rename, this is part of r6165. Signed-off-by: Rudolf Marek r.ma...@assembler.cz Acked-by: Uwe Hermann u...@hermann-uwe.de Added:

[coreboot] build service results for r6164

Dear coreboot readers! This is the automatic build system of coreboot. The developer stepan checked in revision 6164 to the coreboot repository. This caused the following changes: Change Log: factor out cpu power management base into a separate file. And fix a bug in model_1067x

[coreboot] [commit] r6167 - trunk/src/mainboard/asus/m4a78-em

Author: ruik Date: Sun Dec 12 00:28:17 2010 New Revision: 6167 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6167 Log: Fix the build failure. We have now common fadt.c. [PATCH] SB700 common FADT was not applied to this board because it was in the meanwhile added. Signed-off-by:

[coreboot] build service results for r6165

Dear coreboot readers! This is the automatic build system of coreboot. The developer ruik checked in revision 6165 to the coreboot repository. This caused the following changes: Change Log: Following patch makes just one fadt.c file. For SB700. Signed-off-by: Rudolf Marek r.ma...@assembler.cz

Re: [coreboot] [PATCH] let high memory size be decided in cbmem.h

Attaching refreshed patch. Should be same as previously posted. Thanks, Rudolf Index: coreboot/src/include/cbmem.h === --- coreboot.orig/src/include/cbmem.h 2010-12-12 00:04:38.0 +0100 +++ coreboot/src/include/cbmem.h

Re: [coreboot] [PATCH] exit from self-refresh on AMD K8 CPUs (pre revF)

On 4.12.2010 20:55, Rudolf Marek wrote: Hello, Following patch adds support to bring out the memory out of self refresh when doing resume. Signed-off-by: Rudolf Marek r.ma...@assembler.cz The patch is based on my 2008 patch. Removed compilation warning refreshed to match current tree.

Re: [coreboot] [PATCH] Add Asrock board s3 support

Due to reorganization of patches this became more trivial. The list of patches is following: fix_high_tables_size.patch add_exit_from_self_k8.patch suspend_resume_support_sb700.patch compile_cbmem.patch add_asrock_s3.patch fix_loading_dram.patch Thanks, Rudolf Index:

Re: [coreboot] [PATCH] Add SB700 suspend/resume code

Refreshed to match the tree. Fixed the compare for acpi_is_wakup_early - it was missing compare for S3 mode. Thanks, Rudolf Index: coreboot/src/southbridge/amd/sb700/sb700.h === --- coreboot.orig/src/southbridge/amd/sb700/sb700.h

[coreboot] build service results for r6166

Dear coreboot readers! This is the automatic build system of coreboot. The developer ruik checked in revision 6166 to the coreboot repository. This caused the following changes: Change Log: I was bitten by the rename, this is part of r6165. Signed-off-by: Rudolf Marek r.ma...@assembler.cz

Re: [coreboot] [PATCH] compile cbmem.c instead of including it in romstage

Yes I fixed the message. Thanks, Rudolf Index: coreboot/src/include/cbmem.h === --- coreboot.orig/src/include/cbmem.h 2010-12-12 01:07:08.0 +0100 +++ coreboot/src/include/cbmem.h 2010-12-12 01:07:11.0 +0100 @@ -49,8

Re: [coreboot] [PATCH] Implement DIMM loading for DDR on K8

Hi, Yes it is tested on real HW. Attaching refreshed patch because #if CONFIG_ ... SOCKET939 == 1 #endif Is undefined, so I changed that to #if defined() (After abuild test ;) Thanks, Rudolf Index: coreboot/src/northbridge/amd/amdk8/raminit.c

[coreboot] build service results for r6167

Dear coreboot readers! This is the automatic build system of coreboot. The developer ruik checked in revision 6167 to the coreboot repository. This caused the following changes: Change Log: Fix the build failure. We have now common fadt.c. [PATCH] SB700 common FADT was not applied to this

[coreboot] [commit] r6168 - trunk/src/cpu/intel/model_106cx

Author: stepan Date: Sun Dec 12 01:37:41 2010 New Revision: 6168 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6168 Log: fix model 106cx Signed-off-by: Stefan Reinauer ste...@coreboot.org Acked-by: Stefan Reinauer ste...@coreboot.org Modified:

[coreboot] build service results for r6168

Dear coreboot readers! This is the automatic build system of coreboot. The developer stepan checked in revision 6168 to the coreboot repository. This caused the following changes: Change Log: fix model 106cx Signed-off-by: Stefan Reinauer ste...@coreboot.org Acked-by: Stefan Reinauer

Re: [coreboot] [PATCH] Implement DIMM loading for DDR on K8

* Rudolf Marek r.ma...@assembler.cz [101212 01:10]: Hi, Yes it is tested on real HW. Attaching refreshed patch because #if CONFIG_ ... SOCKET939 == 1 #endif Is undefined, so I changed that to #if defined() that's not good enough i think. It might be 0, then defined would hit

Re: [coreboot] [PATCH] Implement DIMM loading for DDR on K8

Rudolf Marek wrote: +/* + Following table comes directly from BKDG (unbuffered DIMM support) + [Y][X] Y = ch0_0, ch1_0, ch0_1, ch1_1 1=present 0=empty + X uses same layout but 1 means double rank 0 is single rank/empty +*/ + Maybe clarify that ch{0_0,1_0,0_1,1_1} maps to