Re: [coreboot] how to model the Quark architecture

ron minnich wrote: Im not sure why I would want to start a coreboot port effort with this UEFI doc as my guide Look past all the UEFI babble. :) The doc is a good description of what needs to be done to bring the platform up, and it's fairly different from what coreboot does so far. //Peter

Re: [coreboot] how to model the Quark architecture

On Tue, Feb 18, 2014 at 6:55 AM, Peter Stuge pe...@stuge.se wrote: ron minnich wrote: Im not sure why I would want to start a coreboot port effort with this UEFI doc as my guide Look past all the UEFI babble. :) The doc is a good description of what needs to be done to bring the platform up,

Re: [coreboot] how to model the Quark architecture

Aaron Durbin wrote: I skimmed through the doc yesterday evening. It looks very much like BayTrail. What particular differences did you see where it would be different to cause issues for coreboot? I think the most obvious thing is the message port architecture? Sure, we can skip modeling them

Re: [coreboot] how to model the Quark architecture

On Tue, Feb 18, 2014 at 9:22 AM, Peter Stuge pe...@stuge.se wrote: Aaron Durbin wrote: I skimmed through the doc yesterday evening. It looks very much like BayTrail. What particular differences did you see where it would be different to cause issues for coreboot? I think the most obvious

Re: [coreboot] how to model the Quark architecture

Aaron Durbin wrote: I think the most obvious thing is the message port architecture? Sure, we can skip modeling them and create some global functions for sending messages to random ports, but that wouldn't be very impressive.. What do you mean by modeling them? Compare with how HT

Re: [coreboot] how to model the Quark architecture

This is all pretty nebulous. I can't understand the point here. docs or code would help. ron -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] how to model the Quark architecture

On Tue, Feb 18, 2014 at 10:11 AM, Peter Stuge pe...@stuge.se wrote: Aaron Durbin wrote: I think the most obvious thing is the message port architecture? Sure, we can skip modeling them and create some global functions for sending messages to random ports, but that wouldn't be very

Re: [coreboot] how to model the Quark architecture

ron minnich wrote: I can't understand the point here. docs or code would help. Aaron Durbin wrote: Could you please provide explicit examples having c struct fields represented in devicetree that model another address space? No I can not. I do not have the capacity to deliver the ready-made

Re: [coreboot] how to model the Quark architecture

On Tuesday, February 18, 2014 07:33:43 PM Peter Stuge wrote: I'm sorry I said anything, I was silly to think that design discussion would be possible. I've been following this thread for the last couple of days, and I still have no idea what you're talking about. I bet mostly everyone else

Re: [coreboot] how to model the Quark architecture

On Tue, Feb 18, 2014 at 10:33 AM, Peter Stuge pe...@stuge.se wrote: ron minnich wrote: I can't understand the point here. docs or code would help. Aaron Durbin wrote: Could you please provide explicit examples having c struct fields represented in devicetree that model another address

[coreboot] Untangling the UART

Hey! I have posted first half for series of patches that should untangle the mess of multiple different prototypes for the simple thing of getting some console output out of UART. There is little practical use of being able to compile coreboot with multiple type of UARTs in same build, so

[coreboot] A Growing Concern

As a privacy and freedom oriented PC/Linux user, it scares me how modern day devices are becoming extremely proprietary. Companies are beginning to ship their laptops/tablets with proprietary EFI systems which have some nasty things in them. I recently purchased a Dell Venue 8 Pro(one of many

Re: [coreboot] Ram Init: Intel i945: Timing parameters

Thanks Vald ... not possible to break intel safe :).. wondering how coreboot team was able to write i945 ram init? ** Important Note This email (including any attachments) contains information which is

Re: [coreboot] Ram-init: Intel i945: sdram_detect_cas_latency_and_ram_speed

Thanks Peter for your support. I will have a look at provided links. ** Important Note This email (including any attachments) contains information which is confidential and may be subject to legal

Re: [coreboot] Trouble with coreboot for Roda RK9 15 and 17

Hello Dmitry, Am 03.02.2014 09:42, schrieb Дмитрий Багрянский: Hello Nico, Could you please help me to solve some problems? Laptop: Roda RK9 15 and 17 With model 13 the coreboot works well, but as for 15 and 17 models we faced with the following problems: 15 - I add vga bios from

Re: [coreboot] Ram Init: Intel i945: Timing parameters

Thanks Peter once again for helpful information. I was reading code line by line and going through i945 Express chipset document, tried to understand register settings and values. Seems to be tough job writing RAM init, and wouldn't have been possible without any documentation. Don't understand

[coreboot] Coding for free

Hey, I am Nitin Issac Joy, 2nd Year Computer Science Engineering Student from India, wanting to contribute to coreboot. I want more hand-on experience with ASM and interfacing which is the reason why I am doing this. I know more than basic ASM, well versed in C. Can anyone of you guide me?

Re: [coreboot] A Growing Concern

On 18.02.2014 06:21, amlo...@tfwno.gf wrote: As a privacy and freedom oriented PC/Linux user, it scares me how modern day devices are becoming extremely proprietary. Companies are beginning to ship their laptops/tablets with proprietary EFI systems which have some nasty things in them. I

Re: [coreboot] A Growing Concern

On Tuesday, February 18, 2014 12:21:38 AM amlo...@tfwno.gf wrote: As a privacy and freedom oriented PC/Linux user, it scares me how modern day devices are becoming extremely proprietary. Companies are beginning to ship their laptops/tablets with proprietary EFI systems which have some nasty

Re: [coreboot] A Growing Concern

all of these upcoming devices? not practical. If you care that much, you have to vote with your money, and you have to accept that you'll get something not entirely what you wanted in features. ron On Tue, Feb 18, 2014 at 1:01 PM, Vladimir 'φ-coder/phcoder' Serbinenko phco...@gmail.com wrote:

Re: [coreboot] Coding for free

how much money do you have to buy hardware that coreboot supports? That's always a first step. ron -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] [RFC] board_status: Add serial log to `serial_console.txt`

Am Dienstag, den 11.02.2014, 00:04 +0100 schrieb Vladimir 'φ-coder/phcoder' Serbinenko: On 10.02.2014 23:47, David Hendricks wrote: On Sun, Feb 9, 2014 at 4:50 AM, Paul Menzel wrote: currently no coreboot messages are stored for boards not supporting CBMEM console (or where this

Re: [coreboot] [RFC] board_status: Add serial log to `serial_console.txt`

On 19.02.2014 00:18, Paul Menzel wrote: But in general I think I agree with Vladimir. CBMEM console should be supported and if not then that should be fixed. I also agree, but it’ll take more time and the above is a good work-around for the mean time. Strongly disagree workarounds are like

Re: [coreboot] [RFC] board_status: Add serial log to `serial_console.txt`

I 'm with Vladimir on this one. ron -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot