<< I think it could be very useful if integrated with CI. We could find
many issues that aren't detected currently. >>
Thanks Alan, that's a great idea! Lemme find the best way to integrate
Automated Testing into the CI, without breaking our PR Submissions.
If a PR breaks the CI: Maybe we can run
Hi Lup,
Congratulations, I think it could be very useful if integrated with CI.
We could find many issues that aren't detected currently.
Best Regards,
Alan
On Sat, Jan 27, 2024 at 8:05 PM Lee, Lup Yuen wrote:
> Every day we’re auto-building NuttX for Ox64 BL808 RISC-V SBC... Can we
> test N
Every day we’re auto-building NuttX for Ox64 BL808 RISC-V SBC... Can we
test NuttX on Ox64 automatically after building?
Yes we can! With a little help from the Ox64 BL808 Emulator that we created
last week. In this article, we fill in the missing pieces of our Ox64
Emulator and run it for Automat
Yes! exactly like that. But with better maintenance, being able to run on
many boards, and more interesting peripherals (video, mouse, etc.)
On Sat, Jan 27, 2024 at 7:11 PM Gregory Nutt wrote:
> Like
>
> *
> https://riscv.org/blog/2023/02/porting-nuttx-real-time-operating-system-on-polarfire-
Like
*
https://riscv.org/blog/2023/02/porting-nuttx-real-time-operating-system-on-polarfire-soc-fpga/
*
https://www.hackster.io/lupyuen/8-risc-v-sbc-on-a-real-time-operating-system-ox64-nuttx-474358
* https://twitter.com/btashton/status/1243699309117235200
On 1/27/2024 3:58 PM, Victor Suare
Roger that :-) I was thinking about experiment like in "Sphery vs.
Shapes" to convert NuttX code to FPGA LUT directly with no CPU.. but
if that makes no sense then probably Open-Source RISC-V would be the
best choice and there are some ready to use implementations that could
constitute our referenc
The innovation won't be to run NuttX in a RISC-V (soft-core or not) but
using a FPGA for its flexibility to add any kind of peripherals, one of the
main ones to be useful in my view will be a high-resolution framebuffer and
USB mouse/keyboard for a complete UI
On Sat, Jan 27, 2024 at 4:31 PM Grego
Aren't most CPUs available as soft cores? Certainly Xtensa was intended
for that purpose. ARM and MIPS have been common soft cores in ASICs for
more than a decade. As is RISC-V soft core in FPGAs.
https://en.wikipedia.org/wiki/Soft_microprocessor
In the past, there was some interest in ports
Tomek, as I clarified, porting NuttX to a FPGA will require a soft-core
CPU. I don't envision an opertaing system without a CPU, I see that like a
bad design choice if possible at all
Using a soft core and custom peripherals seems more valuable, even
including video output and USB host for mouse/ke
Hi Tomek,
AFAIK, compiling the NuttX to run inside an FPGA is not a kind of task to
be done in a GSoC project, it should be a long term effort (if John Keynes
allows us).
Also keep in mind that currently NuttX RTOS is supposed to run on top of a
processing unit (Microcontroller, Microprocessor, e
Okay Victor, I was thinking about toolchain that you present in
"Sphery vs. Shapes" [1] to be adopted for NuttX on FPGA conversion
without a CPU design.. could you please send your full detailed
proposal then? :-)
[1] https://www.youtube.com/watch?v=hn3sr3VMJQU
--
CeDeROM, SQ7MHZ, http://www.tome
Dear Alan, Dear NuttX community, greetings!
> Nice to see they added JTAG support to avrdude, but only few AVR8
> has JTAG support (i.e. Atmega128 has).
I trust you're all doing so well. I revisited the NuttX codebase today. I
created a sample at32uc3b0256 (avr32dev1) Microchip Studio project to
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