Hi Rebecca,
Thanks for your response. We will fixed it next.
Thanks,
Richard
-Original Message-
From: Rebecca Cran
Sent: 2023年2月16日 1:28 AM
To: devel@edk2.groups.io; Tony Lo (羅金松) ; Richard Ho (何明忠)
Cc: Andrew Fish ; Leif Lindholm ;
Michael D Kinney ; Michael Kubacki
; Zhiguang Liu
>
> +UINT32HW_FEEDBACK: 1;
Though the field name looks strange and inconsistent with other field naming
styles, it does
follow the SDM content. Looks good to me.
>
> -UINT32Reserved2: 28;
>
> +UINT32Reserved2
Wow, fantastic! Congratulations Sunil and big thanks to everyone helping with
the reviewing and approving. This is a huge milestone for RISC-V support in
Tiano.
-Original Message-
From: Sunil V L
Sent: Thursday, February 16, 2023 12:14 AM
To: Kinney, Michael D
Cc: devel@edk2.groups.io
Reviewed-by: Ray Ni
> -Original Message-
> From: Wu, Jiaxin
> Sent: Thursday, February 16, 2023 2:17 PM
> To: devel@edk2.groups.io
> Cc: Dong, Eric ; Ni, Ray ; Zeng, Star
> ; Laszlo Ersek ; Gerd Hoffmann
> ; Kumar, Rahul R
> Subject: [PATCH v9 3/6] UefiCpuPkg/SmmBaseHob.h: Add SMM Base
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4337
This patch is to check SmBase relocation supported or not.
If gSmmBaseHobGuid found, means SmBase info has been relocated
and recorded in the SmBase array. ASSERT it's not supported in OVMF.
Cc: Eric Dong
Cc: Ray Ni
Cc: Zeng Star
Cc: Las
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4337
This patch is to avoid configure SMBASE if SmBase relocation has been
done. If gSmmBaseHobGuid found, means SmBase info has been relocated
and recorded in the SmBase array. No need to do the relocation in
SmmCpuFeaturesInitializeProcessor().
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4337
Existing SMBASE Relocation is in the PiSmmCpuDxeSmm driver, which
will relocate the SMBASE of each processor by setting the SMBASE
field in the saved state map (at offset 7EF8h) to a new value.
The RSM instruction reloads the internal SMBASE
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4337
The default SMBASE for the x86 processor is 0x3. When
SMI happens, processor runs the SMI handler at SMBASE+0x8000.
Also, the SMM save state area is within SMBASE+0x1.
One of the SMM initialization from processor perspective is to
r
This patch is to replace mIsBsp by mBspApicId check.
mIsBsp becomes the local variable (IsBsp), then it can be
checked dynamically in the function. Instead, we define the
mBspApicId, which is to record the BSP ApicId used for
compare in SmmInitHandler. With this change, SmmInitHandler
can be run in
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4338
No need call InitializeMpSyncData during normal boot SMI init,
because mSmmMpSyncData is NULL at that time. mSmmMpSyncData is
allocated in InitializeMpServiceData, which is invoked after
normal boot SMI init (SmmRelocateBases).
Cc: Eric Don
Existing SMBASE Relocation is in the PiSmmCpuDxeSmm driver, which
will relocate the SMBASE of each processor by setting the SMBASE
field in the saved state map (at offset 7EF8h) to a new value.
The RSM instruction reloads the internal SMBASE register with the
value in SMBASE field when each time it
On Thu, Feb 16, 2023 at 05:54:12AM +, Kinney, Michael D wrote:
> Merged
>
> https://github.com/tianocore/edk2/pull/4023
>
Thanks a lot!, Mike. This is great and will enable the RISC-V community
to add more features. I am so thankful for all the maintainers and
reviewers.
Thanks,
Sunil
-=-=
Merged
https://github.com/tianocore/edk2/pull/4023
> -Original Message-
> From: Sunil V L
> Sent: Wednesday, February 15, 2023 7:46 PM
> To: devel@edk2.groups.io; Kinney, Michael D
> Cc: Gao, Liming ; Liu, Zhiguang
> ; Abner Chang ;
> Warkentin, Andrei
> Subject: Re: [edk2-devel] [e
Thanks Ray, I will update all you mentioned.
> -Original Message-
> From: Ni, Ray
> Sent: Thursday, February 16, 2023 12:59 PM
> To: Wu, Jiaxin ; devel@edk2.groups.io
> Cc: Dong, Eric ; Zeng, Star ;
> Laszlo Ersek ; Gerd Hoffmann ;
> Kumar, Rahul R
> Subject: RE: [PATCH v8 3/6] UefiCpu
Reviewed-by: Ray Ni
> -Original Message-
> From: Wu, Jiaxin
> Sent: Thursday, February 16, 2023 10:47 AM
> To: devel@edk2.groups.io
> Cc: Dong, Eric ; Ni, Ray ; Zeng, Star
> ; Laszlo Ersek ; Gerd Hoffmann
> ; Kumar, Rahul R
> Subject: [PATCH v8 4/6] UefiCpuPkg/PiSmmCpuDxeSmm: Consume SM
> -Original Message-
> From: Wu, Jiaxin
> Sent: Thursday, February 16, 2023 10:47 AM
> To: devel@edk2.groups.io
> Cc: Dong, Eric ; Ni, Ray ; Zeng, Star
> ; Laszlo Ersek ; Gerd Hoffmann
> ; Kumar, Rahul R
> Subject: [PATCH v8 3/6] UefiCpuPkg/SmmBaseHob.h: Add SMM Base HOB
> Data
>
> RE
On Wed, Feb 15, 2023 at 11:18:43PM +, Michael D Kinney wrote:
> Hi Sunil,
>
> Is this the correct PR with all commit messages updated with all Rb/Ab tags?
>
> https://github.com/tianocore/edk2/pull/4023
>
Hi Mike,
This PR is ready to merge with all tags updated and CI tests passed.
Thanks!
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4337
This patch is to check SmBase relocation supported or not.
If gSmmBaseHobGuid found, means SmBase info has been relocated
and recorded in the SmBase array. ASSERT it's not supported in OVMF.
Cc: Eric Dong
Cc: Ray Ni
Cc: Zeng Star
Cc: Las
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4337
This patch is to avoid configure SMBASE if SmBase relocation has been
done. If gSmmBaseHobGuid found, means SmBase info has been relocated
and recorded in the SmBase array. No need to do the relocation in
SmmCpuFeaturesInitializeProcessor().
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4337
Existing SMBASE Relocation is in the PiSmmCpuDxeSmm driver, which
will relocate the SMBASE of each processor by setting the SMBASE
field in the saved state map (at offset 7EF8h) to a new value.
The RSM instruction reloads the internal SMBASE
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4337
The default SMBASE for the x86 processor is 0x3. When
SMI happens, CPU runs the SMI handler at SMBASE+0x8000.
Also, the SMM save state area is within SMBASE+0x1.
One of the SMM initialization from CPU perspective is to relocate
and
This patch is to replace mIsBsp by mBspApicId check.
mIsBsp becomes the local variable (IsBsp), then it can be
checked dynamically in the function. Instead, we define the
mBspApicId, which is to record the BSP ApicId used for
compare in SmmInitHandler. With this change, SmmInitHandler
can be run in
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4338
No need call InitializeMpSyncData during normal boot SMI init,
because mSmmMpSyncData is NULL at that time. mSmmMpSyncData is
allocated in InitializeMpServiceData, which is invoked after
normal boot SMI init (SmmRelocateBases).
Cc: Eric Don
Existing SMBASE Relocation is in the PiSmmCpuDxeSmm driver, which
will relocate the SMBASE of each processor by setting the SMBASE
field in the saved state map (at offset 7EF8h) to a new value.
The RSM instruction reloads the internal SMBASE register with the
value in SMBASE field when each time it
Hi Michael,
If select EnableRateLimiting to TRUE and use the X86 system. It will be hang
when PXE boot.
Could you help to check?
Thanks,
Richard
-Original Message-
From: Michael Brown
Sent: 2023年2月15日 6:24 PM
To: devel@edk2.groups.io; Richard Ho (何明忠)
Cc: Andrew Fish ; Leif Lindholm
On Wed, Feb 15, 2023 at 11:18:43PM +, Michael D Kinney wrote:
> Hi Sunil,
>
> Is this the correct PR with all commit messages updated with all Rb/Ab tags?
>
> https://github.com/tianocore/edk2/pull/4023
>
Hi Mike,
I raised this PR to check CI tests. I need to add 3 more RB tags. Will
updat
Please add me as a maintainer. That gives us redundancy in maintainers and
will also incentivize me to provide feedback on proprietary implementations
which could hamper adoption.
Regards,
Isaac
From: Chang, Abner
Sent: Tuesday, February 7, 2023 10:25 AM
To: devel@edk2.groups.io
Cc: Attar, Ab
I think that the ManageabilityPkg shouldn't have a file like CommonLibs.dsc.inc
that defines commonly used content. It is the wrong scope. I would prefer to
use the MinPlatformPkg content on the theory that it will move MinPlatformPkg
to a more general location once it is in wider use.
Put an
I find the code to be misleading because source code looks like it is using the
edk2 API but it actually invokes the IpmiFeaturePkg implementations of the
IpmiTransport* API. we end up with things like a depex that says TRUE, but
really includes a library that carries a dependency on a differen
Nits, not blocking (I don't know how pedantic the community is and if we care
about these insignificant details, obviously lots of code doesn't):
- I don't find that saying it is the "EDK2" Manageability Package adds much
value/clarity. I would strip out "EDK2" from the discussion, except where
I see your point that it is confusing the sets of protocols and libraries that
have the same function. I think that the solution should be to decouple them
so that we can clearly say something like "use edk2 interfaces, IpmiLib, and
ManageabilityPkg or IpmiFeaturePkg, do not mix the two solutio
In looking at the code, this is what I see:
edk2:
There is an IpmiLib.h library class which abstracts the
IpmiPpi.h/IpmiProtocol.h use
There is an IpmiPpi.h/IpmiProtocol.h which provide an interface to send
a command "via IPMI"
Current IpmiPpi.h/IpmiProtocol.h implementat
Mike,
Thanks for the explanation of status and plan.
> -Original Message-
> From: Kinney, Michael D
> Sent: Thursday, February 16, 2023 7:13 AM
> To: Ni, Ray ; devel@edk2.groups.io; Chen, Christine
> ; Palomino Sosa, Guillermo A
>
> Cc: Feng, Bob C ; Gao, Liming
> ; Kinney, Michael D
>
On February 16, 2023 3:51 AM, Vishal Annapurve wrote:
>
> TDCALL_INFO should return num_vcpus as lower 4 bytes of r8 register
> according to the tdx spec, so reorder num_vcpus and max_vcpus fields to
> match the spec.
>
> Reference: Table 22.210 TDG.VP.INFO output operands
> https://cdrdv2.intel.
Hi Sunil,
Is this the correct PR with all commit messages updated with all Rb/Ab tags?
https://github.com/tianocore/edk2/pull/4023
Thanks,
Mike
> -Original Message-
> From: Kinney, Michael D
> Sent: Friday, February 10, 2023 10:22 AM
> To: Sunil V L ; devel@edk2.groups.io
> Cc: Gao, L
Hi Ray,
Right now we want the commit in both places.
The priority is edk2-basetools first. It has more CI checks than edk2 repo for
tools and
packages up as a pip module.
As soon as edk2-basetools change is merged, the edk2 repo change can be
submitted and
merged because the reviews have alre
TDCALL_INFO should return num_vcpus as lower 4 bytes of r8 register according to
the tdx spec, so reorder num_vcpus and max_vcpus fields to match the spec.
Reference: Table 22.210 TDG.VP.INFO output operands
https://cdrdv2.intel.com/v1/dl/getContent/733568
Signed-off-by: Vishal Annapurve
---
Md
On Wed, 15 Feb 2023 at 11:53, Leif Lindholm wrote:
>
> On Mon, Feb 13, 2023 at 12:13:37 +0100, Ard Biesheuvel wrote:
> > A pair of cleanups regarding the use of code that I will propose to
> > remove from the core EDK2 in an upcoming series.
> >
> > Cc: Leif Lindholm
> > Cc: Sami Mujawar
> > Cc:
Reviewed-by: Rebecca Cran
On 2/15/23 07:37, Gerd Hoffmann wrote:
SetMem arguments 2+3 are in the wrong order, resulting in
the call having no effect because Length is zero.
Fix this by using ZeroMem instead.
Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=4205
Reported-by: Jeremy Boo
It looks like the emails are still getting mangled: when I "View Source"
in Thunderbird I'm seeing "=" replaced with "=3D" for example.
Could you make sure you've run "py3 BaseTools\Scripts\SetupGit.py" to
configure your edk2 repo? That should also cause a cover letter to be
generated when you
Hi Liming,
Yes, it is good to us if catch this stable tag 202302.
Thank you very much
-邮件原件-
发件人: gaoliming [mailto:gaolim...@byosoft.com.cn]
发送时间: 2023年2月15日 11:59
收件人: 'xueshengfeng'; devel@edk2.groups.io; jian.j.w...@intel.com
抄送: heinrich.schucha...@canonical.com; edhaya.chand...@ar
On 2/14/23 22:36, RichardHo [何明忠] via groups.io wrote:
diff --git a/UsbNetworkPkg/UsbNetworkPkg.dec b/UsbNetworkPkg/UsbNetworkPkg.dec
new file mode 100644
index 00..4506be6cf9
--- /dev/null
+++ b/UsbNetworkPkg/UsbNetworkPkg.dec
@@ -0,0 +1,46 @@
+## @file
+# This package defines Usb netwo
SetMem arguments 2+3 are in the wrong order, resulting in
the call having no effect because Length is zero.
Fix this by using ZeroMem instead.
Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=4205
Reported-by: Jeremy Boone
Signed-off-by: Gerd Hoffmann
---
ArmPkg/Filesystem/SemihostFs/A
On Fri, Jan 13, 2023 at 11:25:16 +0700, Nhi Pham wrote:
> From: Vu Nguyen
>
> This updates the PCIe modules to add support for
> Ampere Altra Max processor which features 128 PCIe
> Gen4 lanes (distributed across eight x16 RCAs) using
> 32 controllers.
>
> Signed-off-by: Nhi Pham
> ---
> .../A
On Tue, Jan 31, 2023 at 13:35:50 +0700, Nhi Pham via groups.io wrote:
> Hi Rebecca,
>
> ++ Harb who can give more insights on this. FYI, the original concern is
> https://edk2.groups.io/g/devel/message/98482
>
> On 1/18/2023 1:21 AM, Rebecca Cran wrote:
> > On 1/17/23 09:40, Ard Biesheuvel wrote:
On Mon, Feb 13, 2023 at 12:13:37 +0100, Ard Biesheuvel wrote:
> A pair of cleanups regarding the use of code that I will propose to
> remove from the core EDK2 in an upcoming series.
>
> Cc: Leif Lindholm
> Cc: Sami Mujawar
> Cc: Rebecca Cran
For series:
Reviewed-by: Leif Lindholm
> Ard Bie
On 15/02/2023 05:36, RichardHo [何明忠] via groups.io wrote:
On 15/02/2023 05:36, RichardHo [何明忠] via groups.io wrote:
On 15/02/2023 05:36, RichardHo [何明忠] via groups.io wrote:
On 15/02/2023 05:36, RichardHo [何明忠] via groups.io wrote:
On 15/02/2023 05:36, RichardHo [何明忠] via groups.io wrote:
+ if (
On Tue, Feb 14, 2023 at 09:28:49AM -0800, Dionna Amalie Glaze wrote:
> >
> > Do you have any pointers on the IVARS service? Documentation, guest
> > code, host code?
> >
>
> Agh, I thought for sure there was a public API for VM owners to view
> or change their UEFI variables, but I guess not. It'
>
> So you essentially are hoping this will never ever change and hard-code
> the 8k in both PEI module and PiSmmCpuDxeSmm. I'd suggest to add a
Yes, 8k is bigger than the real usage case.
> field to the HOB struct instead. If you want stick to the hardcoded 8k
> please add a note saying so to
Thanks Gerd, I will add more info to explain the reversed mem info. but I don't
want add the size info because it depends on the producer. Just indicate it
should cover what contents for each cpu.
> -Original Message-
> From: Gerd Hoffmann
> Sent: Tuesday, February 14, 2023 6:20 PM
>
Christine,
If BaseTools related changes is implemented in edk2-basetools repo,
does that mean if I only checkout edk2 repo, I am using an older version of
BaseTools?
Thanks,
Ray
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Yuwei
> Chen
> Sent: Wednesday, February 15, 2
Reviewed-by: Jiewen Yao
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Gerd
> Hoffmann
> Sent: Tuesday, February 14, 2023 3:20 AM
> To: devel@edk2.groups.io
> Cc: Oliver Steffen ; Pawel Polawski
> ; Gerd Hoffmann
> Subject: [edk2-devel] [PATCH 0/4] CryptoPkg/BaseCryptLib
From: Abdul Lateef Attar
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182
Implements interfaces to read and write save state
registers of AMD's processor family.
Initializes processor SMMADDR and MASK depends
on PcdSmrrEnable flag.
Program or corrects the IP once control returns from SMM.
From: Abdul Lateef Attar
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182
Adds initial defination for AMD's SmmCpuFeaturesLib
library implementation.
All function's body either empty or just returns
value. Its initial skeleton of library implementation.
Cc: Paul Grimes
Cc: Garrett Kirke
From: Abdul Lateef Attar
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182
moves Intel-specific code to the arch-dependent file.
Other processor families might have different
implementation of these functions.
Hence, moving out of the common file.
Cc: Abner Chang
Cc: Garrett Kirkendall
From: Abdul Lateef Attar
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182
Implements SmmSmramSaveStateLib Library class for
AMD cpu family.
Cc: Paul Grimes
Cc: Garrett Kirkendall
Cc: Abner Chang
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Signed-off-by: Abdul Latee
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182
Adds SmmSmramSaveStateLib Library class in UefiCpuPkg.dec.
Adds function declaration header file.
Cc: Paul Grimes
Cc: Garrett Kirkendall
Cc: Abner Chang
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Signed-off-by: Abdul
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182
Adds an SMM SMRAM save-state map for AMD processors.
SMRAM save state maps for the AMD processor family are now supported.
Save state map structure is added based on
AMD64 Architecture Programmer's Manual, Volume 2, Section 10.2.
The AMD le
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
PR: https://github.com/tianocore/edk2/pull/4044
V5 delta changes:
rebase to master branch.
updated Reviewed-by
V4 delta changes:
rebase to master branch.
added reviewed-by.
V3 delta changes:
Addr
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