the error message is like:
~~~
Number of info messages: 1
Writing design to file system-routed.ncd
PAR done!
cd build-rescue && bitgen -g LCK_cycle:6 -g Binary:Yes -g INIT_9K:Yes -w
system-routed.ncd system.bit
Release 13.1 - Bitgen O.40d (lin64)
Copyright (c) 1995-2011 Xilinx, Inc. All righ
On 08/12/2011 09:08 AM, Werner Almesberger wrote:
> Do you remember what the M1 was doing when you powered it down
> the last time before the NOR got corrupted ? And was that task
> accessing the NOR in any way ?
it is rendering. then I just un-plug the power dc adapter male plug
(not normal shutd
Xiangfu Liu wrote:
> sorry. not clear about this. the origin is '1', it changed from '1' --> '0'
Ah, much better :-) This would then be consistent with a power
sequencing problem, e.g., if the FPGA core goes down faster
than the NOR.
Another explanation could be a communication problem between NO
On 08/12/2011 08:31 AM, Werner Almesberger wrote:
> Xiangfu Liu wrote:
>> I met once yesterday:
>> http://en.qi-hardware.com/irclogs/latest.log.html#t10:07
the correct link is
http://en.qi-hardware.com/irclogs/qi-hardware_2011-08-11.log.html#t09:42
>>
>> xiangfu I tried 7 times then it
Xiangfu Liu wrote:
> I met once yesterday:
> http://en.qi-hardware.com/irclogs/latest.log.html#t10:07
>
> xiangfu I tried 7 times then it can not boot up. then I use jtag read
> the standby back.
> xiangfu diff with origin one. I got one diff:
> xiangfu -a80 26cc 00
On 08/11/2011 09:59 PM, Wolfgang Spraul wrote:
>> run 2 boards do that too sometimes;
> oops. First time I hear that :-) That's a pretty serious problem,
> I was just going to go through some extensive hunt with my board
> and Xiangfu's to try to reproduce it.
I met once yesterday:
http://en.qi-ha
> run 2 boards do that too sometimes;
oops. First time I hear that :-) That's a pretty serious problem,
I was just going to go through some extensive hunt with my board
and Xiangfu's to try to reproduce it.
But if you say you saw it before, that's encouraging because we
might be able to reproduce
hadez,
> first of all, sorry for unearthing such an old thread.
Hey, it's the other way round! Thanks for getting back to this after
a short break! :-)
We need to get to the bottom of the problem you are experiencing and
depend on your continued interest to help us with that. If we don't,
the pro
Hi Sebastien,
first of all, sorry for unearthing such an old thread.
I have to admit I got sidetracked by my day job accompanied by a slight
shift in priorities.
However, my MMOne still suffers from the freezing issue.
Would it be possible for you to take a quick look at the board if I
brin
Sebastien Bourdeauducq wrote:
> run 2 boards do that too sometimes; on run 3 maybe the reset circuit is
> giving yet more trouble because of PVT variations of the parts which
> make it non-working on some boards. Just a guess, but if this is the
> case, hopefully Werner's gate-based circuit will be
On Thu, 2011-08-11 at 09:09 +, Wolfgang Spraul wrote:
> One problem that I see emerging more now is that some boards fail
> after X full power to rendering cycles. So the board renders fine (30
> seconds each time), and it can power cycle, but after a number of
> power cycles it suddenly falls
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