commit 72f79f9e35bd3f78ee8853f2fcacaa197d23ebac upstream.
Subject: [PATCH 3.16 350/357] ahci_xgene: Removing NCQ support from the APM
X-Gene SoC AHCI SATA Host Controller driver.
This patch removes the NCQ support from the APM X-Gene SoC AHCI
Host Controller driver as it doesn't support it.
Hi,
On 10/05/2014 05:17 PM, jonsm...@gmail.com wrote:
On Sun, Oct 5, 2014 at 11:16 AM, Hans de Goede hdego...@redhat.com wrote:
Hi,
On 10/05/2014 05:07 PM, jonsm...@gmail.com wrote:
On Sun, Oct 5, 2014 at 10:27 AM, Hans de Goede hdego...@redhat.com wrote:
Hi,
On 10/05/2014 02:52 PM,
On Thu, Oct 02, 2014 at 04:02:58PM +0200, Linus Walleij wrote:
On Wed, Sep 24, 2014 at 2:40 PM, Sascha Hauer s.ha...@pengutronix.de wrote:
On Wed, Sep 24, 2014 at 01:23:09PM +0200, Linus Walleij wrote:
I haven't got to reviewing the driver, but this looks just wrong.
Have the magic
Hi,
On 10/05/2014 10:34 PM, jonsm...@gmail.com wrote:
On Sun, Oct 5, 2014 at 4:01 PM, Mike Turquette mturque...@linaro.org wrote:
Quoting jonsm...@gmail.com (2014-10-05 10:09:52)
I edited the subject line to something more appropriate. This impacts
a lot of platforms and we should be getting
Hi,
On 10/05/2014 10:01 PM, Mike Turquette wrote:
Quoting jonsm...@gmail.com (2014-10-05 10:09:52)
I edited the subject line to something more appropriate. This impacts
a lot of platforms and we should be getting more replies from people
on the ARM kernel list. This is likely something that
On 06.10.2014 01:11, Benoit Masson wrote:
Le 3 oct. 2014 à 17:41, Sebastian Hesselbarth
sebastian.hesselba...@gmail.com a écrit :
On 10/03/2014 05:29 PM, Benoit Masson wrote:
Le 3 oct. 2014 à 17:06, Sebastian Hesselbarth sebastian.hesselba...@gmail.com
a écrit :
On 10/03/2014 04:11 PM,
Hi Sebastian,
[...]
NR_IRQS:16 nr_irqs:16 16
L2C: device tree omits to specify unified cache
Jason, Thomas, Gregory,
we should add a cache-unified to the l2cc nodes for all SoCs.
Right,
I take care of it.
Thanks,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers,
This is version 3 of the series that adds support for the ltc2952 powerpath
chip.
This series adds a driver for the LTC2952, an external power control chip, which
signals the OS to shut down. Additionally this driver lets the kernel power
down the board.
This driver was tested with:
- kernel
From: René Moll li...@r-moll.nl
Signed-off-by: René Moll li...@r-moll.nl
Signed-off-by: Tjerk Hofmeijer tjerk.hofmei...@xsens.com
Signed-off-by: Frans Klaver frans.kla...@xsens.com
---
.../bindings/power/reset/ltc2952-poweroff.txt | 31 ++
1 file changed, 31
From: René Moll li...@r-moll.nl
The LTC2952 allows control over system power using a push button. It also
supports powering down the board from a controller on the board.
If the power button is pushed, the ltc2952 starts a 400ms window to
properly shut down the software. This window can be
Hi Simon,
On Mon, Oct 6, 2014 at 4:36 AM, Simon Horman ho...@verge.net.au wrote:
On Fri, Oct 03, 2014 at 05:11:34PM +0200, Geert Uytterhoeven wrote:
Add a stdout-path property so that automatic console selection works
in the absence of a console= parameter on the kernel command line.
Remove
On Mon, 29 Sep 2014 13:02:21 -0700
, Gaurav Minocha gaurav.minocha...@gmail.com
wrote:
On Mon, Sep 29, 2014 at 1:07 AM, Geert Uytterhoeven
ge...@linux-m68k.org wrote:
Hi Gaurav, Grant,
On Sun, Sep 28, 2014 at 9:38 PM, Gaurav Minocha
gaurav.minocha...@gmail.com wrote:
This patch
The device tree structure is composed of two lists; the 'allnodes' list
which is a singly linked list containing every node in the tree, and the
child-parent structure where each parent node has a singly linked list
of children. All of the data in the allnodes list can be easily
reproduced with
Hi,
On Fri, Oct 03, 2014 at 01:52:05PM +0200, Hans de Goede wrote:
From: Luc Verhaegen l...@skynet.be
This claims and enables clocks listed in the simple framebuffer dt node.
This is needed so that the display engine, in case the required clocks
are known by the kernel code and are
On Mon, Oct 06, 2014 at 10:43:28AM +0200, Geert Uytterhoeven wrote:
Hi Simon,
On Mon, Oct 6, 2014 at 4:36 AM, Simon Horman ho...@verge.net.au wrote:
On Fri, Oct 03, 2014 at 05:11:34PM +0200, Geert Uytterhoeven wrote:
Add a stdout-path property so that automatic console selection works
in
Hi,
On 10/06/2014 10:55 AM, Maxime Ripard wrote:
Hi,
On Fri, Oct 03, 2014 at 01:52:05PM +0200, Hans de Goede wrote:
From: Luc Verhaegen l...@skynet.be
This claims and enables clocks listed in the simple framebuffer dt node.
This is needed so that the display engine, in case the required
Hi Benoit,
NR_IRQS:16 nr_irqs:16 16
L2C: device tree omits to specify unified cache
Jason, Thomas, Gregory,
we should add a cache-unified to the l2cc nodes for all SoCs.
It seems all armada dtsi using marvell,aurora-system-cache doesn't have the
cache-unified entry isn't this on
On Fri, Oct 03, 2014 at 10:06:51PM +0100, Dmitry Torokhov wrote:
[adding devicetree folks...]
On Fri, Oct 03, 2014 at 02:03:57PM -0700, Dmitry Torokhov wrote:
Hi Duson,
On Tue, Jan 07, 2014 at 11:08:03AM +0800, Duson Lin wrote:
This driver adds support for elan i2c/smbus touchpad
On Mon, Oct 06, 2014 at 11:11:44AM +0200, Hans de Goede wrote:
Hi,
On 10/06/2014 10:55 AM, Maxime Ripard wrote:
Hi,
On Fri, Oct 03, 2014 at 01:52:05PM +0200, Hans de Goede wrote:
From: Luc Verhaegen l...@skynet.be
This claims and enables clocks listed in the simple framebuffer dt
The L2 cache controller on the Armada 370 and Armada XP SoCs is a
unified cache. Moreover, the Aurora cache controller is compatible
with the L2x0 cache controller: the cache-unified property is
required by its binding.
This patch fixes the Aurora L2 cache node for the Armada 370 and
Armada XP
On Fri, Sep 26, 2014 at 7:25 PM, Suman Anna s-a...@ti.com wrote:
I am yet to receive any comments on v6, but that series should address
both your need for a probe deferral and Ohad's request to not change any
return types. Please give it a try and let me know if you have any comments.
Guys,
Hi
On Mon, Oct 6, 2014 at 9:39 AM, Hans de Goede hdego...@redhat.com wrote:
Hi,
On 10/05/2014 10:01 PM, Mike Turquette wrote:
Quoting jonsm...@gmail.com (2014-10-05 10:09:52)
I edited the subject line to something more appropriate. This impacts
a lot of platforms and we should be getting
On Sun, Oct 5, 2014 at 10:01 PM, Mike Turquette mturque...@linaro.org wrote:
Quoting jonsm...@gmail.com (2014-10-05 10:09:52)
I edited the subject line to something more appropriate. This impacts
a lot of platforms and we should be getting more replies from people
on the ARM kernel list. This
On Wed, Oct 01, 2014 at 04:53:01PM +0200, Boris Brezillon wrote:
From: Boris BREZILLON boris.brezil...@free-electrons.com
The HLCDC IP available in some Atmel SoCs (i.e. sam9x5i.e. at91sam9n12,
at91sam9x5 family or sama5d3 family) provide a PWM device.
The DT bindings used for this PWM
On Fri, Oct 3, 2014 at 1:52 PM, Hans de Goede hdego...@redhat.com wrote:
+static void
+simplefb_clocks_init(struct platform_device *pdev, struct list_head *list)
+{
+ struct device_node *np = pdev-dev.of_node;
+ int clock_count, i;
+
+ INIT_LIST_HEAD(list);
+
+ if
On 10/06/2014 11:37 AM, Gregory CLEMENT wrote:
The L2 cache controller on the Armada 370 and Armada XP SoCs is a
unified cache. Moreover, the Aurora cache controller is compatible
with the L2x0 cache controller: the cache-unified property is
required by its binding.
This patch fixes the Aurora
On Wed, Oct 01, 2014 at 04:53:00PM +0200, Boris Brezillon wrote:
[...]
diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
index b800783..afb896b 100644
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
@@ -50,6 +50,16 @@ config PWM_ATMEL
To compile this driver as a module,
On Wed, Oct 01, 2014 at 04:52:58PM +0200, Boris Brezillon wrote:
[...]
diff --git a/drivers/mfd/atmel-hlcdc.c b/drivers/mfd/atmel-hlcdc.c
[...]
@@ -0,0 +1,122 @@
+/*
+ * Copyright (C) 2014 Free Electrons
+ * Copyright (C) 2014 Atmel
+ *
+ * Author: Boris BREZILLON
On Wed, Oct 01, 2014 at 04:53:03PM +0200, Boris Brezillon wrote:
From: Boris BREZILLON boris.brezil...@free-electrons.com
The Atmel HLCDC (HLCD Controller) IP available on some Atmel SoCs (i.e.
at91sam9n12, at91sam9x5 family or sama5d3 family) provides a display
controller device.
The
On Wed, Oct 01, 2014 at 04:53:07PM +0200, Boris Brezillon wrote:
[...]
diff --git a/arch/arm/boot/dts/sama5d3xdm.dtsi
b/arch/arm/boot/dts/sama5d3xdm.dtsi
[...]
+ bl_reg: backlight_regulator {
+ compatible = regulator-fixed;
+ regulator-name =
On Wed, Oct 01, 2014 at 04:53:08PM +0200, Boris Brezillon wrote:
From: Boris BREZILLON boris.brezil...@free-electrons.com
Enable LCD related nodes.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/sama5d31ek.dts | 20
On Mon, Oct 06, 2014 at 05:20:14AM +0100, Ganapatrao Kulkarni wrote:
Hi Mark,
On Fri, Oct 3, 2014 at 4:35 PM, Mark Rutland mark.rutl...@arm.com wrote:
On Thu, Sep 25, 2014 at 10:03:57AM +0100, Ganapatrao Kulkarni wrote:
Adding Documentation for dt binding for memory to numa node mapping.
On Mon, Oct 6, 2014 at 3:27 AM, Hans de Goede hdego...@redhat.com wrote:
Hi,
On 10/05/2014 10:34 PM, jonsm...@gmail.com wrote:
On Sun, Oct 5, 2014 at 4:01 PM, Mike Turquette mturque...@linaro.org wrote:
Quoting jonsm...@gmail.com (2014-10-05 10:09:52)
I edited the subject line to something
On Mon, Oct 06, 2014 at 06:14:36AM +0100, Ganapatrao Kulkarni wrote:
Hi Mark,
On Fri, Oct 3, 2014 at 5:43 PM, Mark Rutland mark.rutl...@arm.com wrote:
On Thu, Sep 25, 2014 at 10:03:59AM +0100, Ganapatrao Kulkarni wrote:
Adding numa support for arm64 based platforms.
This version creates
Hi,
W dniu 2014-10-04 18:19, Fabio Estevam pisze:
Janusz,
On Mon, Sep 29, 2014 at 11:11 AM, Janusz Uzycki j.uzy...@elproma.com.pl wrote:
So I'm deleting all of these now, please resend the latest
versions you have, with properly versioning
and order information.
Sure. If you don't want to
On 25/09/14 09:23, Thierry Reding wrote:
How are cameras different? The CPU wants to capture video data from the
camera, so it needs to go look for a video capture device, which in turn
needs to involve a sensor.
Let's say we have an XXX-to-YYY encoder. We use that encoder to convert
the
On Mon, Oct 06, 2014 at 11:13:51AM +0100, Thierry Reding wrote:
On Wed, Oct 01, 2014 at 04:53:01PM +0200, Boris Brezillon wrote:
From: Boris BREZILLON boris.brezil...@free-electrons.com
The HLCDC IP available in some Atmel SoCs (i.e. sam9x5i.e. at91sam9n12,
at91sam9x5 family or sama5d3
On Mon, Oct 6, 2014 at 8:34 AM, Janusz Użycki j.uzy...@elproma.com.pl wrote:
Hi,
W dniu 2014-10-04 18:19, Fabio Estevam pisze:
Janusz,
On Mon, Sep 29, 2014 at 11:11 AM, Janusz Uzycki j.uzy...@elproma.com.pl
wrote:
So I'm deleting all of these now, please resend the latest
versions you
On Mon, 6 Oct 2014 12:49:17 +0200
Thierry Reding thierry.red...@gmail.com wrote:
On Wed, Oct 01, 2014 at 04:52:58PM +0200, Boris Brezillon wrote:
[...]
diff --git a/drivers/mfd/atmel-hlcdc.c b/drivers/mfd/atmel-hlcdc.c
[...]
@@ -0,0 +1,122 @@
+/*
+ * Copyright (C) 2014 Free Electrons
On Mon, 6 Oct 2014 12:46:35 +0200
Thierry Reding thierry.red...@gmail.com wrote:
On Wed, Oct 01, 2014 at 04:53:00PM +0200, Boris Brezillon wrote:
[...]
diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
index b800783..afb896b 100644
--- a/drivers/pwm/Kconfig
+++
Add a stdout-path property so that automatic console selection works
in the absence of a console= parameter on the kernel command line.
Note that we have to keep the console=ttyS1,115200n81 parameter in
chosen/bootargs, else the console will use the default setting of 9600
baud.
Signed-off-by:
Hi,
On 10/06/2014 01:26 PM, jonsm...@gmail.com wrote:
On Mon, Oct 6, 2014 at 3:27 AM, Hans de Goede hdego...@redhat.com wrote:
Hi,
On 10/05/2014 10:34 PM, jonsm...@gmail.com wrote:
snip
The 'clean up' command only releases resources that no one was
claimed. The device specific framebuffer
Hi,
On 10/06/2014 11:48 AM, David Herrmann wrote:
Hi
On Mon, Oct 6, 2014 at 9:39 AM, Hans de Goede hdego...@redhat.com wrote:
Hi,
On 10/05/2014 10:01 PM, Mike Turquette wrote:
Quoting jonsm...@gmail.com (2014-10-05 10:09:52)
I edited the subject line to something more appropriate. This
On Mon, 6 Oct 2014 12:54:34 +0200
Thierry Reding thierry.red...@gmail.com wrote:
On Wed, Oct 01, 2014 at 04:53:03PM +0200, Boris Brezillon wrote:
From: Boris BREZILLON boris.brezil...@free-electrons.com
The Atmel HLCDC (HLCD Controller) IP available on some Atmel SoCs (i.e.
at91sam9n12,
On Mon, Oct 06, 2014 at 12:33:26PM +0100, Mark Rutland wrote:
On Mon, Oct 06, 2014 at 11:13:51AM +0100, Thierry Reding wrote:
On Wed, Oct 01, 2014 at 04:53:01PM +0200, Boris Brezillon wrote:
From: Boris BREZILLON boris.brezil...@free-electrons.com
The HLCDC IP available in some Atmel
On Mon, 6 Oct 2014 13:01:16 +0200
Thierry Reding thierry.red...@gmail.com wrote:
On Wed, Oct 01, 2014 at 04:53:07PM +0200, Boris Brezillon wrote:
[...]
diff --git a/arch/arm/boot/dts/sama5d3xdm.dtsi
b/arch/arm/boot/dts/sama5d3xdm.dtsi
[...]
+ bl_reg: backlight_regulator {
+
On Mon, Oct 06, 2014 at 01:50:09PM +0200, Boris Brezillon wrote:
On Mon, 6 Oct 2014 12:46:35 +0200 Thierry Reding thierry.red...@gmail.com
wrote:
On Wed, Oct 01, 2014 at 04:53:00PM +0200, Boris Brezillon wrote:
[...]
+ if (pres ATMEL_HLCDC_PWMPS_MAX)
+ return -EINVAL;
I
On Mon, Oct 06, 2014 at 02:14:40PM +0200, Boris Brezillon wrote:
On Mon, 6 Oct 2014 12:54:34 +0200
Thierry Reding thierry.red...@gmail.com wrote:
On Wed, Oct 01, 2014 at 04:53:03PM +0200, Boris Brezillon wrote:
From: Boris BREZILLON boris.brezil...@free-electrons.com
The Atmel
The driver provide memory allocator which can
be used by others drivers to allocate memory inside OCM.
All location for 64kB blocks are supported
and driver is trying to allocate the largest continuous
block of memory.
Checking mpcore addressing filterring is not done here
but could be added in
Add the on-chip-memory controller node to the Zynq devicetree.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v3:
- Extract from OCM driver
Changes in v2: None
arch/arm/boot/dts/zynq-7000.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git
Add the missing CAN devices node including their pin muxing. The required
clock node already exists.
Signed-off-by: Alexander Stein alexander.st...@systec-electronic.com
---
arch/arm/boot/dts/at91sam9263.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git
On Mon, Oct 06, 2014 at 02:25:38PM +0200, Boris Brezillon wrote:
On Mon, 6 Oct 2014 13:01:16 +0200 Thierry Reding thierry.red...@gmail.com
wrote:
On Wed, Oct 01, 2014 at 04:53:07PM +0200, Boris Brezillon wrote:
[...]
diff --git a/arch/arm/boot/dts/sama5d3xdm.dtsi
On Tue, Sep 30, 2014 at 11:54 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
On Sat, Sep 27, 2014 at 04:49:52PM +0800, Chen-Yu Tsai wrote:
This patch unifies the sun6i AHB1 clock, originally supported
with separate mux and divider clks. It also adds support for
the pre-divider on
On Mon, 6 Oct 2014 12:13:51 +0200
Thierry Reding thierry.red...@gmail.com wrote:
On Wed, Oct 01, 2014 at 04:53:01PM +0200, Boris Brezillon wrote:
From: Boris BREZILLON boris.brezil...@free-electrons.com
The HLCDC IP available in some Atmel SoCs (i.e. sam9x5i.e. at91sam9n12,
at91sam9x5
On Mon, 6 Oct 2014 14:40:15 +0200
Thierry Reding thierry.red...@gmail.com wrote:
On Mon, Oct 06, 2014 at 02:25:38PM +0200, Boris Brezillon wrote:
On Mon, 6 Oct 2014 13:01:16 +0200 Thierry Reding thierry.red...@gmail.com
wrote:
On Wed, Oct 01, 2014 at 04:53:07PM +0200, Boris Brezillon
On Mon, Oct 06, 2014 at 02:59:12PM +0200, Boris Brezillon wrote:
On Mon, 6 Oct 2014 12:13:51 +0200
Thierry Reding thierry.red...@gmail.com wrote:
On Wed, Oct 01, 2014 at 04:53:01PM +0200, Boris Brezillon wrote:
From: Boris BREZILLON boris.brezil...@free-electrons.com
The HLCDC IP
On Mon, Oct 06, 2014 at 03:11:11PM +0200, Boris Brezillon wrote:
On Mon, 6 Oct 2014 14:40:15 +0200
Thierry Reding thierry.red...@gmail.com wrote:
On Mon, Oct 06, 2014 at 02:25:38PM +0200, Boris Brezillon wrote:
On Mon, 6 Oct 2014 13:01:16 +0200 Thierry Reding
thierry.red...@gmail.com
On Mon, Oct 6, 2014 at 8:58 PM, Chen-Yu Tsai w...@csie.org wrote:
On Tue, Sep 30, 2014 at 11:54 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
On Sat, Sep 27, 2014 at 04:49:52PM +0800, Chen-Yu Tsai wrote:
This patch unifies the sun6i AHB1 clock, originally supported
with separate
The HLCDC IP available on some Atmel SoCs (i.e. at91sam9n12, at91sam9x5
family or sama5d3 family) exposes 2 subdevices:
- a display controller (controlled by a DRM driver)
- a PWM chip
This patch adds documentation for atmel-hlcdc DT bindings.
Signed-off-by: Boris Brezillon
Hi Lee,
As proposed in my last atmel-hlcdc series I have split the series in order
to get the accepted parts merged.
This series is the one all others depend on.
Could you take it in your tree so that other maintainers can rely on the
fact this part will be merged before other parts.
Moreover,
The HLCDC IP available on some Atmel SoCs (i.e. at91sam9n12, at91sam9x5
family or sama5d3 family) exposes 2 subdevices:
- a display controller (controlled by a DRM driver)
- a PWM chip
The MFD device provides a regmap and several clocks (those connected
to this hardware block) to its subdevices.
On Tue, 16 Sep 2014 14:52:32 +0300
, Mika Westerberg mika.westerb...@linux.intel.com
wrote:
Device Tree is used in many embedded systems to describe the system
configuration to the OS. It supports attaching properties or name-value
pairs to the devices it describe. With these properties one
On Mon, 6 Oct 2014 14:35:06 +0200
Thierry Reding thierry.red...@gmail.com wrote:
On Mon, Oct 06, 2014 at 02:14:40PM +0200, Boris Brezillon wrote:
On Mon, 6 Oct 2014 12:54:34 +0200
Thierry Reding thierry.red...@gmail.com wrote:
On Wed, Oct 01, 2014 at 04:53:03PM +0200, Boris Brezillon
Hi Tomi and Thierry,
On Monday 06 October 2014 14:34:00 Tomi Valkeinen wrote:
On 25/09/14 09:23, Thierry Reding wrote:
How are cameras different? The CPU wants to capture video data from the
camera, so it needs to go look for a video capture device, which in turn
needs to involve a sensor.
On Mon, Oct 6, 2014 at 3:59 AM, Grant Likely grant.lik...@linaro.org wrote:
The device tree structure is composed of two lists; the 'allnodes' list
which is a singly linked list containing every node in the tree, and the
child-parent structure where each parent node has a singly linked list
of
On Mon, 6 Oct 2014 15:30:59 +0200
Thierry Reding thierry.red...@gmail.com wrote:
On Mon, Oct 06, 2014 at 03:11:11PM +0200, Boris Brezillon wrote:
On Mon, 6 Oct 2014 14:40:15 +0200
Thierry Reding thierry.red...@gmail.com wrote:
On Mon, Oct 06, 2014 at 02:25:38PM +0200, Boris Brezillon
Hi Thierry,
This patch series adds support for the atmel-hlcdc-pwm device provided
by the atmel-hlcdc MFD driver.
It depends on this series [1] implementing the MFD driver.
Best Regards,
Boris
[1]http://www.mail-archive.com/devicetree@vger.kernel.org/msg44979.html
Changes since v7:
-
The HLCDC IP available in some Atmel SoCs (i.e. sam9x5i.e. at91sam9n12,
at91sam9x5 family or sama5d3 family) provide a PWM device.
The DT bindings used for this PWM device is following the default 3 cells
bindings described in Documentation/devicetree/bindings/pwm/pwm.txt.
Signed-off-by: Boris
The HLCDC IP available in some Atmel SoCs (i.e. sam9x5i.e. at91sam9n12,
at91sam9x5 family or sama5d3 family) provide a PWM device.
This driver add support for a PWM chip exposing a single PWM device (which
will most likely be used to drive a backlight device).
Signed-off-by: Boris Brezillon
Hi,
On 02/10/2014 at 13:19:45 +0200, Alexander Stein wrote :
Add the missing CAN devices node including their pin muxing and clocks.
Signed-off-by: Alexander Stein alexander.st...@systec-electronic.com
---
Changes in v2:
* Adjusted pinmux comment
arch/arm/boot/dts/at91sam9x5.dtsi | 48
On 06/10/2014 at 14:40:07 +0200, Alexander Stein wrote :
Add the missing CAN devices node including their pin muxing. The required
clock node already exists.
Signed-off-by: Alexander Stein alexander.st...@systec-electronic.com
Acked-by: Alexandre Belloni alexandre.bell...@free-electrons.com
On Mon, Oct 06, 2014 at 03:53:58PM +0200, Boris Brezillon wrote:
On Mon, 6 Oct 2014 14:35:06 +0200
Thierry Reding thierry.red...@gmail.com wrote:
On Mon, Oct 06, 2014 at 02:14:40PM +0200, Boris Brezillon wrote:
On Mon, 6 Oct 2014 12:54:34 +0200
Thierry Reding thierry.red...@gmail.com
Add the missing CAN devices node including their pin muxing and clocks.
Signed-off-by: Alexander Stein alexander.st...@systec-electronic.com
Acked-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
Changes in v3:
* Match the pin name to the ones in the datasheet.
On Mon, Oct 06, 2014 at 02:50:21PM +0100, Grant Likely wrote:
On Tue, 16 Sep 2014 14:52:32 +0300
, Mika Westerberg mika.westerb...@linux.intel.com
wrote:
Device Tree is used in many embedded systems to describe the system
configuration to the OS. It supports attaching properties or
Hi Thierry,
On Tuesday 23 September 2014 16:49:38 Thierry Reding wrote:
On Tue, Sep 23, 2014 at 02:52:24PM +0300, Laurent Pinchart wrote:
On Tuesday 23 September 2014 13:47:40 Andrzej Hajda wrote:
On 09/23/2014 01:23 PM, Laurent Pinchart wrote:
[...]
This becomes an issue even on Linux
On 10/04/2014 11:21 PM, Masami Hiramatsu wrote:
(2014/10/02 1:31), ttha...@opensource.altera.com wrote:
+void socfpga_init_ocram_ecc(void)
+{
+struct device_node *np;
+const __be32 *prop;
+u32 ocr_edac_addr, iram_addr, len;
+void __iomem *mapped_ocr_edac_addr;
+size_t
Hi Tomi,
On Wednesday 24 September 2014 11:42:06 Tomi Valkeinen wrote:
On 23/09/14 17:45, Thierry Reding wrote:
On Tue, Sep 23, 2014 at 02:31:35PM +0300, Tomi Valkeinen wrote:
On 23/09/14 12:39, Thierry Reding wrote:
My point is that if you use plain phandles you usually have the
On Sun, Oct 5, 2014 at 4:59 PM, Beniamino Galvani b.galv...@gmail.com wrote:
This adds Tronsmart to the list of device tree vendor prefixes.
Signed-off-by: Beniamino Galvani b.galv...@gmail.com
Acked-by: Rob Herring r...@kernel.org
---
Documentation/devicetree/bindings/vendor-prefixes.txt
Hi Jean,
On Monday 06 October 2014 17:33:11, Nicolas Ferre wrote:
On 06/10/2014 16:27, Alexander Stein :
Add the missing CAN devices node including their pin muxing and clocks.
Signed-off-by: Alexander Stein alexander.st...@systec-electronic.com
Acked-by: Alexandre Belloni
On Sun, Oct 5, 2014 at 11:59 PM, Beniamino Galvani b.galv...@gmail.com wrote:
Hi,
this patchset introduces support for Amlogic Meson8, which is a family
of quad-core Cortex-A9 SoCs used in tablets and set-top boxes.
For the whole patchset
Acked-by: Carlo Caione ca...@caione.org
--
Carlo
On Mon, 6 Oct 2014 16:26:10 +0200
Thierry Reding thierry.red...@gmail.com wrote:
On Mon, Oct 06, 2014 at 03:53:58PM +0200, Boris Brezillon wrote:
On Mon, 6 Oct 2014 14:35:06 +0200
Thierry Reding thierry.red...@gmail.com wrote:
On Mon, Oct 06, 2014 at 02:14:40PM +0200, Boris Brezillon
On Mon, 2014-10-06 at 02:38PM +0200, Michal Simek wrote:
The driver provide memory allocator which can
be used by others drivers to allocate memory inside OCM.
All location for 64kB blocks are supported
and driver is trying to allocate the largest continuous
block of memory.
Checking
On 10/06/2014 01:11 AM, Benoit Masson wrote:
Le 3 oct. 2014 à 17:41, Sebastian Hesselbarth sebastian.hesselba...@gmail.com
a écrit :
On 10/03/2014 05:29 PM, Benoit Masson wrote:
Le 3 oct. 2014 à 17:06, Sebastian Hesselbarth sebastian.hesselba...@gmail.com
a écrit :
On 10/03/2014 04:11 PM,
On Mon, 06 Oct 2014, Boris Brezillon wrote:
As proposed in my last atmel-hlcdc series I have split the series in order
to get the accepted parts merged.
This series is the one all others depend on.
Could you take it in your tree so that other maintainers can rely on the
fact this part will
On 10/6/14, 7:32, Mika Westerberg mika.westerb...@linux.intel.com
wrote:
On Mon, Oct 06, 2014 at 02:50:21PM +0100, Grant Likely wrote:
+/* ACPI _DSD device properties UUID:
daffd814-6eba-4d8c-8a91-bc9bbf4aa301 */
+static const u8 prp_uuid[16] = {
+ 0x14, 0xd8, 0xff, 0xda, 0xba, 0x6e,
On Mon, Oct 06, 2014 at 10:24:52AM +0100, Mark Rutland wrote:
On Fri, Oct 03, 2014 at 10:06:51PM +0100, Dmitry Torokhov wrote:
[adding devicetree folks...]
On Fri, Oct 03, 2014 at 02:03:57PM -0700, Dmitry Torokhov wrote:
diff --git a/Documentation/devicetree/bindings/input/elan_i2c.txt
On Sat, 27 Sep 2014, Jonathan Cameron wrote:
On 25/09/14 12:20, Jacob Pan wrote:
X-Powers AXP288 is a customized PMIC for Intel Baytrail-CR platforms.
Similar
to AXP202/209, AXP288 comes with USB charger, more LDO and BUCK channels,
and
AD converters. It also provides extended status
On Mon, Oct 6, 2014 at 4:38 PM, Mark Rutland mark.rutl...@arm.com wrote:
On Mon, Oct 06, 2014 at 05:20:14AM +0100, Ganapatrao Kulkarni wrote:
Hi Mark,
On Fri, Oct 3, 2014 at 4:35 PM, Mark Rutland mark.rutl...@arm.com wrote:
On Thu, Sep 25, 2014 at 10:03:57AM +0100, Ganapatrao Kulkarni wrote:
On Mon, 6 Oct 2014 17:52:09 +0100
Lee Jones lee.jo...@linaro.org wrote:
Date: Mon, 6 Oct 2014 17:52:09 +0100
User-Agent: Mutt/1.5.21 (2010-09-15)
On Sat, 27 Sep 2014, Jonathan Cameron wrote:
On 25/09/14 12:20, Jacob Pan wrote:
X-Powers AXP288 is a customized PMIC for Intel
On Thu, Oct 02, 2014 at 01:37:48PM -0500, at...@opensource.altera.com wrote:
From: Alan Tull at...@opensource.altera.com
Add device tree bindings documentation for ltc2978.
Signed-off-by: Alan Tull at...@opensource.altera.com
---
v2: clean whitespace
---
Hi,
currently i'm porting a regulator driver and i've two question about regulator
constraints and DT binding:
Should a regulator driver rely on DT regulator constraints or not?
In case the constraints are not set by DT, what is the recommend behavior of a
regulator driver?
Best regards
On Mon, Oct 6, 2014 at 4:56 PM, Mark Rutland mark.rutl...@arm.com wrote:
On Mon, Oct 06, 2014 at 06:14:36AM +0100, Ganapatrao Kulkarni wrote:
Hi Mark,
On Fri, Oct 3, 2014 at 5:43 PM, Mark Rutland mark.rutl...@arm.com wrote:
On Thu, Sep 25, 2014 at 10:03:59AM +0100, Ganapatrao Kulkarni wrote:
On Fri, Oct 03, 2014 at 11:35:48PM +0800, Zhangfei Gao wrote:
From: Wei Yan sledge.yan...@huawei.com
I2C drivers for hix5hd2 soc series, including following chipset
Hi3716CV200, Hi3719CV100, Hi3718CV100, Hi3719MV100, Hi3718MV100.
Signed-off-by: Wei Yan sledge.yan...@huawei.com
On Fri, Oct 03, 2014 at 11:35:47PM +0800, Zhangfei Gao wrote:
From: Wei Yan sledge.yan...@huawei.com
Signed-off-by: Wei Yan sledge.yan...@huawei.com
Signed-off-by: Zhangfei Gao zhangfei@linaro.org
And while patch 2 needs an update anyhow...
+ status = disabled;
I think we can drop
On Mon, Oct 06, 2014 at 07:48:55PM +0200, Stefan Wahren wrote:
Should a regulator driver rely on DT regulator constraints or not?
In case the constraints are not set by DT, what is the recommend behavior of a
regulator driver?
The regulator driver should just pass any constraints it gets to
Signed-off-by: Max Filippov jcmvb...@gmail.com
---
.../interrupt-controller/cdns,xtensa-mx.txt| 18
.../interrupt-controller/cdns,xtensa-pic.txt | 25 ++
2 files changed, 43 insertions(+)
create mode 100644
On Thu, 25 Sep 2014, Johannes Pointner wrote:
Add documentation for compatible property of subnodes.
Signed-off-by: Johannes Pointner johannes.point...@br-automation.com
---
Documentation/devicetree/bindings/regulator/tps65217.txt | 7 ++-
On Thu, 25 Sep 2014, Johannes Pointner wrote:
This patchset adds the of_compatible string for the subdevices of the
tps65217.
The TPS65217 is missing of_compatible string in the mfd_cell for its
subdevices. This compatible string is necessary to use functions like
On Thu, 25 Sep 2014, Johannes Pointner wrote:
Adds of_compatible strings to mfd_cells for sub devices of the tps65217.
Signed-off-by: Johannes Pointner johannes.point...@br-automation.com
---
drivers/mfd/tps65217.c | 2 ++
1 file changed, 2 insertions(+)
Applied for v3.19.
diff --git
Hello.
On 10/02/2014 12:04 PM, Yoshihiro Shimoda wrote:
Signed-off-by: Yoshihiro Shimoda yoshihiro.shimoda...@renesas.com
---
arch/arm/boot/dts/r8a7790-lager.dts |5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts
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