On Wed, Jan 06, 2016 at 10:35:37AM -0500, Ilia Mirkin wrote:
> On Wed, Jan 6, 2016 at 10:26 AM, Sascha Hauer wrote:
> > On Wed, Jan 06, 2016 at 02:53:30PM +0100, Boris Brezillon wrote:
> >> Hi Sascha,
> >>
> >> On Wed, 6 Jan 2016 14:47:36 +0100
> >> Sascha Hauer wrote:
> >>
> >> > Hi Boris,
> >>
Dear Bjorn,
On Wed, 6 Jan 2016 12:20:03 -0600 Bjorn Helgaas wrote:
> [+cc Jisheng]
>
> On Fri, Dec 18, 2015 at 02:38:55PM +0200, Stanimir Varbanov wrote:
> > There is no guarantees that enabling ATU will hit the hardware
> > immediately, and subsequent accesses to configuration / IO spaces
> > a
Hi Marcel,
On 2016-01-05 08:39, Marcel Ziswiler wrote:
> From: Petr Štetiar
>
> Signed-off-by: Petr Štetiar
> Signed-off-by: Marcel Ziswiler
> ---
>
> Changes in v2:
> - clarify exact Apalis iMX6Q/D SoM type in cover letter
> - clarify exact Apalis iMX6Q/D module type and Ixora carrier board
Hi,
On Wednesday 06 January 2016 07:43 PM, Rob Herring wrote:
> On Wed, Jan 06, 2016 at 04:19:53PM +0530, Kishon Vijay Abraham I wrote:
>> Perform syscon configurations to get x2 mode to working in DRA74x and
>> DRA72x. Also add a new compatible string to dfferentiate
>> DRA72x and DRA74x, since b
Hi Rob,
Thanks for the comments.
On 1/4/2016 1:29 PM, Rob Herring wrote:
> On Thu, Dec 31, 2015 at 3:12 AM, Frank Rowand wrote:
>> From: Frank Rowand
>>
>> Create script to diff device trees.
>>
>> The device tree can be in any of the forms recognized by the dtc compiler:
>> - source
>> - b
On 01/06/2016 05:55 PM, Boris Brezillon wrote:
Add basic support for the sil902x RGB -> HDMI bridge.
This driver does not support audio output yet.
Signed-off-by: Boris Brezillon
---
Hello,
This patch is only adding basic support for the sil9022 chip.
As stated in the commit log, there's no
On Wed, Dec 23, 2015 at 06:28:15PM +0530, Rameshswar Prasad Sahu wrote:
> From: Rameshwar Prasad Sahu
>
> For interrupt controller that doesn't support irq_disable and hardware
> with level interrupt, an extra interrupt can be pending. This patch fixes
> the issue by setting IRQ_DISABLE_UNLAZY fl
On Wed, Jan 06, 2016 at 11:05:02AM +0100, Thomas Gleixner wrote:
> On Wed, 6 Jan 2016, Vinod Koul wrote:
> > On Wed, Jan 06, 2016 at 02:51:07PM +0530, Rameshwar Sahu wrote:
> > > >> @@ -1610,6 +1611,7 @@ static int xgene_dma_request_irqs(struct
> > > >> xgene_dma *pdma)
> > > >> /* Register
Signed-off-by: Yakir Yang
---
.../devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt
b/Documentation/devicetree/bindings/display/rockchip
RK3229 integrate an DesignedWare HDMI2.0 controller and an INNO HDMI2.0 phy,
the max output resolution is 4K.
Signed-off-by: Yakir Yang
---
drivers/gpu/drm/bridge/dw-hdmi.c| 33 ++-
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 380 +---
drivers/gpu/drm/rockc
RK3229 have integrated an DesignedWare HDMI controller and an INNO HDMI phy,
so we can still reuse the dw-hdmi driver for RK3229 HDMI controller, but
we need to create an separate driver for RK3229 HDMI PHY.
Yakir Yang (2):
drm: rockchip: hdmi: add RK3229 HDMI support
dt-bindings: add docume
Atmel devices in this family have some quirks not found in other similar
chips - they do not support a sequential read of the entire EEPROM
contents, and the control word sent at the start of each operation
varies in bit length.
This commit adds quirk support to the driver and modifies the read
im
This commit documents bindings to be added to the eeprom_93xx46 driver
which will allow:
- Device word size and read-only attributes to be specified.
- A device-specific compatible string for use with Atmel AT93C46D
EEPROMs.
- Specifying a GPIO line to function as a 'select' or 'enable'
This commit adds support to the eeprom_93x46 driver allowing a GPIO line
to function as a 'select' or 'enable' signal prior to accessing the
EEPROM.
Signed-off-by: Cory Tusar
Tested-by: Chris Healy
Reviewed-by: Vladimir Zapolskiy
---
drivers/misc/eeprom/eeprom_93xx46.c | 35 +++
This commit implements bindings in the eeprom_93xx46 driver allowing
device word size and read-only attributes to be specified via
devicetree.
Signed-off-by: Cory Tusar
Tested-by: Chris Healy
Reviewed-by: Vladimir Zapolskiy
---
drivers/misc/eeprom/eeprom_93xx46.c | 49 +
Compatible at93xx46 devices from both Microchip and Atmel expect a
word-based address, regardless of whether the device is strapped for 8-
or 16-bit operation. However, the offset parameter passed in when
reading or writing at a specific location is always specified in terms
of bytes.
This commit
This series of patches adds an initial set of devicetree bindings to the
eeprom_93xx46 driver which mirror the configuration options previously
available as a platform device. These bindings are then extended to
include support for specific Atmel devices in this family and also to
support GPIO-bas
在 2016/1/6 21:36, Rongrong Zou 写道:
在 2016/1/5 20:19, Arnd Bergmann 写道:
On Tuesday 05 January 2016 19:59:49 Rongrong Zou wrote:
在 2016/1/5 0:34, Arnd Bergmann 写道:
On Tuesday 05 January 2016 00:04:19 Rongrong Zou wrote:
在 2016/1/4 19:13, Arnd Bergmann 写道:
On Sunday 03 January 2016 20:24:14 Ron
On 11/23/15 16:47, Stephen Boyd wrote:
> On 11/22, Rob Herring wrote:
>>
>> Much more reasonable now. I do find the '/' in it a bit strange though.
> I can remove the backslash if you like. Is a dash more preferred?
>
>> Acked-by: Rob Herring
>>
> and if so can I keep the ack? I'll resend with tha
Hi Geert-san,
> From: Geert Uytterhoeven
> Sent: Tuesday, January 05, 2016 9:56 PM
>
> Hi Shimoda-san,
>
> On Fri, Dec 25, 2015 at 11:03 AM, Yoshihiro Shimoda
> wrote:
> > Signed-off-by: Yoshihiro Shimoda
> > ---
> > arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 34
> > +++
Hi Geert-san,
Thank you for your comment and sorry for the delayed response.
> From: Geert Uytterhoeven
> Sent: Monday, January 04, 2016 9:42 PM
>
> On Fri, Dec 25, 2015 at 12:52 PM, Yoshihiro Shimoda
> wrote:
> > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > +++ b/arch/arm64/boot/dts/rene
Hi,
On 01/05/2016 07:25 PM, Rameshwar Sahu wrote:
> Hi Ulf,
>
> On Wed, Dec 23, 2015 at 6:59 PM, Rameshswar Prasad Sahu wrote:
>> From: Rameshwar Prasad Sahu
>>
>> The Arason SD host controller supports set block count command (cmd23)
>> and high speed mode. This patch re-enable both of these f
On Mon, Jan 04, 2016 at 12:34:44PM +, Harvey Hunt wrote:
> diff --git a/arch/mips/boot/dts/ingenic/ci20.dts
> b/arch/mips/boot/dts/ingenic/ci20.dts
> index 9fcb9e7..782258c 100644
> --- a/arch/mips/boot/dts/ingenic/ci20.dts
> +++ b/arch/mips/boot/dts/ingenic/ci20.dts
As I noted on patch 1, yo
On Mon, Jan 04, 2016 at 12:34:42PM +, Harvey Hunt wrote:
> From: Alex Smith
>
> Add DT bindings for NAND devices connected to the NEMC on JZ4780 SoCs,
> as well as the hardware BCH controller, used by the jz4780_{nand,bch}
> drivers.
>
> Signed-off-by: Alex Smith
> Cc: Zubair Lutfullah Kaka
The Camera Adaptation Layer (CAL) is a block which consists of a dual
port CSI2/MIPI camera capture engine.
Port #0 can handle CSI2 camera connected to up to 4 data lanes.
Port #1 can handle CSI2 camera connected to up to 2 data lanes.
The driver implements the required API/ioctls to be V4L2 compli
Device Tree bindings for the Camera Adaptation Layer (CAL) driver
Signed-off-by: Benoit Parrot
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/media/ti-cal.txt | 72 ++
1 file changed, 72 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/t
The Camera Adaptation Layer (CAL) is a block which consists of a dual
port CSI2/MIPI camera capture engine.
This camera engine is currently found on DRA72xx family of devices.
Port #0 can handle CSI2 camera connected to up to 4 data lanes.
Port #1 can handle CSI2 camera connected to up to 2 data l
Signed-off-by: Benoit Parrot
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 4635e1d14612..ebbdb410c0f0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10631,6 +10631,14 @@ L: linux-o...@vger.kernel.org
S: Maintained
F: driv
On Mon, Jan 4, 2016 at 6:13 AM, Wolfram Sang wrote:
> From: Grant Likely
>
> Add a single resource to the test bus device to exercise the platform
> bus code a little more. This isn't strictly a devicetree test, but it is
> a corner case that the devicetree runs into. Until we've got platform
> d
On Sun, Dec 20, 2015 at 01:43:58PM +0300, Sergei Ianovich wrote:
> On Sat, 2015-12-19 at 21:38 -0600, Rob Herring wrote:
> > On Tue, Dec 15, 2015 at 09:58:53PM +0300, Sergei Ianovich wrote:
> > > +Required properties:
> > > +- compatible : should be "icpdas,sram-lp8x4x"
> >
> > No wildcards please
On Sat, Dec 26, 2015 at 12:37:16AM +0100, Pali Rohár wrote:
> Property names do not match real names needed by driver itself.
> This patch fix this problem.
>
> Signed-off-by: Pali Rohár
Applied, thanks.
Rob
> ---
> .../devicetree/bindings/media/i2c/adp1653.txt |7 ---
> 1 file c
On Tue, Dec 15, 2015 at 10:55:59AM +0100, Geert Uytterhoeven wrote:
> Fix bogus indentation of the PSCI compatible values, reformat.
>
> Signed-off-by: Geert Uytterhoeven
> Acked-by: Lorenzo Pieralisi
Applied, thanks.
Rob
> ---
> v2:
> - Add Acked-by,
> - Align second line with first word
Hi Charles,
[auto build test ERROR on clk/clk-next]
[also build test ERROR on v4.4-rc8 next-20160106]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Charles-Keepax/extcon-arizona-Remove
On Tue, Dec 29, 2015 at 04:58:19PM +0300, Aleksei Mamlin wrote:
> On Sun, 27 Dec 2015 21:51:51 +0100
> Maxime Ripard wrote:
>
> > On Sat, Dec 26, 2015 at 12:57:59PM +0300, Aleksei Mamlin wrote:
> > > Marsboard A10 have four red LEDs, the first one can be used for
> > > heartbeat indication.
> > >
On 01/06/2016 01:34 PM, Rob Herring wrote:
> On Wed, Jan 6, 2016 at 8:36 AM, Nishanth Menon wrote:
>> On 01/06/2016 02:13 AM, Laxman Dewangan wrote:
>>>
>>> On Wednesday 06 January 2016 01:12 PM, H. Nikolaus Schaller wrote:
Hi,
Am 06.01.2016 um 00:40 schrieb Nishanth Menon :
>>
On Wed, Jan 6, 2016 at 8:36 AM, Nishanth Menon wrote:
> On 01/06/2016 02:13 AM, Laxman Dewangan wrote:
>>
>> On Wednesday 06 January 2016 01:12 PM, H. Nikolaus Schaller wrote:
>>> Hi,
>>>
>>> Am 06.01.2016 um 00:40 schrieb Nishanth Menon :
>>>
On 01/05/2016 06:01 AM, H. Nikolaus Schaller wrot
[+cc Jisheng]
On Fri, Dec 18, 2015 at 02:38:55PM +0200, Stanimir Varbanov wrote:
> There is no guarantees that enabling ATU will hit the hardware
> immediately, and subsequent accesses to configuration / IO spaces
> are reliable. So fixing this by read back PCIE_ATU_CR2 register
> just after writi
On 01/05/2016 05:57 PM, Peter Rosin wrote:
From: Peter Rosin
Hi!
I have a pair of boards with this i2c topology:
GPIO ---| -- BAT1
| v /
I2C -+--B---+ MUX
| \
EEPROM
* H. Nikolaus Schaller [160106 08:48]:
> Hi Tony,
>
> Am 06.01.2016 um 17:41 schrieb Tony Lindgren :
>
> > Hi,
> >
> > * H. Nikolaus Schaller [160106 00:12]:
> >> Am 06.01.2016 um 02:00 schrieb Tony Lindgren :
> >>>
> >>> Also I'm not seeing just zeroes coming from RTC after typing hwclock
>
On Wed, Jan 6, 2016 at 7:51 AM, Wolfram Sang wrote:
> From: Wolfram Sang
>
> This driver allows an I2C bus to switch between multiple masters. This
> is not hot-swichting because connected I2C slaves will be
> re-instantiated. It is meant to select the best I2C core at runtime once
> the task is
Hi Tony,
Am 06.01.2016 um 17:41 schrieb Tony Lindgren :
> Hi,
>
> * H. Nikolaus Schaller [160106 00:12]:
>> Am 06.01.2016 um 02:00 schrieb Tony Lindgren :
>>>
>>> Also I'm not seeing just zeroes coming from RTC after typing hwclock
>>> on omap5-uevm. It's working on x15 though.
>>>
>>> Nikola
Hi,
* H. Nikolaus Schaller [160106 00:12]:
> Am 06.01.2016 um 02:00 schrieb Tony Lindgren :
> >
> > Also I'm not seeing just zeroes coming from RTC after typing hwclock
> > on omap5-uevm. It's working on x15 though.
> >
> > Nikolaus, is hwclock command working for you on omap5-uevm?
>
> Well,
On Wed, 6 Jan 2016 10:13:57 -0600
Rob Herring wrote:
> On Wed, Jan 6, 2016 at 9:37 AM, Boris Brezillon
> wrote:
> > On Wed, 6 Jan 2016 09:14:44 -0600
> > Rob Herring wrote:
> >
> >> On Tue, Jan 05, 2016 at 10:55:01AM +0530, Archit Taneja wrote:
> >> > Add DT bindings document for the Qualcomm N
On Wed, Jan 06, 2016 at 08:25:21AM -0600, Rob Herring wrote:
> On Wed, Jan 06, 2016 at 12:37:35PM +, Mark Brown wrote:
> > > I tried to roundoff to the next higher threshold when supported value (120
> > > or 140 degC) is not provided in driver. But it is fine to me to specify
> > > the
> > >
On Wed, Jan 6, 2016 at 9:37 AM, Boris Brezillon
wrote:
> On Wed, 6 Jan 2016 09:14:44 -0600
> Rob Herring wrote:
>
>> On Tue, Jan 05, 2016 at 10:55:01AM +0530, Archit Taneja wrote:
>> > Add DT bindings document for the Qualcomm NAND controller driver.
>> >
>> > Cc: devicetree@vger.kernel.org
>> >
The driver MAX8973 supports the driver for Maxim PMIC MAX77621.
MAX77621 supports the junction temp warning at 120 degC and
140 degC which is configurable. It generates alert signal when
junction temperature crosses these threshold.
MAX77621 does not support the continuous temp monitoring of
junc
Signed-off-by: Ludovic Desroches
---
arch/arm/configs/sama5_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig
index c11bab7..37aa085 100644
--- a/arch/arm/configs/sama5_defconfig
+++ b/arch/arm/configs/sama5_defconfig
Signed-off-by: Ludovic Desroches
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 248828d..827bc83 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1945,6 +1945,12 @@ M: Nicolas Ferre
S: Supported
F: drivers/tty/serial/atmel_
Enable the adc on the sama5d2 Xplained board.
Signed-off-by: Ludovic Desroches
---
arch/arm/boot/dts/at91-sama5d2_xplained.dts | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
in
Add the ADC device, and remove the adc_op_clk which is useless since the
adc sampling frequency is configured with sysfs.
Signed-off-by: Ludovic Desroches
---
arch/arm/boot/dts/sama5d2.dtsi | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/
This driver supports the new version of the Atmel ADC device introduced
with the SAMA5D2 SoC family.
Signed-off-by: Ludovic Desroches
---
.../devicetree/bindings/iio/adc/at91_adc8xx.txt| 28 ++
drivers/iio/adc/Kconfig| 11 +
drivers/iio/adc/Makefile
Hi,
This is the very basic support for the adc introduced with the SAMA5D2 SoC
family.
The goal is to provide something to the user as soon as possible instead of
waiting for a full featured driver.
Only unsigned conversions on a software tigger are supported. Next steps are
signed conversions,
On Wed, 6 Jan 2016 09:14:44 -0600
Rob Herring wrote:
> On Tue, Jan 05, 2016 at 10:55:01AM +0530, Archit Taneja wrote:
> > Add DT bindings document for the Qualcomm NAND controller driver.
> >
> > Cc: devicetree@vger.kernel.org
> > Cc: Rob Herring
> > Signed-off-by: Archit Taneja
> > ---
> > v5
On Wed, Jan 6, 2016 at 10:26 AM, Sascha Hauer wrote:
> On Wed, Jan 06, 2016 at 02:53:30PM +0100, Boris Brezillon wrote:
>> Hi Sascha,
>>
>> On Wed, 6 Jan 2016 14:47:36 +0100
>> Sascha Hauer wrote:
>>
>> > Hi Boris,
>> >
>> > On Wed, Jan 06, 2016 at 12:25:50PM +0100, Boris Brezillon wrote:
>> > >
On Wed, Jan 06, 2016 at 02:53:30PM +0100, Boris Brezillon wrote:
> Hi Sascha,
>
> On Wed, 6 Jan 2016 14:47:36 +0100
> Sascha Hauer wrote:
>
> > Hi Boris,
> >
> > On Wed, Jan 06, 2016 at 12:25:50PM +0100, Boris Brezillon wrote:
> > > Add basic support for the sil902x RGB -> HDMI bridge.
> > > Th
On Tue, Jan 05, 2016 at 10:55:01AM +0530, Archit Taneja wrote:
> Add DT bindings document for the Qualcomm NAND controller driver.
>
> Cc: devicetree@vger.kernel.org
> Cc: Rob Herring
> Signed-off-by: Archit Taneja
> ---
> v5:
> - Make changes to incorporate chip select sub nodes (brcmnand taken
On Tue, Jan 05, 2016 at 02:30:18PM +0800, James Liao wrote:
> This patch adds the binding documentation for apmixedsys, bdpsys,
> ethsys, hifsys, imgsys, infracfg, mmsys, pericfg, topckgen and
> vdecsys for Mediatek MT2701.
>
> Signed-off-by: James Liao
[...]
> diff --git
> a/Documentation/dev
Hi Archit,
On Tue, 5 Jan 2016 10:55:01 +0530
Archit Taneja wrote:
> Add DT bindings document for the Qualcomm NAND controller driver.
>
> Cc: devicetree@vger.kernel.org
> Cc: Rob Herring
> Signed-off-by: Archit Taneja
> ---
> v5:
> - Make changes to incorporate chip select sub nodes (brcmnan
Hello Laurent,
On 01/06/2016 10:48 AM, Laurent Pinchart wrote:
[snip]
@@ -940,6 +948,16 @@ static int tvp5150_cropcap(struct v4l2_subdev *sd,
struct v4l2_cropcap *a)
static int tvp5150_g_mbus_config(struct v4l2_subdev *sd,
struct v4l2_mbus_config
On Tue, Jan 05, 2016 at 01:59:14PM +0100, Oreste Salerno wrote:
> Add support for retrieving the platform data from the device
> tree.
Converting platform data to DT as is is typically not the right thing to
do. There's some overlap, but it is not typically 1-1.
> Signed-off-by: Oreste Salerno
On Tue, Jan 05, 2016 at 02:39:18PM +0100, Neil Armstrong wrote:
> Add NP4 macb SoC variant.
>
> Signed-off-by: Neil Armstrong
> ---
> Documentation/devicetree/bindings/net/macb.txt | 1 +
> 1 file changed, 1 insertion(+)
Acked-by: Rob Herring
--
To unsubscribe from this list: send the line "u
On Tue, Jan 05, 2016 at 04:57:18PM +0100, Peter Rosin wrote:
> From: Peter Rosin
>
> With a i2c topology like the following
>
>GPIO ---| -- BAT1
> | v /
>I2C -+--+ MUX
> | \
>
On 01/06/2016 02:13 AM, Laxman Dewangan wrote:
>
> On Wednesday 06 January 2016 01:12 PM, H. Nikolaus Schaller wrote:
>> Hi,
>>
>> Am 06.01.2016 um 00:40 schrieb Nishanth Menon :
>>
>>> On 01/05/2016 06:01 AM, H. Nikolaus Schaller wrote:
+rtc {
+compatible = "ti,palma
Hi Wolfram,
On Wed, Jan 6, 2016 at 2:51 PM, Wolfram Sang wrote:
> These bindings allow an I2C bus to switch between multiple masters. This
> is not hot-swichting because connected I2C slaves will be
> re-instantiated. It is meant to select the best I2C core at runtime once
> the task is known. Ex
On Wednesday 06 January 2016 07:55 PM, Rob Herring wrote:
On Wed, Jan 06, 2016 at 12:37:35PM +, Mark Brown wrote:
On Wed, Jan 06, 2016 at 05:49:22PM +0530, Laxman Dewangan wrote:
On Wednesday 06 January 2016 05:48 PM, Mark Brown wrote:
* PGP Signed by an unknown key
On Wed, Jan 06, 2016 a
Hi Wolfram,
On Wed, Jan 6, 2016 at 2:51 PM, Wolfram Sang wrote:
> From: Wolfram Sang
>
> If we want to use OF_DYNAMIC features outside the of framework, we need
> to access this lock.
As I2C_DEMUX_PINCTRL is tristate, you want to add an EXPORT_SYMBOL_GPL(), too.
Gr{oetje,eeting}s,
On Wed, Jan 06, 2016 at 12:37:35PM +, Mark Brown wrote:
> On Wed, Jan 06, 2016 at 05:49:22PM +0530, Laxman Dewangan wrote:
> > On Wednesday 06 January 2016 05:48 PM, Mark Brown wrote:
> > >* PGP Signed by an unknown key
>
> > >On Wed, Jan 06, 2016 at 11:45:22AM +0530, Laxman Dewangan wrote:
>
Hi Wolfram,
On Wed, Jan 6, 2016 at 2:51 PM, Wolfram Sang wrote:
> From: Wolfram Sang
>
> This driver allows an I2C bus to switch between multiple masters. This
> is not hot-swichting because connected I2C slaves will be
switching
> re-instantiated. It is meant to select the best I2C core at ru
On Wed, Jan 06, 2016 at 04:19:53PM +0530, Kishon Vijay Abraham I wrote:
> Perform syscon configurations to get x2 mode to working in DRA74x and
> DRA72x. Also add a new compatible string to dfferentiate
> DRA72x and DRA74x, since b1c0 mask is different for both these platforms.
>
> Signed-off-by:
On Wednesday 06 January 2016 06:07 PM, Mark Brown wrote:
* PGP Signed by an unknown key
In one of design, interrupt from MAX77620, and alert from both MAX77621
shorted and going to Arm GIC controller. On this case, I need to register
the interrupt as SHARED interrupt. This property can not be
Hi Mark,
On Wed, Jan 06, 2016 at 01:25:05PM +, Mark Rutland wrote:
> > + clocks {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges;
> > +
> > + osc24M: osc24M_clk {
> > + #clock-cells = <0>;
> > + co
Hi Sascha,
On Wed, 6 Jan 2016 14:47:36 +0100
Sascha Hauer wrote:
> Hi Boris,
>
> On Wed, Jan 06, 2016 at 12:25:50PM +0100, Boris Brezillon wrote:
> > Add basic support for the sil902x RGB -> HDMI bridge.
> > This driver does not support audio output yet.
> >
> > Signed-off-by: Boris Brezillon
From: Wolfram Sang
These bindings allow an I2C bus to switch between multiple masters. This
is not hot-swichting because connected I2C slaves will be
re-instantiated. It is meant to select the best I2C core at runtime once
the task is known. Example: Prefer i2c-gpio over another I2C core
because
I know this is gonna be a controversial series, but we have a usecase for this
:)
This series allows an I2C bus to switch between multiple masters, i.e. a
n-to-1-demuxer. This is not hot-switching because connected I2C slaves will be
re-instantiated. It is meant to select the best I2C core at run
From: Wolfram Sang
Create a seperate bus for HDMI related I2C slaves and assign it
to a i2c-gpio master. It can be switched to the i2c-rcar or
i2c-sh_mobile core at runtime.
Signed-off-by: Wolfram Sang
---
arch/arm/boot/dts/r8a7790-lager.dts | 141 ++--
1 file c
From: Wolfram Sang
If we want to use OF_DYNAMIC features outside the of framework, we need
to access this lock.
Signed-off-by: Wolfram Sang
---
drivers/of/of_private.h | 1 -
include/linux/of.h | 2 ++
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/of/of_private.h b
From: Wolfram Sang
This driver allows an I2C bus to switch between multiple masters. This
is not hot-swichting because connected I2C slaves will be
re-instantiated. It is meant to select the best I2C core at runtime once
the task is known. Example: Prefer i2c-gpio over another I2C core
because of
Happy new year !!
Any comments on this patchset ?
On Thu, Dec 24, 2015 at 1:01 PM, Suman Tripathi wrote:
> This patch set implements a workaround for an errate in the APM
> X-Gene SATA host controller with edge interrupt. The HOST_IRQ_STAT
> misses the edge interrupt from the PORT_IRQ_STAT when
Hi Javier,
On Wednesday 06 January 2016 08:27:26 Javier Martinez Canillas wrote:
> On 01/06/2016 07:56 AM, Laurent Pinchart wrote:
> > On Monday 04 January 2016 09:25:32 Javier Martinez Canillas wrote:
> >> The video decoder supports either 8-bit 4:2:2 YUV with discrete syncs
> >> or 8-bit ITU-R B
Hi Boris,
On Wed, Jan 06, 2016 at 12:25:50PM +0100, Boris Brezillon wrote:
> Add basic support for the sil902x RGB -> HDMI bridge.
> This driver does not support audio output yet.
>
> Signed-off-by: Boris Brezillon
> ---
> Hello,
>
> This patch is only adding basic support for the sil9022 chip.
在 2016/1/5 20:19, Arnd Bergmann 写道:
On Tuesday 05 January 2016 19:59:49 Rongrong Zou wrote:
在 2016/1/5 0:34, Arnd Bergmann 写道:
On Tuesday 05 January 2016 00:04:19 Rongrong Zou wrote:
在 2016/1/4 19:13, Arnd Bergmann 写道:
On Sunday 03 January 2016 20:24:14 Rongrong Zou wrote:
在 2015/12/31 23:00
On Wed, Jan 06, 2016 at 04:29:08PM +0530, Kishon Vijay Abraham I wrote:
> DRA72 uses USB3 PHY for the 2nd lane of PCIE. The configuration
> required to make USB3 PHY used for the 2nd lane of PCIe is done
> here.
>
> Signed-off-by: Kishon Vijay Abraham I
> ---
> Documentation/devicetree/bindings/
Hi,
> + chosen {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> + };
What is the ranges property doing here?
[...]
> + clocks {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
>
Hi Rob,
On Wed, 6 Jan 2016 07:19:59 -0600
Rob Herring wrote:
> On Wed, Jan 06, 2016 at 12:25:51PM +0100, Boris Brezillon wrote:
> > Add Sil9022 DT bindings description.
> >
> > Signed-off-by: Boris Brezillon
> > ---
> > .../devicetree/bindings/display/bridge/sil902x.txt | 31
> >
Hi Wolfram and Peter,
I will give my opinion about the path chosen although it should be
taken lightly.
I can see that hardware guys missed the software guys again on the
development path, but since this happens more often than not, I would
say it seems OK to have support for this as long as it do
On Wed, Jan 06, 2016 at 12:25:51PM +0100, Boris Brezillon wrote:
> Add Sil9022 DT bindings description.
>
> Signed-off-by: Boris Brezillon
> ---
> .../devicetree/bindings/display/bridge/sil902x.txt | 31
> ++
> 1 file changed, 31 insertions(+)
> create mode 100644
> Docume
On Wed, Jan 06, 2016 at 12:34:32PM +, Charles Keepax wrote:
> Specify the device tree binding for the input clocks to Arizona devices.
>
> Signed-off-by: Charles Keepax
> ---
>
> No changes since v1.
>
> Thanks,
> Charles
>
> Documentation/devicetree/bindings/mfd/arizona.txt | 7 +++
>
Allwinner A83T is new octa-core cortex-a7 SOC.
This adds the basic dtsi, the clocks differs from
earlier sun8i SOCs.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 204 ++
1 file changed, 204 insertions(+)
create mode 100644 arch/arm/bo
Allwinner A83T is octa-core cortex-a7 based SoC.
It's clock control unit and prcm, pinmux are different from previous sun8i
series.
Its processor cores are arragned in two clusters 4 cores each,
similar to A80.
Signed-off-by: Vishnu Patekar
Acked-by: Rob Herring
Acked-by: Chen-Yu Tsai
---
Docu
H8Homlet Proto v2.0 Board is A83T Dev Board by Allwinner.
It has UART, ethernet, USB, HDMI, etc ports on it.
A83T patches are tested on this board.
It has UART, ethernet, USB, HDMI, etc ports on it.
For FEL mode it needs USB A-A(Male) cable. I used uart0 which
is multiplexed to microsd pins PF2 a
Hello,
Re-sending after corrections, I've some more patches on top of this will send
them separately to avoid delaying this one with new comments.
This patch series adds very basic support for Allwinner A83T SOC.
Clock, peripherals, smp support will be added later.
Allwinner A83T is octa-core co
Hi Heiko,
On 2016年01月02日 10:34, Xing Zheng wrote:
> Hi Heiko,
> Thank you for your patch, I will apply and test it later.
>
> Thanks.
>
>> 在 2016年1月2日，06:10，Heiko Stübner 写道：
>>
>> Hi Xing,
>>
>> Am Dienstag, 29. Dezember 2015, 10:34:09 schrieb Xing Zheng:
>>> On 2015年12月29日 09:59, Yakir Yang
On 06/01/16 09:46, Mark Rutland wrote:
> Hi,
>
> On Wed, Jan 06, 2016 at 09:40:22AM +, Jon Hunter wrote:
>> Add initial device-tree support for Google Pixel C (a.k.a. Smaug) based
>> upon Tegra210 SoC with 3 GiB of LPDDR4 RAM.
>>
>> Signed-off-by: Jon Hunter
>> ---
>> arch/arm64/boot/dts/nv
Hi Boris,
[auto build test WARNING on drm/drm-next]
[also build test WARNING on v4.4-rc8 next-20160106]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Boris-Brezillon/drm-bridge-sil902x
On Wed, Jan 06, 2016 at 05:49:22PM +0530, Laxman Dewangan wrote:
> On Wednesday 06 January 2016 05:48 PM, Mark Brown wrote:
> >* PGP Signed by an unknown key
> >On Wed, Jan 06, 2016 at 11:45:22AM +0530, Laxman Dewangan wrote:
> >> Enhanced transient response (ETR) will affect the configuration o
The 32k clock is unconditionally enabled by the MFD core so there is no
need to control it from the extcon device, so this patch removes the
control of the 32k clock.
Signed-off-by: Charles Keepax
---
No changes since v1.
Thanks,
Charles
drivers/extcon/extcon-arizona.c | 2 --
1 file changed,
Now we have a clock driver that can control the 32k clock use this
rather than directly controlling the 32k clock from the MFD device.
Signed-off-by: Charles Keepax
---
Changes since v1:
- No long select COMMON_CLK_ARIZONA from the MFD, this can lead
to a situation where we are building COMM
Specify the device tree binding for the input clocks to Arizona devices.
Signed-off-by: Charles Keepax
---
No changes since v1.
Thanks,
Charles
Documentation/devicetree/bindings/mfd/arizona.txt | 7 +++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/mfd/ar
Add an initial clock driver for the Arizona series audio CODECs.
Currently this driver only provides support for parsing the two input
clocks (mclk1, mclk2) and providing the internally consumed 32k clock.
Signed-off-by: Charles Keepax
---
Changes since v1:
- Change in if (ret != 0) to an if (r
On Wednesday 06 January 2016 05:48 PM, Mark Brown wrote:
* PGP Signed by an unknown key
On Wed, Jan 06, 2016 at 11:45:22AM +0530, Laxman Dewangan wrote:
Enhanced transient response (ETR) will affect the configuration of CKADV.
+-maxim,junction-temp-warning: Junction temp warning on which de
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