On 02/03/15 04:17, Ivan T. Ivanov wrote:
Following set of patches add initial DT support for PMIC devices
found on recent Quqalcomm chipsets. Details for SPMI bus and PMIC arbiter
could be found here [1].
Can you please put the specific compatible strings for the pmic model
into the nodes in
On 02/18/15 10:37, Bjorn Andersson wrote:
On Tue, Feb 17, 2015 at 6:52 PM, Stephen Boyd sb...@codeaurora.org wrote:
The main benefit I can think of is we cut down on runtime memory bloat.
(gdb) p sizeof(struct platform_device)
$1 = 624
Multiply that by 20 regulators and you get 624 * 20
On 02/18/15 13:08, Bjorn Andersson wrote:
On Wed, Feb 18, 2015 at 12:28 PM, Stephen Boyd sb...@codeaurora.org wrote:
MFD name matching isn't required. All we need to do is have a regulators
node and put a compatible = qcom,rpm-msm-regulators in there. Then
of_platform_populate() does most
On 02/17/15 13:48, Bjorn Andersson wrote:
On Fri, Feb 13, 2015 at 2:13 PM, Andy Gross agr...@codeaurora.org wrote:
On Thu, Jan 29, 2015 at 05:51:06PM -0800, Bjorn Andersson wrote:
Add the regulator subnodes to the Qualcomm RPM MFD device tree bindings.
Signed-off-by: Bjorn Andersson
On 02/17/15 15:02, Bjorn Andersson wrote:
On Thu, Feb 12, 2015 at 8:26 PM, Stephen Boyd sb...@codeaurora.org wrote:
On 01/23/15 16:54, Bjorn Andersson wrote:
+
+static int pm8941_wled_set(struct led_classdev *cdev,
+enum led_brightness value)
+{
+ struct
On 12/12/14 02:47, Philipp Zabel wrote:
+
+const struct clk_ops clk_pwm_ops = {
static?
+ .prepare = clk_pwm_prepare,
+ .unprepare = clk_pwm_unprepare,
+ .recalc_rate = clk_pwm_recalc_rate,
+};
+
+int clk_pwm_probe(struct platform_device *pdev)
static?
+{
+ struct
/kernel/perf_event_msm.c?h=msm-3.4
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Neil Leeder nlee...@codeaurora.org
Cc: Ashwin Chaugule ashw...@codeaurora.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Stephen Boyd sb...@codeaurora.org
---
Documentation/devicetree/bindings/arm/pmu.txt | 2 +
arch
On 02/12/15 04:49, Mark Rutland wrote:
Hi,
I haven't given this a thorough review, but I spotted a couple of items
below.
On Wed, Feb 11, 2015 at 01:05:24AM +, Stephen Boyd wrote:
Scorpion supports a set of local performance monitor event
selection registers (LPM) sitting behind a cp15
On 02/12, Viresh Kumar wrote:
On 12 February 2015 at 08:52, Stephen Boyd sb...@codeaurora.org wrote:
Here's some feedback on how we can't use OPPs (and OPPs in DT) on
qcom platforms.
On these platforms the OPPs are not always frequency voltage
pairs. Sometimes they're a frequency
On 01/23/15 16:54, Bjorn Andersson wrote:
+
+static int pm8941_wled_set(struct led_classdev *cdev,
+enum led_brightness value)
+{
+ struct pm8941_wled *wled;
+ u8 ctrl = 0;
+ u16 val;
+ int rc;
+ int i;
+
+ wled = container_of(cdev, struct
On 02/12/15 20:28, Ivan T. Ivanov wrote:
On Thu, 2015-02-12 at 20:07 -0800, Stephen Boyd wrote:
On 01/29/15 04:48, Ivan T. Ivanov wrote:
Otherwise it looks good. Driver is loaded and device is detected
properly (i have added readings for type and subtype registers).
Do you know where I can
On 01/23/15 16:54, Bjorn Andersson wrote:
+
+static int pm8941_wled_configure(struct pm8941_wled *wled, struct device
*dev)
+{
+ struct pm8941_wled_config *cfg = wled-cfg;
+ u32 val;
+ int rc;
+ int i;
+
+ const struct {
+ const char *name;
+
On 01/29/15 04:48, Ivan T. Ivanov wrote:
Otherwise it looks good. Driver is loaded and device is detected
properly (i have added readings for type and subtype registers).
Do you know where I can measure result from changing brightness
sysfs entry. I am using 8074 dragonboard?
Does the
On 02/10, Ashwin Chaugule wrote:
Hi Stephen,
On 10 February 2015 at 20:05, Stephen Boyd sb...@codeaurora.org wrote:
Scorpion supports a set of local performance monitor event
selection registers (LPM) sitting behind a cp15 based interface
that extend the architected PMU events to include
On 02/10, Stephen Boyd wrote:
Scorpion supports a set of local performance monitor event
selection registers (LPM) sitting behind a cp15 based interface
that extend the architected PMU events to include Scorpion CPU
and Venum VFP specific events. To use these events the user is
expected
On 02/11, Viresh Kumar wrote:
Now that I have received an verbal Ack from Rob Herring (in a personal
conversation) about the bindings, I am showing how the code looks like with
these new bindings.
Some part is still now done:
- Interface for adding new detailed OPPs from platform code
On 02/11, Andy Gross wrote:
+static struct platform_driver adm_dma_driver = {
+ .probe = adm_dma_probe,
+ .remove = adm_dma_remove,
+ .driver = {
+ .name = adm-dma-engine,
+ .owner = THIS_MODULE,
+ .of_match_table = adm_of_match,
+ },
/kernel/perf_event_msm.c?h=msm-3.4
Cc: Neil Leeder nlee...@codeaurora.org
Cc: Ashwin Chaugule ashw...@codeaurora.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Stephen Boyd sb...@codeaurora.org
---
Documentation/devicetree/bindings/arm/pmu.txt | 2 +
arch/arm/kernel/perf_event_cpu.c
On 02/06/15 07:57, Thomas Petazzoni wrote:
diff --git a/arch/arm/mach-mvebu/board-v7.c b/arch/arm/mach-mvebu/board-v7.c
index 89a139e..d88438f 100644
--- a/arch/arm/mach-mvebu/board-v7.c
+++ b/arch/arm/mach-mvebu/board-v7.c
@@ -232,3 +232,17 @@ DT_MACHINE_START(ARMADA_38X_DT, Marvell Armada
On 02/04/15 15:33, Ray Jui wrote:
On 2/4/2015 3:13 PM, Stephen Boyd wrote:
On 02/03/15 10:33, Ray Jui wrote:
+/*
+ * Get the clock rate based on name
+ */
+static unsigned long __get_rate(const char *clk_name)
+{
+ struct clk *clk;
+
+ clk = __clk_lookup(clk_name);
+ if (!clk
On 02/03/15 10:33, Ray Jui wrote:
+/*
+ * Get the clock rate based on name
+ */
+static unsigned long __get_rate(const char *clk_name)
+{
+ struct clk *clk;
+
+ clk = __clk_lookup(clk_name);
+ if (!clk) {
+ pr_err(%s: unable to find clock by name: %s\n, __func__,
On 01/30/15 13:48, Kumar Gala wrote:
On Jan 30, 2015, at 3:37 PM, Stephen Boyd sb...@codeaurora.org wrote:
On 01/30/15 08:32, Kumar Gala wrote:
On Jan 30, 2015, at 12:25 AM, Andy Gross agr...@codeaurora.org wrote:
Required properties if child node exists:
- #address-cells: Must be 1
On 01/30/15 14:00, Bjorn Andersson wrote:
On Fri, Jan 30, 2015 at 1:16 PM, Stephen Boyd sb...@codeaurora.org wrote:
On 01/30/15 10:06, Srinivas Kandagatla wrote:
[..]
Stephen Any comments?
I don't understand any of this. We should be making a specific tsens
device directly in the gcc driver
On 01/30/15 10:06, Srinivas Kandagatla wrote:
On 30/01/15 16:57, Bjorn Andersson wrote:
On Fri, Jan 30, 2015 at 2:17 AM, Srinivas Kandagatla
srinivas.kandaga...@linaro.org wrote:
This patch adds support to add child devices to gcc as some of the
registers mapped by gcc are used by drivers
On 01/30/15 08:32, Kumar Gala wrote:
On Jan 30, 2015, at 12:25 AM, Andy Gross agr...@codeaurora.org wrote:
Required properties if child node exists:
- #address-cells: Must be 1
- #size-cells: Must be 1
- ranges: Must be present
+Note: Each GSBI should have an alias correctly numbered in
On 01/27, Andy Gross wrote:
This patch adds automatic configuration for the ADM CRCI muxing required to
support DMA operations for GSBI clients. The GSBI mode and instance determine
the correct TCSR ADM CRCI MUX value that must be programmed so that the DMA
works properly.
Signed-off-by:
On 01/28, Andy Gross wrote:
On Wed, Jan 28, 2015 at 06:11:50PM -0800, Stephen Boyd wrote:
+- syscon-tcsr: indicates phandle of TCSR syscon node
Make this optional but required if any child nodes use dma?
To enforce that I'd have to determine that a child has a dmas. I guess
From: Rajendra Nayak rna...@codeaurora.org
Document the LPASS (low power audio subsystem) clock controller
found on Qualcomm devices.
Cc: devicetree@vger.kernel.org
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
Signed-off-by: Kumar Gala ga...@codeaurora.org
Signed-off-by: Stephen Boyd sb
control
clk: qcom: Add IPQ806X LPASS clock controller (LCC) driver
devicetree: bindings: Document qcom,lcc
Stephen Boyd (4):
clk: Add __clk_mux_determine_rate_closest
clk: divider: Make generic for usage elsewhere
clk: qcom: Add simple regmap based muxes
clk: qcom: Add MSM8960/APQ8064
On 01/08/2015 02:52 PM, Andy Gross wrote:
+
+static struct platform_driver qcom_tcsr_driver = {
+ .driver = {
+ .name = tcsr,
+ .owner = THIS_MODULE,
This is done by the module_platform_driver() macro now so it's largely
unnecessary. Best to
On 12/16/2014 06:38 AM, Arnd Bergmann wrote:
On Tuesday 16 December 2014 15:12:22 Daniel Lezcano wrote:
At the beginning, all that become from not including mach files from the
drivers directory which make sense.
Perhaps it is time to write a similar mechanism for the cpuidle drivers
where
On 12/08/2014 04:22 PM, Bjorn Andersson wrote:
diff --git a/drivers/leds/leds-pm8941-wled.c b/drivers/leds/leds-pm8941-wled.c
new file mode 100644
index 000..aa06d0b
--- /dev/null
+++ b/drivers/leds/leds-pm8941-wled.c
@@ -0,0 +1,466 @@
+/* Copyright (c) 2013, Sony Mobile Communications,
On 12/08/2014 04:22 PM, Bjorn Andersson wrote:
+
+Optional properties:
+- label: The label for this led
+ See Documentation/devicetree/bindings/leds/common.txt
+- linux,default-trigger: Default trigger assigned to the LED
+ See Documentation/devicetree/bindings/leds/common.txt
+-
On 11/21/2014 10:03 AM, Lina Iyer wrote:
Follow the scm.c and move scm-boot files to drivers/soc/qcom. The
guidance is to clean files out from mach-qcom and move to drivers/soc
area.
Signed-off-by: Lina Iyer lina.i...@linaro.org
Reviewed-by: Stephen Boyd sb...@codeaurora.org
--
Qualcomm
On 11/21/2014 10:03 AM, Lina Iyer wrote:
@@ -37,3 +54,17 @@ int scm_set_boot_addr(phys_addr_t addr, int flags)
cmd, sizeof(cmd), NULL, 0);
}
EXPORT_SYMBOL(scm_set_boot_addr);
+
+int scm_set_warm_boot_addr(void *entry, int cpu)
+{
+ int ret;
+
+ if (entry
On 11/21/2014 10:03 AM, Lina Iyer wrote:
+
+static const struct platform_device_info qcom_cpuidle_info = {
nitpick, why two spaces between info and qcom here?
+ .name = qcom_cpuidle,
+ .id = -1,
+ .data = lpm_ops,
+ .size_data = sizeof(lpm_ops),
+};
This
On 11/21/2014 10:03 AM, Lina Iyer wrote:
@@ -144,7 +148,27 @@
};
};
- saw_l2: regulator@f9012000 {
+ saw0: power-controller@f9089000 {
+ compatible = qcom,msm8974-saw2-v2.1-cpu;
+ reg =
On 11/21/2014 10:03 AM, Lina Iyer wrote:
@@ -144,7 +148,27 @@
};
};
- saw_l2: regulator@f9012000 {
+ saw0: power-controller@f9089000 {
+ compatible = qcom,apq8084-saw2-v2.1-cpu;
+ reg =
-by: Stephen Boyd sb...@codeaurora.org
--
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-by: Stephen Boyd sb...@codeaurora.org
--
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-by: Stephen Boyd sb...@codeaurora.org
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addressed:
Reviewed-by: Stephen Boyd sb...@codeaurora.org
@@ -53,12 +56,30 @@
next-level-cache = L2;
qcom,acc = acc3;
qcom,saw = saw3;
+ cpu-idle-states = CPU_STBY CPU_SPC;
};
L2: l2
into the
implementation file.
Signed-off-by: Lina Iyer lina.i...@linaro.org
Acked-by: Daniel Lezcano daniel.lezc...@linaro.org
Reviewed-by: Stephen Boyd sb...@codeaurora.org
@@ -37,3 +54,20 @@ int scm_set_boot_addr(phys_addr_t addr, int flags)
cmd, sizeof(cmd), NULL, 0
...@linaro.org
Reviewed-by: Stephen Boyd sb...@codeaurora.org
I imagine all these dts changes will go through qcom tree - arm-soc?
--
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More
On 11/26/2014 02:28 PM, Lina Iyer wrote:
+
+static struct platform_driver qcom_cpuidle_plat_driver = {
+ .probe = qcom_cpuidle_probe,
+ .driver = {
+ .name = qcom_cpuidle,
+ },
+};
+
+module_platform_driver(qcom_cpuidle_plat_driver);
Said this a few reviews
into the
implementation file.
Signed-off-by: Lina Iyer lina.i...@linaro.org
Acked-by: Daniel Lezcano daniel.lezc...@linaro.org
Reviewed-by: Stephen Boyd sb...@codeaurora.org
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
--
To unsubscribe from
From: Rajendra Nayak rna...@codeaurora.org
Document the LPASS (low power audio subsystem) clock controller
found on Qualcomm devices.
Cc: devicetree@vger.kernel.org
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
Signed-off-by: Kumar Gala ga...@codeaurora.org
Signed-off-by: Stephen Boyd sb
IPQ806X LPASS clock controller (LCC) driver
devicetree: bindings: Document qcom,lcc
Stephen Boyd (4):
clk: Add __clk_mux_determine_rate_closest
clk: divider: Make generic for usage elsewhere
clk: qcom: Add simple regmap based muxes
clk: qcom: Add MSM8960/APQ8064 LPASS clock controller (LCC
feedback while I go and port over that data.
Josh Cartwright (1):
clk: qcom: Add support for cdiv clocks
Rajendra Nayak (3):
dt-bindings: Add #defines for IPQ806x lpass clock control
clk: qcom: ipq: Add lpass clock controller driver
devicetree: bindings: Document qcom,lcc
Stephen Boyd (3
From: Rajendra Nayak rna...@codeaurora.org
Document the LPASS (low power audio subsystem) clock controller
found on Qualcomm devices.
Cc: devicetree@vger.kernel.org
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
Signed-off-by: Kumar Gala ga...@codeaurora.org
Signed-off-by: Stephen Boyd sb
On 11/18/2014 08:56 AM, Lina Iyer wrote:
On Fri, Nov 14 2014 at 15:46 -0700, Stephen Boyd wrote:
On 10/24, Lina Iyer wrote:
+{
+struct spm_driver_data *drv = this_cpu_ptr(cpu_spm_drv);
+u32 start_index;
+u32 ctl_val;
+
+if (!drv-available)
+return -ENXIO
On 10/24, Lina Iyer wrote:
diff --git a/drivers/soc/qcom/spm.c b/drivers/soc/qcom/spm.c
new file mode 100644
index 000..ee2e3ca
--- /dev/null
+++ b/drivers/soc/qcom/spm.c
+#include linux/module.h
+#include linux/kernel.h
+#include linux/delay.h
Is this used?
+#include linux/init.h
On 09/13/2014 09:46 PM, Grant Likely wrote:
On Mon, 08 Sep 2014 13:22:44 -0700, Stephen Boyd sb...@codeaurora.org wrote:
Where is this described? From the commit text that introduces
IORESOURCE_REG I see:
Currently a bunch of I2C/SPI MFD drivers are using IORESOURCE_IO for
register address
On 10/22/2014 04:20 PM, Russell King - ARM Linux wrote:
On Wed, Oct 22, 2014 at 04:01:26PM -0700, Stephen Boyd wrote:
Where did this end up? When we talked at Connect I think we settled on
exploring a driver core specific API like dev_get_localbus_address()
that calls of_get_localbus_address
On 10/09, Lina Iyer wrote:
On Wed, Oct 08 2014 at 19:17 -0600, Stephen Boyd wrote:
+static int __init qcom_pm_device_init(void)
+{
+ platform_device_register(qcom_cpuidle_device);
+
This is wrong. We're going to register a platform device whenever
this file is included in a kernel
On 10/09, Stephen Boyd wrote:
On 10/09, Lina Iyer wrote:
On Wed, Oct 08 2014 at 19:17 -0600, Stephen Boyd wrote:
+static int __init qcom_pm_device_init(void)
+{
+ platform_device_register(qcom_cpuidle_device);
+
This is wrong. We're going to register a platform device whenever
On 10/09, Lina Iyer wrote:
On Wed, Oct 08 2014 at 19:12 -0600, Stephen Boyd wrote:
On 10/07/2014 02:41 PM, Lina Iyer wrote:
+ cpu_node = of_get_cpu_node(cpu, NULL);
+ if (!cpu_node)
+ continue;
+ saw_node = of_parse_phandle(cpu_node, qcom,saw
On 10/07/2014 02:41 PM, Lina Iyer wrote:
diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt
b/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt
index 1505fb8..a18e8fc 100644
--- a/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt
+++
On 10/07/2014 02:41 PM, Lina Iyer wrote:
+
+static struct platform_device qcom_cpuidle_device = {
+ .name = qcom_cpuidle,
+ .id= -1,
+ .dev.platform_data = qcom_cpu_pm_enter_sleep,
+};
+
Same comment as last time, doesn't need to be static.
On 10/07/2014 02:41 PM, Lina Iyer wrote:
+
+static int qcom_cpuidle_probe(struct platform_device *pdev)
+{
+ struct cpuidle_driver *drv = qcom_cpuidle_driver;
+ int ret;
+
+ qcom_idle_enter = pdev-dev.platform_data;
+ if (!qcom_idle_enter)
+ return -EFAULT;
On 10/07/2014 03:10 PM, Josh Cartwright wrote:
On Thu, Oct 02, 2014 at 12:08:38PM -0700, Stephen Boyd wrote:
[..]
On 10/01/14 11:15, Josh Cartwright wrote:
Something like this perhaps:
timer@200a000 {
compatible = qcom,kpss-timer, qcom,msm-timer
On 10/07/2014 02:41 PM, Lina Iyer wrote:
@@ -144,7 +148,27 @@
};
};
- saw_l2: regulator@f9012000 {
+ saw0: power-controller@f9089000 {
+ compatible = qcom,msm8974-saw2-v2.1-cpu;
+ reg =
On 10/01/14 11:15, Josh Cartwright wrote:
Yeah, the description of this thing is a bit awkward.
:-/ I tried to make the binding future proof.
I'm not sure how I'd feel about just just adding qcom,kpss-wdt to the
timer node compatible. I'm wondering if the WDT(s) should be a
subnode(s) of
On 09/29/14 17:34, Bjorn Andersson wrote:
+
+#define GET_RX_CHANNEL_INFO(channel, param) \
+ (channel-rx_info_word ? \
+ channel-rx_info_word-param : \
+ channel-rx_info-param)
+
+#define GET_TX_CHANNEL_INFO(channel, param) \
+ (channel-rx_info_word ? \
+
On 10/01, Josh Cartwright wrote:
@@ -96,6 +104,13 @@
cpu-offset = 0x8;
};
+ watchdog@208a038 {
+ compatible = qcom,kpss-wdt-ipq8064;
+ reg = 0x0208a038 0x40;
Not being aligned to 4k or 1k raises
On 09/29/14 22:02, Bjorn Andersson wrote:
On Mon 29 Sep 15:17 PDT 2014, Stephen Boyd wrote:
On 09/29/14 02:14, Srinivas Kandagatla wrote:
@@ -246,6 +247,24 @@
#reset-cells = 1;
};
+ apcs: syscon@2011000 {
+ compatible = syscon
On 09/29/14 17:34, Bjorn Andersson wrote:
+
+- reg:
+ Usage: required
+ Value type: prop-encoded-array
+ Definition: base address and size pair for each area representing the
+ shared memory. The first pair will must represent the main
+ area,
On 09/30/14 12:00, Bjorn Andersson wrote:
Hmm, seems I got that wrong, sorry about that.
But do you mean all wrong as in that I use the wrong bit or to some greater
extent? Currently all following requests should timeout, but maybe we should
have a faster fail-path when we've hit this point?
On 09/30/14 00:36, Ivan T. Ivanov wrote:
On Tue, 2014-09-30 at 10:00 +0530, Kiran Padwal wrote:
I have Linaro cross tool chain with version-4.8.3 and I am simply doing
make zImage without any option.
Hm, no warnings with arm-unknown-linux-gnueabi-gcc (GCC) 4.6.3 and
arm-linux-gnueabihf-gcc
On 09/29/14 02:14, Srinivas Kandagatla wrote:
@@ -246,6 +247,24 @@
#reset-cells = 1;
};
+ apcs: syscon@2011000 {
+ compatible = syscon;
+ reg = 0x2011000 0x1000;
+ };
This is actually a
On 09/29/14 02:15, Srinivas Kandagatla wrote:
@@ -396,6 +407,35 @@
usb-phy = usb4_phy;
};
+ sata_phy0:sata-phy@1b40{
add some spaces here?
+ compatible = qcom,apq8064-sata-phy;
+ reg
On 25 September 2014 18:28, Geert Uytterhoeven geert+rene...@glider.be
wrote:
+Optional properties:
+ - power-on-latency: Power-on latency of the PM domain, in ns,
+ - power-off-latency: Power-off latency of the PM domain, in ns.
+
Example:
power:
On 09/25, Thierry Reding wrote:
On Thu, Sep 25, 2014 at 05:29:10PM +0200, Ulf Hansson wrote:
On 25 September 2014 13:21, Thierry Reding thierry.red...@gmail.com wrote:
I just noticed these patches because they conflicted with some of the
local patches I had to add a very similar
On 09/15/14 04:10, Catalin Marinas wrote:
On Fri, Sep 12, 2014 at 07:59:29PM +0100, Stephen Boyd wrote:
On 09/12/14 05:14, Marc Zyngier wrote:
We surely can handle the UNDEF and do something there. We just can't do
it the way Doug described it above.
I suggested doing that for something else
On 09/15/14 14:47, Sonny Rao wrote:
On Mon, Sep 15, 2014 at 1:33 PM, Stephen Boyd sb...@codeaurora.org wrote:
On 09/15/14 04:10, Catalin Marinas wrote:
On Fri, Sep 12, 2014 at 07:59:29PM +0100, Stephen Boyd wrote:
On 09/12/14 05:14, Marc Zyngier wrote:
We surely can handle the UNDEF and do
On 09/12/14 05:14, Marc Zyngier wrote:
Hi Christopher,
On 12/09/14 12:43, Christopher Covington wrote:
Hi Marc,
On 09/11/2014 01:43 PM, Marc Zyngier wrote:
On 11/09/14 18:29, Doug Anderson wrote:
I did this in the past (again, see Sonny's thread), but didn't
consider myself knowledgeable
Yay nitpicks!
On 09/12/14 10:29, Andy Gross wrote:
+
+struct qcom_dwc3_usb_phy {
+ void __iomem*base;
+ struct device *dev;
+ struct phy *phy;
Align with other members?
+
+static int wait_for_latch(void __iomem *addr)
+{
+ u32 retry = 10;
Why not
On 07/10/14 07:26, Maxime Ripard wrote:
I guess that the kind of things we could discuss after posting these
patches, but yep, it looks reasonnable.
I'll try to get things a bit cleaner, and post them in the next days.
I never saw anything. Did you do any cleaning/posting? I'm going to try
On 09/11/14 10:43, Marc Zyngier wrote:
If I was suicidal, I'd suggest you could pass a parameter to the command
line, interpreted by the timer code... But I since I'm not, let's
pretend I haven't said anything... ;-)
I did this in the past (again, see Sonny's thread), but didn't
consider
Adding Mark Brown who finished off introducing IORESOURCE_REG.
On 09/08/14 07:52, Grant Likely wrote:
On Tue, 2 Sep 2014 18:45:00 +0300, Stanimir Varbanov svarba...@mm-sol.com
wrote:
+
unsigned long __weak pci_address_to_pio(phys_addr_t address)
{
if (address IO_SPACE_LIMIT)
@@
On 09/02/14 08:45, Stanimir Varbanov wrote:
Hi Grant,
I came down to this. Could you review? Is that
implementation closer to the suggestion made by you.
I like this patch (but I'm biased because I want it to exist). Feel free
to add my Tested-by.
---
drivers/of/address.c | 49
On 08/29/14 16:41, Courtney Cavin wrote:
On Sat, Aug 30, 2014 at 01:14:23AM +0200, Bjorn Andersson wrote:
From: Kumar Gala ga...@codeaurora.org
Add driver for Qualcomm MSM Hardware Mutex block that exists on
newer Qualcomm SoCs.
Cc: Jeffrey Hugo jh...@codeaurora.org
Cc: Eric Holmberg
On 08/27/14 11:24, Bjorn Andersson wrote:
On Tue, Jul 29, 2014 at 11:06 PM, Stephen Boyd sb...@codeaurora.org wrote:
On 07/29, Rob Herring wrote:
[..]
You might as well do of_property_read_u32 in the below example.
Fair enough. The example is probably too simple. Things are
sometimes
On 08/25/14 17:31, Lina Iyer wrote:
On Mon, Aug 25, 2014 at 04:40:33PM -0700, Stephen Boyd wrote:
On 08/19/14 15:15, Lina Iyer wrote:
diff --git a/Documentation/devicetree/bindings/arm/msm/spm.txt
b/Documentation/devicetree/bindings/arm/msm/spm.txt
new file mode 100644
index 000..318e024
On 08/12/14 17:57, Stepan Moskovchenko wrote:
diff --git a/drivers/of/device.c b/drivers/of/device.c
index f685e55..3e116f6 100644
--- a/drivers/of/device.c
+++ b/drivers/of/device.c
@@ -54,7 +54,7 @@ int of_device_add(struct platform_device *ofdev)
/* name and id have to be set so
On 07/28/14 01:39, Ivan T. Ivanov wrote:
I am working on proposal from Stephen Boyd to encode GPIO/MPP mode and
source select into combined function. Something like this one:
#define PM8XXX_DIGITAL_IN 0
#define PM8XXX_DIGITAL_OUT1
#define PM8XXX_DIGITAL_IN_OUT
On 07/29, Rob Herring wrote:
On Tue, Jul 29, 2014 at 8:07 PM, Stephen Boyd sb...@codeaurora.org wrote:
On 07/29/14 16:45, Grant Likely wrote:
On Tue, 29 Jul 2014 17:06:42 +0300, Stanimir Varbanov
svarba...@mm-sol.com wrote:
This was just an example. Of course it has many issues
On 07/29/14 16:45, Grant Likely wrote:
On Tue, 29 Jul 2014 17:06:42 +0300, Stanimir Varbanov svarba...@mm-sol.com
wrote:
This was just an example. Of course it has many issues and probaly it is
wrong:) The main goal was to understand does IORESOURCE_REG resource
type and parsing the *reg*
On 07/24/14 08:40, Linus Walleij wrote:
On Thu, Jul 24, 2014 at 1:47 AM, Stephen Boyd sb...@codeaurora.org wrote:
Please add these constants to the table of valid power-source values and use
something like I did to translate them to register values - it makes the DT
much more readable
On 07/23/14 09:05, Ivan T. Ivanov wrote:
both on
pm8xxx and qpnp-pin there are two different HW blocks, one for GPIO and one
for
MPP. And if you look in your pinconf_set function you will see that they are
very different.
I bet that the hardware blocks are almost identical, just register
On 07/22/14 14:46, Bjorn Andersson wrote:
For pm8941 the valid power supply values are:
GPIO 1-14
0: VPH
2: SMPS3
3: LDO6
GPIO 15-18
2: SMPS3
3: LDO6
GPIO 19-36
0: VPH
1: VDD_TORCH
2: SPMS3
3: LDO6
MPP 1-8
0: VPH
1: LDO1
2: SPMS3
3: LDO6
For
On 07/21/14 09:06, Lorenzo Pieralisi wrote:
diff --git a/arch/arm64/kernel/cpuidle.c b/arch/arm64/kernel/cpuidle.c
new file mode 100644
index 000..46eb3ea
--- /dev/null
+++ b/arch/arm64/kernel/cpuidle.c
@@ -0,0 +1,27 @@
+/*
+ * ARM64 CPU idle arch support
+ *
+ * Copyright (C) 2014
On 07/17/14 09:17, Stanimir Varbanov wrote:
Hello everyone,
Here is the continuation of patch sets sent recently about Qualcomm
QPNP SPMI PMICs.
The previous version of the patch set can be found at [1].
Changes since v1:
- removed completely custom *of* parser
- renamed the mfd driver
On 07/11/14 13:53, Stephen Boyd wrote:
On 06/12/14 09:41, Georgi Djakov wrote:
Add support for the multimedia clock controller found on the APQ8084
based platforms. This will allow the multimedia device drivers to
control their clocks.
Signed-off-by: Georgi Djakov gdja...@mm-sol.com
---
I
On 07/14/14 06:58, Ivan T. Ivanov wrote:
On Fri, 2014-07-11 at 18:56 -0700, Stephen Boyd wrote:
On 07/10/14 02:53, Linus Walleij wrote:
On Wed, Jul 9, 2014 at 11:18 PM, Bjorn Andersson bj...@kryo.se wrote:
On Wed, Jul 9, 2014 at 1:53 AM, Linus Walleij linus.wall...@linaro.org
wrote:
On Tue
On 06/12/14 09:41, Georgi Djakov wrote:
Add support for the multimedia clock controller found on the APQ8084
based platforms. This will allow the multimedia device drivers to
control their clocks.
Signed-off-by: Georgi Djakov gdja...@mm-sol.com
---
I started picking up the qcom clock
only seen traces of the actual function matrix;
for pm8xxx I have no documentation and for pm8x41 they are only listed as
func[1-2] and dtest[1-4].
Maybe if someone at Qualcomm could release such a list we could provide a
proper table instead.
I guess Stephen Boyd can help us. (?)
Ok. normal
On 07/07/14 21:50, Viresh Kumar wrote:
On 4 July 2014 09:51, Viresh Kumar viresh.ku...@linaro.org wrote:
Yeah, having something like what you suggested from DT is the perfect
solution to get over this. The only reason why I am not touching that here
is to not delay other patches just because
On 07/06/14 09:47, Rickard Strandqvist wrote:
Set reasonable initial value of some variables, in case
they do not get set to something otherwise.
And I've also added a plausibility control of the values.
Signed-off-by: Rickard Strandqvist rickard_strandqv...@spectrumdigital.se
---
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