On Fri, May 31, 2013 at 11:30:29PM +0200, Arnd Bergmann wrote:
On Thursday 30 May 2013, ludovic.desroc...@atmel.com wrote:
+/*
+ * Source and/or destination peripheral ID
+ */
+#define AT91_DMA_CFG_PER_ID_MASK (0xff)
+#define AT91_DMA_CFG_PER_ID(id)(id
On Fri, May 31, 2013 at 04:11:40PM -0700, Olof Johansson wrote:
On Fri, May 31, 2013 at 2:31 AM, Nicolas Ferre nicolas.fe...@atmel.com
wrote:
On 31/05/2013 11:16, Ludovic Desroches :
On Thu, May 30, 2013 at 06:39:36PM +0200, Jean-Christophe PLAGNIOL-VILLARD
wrote:
On 18:32 Thu 30
Hi Benoit,
On Wed, May 29, 2013 at 19:05:35, Cousson, Benoit wrote:
And in this case, you do not introduce any new revision.
There is no point to update the binding each time we add a new SoC
variant that will contain the exact same IP.
I think it will mainly confuse the user that will
Am Montag, 3. Juni 2013, 05:22:19 schrieb Baruch Siach:
Hi Heiko,
On Mon, Jun 03, 2013 at 12:56:37AM +0200, Heiko Stübner wrote:
Add the possibility to get the clock-frequency from a timer clock instead
of specifying it as dt property. Additionally also add the possibility
to also define
Am Montag, 3. Juni 2013, 05:27:11 schrieb Olof Johansson:
On Mon, Jun 03, 2013 at 01:00:31AM +0200, Heiko Stübner wrote:
This adds basic support for clocks on Rockchip rk3066 SoCs.
The clock handling thru small dt nodes is heavily inspired by the
sunxi clk code.
The clock specifiers
Am Montag, 3. Juni 2013, 04:08:37 schrieb Arnd Bergmann:
On Monday 03 June 2013 01:01:03 Heiko Stübner wrote:
+#if defined(CONFIG_DEBUG_RK29_UART0)
+#define ROCKCHIP_UART_DEBUG_PHYS_BASE 0x2006
+#define ROCKCHIP_UART_DEBUG_VIRT_BASE 0xfe06
0xfed6 maybe? looks like a typo.
On Fri, 31 May 2013, Bryan Wu wrote:
On Wed, May 22, 2013 at 1:12 AM, Linus Walleij
linus.wall...@stericsson.com wrote:
From: Linus Walleij linus.wall...@linaro.org
Based on pending device tree support in the LP55xx drivers
we can add the correct LED and channel configuration from the
Am Montag, 3. Juni 2013, 04:15:46 schrieb Arnd Bergmann:
On Monday 03 June 2013 01:02:20 Heiko Stübner wrote:
index 000..094b37d
--- /dev/null
+++ b/arch/arm/mach-rockchip/rockchip.c
If all goes well, this file can be removed again in 3.11 since it's
all generic, but let's add it
On Monday 03 June 2013 10:23:49 Heiko Stübner wrote:
Am Montag, 3. Juni 2013, 04:15:46 schrieb Arnd Bergmann:
Can't you use
of_clk_init(NULL);
clocksource_of_init();
here and change the two drivers to provide the respective macros?
hmm, while this would make a lot of
Am Montag, 3. Juni 2013, 11:22:35 schrieb Arnd Bergmann:
On Monday 03 June 2013 10:23:49 Heiko Stübner wrote:
Am Montag, 3. Juni 2013, 04:15:46 schrieb Arnd Bergmann:
Can't you use
of_clk_init(NULL);
clocksource_of_init();
here and change the two drivers to provide the
On Mon, Jun 3, 2013 at 5:05 AM, Vineet Gupta vineet.gup...@synopsys.com wrote:
On 06/01/2013 03:48 AM, Grant Likely wrote:
If I were working on this system I'd drop the
snps,arc700-intc node entirely and have a single abilis,tb10x-intc that
encapsulated the properties of both (you would of
Hi Afzal,
On 06/03/2013 09:49 AM, Mohammed, Afzal wrote:
Hi Benoit,
On Wed, May 29, 2013 at 19:05:35, Cousson, Benoit wrote:
And in this case, you do not introduce any new revision.
There is no point to update the binding each time we add a new SoC
variant that will contain the exact
From: Michal Simek mon...@monstr.eu
DTB is always big-endian that's why it is necessary
to properly convert value (*p).
It is automatically done in of_property_read_u32().
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v4: None
Changes in v3:
- fix commit message
Changes in
Hi,
I have done more changes in the driver to support probing
on little and big endian system where detection is done
directly on the hardware.
I have also done some cleanups to get it to the better shape.
Thanks for your review,
Michal
Changes in v4:
- Acked by Arnd
- Remove video: xilinxfb:
On Fri, 2013-05-24 at 13:53 +0100, Lorenzo Pieralisi wrote:
In case some transactions to the Serial Power Controller (SPC) are lost owing
to multiple operations handled at once by the M3 controller the OS needs to
rely on a configuration API that can time out so that failures do not result
in
On Monday 03 June 2013 11:46:57 Heiko Stübner wrote:
The timers are of the same type and the clocksource driver just grabs the
first of them as clockevent and the second as clocksource, so I think two
CLOCKSOURCE_OF_DECLARE lines won't do.
Ok, got it. I was confused by the fact that the
On Mon, Jun 03, 2013 at 11:15:32AM +0100, Jon Medhurst (Tixy) wrote:
On Fri, 2013-05-24 at 13:53 +0100, Lorenzo Pieralisi wrote:
In case some transactions to the Serial Power Controller (SPC) are lost
owing
to multiple operations handled at once by the M3 controller the OS needs to
rely
On Mon, 2013-06-03 at 12:52 +0100, Lorenzo Pieralisi wrote:
On Mon, Jun 03, 2013 at 11:15:32AM +0100, Jon Medhurst (Tixy) wrote:
On Fri, 2013-05-24 at 13:53 +0100, Lorenzo Pieralisi wrote:
In case some transactions to the Serial Power Controller (SPC) are lost
owing
to multiple
dw_apb_timer_init used to search the devicetree for matching timer
devices, making calls to it from board files necessary.
Change the dw_apb_timer_init to work with CLOCKSOURCE_OF_DECLARE.
With this change the function gets called once for each timer node
and tracks these number of calls to
On 06/03/2013 07:15 AM, Heiko Stübner wrote:
dw_apb_timer_init used to search the devicetree for matching timer
devices, making calls to it from board files necessary.
Change the dw_apb_timer_init to work with CLOCKSOURCE_OF_DECLARE.
With this change the function gets called once for each
Simplification is done by using OF helper function
which increase readability of code and remove
(if (var) var = be32_to_cpup;) assignment.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2:
- New patch in this series
drivers/gpio/gpio-xilinx.c | 24 ++--
Describe gpio-xilinx binding.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2:
- Extend description
.../devicetree/bindings/gpio/gpio-xilinx.txt | 48 ++
1 file changed, 48 insertions(+)
create mode 100644
On Sat, Jun 01, 2013 at 12:44:09PM +0200, Jan Luebbe wrote:
Instead of allocating a struct pps_gpio_platform_data in the DT case, store
the necessary information in struct pps_gpio_device_data itself. This avoids
an additional allocation and the ifdef. It also gets rid of some indirection.
On Fri, May 31, 2013 at 08:46:55PM +0200, Jan Luebbe wrote:
Signed-off-by: Jan Luebbe j...@pengutronix.de
Acked-by: Rodolfo Giometti giome...@enneenne.com
--
GNU/Linux Solutions e-mail: giome...@enneenne.com
Linux Device Driver giome...@linux.it
Michael Grzeschik m...@pengutronix.de writes:
From: Michael Grzeschik m.grzesc...@pengutronix.de
This adds two little devicetree helper functions for determining the
dr_mode (host, peripheral, otg) and phy_type (utmi, ulpi,...) from
the devicetree.
This one needs an ack from Felipe.
Michael Grzeschik m...@pengutronix.de writes:
From: Michael Grzeschik m.grzesc...@pengutronix.de
This patch makes it possible to configure the PTW, PTS and STS bits
inside the portsc register for host and device mode before the driver
starts and the phy can be addressed as hardware
Michael Grzeschik m...@pengutronix.de writes:
From: Sascha Hauer s.ha...@pengutronix.de
Even if a chipidea core is otg capable the board may not. This allows
may not be
to explicitly set the core to host/peripheral mode. Without these
flags the driver falls back to the old behaviour.
Michael Grzeschik m...@pengutronix.de writes:
From: Sascha Hauer s.ha...@pengutronix.de
Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
Also please add a description.
Regards,
--
Alex
___
devicetree-discuss mailing list
Sascha Hauer s.ha...@pengutronix.de writes:
On Sat, Jun 01, 2013 at 10:19:32AM +0200, Michael Grzeschik wrote:
On Sat, Jun 01, 2013 at 09:39:33AM +0200, Sascha Hauer wrote:
On Fri, May 31, 2013 at 08:38:48PM +0200, Michael Grzeschik wrote:
From: Michael Grzeschik m.grzesc...@pengutronix.de
Michael Grzeschik m...@pengutronix.de writes:
From: Philipp Zabel p.za...@pengutronix.de
Please say something in the description.
Thanks,
--
Alex
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devicetree-discuss mailing list
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Hi Suman,
On 06/01/2013 12:17 AM, Anna, Suman wrote:
Benoit, Tony,
On 04/17/2013 06:23 PM, Suman Anna wrote:
OMAP5 has 6 timers (GPTimers 5, 6, 8 to 11) that are capable of PWM.
The PWM capability property is missing from the node definitions of
couple of timers, and this has been fixed.
On Mon, Jun 03, 2013 at 01:03:50PM +0100, Jon Medhurst (Tixy) wrote:
On Mon, 2013-06-03 at 12:52 +0100, Lorenzo Pieralisi wrote:
On Mon, Jun 03, 2013 at 11:15:32AM +0100, Jon Medhurst (Tixy) wrote:
On Fri, 2013-05-24 at 13:53 +0100, Lorenzo Pieralisi wrote:
In case some transactions to
DT source (minimal) for AM4372 SoC to represent AM43x SoC's. Those
represented here are the minimal DT nodes necessary to get kernel
booting.
In DT nodes, ti,hwmod property has not been added, this would be
added along with PRCM support for AM43x.
Signed-off-by: Ankur Kishore a-kish...@ti.com
On Monday 03 June 2013 14:15:28 Heiko Stübner wrote:
dw_apb_timer_init used to search the devicetree for matching timer
devices, making calls to it from board files necessary.
Change the dw_apb_timer_init to work with CLOCKSOURCE_OF_DECLARE.
With this change the function gets called once for
From: Stephen Warren swar...@nvidia.com
Previously, the #line parsing regex ended with ({WS}+[0-9]+)?. The {WS}
could match line-break characters. If the #line directive did not contain
the optional flags field at the end, this could cause any integer data on
the next line to be consumed as
Highbank supports SGPIO by bit-banging out the SGPIO signals over
three GPIO pins defined in the DTB. Add support for this SGPIO
functionality.
Signed-off-by: Mark Langsdorf mark.langsd...@calxeda.com
---
Changes from v1:
Moved all global variables to a private structure
Replaced
From: Wei Yongjun yongjun_...@trendmicro.com.cn
Just fixed a typo in emac_probe().
Signed-off-by: Wei Yongjun yongjun_...@trendmicro.com.cn
---
drivers/net/ethernet/allwinner/sun4i-emac.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Replace /include/ by #include for AM33XX and AM35XX device tree
files, in order to use the C pre-processor, making use of #define
features possible.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
arch/arm/boot/dts/am335x-bone.dts |2 +-
arch/arm/boot/dts/am335x-evm.dts
The pinctrl IP inside the AM33XX family differs slightly from
what is found on OMAP2+. Define a specific header to take account
of the differences.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
include/dt-bindings/pinctrl/am33xx.h | 37 ++
1 files
Using constants for pinctrl allows a better readability, and removes
redundancy with comments.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
arch/arm/boot/dts/am335x-bone.dts | 18 +-
arch/arm/boot/dts/am335x-evm.dts | 58 ++--
Hello,
Following my series for OMAP2+, this series makes use of the C preprocessor
when compiling AM3xxx DT files, and accomplishes some improvements to improve
overall readability.
The .dtb files were diff-tested before and after applying the series to
guarantee identity for all targets.
To
Use standard GPIO constants to enhance the readability of DT GPIOs.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
arch/arm/boot/dts/am335x-bone.dts |8
arch/arm/boot/dts/am335x-evm.dts | 14 +++---
arch/arm/boot/dts/am335x-evmsk.dts | 16
On 06/03/2013 03:19 PM, Afzal Mohammed wrote:
DT source (minimal) for AM4372 SoC to represent AM43x SoC's. Those
represented here are the minimal DT nodes necessary to get kernel
booting.
In DT nodes, ti,hwmod property has not been added, this would be
added along with PRCM support for
On Sun, Jun 02, 2013 at 07:30:53PM -0700, Guenter Roeck wrote:
On Sun, Jun 02, 2013 at 10:14:05PM +0200, Arnaud Ebalard wrote:
...
note: this should not be an issue but this v3 is based on
jcooper/mvebu/fixes branch.
I don't know about this branch/repository. If there are hwmon
Hi Dan,
On 05/31/2013 05:44 PM, Dan Murphy wrote:
The GPIO for LED D1 on the omap4-panda a1-a3 rev and the omap4-panda-es
are different.
A1-A3 = gpio_wk7
ES = gpio_110
There is no change to LED D2
Abstract away the pinmux and the LED definitions for the two boards into
the respective
On Mon, 03 Jun 2013, J Keerthy wrote:
From: Graeme Gregory g...@slimlogic.co.uk
Add the various binding files for the palmas family of chips. There is a
top level MFD binding then a seperate binding for regulators IP blocks on
chips.
Signed-off-by: Graeme Gregory g...@slimlogic.co.uk
Hi Dan,
On 05/31/2013 06:12 PM, Florian Vaussard wrote:
Hello Dan,
On 05/31/2013 05:45 PM, Dan Murphy wrote:
Update the dt property ti,audpwron-gpio to use the
gpio macro definition for GPIO_ACTIVE_HIGH.
Signed-off-by: Dan Murphy dmur...@ti.com
---
Hi Tony,
On 05/31/2013 03:23 PM, Benoit Cousson wrote:
Hi Tony,
Please pull two DTS fixes for the next -rc.
Please ignore that one. I'll send a new one with one more fix ASAP.
Thanks,
Benoit
Thanks,
Benoit
The following changes since commit
Hi Tony,
Please pull three DTS fixes for the next -rc.
Thanks,
Benoit
The following changes since commit d683b96b072dc4680fc74964eca77e6a23d1fa6e:
Linus Torvalds (1):
Linux 3.10-rc4
are available in the git repository at:
From: Stephen Warren swar...@nvidia.com
Previously, the #line parsing regex ended with ({WS}+[0-9]+)?. The {WS}
could match line-break characters. If the #line directive did not contain
the optional flags field at the end, this could cause any integer data on
the next line to be consumed as part
Hey Alex,
On Mon, Jun 03, 2013 at 03:35:37PM +0300, Alexander Shishkin wrote:
Michael Grzeschik m...@pengutronix.de writes:
From: Michael Grzeschik m.grzesc...@pengutronix.de
This patch makes it possible to configure the PTW, PTS and STS bits
inside the portsc register for host and
The first three patches deals with cleanup of extcon inorder to get
through compilation without any issues. It also adds an API to get
extcon device from dt node which I felt was missing.
The next two patches deals with adapt dwc3 to use extcon framework.
The 4th patch (usb: dwc3: omap: improve
Added an API of_extcon_get_extcon_dev() to be used by drivers to get
extcon device in the case of dt boot (this can be used instead of
extcon_get_extcon_dev()).
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
drivers/extcon/extcon-class.c | 40
On Mon, 2013-06-03 at 21:36 +0800, Wei Yongjun wrote:
Just fixed a typo in emac_probe().
also fixed a memory leak.
diff --git a/drivers/net/ethernet/allwinner/sun4i-emac.c
b/drivers/net/ethernet/allwinner/sun4i-emac.c
[]
@@ -821,7 +821,7 @@ static int emac_probe(struct platform_device
Modified dwc3-omap to receive connect and disconnect notification using
extcon framework. Also did the necessary cleanups required after
adapting to extcon framework.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Acked-by: Felipe Balbi ba...@ti.com
---
Changes from v2:
* updated the
Improved the error handling of dwc3_omap_probe so that on error
conditions dwc3_omap is left in the original state.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
drivers/usb/dwc3/dwc3-omap.c | 17 ++---
1 file changed, 14 insertions(+), 3 deletions(-)
diff --git
Added EXPORT_SYMBOL_GPL() for extcon_register_interest and
extcon_register_notifier in order to avoid undefined reference
error when building the consumer modules of extcon as _modules_.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
Changed the extcon config type to bool from module. Having extcon
config type as module leads to some undefined reference to errors
if the modules that uses these APIs are made as built-in and extcon
as module.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
drivers/extcon/Kconfig |2
On Mon, 2013-06-03 at 09:36 -0600, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
Previously, the #line parsing regex ended with ({WS}+[0-9]+)?. The {WS}
could match line-break characters. If the #line directive did not contain
the optional flags field at the end, this could
On Mon, Jun 3, 2013 at 1:18 AM, Lee Jones lee.jo...@linaro.org wrote:
On Fri, 31 May 2013, Bryan Wu wrote:
On Wed, May 22, 2013 at 1:12 AM, Linus Walleij
linus.wall...@stericsson.com wrote:
From: Linus Walleij linus.wall...@linaro.org
Based on pending device tree support in the LP55xx
On Thu, May 23, 2013 at 05:46:44PM +0300, Roger Quadros wrote:
On 05/23/2013 05:11 PM, Alan Stern wrote:
On Thu, 23 May 2013, Roger Quadros wrote:
Device tree probed devices don't get dma_mask set. Previously
we were setting the dma_mask pointer only if it was NULL.
However, the
Device Tree binding for the basic clock multiplexor, plus the setup
function to register the clock. Based on the existing fixed-clock
binding.
Also relocate declaration of of_fixed_factor_clk_setup to keep things
tidy.
Signed-off-by: Mike Turquette mturque...@linaro.org
---
This series introduces binding definitions for common register-mapped
clock multiplexor and divider IP blocks, and the corresponding setup
functions once they are matched. The bindings are close the struct
definitions but please don't hold that against the binding: the struct
definitions closely
Walks the clocks array of parent clock phandles and returns the
number.
Signed-off-by: Mike Turquette mturque...@linaro.org
---
DT gurus, please let me know if this is stupid. I am unfamiliar with
parsing DT blobs and associated APIs.
drivers/clk/clk.c| 6 ++
Devicetree binding for the basic clock divider, plus the setup function
to register the clock. Based on the existing fixed-clock binding.
Signed-off-by: Mike Turquette mturque...@linaro.org
---
.../devicetree/bindings/clock/divider-clock.txt| 80
Hi Mike,
I think it's a multiplexEr clock in the patch title, and see below
Am Montag, 3. Juni 2013, 19:53:09 schrieb Mike Turquette:
Device Tree binding for the basic clock multiplexor, plus the setup
function to register the clock. Based on the existing fixed-clock
binding.
Also
The following changes since commit f722406faae2d073cc1d01063d1123c35425939e:
Linux 3.10-rc1 (2013-05-11 17:14:08 -0700)
are available in the git repository at:
git://github.com/linux-wmt/linux-vtwm.git tags/vt8500/dts-3.11
for you to fetch changes up to
This is split off of my Rockchip support series from yesterday. It's now
a patch more than before, as the third patch enables the timer to be used
thru clocksource_of_init and moves picoxcell and socfpga to it.
Heiko Stuebner (3):
clocksource: dw_apb_timer_of: use the clocksource as sched
Add the possibility to get the clock-frequency from a timer clock instead
of specifying it as dt property. Additionally also add the possibility
to also define a controlling periphal clock for the timer block.
The clock-frequency property is kept to act as fallback if no clocks
are specified.
dw_apb_timer_init used to search the devicetree for matching timer
devices, making calls to it from board files necessary.
Change the dw_apb_timer_init to work with CLOCKSOURCE_OF_DECLARE.
With this change the function gets called once for each timer node
and tracks these number of calls to
Quoting Heiko Stübner (2013-06-03 12:33:19)
Hi Mike,
I think it's a multiplexEr clock in the patch title, and see below
Doh, you are right. But xor is so much cooler looking than xer...
Am Montag, 3. Juni 2013, 19:53:09 schrieb Mike Turquette:
Device Tree binding for the basic clock
Padmavathi,
On Sun, Jun 2, 2013 at 10:19 PM, Padmavathi Venna padm...@samsung.com wrote:
+static unsigned long reg_save[][2] = {
+ {ASS_CLK_SRC, 0},
+ {ASS_CLK_DIV, 0},
+ {ASS_CLK_GATE, 0},
+};
+
+/* list of all parent clock list */
+static const char *mout_audss_p[]
Padmavathi,
On Sun, Jun 2, 2013 at 10:19 PM, Padmavathi Venna padm...@samsung.com wrote:
Audio subsystem introduced in s5pv210 and exynos platforms
which has a internal clock controller. This patch adds a node
for the same on exynos5250.
Signed-off-by: Padmavathi Venna padm...@samsung.com
Am Montag, 3. Juni 2013, 22:07:22 schrieb Mike Turquette:
Quoting Heiko Stübner (2013-06-03 12:33:19)
Hi Mike,
I think it's a multiplexEr clock in the patch title, and see below
Doh, you are right. But xor is so much cooler looking than xer...
Am Montag, 3. Juni 2013, 19:53:09
Padmavathi,
On Sun, Jun 2, 2013 at 10:19 PM, Padmavathi Venna padm...@samsung.com wrote:
+ clocks = clock_audss EXYNOS_I2S_BUS,
+ clock_audss EXYNOS_I2S_BUS,
+ clock_audss EXYNOS_SCLK_I2S,
+ clock_audss
On 06/03/2013 08:18 AM, Lee Jones wrote:
On Mon, 03 Jun 2013, J Keerthy wrote:
Add the various binding files for the palmas family of chips. There is a
top level MFD binding then a seperate binding for regulators IP blocks on
chips.
diff --git
Am Montag, 3. Juni 2013, 22:15:45 schrieb Heiko Stübner:
Am Montag, 3. Juni 2013, 22:07:22 schrieb Mike Turquette:
Quoting Heiko Stübner (2013-06-03 12:33:19)
Hi Mike,
I think it's a multiplexEr clock in the patch title, and see below
Doh, you are right. But xor is so much
Am Montag, 3. Juni 2013, 19:53:10 schrieb Mike Turquette:
Devicetree binding for the basic clock divider, plus the setup function
to register the clock. Based on the existing fixed-clock binding.
Signed-off-by: Mike Turquette mturque...@linaro.org
---
[...]
+/**
+ * of_div_clk_setup() -
Am Montag, 3. Juni 2013, 19:53:07 schrieb Mike Turquette:
This series introduces binding definitions for common register-mapped
clock multiplexor and divider IP blocks, and the corresponding setup
functions once they are matched. The bindings are close the struct
definitions but please don't
On Sat, 1 Jun 2013 12:44:09 +0200 Jan Luebbe j...@pengutronix.de wrote:
Instead of allocating a struct pps_gpio_platform_data in the DT case, store
the necessary information in struct pps_gpio_device_data itself. This avoids
an additional allocation and the ifdef. It also gets rid of some
Andrew,
On Mon, Jun 3, 2013 at 4:46 PM, Andrew Bresticker abres...@chromium.org wrote:
I think this is supposed to be xxti which might or might not be
fin_pll. In the exynos4 code these are two different clocks that
are chosen by OM[0]. I'd bet that 99% of the time they are the same,
but it
Hi Doug,
On Tue, Jun 4, 2013 at 1:48 AM, Doug Anderson diand...@chromium.org wrote:
Padmavathi,
On Sun, Jun 2, 2013 at 10:19 PM, Padmavathi Venna padm...@samsung.com wrote:
+ clocks = clock_audss EXYNOS_I2S_BUS,
+ clock_audss EXYNOS_I2S_BUS,
+
Hi Heiko,
On Mon, Jun 03, 2013 at 09:59:55PM +0200, Heiko Stübner wrote:
dw_apb_timer_init used to search the devicetree for matching timer
devices, making calls to it from board files necessary.
Change the dw_apb_timer_init to work with CLOCKSOURCE_OF_DECLARE.
With this change the function
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