Hi,
On Wednesday 17 July 2013 10:55 PM, Greg KH wrote:
On Wed, Jul 17, 2013 at 03:02:59PM +0530, Kishon Vijay Abraham I wrote:
Hi,
On Wednesday 17 July 2013 11:59 AM, Greg KH wrote:
On Wed, Jun 26, 2013 at 05:17:29PM +0530, Kishon Vijay Abraham I wrote:
+menuconfig GENERIC_PHY
+ tristate
On Thu, Jul 18, 2013 at 11:33:17AM +0530, Kishon Vijay Abraham I wrote:
Wanted to group all the PHY drivers to be used by different subsystems
(SATA/USB/PCIE/HDMI/VIDEO) into a single entity. There were some comments
in my
initial version [3] on using a bus_type instead of class but then
On Thursday 18 July 2013 11:54 AM, Greg KH wrote:
On Thu, Jul 18, 2013 at 11:33:17AM +0530, Kishon Vijay Abraham I wrote:
Wanted to group all the PHY drivers to be used by different subsystems
(SATA/USB/PCIE/HDMI/VIDEO) into a single entity. There were some comments
in my
initial version [3]
On 07/17/2013 03:30 PM, Grygorii Strashko wrote:
On 07/17/2013 02:57 PM, Roger Quadros wrote:
Hi Grygorii,
On 07/17/2013 02:41 PM, Grygorii Strashko wrote:
Hi Tony, Kevin
This patch series introduces dynamic pinctrl handling in OMAP device
framework
in the same way as it was before
Used the generic PHY framework API to create the PHY. Now the power off and
power on are done in omap_usb_power_off and omap_usb_power_on respectively.
However using the old USB PHY library cannot be completely removed
because OTG is intertwined with PHY and moving to the new framework
will break
Used the generic PHY framework API to create the PHY. For powering on
and powering off the PHY, power_on and power_off ops are used. Once the
MUSB OMAP glue is adapted to the new framework, the suspend and resume
ops of usb phy library will be removed.
However using the old usb phy library cannot
Added a generic PHY framework that provides a set of APIs for the PHY drivers
to create/destroy a PHY and APIs for the PHY users to obtain a reference to
the PHY with or without using phandle.
This framework will be of use only to devices that uses external PHY (PHY
functionality is not embedded
The PHY framework provides a set of APIs for the PHY drivers to
create/destroy a PHY and APIs for the PHY users to obtain a reference to the
PHY with or without using phandle. For dt-boot, the PHY drivers should
also register *PHY provider* with the framework.
PHY drivers should create the PHY by
Updated the usb_otg_hs dt data to include the *phy* and *phy-names*
binding in order for the driver to use the new generic PHY framework.
Also updated the Documentation to include the binding information.
The PHY binding information can be found at
In order for controllers to get PHY in case of non dt boot, the phy
binding information (phy device name) should be added in the platform
data of the controller.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
Acked-by: Felipe Balbi
Use the generic PHY framework API to get the PHY. The usb_phy_set_resume
and usb_phy_set_suspend is replaced with power_on and
power_off to align with the new PHY framework.
musb-xceiv can't be removed as of now because musb core uses xceiv.state and
xceiv.otg. Once there is a separate state
From: Sylwester Nawrocki s.nawro...@samsung.com
Add a PHY provider driver for the Samsung S5P/Exynos SoC MIPI CSI-2
receiver and MIPI DSI transmitter DPHYs.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Acked-by: Felipe Balbi
From: Sylwester Nawrocki s.nawro...@samsung.com
Use the generic PHY API instead of the platform callback to control
the MIPI DSIM DPHY. The 'phy_label' field is added to the platform
data structure to allow PHY lookup on non-dt platforms.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Now that twl4030-usb is adapted to the new generic PHY framework,
*set_suspend* and *phy_init* ops can be removed from twl4030-usb driver.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Acked-by: Felipe Balbi ba...@ti.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
Now that omap-usb2 is adapted to the new generic PHY framework,
*set_suspend* ops can be removed from omap-usb2 driver.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Acked-by: Felipe Balbi ba...@ti.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
From: Sylwester Nawrocki s.nawro...@samsung.com
Generic PHY drivers are used to handle the MIPI CSIS and MIPI DSIM
DPHYs so we can remove now unused code at arch/arm/plat-samsung.
In case there is any board file for S5PV210 platforms using MIPI
CSIS/DSIM (not any upstream currently) it should use
From: Jingoo Han jg1@samsung.com
Use the generic PHY API to control the DP PHY.
Signed-off-by: Jingoo Han jg1@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
.../devicetree/bindings/video/exynos_dp.txt | 18
From: Sylwester Nawrocki s.nawro...@samsung.com
Use the generic PHY API instead of the platform callback to control
the MIPI CSIS DPHY. The 'phy_label' field is added to the platform
data structure to allow PHY lookup on non-dt platforms
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
From: Jingoo Han jg1@samsung.com
Exynos Display Port can be used only for Exynos SoCs. In addition,
non-DT for EXYNOS SoCs is not supported from v3.11; thus, there is
no need to support non-DT for Exynos Display Port.
The 'include/video/exynos_dp.h' file has been used for non-DT
support and
From: Jingoo Han jg1@samsung.com
Add a PHY provider driver for the Samsung Exynos SoC Display Port PHY.
Signed-off-by: Jingoo Han jg1@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Acked-by: Felipe Balbi ba...@ti.com
Signed-off-by:
* Kishon Vijay Abraham I kis...@ti.com [130717 23:53]:
In order for controllers to get PHY in case of non dt boot, the phy
binding information (phy device name) should be added in the platform
data of the controller.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Reviewed-by: Sylwester
On 06/06/2013 04:49 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
On 10:39 Thu 06 Jun , Michal Simek wrote:
On 06/06/2013 10:29 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
On 18:45 Fri 31 May , Michal Simek wrote:
On 05/31/2013 05:16 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
On 15:57
On Mon, Jul 15, 2013 at 21:38 +0200, Sascha Hauer wrote:
On Mon, Jul 15, 2013 at 08:47:34PM +0200, Gerhard Sittig wrote:
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 6d55eb2..2c07061 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@
* Kishon Vijay Abraham I kis...@ti.com [130717 23:53]:
Updated the usb_otg_hs dt data to include the *phy* and *phy-names*
binding in order for the driver to use the new generic PHY framework.
Also updated the Documentation to include the binding information.
The PHY binding information can be
On Thu, Jul 18, 2013 at 12:16:10PM +0530, Kishon Vijay Abraham I wrote:
+struct phy_provider *__of_phy_provider_register(struct device *dev,
+ struct module *owner, struct phy * (*of_xlate)(struct device *dev,
+ struct of_phandle_args *args));
+struct phy_provider
On Thu, Jul 18, 2013 at 12:16:11PM +0530, Kishon Vijay Abraham I wrote:
Used the generic PHY framework API to create the PHY. Now the power off and
power on are done in omap_usb_power_off and omap_usb_power_on respectively.
However using the old USB PHY library cannot be completely removed
On Wed, Jul 17, 2013 at 11:17:27AM -0400, Eduardo Valentin wrote:
This patch adds to lm75 temperature sensor the possibility
to expose itself as thermal zone device, registered on the
thermal framework.
The thermal zone is built only if a device tree node
describing a thermal zone for this
On Wed, Jul 17, 2013 at 11:17:28AM -0400, Eduardo Valentin wrote:
This patch adds to tmp102 temperature sensor the possibility
to expose itself as thermal zone device, registered on the
thermal framework.
The thermal zone is built only if a device tree node
describing a thermal zone for
On 17 July 2013 20:13, Andrew Lunn and...@lunn.ch wrote:
Are we not going a bit backwards here? You are replacing two lines
with 10 lines.
How about putting these 10 lines into some helper,
of_get_cpu_device()? It would be useful for spear, kirkwood and
imx6q, and maybe others.
+1
On 17 July 2013 19:36, sudeep.karkadanage...@arm.com wrote:
3. Added Acks from Viresh and Shawn
Add it for the new cpufreq drivers included in this patchset too..
___
devicetree-discuss mailing list
devicetree-discuss@lists.ozlabs.org
On Thu, Jul 18, 2013 at 09:04:02AM +0200, Gerhard Sittig wrote:
On Mon, Jul 15, 2013 at 21:38 +0200, Sascha Hauer wrote:
On Mon, Jul 15, 2013 at 08:47:34PM +0200, Gerhard Sittig wrote:
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 6d55eb2..2c07061 100644
* Grygorii Strashko grygorii.stras...@ti.com [130717 09:48]:
Hi,
On 07/17/2013 06:32 PM, Tony Lindgren wrote:
* Grygorii Strashko grygorii.stras...@ti.com [130717 04:49]:
Add dynamic active/idle pin states for uart3/4 which will be applied
when uart3/4 state is switched from active to idle
* Grygorii Strashko grygorii.stras...@ti.com [130717 10:11]:
On 07/17/2013 06:38 PM, Tony Lindgren wrote:
* Grygorii Strashko grygorii.stras...@ti.com [130717 04:49]:
Before switching to DT pinctrl states of OMAP IPs have been handled by hwmod
framework. After switching to DT-boot the pinctrl
Add binding document for MOXA ART SoCs interrupt controller.
Signed-off-by: Jonas Jensen jonas.jen...@gmail.com
---
Notes:
The MOXA ART irqchip driver was added without accompanying devicetree
document.
( in next-20130716 drivers/irqchip/irq-moxart.c )
Applies to
Hi,
Till now we were modelling the RESET line as a voltage regulator and
using the regulator framework to manage it.
[1] introduces a GPIO based reset controller driver. We use that
to manage the PHY reset line, at least for DT boots. For legacy boots,
will still need to use the regulator
We no longer need to model a RESET line as a regulator since
we have the reset-gpio driver available.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/omap5-uevm.dts | 17 -
1 files changed, 8 insertions(+), 9 deletions(-)
diff --git
We no longer need to model a RESET line as a regulator since
we have the reset-gpio driver available.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/omap3-beagle.dts | 17 -
1 files changed, 8 insertions(+), 9 deletions(-)
diff --git
We no longer need to model a RESET line as a regulator since
we have the reset-gpio driver available.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/omap4-panda-common.dtsi | 22 --
1 files changed, 8 insertions(+), 14 deletions(-)
diff --git
Provide RESET controller and Power regulator for the USB PHY,
the USB Host port mode and the PHY device. Provide
pin multiplexer information for USB host pins.
We also relocate omap3_pmx_core pin definations so that they
are close to omap3_pmx_wkup pin definations.
Signed-off-by: Roger Quadros
Till now we were modelling the RESET line as a voltage regulator and
using the regulator framework to manage it.
[1] introduces a GPIO based reset controller driver. We use that
to manage the PHY reset line, at least for DT boots. For legacy boots,
will still need to use the regulator framework
Use a common naming scheme mode0name.modename flags for the
USB host pins to be consistent.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/omap3-beagle.dts | 24
1 files changed, 12 insertions(+), 12 deletions(-)
diff --git
Hi,
On Thursday 18 July 2013 12:50 PM, Greg KH wrote:
On Thu, Jul 18, 2013 at 12:16:10PM +0530, Kishon Vijay Abraham I wrote:
+struct phy_provider *__of_phy_provider_register(struct device *dev,
+struct module *owner, struct phy * (*of_xlate)(struct device *dev,
+struct
On Thursday 18 July 2013 12:51 PM, Greg KH wrote:
On Thu, Jul 18, 2013 at 12:16:11PM +0530, Kishon Vijay Abraham I wrote:
Used the generic PHY framework API to create the PHY. Now the power off and
power on are done in omap_usb_power_off and omap_usb_power_on respectively.
However using the
* Grygorii Strashko grygorii.stras...@ti.com [130718 02:01]:
On 07/18/2013 11:09 AM, Tony Lindgren wrote:
Don't think it's debug code - IO chain need to be rearmed after each
PRCM IO IRQ - otherwise IO wakeup events may be lost (at least on
OMAP4, OMAP5 requires more complex handling(( ).
On Thu, Jul 18, 2013 at 09:04:02AM +0200, Gerhard Sittig wrote:
The common clock API assumes (it's part of the contract) that
there are potentially expensive operations like get, put, prepare
and unprepare, as well as swift and non-blocking operations like
enable and disable.
Let's get
This driver implements a reset controller device that toggle a gpio
connected to a reset pin of a peripheral IC. The delay between assertion
and de-assertion of the reset signal can be configured via device tree.
Signed-off-by: Philipp Zabel p.za...@pengutronix.de
Reviewed-by: Stephen Warren
Hi Samuel,
On Wed, Jul 17, 2013 at 10:07:00PM +0100, Samuel Ortiz wrote:
Hi Lorenzo,
On Tue, Jul 16, 2013 at 05:05:42PM +0100, Lorenzo Pieralisi wrote:
Hello,
version v5 of VExpress SPC driver, please read on the changelog for major
changes and explanations.
The probing scheme
On 00:14 Thu 18 Jul , Brian Norris wrote:
Adding device tree list, keeping patch context
On Wed, Jul 3, 2013 at 2:50 AM, Josh Wu josh...@atmel.com wrote:
In case that the nand device will support some features like Nand Flash
Controller, we want to make the sub feature as a sub node of
The MOXA UC-711X hardware(s) has an ethernet controller that seem to be
developed internally. The IC used is RTL8201CP.
Since there is no public documentation, this driver is mostly the one
published by MOXA that has been heavily cleaned up / ported from linux 2.6.9.
Signed-off-by: Jonas Jensen
On 07/18/2013 10:36 AM, Oleksandr Kozaruk wrote:
Hello Lars,
On Wed, Jul 17, 2013 at 9:04 PM, Lars-Peter Clausen l...@metafoo.de wrote:
+static int twl6032_calibration(struct twl6030_gpadc_data *gpadc)
+{
+ int chn, d1 = 0, d2 = 0, temp;
+ u8 trim_regs[17];
+ int ret;
+
+
On Thu, Jul 18, 2013 at 10:06:57AM +0200, Sascha Hauer wrote:
I think regmap has the potential to solve a number of issues like the
hardcoded readl/writel in the common clock blocks, issues with i2c
clocks and your endianess issue. The biggest question probably is how
to get there without
On 18/07/13 09:24, Sudeep KarkadaNagesha wrote:
On 17/07/13 15:43, Andrew Lunn wrote:
On Wed, Jul 17, 2013 at 03:06:20PM +0100, sudeep.karkadanage...@arm.com
wrote:
From: Sudeep KarkadaNagesha sudeep.karkadanage...@arm.com
[...]
diff --git a/drivers/cpufreq/kirkwood-cpufreq.c
It almost does not matter because most users use only the -start member
of the struct. However if this struct is passed to a platform device
which is then added via platform_device_add() then the -parent member is
also used.
Signed-off-by: Sebastian Andrzej Siewior bige...@linutronix.de
---
If the requested reset controller is not yet available, have reset_control_get
and device_reset return -EPROBE_DEFER so the driver can decide to request
probe deferral.
Signed-off-by: Philipp Zabel p.za...@pengutronix.de
---
drivers/reset/core.c | 2 +-
1 file changed, 1 insertion(+), 1
On Thu, Jul 18, 2013 at 11:26:26AM +0200, Philipp Zabel wrote:
This driver implements a reset controller device that toggle a gpio
connected to a reset pin of a peripheral IC. The delay between assertion
and de-assertion of the reset signal can be configured via device tree.
Signed-off-by:
On Thu, Jul 18, 2013 at 01:57:33PM +0200, Philipp Zabel wrote:
If the requested reset controller is not yet available, have reset_control_get
and device_reset return -EPROBE_DEFER so the driver can decide to request
probe deferral.
Signed-off-by: Philipp Zabel p.za...@pengutronix.de
---
Hi Gerlando,
On Wed, Jul 17, 2013 at 08:35:38AM +0200, Gerlando Falauto wrote:
On 07/16/2013 02:56 PM, Ezequiel Garcia wrote:
[...]
Also, speaking of device bus this nand node should be behind a devicebus
node.
ranges = MBUS_ID(0xf0, 0x01) 0 0 0xf100 0x10 /*
Gerlando,
On Tue, Jul 16, 2013 at 08:51:37PM +0200, Gerlando Falauto wrote:
[...]
Also, speaking of device bus this nand node should be behind a devicebus
node.
ranges = MBUS_ID(0xf0, 0x01) 0 0 0xf100 0x10 /*
internal-regs */
On Thursday 18 July 2013 02:13 PM, majianpeng wrote:
Hi all,
Now i worked on omp2 and met a probelm which someplace close_irq for
3.6second.
The kernel version is 2.6.37. I used trace to find in
irq_action:omap_hsmmc_irq.
This problem occured by removed the sdcard when there are io
On Thu, Jul 18, 2013 at 02:29:52PM +0530, Kishon Vijay Abraham I wrote:
Hi,
On Thursday 18 July 2013 12:50 PM, Greg KH wrote:
On Thu, Jul 18, 2013 at 12:16:10PM +0530, Kishon Vijay Abraham I wrote:
+struct phy_provider *__of_phy_provider_register(struct device *dev,
+ struct module
From: Lad, Prabhakar prabhakar.cse...@gmail.com
add OF support for the tvp7002 driver.
Signed-off-by: Lad, Prabhakar prabhakar.cse...@gmail.com
---
This patch depends on https://patchwork.kernel.org/patch/2828800/
Changes for v4:
1: Improved descrition of end point properties.
Changes for
On Thu, 2013-07-18 at 22:13 +0530, Sricharan R wrote:
Some socs have a large number of interrupts/dma requests to service
the needs of its many peripherals and subsystems. All of the
requests lines from the subsystems are not needed at the same
time, so they have to be muxed to the controllers
On Thu, Jul 18, 2013 at 11:46:39AM -0500, Joel Fernandes wrote:
From: Matt Porter mpor...@ti.com
Add a dmaengine API to retrieve slave SG transfer limits.
The API is optionally implemented by dmaengine drivers and when
unimplemented will return a NULL pointer. A client driver using
this
On 07/17/2013 04:54 PM, Laurent Pinchart wrote:
Hello,
Here's a small patch set that replaces PWM polarity numerical constants with
macros in DT.
The series,
Reviewed-by: Stephen Warren swar...@nvidia.com
I'm (very very) slightly hesitant about patch 3/4, since it's moving
towards all PWMs
this series introduces support for the common clock framework (CCF,
COMMON_CLK Kconfig option) in the PowerPC based MPC512x platform
although the series does touch several subsystems -- serial, spi, net
(can, fs_enet), mtd (nfc), usb, i2c, media (viu), and dts -- all of the
patches are strictly
cleanup the MPC512x SoC's SPI master's use of the clock API
- get, prepare, and enable the MCLK during probe; disable, unprepare and
put the MCLK upon remove; hold a reference to the clock over the
period of use
- fetch MCLK rate (reference) once during probe and slightly reword BCLK
must prepare clocks before enabling them, unprepare after disable
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/mtd/nand/mpc5121_nfc.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/mpc5121_nfc.c b/drivers/mtd/nand/mpc5121_nfc.c
index
cleanup the clock API use of the UART driver which is shared among the
MPC512x and the MPC5200 platforms
- get, prepare, and enable the MCLK during port allocation; disable,
unprepare and put the MCLK upon port release; hold a reference to the
clock over the period of use; check for and
reword the clock control module's registers declaration such that the
MCLK related registers form an array and get indexed by PSC number
this change is in preparation to COMMON_CLK support for the MPC512x
platform, the changed declaration remains neutral to existing code since
the PSC and MSCAN
the common clock drivers were motivated/initiated by ARM development
and apparently assume little endian peripherals
wrap register/peripherals access in the common code (div, gate, mux)
in preparation of adding COMMON_CLK support for other platforms
Signed-off-by: Gerhard Sittig g...@denx.de
---
prepare C preprocessor support when processing MPC512x DTS files
- switch from DTS syntax to CPP syntax for include specs
- create a symlink such that DTS processing can reference includes
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/boot/dts/ac14xx.dts |2 +-
introduce a dt-bindings/ header file for MPC512x clocks,
providing symbolic identifiers for those SoC clocks which
clients will reference from their device tree nodes
Signed-off-by: Gerhard Sittig g...@denx.de
---
include/dt-bindings/clock/mpc512x-clock.h | 59 +
1
this addresses the clock driver aka provider's side of clocks
- prepare for future 'clks ID' phandle references for device tree
based clock lookup in client drivers
- introduce a 'clocks' subtree with an 'osc' node for the crystal
or oscillator SoC input (fixed frequency)
- provide default
this change introduces a clock infrastructure implementation for the
MPC512x PowerPC platform which follows the COMMON_CLK approach and uses
common clock drivers shared with other platforms
this driver implements the publicly announced set of clocks (which can
get referenced by means of symbolic
this addresses the client side of device tree based clock lookups:
add clock specifiers to the mbx, nfc, mscan, sdhc, i2c, axe, diu,
viu, mdio, fec, usb, pata, psc, psc fifo, and pci nodes in the
shared mpc5121.dtsi include
these specs map 'clock-names' encoded in drivers to their respective
after device tree based clock lookup became available, the peripheral
driver need no longer construct clock names which include the PSC index,
remove the psc%d_mclk template and unconditionally use mclk
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/spi/spi-mpc512x-psc.c |6 +-
1
after device tree based clock lookup became available, the peripheral
driver need no longer construct clock names which include the PSC index,
remove the psc%d_mclk template and unconditionally use mclk
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/tty/serial/mpc52xx_uart.c |8
after the peripheral drivers for UART and SPI mode (both using the PSC
controller) got converted to device tree based clock lookups, the
platform clock driver need no longer provide the psc%d_mclk name which
depends on the PSC index number -- remove the clk_register_clkdev() call
Signed-off-by:
prepare and enable the FIFO clock upon PSC FIFO initialization,
disable and unprepare the FIFO clock upon PSC FIFO uninitialization,
remove the pre-enable workaround from the platform's clock driver
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/platforms/512x/clock-commonclk.c |
On 07/18/2013 05:57 AM, Philipp Zabel wrote:
If the requested reset controller is not yet available, have reset_control_get
and device_reset return -EPROBE_DEFER so the driver can decide to request
probe deferral.
Reviewed-by: Stephen Warren swar...@nvidia.com
On 07/18/2013 07:53 AM, Eduardo Valentin wrote:
Hello Guenter,
On 17-07-2013 18:09, Guenter Roeck wrote:
On Wed, Jul 17, 2013 at 11:17:19AM -0400, Eduardo Valentin
wrote:
Hello all,
As you noticed, I am working in a way to represent thermal
data using device tree [1]. Essentially, this
On Thu, Jul 18, 2013 at 11:46:39AM -0500, Joel Fernandes wrote:
The API is optionally implemented by dmaengine drivers and when
unimplemented will return a NULL pointer. A client driver using
this API provides the required dma channel, address width, and
burst size of the transfer.
On Thu, 18 Jul 2013, Russell King - ARM Linux wrote:
1. clk_get() and clk_put() are NOT part of the common clock API.
They're separate - they're part of the clk API, and the infrastructure
behind that is clkdev, which is a separately owned thing (by me.)
2. The contract of the clk API
Hi,
On Thu, Jul 18, 2013 at 10:13:48PM +0530, Sricharan R wrote:
Some socs have a large number of interrupts/dma requests to service
the needs of its many peripherals and subsystems. All of the
requests lines from the subsystems are not needed at the same
time, so they have to be muxed to the
On 07/18/2013 05:14 AM, Sudeep KarkadaNagesha wrote:
On 18/07/13 09:24, Sudeep KarkadaNagesha wrote:
On 17/07/13 15:43, Andrew Lunn wrote:
On Wed, Jul 17, 2013 at 03:06:20PM +0100, sudeep.karkadanage...@arm.com
wrote:
From: Sudeep KarkadaNagesha sudeep.karkadanage...@arm.com
[...]
Are we
Hi,
On Thu, Jul 18, 2013 at 4:25 AM, Pavel Machek pa...@denx.de wrote:
It sound to me like keeping ammount of -EPROBE_DEFER to minimum is
still preferred.
Hand-crafting initcall level ordering of various drivers and subsystem
is probably an even greater evil though. We've done it in the past,
On 07/18/2013 11:43 AM, Sricharan R wrote:
Some socs have a large number of interrupts/dma requests to service
the needs of its many peripherals and subsystems. All of the
requests lines from the subsystems are not needed at the same
time, so they have to be muxed to the controllers
On 07/18/2013 11:43 AM, Sricharan R wrote:
This adds the irq/dma crossbar device nodes.
There is a IRQ and DMA crossbar device in the soc, which
maps the irq/dma requests from the peripherals to the
mpu/dsp/ipu/eve interrupt and sdma/edma controller's inputs.
The Peripheral irq/dma requests are
On 07/18/2013 10:07 AM, Christian Ruppert wrote:
...
Well, perhaps my definition of inside/outside pins was not quite
clear: The pin groups define the set of (kernel internal) pin numbers of
outside pins which are used by pin controller to map a given
interface. Inside pins are not numbered
From: Rohit Vaswani rvasw...@codeaurora.org
Fix the the gpio reg address for the device tree entry.
Signed-off-by: Rohit Vaswani rvasw...@codeaurora.org
Signed-off-by: David Brown dav...@codeaurora.org
---
arch/arm/boot/dts/msm8960-cdp.dts | 4 ++--
1 file changed, 2 insertions(+), 2
extend the mscan(4) driver with alternative support for the COMMON_CLK
approach which is an option in the MPC512x platform, keep the existing
clock support implementation in place since the driver is shared with
other MPC5xxx SoCs which don't have common clock support
one byproduct of this change
add a comment about the magic of deriving an MSCAN component index
from the peripheral's physical address / register offset
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/net/can/mscan/mpc5xxx_can.c |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
adapt the DIU clock initialization to the COMMON_CLK approach: device
tree based clock lookup, prepare and unprepare for clocks, work with
frequencies not dividers, call the appropriate clk_*() routines and
don't access CCM registers, remove the pre-enable workaround in the
platform's clock driver
make the MPC I2C driver prepare and enable the peripheral clock
('per' for register access) in the MPC512x setup routine,
make this clock setup non-fatal to allow for a migration period,
remove the pre-enabling hack in the platform's clock driver
Signed-off-by: Gerhard Sittig g...@denx.de
---
device tree based clock lookup in the MPC512x initialization (lookup
'per' for register access), add error check in the clock setup, must
prepare clocks before they can get enabled, unprepare after disable
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/usb/host/fsl-mph-dr-of.c | 24
device tree based clock lookup, must prepare clocks before enabling
them, unprepare after disable, error check in the clock setup, remove
the pre-enable workaround in the MPC512x platform's clock driver
this change implements non-fatal clock lookup since not all platforms
provide device tree
device tree based clock lookup, must prepare clocks before enabling
them, error check in the clock setup
this change implements non-fatal clock lookup for compatibility with
platforms that don't provide OF clock specs, but failure to enable a
specified clock is considered fatal
Signed-off-by:
device tree based clock lookup, must prepare clocks before enabling
them, unprepare after disable, error check in the clock setup
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/media/platform/fsl-viu.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git
completely switch to, i.e. unconditionally use COMMON_CLK for the
MPC512x platform, and retire the PPC_CLOCK implementation for that
platform after the transition has completed
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/platforms/512x/Kconfig | 14 +-
transition to the COMMON_CLK framework has completed for the MPC512x
platform, remove the now obsolete code path of the mpc5xxx mscan
driver which accessed clock control module registers directly
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/net/can/mscan/mpc5xxx_can.c | 136
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