Hi Dinh,
On Tue, Jul 09, 2013 at 06:09:37PM -0500, dingu...@altera.com wrote:
> From: Dinh Nguyen
>
> Add device tree support to the DW watchdog timer.
>
> Signed-off-by: Dinh Nguyen
> Cc: Jamie Iles
> Cc: Viresh Kumar
> Cc: Grant Likely
> Cc: Rob Herring
&
"picochip,pc3x2-timer",
> dw_apb_timer_init);
> +CLOCKSOURCE_OF_DECLARE(apb_timer, "snps,dw-apb-timer-osc",
> dw_apb_timer_init);
I think maybe we also want CLOCKSOURCE_OF_DECLARE() instances for the
contents of sptimer_ids for completeness, otherwise looks good.
Acked-by: Jamie Iles
Thanks,
Jamie
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the core timer and the dt addon.
>
> As dw_apb_timer_of always depends on dw_apb_timer let it select
> DW_APB_TIMER itself without the need for every platform to do it.
>
> Signed-off-by: Heiko Stuebner
Acked-by: Jamie Iles
___
d
> The clock-frequency property is kept to act as fallback if no clocks
> are specified.
>
> Signed-off-by: Heiko Stuebner
Acked-by: Jamie Iles
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source as sched_clock instead.
>
> Therefore enable the driver to distiguish between devices with and without
> sptimer based on the devicetree data and select the correct timer as
> sched_clock.
>
> Signed-off-by: Heiko Stuebner
Acked-by: Jamie Iles
___
On Fri, Jan 13, 2012 at 10:48:42AM +, Russell King - ARM Linux wrote:
> On Fri, Jan 13, 2012 at 12:44:00AM +0000, Jamie Iles wrote:
> > +#ifdef CONFIG_OF
> > +int __init sic_of_init(struct device_node *np, struct device_node *parent)
> > +{
> > + struct fpga_i
On Thu, Jan 12, 2012 at 07:29:32PM -0700, Grant Likely wrote:
> On Fri, Jan 13, 2012 at 12:44:00AM +0000, Jamie Iles wrote:
> > @@ -53,6 +59,10 @@ void __init fpga_irq_init(int parent_irq, u32
> > valid, struct fpga_irq_data *f)
> > f->chip.irq_ack = fpga_irq_mask;
On Thu, Jan 12, 2012 at 06:20:37PM -0700, Grant Likely wrote:
> On Thu, Jan 12, 2012 at 5:43 PM, Jamie Iles wrote:
> > These patches move versatile over to instantiating both interrupt
> > controllers from the device tree. I've tested this in qemu for both DT
> > and
Switch the versatile_dt board to instantiate both interrupt controllers
from the device tree using the of_irq_init() helper.
Cc: Grant Likely
Cc: Rob Herring
Cc: Russell King
Signed-off-by: Jamie Iles
---
arch/arm/mach-versatile/core.c | 27 ---
arch/arm
Add a device tree binding for the FPGA SIC on versatile platforms. This
also requires the addition of irq domain support for mapping to Linux
IRQs.
Cc: Grant Likely
Cc: Rob Herring
Cc: Russell King
Signed-off-by: Jamie Iles
---
.../devicetree/bindings/arm/versatile-sic.txt | 27
kes use of irqdomain again as I'm not sure what the
replacement is going to look like yet. versatile works with DT in
mainline, but that's kind of lucky... I know there's been patches to
make irq_domain_add_simple() return the irq_domain and can rebase if
needed.
Jamie Iles (2):
versat
On Thu, Jan 12, 2012 at 08:35:12AM -0600, Rob Herring wrote:
> Jamie,
>
> On 12/19/2011 04:22 PM, Jamie Iles wrote:
> > Commit 6d274309d (irq: support domains with non-zero hwirq base)
> > introduced a WARN_ON() for an invalid hwirq in irq_domain_to_irq() but
> >
On Thu, Jan 12, 2012 at 02:17:14PM +1100, David Gibson wrote:
> On Wed, Jan 11, 2012 at 01:38:12PM +0000, Jamie Iles wrote:
> > On Wed, Jan 11, 2012 at 11:19:41PM +1100, David Gibson wrote:
> > > On Mon, Jan 09, 2012 at 08:07:30AM -0600, Jon Loeliger wrote:
> > > > &g
On Wed, Jan 11, 2012 at 09:46:58PM -0700, Grant Likely wrote:
> On Tue, Jan 10, 2012 at 2:33 PM, Jamie Iles wrote:
> > On Mon, Dec 12, 2011 at 03:02:04PM -0700, Grant Likely wrote:
> >> +- clock-output-names : From common clock binding
> >> +
>
On Wed, Jan 11, 2012 at 11:19:41PM +1100, David Gibson wrote:
> On Mon, Jan 09, 2012 at 08:07:30AM -0600, Jon Loeliger wrote:
> > > Jon, I was hoping I'd get some comment on this patch eventually.
> >
> > Sorry/ .
> >
> > > On Fri, Oct 28, 2011 at 04:15:25PM +1100, David Gibson wrote:
> > > > Her
Hi Grant,
On Mon, Dec 12, 2011 at 03:02:04PM -0700, Grant Likely wrote:
> Based on work by Ben Herrenschmidt and Jeremy Kerr, this patch adds an
> of_clk_get function to allow platforms to retrieve clock data from the
> device tree.
>
> Platform register a provider through of_clk_add_provider, wh
real nit, but could this be written as:
return irq_domain_add_simple(np, 0, TZIC_NUM_IRQS) ? 0 : -ENOMEM;
to make it a little more concise (and the same for the others)? Not a
big deal though, so either way:
Reviewed-by: Jamie Iles
Jamie
___
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On Fri, Jan 06, 2012 at 09:47:22AM -0800, Olof Johansson wrote:
> On Fri, Jan 6, 2012 at 8:58 AM, Jamie Iles wrote:
> > On Fri, Jan 06, 2012 at 08:28:51AM -0800, Olof Johansson wrote:
> >> On Thu, Jan 5, 2012 at 11:22 PM, Mitch Bradley wrote:
> >> >
> >>
On Fri, Jan 06, 2012 at 08:28:51AM -0800, Olof Johansson wrote:
> On Thu, Jan 5, 2012 at 11:22 PM, Mitch Bradley wrote:
> >
> > On 1/5/2012 6:39 PM, Olof Johansson wrote:
> >>
> >> Hi,
> >>
> >> I'm considering how to best describe the data that ramoops needs in
> >> the device tree.
> >>
> >> The
On Thu, Jan 05, 2012 at 08:47:15AM -0800, Stephen Warren wrote:
> Jamie Iles wrote at Thursday, January 05, 2012 6:18 AM:
> > On Wed, Jan 04, 2012 at 11:39:37AM -0700, Stephen Warren wrote:
> > > Enhance the driver to dynamically allocate the base IRQ number, and
> > &g
ARD
> [nicolas.fe...@atmel.com: change error path and interrupts property handling]
> Signed-off-by: Nicolas Ferre
Reviewed-by: Jamie Iles
Jamie
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On Thu, Jan 05, 2012 at 03:50:09PM +0100, Nicolas Ferre wrote:
> On 01/05/2012 01:00 PM, Jamie Iles :
> > Hi Nicolas, Jean-Christophe,
> >
> > On Thu, Jan 05, 2012 at 02:48:28PM +0100, Nicolas Ferre wrote:
> >> From: Jean-Christophe PLAGNIOL-VILLARD
> >>
On Thu, Jan 05, 2012 at 08:06:49AM -0600, Rob Herring wrote:
> On 01/04/2012 07:23 PM, Jamie Iles wrote:
> > It's common for interrupt controllers to need to encode interrupt
> > trigger types and the Linux specific types seem common. Document these
> > in a centralize
Hi Stephen,
On Wed, Jan 04, 2012 at 11:39:37AM -0700, Stephen Warren wrote:
> Enhance the driver to dynamically allocate the base IRQ number, and
> create an IRQ domain for itself. The use of an IRQ domain ensures that
> any device tree node interrupts properties are correctly parsed.
>
> Describ
Hi Nicolas, Jean-Christophe,
On Thu, Jan 05, 2012 at 02:48:28PM +0100, Nicolas Ferre wrote:
> From: Jean-Christophe PLAGNIOL-VILLARD
>
> Retreive registers address and IRQ from device tree entry. Fall back
> to built-in values if an error occurs.
>
> Signed-off-by: Jean-Christophe PLAGNIOL-VILL
Use the DesignWare specific binding rather than the generic binding
which isn't supported in mainline.
Signed-off-by: Jamie Iles
---
arch/arm/boot/dts/picoxcell-pc3x2.dtsi | 19 ---
arch/arm/boot/dts/picoxcell-pc3x3.dtsi | 28 +++-
2 files change
The controller supports interrupts on bank A (up to 8 interrupt
sources). Use the generic IRQ chip to implement interrupt support for
this bank.
Cc: Grant Likely
Cc: Linus Walleij
Acked-by: Rob Herring
Signed-off-by: Jamie Iles
---
drivers/gpio/Kconfig |2 +-
drivers/gpio/gpio
Rob Herring's irqdomain in generic irq chip patches
- use reg property to indicate bank index
- support irqs on both edges based on LinusW's u300 driver
Cc: Grant Likely
Cc: Linus Walleij
Acked-by: Rob Herring
Signed-off-by: Jamie Iles
---
.../devicetree/bindings/gpio/
ob Herring
Signed-off-by: Jamie Iles
---
Documentation/devicetree/bindings/arm/gic.txt|8 ++--
Documentation/devicetree/bindings/interrupts.txt | 17 +
2 files changed, 19 insertions(+), 6 deletions(-)
create mode 100644 Documentation/devicetree/bindings/interrupts.txt
No major changes since v4 apart from a bug in patch 2 that didn't handle
sparsely allocated banks very well (resulting in a potential buffer
overrun) and the higher banks are the ones that are a pig to get to.
Jamie Iles (4):
of: document common interrupt controller details
gpio: add a d
On Mon, Jan 02, 2012 at 03:14:06PM +, Jamie Iles wrote:
> The Synopsys DesignWare block is used in some ARM devices (picoxcell)
> and can be configured to provide multiple banks of GPIO pins.
>
> v3: - depend on rather than select IRQ_DOMAIN
> - split IRQ support into a
Use the DesignWare specific binding rather than the generic binding
which isn't supported in mainline.
Signed-off-by: Jamie Iles
---
arch/arm/boot/dts/picoxcell-pc3x2.dtsi | 19 ---
arch/arm/boot/dts/picoxcell-pc3x3.dtsi | 28 +++-
2 files change
The controller supports interrupts on bank A (up to 8 interrupt
sources). Use the generic IRQ chip to implement interrupt support for
this bank.
Cc: Grant Likely
Cc: Linus Walleij
Acked-by: Rob Herring
Signed-off-by: Jamie Iles
---
drivers/gpio/Kconfig |2 +-
drivers/gpio/gpio
tches
- use reg property to indicate bank index
- support irqs on both edges based on LinusW's u300 driver
Cc: Grant Likely
Cc: Linus Walleij
Acked-by: Rob Herring
Signed-off-by: Jamie Iles
---
Mark, I've left the changelog versioning as is seeing as it should b
ob Herring
Signed-off-by: Jamie Iles
---
Documentation/devicetree/bindings/arm/gic.txt|8 ++--
Documentation/devicetree/bindings/interrupts.txt | 17 +
2 files changed, 19 insertions(+), 6 deletions(-)
create mode 100644 Documentation/devicetree/bindings/interrupts.txt
Cc: Grant Likely
Cc: Rob Herring
Signed-off-by: Jamie Iles
---
.../devicetree/bindings/vendor-prefixes.txt|1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
b/Documentation/devicetree/bindings/vendor
Hi Mark,
On Mon, Jan 02, 2012 at 01:25:00PM +, Mark Brown wrote:
> On Mon, Jan 02, 2012 at 12:53:16PM +0000, Jamie Iles wrote:
> > The Synopsys DesignWare block is used in some ARM devices (picoxcell)
> > and can be configured to provide multiple banks of GPIO pins.
> >
Use the DesignWare specific binding rather than the generic binding
which isn't supported in mainline.
Signed-off-by: Jamie Iles
---
arch/arm/boot/dts/picoxcell-pc3x2.dtsi | 19 ---
arch/arm/boot/dts/picoxcell-pc3x3.dtsi | 28 +++-
2 files change
The controller supports interrupts on bank A (up to 8 interrupt
sources). Use the generic IRQ chip to implement interrupt support for
this bank.
Cc: Grant Likely
Cc: Linus Walleij
Acked-by: Rob Herring
Signed-off-by: Jamie Iles
---
drivers/gpio/Kconfig |2 +-
drivers/gpio/gpio
tches
- use reg property to indicate bank index
- support irqs on both edges based on LinusW's u300 driver
Cc: Grant Likely
Cc: Linus Walleij
Acked-by: Rob Herring
Signed-off-by: Jamie Iles
---
.../devicetree/bindings/gpio/snps-dwapb-gpio.txt | 63 +++
drivers/gp
Pretty much the same as last time with the exception that I've split the
IRQ portion from the GPIO bit and added a dependency on IRQ_DOMAIN
rather than selecting it.
The 2nd patch is dependent on Rob's irqdomain support for the generic
irq chip so can be dropped if needed.
Jamie Iles (
On Mon, Jan 02, 2012 at 12:14:28PM +, Mark Brown wrote:
> On Fri, Dec 30, 2011 at 02:25:25PM -0600, Rob Herring wrote:
>
> > We've got to sort out getting irq domains enabled on x86 and MIPS in
> > order to merge generic irq chip using domains. I'm not sure that will
> > get done in time.
>
>
On Fri, Dec 30, 2011 at 02:25:25PM -0600, Rob Herring wrote:
> On 12/30/2011 01:59 PM, Jamie Iles wrote:
> > Grant, Linus,
> >
> > On Tue, Dec 20, 2011 at 01:43:50AM +, Jamie Iles wrote:
> >> The Synopsys DesignWare block is used in some ARM devices (picoxcell)
On Mon, Dec 19, 2011 at 10:22:37PM +, Jamie Iles wrote:
> Commit 6d274309d (irq: support domains with non-zero hwirq base)
> introduced a WARN_ON() for an invalid hwirq in irq_domain_to_irq() but
> doesn't include linux/bug.h resulting in:
>
> include/linux/irqd
Grant, Linus,
On Tue, Dec 20, 2011 at 01:43:50AM +, Jamie Iles wrote:
> The Synopsys DesignWare block is used in some ARM devices (picoxcell)
> and can be configured to provide multiple banks of GPIO pins. The first
> bank (A) can also provide IRQ capabilities.
>
> v2: - us
Hi Richard,
This is looking really nice. A couple of really minor nits inline,
otherwise:
Reviewed-by: Jamie Iles
On Thu, Dec 22, 2011 at 03:09:10PM +0800, Richard Zhao wrote:
> The driver get cpu operation point table from device tree cpu0 node,
> and adjusts operating points using c
On Tue, Dec 20, 2011 at 09:44:42AM -0600, Rob Herring wrote:
> Jamie,
>
> On 12/19/2011 07:43 PM, Jamie Iles wrote:
> > The Synopsys DesignWare block is used in some ARM devices (picoxcell)
> > and can be configured to provide multiple banks of GPIO pins. The first
> >
Signed-off-by: Jamie Iles
---
arch/arm/boot/dts/picoxcell-pc3x2.dtsi | 19 ---
arch/arm/boot/dts/picoxcell-pc3x3.dtsi | 28 +++-
2 files changed, 19 insertions(+), 28 deletions(-)
diff --git a/arch/arm/boot/dts/picoxcell-pc3x2.dtsi
b/arch/arm/boot
bank index
- support irqs on both edges based on LinusW's u300 driver
Cc: Grant Likely
Cc: Linus Walleij
Cc: Rob Herring
Signed-off-by: Jamie Iles
---
Rob, I've based this on your generic irq chip + irq domain support but I
don't have the original mail in my inbox to re
cit declaration of function
'WARN_ON'
if it isn't implicitly pulled in before.
Cc: Rob Herring
Cc: Grant Likely
Cc: Thomas Gleixner
Signed-off-by: Jamie Iles
---
include/linux/irqdomain.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/include/lin
On Mon, Dec 19, 2011 at 10:19:29PM +0800, Richard Zhao wrote:
> On Mon, Dec 19, 2011 at 10:05:12AM +0000, Jamie Iles wrote:
> > Hi Richard,
> >
> > On Mon, Dec 19, 2011 at 11:21:40AM +0800, Richard Zhao wrote:
> > > It support single core and multi-core ARM SoCs. But
Hi Richard,
On Mon, Dec 19, 2011 at 11:21:40AM +0800, Richard Zhao wrote:
> It support single core and multi-core ARM SoCs. But currently it assume
> all cores share the same frequency and voltage.
>
> Signed-off-by: Richard Zhao
> ---
> .../devicetree/bindings/cpufreq/generic-cpufreq|7
Hi Rob,
On Sun, Dec 18, 2011 at 09:03:31PM -0600, Rob Herring wrote:
> Jamie,
>
> On 12/18/2011 04:13 AM, Jamie Iles wrote:
> > The Synopsys DesignWare block is used in some ARM devices (picoxcell)
> > and can be configured to provide multiple banks of GPIO pins. The first
Hi Linus,
On Sun, Dec 18, 2011 at 11:01:38PM +0100, Linus Walleij wrote:
> On Sun, Dec 18, 2011 at 11:13 AM, Jamie Iles wrote:
>
> > The Synopsys DesignWare block is used in some ARM devices (picoxcell)
> > and can be configured to provide multiple banks of GPIO pins. The
The Synopsys DesignWare block is used in some ARM devices (picoxcell)
and can be configured to provide multiple banks of GPIO pins. The first
bank (A) can also provide IRQ capabilities.
Cc: Grant Likely
Cc: Linus Walleij
Cc: Rob Herring
Signed-off-by: Jamie Iles
---
I was originally working
Signed-off-by: Jamie Iles
---
arch/arm/boot/dts/picoxcell-pc3x2.dtsi | 19 ---
arch/arm/boot/dts/picoxcell-pc3x3.dtsi | 28 +++-
2 files changed, 19 insertions(+), 28 deletions(-)
diff --git a/arch/arm/boot/dts/picoxcell-pc3x2.dtsi
b/arch/arm/boot
Hi Richard,
A couple of questions inline, but otherwise looks nice!
Jamie
On Fri, Dec 16, 2011 at 06:30:59PM +0800, Richard Zhao wrote:
> It support single core and multi-core ARM SoCs. But it assume
> all cores share the same frequency and voltage.
>
> Signed-off-by: Richard Zhao
> ---
[...]
Hi Nicolas, Jean-Christophe,
This looks pretty good to me, but a couple of minor comments inline.
Jamie
On Thu, Dec 15, 2011 at 08:16:05PM +0100, Nicolas Ferre wrote:
> From: Jean-Christophe PLAGNIOL-VILLARD
>
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD
> Signed-off-by: Nicolas Ferre
>
Hi Grant,
I'm still going through these and trying to digest them but a couple of
quick questions/comments.
Jamie
On Mon, Dec 12, 2011 at 03:02:04PM -0700, Grant Likely wrote:
> diff --git a/Documentation/devicetree/bindings/clock/clock-bindings.txt
> b/Documentation/devicetree/bindings/clock/
On Fri, Dec 02, 2011 at 06:53:58PM +0100, Nicolas Ferre wrote:
> On 12/02/2011 06:28 PM, Jamie Iles :
[...]
> >diff --git a/drivers/net/ethernet/cadence/macb.c
> >b/drivers/net/ethernet/cadence/macb.c
> >index 103c6e6..89060e6 100644
> >--- a/drivers/net/ethernet/cade
"compatible" node property, doc and DT
> hwaddr]
> Signed-off-by: Nicolas Ferre
> Cc: Jamie Iles
Looks nice to me. There's a patch below to add the GEM stuff to the
binding too if you want to role that in.
Acked-by: Jamie Iles
8<
diff --git a/Docu
On Fri, Dec 02, 2011 at 04:30:36PM +0100, Nicolas Ferre wrote:
> On 11/20/2011 06:11 PM, Jamie Iles :
> >On Sun, Nov 20, 2011 at 05:47:40PM +0100, Jean-Christophe PLAGNIOL-VILLARD
> >wrote:
> >>On 15:58 Fri 18 Nov , Jamie Iles wrote:
[...]
> >>>
On Thu, Dec 01, 2011 at 08:52:49AM -0800, Stephen Warren wrote:
> Jamie Iles wrote at Thursday, December 01, 2011 7:11 AM:
> > On Thu, Dec 01, 2011 at 07:42:57AM -0600, Rob Herring wrote:
> > > On 11/30/2011 06:45 PM, Stephen Warren wrote:
> > > > Enhance the driv
On Thu, Dec 01, 2011 at 07:42:57AM -0600, Rob Herring wrote:
> On 11/30/2011 06:45 PM, Stephen Warren wrote:
> > Enhance the driver to dynamically allocate the base IRQ number, and
> > create an IRQ domain for itself. The use of an IRQ domain ensures that
> > any device tree node interrupts proper
Hi Rob,
On Sun, Nov 27, 2011 at 09:11:01AM -0600, Rob Herring wrote:
> On 11/25/2011 09:35 AM, Jamie Iles wrote:
> > I wonder if this might make more sense instead. I'll post a proper
> > patch if you think so.
> >
> > Regards,
> >
> > Jamie
&g
On Fri, Nov 25, 2011 at 02:51:06PM +0100, Jean-Christophe PLAGNIOL-VILLARD
wrote:
> On 22:26 Thu 24 Nov , Jamie Iles wrote:
> > Hi Nicolas,
> > On Thu, Nov 24, 2011 at 10:56:27PM +0100, Nicolas Ferre wrote:
[...]
> > > +#if defined(CONFIG_OF)
> > > +s
Hi Nicolas,
On Thu, Nov 24, 2011 at 10:56:27PM +0100, Nicolas Ferre wrote:
> Ioremap registers from DT specification and adding
> of a simple irq domain for AIC interrupts.
>
> Signed-off-by: Nicolas Ferre
> Acked-by: Jean-Christophe PLAGNIOL-VILLARD
> ---
Apologies if I've missed it somewhere
On Mon, Nov 21, 2011 at 09:58:33PM +0100, Jochen Friedrich wrote:
> Signed-off-by: Jochen Friedrich
Reviewed-by: Jamie Iles
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Hi Jochen,
On Mon, Nov 21, 2011 at 03:32:56PM +0100, Jochen Friedrich wrote:
> >>+ localbus {
> >>+ compatible = "intel,sa1110-localbus";
> >
> >Could this claim compatibility with simple-bus?
>
> I wasn't sure about this. I took a look in the powerpc DTS files for
> reference and th
On Mon, Nov 21, 2011 at 03:37:41PM +0100, Jochen Friedrich wrote:
> Hi Joe,
>
> >trivia:
> >
> >>diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
> >[]
> >>@@ -166,7 +166,7 @@ static struct platform_device sa11x0udc_device = {
> >> static struct resource sa11x0uart1_re
Hi Jochen,
Just a couple of nits inline, otherwise looks nice to me!
Jamie
On Sun, Nov 20, 2011 at 09:37:50PM +0100, Jochen Friedrich wrote:
> Signed-off-by: Jochen Friedrich
> ---
> .../devicetree/bindings/vendor-prefixes.txt|1 +
> arch/arm/boot/dts/sa1110.dtsi
On Sun, Nov 20, 2011 at 05:47:40PM +0100, Jean-Christophe PLAGNIOL-VILLARD
wrote:
> On 15:58 Fri 18 Nov , Jamie Iles wrote:
> > Hi Jean-Christophe,
> >
> > On Fri, Nov 18, 2011 at 03:29:25PM +0100, Jean-Christophe PLAGNIOL-VILLARD
> > wrote:
> > > allo
Hi Jean-Christophe,
On Fri, Nov 18, 2011 at 03:29:25PM +0100, Jean-Christophe PLAGNIOL-VILLARD
wrote:
> allow the DT to pass the mac address and the phy mode
>
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD
> Cc: Jamie Iles
> Cc: Nicolas Ferre
This looks OK to me in prin
On Thu, Nov 10, 2011 at 03:20:51PM +, Marc Zyngier wrote:
> On 10/11/11 14:46, Jamie Iles wrote:
> > On Fri, Nov 04, 2011 at 01:09:59AM +0000, Jamie Iles wrote:
> >> This adds a device tree binding for the VIC based on the of_irq_init()
> >> support. This adds
On Wed, Nov 09, 2011 at 06:00:20PM +0530, Thomas Abraham wrote:
> On 9 November 2011 17:24, Jamie Iles wrote:
> > On Wed, Nov 09, 2011 at 04:55:06PM +0530, Thomas Abraham wrote:
> >> Hi Jamie,
> >>
> >> On 4 November 2011 06:40, Jamie Iles wrote:
> >&
On Fri, Nov 04, 2011 at 01:09:59AM +, Jamie Iles wrote:
> This adds a device tree binding for the VIC based on the of_irq_init()
> support. This adds an irqdomain to the vic and always registers all
> vics in the static vic array rather than for pm only to keep track of
> th
On Wed, Nov 09, 2011 at 08:50:33AM -0600, Rob Herring wrote:
> On 11/09/2011 05:54 AM, Jamie Iles wrote:
> > On Wed, Nov 09, 2011 at 04:55:06PM +0530, Thomas Abraham wrote:
> >> Hi Jamie,
> >>
> >> On 4 November 2011 06:40, Jamie Iles wrote:
> >>
On Wed, Nov 09, 2011 at 04:55:06PM +0530, Thomas Abraham wrote:
> Hi Jamie,
>
> On 4 November 2011 06:40, Jamie Iles wrote:
> > Now that there is a generic IRQ handler for multiple VIC devices use it
> > for s3c64xx to help building multi platform kernels.
> >
> &
On Fri, Nov 04, 2011 at 01:09:57AM +, Jamie Iles wrote:
> Since the last revision I've updated the handling loop as suggested by
> Linus and Russell, added a patch for picoxcell and added a final patch
> to remove the non MULTI_IRQ_HANDLER support for VIC. The final patch
>
Now that all platforms are converted to MULTI_IRQ_HANDLER, remove the
legacy support.
Signed-off-by: Jamie Iles
---
arch/arm/Kconfig| 11 --
arch/arm/common/Kconfig |1 +
arch/arm/common/vic.c |2 -
arch/arm/include/asm
Now that there is a generic IRQ handler for multiple VIC devices use it
for picoxcell to help building multi platform kernels.
Signed-off-by: Jamie Iles
---
arch/arm/Kconfig |1 +
arch/arm/mach-picoxcell/common.c |9 -
arch/arm
Now that there is a generic IRQ handler for multiple VIC devices use it
for samsung to help building multi platform kernels.
Cc: Kukjin Kim
Signed-off-by: Jamie Iles
---
arch/arm/Kconfig |3 ++
arch/arm/mach-s5p64x0/include/mach/entry-macro.S |7
Now that there is a generic IRQ handler for multiple VIC devices use it
for versatile to help building multi platform kernels.
Cc: Russell King
Signed-off-by: Jamie Iles
---
arch/arm/Kconfig |1 +
arch/arm/mach-versatile/include/mach/entry-macro.S | 30
Now that there is a generic IRQ handler for multiple VIC devices use it
for u300 to help building multi platform kernels.
Cc: Linus Walleij
Signed-off-by: Jamie Iles
---
arch/arm/Kconfig |1 +
arch/arm/mach-u300/include/mach/entry-macro.S | 24
Now that there is a generic IRQ handler for multiple VIC devices use it
for spear to help building multi platform kernels.
Cc: Viresh Kumar
Cc: Rajeev Kumar
Signed-off-by: Jamie Iles
---
arch/arm/Kconfig |1 +
arch/arm/mach-spear3xx/include/mach/entry
Now that there is a generic IRQ handler for multiple VIC devices use it
for nomadik to help building multi platform kernels.
Cc: Alessandro Rubini
Cc: Linus Walleij
Cc: STEricsson
Signed-off-by: Jamie Iles
---
arch/arm/Kconfig |1 +
arch/arm/mach-nomadik
Now that there is a generic IRQ handler for multiple VIC devices use it
for s3c64xx to help building multi platform kernels.
Cc: Ben Dooks
Signed-off-by: Jamie Iles
---
arch/arm/Kconfig |1 +
arch/arm/mach-s3c64xx/include/mach/entry-macro.S |7
Now that there is a generic IRQ handler for multiple VIC devices use it
for netx to help building multi platform kernels.
Signed-off-by: Jamie Iles
---
arch/arm/Kconfig |1 +
arch/arm/mach-netx/include/mach/entry-macro.S | 13 -
arch/arm/mach-netx
Now that there is a generic IRQ handler for multiple VIC devices use it
for ep93xx to help building multi platform kernels.
Cc: Hartley Sweeten
Cc: Ryan Mallon
Signed-off-by: Jamie Iles
---
arch/arm/Kconfig|1 +
arch/arm/mach-ep93xx/adssphere.c
masking.
v2: - use irq_domain_simple_ops
- remove stub implementation of vic_of_init for !CONFIG_OF
- Make VIC select IRQ_DOMAIN
Reviewed-by: Rob Herring
Reviewed-by: Grant Likely
Signed-off-by: Jamie Iles
---
Documentation/devicetree/bindings/arm/vic.txt | 29 +++
arch
in one go
v3: - simplify irq handling loop as suggested by Grant
- service interrupts from msb->lsb order
v2: - allow the handler be used for !CONFIG_OF
- use irq_domain_to_irq()
Cc: Rob Herring
Acked-by: Grant Likely
Signed-off-by: Jamie Iles
---
arch/arm/common/vi
From: Marc Zyngier
Even when CONFIG_MULTI_IRQ_HANDLER is selected, the core code
requires the arch_irq_handler_default macro to be defined as
a fallback.
It turns out nobody is using that particular feature as both PXA
and shmobile have all their machine descriptors populated with
the interrupt
hope would be the case but this could be dropped if not.
I've also included Marc's patch for reference as the mach patches are
dependent on it.
Jamie Iles (12):
ARM: vic: device tree binding
ARM: vic: MULTI_IRQ_HANDLER handler
ARM: ep93xx: convert to MULTI_IRQ_HANDLER
ARM: n
On Thu, Nov 03, 2011 at 01:31:02PM +, Russell King - ARM Linux wrote:
> On Thu, Nov 03, 2011 at 02:00:15PM +0100, Linus Walleij wrote:
> > On Thu, Nov 3, 2011 at 1:51 PM, Russell King - ARM Linux
> > wrote:
> >
> > > stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> > > while
On Thu, Nov 03, 2011 at 02:00:15PM +0100, Linus Walleij wrote:
> On Thu, Nov 3, 2011 at 1:51 PM, Russell King - ARM Linux
> wrote:
>
> > stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
> > while (stat) {
> > while (stat) {
> > irq = ffs(stat)
On Wed, Nov 02, 2011 at 01:40:24PM +, Russell King - ARM Linux wrote:
> On Thu, Sep 29, 2011 at 10:30:09AM +0100, Jamie Iles wrote:
> > +#ifdef CONFIG_MULTI_IRQ_HANDLER
> > +static void vic_single_handle_irq(struct vic_device *vic, struct pt_regs
> > *regs)
> &g
On 15 October 2011 04:04, Grant Likely wrote:
> On Fri, Oct 14, 2011 at 03:21:49PM +0100, Jamie Iles wrote:
>> Hi Artem,
>>
>> On Fri, Oct 14, 2011 at 04:48:20PM +0300, Artem Bityutskiy wrote:
>> > On Wed, 2011-10-12 at 00:10 +0100, Jamie Iles wrote:
>> > &
On Fri, Oct 14, 2011 at 05:25:21PM +0300, Artem Bityutskiy wrote:
> On Fri, 2011-10-14 at 15:21 +0100, Jamie Iles wrote:
> > > the top of my head, it is logical when things go like this: I have a
> > > kernel with working platform data, but I can change that dynamically
Hi Artem,
On Fri, Oct 14, 2011 at 04:48:20PM +0300, Artem Bityutskiy wrote:
> On Wed, 2011-10-12 at 00:10 +0100, Jamie Iles wrote:
> > +#ifdef CONFIG_OF
> > +static const struct of_device_id gpio_nand_id_table[] = {
> > + { .compatible
- compatible becomes gpio-control-nand
- clarify some binding details
Cc: David Woodhouse
Cc: Artem Bityutskiy
Cc: Scott Wood
Cc: Grant Likely
Signed-off-by: Jamie Iles
---
This is pretty much a repost of v5, but updated to use
mtd_device_parse_register(). This has a dependency on the 64-bit
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