On Thu, 26 Oct 2023, Sebastian Wick wrote:
> On Thu, Oct 26, 2023 at 11:57:47AM +0300, Pekka Paalanen wrote:
> > On Wed, 25 Oct 2023 15:16:08 -0500 (CDT)
> > Alex Goins wrote:
> >
> > > Thank you Harry and all other contributors for your work on this.
is only happen during a scaling op?
>
> There is certainly some overlap between examples 2 and 3. IIRC SRC_X/Y
> coordinates can be fractional, which makes nearest vs. bilinear
> sampling have a difference even if there is no scaling.
>
> There is also the question of chroma siting with sub-sampled YUV. I
> don't know how that actually works, or how it theoretically should work.
We have some operations in our pipeline that are intended to be static, i.e. a
static matrix that converts from RGB to LMS, and later another that converts
from LMS to ICtCp. There are even LUTs that are intended to be static,
converting from linear to PQ and vice versa. All of this is because the
pre-blending scaler and tone mapping operator are intended to operate in ICtCp
PQ space. Although the stated LUTs and matrices are intended to be static, they
are actually programmable. In offline discussions, it was indicated that it
would be helpful to actually expose the programmability, as opposed to exposing
them as non-bypassable blocks, as some compositors may have novel uses for them.
Despite being programmable, the LUTs are updated in a manner that is less
efficient as compared to e.g. the non-static "degamma" LUT. Would it be helpful
if there was some way to tag operations according to their performance,
for example so that clients can prefer a high performance one when they
intend to do an animated transition? I recall from the XDC HDR workshop
that this is also an issue with AMD's 3DLUT, where updates can be too
slow to animate.
Thanks,
Alex Goins
NVIDIA Linux Driver Team
> Thanks,
> pq
>
it's supposed to make sure that the shared DMA-BUF is accessible by
the target device.
Thanks,
Alex
> Regards,
> Christian.
>
> Am 01.10.20 um 00:18 schrieb Alex Goins:
> > Hi Christian,
> >
> > I've been looking into the DMA-BUFs exported from AMDGPU / TTM. Would
>
from TTM, as they don't have the TTM-specific context to know how the
pages were allocated.
Change the TTM allocator so that it no longer clears the __GFP_COMP flag
when allocating THPs.
Signed-off-by: Alex Goins
---
drivers/gpu/drm/ttm/ttm_page_alloc.c | 5 ++---
1 file changed, 2 insertions
to map compound THP
DMA-BUFs into userspace without issue, and access their contents. Are
you aware of any other potential consequences?
Commit 5c42c64f7d54 ("drm/ttm: fix the fix for huge compound pages") should
probably also be reverted if this is applied.
Thanks,
Alex
Alex Goins (1):
Hi Marek,
On Tue, 22 Sep 2020, Marek Szyprowski wrote:
> External email: Use caution opening links or attachments
>
>
> Hi Alex,
>
> On 22.09.2020 01:15, Alex Goins wrote:
> > Tested-by: Alex Goins
> >
> > This change fixes a regression with drm_prime_sg_
Tested-by: Alex Goins
This change fixes a regression with drm_prime_sg_to_page_addr_arrays() and
AMDGPU in v5.9.
Commit 39913934 similarly revamped AMDGPU to use sgtable helper functions. When
it changed from dma_map_sg_attrs() to dma_map_sgtable(), as a side effect it
started correctly
Any more feedback on this?
Thanks,
Alex
On Thu, 26 Nov 2015, Alex Goins wrote:
> Hello all,
>
> For a while now, I've been working to fix tearing with PRIME. This is the
> same as the eighth version of the DRM component for PRIME synchronization,
>
> In this version, use
closely match rest of file
v6: Properly handle interrupted waits
v7: No change
v8: No change
Signed-off-by: Alex Goins
---
drivers/gpu/drm/i915/intel_display.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
bility to properly handle interrupted wait.
Warn on error code from waiting.
v7: No change
v8: Test for !reservation_object_signaled_rcu(test_all=FALSE) instead of
obj->base.dma_buf->resv->fence_excl
Signed-off-by: Alex Goins
---
drivers/gpu/drm/i915/intel_display.c | 15
: https://github.com/GoinsWithTheWind/xserver-prime-sync
(branch agoins-prime-v8)
Thanks, Alex @ NVIDIA Linux Driver Team
Alex Goins (2):
i915: wait for fence in mmio_flip_work_func
i915: wait for fence in prepare_plane_fb
drivers/gpu/drm/i915/intel_display.c | 26 ++
Thanks, Daniel. There sure are a lot of Daniels.
> > + else if (obj->base.dma_buf && obj->base.dma_buf->resv->fence_excl)
> > + return true;
>
> I'm not sure if this is really doing exactly what you want.
> When a reservation object's exclusive fence has signaled, I think the
closely match rest of file
v6: Properly handle interrupted waits
Signed-off-by: Alex Goins
---
drivers/gpu/drm/i915/intel_display.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index bacf336..604186b
bility to properly handle interrupted wait.
Warn on error code from waiting.
Signed-off-by: Alex Goins
---
drivers/gpu/drm/i915/intel_display.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index b
com/GoinsWithTheWind/xserver-prime-sync
(branch agoins-prime-v6)
Thanks, Alex @ NVIDIA Linux Driver Team
Alex Goins (2):
i915: wait for fence in mmio_flip_work_func
i915: wait for fence in prepare_plane_fb
drivers/gpu/drm/i915/intel_display.c | 24
1 file changed, 24 inserti
Mon, Nov 23, 2015 at 03:08:53PM -0800, Alex Goins wrote:
> > > In intel_prepare_plane_fb, if fb is backed by dma-buf, wait for exclusive
> > > fence
> > >
> > > v2: First commit
> > > v3: Remove object_name_lock acquire
> > > Move wait from i
closely match rest of file
v6: Properly handle interrupted waits
Signed-off-by: Alex Goins
---
drivers/gpu/drm/i915/intel_display.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index bacf336..604186b
bility to properly handle interrupted wait.
Warn on error code from waiting.
Signed-off-by: Alex Goins
---
drivers/gpu/drm/i915/intel_display.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index b
nux Driver Team
Alex Goins (2):
i915: wait for fence in mmio_flip_work_func
i915: wait for fence in prepare_plane_fb
drivers/gpu/drm/i915/intel_display.c | 24
1 file changed, 24 insertions(+)
--
1.9.1
closely match rest of file
Signed-off-by: Alex Goins
---
drivers/gpu/drm/i915/intel_display.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index eef3475..f5ab8a7 100644
--- a/drivers/gpu/drm/i915/intel_display.c
return true when exclusive fence is attached
Wait only on exclusive fences, interruptible with no timeout
v5: Move wait from do_mmio_flip to mmio_flip_work_func
Style tweaks to more closely match rest of file
Signed-off-by: Alex Goins
---
drivers/gpu/drm/i915/intel_display.c | 13 ++
go in.
DRM Tree:https://github.com/GoinsWithTheWind/drm-prime-sync
X Tree: https://github.com/GoinsWithTheWind/xserver-prime-sync
(branch agoins-prime-v5)
Thanks, Alex @ NVIDIA Linux Driver Team
Alex Goins (2):
i915: wait for fence in mmio_flip_work_func
i915: wait for fe
In intel_prepare_plane_fb, if fb is backed by dma-buf, wait for fence.
Signed-off-by: Alex Goins
---
drivers/gpu/drm/i915/intel_display.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 4867ff0
If a buffer is backed by dmabuf, wait on its reservation object's fences
before flipping.
Signed-off-by: Alex Goins
---
drivers/gpu/drm/i915/intel_display.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915
X
server to Github. I'll move forward with upstreaming the X changes if and
when these DRM patches go in.
DRM Tree:https://github.com/GoinsWithTheWind/drm-prime-sync
X Tree: https://github.com/GoinsWithTheWind/xserver-prime-sync
(branch agoins-prime-v4)
Thanks, Alex @ NVIDIA Linux Driver T
In intel_prepare_plane_fb, if fb is backed by dma-buf, wait for fence.
Signed-off-by: Alex Goins
---
drivers/gpu/drm/i915/intel_display.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index acec108a
If a buffer is backed by dmabuf, wait on its reservation object's fences
before flipping.
Signed-off-by: Alex Goins
---
drivers/gpu/drm/i915/intel_display.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915
DIA Linux Driver Team
Alex Goins (2):
i915: wait for fences in mmio_flip()
i915: wait for fence in prepare_plane_fb
drivers/gpu/drm/i915/intel_display.c | 18 ++
1 file changed, 18 insertions(+)
--
1.9.1
For all buffers backed by dmabuf, wait for its reservation object's fences
before committing.
Signed-off-by: Alex Goins
---
drivers/gpu/drm/i915/intel_display.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm
If a buffer is backed by dmabuf, wait on its reservation object's fences
before flipping.
Signed-off-by: Alex Goins
---
drivers/gpu/drm/i915/intel_display.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915
ime-sync
(branch agoins-prime-v2)
Thanks,
Alex @ NVIDIA Linux Driver Team
Alex Goins (2):
i915: wait for fences in mmio_flip()
i915: wait for fences in atomic commit
drivers/gpu/drm/i915/intel_display.c | 37
1 file changed, 37 insertions(+)
--
1.9.1
ed-off-by: Alex Goins
---
drivers/gpu/drm/drm_internal.h | 2 ++
drivers/gpu/drm/drm_ioctl.c| 1 +
drivers/gpu/drm/drm_prime.c| 20
include/uapi/drm/drm.h | 10 ++
4 files changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/drm_internal.h b/drivers/g
From: agoins <ago...@nvidia.com>
Adds prime_page_flip() to struct drm_driver, intended to be a function to
schedule a flip in response to a fence being signaled.
Makes drivers use drm_gem_prime_page_flip() helper implementation.
Signed-off-by: Alex Goins
---
drivers/gpu/drm/amd/
From: agoins <ago...@nvidia.com>
Adds drm_gem_prime_page_flip(), a helper implementation of
prime_page_flip() to be used by DRM drivers.
Signed-off-by: Alex Goins
---
drivers/gpu/drm/drm_prime.c | 147
include/drm/drmP.h | 3 +
2
From: agoins <ago...@nvidia.com>
Adds new struct drm_prime_fence_ctx as field of drm_prime_member, and
initializes it when member is created. Used for keeping track of context id
and seqno of fences to be generated by PRIME.
Signed-off-by: Alex Goins
---
drivers/gpu/drm/drm_prime.
ecific field, allowing other
fields to be queried as well.
Signed-off-by: Alex Goins
---
drivers/gpu/drm/drm_prime.c | 34 --
1 file changed, 20 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index 27aa718..e
From: agoins <ago...@nvidia.com>
Factors contents of drm_mode_page_flip_ioctl() into drm_mode_page_flip(),
allowing it to be callable from the kernel within DRM. Replace contents of
drm_mode_page_flip_ioctl() with a call to drm_mode_page_flip().
Signed-off-by: Alex Goins
---
drivers/g
Hello all,
For a while now, I've been working to fix tearing with PRIME. I have a working
solution that requires changes to DRM, libdrm, and the X server. I've also
implemented sink support in the modesetting driver, and source support in the
NVIDIA proprietary driver.
These DRM patches
38 matches
Mail list logo
