[Corrected the typos with a new version - proofreading is a good thing]
I'm confused about something and hope I can get some help understanding this.
If we have a signed FV that is extracted in PEI it doesn't look like the
AuthenticationStatus gets propagated to DXE.
The hob doesn't store auth
Hello Ard, Eugene,
Thank you for explanation.
Ard, I tried the patch, but it cannot be applied to the latest (pulled a minute
ago, git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18732
6f19259b-4bc3-4df7-8a09-765794883524)
tree: all 3 hunks failed. Which commit should I be based on to
> On Nov 6, 2015, at 10:28 AM, Shubha Ramani wrote:
>
> Here:http://wiki.phoenix.com/wiki/index.php/EFI_BOOT_SERVICES#AllocatePages.28.29
>
> First of all, is there a concept of Virtual Memory in UEFI ?
EFI Boot Services runs with physical addresses. When the OS takes over it can
provide a v
Reviewed-by: Erik Bjorge
From: Daryl McDaniel [mailto:edk2-li...@mc2research.org]
Sent: Thursday, November 5, 2015 2:32 PM
To: edk2-devel@lists.01.org; Carsey, Jaben ; Bjorge,
Erik C
Subject: [Patch 2/4] AppPkg/Python-2.7.10: New helper scripts
AppPkg/Python-2.7.10: Patch 2 of 4 -- New helper
Reviewed-by: Erik Bjorge
-Original Message-
From: Daryl McDaniel [mailto:edk2-li...@mc2research.org]
Sent: Thursday, November 5, 2015 2:31 PM
To: edk2-devel@lists.01.org; Carsey, Jaben ; Bjorge,
Erik C
Subject: [Patch 1/4] AppPkg/Python-2.7.10: ReadMe and .inf files
AppPkg/Python-2.7.
Here:http://wiki.phoenix.com/wiki/index.php/EFI_BOOT_SERVICES#AllocatePages.28.29
First of all, is there a concept of Virtual Memory in UEFI ?
Why does EFI_MEMORY_DESCRIPTOR have VirtualStart ? What is it used for ?
typedef struct {
UINT32 Type;
EFI_PHYSICAL_ADDRESS PhysicalStar
I'm confused about something and hope I can help some help understanding this.
If we have a signed FV that is extracted in PEI it doesn't look like the
AuthenticationStatus gets propagated to DXE.
The hob doesn't store authentication status and the core products FVB with
AuthenticationStatus fo
On 11/06/15 18:01, Ashutosh Singh wrote:
> When performing a tftp download from a server which does not support
> rfc2349 transfer size option (such as netkit-tftpd), the existing code
> falls back to allocating an 8MB buffer. Since this is insufficient for
> an uncompressed AArch64 Linux kernel im
Hi,
There are macros in MdePkg/Include/Base.h that help align values and pointers
to the next boundary.
This patch could use the following:
TftpBufferSize = ALIGN_VALUE (TftpBufferSize, SIZE_16MB);
/**
Rounds a value up to the next boundary using a specified alignment.
This funct
> On Nov 6, 2015, at 1:51 AM, Zeng, Star wrote:
>
> On 2015/10/23 14:04, Andrew Fish wrote:
>>
>>> On Oct 22, 2015, at 10:10 PM, Zeng, Star wrote:
>>>
>>> On 2015/10/22 23:29, Andrew Fish wrote:
> On Oct 21, 2015, at 6:34 PM, Zeng, Star wrote:
>
> On 2015/10/22 7:02, Andre
On 6 November 2015 at 18:16, Leif Lindholm wrote:
> In ArmPkg/Include/Chipset, several CPU-specific header files reside.
> Most of these provide no actual, or very little, use.
> ARM1176JZ-S.h is not used at all (and unusable since SVN r18237).
> ArmAemV8.h simply includes AArch64.h.
> ArmC
In ArmPkg/Include/Chipset, several CPU-specific header files reside.
Most of these provide no actual, or very little, use.
ARM1176JZ-S.h is not used at all (and unusable since SVN r18237).
ArmAemV8.h simply includes AArch64.h.
ArmCortexA15.h defines one processor-specific configuration bit
When performing a tftp download from a server which does not support
rfc2349 transfer size option (such as netkit-tftpd), the existing code
falls back to allocating an 8MB buffer. Since this is insufficient for
an uncompressed AArch64 Linux kernel image, double the size to 16MB.
Contributed-under:
On 6 November 2015 at 17:33, Leif Lindholm wrote:
> On Fri, Nov 06, 2015 at 05:13:44PM +0100, Ard Biesheuvel wrote:
>> On 6 November 2015 at 17:02, Leif Lindholm wrote:
>> > On Fri, Nov 06, 2015 at 03:03:53PM +0100, Ard Biesheuvel wrote:
>> >> The stride used by the cache maintenance by MVA instr
On Fri, Nov 06, 2015 at 05:13:44PM +0100, Ard Biesheuvel wrote:
> On 6 November 2015 at 17:02, Leif Lindholm wrote:
> > On Fri, Nov 06, 2015 at 03:03:53PM +0100, Ard Biesheuvel wrote:
> >> The stride used by the cache maintenance by MVA instructions should
> >> be retrieved from CTR_EL0.DminLine a
Reviewed-by: Jaben Carsey
> -Original Message-
> From: Qiu, Shumin
> Sent: Friday, November 06, 2015 12:06 AM
> To: edk2-devel@lists.01.org
> Cc: Qiu, Shumin ; Carsey, Jaben
>
> Subject: [PATCH] ShellPkg: Don't strip positional parameters of quotation
> marks.
> Importance: High
>
> Per
On 6 November 2015 at 16:38, Jeremy Linton wrote:
> On 11/06/2015 09:21 AM, Ard Biesheuvel wrote:
>>
>> I would much prefer duplicating this over adding dynamic PCDs and
>> BEFORE/AFTER depexes. If you really insist, you can break it out into
>> a separate static library, but I wouldn't even bothe
On 6 November 2015 at 17:13, Ard Biesheuvel wrote:
> On 6 November 2015 at 17:02, Leif Lindholm wrote:
>> On Fri, Nov 06, 2015 at 03:03:53PM +0100, Ard Biesheuvel wrote:
>>> The stride used by the cache maintenance by MVA instructions should
>>> be retrieved from CTR_EL0.DminLine and CTR_EL0.Imin
On 6 November 2015 at 17:02, Leif Lindholm wrote:
> On Fri, Nov 06, 2015 at 03:03:53PM +0100, Ard Biesheuvel wrote:
>> The stride used by the cache maintenance by MVA instructions should
>> be retrieved from CTR_EL0.DminLine and CTR_EL0.IminLine, whose values
>> reflect the actual geometry of the
Leif: Yes, the commit message seems fine, I will resubmit the patch
with new commit messages.
Laszlo: I understand that it is a band-aid, but I will leave that bigger
fight (of fixing ArmBds) for another day :) . It isn't very obvious to me that
pxe not being supported by default tftpd will cause p
On Fri, Nov 06, 2015 at 03:03:53PM +0100, Ard Biesheuvel wrote:
> The stride used by the cache maintenance by MVA instructions should
> be retrieved from CTR_EL0.DminLine and CTR_EL0.IminLine, whose values
> reflect the actual geometry of the caches. Using CCSIDR for this purpose
> violates the arc
On 11/06/2015 09:21 AM, Ard Biesheuvel wrote:
I would much prefer duplicating this over adding dynamic PCDs and
BEFORE/AFTER depexes. If you really insist, you can break it out into
a separate static library, but I wouldn't even bother tbh.
That solves the short term problem, but I expect that
On Fri, Nov 06, 2015 at 04:21:47PM +0100, Ard Biesheuvel wrote:
> On 6 November 2015 at 16:11, Jeremy Linton wrote:
> > On 11/06/2015 01:31 AM, Ard Biesheuvel wrote:
> >>
> >> On 5 November 2015 at 22:51, Jeremy Linton wrote:
> >>>
> >>>
> >>> [Guids.common]
> >>> gArmJunoTokenSpaceGuid
On 6 November 2015 at 16:11, Jeremy Linton wrote:
> On 11/06/2015 01:31 AM, Ard Biesheuvel wrote:
>>
>> On 5 November 2015 at 22:51, Jeremy Linton wrote:
>>>
>>>
>>> [Guids.common]
>>> gArmJunoTokenSpaceGuid= { 0xa1147a20, 0x3144, 0x4f8d, { 0x82,
>>> 0x95, 0xb4, 0x83, 0x11, 0xc8, 0xe4,
On 11/06/2015 01:31 AM, Ard Biesheuvel wrote:
On 5 November 2015 at 22:51, Jeremy Linton wrote:
[Guids.common]
gArmJunoTokenSpaceGuid= { 0xa1147a20, 0x3144, 0x4f8d, { 0x82, 0x95,
0xb4, 0x83, 0x11, 0xc8, 0xe4, 0xa4 } }
+ gArmJunoDxe = { 0x1484ebe8, 0x2681, 0x45f1, {
On 11/06/15 15:31, Ryan Harkin wrote:
> I think the summary here is
> - nobody cares about ArmBds (it will be deleted asap anyway)
> - the patch is technically no worse than what's there already
> - the original code should have dynamically allocated the buffer, but doesn't
> - the code should have
On Fri, Nov 06, 2015 at 02:31:46PM +, Ryan Harkin wrote:
> I think the summary here is
> - nobody cares about ArmBds (it will be deleted asap anyway)
Yup.
> - the patch is technically no worse than what's there already
Yup.
> - the original code should have dynamically allocated the buffer,
Hello Liming,
I see what you mean. With Microsoft Outlook File->Save as->Save as Txt,
a tab is added after from:, sent:, to:, and subject:. Worse yet, the
lines are wrapped to 78 or so columns. The only solution I have found
is to avoid File->SaveAs altogether and instead use:
Select All
Hi Ashutosh,
On Fri, Nov 06, 2015 at 01:31:52PM +, Ashutosh Singh wrote:
> > So, I'm not a fan of hard-coded buffer sizes, or how this existing bit
> > of code duplicates functionality already available elsewhere in the
> > tree ... but I also don't care much about ArmBds.
> >
> > What I'm cur
On Fri, Nov 06, 2015 at 03:03:58PM +0100, Ard Biesheuvel wrote:
> When allocating memory to perform non-coherent DMA, use the cache
> writeback granularity rather than the data cache linesize for
> alignment. This prevents the explicit cache management from corrupting
> unrelated adjacent data if t
I think the summary here is
- nobody cares about ArmBds (it will be deleted asap anyway)
- the patch is technically no worse than what's there already
- the original code should have dynamically allocated the buffer, but doesn't
- the code should have given a sensible error message mentioning that
On 11/06/15 15:19, Laszlo Ersek wrote:
> On 11/06/15 14:31, Ashutosh Singh wrote:
>>> So, I'm not a fan of hard-coded buffer sizes, or how this existing bit
>>> of code duplicates functionality already available elsewhere in the
>>> tree ... but I also don't care much about ArmBds.
>>>
>>> What I'm
On 6 November 2015 at 15:19, Mark Rutland wrote:
> On Fri, Nov 06, 2015 at 03:03:57PM +0100, Ard Biesheuvel wrote:
>> Add a function to ArmLib that provides access to the Cache Writeback
>> Granularity (CWG) field in CTR_EL0. This information is required when
>> performing non-coherent DMA.
>
> Ni
On Fri, Nov 06, 2015 at 03:03:57PM +0100, Ard Biesheuvel wrote:
> Add a function to ArmLib that provides access to the Cache Writeback
> Granularity (CWG) field in CTR_EL0. This information is required when
> performing non-coherent DMA.
Nit: s/Granularity/Granule/
Likewise for the patch body.
On 11/06/15 14:31, Ashutosh Singh wrote:
>> So, I'm not a fan of hard-coded buffer sizes, or how this existing bit
>> of code duplicates functionality already available elsewhere in the
>> tree ... but I also don't care much about ArmBds.
>>
>> What I'm curious about is - why is your Mtftp4GetFileS
The ARM architecture does not allow the actual geometries of the caches
to be inferred from the CCSIDR cache info system register, since the
geometry it reports is intended for performing cache maintenance by
set/way and nothing else. Since the ArmLib cache info routines are
based solely on CCSIDR
There is no need to issue a full data synchronization barrier and an
instruction synchronization barrier after each and every set/way or
MVA cache maintenance operation. For the set/way case, we can simply
remove them, since the set/way outer loop already issues the required
barriers after completi
When allocating memory to perform non-coherent DMA, use the cache
writeback granularity rather than the data cache linesize for
alignment. This prevents the explicit cache management from corrupting
unrelated adjacent data if the cache writeback granularity exceeds
the cache linesize.
Reported-by:
Drop the call to ArmInvalidateDataCache () from the PrePi startup
sequence. This kind of data cache maintenance should not be performed
when running under virtualization.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
Acked-by: Laszlo Ersek
Acked-by: Mark R
This is a followup to the v1 I sent out last Tuesday, to address problems with
the cache maintenance practices in ArmPkg.
Changes:
- Dropped the patch that removes the ARM9 version of ArmLib. There's no rush
doing that, and people may still want us to hold on to it. Also updated patch #2
to fix th
Add a function to ArmLib that provides access to the Cache Writeback
Granularity (CWG) field in CTR_EL0. This information is required when
performing non-coherent DMA.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
ArmPkg/Include/Library/ArmLib.h
The stride used by the cache maintenance by MVA instructions should
be retrieved from CTR_EL0.DminLine and CTR_EL0.IminLine, whose values
reflect the actual geometry of the caches. Using CCSIDR for this purpose
violates the architecture.
Also, move the line length accessors to common code, since t
The ARM architecture provides no reliable way to clean or invalidate
the entire data cache at runtime. The reason is that such maintenance
requires the use of set/way maintenance operations, which are suitable
only for the kind of maintenance that is carried out when the cache is
taken offline enti
The function ArmCleanDataCacheToPoU() has no users, and its purpose
is unclear, since it uses cache maintenance by set/way to perform
the clean to PoU, which is a dubious practice to begin with. So
remove the declaration and all definitions.
Contributed-under: TianoCore Contribution Agreement 1.0
Replace all instances of ArmDataSyncronizationBarrier with
ArmDataSynchronizationBarrier.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
Acked-by: Mark Rutland
---
ArmPkg/Include/Library/ArmLib.h | 2 +-
ArmPkg/Library/ArmLib/AA
From: Mark Rutland
The ARM architecture requires a DSB to complete TLB maintenance, with a
subsequent ISB being required to synchronize subsequent items in the
current instruction stream against the completed TLB maintenance.
The ArmEnableMmu function is currently missing the DSB, and hence the
On 6 November 2015 at 14:27, Cohen, Eugene wrote:
> Vladimir,
>
> Since the UEFI images are PE-COFF but DS-5 builds ELF there is a conversion
> process in the edk2 build. This can result in a couple of issues with debug
> if not handled correctly:
>
> 1. The start of the image for debugger load
> So, I'm not a fan of hard-coded buffer sizes, or how this existing bit
> of code duplicates functionality already available elsewhere in the
> tree ... but I also don't care much about ArmBds.
>
> What I'm curious about is - why is your Mtftp4GetFileSize call failing
> such that you need to use a
Vladimir,
Since the UEFI images are PE-COFF but DS-5 builds ELF there is a conversion
process in the edk2 build. This can result in a couple of issues with debug if
not handled correctly:
1. The start of the image for debugger load purposes must be adjusted to
reflect the PE/TE header in the
If TPM2_Startup(TPM_SU_STATE) to return an error, the system
firmware that resumes from S3 MUST deal with a TPM2_Startup
error appropriately.
For example, issuing a TPM2_Startup(TPM_SU_CLEAR) command and
configuring the device securely by taking actions like extending
a separator with an error
On Fri, Nov 06, 2015 at 04:11:45PM +0800, Zhang Lubo wrote:
> v2:
> *Add a Url Parse state machine to indicate the host is ipv6 expressed url and
> can parse
> the ipv6 address correctly.
>
This patch works for me. The IPv6 address was extracted from my url.
Tested-by: Gary Ching-Pang Lin
> Cc
On 2015/10/26 9:54, Zeng, Star wrote:
Reviewed-by: Star Zeng
to the attached patch.
I could not see the email I replied to edk2-devel-01 ,
so re-reply to edk2-devel@lists.01.org.
Andrew,
Will you commit this patch by yourself, or need me help to do that?
Thanks
Star
Thanks,
Star
From:
On 2015/10/23 14:04, Andrew Fish wrote:
On Oct 22, 2015, at 10:10 PM, Zeng, Star wrote:
On 2015/10/22 23:29, Andrew Fish wrote:
On Oct 21, 2015, at 6:34 PM, Zeng, Star wrote:
On 2015/10/22 7:02, Andrew Fish wrote:
"/usr/bin/clang" -target x86_64-pc-win32-macho -c -g -Os -Wall -Werror -W
On 2015/11/3 21:09, Shia, Cinnamon wrote:
Stat,
Thanks for your feedback and review.
Will submit the v2 patch for addressing your comments.
And submit another patch for PerformancePkg\Dp_App
Shia,
Since the changes in UefiDpLib has been committed.
Will you submit patch for PerformancePkg\Dp_A
Hegde,
The patch is good.
Reviewed-by: Fu Siyuan
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Nagaraj
Hegde
Sent: Tuesday, November 3, 2015 5:11 PM
To: edk2-devel@lists.01.org
Cc: Ye, Ting ; Fu, Siyuan ; Nagaraj
Hegde
Subject: [edk2] [PAT
v2:
*Add a Url Parse state machine to indicate the host is ipv6 expressed url and
can parse
the ipv6 address correctly.
Cc: Fu Siyuan
Cc: Ye Ting
CC: Wu Jiaxin
CC: Gary Ching-Pang Lin
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Zhang Lubo
---
MdeModulePkg/Library/
Per Shell SPEC 2.1 'Double-quotation marks that surround arguments are not
stripped in positional parameters'. This patch makes Shell implementation to
follow SPEC.
Cc: Jaben Carsey
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qiu Shumin
---
ShellPkg/Application/Shel
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