PcdIdentifyMappingPageTablePtr is useless and could be
removed.
https://bugzilla.tianocore.org/show_bug.cgi?id=1304
Cc: Star Zeng
Cc: Jian J Wang
Cc: Ruiyu Ni
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei
---
MdeModulePkg/MdeModulePkg.dec | 6 --
1 file c
These wrapper header files are not referenced by all
open source, so they are removed.
https://bugzilla.tianocore.org/show_bug.cgi?id=158
Cc: Jaben Carsey
Cc: Ruiyu Ni
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang
--
On 11/14/2018 7:57 AM, Leif Lindholm wrote:
> On Mon, Oct 29, 2018 at 11:32:44AM +0800, Ming Huang wrote:
>> When SECURE_BOOT_ENABLE is TRUE, FlashFvbDxe should use
>> gEfiAuthenticatedVariableGuid, When SECURE_BOOT_ENABLE
>> is FALSE, gEfiVariableGuid should be used.
>>
>> Contributed-under: Ti
This is an issue that involves a combination of different software
packages, so my apologies in advance if this is the wrong list to post on.
I'm experiencing terrible boot times when I assign a large amount of RAM to
a VM when used in combination with VIFO/PCI-passthrough.
On a VM with a Nvidia
Hi, all
The tag edk2-stable201811 has been created.
https://github.com/tianocore/edk2/releases/tag/edk2-stable201811
git clone -b edk2-stable201811 https://github.com/tianocore/edk2.git
The tag edk2-stable201811 has been added into the main EDK II Wiki page.
https://github.com/t
Use (VOID) casts to silence unreferenced parameter warnings on GCC. The
existing macros generate 'statement with no effect' warnings instead,
which does not really help.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
IntelUndiPkg/XGigUndiDxe/ixgbe_type.
Only define the CPP macro MDEPKG_NDEBUG for the RELEASE target so
that debug features are functional otherwise.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
IntelUndiPkg/XGigUndiDxe/XGigUndiDxe.inf | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(
The DBG_LVL bit tests are already done at build time, so there is no
point in having separate definitions, since they only result in
unused variable warnings.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
IntelUndiPkg/XGigUndiDxe/Xgbe.h | 21 --
We hit unused variable warnings since the various ERROR_REPORTn()
macros resolve to nothing. So instead, map them to the macros that
were created to prevent these warnings.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
IntelUndiPkg/XGigUndiDxe/ixgbe_os
When building for the X64 target using GCC, correct use of the
EFIAPI modifiers is essential to ensure that the correct calling
convention is used. So add the missing ones where appropriate.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
IntelUndiPkg/XG
Remove duplicate definition of gImageHandle, which is emitted by
the build tools as well.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
IntelUndiPkg/XGigUndiDxe/Init.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/IntelUndiPkg/XGigUndiDxe/Init.c
Drop some variables that are defined, assigned but never referenced.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
IntelUndiPkg/XGigUndiDxe/Decode.c | 3 ---
IntelUndiPkg/XGigUndiDxe/HiiInternalLib.c | 4
IntelUndiPkg/XGigUndiDxe/Xgbe.c
Use intermediate (UINTN) casts when casting pointers to UINT64.
This is needed to be able to build this code for 32-bit architectures
such as ARM or IA32.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
IntelUndiPkg/XGigUndiDxe/Dma.c | 8 ++
The ## CPP token pasting operator is used to paste *tokens*, which
is not the same thing as pasting arbitrary macro arguments. Since a
token cannot contain . or ) characters in the first place, using
the ## operator here is wrong and unnecessary, so just remove it.
Contributed-under: TianoCore Con
Drop the locally defined ASSERT() macro and include DebugLib instead.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
IntelUndiPkg/XGigUndiDxe/ixgbe_osdep.h | 22 +---
1 file changed, 1 insertion(+), 21 deletions(-)
diff --git a/IntelUnd
The Data4 member of the GUID/EFI_GUID struct type is an array of
UINT8, so literals require two sets of { } braces. Add them where
missing.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
IntelUndiPkg/XGigUndiDxe/NVDataStruc.h | 4 ++--
IntelUndiPkg/XGig
UINT8 and CHAR8 are not the same underlying type on all architectures,
so add an explicit cast where necessary.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
IntelUndiPkg/XGigUndiDxe/Hii.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --g
Replace backslashes in paths with forward slashes to be compatible with
non-Windows OSes.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
IntelUndiPkg/XGigUndiDxe/Decode.c| 2 +-
IntelUndiPkg/XGigUndiDxe/XGigUndiDxe.inf | 14 +++---
Inte
Move the extern declaration of mBrandingTable[] after the definition of
the type. This solves a build issue with GCC.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
IntelUndiPkg/XGigUndiDxe/DeviceSupport.h | 6 +++---
1 file changed, 3 insertions(+), 3
GCC chokes on the unknown MSVC specific #pragmas used for suppressing
warnings, so remove them and use the INF BuildOptions section instead.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
IntelUndiPkg/XGigUndiDxe/XGigUndiDxe.inf | 4 ++--
IntelUndiPkg/
XgbeMemCopy () takes UINT8 pointers not INT8 pointers, so cast the
arguments to the correct type.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
IntelUndiPkg/XGigUndiDxe/Xgbe.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Inte
StdLibc should not be used in drivers (it has dependencies on Shell
protocols), but in fact, we don't appear to rely on it in the first
place, so just drop the reference.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
IntelUndiPkg/XGigUndiDxe/XGigUndiDx
Taking the address of a cast expression is not permitted in C. Instead,
take the address of the variable, and cast the pointer to the desired
pointer type.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
IntelUndiPkg/XGigUndiDxe/Xgbe.c | 4 ++--
1 file c
This series updates the XGigUndiDxe driver so it can be built with GCC
for X64, ARM and AARCH64 (and probably IA32 but I did not test that)
Ard Biesheuvel (20):
IntelUndiPkg/XGigUndiDxe: create GCC alternatives for MSFT build
options
IntelUndiPkg/XGigUndiDxe: move MSFT warning overrides to
Prefix the existing MSFT-only build option overrides with MSFT: and
create the GCC: counterparts so we can build this code with GCC as
well.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
IntelUndiPkg/XGigUndiDxe/XGigUndiDxe.inf | 13 +
1 fi
Unlike Visual Studio, GCC does not permit implicit conversion between
a pointer-to-void-pointer and pointer to a typed pointer. So add the
explicit casts where necessary.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
IntelUndiPkg/XGigUndiDxe/Hii.c | 8
On Wed, Nov 07, 2018 at 02:38:37PM +0100, Ard Biesheuvel wrote:
> On 7 November 2018 at 14:13, Ard Biesheuvel wrote:
> > BaseIoLibIntrinsicArmVirt was created to prevent LTO from merging
> > accesses to MMIO regions, resulting in instructions with multiple
> > output registers that KVM on ARM cann
On 11/14/18 21:00, Leif Lindholm wrote:
> On Wed, Nov 14, 2018 at 11:27:24AM -0800, Ard Biesheuvel wrote:
>> Fix a typo in the 32-bit ARM version of the GICv3 driver, which uses
>> the wrong system register encoding to access ICC_IAR1, and attempted
>> to access ICC_IAR0 instead. This results in bo
Here are the specific questions that I am looking to answer regarding
the different systems. Please feel free to share your thoughts on this
thread.
Also, as mentioned earlier, if you want to head up an investigation of
any of those products and provide us with a report, that would be much
ap
On Wed, Nov 14, 2018 at 11:27:24AM -0800, Ard Biesheuvel wrote:
> Fix a typo in the 32-bit ARM version of the GICv3 driver, which uses
> the wrong system register encoding to access ICC_IAR1, and attempted
> to access ICC_IAR0 instead. This results in boot time hangs both
> under QEMU emulation and
Fix a typo in the 32-bit ARM version of the GICv3 driver, which uses
the wrong system register encoding to access ICC_IAR1, and attempted
to access ICC_IAR0 instead. This results in boot time hangs both
under QEMU emulation and on real hardware.
Contributed-under: TianoCore Contribution Agreement
We are currently researching several different options to help make
contributing to TianoCore easier for the community. A big part of this
effort will be enabling pull requests and allowing for a more
customizable code review process.
I am looking for members of the community willing to answer
Liming,
Thanks. This looks good to me.
Mike
> -Original Message-
> From: Laszlo Ersek [mailto:ler...@redhat.com]
> Sent: Wednesday, November 14, 2018 7:39 AM
> To: Gao, Liming ; edk2-
> de...@lists.01.org
> Cc: Kinney, Michael D ;
> Cetola, Stephano ;
> leif.lindh...@linaro.org; af...@a
On Wed, Nov 14, 2018 at 07:05:01AM +0100, Marcin Wojtas wrote:
> > I think all of my comments on this patch can be summarised as "what is
> > an AP in this context"?
> >
> > The term either needs explicit documenting, or expansion in the macro
> > names such that documentation is not required.
>
>
On Wed, Nov 14, 2018 at 07:16:33AM +0100, Marcin Wojtas wrote:
> Hi Leif,
>
> śr., 14 lis 2018 o 02:12 Leif Lindholm napisał(a):
> >
> > On Sat, Oct 20, 2018 at 03:57:31AM +0200, Marcin Wojtas wrote:
> > > This patch extends library with GPIO devices per-board
> > > description. Both embedded SoC
On Wed, Nov 14, 2018 at 08:53:55AM +, Prasanth Pulla wrote:
> > > The result in DDR may rewrite by cache data. The essence of this
> > > problem is that primary core and slave core access the same area with
> > > different cache attribute.
> > > Configure L3T register to fix this issue;
> >
> >
On Wed, Nov 14, 2018 at 10:31:12PM +0800, Ming Huang wrote:
> On 11/14/2018 7:52 AM, Leif Lindholm wrote:
> > On Mon, Oct 29, 2018 at 11:32:43AM +0800, Ming Huang wrote:
> >> There is no variable to keep timezone and daylight, so read it from
> >> the hardware first and create a new variable to kee
Eugene,
Understood on the HW elements. As long as you can provide
evidence/documentation that the stack has been validated so we are all
confident the stack can work on all conformant TPM devices, we should be good.
We can also see if there are some publically available TPM devices that can b
On 11/14/18 15:20, Gao, Liming wrote:
> Hi, all Today, I review all patches in edk2 mail list. There is no
> patches for EDK II Stable Tag edk2-stable201811. Based on
> edk2-stable201811 tag planning, it will be released at 2018-11-15.
> So, I plan to create edk2-stable201811 based on current edk2
Mike, Chao, Jiewen
* [Chao] Infineon chip mentioned by Mike is an example but its register
space doesn’t comply to PTP spec
* [Mike] My experience is with DTPM and some I2C TPMs at 1.2 level.
We have experience with the TPM 1.2 Infineon I2C device and used a completely
custom solution.
On 11/14/2018 9:05 AM, Leif Lindholm wrote:
> +Prasanth
>
> On Mon, Oct 29, 2018 at 11:51:11AM +0800, Ming Huang wrote:
>> PE test case 15 flow:
>> Primary core(cacheable shareable) and slave cores(non-cacheable)
>> access the same memory area for communication.
>> For each slave core{
>> 1 T
On 11/14/2018 8:56 AM, Leif Lindholm wrote:
> On Mon, Oct 29, 2018 at 11:51:10AM +0800, Ming Huang wrote:
>> This issue may cause access usb3.0 device timeout.
>
> Can you add some more information?
> Examples of affected hardware?
> Visible behaviour to user?
The default link timeout value of
On 11/14/2018 9:07 AM, Leif Lindholm wrote:
> I'm fine with this message, but more changes may be required for PE15
> test, so I won't give r-b yet.
There is another patch for PE15, this one is needed for bug 3996.
https://bugs.linaro.org/show_bug.cgi?id=3996
>
> On Mon, Oct 29, 2018 at 11:51
On 11/14/2018 8:36 AM, Leif Lindholm wrote:
> On Mon, Oct 29, 2018 at 11:32:49AM +0800, Ming Huang wrote:
>> Linux kernel will recognize NUMA node by processor order,
>> and the Node and PXM number will be not identical between
>> BIOS and OS kernel after changing to TA boot, so adjust
>> the NU
On 11/14/2018 8:29 AM, Leif Lindholm wrote:
> On Mon, Oct 29, 2018 at 11:32:48AM +0800, Ming Huang wrote:
>> The values of PcdGicInterruptInterfaceBase and GICD are wrong, so modify it.
>> Fix SBSA test case 21:
>> 21 : Check GIC version
>> GIC version is 0
>> Failed on PE -0 for
On 11/14/2018 8:18 AM, Leif Lindholm wrote:
> On Mon, Oct 29, 2018 at 11:32:45AM +0800, Ming Huang wrote:
>> Enable secure boot to fix AuthVar issue:
>> RT.SetVariable - Set Invalid Time Base Auth Variable – FAILURE;
>> RT.SetVariable - Create one Time Base Auth Variable, the expect return
>> sta
On 11/14/2018 7:52 AM, Leif Lindholm wrote:
> On Mon, Oct 29, 2018 at 11:32:43AM +0800, Ming Huang wrote:
>> There is no variable to keep timezone and daylight, so read it from
>> the hardware first and create a new variable to keep it for the next
>> gettime process.
>
> Can you make use of Em
On 11/14/2018 8:04 AM, Leif Lindholm wrote:
> On Mon, Oct 29, 2018 at 11:32:42AM +0800, Ming Huang wrote:
>> As M41T83RealTimeClockLib is common library, so move two cpld
>> relative functions to OemMiscLib and rename this two functions.
>
> This would be more clear as "platform specific" than
Hi, all
Today, I review all patches in edk2 mail list. There is no patches for EDK II
Stable Tag edk2-stable201811. Based on edk2-stable201811 tag planning, it will
be released at 2018-11-15. So, I plan to create edk2-stable201811 based on
current edk2 trunk (the latest commit
https://github.co
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