> -Original Message-
> From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf
Of
> Ron McCall
> Sent: Thursday, June 01, 2006 2:33 PM
> To: gcc@gcc.gnu.org
> Subject: Intermixing powerpc-eabi and powerpc-linux C code
>
> Hi!
>
> Does anyone happen to know if it is possible to link
>
> -Original Message-
> From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On
> Behalf Of hector riojas roldan
> Sent: Friday, June 23, 2006 5:40 PM
> To: gcc@gcc.gnu.org
> Subject: Fortran Compiler
>
> Hello, I would like to know if there is a fortran compiler
> that runs on AMD 64 bits.
> -Original Message-
> From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf
Of
> Mark Mitchell
> Sent: Monday, August 14, 2006 12:50 PM
> To: DJ Delorie
> Cc: [EMAIL PROTECTED]; gcc@gcc.gnu.org
> Subject: Re: does gcc support multiple sizes, or not?
>
> DJ Delorie wrote:
> >> And ba
> -Original Message-
> From: H. J. Lu [mailto:[EMAIL PROTECTED]
> Sent: Monday, December 11, 2006 1:09 PM
> To: Menezes, Evandro
> Cc: gcc@gcc.gnu.org; [EMAIL PROTECTED]; rajagopal, dwarak; Meissner,
> Michael
> Subject: Re: Serious SPEC CPU 2006 FP performance regres
> -Original Message-
> From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf
Of H.
> J. Lu
> Sent: Wednesday, January 10, 2007 5:35 PM
> To: Janis Johnson
> Cc: gcc@gcc.gnu.org; [EMAIL PROTECTED]; Menezes, Evandro;
> [EMAIL PROTECTED]
> Subject: Re: RFC: Add BID as a configure time op
> -Original Message-
> I would like to say the one thing I have not heard through this
> discussion is the real reason why the C standards comittee decided
> signed overflow as being undefined. All I can think of is they were
> thinking of target that do saturation for plus/minus but wrapp
> -Original Message-
> From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf
Of
> [EMAIL PROTECTED]
> Sent: Wednesday, January 24, 2007 12:19 AM
> To: gcc@gcc.gnu.org
> Subject: char should be signed by default
>
> GCC should treat plain char in the same fashion on all types of
machi
> -Original Message-
> From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of
> Basile STARYNKEVITCH
> Sent: Wednesday, January 24, 2007 10:30 AM
> To: gcc@gcc.gnu.org
> Subject: variable-sized array fields in structure?
>
> Hello all,
>
> It is common to have structures which end
> -Original Message-
> From: Gabriel Paubert [mailto:[EMAIL PROTECTED]
> Sent: Thursday, January 25, 2007 5:43 AM
> To: Paolo Bonzini
> Cc: Meissner, Michael; [EMAIL PROTECTED]; gcc@gcc.gnu.org
> Subject: Re: [OT] char should be signed by default
>
> On Thu, Ja
> -Original Message-
> From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED]
> Sent: Thursday, January 25, 2007 1:54 PM
> To: Meissner, Michael
> Cc: gcc@gcc.gnu.org
> Subject: Re: RE: char should be signed by default
>
> > - Original Message -
> >
Use the GEN_INT macro to create an appropriate (const_int ) RTL:
operand[1] = GEN_INT (111);
-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of
Liu Haibin
Sent: Friday, July 22, 2005 3:23 AM
To: gcc@gcc.gnu.org
Subject: How can I create a const rtx o
> -Original Message-
> From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of
> François-Xavier Coudert
> Sent: Monday, March 19, 2007 5:54 AM
> To: GCC Development
> Subject: Has insn-attrtab.c been growing in size recently?
>
> Hi all,
>
> A bootstrap attempt of GCC mainline on
> -Original Message-
> From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf
Of
> Joe Buck
> Sent: Monday, March 19, 2007 2:02 PM
> To: Andrew Pinski
> Cc: Florian Weimer; Steven Bosscher; gcc@gcc.gnu.org
> Subject: Re: Building mainline and 4.2 on Debian/amd64
>
> On Mon, Mar 19, 20
> -Original Message-
> From: FX Coudert [mailto:[EMAIL PROTECTED]
> Sent: Tuesday, April 03, 2007 6:01 PM
> To: gcc@gcc.gnu.org
> Cc: Meissner, Michael; [EMAIL PROTECTED]
> Subject: Bootstrap is broken on i[345]86-linux
>
> Bootstrap has been broken since 2007
> -Original Message-
> From: Mark Mitchell [mailto:[EMAIL PROTECTED]
> Sent: Thursday, September 13, 2007 2:37 PM
> To: Meissner, Michael; Mark Mitchell; GCC
> Subject: Re: GCC 4.3.0 Status Report (2007-09-04)
>
> Michael Meissner wrote:
>
> > One patch tha
And note Yao qi, that there are different ABIs on the rs6000, each of
which has different conventions (ie, you will need to study the AIX ABI
as well as the System V/eabi ABIs, and possibly other ABIs that are now
used).
-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]
riginal Message-
From: Yao Qi qi [mailto:[EMAIL PROTECTED]
Sent: Tuesday, September 06, 2005 11:14 PM
To: Meissner, Michael
Cc: gcc@gcc.gnu.org
Subject: RE: var_args for rs6000 backend
>From: "Meissner, Michael" <[EMAIL PROTECTED]>
>To: "Yao qi" <[EMAIL PROTECTED
changes that I'm forgetting about, and also
the 64-bit support probably changes things also.
-Original Message-
From: Yao qi [mailto:[EMAIL PROTECTED]
Sent: Thursday, September 08, 2005 9:10 PM
To: Meissner, Michael
Cc: gcc@gcc.gnu.org
Subject: RE: var_args for rs6000 backend
ao qi [mailto:[EMAIL PROTECTED]
Sent: Friday, September 09, 2005 6:43 AM
To: Meissner, Michael
Cc: gcc@gcc.gnu.org
Subject: RE: var_args for rs6000 backend
>From: "Meissner, Michael" <[EMAIL PROTECTED]>
>To: "Yao qi" <[EMAIL PROTECTED]>
>CC: gcc@gcc.gnu
One of the classic places that sparse bitmaps were used in GCC in the
past is in register allocation phase, where you essentially have a 2D
sparse matrix with # of basic blocks on one axis and pseudo register
number on the other axis. When you are compiling very large functions,
the number of basi
When I used to work for Cygnus Solutions (and then Red Hat after they
bought Cygnus in 1999), the general port to an embedded target was
typically done in parallel by 3 people (or 3 groups for large ports).
Before starting out, somebody would design the ABI (either customer
paying for the port, the
20, 2005 5:43 PM
To: Meissner, Michael
Cc: [EMAIL PROTECTED]
Subject: RE: porting gcc/binutils
Hi Michael,
first, thanks for your detailed instructions
> If your target is a regular target like a RISC platform, the CGEN system
> can be used to simplify building the instructio
When -mtune=generic was added, it was expected that it would go into the
4.2 GCC release, since it clearly missed the 4.1 window for new
features. As desirable for both AMD and Intel that the new behavior be
propagated, I feel like Mark that it should wait for GCC 4.2, since it
clearly is a new fe
I suspect it isn't matching pattern #2, because it couldn't get a QI
register, and instead it falls back to the general case of moving to a
normal register. I believe the gcc_assert should contain a check for
CONST_INT as well as a QI register or memory.
-Original Message-
From: [EMAIL PR
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