[EMAIL PROTECTED] wrote on 26/02/2007 10:40:59:
I am targeting GCC 4.1.1 to a custom RISC processor; which has some vector
instructions (32 bit vectors). It can perform two 16 bit/ or four 8 bit
additions, subtractions, multiplications shift operations
simultaneously.
I would like to use the
: sdutta [EMAIL PROTECTED]
Subject: Auto Vectorizing help needed
Sent: 24 Feb '07 00:13
I am targeting GCC 4.1.1 to a custom RISC processor; which has some vector
instructions (32 bit vectors). It can perform two 16 bit/ or four 8 bit
additions, subtractions, multiplications shift operations
I am targeting GCC 4.1.1 to a custom RISC processor; which has some vector
instructions (32 bit vectors). It can perform two 16 bit/ or four 8 bit
additions, subtractions, multiplications shift operations simultaneously.
I would like to use the Auto-Vectorizing capability to generate these
On Fri, Feb 23, 2007 at 04:13:39PM -0800, sdutta wrote:
I am targeting GCC 4.1.1 to a custom RISC processor; which has some vector
instructions (32 bit vectors). It can perform two 16 bit/ or four 8 bit
additions, subtractions, multiplications shift operations simultaneously.
I would like