Bionic in Android 4.2 starts to support stack-protector canary at TLS for x86.
Android prior to 4.2 still looks at a global variable for stack
canary. To maintain backward compatibility, I propose to add a new
option -mstack-protector-guard={global,tls} for i386 back-end to use
canary at global
2013/4/12 Tobias Burnus bur...@net-b.de:
Am 12.04.2013 00:05, schrieb Janus Weil:
Just one minor nit:
+ if (sym-ts.type == BT_CLASS TREE_STATIC (sym-backend_decl)
+ CLASS_DATA (sym)-attr.allocatable)
I'd find it somewhat clearer to check for sym-attr.save instead of
Hello!
Bionic in Android 4.2 starts to support stack-protector canary at TLS for x86.
Android prior to 4.2 still looks at a global variable for stack
canary. To maintain backward compatibility, I propose to add a new
option -mstack-protector-guard={global,tls} for i386 back-end to use
On Thu, Apr 11, 2013 at 09:13:17PM +0200, Marc Glisse wrote:
On Thu, 11 Apr 2013, Jakub Jelinek wrote:
The op1 - op2 line instead of multiplication is something that has been
introduced in C++ double_int changes, but without the 2 * TYPE_PRECISION
prec it would always return 0 or -1 anyway.
The problem is actually bigger than just the var-tracking notes. The
general problem is that there are no rules for whether or not notes
are part of a basic block or not. Some notes never appear inside a
basic block, some notes always must appear inside a basic block, and
some can appear
On Fri, 12 Apr 2013, Steven Bosscher wrote:
On Thu, Apr 11, 2013 at 12:47 PM, Richard Biener wrote:
That said - I'm positively sure I will hit the IRA / reload
issue again when adding mandatory IL verification (though
for that they can simply drop the properties).
So, if we ignore that
On Fri, 12 Apr 2013, Jakub Jelinek wrote:
On Thu, Apr 11, 2013 at 09:13:17PM +0200, Marc Glisse wrote:
On Thu, 11 Apr 2013, Jakub Jelinek wrote:
The op1 - op2 line instead of multiplication is something that has been
introduced in C++ double_int changes, but without the 2 *
I've seen unfolded CONSTRUCTORs like { 1, 2, 3, 4 } being propagated
into binary stmt operands where they will sit forever, not being
folded (to VECTOR_CSTs) nor being considered for any constant folding
(which operates on VECTOR_CSTs only). There is no reason to allow
those unfolded
On Fri, 12 Apr 2013, Jakub Jelinek wrote:
On Thu, Apr 11, 2013 at 09:13:17PM +0200, Marc Glisse wrote:
The comments on PREC in the rshift function really confused me.
Yeah, me too. But if count == prec, the code always:
/* Zero / sign extend all bits that are beyond the precision. */
if
On Fri, 12 Apr 2013, Richard Biener wrote:
On Fri, 12 Apr 2013, Steven Bosscher wrote:
On Thu, Apr 11, 2013 at 12:47 PM, Richard Biener wrote:
That said - I'm positively sure I will hit the IRA / reload
issue again when adding mandatory IL verification (though
for that they can
On Fri, Apr 12, 2013 at 10:10:45AM +0200, Marc Glisse wrote:
unsigned_p changes the computation of the high part of the product:
it returns early for unsigned products and adjusts the high part
later for signed. overflow_dummy looks good. I don't remember
exactly, but I think the overflow
On Thu, Apr 11, 2013 at 10:18 PM, Xinliang David Li davi...@google.com wrote:
Great that it is already covered.
I expect that with more convoluted code you'll ICE eventually. There is also
a bugreport about exactly this issue which should be referenced when a fix
is committed.
Oh, and target
Introduced TARGET_SSP_GLOBAL_GUARD and TARGET_SSP_TLS_GUARD as suggested.
As for handling default in ix86_option_override_internal, is it
possible to achieve the same default to SSP_GLOBAL if bionic
entirely in i386.opt?
===
2013-04-12 Andrew Hsieh andrewhsieh.google.com
*
On Thu, Apr 11, 2013 at 04:32:30PM +0400, Michael Zolotukhin wrote:
128 is about upper bound you can expand with sse moves.
Tuning did not take into account code size and measured only when code
is in tigth loop.
For GPR-moves limit is around 64.
Thanks for the data - I've not performed
Am 12.04.2013 08:41, schrieb Janus Weil:
2013/4/12 Tobias Burnus bur...@net-b.de:
I think there was a test-suite failure when I tried it. In any case,
variables might be in static memory even if attr.save is not set:
- Module variables
- Variables of the main program
- Local variables of
On Thu, Apr 11, 2013 at 12:05:41PM -0700, Sriraman Tallam wrote:
I have attached a patch that fixes this. I have added an option
-mgenerate-builtins that will do two things. It will define a macro
__ALL_ISA__ which will expose the *intrin.h functions. It will also
expose all the target
Hello,
this adds support for vector !, and ||. In the long run, I think it
would be good to be able to use TRUTH_*_EXPR with vectors, but that's
probably a lot of work.
It currently restricts and || to vector-vector operations. I'd like to
also support mixed scalar-vector later, but it is
On Fri, Apr 12, 2013 at 04:43:51PM +0800, Andrew Hsieh wrote:
--- gcc/config/i386/i386-opts.h (revision 197837)
+++ gcc/config/i386/i386-opts.h (working copy)
@@ -85,4 +85,9 @@
ix86_veclibabi_type_acml
};
+enum stack_protector_guard {
+ SSP_TLS, /* per-thread canary at %gs:20 */
I did some profiling of builtin implementation, download this
http://kam.mff.cuni.cz/~ondra/memcpy_profile_builtin.tar.bz2
Nice data, thanks!
Could you please describe what is memcpy_new_builtin here? Is it how
GCC expanded memcpy with this patch?
Is this a comparison between libcall, libcall
2013/4/12 Tobias Burnus bur...@net-b.de:
Am 12.04.2013 00:17, schrieb Janus Weil:
Hmm, I think I'd prefer to have for the arguments only a warning with
-std=gnu - except for the function result value, which should always be
an
error. And also the requires an explicit interface checks should
Hi!
While writing the HTML sample for changes.html, I've noticed one
omission, while when we start lines with test.C:1 or test.C:1:28
or similar (i.e. diagnostic_build_prefix created prefix), it is colorized
with locus color, if we start it just with test.C (filename only),
we don't. The
On Fri, Apr 12, 2013 at 11:03 AM, Marc Glisse marc.gli...@inria.fr wrote:
Hello,
this adds support for vector !, and ||. In the long run, I think it would
be good to be able to use TRUTH_*_EXPR with vectors, but that's probably a
lot of work.
It currently restricts and || to vector-vector
On Fri, Apr 12, 2013 at 10:43 AM, Andrew Hsieh andrewhs...@google.com wrote:
Introduced TARGET_SSP_GLOBAL_GUARD and TARGET_SSP_TLS_GUARD as suggested.
As for handling default in ix86_option_override_internal, is it
possible to achieve the same default to SSP_GLOBAL if bionic
entirely in
Janus Weil wrote:
Ok, that's what the patch does now: Always error for wrong result
type, then do the full interface check, but only give a warning with
-std=gnu and -std=legacy, and an error otherwise.
Will do another regtest now. Are you okay with this version?
Yes, looks good to me. Thanks
On Fri, 12 Apr 2013, Richard Biener wrote:
On Fri, Apr 12, 2013 at 11:03 AM, Marc Glisse marc.gli...@inria.fr wrote:
Hello,
this adds support for vector !, and ||. In the long run, I think it would
be good to be able to use TRUTH_*_EXPR with vectors, but that's probably a
lot of work.
It
Changed comment, corrected formatting, and removed Init(SSP_TLS). Thanks!
=
2013-04-12 Andrew Hsieh andrewhsieh.google.com
* config/i386/i386.opt: New option mstack-protector-guard=.
* config/i386/i386-opts.h: Add enum stack_protector_guard.
* config/i386/i386.h:
One question: If I drop Init(SSP_TLS), I got the following error
during compilation:
options.c:1122:1: error: invalid conversion from 'int' to
'stack_protector_guard' [-fpermissive]
It's because w/o Init(SSP_TLS), '0' is placed in global_options_init
where enum stack_protector_guard is
This patch converts define_insn into define_insn_and_split for simple scc
patterns and emits RTL insns that match movsicc pattern.
Tested as part of the series for splitting arm.md patterns that output
multiple asm instructions. No regression on qemu with arm-none-eabi and
bootstrap successful.
This patch converts define_insn into define_insn_and_split to split
some alternatives of movsicc_insn and some scc patterns that cannot be
expressed using movsicc. The patch emits cond_exec RTL insns.
Tested as part of the series for splitting arm.md patterns that output
multiple asm
On Fri, Apr 12, 2013 at 12:28 PM, Andrew Hsieh andrewhs...@google.com wrote:
One question: If I drop Init(SSP_TLS), I got the following error
during compilation:
options.c:1122:1: error: invalid conversion from 'int' to
'stack_protector_guard' [-fpermissive]
It's because w/o Init(SSP_TLS),
Ok, that's what the patch does now: Always error for wrong result
type, then do the full interface check, but only give a warning with
-std=gnu and -std=legacy, and an error otherwise.
Will do another regtest now. Are you okay with this version?
Yes, looks good to me. Thanks for the patch!
Hi,
Please find attached the patch that implements addition and Subtraction
by setting flags instructions in extend and shift_extend mode for
aarch64 target.
The patch for Add/Sub instructions by setting flags in shift mode is
already posted.
Testcase have been added for these instructions.
Hi,
Please find attached the patch that implements compare instruction in
shift_extend mode for aarch64 target.
Testcase has been added for compare instructions.
Please review the same and let me know if there should be any
modifications in the patch.
Build and tested on aarch64-thunder-elf
This patch initializes the top Sloc in the scope stack, which is read in
Pop_End_Context and was previously uninitialized.
Tested on x86_64-pc-linux-gnu, committed on trunk
2013-04-12 Bob Duff d...@adacore.com
* par-ch7.adb (P_Package): Initialize Sloc in the newly-pushed scope
We are allowed to add implementation defined children to System,
so this patch takes advantage of that to make the Ada 2012 units
System.Multiprocessors and System.Multiprocessors.Dispatching_Domains
available in Ada 95 and Ada 2005 modes (like all child units, they
cannot be directly with'ed from
This patch implements the following legality rules concerning aspect Depends:
An input must have a mode of in or in out and an output must have an mode of
in out or out. [Note: As a consequence an entity which is both an input and an
output shall have a mode of in out.]
Every output of the
This patch corrects the insertion of the corresponding pragma for aspect
Abstract_State when the related construct is a nested package. The pragma
appears in the visible declarations of the package.
-- Source --
-- pack.ads
package Pack with Abstract_State =
This patch corrects some cases of missing style checks on specs when
compiling the body. If the spec of the main unit is explicitly with'ed
from an indirect chain of with's, then style checks for this spec
were missed. This patch corrects this, so will have the effect of
catching previously missed
VMS has a multitude of sophisticated file organizations, formats,
and attributes that are handled at the system service level (aka RMS)
Under some circumstances a file can be created that cannot be read
without the appropriate RMS key in the file open call. A mechanism is
designed for passing RMS
On 12/04/13 12:03, Greta Yorsh wrote:
This patch converts define_insn into define_insn_and_split for simple scc
patterns and emits RTL insns that match movsicc pattern.
Tested as part of the series for splitting arm.md patterns that output
multiple asm instructions. No regression on qemu with
On 12/04/13 12:04, Greta Yorsh wrote:
This patch converts define_insn into define_insn_and_split to split
some alternatives of movsicc_insn and some scc patterns that cannot be
expressed using movsicc. The patch emits cond_exec RTL insns.
Tested as part of the series for splitting arm.md
The following compilation must produce the indicated output:
$ gcc -gnat05 -c -gnatR3 sso_r3.ads
Representation information for unit SSO_R3 (spec)
for A'Size use 64;
for A'Alignment use 4;
for A'Component_Size use 32;
for A'Scalar_Storage_Order use System.High_Order_First;
for R'Object_Size
The Contract_Case pragmas/aspect will be replaced soon by the slightly
different Contract_Cases (plural, because all cases are given at once).
This changes the detection of suspicious contracts so that it applies to
Contract_Cases instead of Contract_Case.
Tested on x86_64-pc-linux-gnu, committed
On 12/04/13 12:38, Hurugalawadi, Naveen wrote:
Hi,
Please find attached the patch that implements addition and Subtraction
by setting flags instructions in extend and shift_extend mode for
aarch64 target.
The patch for Add/Sub instructions by setting flags in shift mode is
already posted.
On 12/04/13 12:44, Hurugalawadi, Naveen wrote:
Hi,
Please find attached the patch that implements compare instruction in
shift_extend mode for aarch64 target.
Testcase has been added for compare instructions.
Please review the same and let me know if there should be any
modifications in the
This patch adds several restrictions identifiers that were introduced late
in the Ada 2012 development process.
Given the following configuration file:
---
pragma Restrictions (No_Access_Parameter_Allocators, No_Coextensions);
pragma Restrictions (No_Standard_Allocators_After_Elaboration);
pragma
This patch provides the initial implementation of aspect Ghost. This construct
is intended for formal verification proofs.
Aspect Ghost is a boolean aspect with the following semantics:
A function with a Ghost aspect_mark in the aspect_specification of its
declaration may only be called from
When gnatclean is invoked with a project file and the switch -f, if there
are nonexistent object, exec or library directories, these directories
are ignored and gnatclean does not fail.
Tested on x86_64-pc-linux-gnu, committed on trunk
2013-04-12 Vincent Celier cel...@adacore.com
*
With this patch, Check_Policy can optionally use the same syntax as
Assertion_Policy (the old syntax is still allowed).
This test shows error detection
1. package BadCpol is
2.pragma Check_Policy
3. (Junk, Ignore);-- OK
4.pragma
Hi all,
This patch adds the vcvt_f16_f32 and vcvt_f32_f16 NEON intrinsic
to arm_neon.h through the generator ML scripts and also adds the
built-ins to which the intrinsics will map to. The generator ML scripts
are updated and used to generate the relevant .texi documentation,
arm_neon.h and the
Hi all,
This patch adds testsuite options to check for a neon-fp16
effective target and add appropriate options.
These are needed to test the half-precision NEON intrinsics that adding
with patch [1/2] of this set.
Tested on qemu with the tests added in patch [1/2].
Ok for trunk?
Thanks,
Kyrill
Cleanup to remove warning about uninitialized variable base when compiling
arm.c.
Approved offline by Richard Earnshaw. Committed r197921.
gcc/
2013-04-12 Greta Yorsh greta.yo...@arm.com
* config/arm/arm.c (gen_operands_ldrd_strd): Initialize base.
diff --git a/gcc/config/arm/arm.c
Minor patch update due to Janus' gfc_explicit_interface_required patch.
Build and regtested on x86-64-gnu-linux.
OK for the trunk?
Tobias
Tobias Burnus wrote:
Minor patch update:
- Changed FAILURE to false due to Janne's patch
- Removed a left-over #if 0 debug code
Tobias Burnus wrote:
Many
Sorry, I've just realized that there is a possible issue with the way
SELECT_CC_MODE is used in a few places in this patch. Working on a fix.
Thanks,
Greta
-Original Message-
From: Richard Earnshaw
Sent: 12 April 2013 14:07
To: Greta Yorsh
Cc: GCC Patches; Ramana Radhakrishnan;
Allocatable scalar coarrays use an error descriptor...
Build and regtested on x86-64-gnu-linux.
OK for the trunk?
Tobias
2013-04-12 Tobias Burnus bur...@net-b.de
PR fortran/56929
* trans-array.c (duplicate_allocatable): Fix handling
of scalar coarrays.
2013-04-12 Tobias Burnus
On 03/23/2013 02:07 AM, Richard Sandiford wrote:
Moore, Catherine catherine_mo...@mentor.com writes:
2013-03-21 Catherine Moore c...@codesourcery.com
* config/mips/constraints.md (u, Udb7 Uead, Uean, Uesp, Uib3,
Uuw6, Usb4, ZS, ZT, ZU, ZV, ZW): New constraints.
*
On Fri, Apr 12, 2013 at 9:48 AM, Eric Botcazou ebotca...@adacore.com wrote:
The problem is actually bigger than just the var-tracking notes. The
general problem is that there are no rules for whether or not notes
are part of a basic block or not. Some notes never appear inside a
basic block,
Allocatable scalar coarrays use an error descriptor...
Build and regtested on x86-64-gnu-linux.
OK for the trunk?
Ok (looks pretty much obvious).
Thanks,
Janus
On 13-04-11 5:04 PM, Vladimir Makarov wrote:
On 04/11/2013 02:32 PM, David Edelsohn wrote:
On Thu, Apr 11, 2013 at 1:30 PM, Vladimir Makarov
vmaka...@redhat.com wrote:
Here is a patch to enable LRA for rs6000. The patch includes
code changes
in rs6000 machine-dependent parts and in LRA
On Fri, 12 Apr 2013, David Daney wrote:
I just tried to bootstrap on o32 Debian. This system has binutils 2.20.1.
Here is a sample of the resulting failure when building the libjava target
libs:
.
.
.
/home/daney/gccsvn/build/./gcc/xgcc -B/home/daney/gccsvn/build/./gcc/
On 13-04-11 12:51 PM, Uros Bizjak wrote:
On Wed, Apr 10, 2013 at 10:15 PM, Vladimir Makarov vmaka...@redhat.com wrote:
The following patch fixes
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56903
In this test case reload pass gets correct value HARD_REGNO_MODE_OK because
it can not create
GCC 4.6.4 has been released. The 4.6 branch is now closed, please don't
check anything there anymore.
We have now two actively maintained releases as planned, 4.7.x and 4.8.x.
Jakub
On Fri, Apr 12, 2013 at 1:22 AM, Richard Biener
richard.guent...@gmail.com wrote:
On Thu, Apr 11, 2013 at 10:18 PM, Xinliang David Li davi...@google.com
wrote:
Great that it is already covered.
I expect that with more convoluted code you'll ICE eventually.
Yes, those are bugs that need to
-Original Message-
From: Maciej W. Rozycki [mailto:ma...@codesourcery.com]
Sent: Friday, April 12, 2013 1:03 PM
To: David Daney
Cc: Moore, Catherine; gcc-patches@gcc.gnu.org; Richard Sandiford
Subject: Re: Many warnings in MIPS port (Was: [PATCH] [MIPS] microMIPS
gcc support)
On Fri, Apr 12, 2013 at 1:58 AM, Jakub Jelinek ja...@redhat.com wrote:
On Thu, Apr 11, 2013 at 12:05:41PM -0700, Sriraman Tallam wrote:
I have attached a patch that fixes this. I have added an option
-mgenerate-builtins that will do two things. It will define a macro
__ALL_ISA__ which will
Hello!
2013-04-12 Uros Bizjak ubiz...@gmail.com
* config/i386/i386.c (ix86_hard_regno_mode_ok): Use ANY_QI_REGNO_P in
QImode checks.
There is no functional change, but the function is now slightly more readable.
Tested on x86_64-pc-linux-gnu {,-m32} and committed to mainline SVN.
Hi all,
here is a small patch which fixes an ICE-on-invalid problem by simply
turning a gcc_assert into a MATCH_ERROR. I am aware that the
resulting error message (Unclassifiable statement) is not the most
helpful one, but I couldn't come up with something better.
The problem is that c(i) is
Hi,
the attached patch implements the SYSTEM_CLOCK intrinsics on the MinGW
and Cygwin targets using the GetTickCount/GetTickCount64 functions.
These should be quite robust monotonic clocks and AFAICS are the best
we can do on Windows. See e.g.
http://www.python.org/dev/peps/pep-0418/ for details.
On 04/12/2013 10:55 AM, Moore, Catherine wrote:
-Original Message-
From: Maciej W. Rozycki [mailto:ma...@codesourcery.com]
Sent: Friday, April 12, 2013 1:03 PM
To: David Daney
Cc: Moore, Catherine; gcc-patches@gcc.gnu.org; Richard Sandiford
Subject: Re: Many warnings in MIPS port
On Fri, 12 Apr 2013 15:19:18 +0100
Kyrylo Tkachov kyrylo.tkac...@arm.com wrote:
Hi all,
This patch adds the vcvt_f16_f32 and vcvt_f32_f16 NEON intrinsic
to arm_neon.h through the generator ML scripts and also adds the
built-ins to which the intrinsics will map to. The generator ML
scripts
Jeff,
The tests fail also on powerpc*-*-* (see
http://gcc.gnu.org/ml/gcc-testresults/2013-04/msg01162.html and
http://gcc.gnu.org/ml/gcc-testresults/2013-04/msg01330.html ).
Could you please add it to the long list of skipped targets?
TIA
Dominique
On 12/04/2013 19:47, Janne Blomqvist wrote:
As I don't have a Windows system to test on, I would appreciate if somebody
more familiar with that platform could take a quick look. In particular, I
*think* it should be Ok to use win32 API functions on Cygwin (that is,
cygwin-gcc ships the
On 04/12/2013 02:35 PM, Dominique Dhumieres wrote:
Jeff,
The tests fail also on powerpc*-*-* (see
http://gcc.gnu.org/ml/gcc-testresults/2013-04/msg01162.html and
http://gcc.gnu.org/ml/gcc-testresults/2013-04/msg01330.html ).
Could you please add it to the long list of skipped targets?
Attached
Janne Blomqvist wrote:
the attached patch implements the SYSTEM_CLOCK intrinsics on the MinGW
and Cygwin targets using the GetTickCount/GetTickCount64 functions.
These should be quite robust monotonic clocks and AFAICS are the best
we can do on Windows.
I think using QueryPerformanceCounter is
On 04/12/2013 03:07 PM, Moore, Catherine wrote:
Hi David,
Please try the attached patch. Is this OK to checkin?
I don't think it is correct...
Thanks,
Catherine
2013-04-12 Catherine Moorec...@codesourcery.com
* configure.ac (.micromips support): Add --fatal-warnings option.
Committed:
* doc/tm.texi.in (LOOP_ALIGN): Remove loop note references.
* doc/tm.texi: Regenerated.
Index: doc/tm.texi.in
===
--- doc/tm.texi.in (revision 197610)
+++ doc/tm.texi.in (working copy)
@@ -8909,8
On Fri, Apr 12, 2013 at 12:57 PM, Vladimir Makarov vmaka...@redhat.com wrote:
After thorough investigation I found that this code is still ok. The
explanations are in the comment. Here is the modified version of the code
taking you proposals into account
@@ -5701,19 +5705,31 @@
Hello,
emit-rtl.c:remove_insn calls df_insn_delete on insns that have not
been emitted to the insn chain, and therefore don't have DF cache
entries yet. I think it's wrong for remove_insn to call
df_insn_delete.
delete_insn should be used to completely destroy an insn and all
associated data
78 matches
Mail list logo
