Two more cases where we compare addresses

Hi, this patch fixes use of operand_equal_p in fold_comparison where we compare two addresses for equivalence and in fold_addr_of_array_ref_difference. Bootstrapped/regtested x86_64-linux, OK? Honza * fold-const.c (fold_comparison, fold_addr_of_array_ref_difference): Pass

Use OEP_ADDRESS_OF in emit-rtl.c

Hi, adding some extra sanity checks to operand_equal_p made me to notice that uses of operand_equal_p in mem attrs really care about addresses only. The expression is tree of the original memory acces MEM RTX was created from and thus the comparsions should be done with OEP_ADDRESS_OF.

Re: Do not compare types in operands_equal_p if OEP_ADDRESS_OF is set

> > I also disabled type matching done by operand_equal_p and cleaned up the > > conditional of MEM_REF into multiple ones - for example it was passing > > OEP_ADDRESS_OF when comparing TYPE_SIZE which is quite a nonsense. > > > > I wonder what to do about OPE_CONSTANT_ADDRESS_OF. This flag does

Re: C PATCH for c/65345 (file-scope _Atomic expansion with floats)

On 6 October 2015 at 12:29, Ramana Radhakrishnan wrote: > Thanks for the explanation Eric, by that explanation I do not see the need to > adjust for TARGET_EXPR or mark_addressable in the backends. > > Here are the patches that I'm testing - I will apply the

Re: [RFA 1/2]: Don't ignore target_header_dir when deciding inhibit_libc

Hans-Peter Nilsson wrote: > > From: Ulrich Weigand > > Date: Tue, 6 Oct 2015 16:04:35 +0200 > > > I'm using the build procedure: build initial GCC (--without-headers), > > use it to build newlib, install newlib into prefix, build final GCC > > (--with-headers). Using this

Re: C PATCH for c/65345 (file-scope _Atomic expansion with floats)

On Thu, Oct 1, 2015 at 4:49 PM, Marek Polacek wrote: > Joseph reminded me that I had forgotten about this patch. As mentioned > here , I'm > removing the XFAILs in the tests so people are likely to see new FAILs.

Re: [patch 4/3] Header file reduction - Tools for contrib

On 10/06/2015 04:04 PM, Andrew MacLeod wrote: I primarily submitted it early because you wanted to look at the tools before the code patch, which is the one I care about since the longer it goes, the more effort it is to update the patch to mainline. The problem is that the generated patch is

Re: RFC: Patch to allow spill slot alignment greater than the stack alignment

On Mon, 2015-10-05 at 09:57 -0700, H.J. Lu wrote: > You need to update dwarf2cfi.c to generate proper unwind info for > whatever frame instructions MIPS generates, like what we did for > x86 dynamic stack realignment. The problem is understanding what the 'proper' unwind info is and figuring out

Re: [PATCH] remove dead code used by the old cloog scheduler

On 10/06/2015 05:45 PM, Sebastian Pop wrote: 2015-10-05 Aditya Kumar Sebastian Pop * graphite-dependences.c (scop_get_transformed_schedule): Remove. (no_violations): Remove.

Re: [PATCH, rs6000] Fix PR target/67808, LRA ICE on double to long double conversion

On Mon, Oct 5, 2015 at 6:36 PM, Michael Meissner wrote: > Ok, after spending the day on going down the rabbit hole of trying to optimize > just about every, here are my patches. > > Note, I simplified the constraints to eliminate some rare possibilities, like >

Re: RFC: Patch to allow spill slot alignment greater than the stack alignment

On Tue, Oct 6, 2015 at 8:30 AM, Steve Ellcey wrote: > On Mon, 2015-10-05 at 09:57 -0700, H.J. Lu wrote: > >> You need to update dwarf2cfi.c to generate proper unwind info for >> whatever frame instructions MIPS generates, like what we did for >> x86 dynamic stack realignment.

Re: [Patch, fortran, pr65889, v1] [6 Regressions] [OOP] ICE with sizeof a polymorphic variable

Le 06/10/2015 16:22, Andre Vehreschild a écrit : Hi all, the attached patch fixes a 6 regression when the argument of sizeof() is a pointer to a class object, e.g., when the class object is intent(out). The patch improves the check if the parameter is a class object by previously checking

Re: [PATCH] reorg.c: use vec instead of rtx_insn_list for the delay insn list

On Tue, 2015-10-06 at 15:59 +0200, Bernd Schmidt wrote: > On 10/06/2015 03:37 PM, tbsaunde+...@tbsaunde.org wrote: > > This seems a bit cleaner, and should involve less allocation. > > I agree this is good. rtx_insn_list should die. > > > I tested there was no regressions for sh-sim with all

Re: [PATCH] reorg.c: use vec instead of rtx_insn_list for the delay insn list

On 10/06/2015 04:50 PM, Oleg Endo wrote: On Tue, 2015-10-06 at 15:59 +0200, Bernd Schmidt wrote: On 10/06/2015 03:37 PM, tbsaunde+...@tbsaunde.org wrote: This seems a bit cleaner, and should involve less allocation. I agree this is good. rtx_insn_list should die. I tested there was no

Re: [PATCH, i386] Add missing entries to cpuinfo.

On Tue, Oct 6, 2015 at 3:36 PM, Kirill Yukhin wrote: > Hello, > Patch in the bottom adds missing options to libgcc/config/i386/cpuinfo.c > It also updates documentation. > As far as number of entries exceeded 32, I've extended > type of features array to INT64 (most

[Patch, fortran, pr65889, v1] [6 Regressions] [OOP] ICE with sizeof a polymorphic variable

Hi all, the attached patch fixes a 6 regression when the argument of sizeof() is a pointer to a class object, e.g., when the class object is intent(out). The patch improves the check if the parameter is a class object by previously checking whether the argument is the plain object or a pointer to

Re: [PATCH] PR target/67850: Wrong call_used_regs used in aggregate_value_p

On Tue, Oct 6, 2015 at 6:39 AM, Richard Biener wrote: > On Tue, 6 Oct 2015, H.J. Lu wrote: > >> On Tue, Oct 06, 2015 at 02:30:59PM +0200, Richard Biener wrote: >> > On Tue, Oct 6, 2015 at 1:43 PM, H.J. Lu wrote: >> > > Since targetm.expand_to_rtl_hook may

[PATCH] remove dead code used by the old cloog scheduler

2015-10-05 Aditya Kumar Sebastian Pop * graphite-dependences.c (scop_get_transformed_schedule): Remove. (no_violations): Remove. (subtract_commutative_associative_deps): Remove.

[Patch, fortran] COMMON block error recovery: PR 67758 (second pass)

Hello, Dominique noticed that the test coming with the preceding PR67758 patch [1] was failing if compiled as free form. [1] https://gcc.gnu.org/ml/gcc-patches/2015-10/msg00301.html The problem is again an inconsistent state, but this time between the in_common attribute and the common_block

Re: [google][gcc-4_9] encode and compress cc1 option strings in gcov_module_info

It's 1:3 to 1:4 in the programs I tested. But it really depends on how the options are used. I think your idea of using combined strlen works better. I just make the code a little clumsy but it does not cause any performance issue. On Tue, Oct 6, 2015 at 10:21 AM, Xinliang David Li

Re: [C++ PATCH] Build COND_EXPRs with location (PR c++/67863)

On Tue, Oct 06, 2015 at 11:46:33AM -0600, Jeff Law wrote: > >2015-10-06 Marek Polacek > > > > PR c++/67863 > > * call.c (build_conditional_expr_1): Build the COND_EXPR with > > a location. > > > > * c-c++-common/Wtautological-compare-4.c: New test. > OK.

[PATCH v3, i386]: Enable -mstackrealign and 'force_align_arg_pointer' attribute for x86_64

On Mon, Oct 5, 2015 at 7:33 PM, Uros Bizjak wrote: >> As shown in PR 66697 [1] and WineHQ bug [2], an application can >> misalign incoming stack to less than ABI mandated 16 bytes. While it >> is possible to use -mincoming-stack-boundary=2 (= 4 bytes) for 32 bit >> targets to

Re: [C++ PATCH] Build COND_EXPRs with location (PR c++/67863)

On 10/06/2015 11:29 AM, Marek Polacek wrote: I've been chasing a bogus -Wtautological-compare warning that only occurred in the C++ FE. Turned out that we were building COND_EXPRs without a location; that means that this code in warn_tautological_cmp didn't work as planned: /* Don't warn

Re: RFC: Patch to allow spill slot alignment greater than the stack alignment

On Tue, 2015-10-06 at 11:10 -0700, H.J. Lu wrote: > Does it pass all tests under g++.dg/torture/stackalign? You need > to implement -mstackrealign and -mpreferred-stack-boundary= > as well as update check_effective_target_automatic_stack_alignment > to run all stack alignment tests. No, those

Re: Do not use TYPE_CANONICAL in useless_type_conversion

> > The patch works for me but I'm not sure about the store_expr_with_bounds > change. Where does the actual copying take place? adjust_address_nv > just adjusts the mode ... Yep, the mode was supposed to happen in the later path where we emit block moves, but i missed an else there. I will

Re: RFC: Patch to allow spill slot alignment greater than the stack alignment

On Tue, 2015-10-06 at 17:39 +0200, Bernd Schmidt wrote: > > Did your tag that copy as RTX_FRAME_RELATED? I'd expect dwarf2cfi would > ignore instructions with that bit unset. There's even a comment > indicating arm does something like this: Yes, I had marked it as RTX_FRAME_RELATED. When I

Re: RFC: Patch to allow spill slot alignment greater than the stack alignment

On Tue, Oct 6, 2015 at 11:32 AM, Steve Ellcey wrote: > On Tue, 2015-10-06 at 11:10 -0700, H.J. Lu wrote: > >> Does it pass all tests under g++.dg/torture/stackalign? You need >> to implement -mstackrealign and -mpreferred-stack-boundary= >> as well as update

RE: [PATCH 1/2] [Refactoring graphite] Move declarations, assign types, renaming.

Thanks for the quick fix. Sorry for breaking bootstrap. -Original Message- From: H.J. Lu [mailto:hjl.to...@gmail.com] Sent: Tuesday, October 06, 2015 11:43 AM To: Aditya Kumar Cc: GCC Patches; Tobias Grosser; Richard Biener; aditya...@samsung.com; Sebastian Pop; Sebastian Pop Subject:

Re: [patch 4/3] Header file reduction - Tools for contrib

On 10/06/2015 10:56 AM, Bernd Schmidt wrote: On 10/06/2015 04:04 PM, Andrew MacLeod wrote: I primarily submitted it early because you wanted to look at the tools before the code patch, which is the one I care about since the longer it goes, the more effort it is to update the patch to

Re: [patch 4/3] Header file reduction - Tools for contrib

On 10/06/2015 08:02 AM, Bernd Schmidt wrote: This sounds like the intention is to move recognized core files (I assume these are the ones in the "order" array in the tool) to the start, and leaving everything alone? I was a bit confused about this at first; I see for example "timevar.h"

Re: RFC: Patch to allow spill slot alignment greater than the stack alignment

On Tue, Oct 6, 2015 at 11:02 AM, Steve Ellcey wrote: > On Tue, 2015-10-06 at 17:39 +0200, Bernd Schmidt wrote: > >> >> Did your tag that copy as RTX_FRAME_RELATED? I'd expect dwarf2cfi would >> ignore instructions with that bit unset. There's even a comment >> indicating arm

Re: [PATCH, i386] Introduce switch for Skylake Server CPU.

Hello Uroš, I've merged two patches together and rebased it on top of gcc-5-branch. The only change I made compared to trunk version is scheduling set to CPU_NEHALEM since CPU_HASWELL is not supported in gcc-5. Bootstrapped. Is it ok for gcc-5-branch? gcc/ * config.gcc: Support

Re: [PATCH, i386] Introduce switch for Skylake Server CPU.

One more missed hunk: iff --git a/gcc/testsuite/gcc.target/i386/builtin_target.c b/gcc/testsuite/gcc.target/i386/builtin_target.c index 9eb397e..cbca6b4 100644 --- a/gcc/testsuite/gcc.target/i386/builtin_target.c +++ b/gcc/testsuite/gcc.target/i386/builtin_target.c @@ -173,6 +173,10 @@

Re: [PATCH, obvious, AVX-512] Add missing AVX-512 features detection.

On Fri, Oct 2, 2015 at 5:25 PM, Kirill Yukhin wrote: > Hello, > Patch in the bottom adds missing AVX-512VBMI,IFMA > features to libgcc/config/i386/cpuinfo.c and, built-in expansion > and test. > > Comitted to main trunk as obvious. The test now execute FAILs for me:

Re: Fold acc_on_device

On Thu, Oct 01, 2015 at 08:33:07AM -0400, Nathan Sidwell wrote: > 2015-10-01 Nathan Sidwell > > * builtins.c: Don't include gomp-constants.h. > (fold_builtin_1): Don't fold acc_on_device here. > * gimple-fold.c: Include gomp-constants.h. >

[PATCH, i386] Checked AES and PCLMUL in builtin_target.c.

Hello, This obvious patch adds check for AES and PCLMUL cpuids. gcc/testsuite/ * gcc.target/i386/builtin_target.c: Add check for AES and PCLMUL. Updated test pass. Checked into main trunk. -- Thanks, K commit 6b4c0a8204ec5d311e4fef740ad8834cc4f5f5ff Author: Kirill Yukhin

[PATCH 2/3] remove unused struct base_alias_pair

2015-10-06 Aditya Kumar Sebastian Pop * graphite-poly.c (free_data_refs_aux): Remove. (free_gimple_poly_bb): Do not call free_data_refs_aux. * graphite-poly.h (struct base_alias_pair):

[PATCH 3/3] move dr->alias_set to a helper structure

2015-10-06 Aditya Kumar Sebastian Pop * graphite-poly.c (new_scop): Initialize drs. * graphite-poly.h (struct dr_info): New. (struct scop): Add drs. *

[PATCH 1/3] remove dead code in computation of alias sets

2015-10-06 Aditya Kumar Sebastian Pop * graphite-poly.c (new_poly_dr): Remove dr_base_object_set. Do not set PDR_BASE_OBJECT_SET. * graphite-poly.h (poly_dr): Same.

RE: [PATCH 1/2] [Refactoring graphite] Move declarations, assign types, renaming.

We just realized why this error got introduced: the code that fails is in an #ifdef of ISL-0.14 or earlier. We only bootstrapped and regtested the change with ISL-0.15. Sorry again for the breakage, Sebastian -Original Message- From: Sebastian Paul Pop [mailto:s@samsung.com] Sent:

Re: [PATCH 1/3] remove dead code in computation of alias sets

On 10/06/2015 10:45 PM, Sebastian Pop wrote: 2015-10-06 Aditya Kumar Sebastian Pop * graphite-poly.c (new_poly_dr): Remove dr_base_object_set. Do not set PDR_BASE_OBJECT_SET. *

Re: [patch 4/3] Header file reduction - Tools for contrib

On 10/06/2015 09:19 PM, Andrew MacLeod wrote: I dont get your fear. I could have created that patch by hand, it would just take a long time, and would likely be less complete, but just as large. I'm not changing functionality. ALL the tool is doing is removing header files which aren't

Re: RFA: LM32: Configure with newlib-stdint.h

On 10/06/2015 07:36 AM, Nick Clifton wrote: Hi Sebastien, I recently found that I could not build libstdc++ for the lm32-elf target because the port lacked a definition of __INTPTR_TYPE__. I tracked this down to the fact that INTPTR_TYPE was not being defined when building gcc, and

Re: [C++ PATCH] Use protected_set_expr_location more

On 10/06/2015 11:30 AM, Marek Polacek wrote: Similarly to what I've just done for the C FE, this makes the C++ FE use the protected_set_expr_location helper where applicable. Bootstrapped/regtested on x86_64-linux, ok for trunk? 2015-10-06 Marek Polacek *

[committed, nios2] fix link error from gcc.dg/pr65658.c

On nios2-linux-gnu, the testcase gcc.dg/pr65658.c was failing with a link error. The problem was that the nios2 back end was emitting GP-relative addressing for an uninitialized common symbol (C tentative declaration) that had a strong definition in a shared library. That's a dumb thing to

Re: [patch 4/3] Header file reduction - Tools for contrib

On 10/06/2015 02:37 PM, Bernd Schmidt wrote: On 10/06/2015 09:19 PM, Andrew MacLeod wrote: I dont get your fear. I could have created that patch by hand, it would just take a long time, and would likely be less complete, but just as large. I'm not changing functionality. ALL the tool is

Re: [patch 0/3] Header file reduction.

On 10/05/2015 03:11 PM, Andrew MacLeod wrote: In any case, a direct include of obstack.h in coretypes.h was considered earlier in the aggregation process and it didn't show up as something that would be a win. It is included a couple of common places that we have no control over.. in

RE: [PATCH, MIPS] Frame header optimization for MIPS O32 ABI

On Tue, 2015-10-06 at 12:02 +, Moore, Catherine wrote: > > Moore, Catherine writes: > > > The patch itself looks good, but the tests that you added need a little > > > more > > work. Here is a new patch for just the tests. I added NOMIPS16 and the -mabi=32 flag

Re: [PATCH v2] SH FDPIC backend support

On Tue, 2015-10-06 at 12:52 -0400, Rich Felker wrote: > > > + if (TARGET_FDPIC) > > > +{ > > > + rtx a = force_reg (Pmode, plus_constant (Pmode, XEXP (tramp_mem, > > > 0), 8)); > > > + emit_move_insn (adjust_address (tramp_mem, SImode, 0), a); > > > + emit_move_insn

Go patch committed: Track each package import separately

This patch by Chris Manghane changes the Go frontend to track each package import separately, so that we can report whether an import is used separately by the alias used. This fixes https://golang.org/issue/12326 . This requires adjust a couple of test cases, to match errors previously only

Re: [patch 4/3] Header file reduction - Tools for contrib

On 10/06/2015 08:04 AM, Andrew MacLeod wrote: No commenting on the quality of python code... :-) I was learning python on the fly.Im sure some things are QUITE awful., Yeah, the general impression is of fairly ad-hoc code. Not sure how much can be done about this. they were never intended

Re: [patch 0/3] Header file reduction.

On 10/05/2015 02:10 PM, Andrew MacLeod wrote: Is the bitmap/obstack example really one of a change that is desirable? I think if a file uses obstacks then an include of obstack.h is perfectly fine, giving us freedom to e.g. change bitmaps not to use obstacks. Given that multiple headers include

[PATCH] Introduce base class for bb_vec_info and loop_vec_info

This is sth I long wanted to have done and now it is required to not make pushing/popping of the vectorizer state awkward (which is what I'm going to work on). It's mostly a 1:1 conversion everywhere so followup TLC is certainly possible. At least it shows that the current way of having one of

Re: [PATCH] Unswitching outer loops.

On Mon, Oct 5, 2015 at 3:13 PM, Yuri Rumyantsev wrote: > Thanks Richard. > I'd like to answer on your last comment related to using of exit edge > argument for edge that skips loop. > Let's consider the following test-case: > > #include > #define N 32 > float *foo(int

Re: C PATCH for c/65345 (file-scope _Atomic expansion with floats)

> The attached patch is to fix ICEs for new pr65345-[45].c tests > on sh4-unknown-linux-gnu. It's a mechanical change referring > to the original i386 patch, though I'm not sure the change > for TARGET_EXPR is really needed for SH targets. No, it is not if you don't need to make the variable

Re: Cache reals for 1/4, 1/6 and 1/9

On Mon, Oct 5, 2015 at 4:47 PM, Richard Sandiford wrote: > Richard Biener writes: >> On Thu, Oct 1, 2015 at 3:59 PM, Bernd Schmidt wrote: >>> On 10/01/2015 03:51 PM, Richard Sandiford wrote: We have a global

Re: [PATCH, i386] Introduce switch for Skylake Server CPU.

On Tue, Oct 6, 2015 at 9:09 AM, Kirill Yukhin wrote: > Hello Uroš, > > I've merged two patches together and rebased it > on top of gcc-5-branch. The only change I made compared > to trunk version is scheduling set to CPU_NEHALEM since > CPU_HASWELL is not supported in

Re: [PATCH, obvious, AVX-512] Add missing AVX-512 features detection.

Hi Richard, On 06 Oct 09:36, Richard Biener wrote: > The test now execute FAILs for me: > > FAIL: gcc.target/i386/builtin_target.c execution test > > I have family 6, model 94 Wow, Skylake! Fixed. AVX-512VBMI bit lives in ecx, not ebx as rest of AVX-512. gcc/testsuite/ *

Re: Generalize gimple_val_nonnegative_real_p

On Mon, Oct 5, 2015 at 5:02 PM, Richard Sandiford wrote: > The upcoming patch to move sqrt and cbrt simplifications to match.pd > caused a regression because the (abs @0)->@0 simplification didn't > trigger for: > > (abs (convert (abs X))) > > The simplification is

Re: [AARCH64] Add missing entries in iterator vwcore

On Tue, Oct 06, 2015 at 02:40:26AM +0100, Kugan wrote: > > > On 05/10/15 21:33, James Greenhalgh wrote: > > On Thu, Oct 01, 2015 at 09:41:20PM +0100, Kugan wrote: > >> Hi, > >> > >> In "aarch64_get_lane" operand 0 is VEL, so for %0, > >> iterator vwcore should (?) support all the modes in VEL.

Re: Move sqrt and cbrt simplifications to match.pd

On Mon, 5 Oct 2015, Richard Sandiford wrote: + /* cbrt(sqrt(x)) -> pow(x,1/6). */ + (simplify + (sqrts (cbrts @0)) + (pows @0 { build_real_truncate (type, dconst<1, 6> ()); })) + /* sqrt(cbrt(x)) -> pow(x,1/6). */ + (simplify + (cbrts (sqrts @0)) + (pows @0 { build_real_truncate

Re: Do not compare types in operands_equal_p if OEP_ADDRESS_OF is set

> I also disabled type matching done by operand_equal_p and cleaned up the > conditional of MEM_REF into multiple ones - for example it was passing > OEP_ADDRESS_OF when comparing TYPE_SIZE which is quite a nonsense. > > I wonder what to do about OPE_CONSTANT_ADDRESS_OF. This flag does not seem

Re: Move sqrt and cbrt simplifications to match.pd

On Mon, Oct 5, 2015 at 5:17 PM, Richard Sandiford wrote: > This patch moves the sqrt and cbrt simplification rules to match.pd. > builtins.c now only does the constant folding. > > Bootstrapped & regression-tested on x86_64-linux-gnu. OK to install? Ok (once

RE: [PATCH, MIPS] Frame header optimization for MIPS O32 ABI

Moore, Catherine writes: > The patch itself looks good, but the tests that you added need a little more > work. > > I tested with the mips-sde-elf-lite configuration and I'm seeing failures for > many > options. The main failure mode seems to be that the stack is

Re: Do not compare types in operands_equal_p if OEP_ADDRESS_OF is set

On Tue, 6 Oct 2015, Jan Hubicka wrote: > Hi, > While looking for uses of useless_type_conversion on non-gimple register types > I run across few that seem to be completely unnecesary and I would like to get > rid of them in hope to get rid of code comparing functions/method type and > possibly

[PATCH] Fix PR67859

This fixes an ICE in SCCVN - not sure how we got away with not clearing new slots... possibly SSA name recycling triggered. Bootstrapped on x86_64-unknown-linux-gnu, applied. Richard. 2015-10-06 Richard Biener PR tree-optimization/67859 *

Re: C PATCH for c/65345 (file-scope _Atomic expansion with floats)

> Joseph reminded me that I had forgotten about this patch. As mentioned > here , I'm > removing the XFAILs in the tests so people are likely to see new FAILs. > > I think the following targets will need similar fix as the one below: > *

Re: Do not compare types in operands_equal_p if OEP_ADDRESS_OF is set

Hi, I see, OEP_CONSTANT_ADDRESS_OF is set in: return operand_equal_p (TREE_OPERAND (arg0, 0), TREE_OPERAND (arg1, 0), TREE_CONSTANT (arg0) && TREE_CONSTANT (arg1) ? OEP_CONSTANT_ADDRESS_OF | OEP_ADDRESS_OF : 0); so it is not

Re: [google][gcc-4_9] encode and compress cc1 option strings in gcov_module_info

Here is the patch set 2 that integrates David's comments. Note that this uses the combined strlen (i.e. encoding compressed and uncompressed strlen into one gcov_unsigned_t). Testing is ongoing. -Rong On Tue, Oct 6, 2015 at 11:30 AM, Rong Xu wrote: > It's 1:3 to 1:4 in the

C++ PATCH for c++/67810 (wrong fold-expression error)

It seems that my approach of scanning the tokens looking for an ellipsis with an operator next to it wasn't good enough; it got confused by a reference pack expansion in a template argument list. So this patch changes the parsing approach so that within parentheses we always start by parsing

[PATCH][PR tree-optimization/67816] Fix jump threading when DOM removes conditionals in jump threading path

As touched on in the BZ, we record jump threads as a list of edges to traverse. A jump thread may be recorded through a block which hasn't been optimized by DOM yet. If DOM is able to optimize a control flow statement in such a block, then it will remove one or more outgoing edges from the

[PATCH 1/3] [ARM] PR63870 Add qualifiers for NEON builtins

From: Charles Baylis gcc/ChangeLog: Charles Baylis PR target/63870 * config/arm/arm-builtins.c (enum arm_type_qualifiers): New enumerator qualifier_struct_load_store_lane_index. (builtin_arg): New

[PATCH v2 0/3] [ARM] PR63870 vldN_lane/vstN_lane error messages

From: Charles Baylis This patch series fixes up the error messages for single lane vector load/stores, similarly to AArch64. make check on arm-linux-gnueabihf/qemu completes with no new regressions. Changes since the last version: . removed the duplicate

[PATCH 2/3] [ARM] PR63870 Mark lane indices of vldN/vstN with appropriate qualifier

From: Charles Baylis gcc/ChangeLog: Charles Baylis PR target/63870 * config/arm/arm-builtins.c: (arm_load1_qualifiers) Use qualifier_struct_load_store_lane_index. (arm_storestruct_lane_qualifiers)

Re: [4/7] Use correct promoted mode sign for result of GIMPLE_CALL

On 15/09/15 22:47, Richard Biener wrote: On Tue, Sep 8, 2015 at 11:50 PM, Jim Wilson wrote: On 09/08/2015 08:39 AM, Jeff Law wrote: Is this another instance of the PROMOTE_MODE issue that was raised by Jim Wilson a couple months ago? It looks like a closely related

Re: [PATCH] Fix PR67859

On Tue, 6 Oct 2015, Richard Biener wrote: > > This fixes an ICE in SCCVN - not sure how we got away with not clearing > new slots... possibly SSA name recycling triggered. Ah, it's not supposed to happen. Bisection shows the cause, fixed with the following instead. Bootstrap / regtest

Re: [PING][PR67476] Add param parloops-schedule

On 10/04/2015 05:36 PM, Tom de Vries wrote: I'll try to give a bit of context: The omp-expand machinery is used in two contexts: 1. when omp annotations are added to the source. In that case, omp-expand is used in non-ssa gimple context. 2. when parloops annotates a loop with omp

Re: [ARM] Fix PR middle-end/65958

> Thanks - I have no further comments on this patch. We probably need to > implement the same on AArch64 too in order to avoid similar problems. Here's the implementation for aarch64, very similar but simpler since there is no shortage of scratch registers; the only thing to note is the new

Re: [PATCH] Optimize certain end of loop conditions into min/max operation

On Thu, Oct 1, 2015 at 10:20 AM, Michael Collison wrote: > Marc, > > Ah I did misunderstand you. Patch with match.pd formatting fix. Ok if bootstrap/regtest passes. Thanks, Richard. > On 10/01/2015 01:05 AM, Marc Glisse wrote: >> >> On Thu, 1 Oct 2015, Michael

Re: C PATCH for c/65345 (file-scope _Atomic expansion with floats)

Eric Botcazou wrote: > No, it is not if you don't need to make the variable addressable. In any > case, the failure mode is another ICE in make_decl_rtl so easy to spot. Thanks for your explanation! It clarifies the intent of the original i386 patch. Regards,

Re: [PATCH, MIPS, PR/61114] Migrate to reduc_..._scal optabs.

Thanks for working on this, Simon! On 01/10/15 15:43, Simon Dardis wrote: -(define_expand "reduc_smax_" - [(match_operand:VWHB 0 "register_operand" "") - (match_operand:VWHB 1 "register_operand" "")] +(define_expand "reduc_smax_scal_" + [(match_operand:HI 0 "register_operand" "") +

Re: [patch 4/3] Header file reduction - Tools for contrib

On 10/06/2015 04:37 PM, Bernd Schmidt wrote: On 10/06/2015 09:19 PM, Andrew MacLeod wrote: I dont get your fear. I could have created that patch by hand, it would just take a long time, and would likely be less complete, but just as large. I'm not changing functionality. ALL the tool is

Re: [PATCH] PR28901 -Wunused-variable ignores unused const initialised variables

On Thu, 2015-09-24 at 21:24 -0400, Trevor Saunders wrote: > On Thu, Sep 24, 2015 at 06:55:11PM +0200, Bernd Schmidt wrote: > > On 09/24/2015 06:11 PM, Steve Ellcey wrote: > > >At least one of the warnings in glibc is not justified (in my opinion). > > >The header file timezone/private.h defines

Re: [3/7] Optimize ZEXT_EXPR with tree-vrp

Hi Richard, Thanks for the review. On 15/09/15 23:08, Richard Biener wrote: On Mon, Sep 7, 2015 at 4:58 AM, Kugan wrote: This patch tree-vrp handling and optimization for ZEXT_EXPR. + else if (code == SEXT_EXPR) +{ + gcc_assert (range_int_cst_p

Re: [google][gcc-4_9] encode and compress cc1 option strings in gcov_module_info

ok with the following changes (and after testing). + * sizeof (char*)); for (unsigned j = 0; j < total_num - num_array[0]; j++) -module->string_array[j] = xstrdup (gcov_read_string ()); +string_array[j] = xstrdup (gcov_read_string ());

Re: [PATCH v2] SH FDPIC backend support

On Wed, Oct 07, 2015 at 07:22:59AM +0900, Oleg Endo wrote: > On Tue, 2015-10-06 at 12:52 -0400, Rich Felker wrote: > > > > + if (TARGET_FDPIC) > > > > +{ > > > > + rtx a = force_reg (Pmode, plus_constant (Pmode, XEXP (tramp_mem, > > > > 0), 8)); > > > > + emit_move_insn

[Fortran, committed] Fix segfault on substring of derived type component (pr 65766)

Revision 228551... Louis

[PATCH] move graphite bookkeeping from sese to sese_info

2015-10-06 Aditya Kumar Sebastian Pop * graphite-isl-ast-to-gimple.c (translate_isl_ast_to_gimple): Use an sese_info_p. (copy_def): Same. (copy_internal_parameters):

Re: RFC: Patch to allow spill slot alignment greater than the stack alignment

On 10/06/2015 08:02 PM, Steve Ellcey wrote: If I remove that and I change Rule #16 to handle an AND with a register I get odd looking .cfi stuff. The AND instruction (which is marked with RTX_FRAME_RELATED) seems to generate these cfi_escape macros: .cfi_escape 0x10,0x1f,0x2,0x8e,0x7c

Re: [RFA][PATCH] Fix building cr16-elf with trunk compiler

On Wed, Sep 30, 2015 at 07:10:11PM +0200, Marek Polacek wrote: > On Wed, Sep 30, 2015 at 11:01:14AM -0600, Jeff Law wrote: > > On 09/30/2015 06:45 AM, Marek Polacek wrote: > > >On Wed, Sep 30, 2015 at 02:41:36PM +0200, Bernd Schmidt wrote: > > >>On 09/29/2015 11:49 PM, Jeff Law wrote: > > >>> > >

Re: [patch 4/3] Header file reduction - Tools for contrib

On 10/05/2015 11:18 PM, Andrew MacLeod wrote: Here's the patch to add all the tools to contrib/headers. Small patches should not be sent in compressed form, it makes reading and quoting them harder. This message is only intended to contain the patch in plain text so that I can quote it in

[wwwdocs] Suggest UBsan in https://gcc.gnu.org/bugs/

For many non-bugs UBsan is at least as likely to reveal it as -fno-strict-aliasing -fwrapv -fno-aggressive-loop-optimizations so we should tell people to try that before wasting time in Bugzilla. OK for wwwdocs? Index: htdocs/bugs/index.html

[patch 0/6] scalar-storage-order merge (2)

Hi, this is a repost of the diff of the scalar-storage-order branch vs mainline. It contains the fixes suggested by Joseph for the C front-end and the doc, fixes for the handling of complex types, the new pragma scalar_storage_order and associated -fsso-struct switch for the C family of

[patch 1/6] scalar-storage-order merge: Ada front-end

This is the Ada front-end (in fact mostly gigi) part. ada/ * freeze.adb (Check_Component_Storage_Order): Skip a record component if it has Complex_Representation. (Freeze_Record_Type): If the type has Complex_Representation, skip the regular treatment of

[patch 2/6] scalar-storage-order merge: C front-end

This is the C front-end + C family part. * doc/extend.texi (type attributes): Document scalar_storage_order. (Structure-Packing Pragmas): Rename into... (Structure-Layout Pragmas): ...this. Document scalar_storage_order. * doc/invoke.texi (C Dialect Options):

[patch 3/6] scalar-storage-order merge: C++ front-end

This is the C++ front-end part, probably incomplete but passes the testsuite. cp/ * class.c: Add c-family/c-pragma.h. (finish_struct_1): If structure has reverse scalar storage order, rewrite the type of array fields with scalar component. Call

[patch 4/6] scalar-storage-order merge: bulk

This is the bulk of the implementation. * calls.c (store_unaligned_arguments_into_pseudos): Adjust calls to extract_bit_field and store_bit_field. (initialize_argument_information): Adjust call to store_expr. (load_register_parameters): Adjust call to

Re: [PATCH, i386, AVX-512] Update extract_even_odd w/ AVX-512BW insns.

On Fri, Oct 2, 2015 at 7:37 AM, Kirill Yukhin wrote: > On 01 Oct 14:11, Kirill Yukhin wrote: >> Bootstrapped. New tests pass (fail w/o the change). Regtesting is in >> progress. >> >> Is it ok for trunk? >> >> gcc/ >> * config/i386/i386.c

[patch 5/6] scalar-storage-order merge: rest

This is the rest of the implementation. * asan.c (instrument_derefs): Adjust call to get_inner_reference. * builtins.c (get_object_alignment_2): Likewise. * cfgexpand.c (expand_debug_expr): Adjust call to get_inner_reference and get_ref_base_and_extent. *

[wwwdocs] Update C++ conformance status

People are being scared off by the experimental status on https://gcc.gnu.org/projects/cxx0x.html e.g. https://gcc.gnu.org/ml/gcc/2015-10/msg00025.html This makes it clear C++11 in 5.1 is no longer experimental. We also have a "Standard Conformance" section for G++ in https://gcc.gnu.org/bugs/

  1   2   >