Re: [PATCH] Add port for Phoenix-RTOS on ARM platform.

2016-05-18 Thread Jakub Sejdak
OK for trunk and backports to branch 6 and 5? 2016-05-17 10:42 GMT+02:00 Kuba Sejdak : > --- > ChangeLog| 6 ++ > MAINTAINERS | 1 + > configure| 6 ++ > configure.ac | 6 ++ > gcc/ChangeLog| 6 ++ > gcc/con

Re: Fix firefox compilation ICE

2016-05-18 Thread Jan Hubicka
> Hi, > this patch fixes ICE while building Firefox (and probably xalancbmk, too) > with -O3 -flto. I originally tested the whole patchset on several bigger apps > including the inline heuristics change which teach it that thunks are very > cheap. > Mainline doesn't contain it that makes us to in

[PATCH] Change dse, cd_dce to canonical order

2016-05-18 Thread Richard Biener
I noticed this late last year, now is the proper time to change it. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2016-05-18 Richard Biener * passes.def: Put late dse and cd_dce in canonical order. Index: gcc/passes.def =

Re: [PATCH] Fix PR71132

2016-05-18 Thread Richard Biener
On Tue, 17 May 2016, H.J. Lu wrote: > On Tue, May 17, 2016 at 5:51 AM, Richard Biener wrote: > > > > The following fixes a latent issue in loop distribution catched by > > the fake edge placement adjustment. > > > > Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. > > > > Richard. >

Re: [PATCH GCC]Enable vect_cond_mixed for AArch64.

2016-05-18 Thread Bin.Cheng
On Tue, May 17, 2016 at 9:33 PM, Jeff Law wrote: > On 05/17/2016 03:04 AM, Bin Cheng wrote: >> >> Hi, >> After supporting all vcond/vcondu patterns in AArch64 backend, now we can >> vectorize VEC_COND_EXPR with different type in comparison operands and value >> operands on AArch64. GCC uses vect_

[PATCH] Fix PR71168

2016-05-18 Thread Richard Biener
The following fixes an oversight with the last change. Tested on x86_64-unknown-linux-gnu, applied as obvious. Richard. 2016-05-18 Richard Biener PR tree-optimization/71168 * tree-loop-distribution.c (distribute_loop): Move *destroy_p initialization earlier.

Re: [AArch64, 2/4] Extend vector mutiply by element to all supported modes

2016-05-18 Thread Christophe Lyon
On 17 May 2016 at 14:27, James Greenhalgh wrote: > On Mon, May 16, 2016 at 10:09:31AM +0100, Jiong Wang wrote: >> AArch64 support vector multiply by element for V2DF, V2SF, V4SF, V2SI, >> V4SI, V4HI, V8HI. >> >> All above are well supported by "*aarch64_mul3_elt" pattern and >> "*aarch64_mul3_elt_

Re: [AArch64, 1/4] Add the missing support of vfms_n_f32, vfmsq_n_f32, vfmsq_n_f64

2016-05-18 Thread Christophe Lyon
On 17 May 2016 at 14:42, Kyrill Tkachov wrote: > > On 17/05/16 13:40, Kyrill Tkachov wrote: >> >> >> On 17/05/16 13:20, James Greenhalgh wrote: >>> >>> On Mon, May 16, 2016 at 10:09:26AM +0100, Jiong Wang wrote: The support of vfma_n_f64, vfms_n_f32, vfmsq_n_f32, vfmsq_n_f64 are mis

Re: [AArch64, 1/4] Add the missing support of vfms_n_f32, vfmsq_n_f32, vfmsq_n_f64

2016-05-18 Thread Kyrill Tkachov
On 18/05/16 09:25, Christophe Lyon wrote: On 17 May 2016 at 14:42, Kyrill Tkachov wrote: On 17/05/16 13:40, Kyrill Tkachov wrote: On 17/05/16 13:20, James Greenhalgh wrote: On Mon, May 16, 2016 at 10:09:26AM +0100, Jiong Wang wrote: The support of vfma_n_f64, vfms_n_f32, vfmsq_n_f32, vfmsq

Re: [RFC][PATCH][PR40921] Convert x + (-y * z * z) into x - y * z * z

2016-05-18 Thread Kugan Vivekanandarajah
>>> Please move the whole thing under the else { } case of the ops.length >>> == 0, ops.length == 1 test chain >>> as you did for the actual emit of the negate. >>> >> >> I see your point. However, when we remove the (-1) from the ops list, that >> intern can result in ops.length becoming 1. Theref

Re: [ARM] Enable __fp16 as a function parameter and return type.

2016-05-18 Thread Ramana Radhakrishnan
On Mon, May 16, 2016 at 2:16 PM, Tejas Belagod wrote: > > We do have plans to fix pre-ACLE behavior of fp16 to conform to current ACLE > spec, but can't say when exactly. Matthew, could you please take a look at this while you are in this area ? thanks, Ramana > > Thanks, > Tejas.

Re: [PATCH] Allow XMM16-XMM31 in vpmaddubsw

2016-05-18 Thread Kirill Yukhin
Hello Jakub, On 13 May 19:14, Jakub Jelinek wrote: > Hi! > > This is either AVX2 or for EVEX AVX512BW (& AVX512VL) instruction, > thus the patch adds it as a separate alternative guarded with avx512bw > isa attribute. > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? > > 2

Re: [PATCH] Fix up vpmulhrsw for -mavx512vl -mno-avx512bw

2016-05-18 Thread Kirill Yukhin
On 13 May 19:16, Jakub Jelinek wrote: > Hi! > > vpmulhrsw is AVX512BW & AVX512VL insn, so we shouldn't enable it just > when AVX512VL is on. > > Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux, ok for > trunk? > > 2016-05-13 Jakub Jelinek > > * config/i386/sse.md (*

Re: [PATCH] Fix up vpshufb for -mavx512vl -mno-avx512bw

2016-05-18 Thread Kirill Yukhin
On 13 May 19:17, Jakub Jelinek wrote: > Hi! > > vpshufb is AVX512BW & AVX512VL insn, so we shouldn't allow it for > AVX512VL only. > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? > > 2016-05-13 Jakub Jelinek > > * config/i386/sse.md (_pshufb3): Use > cons

Re: [PATCH] Fix up vpalignr for -mavx512vl -mno-avx512bw

2016-05-18 Thread Kirill Yukhin
On 13 May 19:18, Jakub Jelinek wrote: > Hi! > > vpalignr is AVX512BW & VL, so we shouldn't enable it just for VL. > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? > > 2016-05-13 Jakub Jelinek > > * config/i386/sse.md (_palignr): Use > constraint x instead

Re: [PATCH] Allow XMM16-XMM31 in vpbroadcast*

2016-05-18 Thread Kirill Yukhin
On 13 May 19:20, Jakub Jelinek wrote: > Hi! > > These insns are either AVX512VL or AVX512VL & BW, this patch allows using > XMM16+ where possible. > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? > > 2016-05-13 Jakub Jelinek > > * config/i386/sse.md (pbroadcast_

Re: [PATCH, i386, AVX-512] Fix sse-14.c (Intel assembly)

2016-05-18 Thread Kirill Yukhin
Hello, On 05 May 15:47, Petr Murzin wrote: > Hello, > > The attached patch fixes sse-14.c to compile with -masm=intel. > Bootstrapped. No regressions detected. > > Please have a look. Is it ok for trunk? > > 2016-05-05 Petr Murzin > > gcc/ > * config/i386/sse.md: Use proper operand m

PR 71020: Handle abnormal PHIs in tree-call-cdce.c

2016-05-18 Thread Richard Sandiford
The PR is about a case where tree-call-cdce.c causes two abnormal PHIs for the same variable to be live at the same time, leading to a coalescing failure. It seemed like getting rid of these kinds of input would be generally useful, so I added a utility to tree-dfa.c. Tested on x86_64-linux-gnu.

Re: [PATCH] Fix PR71132

2016-05-18 Thread Christophe Lyon
On 17 May 2016 at 20:21, H.J. Lu wrote: > On Tue, May 17, 2016 at 5:51 AM, Richard Biener wrote: >> >> The following fixes a latent issue in loop distribution catched by >> the fake edge placement adjustment. >> >> Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. >> >> Richard. >> >>

Re: [PATCH, libgomp] Rewire OpenACC async

2016-05-18 Thread Chung-Lin Tang
On 2016/5/17 5:00 PM, Jakub Jelinek wrote: > On Tue, May 17, 2016 at 04:56:42PM +0800, Chung-Lin Tang wrote: >> I assume that bumping GOMP_VERSION in include/gomp-constants.h would be >> enough? > > I think so. > > Jakub > How is this patch? I have added a comment to remind to adjust the

Re: [AArch64, 1/4] Add the missing support of vfms_n_f32, vfmsq_n_f32, vfmsq_n_f64

2016-05-18 Thread Jiong Wang
On 18/05/16 09:25, Christophe Lyon wrote: Unfortunately, the guard is not correct :( The float64_t type is not available on arm, so the new declarations/definitions in arm-neon-ref.h need a guard. Since this patch was checked-in, all the advsimd intrinsics tests fail to compile on arm: In fi

Re: [PATCH 7/7] SMS remove dependence on doloop: To identify read/write register as loop induction variable

2016-05-18 Thread Shiva Chen
Hi, Bernd 2016-05-13 20:33 GMT+08:00 Bernd Schmidt : > On 05/05/2016 08:03 AM, Shiva Chen wrote: >> >> >> - /* We do not handle setting only part of the register. */ >> - if (DF_REF_FLAGS (adef) & DF_REF_READ_WRITE) >> -return GRD_INVALID; >> - > This isn't right, at least not without other

Re: [PATCH, libgomp] Rewire OpenACC async

2016-05-18 Thread Jakub Jelinek
On Wed, May 18, 2016 at 05:40:33PM +0800, Chung-Lin Tang wrote: > On 2016/5/17 5:00 PM, Jakub Jelinek wrote: > > On Tue, May 17, 2016 at 04:56:42PM +0800, Chung-Lin Tang wrote: > >> I assume that bumping GOMP_VERSION in include/gomp-constants.h would be > >> enough? > > > > I think so. > > > >

Re: [AArch64, 1/4] Add the missing support of vfms_n_f32, vfmsq_n_f32, vfmsq_n_f64

2016-05-18 Thread Christophe Lyon
On 18 May 2016 at 11:44, Jiong Wang wrote: > > > On 18/05/16 09:25, Christophe Lyon wrote: >> >> >> Unfortunately, the guard is not correct :( >> >> The float64_t type is not available on arm, so the new >> declarations/definitions in arm-neon-ref.h >> need a guard. >> >> Since this patch was chec

Re: [RFC][PATCH][PR40921] Convert x + (-y * z * z) into x - y * z * z

2016-05-18 Thread Martin Liška
On 05/18/2016 10:38 AM, Kugan Vivekanandarajah wrote: > Is this Still OK. Bootstrap and regression testing on ARM, AARCH64 and > x86-64 didn’t have any new regressions. > > Thanks, > Kugan Hello. I see various ICE after your commit r236356: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71170 Mar

[PATCH] Fix PR fortran/70856

2016-05-18 Thread Martin Liška
Hello. Following patch add support for IPA ICF, where we miss support for a proper DECL_PT_UID update in situations where we merge variables. Patch can bootstrap and no new regression is introduced for x86_64-linux-gnu. Ready for trunk? Thanks, Martin >From 35ec4381940677e9491f28b7d83c8b0fbbc45d

Re: [PATCH, ARM 3/7, ping1] Fix indentation of FL_FOR_ARCH* definition after adding support for ARMv8-M

2016-05-18 Thread Kyrill Tkachov
Hi Thomas, On 17/05/16 11:10, Thomas Preudhomme wrote: Ping? *** gcc/ChangeLog *** 2015-11-06 Thomas Preud'homme * config/arm/arm-protos.h: Reindent FL_FOR_* macro definitions. diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index 63235cb63acf3e676fac5b61e

[PATCH Obvious/r236200]Check invariant expression pointer, not pointer to the pointer

2016-05-18 Thread Bin Cheng
Hi, Revision 236200 checks wrong pointer for invariant expression, which accidentally clears all depends_on information. This causes wrong cost and bad code generation, for example, gcc.target/arm/pr42505.c on thumb1 targets. This patch fixes the issue. Test result checked for gcc.target/arm/p

[PATCH] Fix LIM PHI movement cost

2016-05-18 Thread Richard Biener
The PHI movement penalty is bogously biased by adding the cost of moving the condition - but the condition is computed unconditionally and thus its cost should be added to the PHI cost. Bootstrapped on x86_64-unknown-linux-gnu, testing in progress. This patch is required to avoid regressing with

Re: [PATCH, ARM 4/7, ping1] Factor out MOVW/MOVT availability and desirability checks

2016-05-18 Thread Kyrill Tkachov
Hi Thomas, On 17/05/16 11:11, Thomas Preudhomme wrote: Ping? *** gcc/ChangeLog *** 2015-11-09 Thomas Preud'homme * config/arm/arm.h (TARGET_USE_MOVT): Check MOVT/MOVW availability with TARGET_HAVE_MOVT. (TARGET_HAVE_MOVT): Define. * config/arm/arm.c (con

[PATCH] Help PR70729, shuffle LIM and PRE

2016-05-18 Thread Richard Biener
The following patch moves LIM before PRE to allow it to cleanup CSE (and copyprop) opportunities LIM exposes. It also moves the DCE done in loop before the loop pipeline as otherwise it is no longer executed uncoditionally at this point (since we have the no_loop pipeline). The patch requires so

Re: [PATCH 16/17][ARM] Add tests for VFP FP16 ACLE instrinsics.

2016-05-18 Thread Matthew Wahab
On 18/05/16 02:06, Joseph Myers wrote: On Tue, 17 May 2016, Matthew Wahab wrote: In some tests, there are unavoidable differences in precision when calculating the actual and the expected results of an FP16 operation. A new support function CHECK_FP_BIAS is used so that these tests can check fo

[PATCH] Improve TBAA with unions

2016-05-18 Thread Richard Biener
The following adjusts get_alias_set beahvior when applied to union accesses to use the union alias-set rather than alias-set zero. This is in line with behavior from the alias oracle which (bogously) circumvents alias-set zero with looking at the alias-sets of the base object. Thus for union U

[PATCH] Bump LTO bytecode major

2016-05-18 Thread Richard Biener
Committed. Richard. 2016-05-18 Richard Biener * lto-streamer.h (LTO_major_version): Bump to 6. Index: gcc/lto-streamer.h === --- gcc/lto-streamer.h (revision 236373) +++ gcc/lto-streamer.h (working copy) @@ -128,7 +12

Re: PR 71020: Handle abnormal PHIs in tree-call-cdce.c

2016-05-18 Thread Richard Biener
On Wed, May 18, 2016 at 11:10 AM, Richard Sandiford wrote: > The PR is about a case where tree-call-cdce.c causes two abnormal > PHIs for the same variable to be live at the same time, leading to > a coalescing failure. It seemed like getting rid of these kinds of > input would be generally usefu

Re: [PATCH] Fix PR fortran/70856

2016-05-18 Thread Richard Biener
On Wed, May 18, 2016 at 12:30 PM, Martin Liška wrote: > Hello. > > Following patch add support for IPA ICF, where we miss support for > a proper DECL_PT_UID update in situations where we merge variables. > > Patch can bootstrap and no new regression is introduced for x86_64-linux-gnu. > > Ready fo

Re: [RFC][PATCH][PR40921] Convert x + (-y * z * z) into x - y * z * z

2016-05-18 Thread Richard Biener
On Wed, May 18, 2016 at 10:38 AM, Kugan Vivekanandarajah wrote: Please move the whole thing under the else { } case of the ops.length == 0, ops.length == 1 test chain as you did for the actual emit of the negate. >>> >>> I see your point. However, when we remove the (-1) from t

Re: [PATCH, ARM 5/7, ping1] Add support for MOVT/MOVW to ARMv8-M Baseline

2016-05-18 Thread Kyrill Tkachov
Hi Thomas, This looks mostly good with a few nits inline. Please repost with the comments addressed. Thanks, Kyrill On 17/05/16 11:13, Thomas Preudhomme wrote: Ping? *** gcc/ChangeLog *** 2015-11-13 Thomas Preud'homme * config/arm/arm.h (TARGET_HAVE_MOVT): Include ARMv8-M as hav

Re: [RFC][PATCH][PR40921] Convert x + (-y * z * z) into x - y * z * z

2016-05-18 Thread Kugan
Hi Martin, > > I see various ICE after your commit r236356: > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71170 Sorry for the breakage. Looking into it. Thanks, Kugan

Re: [PATCH] Fix PR71132

2016-05-18 Thread H.J. Lu
On Wed, May 18, 2016 at 12:50 AM, Richard Biener wrote: > On Tue, 17 May 2016, H.J. Lu wrote: > >> On Tue, May 17, 2016 at 5:51 AM, Richard Biener wrote: >> > >> > The following fixes a latent issue in loop distribution catched by >> > the fake edge placement adjustment. >> > >> > Bootstrapped an

Re: libgomp: In OpenACC testing, cycle though $offload_targets, and by default only build for the offload target that we're actually going to test

2016-05-18 Thread Thomas Schwinge
Hi! Ping. On Wed, 11 May 2016 15:45:13 +0200, I wrote: > Ping. > > On Mon, 02 May 2016 11:54:27 +0200, I wrote: > > On Fri, 29 Apr 2016 09:43:41 +0200, Jakub Jelinek wrote: > > > On Thu, Apr 28, 2016 at 12:43:43PM +0200, Thomas Schwinge wrote: > > > > commit 3b521f3e35fdb4b320e95b5f6a82b8d89399

Re: Splitting up gcc/omp-low.c?

2016-05-18 Thread Thomas Schwinge
Hi! Ping. On Wed, 11 May 2016 15:44:14 +0200, I wrote: > Ping. > > On Tue, 03 May 2016 11:34:39 +0200, I wrote: > > On Wed, 13 Apr 2016 18:01:09 +0200, I wrote: > > > On Fri, 08 Apr 2016 11:36:03 +0200, I wrote: > > > > On Thu, 10 Dec 2015 09:08:35 +0100, Jakub Jelinek > > > > wrote: > > > > >

Re: [PATCH] Fix PR71132

2016-05-18 Thread Richard Biener
On Wed, 18 May 2016, H.J. Lu wrote: > On Wed, May 18, 2016 at 12:50 AM, Richard Biener wrote: > > On Tue, 17 May 2016, H.J. Lu wrote: > > > >> On Tue, May 17, 2016 at 5:51 AM, Richard Biener wrote: > >> > > >> > The following fixes a latent issue in loop distribution catched by > >> > the fake e

Re: [committed] Cherry-pick upstream asan fix for upcoming glibc (PR sanitizer/71160)

2016-05-18 Thread Florian Weimer
On 05/17/2016 04:46 PM, Jakub Jelinek wrote: On Tue, May 17, 2016 at 05:38:27PM +0300, Maxim Ostapenko wrote: Hi Jakub, thanks for backporting this! Do you have any plans to apply this patch to GCC 5 and 6 branches? AFAIK people hit on this ASan + newer Glibc bug by using GCC 5.3.1 on Fedora 23

Re: [PATCH #2] Add PowerPC ISA 3.0 word splat and byte immediate splat support

2016-05-18 Thread Segher Boessenkool
On Tue, May 17, 2016 at 07:08:52PM -0400, Michael Meissner wrote: > FWIW, the problem after subversion id 236136 shows up when the trunk compiler > is built with the host compiler (4.3.4). That compiler is almost seven years old. It would be interesting to find out what the oldest compiler that *

Re: [PATCH] Fix PR fortran/70856

2016-05-18 Thread Martin Liška
On 05/18/2016 01:24 PM, Richard Biener wrote: > Ok. > > Richard. Thanks, I'll install the same patch to GCC 6 branch after finishing of tests, ok? Martin

[PATCH, libbacktrace]: Fix PR 71161, Lots of ASAN and libgo runtime FAILs on 32bit x86 targets

2016-05-18 Thread Uros Bizjak
Hello! The issue here is a misaligned stack with some old(er) 32bit x86 glibcs, where dl_iterate_phdr callback gets called with misaligned stack. Attached patch makes phdr_callback in libbacktrace resistant to this ABI violation. 2016-05-18 Uros Bizjak * elf.c (phdr_callback) [__i386__]:

Re: [PATCH] Fix PR fortran/70856

2016-05-18 Thread Richard Biener
On Wed, May 18, 2016 at 2:03 PM, Martin Liška wrote: > On 05/18/2016 01:24 PM, Richard Biener wrote: >> Ok. >> >> Richard. > > Thanks, I'll install the same patch to GCC 6 branch after > finishing of tests, ok? Ok. Richard. > Martin

Re: [PATCH #2] Add PowerPC ISA 3.0 word splat and byte immediate splat support

2016-05-18 Thread Segher Boessenkool
On Tue, May 17, 2016 at 06:45:49PM -0400, Michael Meissner wrote: > As I mentioned in the last message, my previous patch had some problems that > showed up on big endian systems, using RELOAD (one of the tests that failed > was > the vshuf-v32qi.c test in the testsuite). Little endian and IRA di

Re: [PATCH] Optimize strchr (s, 0) to strlen

2016-05-18 Thread Wilco Dijkstra
Richard Biener wrote: > > Yeah ;) I'm currently bootstrapping/testing the patch that makes it possible > to > write all this in match.pd. So what was the conclusion? Improving match.pd to be able to handle more cases like this seems like a nice thing. Wilco

Re: inhibit the sincos optimization when the target has sin and cos instructions

2016-05-18 Thread Nathan Sidwell
On 05/17/16 17:30, Cesar Philippidis wrote: On 05/17/2016 02:22 PM, Andrew Pinski wrote: Good eyes, thanks! I thought I had to create a new insn, but I got away with an expand. I attached the updated patch. Cesar gcc.sum Tests that now fail, but worked before: nvptx-none-run: gcc.c-tortur

Re: [PATCH, libbacktrace]: Fix PR 71161, Lots of ASAN and libgo runtime FAILs on 32bit x86 targets

2016-05-18 Thread Ian Lance Taylor
Uros Bizjak writes: > 2016-05-18 Uros Bizjak > > * elf.c (phdr_callback) [__i386__]: Add > __attribute__((__force_align_arg_pointer__)). This is OK. Thanks. Ian

Re: [testuite,AArch64] Make scan for 'br' more robust

2016-05-18 Thread Christophe Lyon
On 13 May 2016 at 15:51, James Greenhalgh wrote: > On Wed, May 04, 2016 at 11:55:42AM +0200, Christophe Lyon wrote: >> On 4 May 2016 at 10:43, Kyrill Tkachov wrote: >> > >> > Hi Christophe, >> > >> > >> > On 02/05/16 12:50, Christophe Lyon wrote: >> >> >> >> Hi, >> >> >> >> I've noticed a "regres

GCC 5.4 Status report (2016-05-18)

2016-05-18 Thread Richard Biener
Status == The GCC 5 branch is currently open for regression and documentation fixes. I plan to do a release candidate of GCC 5.4 at the end of next week followed by a release at the beginning of June. This is a good time to look through your assigned bugs looking for patches you might want

Re: [PATCH] Improve TBAA with unions

2016-05-18 Thread Eric Botcazou
> We have a good place in the middle-end to apply such rules which > is component_uses_parent_alias_set_from - this is where I move > the logic that is duplicated in various frontends. > > The Java and Ada frontends do not allow union type punning (LTO does), > so this patch may eventually pessimi

Re: [AArch64, 2/4] Extend vector mutiply by element to all supported modes

2016-05-18 Thread Jiong Wang
On 18/05/16 09:17, Christophe Lyon wrote: On 17 May 2016 at 14:27, James Greenhalgh wrote: On Mon, May 16, 2016 at 10:09:31AM +0100, Jiong Wang wrote: AArch64 support vector multiply by element for V2DF, V2SF, V4SF, V2SI, V4SI, V4HI, V8HI. All above are well supported by "*aarch64_mul3_elt"

Re: [PATCH] Optimize strchr (s, 0) to strlen

2016-05-18 Thread Richard Biener
On Wed, May 18, 2016 at 2:29 PM, Wilco Dijkstra wrote: > Richard Biener wrote: >> >> Yeah ;) I'm currently bootstrapping/testing the patch that makes it >> possible to >> write all this in match.pd. > > So what was the conclusion? Improving match.pd to be able to handle more cases > like this se

Re: [PATCH 8/17][ARM] Add VFP FP16 arithmetic instructions.

2016-05-18 Thread Matthew Wahab
On 18/05/16 01:51, Joseph Myers wrote: On Tue, 17 May 2016, Matthew Wahab wrote: In most cases the instructions are added using non-standard pattern names. This is to force operations on __fp16 values to be done, by conversion, using the single-precision instructions. The exceptions are the pre

Re: [PATCH, ARM 3/7, ping1] Fix indentation of FL_FOR_ARCH* definition after adding support for ARMv8-M

2016-05-18 Thread Thomas Preudhomme
On Wednesday 18 May 2016 11:30:43 Kyrill Tkachov wrote: > Hi Thomas, > > On 17/05/16 11:10, Thomas Preudhomme wrote: > > Ping? > > > > *** gcc/ChangeLog *** > > > > 2015-11-06 Thomas Preud'homme > > > > * config/arm/arm-protos.h: Reindent FL_FOR_* macro definitions. > > > > diff --

Re: [PATCH, ARM 3/7, ping1] Fix indentation of FL_FOR_ARCH* definition after adding support for ARMv8-M

2016-05-18 Thread Kyrill Tkachov
On 18/05/16 14:45, Thomas Preudhomme wrote: On Wednesday 18 May 2016 11:30:43 Kyrill Tkachov wrote: Hi Thomas, On 17/05/16 11:10, Thomas Preudhomme wrote: Ping? *** gcc/ChangeLog *** 2015-11-06 Thomas Preud'homme * config/arm/arm-protos.h: Reindent FL_FOR_* macro definitions.

Re: [C++ Patch] PR 70466 ("ICE on invalid code in tree check: expected constructor, have parm_decl in convert_like_real...")

2016-05-18 Thread Jason Merrill
On 05/17/2016 05:57 PM, Paolo Carlini wrote: On 17/05/2016 20:15, Jason Merrill wrote: On 05/17/2016 04:47 AM, Paolo Carlini wrote: ... alternately, if the substance of my patchlet is right, we could simplify a bit the logic per the below. Here's a well-formed variant that was accepted by 4.5

Re: [PATCH #2] Add PowerPC ISA 3.0 word splat and byte immediate splat support

2016-05-18 Thread Michael Meissner
On Wed, May 18, 2016 at 07:15:10AM -0500, Segher Boessenkool wrote: > On Tue, May 17, 2016 at 06:45:49PM -0400, Michael Meissner wrote: > > As I mentioned in the last message, my previous patch had some problems that > > showed up on big endian systems, using RELOAD (one of the tests that failed >

Re: [C++ Patch] PR 70466 ("ICE on invalid code in tree check: expected constructor, have parm_decl in convert_like_real...")

2016-05-18 Thread Paolo Carlini
Hi, On 18/05/2016 16:08, Jason Merrill wrote: On 05/17/2016 05:57 PM, Paolo Carlini wrote: On 17/05/2016 20:15, Jason Merrill wrote: On 05/17/2016 04:47 AM, Paolo Carlini wrote: ... alternately, if the substance of my patchlet is right, we could simplify a bit the logic per the below. Here'

Re: [Patch] PR rtl-optimization/71150, guard in_class_p check with REG_P

2016-05-18 Thread Vladimir Makarov
On 05/17/2016 06:02 AM, Jiong Wang wrote: This bug is introduced by my commit r236181 where the inner rtx of SUBREG haven't been checked while it should as "in_class_p" only works with REG, and SUBREG_REG is actually not always REG. If REG_P check failed, then we should fall back to normal code

Re: [C++ Patch] PR 70466 ("ICE on invalid code in tree check: expected constructor, have parm_decl in convert_like_real...")

2016-05-18 Thread Jason Merrill
On 05/18/2016 10:22 AM, Paolo Carlini wrote: Hi, On 18/05/2016 16:08, Jason Merrill wrote: On 05/17/2016 05:57 PM, Paolo Carlini wrote: On 17/05/2016 20:15, Jason Merrill wrote: On 05/17/2016 04:47 AM, Paolo Carlini wrote: ... alternately, if the substance of my patchlet is right, we could s

Re: [ARM] Enable __fp16 as a function parameter and return type.

2016-05-18 Thread Matthew Wahab
On 18/05/16 09:41, Ramana Radhakrishnan wrote: On Mon, May 16, 2016 at 2:16 PM, Tejas Belagod wrote: We do have plans to fix pre-ACLE behavior of fp16 to conform to current ACLE spec, but can't say when exactly. Matthew, could you please take a look at this while you are in this area ? Ok

Re: [RFC][PATCH][PR63586] Convert x+x+x+x into 4*x

2016-05-18 Thread H.J. Lu
On Wed, May 4, 2016 at 6:57 PM, kugan wrote: > Hi Richard, > >> >> maybe instert_stmt_after will help here, I don't think you got the >> insertion >> logic correct, thus insert_stmt_after (mul_stmt, def_stmt) which I think >> misses GIMPLE_NOP handling. At least >> >> + if (SSA_NAME_VAR (op)

Re: [ARM] Enable __fp16 as a function parameter and return type.

2016-05-18 Thread Ramana Radhakrishnan
On 18/05/16 15:33, Matthew Wahab wrote: > On 18/05/16 09:41, Ramana Radhakrishnan wrote: >> On Mon, May 16, 2016 at 2:16 PM, Tejas Belagod >> wrote: >> >>> >>> We do have plans to fix pre-ACLE behavior of fp16 to conform to current ACLE >>> spec, but can't say when exactly. >> >> Matthew, could yo

Re: [C++ Patch] PR 69793 ("ICE on invalid code in "cp_lexer_peek_nth_token"")

2016-05-18 Thread Jason Merrill
On 05/17/2016 04:47 PM, Paolo Carlini wrote: this ICE during error recovery exposes a rather more general weakness: we should never call cp_lexer_peek_nth_token (*, 2) when a previous cp_lexer_peek_token returns CPP_EOF. Hmm, that seems fragile, I would expect it to keep returning EOF. But you

Re: [C++ Patch] PR 69793 ("ICE on invalid code in "cp_lexer_peek_nth_token"")

2016-05-18 Thread Paolo Carlini
Hi, On 18/05/2016 16:39, Jason Merrill wrote: On 05/17/2016 04:47 PM, Paolo Carlini wrote: this ICE during error recovery exposes a rather more general weakness: we should never call cp_lexer_peek_nth_token (*, 2) when a previous cp_lexer_peek_token returns CPP_EOF. Hmm, that seems fragile, I

Re: [PATCH PR69848/partial]Propagate comparison into VEC_COND_EXPR if target supports

2016-05-18 Thread Bin.Cheng
On Tue, May 17, 2016 at 12:08 PM, Richard Biener wrote: > On Mon, May 16, 2016 at 10:09 AM, Bin.Cheng wrote: >> On Fri, May 13, 2016 at 5:53 PM, Richard Biener >> wrote: >>> On May 13, 2016 6:02:27 PM GMT+02:00, Bin Cheng wrote: Hi, As PR69848 reported, GCC vectorizer now generates comp

Re: [C++ Patch] PR 69793 ("ICE on invalid code in "cp_lexer_peek_nth_token"")

2016-05-18 Thread Jason Merrill
On 05/18/2016 11:05 AM, Paolo Carlini wrote: On 18/05/2016 16:39, Jason Merrill wrote: On 05/17/2016 04:47 PM, Paolo Carlini wrote: this ICE during error recovery exposes a rather more general weakness: we should never call cp_lexer_peek_nth_token (*, 2) when a previous cp_lexer_peek_token retu

Re: [PATCH 8/17][ARM] Add VFP FP16 arithmetic instructions.

2016-05-18 Thread Joseph Myers
On Wed, 18 May 2016, Matthew Wahab wrote: > AArch64 follows IEEE-754 but ARM (AArch32) adds restrictions like > flush-to-zero that could affect the outcome of a calculation. The result of a float computation on two values immediately promoted from fp16 cannot be within the subnormal range for fl

Re: [C++ Patch] PR 69793 ("ICE on invalid code in "cp_lexer_peek_nth_token"")

2016-05-18 Thread David Malcolm
On Wed, 2016-05-18 at 17:05 +0200, Paolo Carlini wrote: > Hi, > > On 18/05/2016 16:39, Jason Merrill wrote: > > On 05/17/2016 04:47 PM, Paolo Carlini wrote: > > > this ICE during error recovery exposes a rather more general > > > weakness: > > > we should never call cp_lexer_peek_nth_token (*, 2)

RE: [Patch V2] Fix SLP PR58135.

2016-05-18 Thread Kumar, Venkataramanan
Hi Richard, > -Original Message- > From: Richard Biener [mailto:richard.guent...@gmail.com] > Sent: Tuesday, May 17, 2016 5:40 PM > To: Kumar, Venkataramanan > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [Patch V2] Fix SLP PR58135. > > On Tue, May 17, 2016 at 1:56 PM, Kumar, Venkataramana

Re: [C++ Patch] PR 69793 ("ICE on invalid code in "cp_lexer_peek_nth_token"")

2016-05-18 Thread Paolo Carlini
Hi, On 18/05/2016 17:17, Jason Merrill wrote: On 05/18/2016 11:05 AM, Paolo Carlini wrote: On 18/05/2016 16:39, Jason Merrill wrote: On 05/17/2016 04:47 PM, Paolo Carlini wrote: this ICE during error recovery exposes a rather more general weakness: we should never call cp_lexer_peek_nth_token

[C++ Patch/RFC] PR 70572 ("[4.9/5/6/7 Regression] ICE on code with decltype (auto) on x86_64-linux-gnu in digest_init_r")

2016-05-18 Thread Paolo Carlini
Hi, this issue should be easy to fix. Broken code like: void foo () { decltype (auto) a = foo; } triggers the gcc_assert in digest_init_r: /* Come here only for aggregates: records, arrays, unions, complex numbers and vectors. */ gcc_assert (TREE_CODE (type) == ARRAY_TYPE

Re: [ARM] Enable __fp16 as a function parameter and return type.

2016-05-18 Thread Joseph Myers
On Wed, 18 May 2016, Matthew Wahab wrote: > On 18/05/16 09:41, Ramana Radhakrishnan wrote: > > On Mon, May 16, 2016 at 2:16 PM, Tejas Belagod > > wrote: > > > > > > > > We do have plans to fix pre-ACLE behavior of fp16 to conform to current > > > ACLE > > > spec, but can't say when exactly. > >

[PATCH, PR rtl-optimization/71148] Avoid cleanup_cfg called with invalidated dominance info

2016-05-18 Thread Ilya Enkovich
Hi, This patch resolves PR71148 by releasing dominance info before cleanup_cfg calls to avoid attempts to fixup invalid dominance info. Dominance info handling in cleanup_cfg looks weird though. It tries to fix it but can invalidate it at the same time (PR71084). We should probably do something

Re: [PATCH 1/4] BRIG (HSAIL) frontend: configuration file changes and misc

2016-05-18 Thread Pekka Jääskeläinen
Hi, Attached an updated patch (rebased + added .texi docs). On Mon, May 16, 2016 at 8:25 PM, Pekka Jääskeläinen wrote: > The configuration file changes and misc. updates required > by the BRIG frontend. > > Also, added include/hsa-interface.h which is hsa.h taken from libgomp > and will be share

Re: [PATCH 2/4] BRIG (HSAIL) frontend: The FE itself.

2016-05-18 Thread Pekka Jääskeläinen
Hi Joseph, Thanks for the comments. Updated&rebased patch attached. Hopefully I didn't miss any diags. On Wed, May 18, 2016 at 3:20 AM, Joseph Myers wrote: > This patch has many improperly formatted diagnostic messages (e.g. > starting with capital letters, ending with '.' or failing to use %q

Re: [PATCH 0/4] BRIG (HSAIL) frontend

2016-05-18 Thread Pekka Jääskeläinen
Hi Joseph, Updated diffstat below: Makefile.def | 3 + Makefile.in | 489 + configure | 1 + configure.ac | 1 + gcc/brig/Make-lang

Re: [PATCH #2] Add PowerPC ISA 3.0 word splat and byte immediate splat support

2016-05-18 Thread Michael Meissner
On Wed, May 18, 2016 at 06:53:51AM -0500, Segher Boessenkool wrote: > On Tue, May 17, 2016 at 07:08:52PM -0400, Michael Meissner wrote: > > FWIW, the problem after subversion id 236136 shows up when the trunk > > compiler > > is built with the host compiler (4.3.4). > > That compiler is almost se

Re: [PATCH 2/3] function: Factor out make_*logue_seq

2016-05-18 Thread H.J. Lu
On Mon, May 16, 2016 at 6:09 PM, Segher Boessenkool wrote: > Make new functions make_split_prologue_seq, make_prologue_seq, and > make_epilogue_seq. > > Tested as in the previous patch; is this okay for trunk? > > > Segher > > > 2016-05-16 Segher Boessenkool > > * function.c (make_split

[PATCH][PR sanitizer/64354] Define __SANITIZE_THREAD__ and __SANITIZE_UNDEFINED__ macros if corresponding switches are enabled.

2016-05-18 Thread Maxim Ostapenko
Hi, when compiling with -fsanitize=address we define __SANITIZE_ADDRESS__ macros, but we don't do this for -fsanitize=thread and -fsanitize=undefined. Perhaps we should be more symmetric here and define corresponding __SANITIZE_THREAD__ and __SANITIZE_UNDEFINED__ macros respectively? I adde

Re: [PATCH][PR sanitizer/64354] Define __SANITIZE_THREAD__ and __SANITIZE_UNDEFINED__ macros if corresponding switches are enabled.

2016-05-18 Thread Jakub Jelinek
On Wed, May 18, 2016 at 08:33:53PM +0300, Maxim Ostapenko wrote: > when compiling with -fsanitize=address we define __SANITIZE_ADDRESS__ > macros, but we don't do this for -fsanitize=thread and -fsanitize=undefined. > Perhaps we should be more symmetric here and define corresponding > __SANITIZE_TH

Re: [PATCH][PR sanitizer/64354] Define __SANITIZE_THREAD__ and __SANITIZE_UNDEFINED__ macros if corresponding switches are enabled.

2016-05-18 Thread Yuri Gribov
On Wed, May 18, 2016 at 8:36 PM, Jakub Jelinek wrote: > On Wed, May 18, 2016 at 08:33:53PM +0300, Maxim Ostapenko wrote: >> when compiling with -fsanitize=address we define __SANITIZE_ADDRESS__ >> macros, but we don't do this for -fsanitize=thread and -fsanitize=undefined. >> Perhaps we should be

Re: [PATCH][PR sanitizer/64354] Define __SANITIZE_THREAD__ and __SANITIZE_UNDEFINED__ macros if corresponding switches are enabled.

2016-05-18 Thread Yuri Gribov
On Wed, May 18, 2016 at 8:33 PM, Maxim Ostapenko wrote: > Hi, > > when compiling with -fsanitize=address we define __SANITIZE_ADDRESS__ > macros, but we don't do this for -fsanitize=thread and -fsanitize=undefined. > Perhaps we should be more symmetric here and define corresponding > __SANITIZE_TH

Re: New C++ PATCH for c++/10200 et al

2016-05-18 Thread Jason Merrill
On 05/13/2016 03:17 PM, Jason Merrill wrote: On 02/16/2016 07:49 PM, Jason Merrill wrote: Clearly the DR 141 change is requiring much larger adjustments in the rest of the compiler than I'm comfortable making at this point in the GCC 6 schedule, so I'm backing out my earlier changes for 10200 an

Re: [PATCH][PR sanitizer/64354] Define __SANITIZE_THREAD__ and __SANITIZE_UNDEFINED__ macros if corresponding switches are enabled.

2016-05-18 Thread Maxim Ostapenko
On 18/05/16 20:39, Yuri Gribov wrote: On Wed, May 18, 2016 at 8:33 PM, Maxim Ostapenko wrote: Hi, when compiling with -fsanitize=address we define __SANITIZE_ADDRESS__ macros, but we don't do this for -fsanitize=thread and -fsanitize=undefined. Perhaps we should be more symmetric here and defi

Re: [PATCH] Fix PR71104 - call gimplification

2016-05-18 Thread Jeff Law
On 05/17/2016 06:28 AM, Richard Biener wrote: The following patch addresses PR71104 which shows verify-SSA ICEs after gimplify-into-SSA. The issue is that for returns-twice calls we gimplify register uses in the LHS before the actual call which leads to p.0_1 = p; _2 = vfork (); *p.0_1 =

Re: [PATCH 2/3] function: Factor out make_*logue_seq

2016-05-18 Thread Segher Boessenkool
On Wed, May 18, 2016 at 10:17:32AM -0700, H.J. Lu wrote: > On Mon, May 16, 2016 at 6:09 PM, Segher Boessenkool > wrote: > > Make new functions make_split_prologue_seq, make_prologue_seq, and > > make_epilogue_seq. > > > > Tested as in the previous patch; is this okay for trunk? > > > > > > Segher

[PING**2] [PATCH] Make C++ honor the enum mode attribute

2016-05-18 Thread Bernd Edlinger
Ping... On 07.05.2016 11:54 Bernd Edlinger wrote: > Ping.. > > For this patch: https://gcc.gnu.org/ml/gcc-patches/2016-04/msg02069.html > > Thanks > Bernd. >

Re: [PATCH 2/3] function: Factor out make_*logue_seq

2016-05-18 Thread H.J. Lu
On Wed, May 18, 2016 at 11:11 AM, Segher Boessenkool wrote: > On Wed, May 18, 2016 at 10:17:32AM -0700, H.J. Lu wrote: >> On Mon, May 16, 2016 at 6:09 PM, Segher Boessenkool >> wrote: >> > Make new functions make_split_prologue_seq, make_prologue_seq, and >> > make_epilogue_seq. >> > >> > Tested

Re: [PATCH 2/3] function: Factor out make_*logue_seq

2016-05-18 Thread H.J. Lu
On Wed, May 18, 2016 at 11:20 AM, H.J. Lu wrote: > On Wed, May 18, 2016 at 11:11 AM, Segher Boessenkool > wrote: >> On Wed, May 18, 2016 at 10:17:32AM -0700, H.J. Lu wrote: >>> On Mon, May 16, 2016 at 6:09 PM, Segher Boessenkool >>> wrote: >>> > Make new functions make_split_prologue_seq, make_p

[patch, fortran] PR66461 ICE on missing end program in fixed source

2016-05-18 Thread Jerry DeLisle
Hi all, The following patch regression tested on x86-64. The ICE is from an attempt to free a bad expression after a MATCH_ERROR is returned. I have not been able to identify an exact cause, there being numerous matchers involved attempting to match the logical expression. Regardless, it is an e

[PATCH], Add support for PowerPC ISA 3.0 VNEGD/VNEGW instructions

2016-05-18 Thread Michael Meissner
Unlike some of my patches, this is a fairly simple patch to add support for the VNEGW and VNEGD instructions that were added in ISA 3.0. Note, ISA 3.0 does not provide negation for V16QImode/V8HImode, just V4SImode/V2DImode. I discovered that when we added ISA 2.07 support for V2DImode, we didn't

Re: [PATCH 2/3] function: Factor out make_*logue_seq

2016-05-18 Thread Segher Boessenkool
On Wed, May 18, 2016 at 11:20:29AM -0700, H.J. Lu wrote: > >> > * function.c (make_split_prologue_seq, make_prologue_seq, > >> > make_epilogue_seq): New functions, factored out from... > >> > (thread_prologue_and_epilogue_insns): Here. > >> > >> It breaks x86: > > > > Are yo

Re: [PATCH 2/4] BRIG (HSAIL) frontend: The FE itself.

2016-05-18 Thread David Malcolm
On Wed, 2016-05-18 at 19:59 +0300, Pekka Jääskeläinen wrote: > Hi Joseph, > > Thanks for the comments. Updated&rebased patch attached. Hopefully I > didn't miss any diags. It looks like the attachment doesn't contain the patch; on unzipping I just see a 27 byte file reading "The BRIG frontend it

[PATCH, alpha]: Fix PR 71145: Error: No lda !gpdisp!278 was found

2016-05-18 Thread Uros Bizjak
Hello! Alpha assembler requires that matching "lda $29,0($29) !gpdisp!NNN" always follow "ldah $29,0($26)!gpdisp!NNN". However, when the compiler inserts trap insn, it (correctly) figures out that $29 is unused, and removes "lda" from insn stream. Since ldah is defined as unspec_volatile,

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