I noticed a couple of typos and whitespace issues in profile-count.h.
I've committed the following patch to fix them.
gcc/ChangeLog:
2017-06-30 Andreas Krebbel
* profile-count.h (enum profile_quality): Fix typos and whitespace
issues.
---
gcc/profile-count.h | 46
This fixes the bootstrap failure triggered by the recent changes wrt
branch probabilities aka emit_cmp_and_jump_insns does not accept
integers as branch probability anymore.
Regressiontested on s390x.
gcc/ChangeLog:
2017-06-30 Andreas Krebbel
* config/s390/s390.c (s390_expand_setmem)
Hello!
> This patch to the gotools Makefile adds tests to `make check`. We now
> test the runtime package using the newly built go tool, and test that
> cgo works by running the misc/cgo/test and misc/cgo/testcarchive
> tests. Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu.
> Committed
Hi,
Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.
https://gcc.gnu.org/ml/gcc-patches/2017-04/msg01334.html
Thanks,
Naveen
On 29/06/17 18:05, David Miller wrote:
From: Daniel Cederman
Date: Thu, 29 Jun 2017 17:15:43 +0200
I'm not thrilled with this, it's undocumented, the other workaround
don't have
it and I don't think that we really need it.
The B2BST errata workaround requires more changes to assembler
routin
On 6/29/17 8:58 AM, Richard Biener wrote:
> On Thu, 29 Jun 2017, Peter Bergner wrote:
>
>> On 6/29/17 4:03 AM, Richard Biener wrote:
>>>
>>> This refactors things a bit to make CFG cleanup handle switches with
>>> just a default label. If we make sure to cleanup the CFG after
>>> group_case_label
On 06/29/2017 04:34 PM, Jan Hubicka wrote:
The warning in the original code could have been suppressed (by
casting the pointer to char*), but it was valid so I opted not
to. I'd expect it to be possible to work around the bug but
I don't have easy access to GCC 4.2 to reproduce it or verify
the
On Thu, Jun 29, 2017 at 05:23:37PM -0600, Jeff Law wrote:
> On 06/29/2017 09:51 AM, coypu wrote:
> > I was thinking of holding a party for the upcoming one year anniversary
> > of pinging this patch, that was committed to NetBSD's copy of GCC about
> > a decade ago. without it, I can't compile simp
On 06/26/2017 09:26 AM, Jakub Jelinek wrote:
> On Mon, Jun 26, 2017 at 09:22:31AM -0600, Jeff Law wrote:
> From d255827a64012fb81937d6baa8534eabecf9b735 Mon Sep 17 00:00:00 2001
> From: Sylvestre Ledru
> Date: Sun, 14 May 2017 11:37:37 +0200
> Subject: [PATCH 5/5] 2017-05-14 Sylve
On 06/29/2017 09:51 AM, coypu wrote:
> I was thinking of holding a party for the upcoming one year anniversary
> of pinging this patch, that was committed to NetBSD's copy of GCC about
> a decade ago. without it, I can't compile simple programs.
When it was committed to NetBSD isn't at all relevant
On Thu, 29 Jun 2017, Jeff Law wrote:
> On 05/23/2017 07:54 AM, Prathamesh Kulkarni wrote:
> > Hi,
> > I would like to ping this patch for review:
> > https://gcc.gnu.org/ml/gcc-patches/2017-05/msg00775.html
> So was there any kind of resolution on the case in libcomp where we had
> an assignment b
On 05/24/2017 08:54 AM, Richard Sandiford wrote:
> Jeff Law writes:
>> On 11/16/2016 09:32 AM, Richard Sandiford wrote:
>>> Later patches will make machmode.h rely on wide-int.h and the
>>> new poly-int.h, so it needs to appear later in the coretypes.h
>>> include list.
>>>
>>> Previously machmode
Hi,
this patch makes cross compiler for all three targets to build again.
Comitted as obvious.
* arm/arm-builtins.c: Include profile-count.h
* except.c (sjlj_emit_function_enter): Use
profile_probability::unlikely.
Index: config/arm/arm-builtins.c
==
>
> The warning in the original code could have been suppressed (by
> casting the pointer to char*), but it was valid so I opted not
> to. I'd expect it to be possible to work around the bug but
> I don't have easy access to GCC 4.2 to reproduce it or verify
> the fix.
>
> FWIW, after looking at
On Thu, Jun 29, 2017 at 11:24 PM, Jan Hubicka wrote:
>> On Thu, Jun 29, 2017 at 11:19 PM, Jan Hubicka wrote:
>> >> After this commit (r249800), GCC builds fail for arm and aarch64:
>> >>
>> >> /gccsrc/gcc/except.c: In function ???void
>> >> sjlj_emit_function_enter(rtx_code_label*)???:
>> >> /gcc
> On Thu, Jun 29, 2017 at 11:19 PM, Jan Hubicka wrote:
> >> After this commit (r249800), GCC builds fail for arm and aarch64:
> >>
> >> /gccsrc/gcc/except.c: In function ???void
> >> sjlj_emit_function_enter(rtx_code_label*)???:
> >> /gcc-fsf/gccsrc/gcc/except.c:1183: error: conversion from ???int
On Thu, Jun 29, 2017 at 11:19 PM, Jan Hubicka wrote:
>> After this commit (r249800), GCC builds fail for arm and aarch64:
>>
>> /gccsrc/gcc/except.c: In function ???void
>> sjlj_emit_function_enter(rtx_code_label*)???:
>> /gcc-fsf/gccsrc/gcc/except.c:1183: error: conversion from ???int??? to
>> no
> After this commit (r249800), GCC builds fail for arm and aarch64:
>
> /gccsrc/gcc/except.c: In function ???void
> sjlj_emit_function_enter(rtx_code_label*)???:
> /gcc-fsf/gccsrc/gcc/except.c:1183: error: conversion from ???int??? to
> non-scalar type ???profile_probability??? requested
> make[2]
On 05/23/2017 07:54 AM, Prathamesh Kulkarni wrote:
> Hi,
> I would like to ping this patch for review:
> https://gcc.gnu.org/ml/gcc-patches/2017-05/msg00775.html
So was there any kind of resolution on the case in libcomp where we had
an assignment between two essentially equivalent, but distinct en
On Wed, Jun 28, 2017 at 5:11 PM, Marc Glisse wrote:
> On Wed, 28 Jun 2017, Jason Merrill wrote:
>
>> In the testcase we SEGV due to infinite recursion because the
>> noexcept-specifier of f depends on itself. Fixed by keeping track of
>> which functions we're currently trying to instantiate noexc
OK.
On Wed, Jun 28, 2017 at 7:13 PM, David Malcolm wrote:
> On Wed, 2017-03-15 at 16:35 -0400, Jason Merrill wrote:
>> On Tue, Mar 14, 2017 at 9:05 PM, David Malcolm
>> wrote:
>> > OK for trunk now, or should this wait until stage 1?
>>
>> Stage 1.
>>
>> > + cp_token *close_paren = cp_pars
OK.
On Fri, May 19, 2017 at 12:13 PM, Paolo Carlini
wrote:
> Hi,
>
> while looking into some bugs (eg, c++/71464) I noticed a few more of those
> consecutive errors, which I propose to adjust per the below patchlet. The
> second case in add_method is a bit tricky because in principle we'd really
On 06/29/2017 12:05 PM, Jeff Law wrote:
On 06/29/2017 11:57 AM, Jeff Law wrote:
On 05/23/2017 09:58 AM, Martin Sebor wrote:
On 05/18/2017 12:55 PM, Prathamesh Kulkarni wrote:
Hi,
The attached patch tries to fix PR80806 by warning when a variable is
set using memset (and friends) but not used.
The C++ front end hasn't generated WITH_CLEANUP_EXPR in a very long
time (20+ years?), so there's no need to handle it.
Tested x86_64-pc-linux-gnu, applying to trunk.
commit 8ce76bba3bf7866a2338125b4c55b0a1e3ce9221
Author: Jason Merrill
Date: Thu Jun 29 15:56:20 2017 -0400
* conste
On Thu, Jun 29, 2017 at 10:43 AM, Nathan Sidwell wrote:
> [*] perhaps `&"~"[!twiddle]' is too cute a trick?
It's very localized, so I think it's appropriately cute.
Jason
Falkor is an ARMV8-A part, but also includes the RDMA extension from ARMV8.1-A.
I'd like to enable support for the RDMA instructions when -mcpu=falkor is used,
and also make the RDMA intrisics available. To do that, I need to add rdma
as an architecture extension, and modify a few things to use it
The substitution we do in build_deduction_guide needs
processing_template_decl set, since it's only partial instantiation,
and also needs to be done on the template; substituting the
FUNCTION_DECL pattern doesn't properly adjust the template parameters
on the template, which we will use in building
On 28 Jun 2017, at 18:40, Jeff Law wrote:
>
> On 06/09/2017 07:57 AM, Simon Wright wrote:
>>2017-06-09 Simon Wright
>>
>>PR target/80556
>>* configure.ac (stage1_ldflags): For Darwin, include -lSystem.
>> (poststage1_ldflags): likewise.
>>* configure: re
On 06/29/2017 10:15 AM, Jan Hubicka wrote:
Hello,
diff --git a/gcc/hash-table.h b/gcc/hash-table.h
index 0f7e21a..443d16c 100644
--- a/gcc/hash-table.h
+++ b/gcc/hash-table.h
@@ -803,7 +803,10 @@ hash_table::empty_slow ()
m_size_prime_index = nindex;
}
else
-memset (entries, 0
Hi,
As described in the bug, tree-if-conv is calling update_stmt on an
old stmt which might have been removed from the IR already
(transforming of an assignment to a call in this case). This fixes
the problem by calling update_stmt on the new statement that fold_stmt
might have created.
OK? Bo
On 06/29/2017 09:47 AM, co...@sdf.org wrote:
> Ping.
>
> On Tue, Jun 20, 2017 at 08:05:42PM +, co...@sdf.org wrote:
>> VAX' FFS as variable-length bit field instruction uses a "base"
>> operand of type "vb" meaning "byte address".
>> "base" can be 32 bits (SI) and due to the definition of
>> f
Here, cp_tree_equal was assuming that the member operand of
COMPONENT_REF will be == if it is equivalent; that isn't accurate for
a reference to a member function. So let's remove the special case
and fall back on normal expression handling.
Tested x86_64-pc-linux-gnu, applying to trunk and 7.
co
I noticed that, when a variable-sized object declared on the stack turns out
to be of fixed size, the optimizer can replace the call to __builtin_alloca by
the declaration of fixed-size local array. Now, even if the alignment of the
object is explicitly preserved, the alignment of its type is n
On Sun, Jun 25, 2017 at 2:28 PM, Andrew Pinski wrote:
> On Sun, Jun 25, 2017 at 11:18 AM, Andrew Pinski wrote:
>> On Sun, Jun 25, 2017 at 1:28 AM, Marc Glisse wrote:
>>> +(for cmp (gt ge lt le)
>>> + outp (convert convert negate negate)
>>> + outn (negate negate convert convert)
>>> + /*
On Tue, 2017-06-27 at 16:45 -0600, Jeff Law wrote:
> > + /* If we have a boolean variable allow it and generate a compare
> > + to zero reg when expanding. */
> > + if (!g)
> > +return (TREE_CODE (TREE_TYPE (t)) == BOOLEAN_TYPE);
> Depending on how you use T, you might be better off che
This fixes 81247. There are two parts,
firstly it seems pointless to parse try and parse a namespace body when
there's a missing '{'. I changed the parser to immediately close the
new namespace and return in that case.
However, the bug is in my updated do_pushdecl handling. When the
incom
On 05/18/2017 12:55 PM, Prathamesh Kulkarni wrote:
> Hi,
> The attached patch tries to fix PR80806 by warning when a variable is
> set using memset (and friends) but not used. I chose to warn in dse
> pass since dse would detect if the variable passed as 1st argument is
> a dead store. Does this ap
On 06/29/2017 11:57 AM, Jeff Law wrote:
> On 05/23/2017 09:58 AM, Martin Sebor wrote:
>> On 05/18/2017 12:55 PM, Prathamesh Kulkarni wrote:
>>> Hi,
>>> The attached patch tries to fix PR80806 by warning when a variable is
>>> set using memset (and friends) but not used. I chose to warn in dse
>>> p
On 05/23/2017 09:58 AM, Martin Sebor wrote:
> On 05/18/2017 12:55 PM, Prathamesh Kulkarni wrote:
>> Hi,
>> The attached patch tries to fix PR80806 by warning when a variable is
>> set using memset (and friends) but not used. I chose to warn in dse
>> pass since dse would detect if the variable pass
On Thu, Jun 29, 2017 at 08:54:54AM -0700, Cesar Philippidis wrote:
> PR77765 exposed an ICE triggered in gfortran's acc routine parser by an
> uninitialized proc_name. That situation occurred because the function
> containing the acc routine directive has an error, so
> gfc_current_ns->proc_name wa
On 05/26/2017 07:34 AM, Sylvestre Ledru wrote:
> Hello,
>
> The attach patch (dup.diff) performs the following changes:
>
> * bid/bid2dpd_dpd2bid.c: Remove identical code for different
> branches (CID 1286836, 1286837, 1286838)
> Remove some useless } else { declaration as we ar
Ping*3
Richard Sandiford writes:
> Ping*2
>
> Richard Sandiford writes:
>> Ping for this Ada patch/question.
>>
>> Richard Sandiford writes:
>>> Richard Biener writes:
>> How does this look? Changes since v1:
>>
>> - Added access_fn_component_p to check for valid access function
>
In the combine dump file, at the start there is a list of the RTL cost
of every insn. The only thing listed about the insns is the UID though.
To make it more useful, this patch prints the insn itself as well (in
slim format).
Tested on powerpc64-linux {-m32,-m64}, committing to trunk
Segher
On 06/13/2017 02:09 AM, Martin Liška wrote:
> Hi.
>
> For a function that does not handle an expection (and calls
> BUILT_IN_UNWIND_RESUME),
> we need to emit call to BUILT_IN_ASAN_HANDLE_NO_RETURN. That will clean up
> stack
> which can possibly contain poisoned shadow memory that will not be c
Hi!
This patch fixes various issues with the vec_extract_lo_* patterns.
There are splitters for these, but only for some cases (no mask, and
in one case also not xmm32+ reg) that change those into just a copy or load
of the low part subreg, but if those can't be used, the vextract* insns
don't acc
On 29/06/17 16:12, Christophe Lyon wrote:
On 29 June 2017 at 16:37, Thomas Preudhomme
Why do you link armv8-r architecture definition to cortex-r4?
I understand, where did I do such a thing?
In patch #2 you have:
diff --git a/gcc/config/arm/arm-cpu-data.h b/gcc/config/arm/arm-cpu-data.h
On 06/29/2017 09:56 AM, Joseph Myers wrote:
On Wed, 28 Jun 2017, Martin Sebor wrote:
The more limited interfaces could, of course, be __typeof_noqual in some
form.
Actually, despite what I've been arguing, I agree. I've come
to realize that what makes me uneasy about it is its name: it
makes
Hello,
> diff --git a/gcc/hash-table.h b/gcc/hash-table.h
> index 0f7e21a..443d16c 100644
> --- a/gcc/hash-table.h
> +++ b/gcc/hash-table.h
> @@ -803,7 +803,10 @@ hash_table::empty_slow ()
>m_size_prime_index = nindex;
> }
>else
> -memset (entries, 0, size * sizeof (value_type)
From: Daniel Cederman
Date: Thu, 29 Jun 2017 17:15:43 +0200
>> I'm not thrilled with this, it's undocumented, the other workaround
>> don't have
>> it and I don't think that we really need it.
>
> The B2BST errata workaround requires more changes to assembler
> routines commonly used by operatin
On Thu, 29 Jun 2017, coypu wrote:
> I was thinking of holding a party for the upcoming one year anniversary
> of pinging this patch, that was committed to NetBSD's copy of GCC about
> a decade ago. without it, I can't compile simple programs.
I advise CC:ing the listed NetBSD maintainers (Jason T
This patch to the gotools Makefile adds tests to `make check`. We now
test the runtime package using the newly built go tool, and test that
cgo works by running the misc/cgo/test and misc/cgo/testcarchive
tests. Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu.
Committed to mainline.
Ian
On Wed, 28 Jun 2017, Martin Sebor wrote:
> > The more limited interfaces could, of course, be __typeof_noqual in some
> > form.
>
> Actually, despite what I've been arguing, I agree. I've come
> to realize that what makes me uneasy about it is its name: it
> makes it sound like a special purpose
PR77765 exposed an ICE triggered in gfortran's acc routine parser by an
uninitialized proc_name. That situation occurred because the function
containing the acc routine directive has an error, so
gfc_current_ns->proc_name was never set.
Although it could be argued that the acc routine parser shoul
I was thinking of holding a party for the upcoming one year anniversary
of pinging this patch, that was committed to NetBSD's copy of GCC about
a decade ago. without it, I can't compile simple programs.
---
gcc/config/netbsd.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/netbsd
On Wed, 2017-06-28 at 18:19 -0500, Segher Boessenkool wrote:
> On Wed, Jun 28, 2017 at 03:21:49PM -0500, Aaron Sawdey wrote:
> > -toc_relative_expr_p (const_rtx op, bool strict)
> > +toc_relative_expr_p (const_rtx op, bool strict, const_rtx
> > *tocrel_base_ret,
> > + const_rtx *tocr
Ping.
On Tue, Jun 20, 2017 at 08:05:42PM +, co...@sdf.org wrote:
> VAX' FFS as variable-length bit field instruction uses a "base"
> operand of type "vb" meaning "byte address".
> "base" can be 32 bits (SI) and due to the definition of
> ffssi2/__builtin_ffs() with the operand constraint "m",
On 28/06/17 08:28, Yvan Roux wrote:
> Hi Sandra,
>
> On 27 June 2017 at 18:05, Sandra Loosemore wrote:
>> On 06/27/2017 06:19 AM, Yvan Roux wrote:
>>
>>> diff --git a/gcc/config/aarch64/aarch64.opt
>>> b/gcc/config/aarch64/aarch64.opt
>>> index 942a7d5..0fd1bfa 100644
>>> --- a/gcc/config/aarch64
On 06/28/2017 01:28 AM, Yvan Roux wrote:
Hi Sandra,
[snip]
OK, here is the new patch with the comments addressed. I've spotted
that there is also some m / -mno options at least in the ARM section,
I'll make another patch to fix that.
This version looks fine. Thanks for taking care of this!
It's ill-formed to inherit a constructor from an indirect base, but we
were failing to catch that for virtual bases, whose binfos look like
direct bases.
Tested x86_64-pc-linux-gnu, applying to trunk.
commit b8d3d6f1932db56d61c522bcdcff5142b307e23c
Author: Jason Merrill
Date: Thu Jun 29 11:06:0
This patch fixes the misc/cgo/testcachive test to work with gccgo.
This test is not currently run, but it will be soon. Bootstrapped on
x86_64-pc-linux-gnu. Committed to mainline.
Ian
Index: gcc/go/gofrontend/MERGE
===
--- gcc/go/go
Hello Eric,
Thank you for reviewing the patch.
Let's forget -mfix-gr712rc for now, -mfix-ut700 is enough I think.
I think it would be confusing to use the -mfix-ut700 flag when compiling
for the GR712RC. Now when we are not using a generic name for the errata
workaround we should at least h
This libgo patch fixes the go tool when using
-buildmode={c-archive,c-shared,pie} with gccgo. The tests are
misc/cgo tests that are not currently run but will be
run soon. Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu.
Committed to mainline.
Ian
Index: gcc/go/gofrontend/MERGE
Please ignore this patch. I'll respin the patch on a more recent GCC.
Best regards,
Thomas
On 29/06/17 14:56, Thomas Preudhomme wrote:
Hi,
This patch adds support for the ARM Cortex-R52 processor rencently
announced.
[1] https://developer.arm.com/products/processors/cortex-r/cortex-r52
Chan
Please ignore this patch. I'll respin the patch on a more recent GCC.
Best regards,
Thomas
On 29/06/17 14:55, Thomas Preudhomme wrote:
Hi,
This patch adds support for ARMv8-R architecture [1] which was recently
announced. User level instructions for ARMv8-R are the same as those in
ARMv8-A Aa
On 29 June 2017 at 16:37, Thomas Preudhomme
wrote:
> On 29/06/17 15:34, Christophe Lyon wrote:
>>
>> On 29 June 2017 at 15:52, Thomas Preudhomme
>> wrote:
>>>
>>> Hi,
>>>
>>> This patch series adds support for the ARMv8-R architecture[1] and ARM
>>> Cortex-R52[2] to GCC. The patch series consist
Richard Biener wrote:
> int f (int m, int c)
> {
> return (m & 1) * c;
> }
This case (integer[0,1] rather than boolean input) should be transformed into c
& -(m & 1).
Wilco
On 06/26/2017 10:19 PM, Hurugalawadi, Naveen wrote:
> Hi Jeff,
>
> Thanks for the review and your approval for final patch.
> Sorry, It was a long weekend and hence could not revert to your
> comments earlier.
>
>>> You need a ChangeLog entry, but I think that's it. Can you
>>> please repost wit
We currently #define a bunch of names in cp-tree.h, never override them,
and then use them exactly once during initialization. I think these
were hold-overs from when changing from the old to new ABI. Anyway, I
see no reason for the indirection.
I also renamed the cdtor variant names to be c
I found maybe_add_lang_type_raw benefitted from simply returning false
early, rather than use a bool flag.
applied to trunk.
nathan
--
Nathan Sidwell
2017-06-29 Nathan Sidwell
* lex.c (maybe_add_lang_type_raw): Exit early, rather than use a
flag.
Index: lex.c
This cleans up constructor_name use. I use constructor_name when
checking for ctor/dtor type things and DECL_NAME (TYPE_NAME (X)) when
dealing with a class's self reference. IMHO these are conceptually
different, even if we might end up with the same identifier in the end.
1) check_dtor_name
On 29/06/17 15:34, Christophe Lyon wrote:
On 29 June 2017 at 15:52, Thomas Preudhomme
wrote:
Hi,
This patch series adds support for the ARMv8-R architecture[1] and ARM
Cortex-R52[2] to GCC. The patch series consist of the following patches:
Hi Thomas,
I think you need to rebase your patch b
On 29 June 2017 at 15:52, Thomas Preudhomme
wrote:
> Hi,
>
> This patch series adds support for the ARMv8-R architecture[1] and ARM
> Cortex-R52[2] to GCC. The patch series consist of the following patches:
Hi Thomas,
I think you need to rebase your patch because Richard's recent series
changed
On Thu, 29 Jun 2017, Peter Bergner wrote:
> On 6/29/17 8:58 AM, Richard Biener wrote:
> > On Thu, 29 Jun 2017, Peter Bergner wrote:
> >> Should we offer an early out of group_case_labels_stmt() for the
> >> fairly common case of new_size == old_size? There's no reason to
> >> execute the compress
This is almost a reformatting diff, converting
if (cond) {
if (a) A
else B
} else C
into
if (!cond) C;
else if (a) A
else B
but it also removes an unnecessary constructor_name assignment:
if ( ... constructor_name_p (unqualified_name, class_type))
{
unqualified_name = constructor_
A bunch of minor reformatting and cleanups I'd collected.
Applied to trunk.
nathan
--
Nathan Sidwell
2017-06-29 Nathan Sidwell
Whitespace cleanups.
* call.c (name_as_c_string): Move CONST_CAST to return.
(build_new_method_call_1): Remove unneeded bracing.
* class.c (include_empty_classes
On 6/29/17 8:58 AM, Richard Biener wrote:
> On Thu, 29 Jun 2017, Peter Bergner wrote:
>> Should we offer an early out of group_case_labels_stmt() for the
>> fairly common case of new_size == old_size? There's no reason to
>> execute the compress labels loop if we didn't combine any of the
>> label
I notied the __builtin_FUNCTION () builtin was using raw DECL_NAME,
which for C++ dtors and conversion operators gives non-useful names.
(no ~ and 'operator N' for N= some int).
This patch fixes its folder to use the lang hook that provides a
printable name. I did contemplate passing 1 (add sco
On Thu, 29 Jun 2017, Peter Bergner wrote:
> On 6/29/17 4:03 AM, Richard Biener wrote:
> >
> > This refactors things a bit to make CFG cleanup handle switches with
> > just a default label. If we make sure to cleanup the CFG after
> > group_case_labels removes cases with just __builtin_unreachabl
Hi,
This patch adds support for the ARM Cortex-R52 processor rencently
announced.
[1] https://developer.arm.com/products/processors/cortex-r/cortex-r52
ChangeLog entry is as follows:
*** gcc/ChangeLog ***
2017-01-31 Thomas Preud'homme
* config/arm/arm-cpus.in (cortex-r52): Add new
Hi,
This patch adds support for ARMv8-R architecture [1] which was recently
announced. User level instructions for ARMv8-R are the same as those in
ARMv8-A Aarch32 mode so this patch define ARMv8-R to have the same
features as ARMv8-A in ARM backend.
[1]
https://developer.arm.com/products/archi
On 6/29/17 4:03 AM, Richard Biener wrote:
>
> This refactors things a bit to make CFG cleanup handle switches with
> just a default label. If we make sure to cleanup the CFG after
> group_case_labels removes cases with just __builtin_unreachable ()
> inside then this fixes the ICE seen in PR81994
Hi,
The driver is missing MIDR information for processors ARM Cortex-R7 and
Cortex-R8 to support -march/-mcpu/-mtune=native on the command line.
This patch adds the missing information.
ChangeLog entry is as follows:
*** gcc/ChangeLog ***
2017-01-31 Thomas Preud'homme
* config/arm/
Hi,
This patch series adds support for the ARMv8-R architecture[1] and ARM
Cortex-R52[2] to GCC. The patch series consist of the following patches:
[ 1/3] Add missing MIDR information for ARM Cortex-R7 and Cortex-R8 processor
[ 2/3] Add support for ARMv8-R architecture
[ 3/3] Add support for A
On 06/29/2017 05:20 AM, Wilco Dijkstra wrote:
> Richard Biener wrote:
>> Hurugalawadi, Naveen wrote:
>>> The code (m1 > m2) * d code should be optimized as m1> m2 ? d : 0.
>
>> What's the reason of this transform? I expect that the HW multiplier
>> is quite fast given one operand is either zero o
Ping? Linux startfile and endfile specs.
https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01678.html
--
Alan Modra
Australia Development Lab, IBM
> This patch adds a workaround to the Sparc backend for the LEON3FT
> store-store errata. It is enabled when using the -mfix-ut699,
> -mfix-ut700, or -mfix-gr712rc flag.
Let's forget -mfix-gr712rc for now, -mfix-ut700 is enough I think.
> The workaround inserts NOP instructions to prevent the fol
On 6/29/17 3:51 AM, Richard Biener wrote:
> On Thu, Jun 29, 2017 at 10:34 AM, Richard Biener
> To answer myself the unreachable case vanishes at
> execute_cleanup_cfg_post_optimizing
> via group_case_labels. find_taken_edge wouldn't handle this case either.
>
> I am testing a patch fixing both -
On Jun 28, 2017, at 4:48 PM, Segher Boessenkool
wrote:
>
> Hi Carl,
>
> On Wed, Jun 28, 2017 at 08:37:35AM -0700, Carl Love wrote:
>> The following patch adds support for the vec_signed, vec_signede,
>> vec_signedo and vec_signed2 builtins.
>
> Are those names ABI-dictated?
Unfortunately, yes
The testcase in
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80565
is passing now. Check in the testcase and resolve it as fixed.
PR ipa/80565
* gcc.dg/torture/pr80565.c: New file.
---
gcc/testsuite/ChangeLog| 5 +
gcc/testsuite/gcc.dg/torture/pr80565.c | 4
Bootstrap and regtest running on x86_64-unknown-linux-gnu.
Richard.
2017-06-29 Richard Biener
PR tree-optimization/81249
* tree-vect-loop.c (vect_create_epilog_for_reduction): Convert
condition reduction result to original scalar type.
* g++.dg/torture/pr8124
Hi!
Sorry for the review delay.
On Mon, Jun 26, 2017 at 03:49:23PM +0300, Maxim Ostapenko wrote:
> (handle_builtin_stackrestore): Likewise.
The function is called with _ between stack and restore.
> * match.pd: Add new pattern.
Unless the patch relies on this, I think it should be
This patch adds a DFA scheduler modelling the core S5 in the SPARC M8
processors.
gcc/ChangeLog:
* config/sparc/m8.md: New file.
* config/sparc/sparc.md: Include m8.md.
---
gcc/ChangeLog | 5 +
gcc/config/sparc/m8.md| 242
This patch adds suppport for the following VIS instructions, which are
introduced in the Oracle SPARC Architecture 2017 and implemented by the
SPARC M8 cpu:
- Dictionary unpack.
- Partitioned compare with shifted result.
- Unsigned partitioned compare with shifted result.
- Partitioned dual-equal
This patch reworks the M7 DFA scheduler to use instruction subtypes. It
also removes the v3pipe insn attribute from sparc.md, as it is no longer
needed.
gcc/ChangeLog:
* config/sparc/niagara7.md: Rework the DFA scheduler to use insn
subtypes.
* config/sparc/sparc.md: Remo
This patch introduces a new value for the insn type attribute viscmp.
VIS comparison insn are adapted to use it, and finally the DFA
schedulers are updated accordingly.
gcc/ChangeLog:
* config/sparc/sparc.md ("type"): New insn type viscmp.
("fcmp_vis"): Set insn type to
vi
This patch adds the following support for the SPARC M8 cpu, which
implements the Oracle SPARC Architecture 2017:
- Support for -mcpu=m8 and -mtune=m8.
- Definition of cpu target macros and specs in the backend.
- Tuning of backend parameters for the M8.
- Addition of a new cpu type m8 in the machi
On Thu, Jun 29, 2017 at 1:20 PM, Wilco Dijkstra wrote:
> Richard Biener wrote:
>> Hurugalawadi, Naveen wrote:
>> > The code (m1 > m2) * d code should be optimized as m1> m2 ? d : 0.
>
>> What's the reason of this transform? I expect that the HW multiplier
>> is quite fast given one operand is eit
This patch serie adds support for the SPARC M8 processor to GCC.
The SPARC M8 processor implements the Oracle SPARC Architecture 2017.
The first four patches are preparatory work:
- bmask* instructions are put in their own instruction type. It makes
little sense to have them in the same catego
This patch introduces a new insn attribute `subtype', and marks
existing insns appropriately. The resulting instruction hierarchy is
documented in a comment.
gcc/ChangeLog:
* config/sparc/sparc.md ("subtype"): New insn attribute.
("*wrgsr_sp64"): Set insn subtype.
("*rdgs
This patch introduces a new value for the insn type attribute bmask.
bmask instructions, which were previously typed as `array', are
adapted to use it, and finally the several DFA schedulers are updated
accordingly.
gcc/ChangeLog:
* config/sparc/sparc.md: New instruction type `bmask'.
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