On Mon, Jul 17, 2023 at 7:38 PM Uros Bizjak wrote:
>
> On Mon, Jul 17, 2023 at 10:28 AM Hongtao Liu wrote:
> >
> > I'd like to ping for this patch (only patch 1/2, for patch 2/2, I
> > think that may not be necessary).
> >
> > On Mon, May 15, 2023 at 9:20 AM Hongtao Liu wrote:
> > >
> > > ping.
Hi Haochen,
on 2022/9/26 11:35, HAO CHEN GUI wrote:
> Hi,
> This patch implements optab f[min/max]_optab by xs[min/max]dp on rs6000.
> Tests show that outputs of xs[min/max]dp are consistent with the standard
> of C99 fmin/max.
>
> This patch also binds __builtin_vsx_xs[min/max]dp to
Hi,
As the ticket(PR107013, adding fmin/max to RTL code) is suspended, I ping
this patch. The unspec of fmin/max can be replaced with corresponding RTL
code after that ticket is fixed.
https://gcc.gnu.org/pipermail/gcc-patches/2022-September/602181.html
Thanks
Gui Haochen
在 2022/9/26 11:35,
This only affects the new costs in aarch64 backend. Currently, the reduction
latency of vector body is too large as it is multiplied by stmt count. As the
scalar reduction latency is small, the new costs model may think "scalar code
would issue more quickly" and increase the vector body cost a
On 7/18/23 17:42, Vineet Gupta wrote:
Hi Manolis,
On 7/18/23 11:01, Jeff Law via Gcc-patches wrote:
Vineet @ Rivos has indicated he stumbled across an ICE with the V3
code. Hopefully he'll get a testcase for that extracted shortly.
Yeah, I was trying to build SPEC2017 with this patch
PR #104914
When work with
int val;
((unsigned char*))[3] = *buf;
if (val > 0) ...
The RTX mode is obtained from REG instead of SUBREG, which make
D is used instead of . Thus something wrong happens
on sign-extend default architectures, like MIPS64.
Let's use str_rtx and mode of str_rtx as
PR #104914
When work with
int val;
((unsigned char*))[3] = *buf;
if (val > 0) ...
The RTX mode is obtained from REG instead of SUBREG, which make
D is used instead of . Thus something wrong happens
on sign-extend default architectures, like MIPS64.
Let's use str_rtx and mode of str_rtx as
/* The RTL variable which stores the dynamic FRM value. We always use this
RTX to restore dynamic FRM rounding mode in mode switching. */
rtx dynamic_frm;
+
+ /* The boolean variables indicates there is at least one static rounding
+ mode instruction in the function or not. */
From: Pan Li
In basic dynamic rounding mode, we simply ignore call instructions and
we would like to take care of call in this PATCH.
During the call, the frm may be updated or keep as is. Thus, we must
make sure at least 2 things.
1. The static frm before call should not pollute the frm value
Hi,
The shift mode will be widen in combine pass if the operand has a normal
subreg. But when the target already has rotate/mask/insert instructions on
the narrow mode, it's unnecessary to widen the mode for lshiftrt. As
the lshiftrt is commonly converted to rotate/mask insn, the widen mode
Hi Robin,
> In general I'm fine with this small change of course, I just wonder if
> the testcase is not brittle anyway. From what I can tell the respective
> change is independent of the actual number of registers so maybe it's enough
> to
> not compare the fully body but just make sure the
Hi Carl,
The issue was tracked by PR109971
(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109971)
and I think it had been resolved.
btw, when the expected insn count changes, it does expose some
issues but which can be either test or functionality issue, if
it's taken as a test issue, it needs
Hi,
The patch relies on the fist patch. The reason of the change is also described
in the first patch. This patch implements the target hook have_rotate_and_mask.
It also modifies some test cases. The regression of rlwimi-2.c is fixed. For
rlwinm-0.c and rlwinm-2.c, one more 32bit rotate/mask
Hi Haochen,
on 2023/6/19 09:14, HAO CHEN GUI wrote:
> Hi,
> This patch modifies vsx extract expander and generates mfvsrwz/stxsiwx
> for all platforms when the mode is V4SI and the index of extracted element
> is 1 for BE and 2 for LE. Also this patch adds a insn pattern for mfvsrwz
> which can
So I had missed/forgot that EQ_EXPR could have an non boolean
type for generic when I implemented r14-2556-g0407ae8a7732d9.
This patch adds check for one bit precision intergal type
which fixes the problem.
OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.
PR
Got it, I will fix the commit info in next version.
I haven't test GCC with these flags before, so I will try to build and
run regression test with BOOT_CFLAGS later.
On Tue, 2023-07-18 at 20:26 +0800, Xi Ruoyao wrote:
> On Tue, 2023-07-18 at 19:06 +0800, Chenghui Pan wrote:
> > Lulu Cheng (8):
On Tue, Jul 18, 2023 at 16:52:44 -0400, Jason Merrill wrote:
> On 6/25/23 12:36, Ben Boeckel wrote:
> > On Fri, Jun 23, 2023 at 08:12:41 -0400, Nathan Sidwell wrote:
> >> On 6/22/23 22:45, Ben Boeckel wrote:
> >>> On Thu, Jun 22, 2023 at 17:21:42 -0400, Jason Merrill wrote:
> On 1/25/23
gcc/cp/ChangeLog:
* decl.cc (copy_fn_p): Use TYPE_REF_IS_LVALUE.
* init.cc (maybe_warn_list_ctor): Likewise.
* method.cc (early_check_defaulted_comparison): Likewise.
* pt.cc (maybe_adjust_types_for_deduction): Likewise.
(invalid_nontype_parm_type_p):
This patch defines TYPE_REF_IS_LVALUE to determine if a type is a C++
lvalue reference.
gcc/ChangeLog:
* tree.h (TYPE_REF_IS_LVALUE): Define.
Signed-off-by: Ken Matsui
---
gcc/tree.h | 4
1 file changed, 4 insertions(+)
diff --git a/gcc/tree.h b/gcc/tree.h
index
Since POINTER_TYPE_P was completely replaced by INDIRECT_TYPE_P, it can
be deleted.
gcc/ChangeLog:
* tree.h (POINTER_TYPE_P): Remove.
Signed-off-by: Ken Matsui
---
gcc/tree.h | 7 ---
1 file changed, 7 deletions(-)
diff --git a/gcc/tree.h b/gcc/tree.h
index
Hi Manolis,
On 7/18/23 11:01, Jeff Law via Gcc-patches wrote:
Vineet @ Rivos has indicated he stumbled across an ICE with the V3
code. Hopefully he'll get a testcase for that extracted shortly.
Yeah, I was trying to build SPEC2017 with this patch and ran into ICE
for several of them with
This patch moves INDIRECT_TYPE_P from cp/cp-tree.h to tree.h to unify
POINTER_TYPE_P in tree.h to INDIRECT_TYPE_P, which are equivalent.
gcc/cp/ChangeLog:
* cp-tree.h (INDIRECT_TYPE_P): Remove.
gcc/ChangeLog:
* tree.h (INDIRECT_TYPE_P): Define.
Signed-off-by: Ken Matsui
---
This patch moves TYPE_PTR_P from cp/cp-tree.h to tree.h to unify
POINTER_TYPE_P in tree.h to INDIRECT_TYPE_P in cp/cp-tree.h, which are
equivalent.
gcc/cp/ChangeLog:
* cp-tree.h (TYPE_PTR_P): Remove.
gcc/ChangeLog:
* tree.h (TYPE_PTR_P): Define.
Signed-off-by: Ken Matsui
---
gcc/ada/ChangeLog:
* gcc-interface/trans.cc (return_slot_opt_for_pure_call_p): Use
TYPE_REF_P.
* gcc-interface/utils2.cc (build_unary_op): Likewise.
gcc/ChangeLog:
* alias.cc (get_alias_set): Use TYPE_REF_P.
* config/gcn/gcn-tree.cc
This patch moves TYPE_REF_P from cp/cp-tree.h to tree.h to simplify the
same code as it and to declare TYPE_REF_IS_LVALUE that determines if a
type is a C++ lvalue reference.
gcc/cp/ChangeLog:
* cp-tree.h (TYPE_REF_P): Remove.
gcc/ChangeLog:
* tree.h (TYPE_REF_P): Define.
This patch series tweaks predicate macros in tree.h to make the code more
readable. TYPE_REF_P is moved to tree.h and used for INDIRECT_TYPE_P and
TYPE_REF_IS_LVALUE. TYPE_PTR_P is also moved to tree.h and used for
INDIRECT_TYPE_P. POINTER_TYPE_P in tree.h is replaced with INDIRECT_TYPE_P
since it
This patch defines _GLIBCXX_HAS_BUILTIN_TRAIT, which will be used as a
flag to toggle built-in traits in the type_traits header. Through this
macro function and _GLIBCXX_NO_BUILTIN_TRAITS macro, we can switch the
use of built-in traits without needing to modify the source code.
Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk and branches?
-- >8 --
is_really_empty_class is liable to crash when it gets an incomplete
or dependent type. Since r11-557, we pass the yet-uninstantiated
class type S<0> of the PARM_DECL s to is_really_empty_class -- because
of the
On 7/18/23 16:52, Jason Merrill wrote:
On 6/25/23 12:36, Ben Boeckel wrote:
On Fri, Jun 23, 2023 at 08:12:41 -0400, Nathan Sidwell wrote:
On 6/22/23 22:45, Ben Boeckel wrote:
On Thu, Jun 22, 2023 at 17:21:42 -0400, Jason Merrill wrote:
On 1/25/23 16:06, Ben Boeckel wrote:
They affect the
On 6/25/23 12:36, Ben Boeckel wrote:
On Fri, Jun 23, 2023 at 08:12:41 -0400, Nathan Sidwell wrote:
On 6/22/23 22:45, Ben Boeckel wrote:
On Thu, Jun 22, 2023 at 17:21:42 -0400, Jason Merrill wrote:
On 1/25/23 16:06, Ben Boeckel wrote:
They affect the build, so report them via `-MF`
On 3/2/23 18:07, Lewis Hyatt wrote:
The PR complains that we do not handle UTF-8 in the suffix for a user-defined
literal, such as:
bool operator ""_π (unsigned long long);
In fact we don't handle any extended identifier characters there, whether
UTF-8, UCNs, or the $ sign. We do handle it
Hello,
Jan Hubicka via Gcc-patches writes:
> Hi,
> when vectorizing 4 times, we sometimes do
> for
> <4x vectorized body>
> for
> <2x vectorized body>
> for
> <1x vectorized body>
>
> Here the second two fors handling epilogue never iterates.
> Currently vecotrizer thinks
Resolves:
PR c/65213 - Extend -Wmissing-declarations to variables [i.e. add
-Wmissing-variable-declarations]
gcc/c-family/ChangeLog:
PR c/65213
* c.opt (-Wmissing-variable-declarations): New option.
gcc/c/ChangeLog:
PR c/65213
* c-decl.cc (start_decl): Handle
> On Jul 18, 2023, at 11:37 AM, Qing Zhao via Gcc-patches
> wrote:
>
>
>
>> On Jul 17, 2023, at 7:40 PM, Kees Cook wrote:
>>
>> On Mon, Jul 17, 2023 at 09:17:48PM +, Qing Zhao wrote:
>>>
On Jul 13, 2023, at 4:31 PM, Kees Cook wrote:
In the bug, the problem is that
Manolis Tsamis writes:
> On Tue, Jul 18, 2023 at 1:12 AM Richard Sandiford
> wrote:
>>
>> Manolis Tsamis writes:
>> > noce_convert_multiple_sets has been introduced and extended over time to
>> > handle
>> > if conversion for blocks with multiple sets. Currently this is focused on
>> >
On 7/18/23 11:15, Manolis Tsamis wrote:
On Fri, Jul 14, 2023 at 8:35 AM Jeff Law wrote:
On 7/13/23 09:05, Manolis Tsamis wrote:
In this version I have made f-m-o able to also eliminate constant
moves in addition to the add constant instructions.
This increases the number of
On 7/17/23 15:14, Aldy Hernandez wrote:
Instead of reading the known zero bits in IPA, read the value/mask
pair which is available.
There is a slight change of behavior here. I have removed the check
for SSA_NAME, as the ranger can calculate the range and value/mask for
INTEGER_CST. This
Tested x86_64-pc-linux-gnu, applying to trunk.
-- 8< --
C++26 P2621 removes UB in the lexer and either makes the construct valid
or ill-formed. We're already handling this correctly so this patch only
adds tests.
PR c++/110340
gcc/testsuite/ChangeLog:
* g++.dg/cpp/string-4.C:
On Fri, Jul 14, 2023 at 8:35 AM Jeff Law wrote:
>
>
>
> On 7/13/23 09:05, Manolis Tsamis wrote:
> > In this version I have made f-m-o able to also eliminate constant
> > moves in addition to the add constant instructions.
> > This increases the number of simplified/eliminated instructions and is
Hi Richard,
Thanks for your insightful reply.
On Tue, Jul 18, 2023 at 1:12 AM Richard Sandiford
wrote:
>
> Manolis Tsamis writes:
> > noce_convert_multiple_sets has been introduced and extended over time to
> > handle
> > if conversion for blocks with multiple sets. Currently this is focused
On 7/5/23 17:51, Marek Polacek wrote:
Running
$ make check-c++ RUNTESTFLAGS='--target_board=unix\{-gdwarf-5,-gdwarf-4\}
dwarf2.exp=utf-1.C'
shows
FAIL: g++.dg/debug/dwarf2/utf-1.C -std=gnu++20 scan-assembler-times
DW_AT_encoding \\(0x10\\) 3
because with -gdwarf-4 the output is:
.byte
On 7/17/23 17:29, Patrick Palka wrote:
On Fri, 14 Jul 2023, Jason Merrill wrote:
On 7/14/23 14:07, Patrick Palka wrote:
On Thu, 13 Jul 2023, Jason Merrill wrote:
On 7/13/23 11:48, Patrick Palka wrote:
On Wed, 28 Jun 2023, Patrick Palka wrote:
On Wed, Jun 28, 2023 at 11:50 AM Jason
Am Dienstag, dem 18.07.2023 um 16:25 + schrieb Qing Zhao:
>
>
> > On Jul 18, 2023, at 12:03 PM, Martin Uecker
> > wrote:
> >
> > Am Dienstag, dem 18.07.2023 um 15:37 + schrieb Qing Zhao:
> > >
> > >
> > > > On Jul 17, 2023, at 7:40 PM, Kees Cook
> > > > wrote:
> > > >
> > > > On
Also change some internal variables and function arguments from int to bool.
gcc/ChangeLog:
* dwarf2asm.cc: Change FALSE to false.
* dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
* dwarf2out.cc (matches_main_base): Change return type from
int to bool. Change
On 7/18/23 07:31, Richard Biener wrote:
On Mon, Jul 17, 2023 at 11:20 PM Jason Merrill via Gcc-patches
wrote:
Tested x86_64-pc-linux-gnu, OK for trunk?
-- 8< --
The change to only cache constexpr calls that are
reduced_constant_expression_p tripped on bit-cast3.C, which failed that
On 7/18/23 11:18, Patrick Palka wrote:
Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for
trunk? Also verified by way of gcc_assert that we never see
TEMPLATE_PARM_INDEX here.
OK.
-- >8 --
Within a template parameter list, a non-type template parameter pack is
> On Jul 18, 2023, at 12:03 PM, Martin Uecker wrote:
>
> Am Dienstag, dem 18.07.2023 um 15:37 + schrieb Qing Zhao:
>>
>>
>>> On Jul 17, 2023, at 7:40 PM, Kees Cook
>>> wrote:
>>>
>>> On Mon, Jul 17, 2023 at 09:17:48PM +, Qing Zhao wrote:
> On Jul 13, 2023, at 4:31 PM,
Am Dienstag, dem 18.07.2023 um 15:37 + schrieb Qing Zhao:
>
>
> > On Jul 17, 2023, at 7:40 PM, Kees Cook
> > wrote:
> >
> > On Mon, Jul 17, 2023 at 09:17:48PM +, Qing Zhao wrote:
> > >
> > > > On Jul 13, 2023, at 4:31 PM, Kees Cook
> > > > wrote:
> > > >
> > > > In the bug, the
Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for
trunk? Also verified by way of gcc_assert that we never see
TEMPLATE_PARM_INDEX here.
-- >8 --
Within a template parameter list, a non-type template parameter pack is
represented as a PARM_DECL. But in a couple of spots
Ping
On Thu, 2023-06-01 at 16:11 -0700, Carl Love wrote:
> GCC maintainers:
>
> The following patch updates the expected instruction counts in four
> tests. The counts in all of the tests changed with commit
> f574e2dfae79055f16d0c63cc12df24815d8ead6.
>
> The updated counts have been
> On Jul 17, 2023, at 7:40 PM, Kees Cook wrote:
>
> On Mon, Jul 17, 2023 at 09:17:48PM +, Qing Zhao wrote:
>>
>>> On Jul 13, 2023, at 4:31 PM, Kees Cook wrote:
>>>
>>> In the bug, the problem is that "p" isn't known to be allocated, if I'm
>>> reading that correctly?
>>
>> I think that
On Tue, Jul 18, 2023 at 4:19 PM Florian Weimer via Gcc-patches
wrote:
>
> The eh_frame value is only used by linear_search_fdes, not the binary
> search directly in find_fde_tail, so the bug is not immediately
> apparent with most programs.
>
> Fixes commit
The following makes sure that FP x > y ? x : y style max/min operations
are if-converted at the GIMPLE level. While we can neither match
it to MAX_EXPR nor .FMAX as both have different semantics with IEEE
than the ternary ?: operation we can make sure to maintain this form
as a COND_EXPR so
Tamar pointed out it would be good to have a `scan-tree-dump` in the testcase
just to make sure that when something is currently vectorizing it stays
vectorizing (and hence that the new code is still likely running).
Attached patch has that change, also inlined for ease of reply.
Hi All,
The resulting predicate register of a whilelo is not
restricted to the lower half of the predicate register file.
As such these tests started failing after recent changes
because the whilelo outside the loop is getting assigned p15.
This widens the regexp.
Tested on
LGTM, thanks :)
On Thu, Jul 13, 2023 at 4:33 PM Lehua Ding wrote:
>
> Hi,
>
> This tiny patch add a check for extension starts with 'z' or 's' in `-march`
> option. Currently this unknown extension will be passed to the assembler,
> which
> then reports an error. With this patch, the compiler
The eh_frame value is only used by linear_search_fdes, not the binary
search directly in find_fde_tail, so the bug is not immediately
apparent with most programs.
Fixes commit e724b0480bfa5ec04f39be8c7290330b495c59de ("libgcc:
Special-case BFD ld unwind table encodings in find_fde_tail").
Fixes commit r14-1614-g49310a99330849 ("libgcc: Fix eh_frame fast path
in find_fde_tail").
libgcc/
PR libgcc/110179
* unwind-dw2-fde-dip.c (find_fde_tail): Add cast to avoid
implicit conversion of pointer value to integer.
(cherry picked from commit
Hi,
As discussed in previous reviews, adding overflow APIs to range-op
would be useful. Those APIs could help to check if overflow happens
when operating between two 'range's, like: plus, minus, and mult.
Previous discussions are here:
Committed to GCC 13, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Tuesday, July 18, 2023 9:57 PM
To: Li, Pan2 ; gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com
Subject: Re: [PATCH v1|GCC-13] RISC-V: Bugfix for riscv-vsetvl pass.
On 7/15/23 20:16,
Hi,
Integer expression "(X - N * M) / N" can be optimized to "X / N - M"
if there is no wrap/overflow/underflow and "X - N * M" has the same
sign with "X".
Compare the previous version:
https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624067.html
- APIs: overflow, nonnegative_p and
On 7/15/23 20:16, Pan Li via Gcc-patches wrote:
From: Ju-Zhe Zhong
This patch comes from part of below change, which locate one bug of rvv
vsetvel pass when auto-vectorization.
https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624523.html
Unforunately, It is not easy to reproduce this
Hi Prathamesh,
> On Tue, 18 Jul 2023 at 12:54, Prathamesh Kulkarni
> wrote:
> I had added a similar transform to remove pair of rev instructions in:
> https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=f0eabc52c9a2d3da0bfc201da7a5
> c1658b76e9a4
I don't have much knowledge of GCC code, but your
Hello All:
This patch improves code sinking pass to sink statements before call to reduce
register pressure.
Review comments are incorporated.
For example :
void bar();
int j;
void foo(int a, int b, int c, int d, int e, int f)
{
int l;
l = a + b + c + d +e + f;
if (a != 5)
{
Hi,
I'd like to request comments on a patch I am writing for PR110543.
The goal of this patch is to reduce the noise of the analyzer emitted
diagnostics when dealing with
system headers, or simply diagnostic paths that are too long. The new
option only affects the display
of the diagnostics, but
From: Tom Tromey
This changes gcc-interface to use the typedefs that were recently
introduced in gnat. This is another step toward switching the code
generator to emit enums rather than preprocessor defines.
In a couple of spots, a 'default' case is also added. These avoid
warnings from
From: Javier Miranda
When the prefix of 'Image is used with a class-wide interface
type object, the frontend does not generate code to displace
the pointer to the underlying object to reference its base,
and this is required to invoke Ada.Tags.Wide_Wide_Expanded_Name.
gcc/ada/
*
From: Eric Botcazou
This restores the full listing of the types for the interpretations.
gcc/ada/
* sem_util.ads (Wrong_Type): Add Multiple parameter defaulting to
False and document it.
* sem_util.adb (Wrong_Type): Do not return early if an error has
already
From: Viljar Indus
The compiler should use unnamed addition methods such as Append
when expanding a container aggregate with Iterator Specification.
gcc/ada/
* exp_aggr.adb (Expand_Container_Aggregate): Use the positional
addition method only when dealing with a container
From: Viljar Indus
Create temporary scope for the iterators defined in a
container aggregate so that it would not be put to the
same scope where the expression was used. This would
otherwise lead to multiple aggregates with iterators that have
the same name leading to a name conflict.
gcc/ada/
From: Ronan Desplanques
Before this patch, the run-time assumed that not specifying a CPU
affinity mask when creating a thread was equivalent to specifying a
CPU affinity mask that included all CPUs.
As documented in the man pages for pthread_create and
pthread_setaffinity_np, this assumption
From: Javier Miranda
When the sources have a type conversion from an interface type
T2 to some ancestor interface type T1 (that is, T2 extends T1)
the tag check added by the compiler may fail at runtime.
gcc/ada/
* exp_disp.adb (Has_Dispatching_Constructor_Call): Removed.
From: Viljar Indus
When dealing with a container aggregate with an iterator
specification the iterator should take the value of the
element of the container instead of the key.
gcc/ada/
* sem_aggr.adb (Resolve_Iterated_Association): Use the element
type for the iterator in a
From: Alexandre Oliva
Mark exception-raising subprograms with expected_throw attribute.
Document the use of the attribute in Control Flow Redundancy.
Enable marking subprograms as expected_throw with Machine_Attribute
pragmas.
gcc/ada/
* libgnat/a-except.ads (Raise_Exception): Mark
From: Eric Botcazou
The front-end contains a specific mechanism to deal with aggregates of
self-referencing types by means of the Has_Self_Reference flag, which is
supposed to be set during semantic analysis and used during expansion.
The problem is that the first part overlooks aggregates of
From: Eric Botcazou
The new processing is not properly guarded.
gcc/ada/
* sem_ch13.adb (Replace_Type_References_Generic.Visible_Component):
In the case of private discriminated types, explicitly check that we
have a private declaration before examining its discriminant
From: Eric Botcazou
The attribute is wrongly computed as always True because, unlike for e.g.
private types, Validated_View does not look through the limited view.
gcc/ada/
* sem_util.ads (Validated_View): Document enhanced behavior.
* sem_util.adb (Validated_View): Return the
From: Yannick Moy
Change the way explain codes are handled to generate the command for the
user to get the explanations, as this was not working for warnings.
gcc/ada/
* errout.adb (Error_Msg_Internal): Remove call to
Prescan_Message on the special continuation for the explain
On Tue, 2023-07-18 at 19:06 +0800, Chenghui Pan wrote:
> Lulu Cheng (8):
> LoongArch: Added Loongson SX vector directive compilation framework.
> LoongArch: Added Loongson SX base instruction support.
> LoongArch: Added Loongson SX directive builtin function support.
> LoongArch: Added
Comments regarding the validity of the Fortran assumptions are welcome!
This patch now uses a 'simple' loop for OpenMP loops with
a constant loop-step size. Before, it only did so for step = ±1.
(Otherwise, a count variable is used from which the original
loop index variable is calculated from.)
On Tue, Jul 18, 2023 at 1:17 PM Ajit Agarwal wrote:
>
>
>
> On 18/07/23 4:38 pm, Prathamesh Kulkarni wrote:
> > On Tue, 18 Jul 2023 at 13:26, Ajit Agarwal via Gcc-patches
> > wrote:
> >>
> >>
> >> Ping!
> >>
> >> please review.
> >>
> >> Thanks & Regards
> >> Ajit
> >>
> >>
> >> This patch
On Mon, Jul 17, 2023 at 4:26 PM Tamar Christina via Gcc-patches
wrote:
>
> I think Andrew is listed as maintainer for tree-ssa, or maybe it's on one of
> the Richard's lists?
It's on my rather longish list of things to review ...
> > -Original Message-
> > From: Gcc-patches >
On Tue, Jul 18, 2023 at 6:29 AM Alexandre Oliva via Gcc-patches
wrote:
>
> Hello, Nathan,
>
> On Jul 15, 2023, Nathan Sidwell wrote:
>
> > Not commenting on the semantics, but the name seems unfortunate (hello
> > bikeshed).
>
> Yeah, it's a bit challenging to express the concept, when the
On Mon, Jul 17, 2023 at 11:20 PM Jason Merrill via Gcc-patches
wrote:
>
> Tested x86_64-pc-linux-gnu, OK for trunk?
>
> -- 8< --
>
> The change to only cache constexpr calls that are
> reduced_constant_expression_p tripped on bit-cast3.C, which failed that
> predicate due to the presence of an
When expanding a COND_EXPR or a VEC_COND_EXPR the x86 backend for
example tries to match FP min/max instructions. But this only
works when it can see the equality of the comparison and selected
operands. This breaks in both prepare_cmp_insn and vector_compare_rtx
where the former forces
On 18/07/23 4:38 pm, Prathamesh Kulkarni wrote:
> On Tue, 18 Jul 2023 at 13:26, Ajit Agarwal via Gcc-patches
> wrote:
>>
>>
>> Ping!
>>
>> please review.
>>
>> Thanks & Regards
>> Ajit
>>
>>
>> This patch improves code sinking pass to sink statements before call to
>> reduce
>> register
On Tue, 18 Jul 2023 at 13:26, Ajit Agarwal via Gcc-patches
wrote:
>
>
> Ping!
>
> please review.
>
> Thanks & Regards
> Ajit
>
>
> This patch improves code sinking pass to sink statements before call to reduce
> register pressure.
> Review comments are incorporated.
>
> For example :
>
> void
This is an update of
https://gcc.gnu.org/pipermail/gcc-patches/2023-June/623262.html
In addition, LSX/LASX instructions support is added in the master branch of
binutils-gdb,
and these GCC patches can be used with future releases of binutils-gdb.
Changes since v1:
- Some usages of "unspec" in
From: Lulu Cheng
gcc/ChangeLog:
* config/loongarch/genopts/loongarch-strings: Added compilation
framework.
* config/loongarch/genopts/loongarch.opt.in: Ditto.
* config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins): Ditto.
*
From: Lulu Cheng
gcc/ChangeLog:
* config/loongarch/genopts/loongarch-strings: Added compilation
framework.
* config/loongarch/genopts/loongarch.opt.in: Ditto.
* config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins): Ditto.
*
LGTM, thanks:)
Committed to the trunk, thanks Kito and Juzhe.
On Tue, 18 Jul 2023 at 15:20, Serval Martinot-Lagarde via Gcc-patches
wrote:
>
> SVE generates superflous rev instructions that can be replaced
> by single mov instruction or a pair of (rev, mov) instructions
Hi Serval,
I had added a similar transform to remove pair of rev instructions in:
LGTM, thanks:)
Juzhe-Zhong 於 2023年7月18日 週二 14:28 寫道：
> This patch is to dynamic adjust size of VLA vectors according to
> TARGET_MIN_VLEN (-march=*zvl*b).
>
> Currently, VNx16QImode is always [16,16] when TARGET_MINV_LEN >= 128.
>
> We are going to add a bunch of VLS modes
When the COND_EXPR condition operand was split out to a separate stmt
it became subject to CSE with other condition evaluations. This
unfortunately leads to TER no longer applying and in turn RTL
expansion of COND_EXPRs no longer seeing the condition and thus
failing to try conditional move
Hi Lehua,
> I think the purpose of this testcase is to check whether the modifications to
> the stack frame are as expected, so it is necessary to specify exactly whether
> three or four registers are saved. But I think its need to add another
> testcase
> which use another option
SVE generates superflous rev instructions that can be replaced
by single mov instruction or a pair of (rev, mov) instructions
gcc/
* config/aarch64/aarch64-sve.md: New peephole2.
* testsuite/gcc.target/aarch64/sve/revrev.c: New dg test.
Signed-off-by: Serval Martinot-Lagarde
---
Hi,
Andrew MacLeod writes:
> On 7/17/23 09:45, Jiufu Guo wrote:
>>
Should we decide we would like it in general, it wouldnt be hard to add to
irange. wi_fold() cuurently returns null, it could easily return a bool
indicating if an overflow happened, and wi_fold_in_parts and
From: Ju-Zhe Zhong
ChangeLog:
* MAINTAINERS: Add myself as a reviewer for the riscv port.
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index c9c9115678f..87a4f906d42 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -306,6
Committed to the trunk, thanks Robin.
Hi Robin,
Wouldn't you rather want to adjust the test to not check for one
register
number but 3 or 4 instead?
I think the purpose of this testcase is to check whether the modifications to
the stack frame are as expected, so it is necessary to specify exactly whether
three or four registers
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