[PATCH] rtl: use rtx_code for gen_ccmp_first and gen_ccmp_next

Note, this patch is dependent on the patch I posted yesterday to forward declare rtx_code in coretypes.h. -- Now that we have a forward declaration of rtx_code in coretypes.h, we can adjust these hooks to take rtx_code arguments rather than an int. gcc/ChangeLog: * target.def

[PATCH] rtl: Forward declare rtx_code

Now that we require C++ 11, we can safely forward declare rtx_code so that we can use it in target hooks. gcc/ChangeLog * coretypes.h (rtx_code): Add forward declaration. * rtl.h (rtx_code): Make compatible with forward declaration. --- gcc/coretypes.h | 4 gcc/rtl.h

Re: [PATCH] machine_mode type size: Extend enum size from 8-bit to 16-bit

On 11/04/2023 10:46, Richard Sandiford via Gcc-patches wrote: writes: ARM SVE has：svint8_t, svint8x2_t, svint8x3_t, svint8x4_t As far as I known, they don't have tuple type for partial vector. Yeah, there are no separate types for partial vectors, but there are separate modes. E.g.

[committed] arm: mve: fix auto-inc generation [PR107674]

My change r13-416-g485a0ae0982abe caused the compiler to stop generating auto-inc operations on mve loads and stores. The fix is to check whether there is a replacement register available when in strict mode and the register is still a pseudo. gcc: PR target/107674 *

Re: C++ modules and AAPCS/ARM EABI clash on inline key methods

On 23/02/2023 21:20, Alexandre Oliva wrote: On Feb 23, 2023, Alexandre Oliva wrote: On Feb 23, 2023, Richard Earnshaw wrote: On 22/02/2023 19:57, Alexandre Oliva wrote: On Feb 21, 2023, Richard Earnshaw wrote: Rather than scanning for the triplet, a better test would be { xfail {

Re: C++ modules and AAPCS/ARM EABI clash on inline key methods

On 22/02/2023 19:57, Alexandre Oliva wrote: On Feb 21, 2023, Richard Earnshaw wrote: Rather than scanning for the triplet, a better test would be { xfail { arm_eabi } } Indeed, thanks. Here's the updated patch, retested. Ok to install? Based on Nathan's comments, we should just

Re: C++ modules and AAPCS/ARM EABI clash on inline key methods

On 21/02/2023 16:31, Richard Earnshaw via Gcc-patches wrote: On 17/02/2023 06:09, Alexandre Oliva via Gcc-patches wrote: On Apr  5, 2022, Alexandre Oliva wrote: Would something like this be acceptable/desirable?  It's overreaching, in that not all arm platforms are expected to fail

Re: C++ modules and AAPCS/ARM EABI clash on inline key methods

On 17/02/2023 06:09, Alexandre Oliva via Gcc-patches wrote: On Apr 5, 2022, Alexandre Oliva wrote: Would something like this be acceptable/desirable? It's overreaching, in that not all arm platforms are expected to fail, but the result on them will be an unexpected pass, which is not quite

Re: [PATCH][GCC] arm: Optimize arm-mlib.h header inclusion (pr108505).

On 27/01/2023 17:44, Srinath Parvathaneni via Gcc-patches wrote: Hello, I have committed a fix [1] into gcc trunk for a build issue mentioned in pr108505 and latter received few upstream comments proposing more robust fix for this issue. In this patch I'm addressing those comments and

Re: [PATCH] arm: [MVE] Add missing length=8 attribute

On 01/02/2023 09:46, Christophe Lyon via Gcc-patches wrote: I have noticed that the "length" "8" attribute is missing in a few patterns in mve.md. gcc/ * config/arm/mve.md (mve_vabavq_p_): Add length attribute. (mve_vqshluq_m_n_s): Likewise.

Re: [PATCH] arm: Fix warning in libgcc/config/arm/pr-support.c

On 01/02/2023 09:46, Christophe Lyon via Gcc-patches wrote: I have noticed some warnings when building GCC for arm-eabi: pr-support.c:110:7: warning: variable ‘set_pac_sp’ set but not used [-Wunused-but-set-variable] pr-support.c:109:7: warning: variable ‘set_pac’ set but not used

Re: [PATCH][GCC] arm: Fix inclusion of arm-mlib.h header more than once (pr108505).

On 24/01/2023 09:55, Srinath Parvathaneni via Gcc-patches wrote: Hello, The patch fixes the build issue for arm-none-eabi target configured with --with-multilib-list=aprofile,rmprofile, in which case the header file arm/arm-mlib.h is being included more than once and the toolchain build is

Re: [PATCH v2][GCC] arm: Add support for new frame unwinding instruction "0xb5".

On 20/01/2023 17:27, Srinath Parvathaneni via Gcc-patches wrote: Hi, This patch adds support for Arm frame unwinding instruction "0xb5" [1]. When an exception is taken and "0xb5" instruction is encounter during runtime stack-unwinding, we use effective vsp as modifier in pointer

Re: [GCC][PATCH v4] arm: Add pacbti related multilib support for armv8.1-m.main.

On 13/01/2023 17:46, Srinath Parvathaneni via Gcc-patches wrote: Hi, This patch adds the support for pacbti multlilib linking by making "-mbranch-protection=none" as default multilib option for arm-none-eabi target. Eg 1. If the passed command line flags are (without mbranch-protection):

Re: [PATCH][GCC] arm: Add support for new frame unwinding instruction "0xb5".

On 10/11/2022 10:37, Srinath Parvathaneni via Gcc-patches wrote: Hi, This patch adds support for Arm frame unwinding instruction "0xb5" [1]. When an exception is taken and "0xb5" instruction is encounter during runtime stack-unwinding, we use effective vsp as modifier in pointer

Re: [GCC][PATCH 13/15, v6] arm: Add support for dwarf debug directives and pseudo hard-register for PAC feature.

On 18/01/2023 17:18, Srinath Parvathaneni via Gcc-patches wrote: Hello, This patch teaches the DWARF support in gcc about RA_AUTH_CODE pseudo hard-register and also updates the ".save", ".cfi_register", ".cfi_offset", ".cfi_restore" directives accordingly. This patch also adds support to

Re: [GCC][PATCH 13/15, v5] arm: Add support for dwarf debug directives and pseudo hard-register for PAC feature.

On 13/01/2023 17:44, Srinath Parvathaneni via Gcc-patches wrote: Hello, This patch teaches the DWARF support in gcc about RA_AUTH_CODE pseudo hard-register and also updates the ".save", ".cfi_register", ".cfi_offset", ".cfi_restore" directives accordingly. This patch also adds support to

Re: [PATCH][GCC] arm: fix __arm_vld1q_z* and __arm_vst1q_p* intrinsics.

On 22/12/2021 16:21, Murray Steele via Gcc-patches wrote: Hi, On 22/12/2021 16:04, Richard Earnshaw wrote: Is there a PR in bugzilla for this? R. No, not at this time. It's something I came across whilst making changes of my own. For completeness, the ACLE specification I am

Re: [PATCH] testsuite: Skip intrinsics test if arm

On 15/01/2023 17:06, Torbjorn SVENSSON via Gcc-patches wrote: On 2023-01-12 16:03, Richard Earnshaw wrote: On 19/09/2022 17:16, Torbjörn SVENSSON via Gcc-patches wrote: In the test case, it's clearly written that intrinsics is not implemented on arm*. A simple xfail does not help since

Re: [GCC][PATCH 13/15, v5] arm: Add support for dwarf debug directives and pseudo hard-register for PAC feature.

On 13/01/2023 22:25, Richard Earnshaw (lists) via Gcc-patches wrote: On 13/01/2023 22:12, Jakub Jelinek wrote: On Fri, Jan 13, 2023 at 09:58:26PM +, Richard Earnshaw (lists) wrote: > I'm afraid increasing number of DWARF registers is ABI incompatible change. > E.g. libgcc

Re: [GCC][PATCH 13/15, v5] arm: Add support for dwarf debug directives and pseudo hard-register for PAC feature.

On 13/01/2023 21:58, Richard Earnshaw (lists) via Gcc-patches wrote: On 13/01/2023 18:02, Jakub Jelinek via Gcc-patches wrote: On Fri, Jan 13, 2023 at 05:44:15PM +, Srinath Parvathaneni via Gcc-patches wrote: Hello, This patch teaches the DWARF support in gcc about RA_AUTH_CODE pseudo

Re: [PATCH] arm: Split up MVE _Generic associations to prevent type clashes [PR107515]

On 01/12/2022 18:19, Stam Markianos-Wright via Gcc-patches wrote: Hi all, With these previous patches: https://gcc.gnu.org/pipermail/gcc-patches/2022-November/606586.html https://gcc.gnu.org/pipermail/gcc-patches/2022-November/606587.html we enabled the MVE overloaded _Generic associations

Re: [PATCH] arm: unified syntax for libgcc clear_cache

I've just noticed that this was never committed. Presumably that's because the patch did not apply cleanly. I've cleaned it up and pushed it now. R. On 30/09/2022 16:30, Seija Kijin via Gcc-patches wrote: Yes, please! On Tue, Sep 6, 2022 at 10:48 AM Kyrylo Tkachov wrote: Hi Seija,

Re: [GCC][PATCH v2] arm: Add cde feature support for Cortex-M55 CPU.

On 31/10/2022 12:38, Srinath Parvathaneni via Gcc-patches wrote: Hi, -Original Message- From: Christophe Lyon Sent: Monday, October 17, 2022 2:30 PM To: Srinath Parvathaneni ; gcc- patc...@gcc.gnu.org Cc: Richard Earnshaw Subject: Re: [GCC][PATCH] arm: Add cde feature support for

Re: [PATCH 3/9] arm: Don't add crtfastmath.o for -shared

On 13/01/2023 08:00, Richard Biener via Gcc-patches wrote: Don't add crtfastmath.o for -shared to avoid altering the FP environment when loading a shared library. PR target/55522 * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared. *

Re: [PATCH 1/9] aarch64: Don't add crtfastmath.o for -shared

On 13/01/2023 07:59, Richard Biener via Gcc-patches wrote: Don't add crtfastmath.o for -shared to avoid altering the FP environment when loading a shared library. PR target/55522 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.

Re: [PATCH] testsuite: Skip intrinsics test if arm

On 19/09/2022 17:16, Torbjörn SVENSSON via Gcc-patches wrote: In the test case, it's clearly written that intrinsics is not implemented on arm*. A simple xfail does not help since there are link error and that would cause an UNRESOLVED testcase rather than XFAIL. By chaning to dg-skip-if, the

Re: [PATCH] [PR42093] [arm] [thumb2] disable tree-dce for test

On 02/12/2022 09:26, Alexandre Oliva via Gcc-patches wrote: CD-DCE introduces blocks to share common PHI nodes, which replaces a backwards branch that used to prevent the thumb2 jump table shortening that PR42093 tested for. In order to keep on testing that the backward branch prevents the

Re: [PATCH] [PR40457] [arm] expand SI-aligned movdi into pair of movsi

On 02/12/2022 09:29, Alexandre Oliva via Gcc-patches wrote: When expanding a misaligned DImode move, emit aligned SImode moves if the parts are sufficiently aligned. This enables neighboring stores to be peephole-combined into stm, as expected by the PR40457 testcase, even after SLP

Re: [PATCH 12/15 V5] arm: implement bti injection

On 22/12/2022 17:13, Andrea Corallo via Gcc-patches wrote: Richard Earnshaw writes: On 14/12/2022 17:00, Richard Earnshaw via Gcc-patches wrote: On 14/12/2022 16:40, Andrea Corallo via Gcc-patches wrote: Hi Richard, thanks for reviewing. Richard Earnshaw writes: On 28/10/2022 17:40

Re: [PATCH 1/15 V2] arm: Make mbranch-protection opts parsing common to AArch32/64

On 22/12/2022 17:04, Andrea Corallo via Gcc-patches wrote: Hi all, respinning this as a rebase was necessary, also now is setting 'aarch_enable_bti' to zero as default for arm as suggested during the review of 12/15. Best Regards Andrea gcc/ChangeLog: *

Re: [PATCH 10/15 V7] arm: Implement cortex-M return signing address codegen

On 11/01/2023 09:58, Andrea Corallo via Gcc-patches wrote: Richard Earnshaw writes: [...] Otherwise ok with that change. R. Minor respin of this patch addressing the suggestion to have 'use_return_insn' return zero when PAC is enabled. BR Andrea + /* Never use a return

Re: [PATCH 9/15] arm: Set again stack pointer as CFA reg when popping if necessary

On 09/01/2023 16:48, Richard Earnshaw via Gcc-patches wrote: On 09/01/2023 14:58, Andrea Corallo via Gcc-patches wrote: Andrea Corallo via Gcc-patches writes: Richard Earnshaw writes: On 27/09/2022 16:24, Kyrylo Tkachov via Gcc-patches wrote: -Original Message- From

Re: [PATCH 9/15] arm: Set again stack pointer as CFA reg when popping if necessary

On 09/01/2023 14:58, Andrea Corallo via Gcc-patches wrote: Andrea Corallo via Gcc-patches writes: Richard Earnshaw writes: On 27/09/2022 16:24, Kyrylo Tkachov via Gcc-patches wrote: -Original Message- From: Andrea Corallo Sent: Tuesday, September 27, 2022 11:06 AM To: Kyrylo

Re: [PATCH 9/15] arm: Set again stack pointer as CFA reg when popping if necessary

On 09/01/2023 14:58, Andrea Corallo via Gcc-patches wrote: Andrea Corallo via Gcc-patches writes: Richard Earnshaw writes: On 27/09/2022 16:24, Kyrylo Tkachov via Gcc-patches wrote: -Original Message- From: Andrea Corallo Sent: Tuesday, September 27, 2022 11:06 AM To: Kyrylo

[committed] arm: correctly define __ARM_FEATURE_CLZ

The ACLE requires that __ARM_FEATURE_CLZ be defined if the hardware supports it; it's also clear that this doesn't mean the current ISA, so we must define this even when compiling for Thumb1 if the target supports CLZ in A32. This brings GCC into alignment with Clang. gcc/ChangeLog: *

Re: [PATCH 12/15 V4] arm: implement bti injection

On 14/12/2022 17:00, Richard Earnshaw via Gcc-patches wrote: On 14/12/2022 16:40, Andrea Corallo via Gcc-patches wrote: Hi Richard, thanks for reviewing. Richard Earnshaw writes: On 28/10/2022 17:40, Andrea Corallo via Gcc-patches wrote: Hi all, please find attached the third

Re: [PATCH 12/15 V4] arm: implement bti injection

On 14/12/2022 16:40, Andrea Corallo via Gcc-patches wrote: Hi Richard, thanks for reviewing. Richard Earnshaw writes: On 28/10/2022 17:40, Andrea Corallo via Gcc-patches wrote: Hi all, please find attached the third iteration of this patch addresing review comments. Thanks Andrea

Re: [PATCH 10/15 V6] arm: Implement cortex-M return signing address codegen

On 14/12/2022 16:35, Andrea Corallo via Gcc-patches wrote: Richard Earnshaw writes: [...] + if (TARGET_TPCS_FRAME) +error ("Return address signing and %<-mtpcs-frame%> are incompatible."); So really this is 'not implemented' rather than not compatible - I don't see why we

Re: [PATCH 10/15 V5] arm: Implement cortex-M return signing address codegen

On 09/12/2022 14:16, Andrea Corallo via Gcc-patches wrote: Hi Richard, thanks for reviewing. Richard Earnshaw writes: On 07/11/2022 08:57, Andrea Corallo via Gcc-patches wrote: Hi all, please find attached the lastest version of this patch incorporating some more improvents. Feel free

Re: [PATCH]AArch64 div-by-255, ensure that arguments are registers. [PR107988]

On 08/12/2022 16:39, Tamar Christina via Gcc-patches wrote: Hi All, At -O0 (as opposed to e.g. volatile) we can get into the situation where the in0 and result RTL arguments passed to the division function are memory locations instead of registers. I think we could reject these early on by

Re: [GCC][PATCH 13/15, v4] arm: Add support for dwarf debug directives and pseudo hard-register for PAC feature.

On 09/11/2022 14:32, Srinath Parvathaneni via Gcc-patches wrote: Hello, This patch teaches the DWARF support in gcc about RA_AUTH_CODE pseudo hard-register and also updates the ".save", ".cfi_register", ".cfi_offset", ".cfi_restore" directives accordingly. This patch also adds support to

Re: [GCC][PATCH v2] arm: Add pacbti related multilib support for armv8.1-m.main.

On 31/10/2022 15:36, Srinath Parvathaneni via Gcc-patches wrote: Hi, This patch adds the support for pacbti multlilib linking by making "-mbranch-protection=none" as default in the command line for all M-profile targets and uses "-mbranch-protection=none" for multilib matching. If any valid

Re: [PATCH 10/15 V4] arm: Implement cortex-M return signing address codegen

On 06/12/2022 15:46, Andrea Corallo wrote: Hi Richard, thanks for reviewing. Just one clarification before I complete the respin of this patch. Richard Earnshaw writes: [...] Also, I think (out of an abundance of caution) we really need a scheduling barrier placed before calls to

Re: [PATCH 12/15 V3] arm: implement bti injection

On 28/10/2022 17:40, Andrea Corallo via Gcc-patches wrote: Hi all, please find attached the third iteration of this patch addresing review comments. Thanks Andrea @@ -23374,12 +23374,6 @@ output_probe_stack_range (rtx reg1, rtx reg2) return ""; } -static bool -aarch_bti_enabled

Re: [PATCH 10/15 V4] arm: Implement cortex-M return signing address codegen

On 07/11/2022 08:57, Andrea Corallo via Gcc-patches wrote: Hi all, please find attached the lastest version of this patch incorporating some more improvents. Feel free to ignore V3. Best Regards Andrea > As part of previous upstream suggestions a test for varargs has been > added

[PATCH] sync libsframe toplevel from binutils-gdb

This pulls in the toplevel portion of this binutils-gdb commit: 19e559f1c91bfaedbd2f91d85ee161f3f03fda3c libsframe: add the SFrame library ChangeLog: * Makefile.def: Add libsframe as new module with its dependencies. * Makefile.in: Regenerated. * configure.ac: Add

Re: [Patch Arm] Fix PR 92999

On 11/11/2022 21:50, Ramana Radhakrishnan via Gcc-patches wrote: On Thu, Nov 10, 2022 at 7:46 PM Ramana Radhakrishnan wrote: On Thu, Nov 10, 2022 at 6:03 PM Richard Earnshaw wrote: On 10/11/2022 17:21, Richard Earnshaw via Gcc-patches wrote: On 08/11/2022 18:20, Ramana

Re: [PATCH] aarch64: Fix test_dfp_17.c for big-endian [PR 107604]

On 22/11/2022 13:09, Christophe Lyon wrote: On 11/22/22 12:33, Richard Earnshaw wrote: On 22/11/2022 11:21, Richard Sandiford wrote: Richard Earnshaw via Gcc-patches writes: On 22/11/2022 09:01, Christophe Lyon via Gcc-patches wrote: gcc.target/aarch64/aapcs64/test_dfp_17.c has been

Re: [PATCH] aarch64: Fix test_dfp_17.c for big-endian [PR 107604]

On 22/11/2022 11:21, Richard Sandiford wrote: Richard Earnshaw via Gcc-patches writes: On 22/11/2022 09:01, Christophe Lyon via Gcc-patches wrote: gcc.target/aarch64/aapcs64/test_dfp_17.c has been failing on big-endian, because the _Decimal32 on-stack argument is not padded in the same

Re: [PATCH] aarch64: Fix test_dfp_17.c for big-endian [PR 107604]

On 22/11/2022 09:01, Christophe Lyon via Gcc-patches wrote: gcc.target/aarch64/aapcs64/test_dfp_17.c has been failing on big-endian, because the _Decimal32 on-stack argument is not padded in the same direction depending on endianness. This patch fixes the testcase so that it expects the

Re: [Patch Arm] Fix PR 92999

On 10/11/2022 17:21, Richard Earnshaw via Gcc-patches wrote: On 08/11/2022 18:20, Ramana Radhakrishnan via Gcc-patches wrote: PR92999 is a case where the VFP calling convention does not allocate enough FP registers for a homogenous aggregate containing FP16 values. I believe

Re: [Patch Arm] Fix PR 92999

On 08/11/2022 18:20, Ramana Radhakrishnan via Gcc-patches wrote: PR92999 is a case where the VFP calling convention does not allocate enough FP registers for a homogenous aggregate containing FP16 values. I believe this is the complete fix but would appreciate another set of eyes on this.

Re: [PATCH 9/15] arm: Set again stack pointer as CFA reg when popping if necessary

On 26/10/2022 09:49, Andrea Corallo via Gcc-patches wrote: Richard Earnshaw writes: On 27/09/2022 16:24, Kyrylo Tkachov via Gcc-patches wrote: -Original Message- From: Andrea Corallo Sent: Tuesday, September 27, 2022 11:06 AM To: Kyrylo Tkachov Cc: Andrea Corallo via

Re: [PING][PATCH 0/15] arm: Enables return address verification and branch target identification on Cortex-M

On 21/09/2022 09:07, Andrea Corallo via Gcc-patches wrote: Hi all, ping^2 for patches 9/15 7/15 11/15 12/15 and 10/15 V2 of this series. Andrea Subject says xx/15, but I only see 1-12 from you. R.

Re: [PATCH 13/15] arm: Add pacbti related multilib support for armv8.1-m.main.

On 12/08/2022 18:10, Srinath Parvathaneni via Gcc-patches wrote: Hi, This patch supports following -march/-mbranch-protection combination by linking them to existing pacbti multilibs. $ -march=armv8.1-m.main+pacbti+fp.dp+mve.fp -mbranch-protection=standard -mfloat-abi=hard -mthumb $

Re: [PATCH 10/15 V2] arm: Implement cortex-M return signing address codegen

On 14/09/2022 15:20, Andrea Corallo via Gcc-patches wrote: Hi all, this patch enables address return signature and verification based on Armv8.1-M Pointer Authentication [1]. To sign the return address, we use the PAC R12, LR, SP instruction upon function entry. This is signing LR using SP

Re: [PATCH 9/15] arm: Set again stack pointer as CFA reg when popping if necessary

On 27/09/2022 16:24, Kyrylo Tkachov via Gcc-patches wrote: -Original Message- From: Andrea Corallo Sent: Tuesday, September 27, 2022 11:06 AM To: Kyrylo Tkachov Cc: Andrea Corallo via Gcc-patches ; Richard Earnshaw ; nd Subject: Re: [PATCH 9/15] arm: Set again stack pointer as

Re: [PATCH 7/15] arm: Emit build attributes for PACBTI target feature

On 12/08/2022 16:30, Andrea Corallo via Gcc-patches wrote: This patch emits assembler directives for PACBTI build attributes as defined by the ABI. gcc/ChangeLog: * config/arm/arm.c (arm_file_start):

Re: [PATCH 1/2] Add a parameter for the builtin function of prefetch to align with LLVM

On 20/10/2022 18:37, Andrew Pinski via Gcc-patches wrote: On Thu, Oct 20, 2022 at 10:28 AM Segher Boessenkool wrote: On Thu, Oct 20, 2022 at 01:44:15AM +, Jiang, Haochen wrote: Maybe the testcase change cause some misunderstanding and concern. Actually, the patch did not disrupt the

Re: [PATCH 7/15] arm: Emit build attributes for PACBTI target feature

On 20/10/2022 15:47, Kyrylo Tkachov via Gcc-patches wrote: Hi Andrea, -Original Message- From: Gcc-patches On Behalf Of Andrea Corallo via Gcc-patches Sent: Friday, August 12, 2022 4:31 PM To: Andrea Corallo via Gcc-patches Cc: Richard Earnshaw ; nd Subject: [PATCH 7/15] arm:

Re: [PATCH 1/2] Add a parameter for the builtin function of prefetch to align with LLVM

On 14/10/2022 09:34, Haochen Jiang via Gcc-patches wrote: gcc/ChangeLog: * builtins.cc (expand_builtin_prefetch): Handle the fourth parameter in expand function. * config/aarch64/aarch64-sve.md: Add default parameter value. * config/aarch64/aarch64.md

Re: [PATCH] [testsuite][arm] Fix cmse-15.c expected output

On 23/09/2022 09:43, Torbjörn SVENSSON via Gcc-patches wrote: The cmse-15.c testcase fails at -Os because ICF means that we generate secure3: b secure1 which is OK, but does not match the currently expected secure3: ... bx r[0-3] gcc/testsuite/ChangeLog:

Re: [PATCH] arm: Add missing early clobber to MVE vrev64q_m patterns

On 03/10/2022 11:43, Christophe Lyon via Gcc-patches wrote: Like the non-predicated vrev64q patterns, mve_vrev64q_m_ and mve_vrev64q_m_f need an early clobber constraint, otherwise we can generate an unpredictable instruction: Warning: 64-bit element size and same destination and source

Re: [PATCH v2] testsuite: [arm] Relax expected register names in MVE tests

On 30/09/2022 12:19, Christophe Lyon via Gcc-patches wrote: These two tests have hardcoded q0 as destination/source of load/store instructions, but this register is actually used only under -mfloat-abi=hard. When using -mfloat-abi=softfp, other registers (eg. q3) can be used to transfer

Re: [PATCH][committed] aarch64: Suggest an -mcpu option when user passes CPU name to -march

On 05/09/2022 14:35, Kyrylo Tkachov via Gcc-patches wrote: Hi all, This small patch helps users who confuse -march and -mcpu on AArch64. Sometimes users pass -march with a CPU name, where they most likely wanted to use -mcpu, which would select the right architecture features *and* tune for

Re: [GCC 13/15][PATCH v3] arm: Add support for dwarf debug directives and pseudo hard-register for PAC feature.

On 19/08/2022 11:04, Srinath Parvathaneni via Gcc-patches wrote: Hello, This patch teaches the DWARF support in gcc about RA_AUTH_CODE pseudo hard-register and also .save {ra_auth_code} and .cfi_offset ra_auth_code dwarf directives for the PAC feature in Armv8.1-M architecture.

Re: [GCC][PATCH v2] arm: Add support for Arm Cortex-M85 CPU.

On 12/08/2022 18:20, Srinath Parvathaneni via Gcc-patches wrote: Hi, This patch adds the -mcpu support for the Arm Cortex-M85 CPU which is an Armv8.1-M Mainline CPU supporting MVE and PACBTI by default. -mpcu=cortex-m85 switch by default matches to

Re: [PATCH, GCC, AARCH64, 5/6] Enable BTI : Add new pass for BTI.

On 18/08/2022 01:00, Andrew Pinski via Gcc-patches wrote: On Fri, Nov 2, 2018 at 11:39 AM Sudakshina Das wrote: Hi This patch is part of a series that enables ARMv8.5-A in GCC and adds Branch Target Identification Mechanism.

Re: [PATCH] arm: Define with_float to hard when target name ends with hf

On 17/08/2022 09:35, Christophe Lyon via Gcc-patches wrote: On arm, the --with-float= configure option is used to define include files search path (among other things). However, when targeting arm-linux-gnueabihf, one would expect to automatically default to the hard-float ABI, but this is

Re: [GCC][PATCH] arm: Add support for Arm Cortex-M85 CPU.

On 05/08/2022 16:20, Srinath Parvathaneni via Gcc-patches wrote: Hi, This patch adds the -mcpu support for the Arm Cortex-M85 CPU which is an Armv8.1-M Mainline CPU supporting MVE and PACBTI by default. -mpcu=cortex-m85 switch by default matches to

Re: [RFA configure parts] aarch64: Make cc1 handle --with options

On 05/08/2022 14:53, Richard Sandiford via Gcc-patches wrote: Richard Earnshaw writes: On 13/06/2022 15:33, Richard Sandiford via Gcc-patches wrote: On aarch64, --with-arch, --with-cpu and --with-tune only have an effect on the driver, so “./xgcc -B./ -O3” can give significantly different

Re: [PATCH v2] cselib: add function to check if SET is redundant [PR106187]

On 03/08/2022 00:36, Jeff Law wrote: On 8/2/2022 10:06 AM, Richard Earnshaw wrote: On 01/08/2022 11:38, Richard Earnshaw via Gcc-patches wrote: On 30/07/2022 20:57, Jeff Law via Gcc-patches wrote: On 7/29/2022 7:52 AM, Richard Earnshaw via Gcc-patches wrote: A SET operation

Re: [PATCH v2] cselib: add function to check if SET is redundant [PR106187]

On 01/08/2022 11:38, Richard Earnshaw via Gcc-patches wrote: On 30/07/2022 20:57, Jeff Law via Gcc-patches wrote: On 7/29/2022 7:52 AM, Richard Earnshaw via Gcc-patches wrote: A SET operation that writes memory may have the same value as an earlier store but if the alias sets of the new

Re: [RFA configure parts] aarch64: Make cc1 handle --with options

On 13/06/2022 15:33, Richard Sandiford via Gcc-patches wrote: On aarch64, --with-arch, --with-cpu and --with-tune only have an effect on the driver, so “./xgcc -B./ -O3” can give significantly different results from “./cc1 -O3”. --with-arch did have a limited effect on ./cc1 in previous

Re: [PATCH v2] cselib: add function to check if SET is redundant [PR106187]

On 30/07/2022 20:57, Jeff Law via Gcc-patches wrote: On 7/29/2022 7:52 AM, Richard Earnshaw via Gcc-patches wrote: A SET operation that writes memory may have the same value as an earlier store but if the alias sets of the new and earlier store do not conflict then the set is not truly

[PATCH v2] cselib: add function to check if SET is redundant [PR106187]

A SET operation that writes memory may have the same value as an earlier store but if the alias sets of the new and earlier store do not conflict then the set is not truly redundant. This can happen, for example, if objects of different types share a stack slot. To fix this we define a new

Re: cselib: add function to check if SET is redundant [PR106187]

On 29/07/2022 08:06, Richard Biener via Gcc-patches wrote: On Thu, Jul 28, 2022 at 6:46 PM Richard Earnshaw wrote: [resend with correct subject line] A SET operation that writes memory may have the same value as an earlier store but if the alias sets of the new and earlier store do not

cselib: add function to check if SET is redundant [PR106187]

[resend with correct subject line] A SET operation that writes memory may have the same value as an earlier store but if the alias sets of the new and earlier store do not conflict then the set is not truly redundant. This can happen, for example, if objects of different types share a stack

http://pdtlreviewboard.cambridge.arm.com/r/16099/

A SET operation that writes memory may have the same value as an earlier store but if the alias sets of the new and earlier store do not conflict then the set is not truly redundant. This can happen, for example, if objects of different types share a stack slot. To fix this we define a new

Re: [PATCH Rust front-end v1 3/4] Add Rust target hooks to ARM

On 27/07/2022 14:40, herron.philip--- via Gcc-patches wrote: From: Philip Herron This adds the nessecary target hooks for the arm target. gcc/ChangeLog: * config.gcc: add rust_target_objs for arm gcc/config/arm/ChangeLog: * arm-protos.h: define arm_rust_target_cpu_info

Re: [PATCH 9/12 V2] arm: Make libgcc bti compatible

On 22/07/2022 16:09, Andrea Corallo via Gcc-patches wrote: Richard Earnshaw writes: On 21/07/2022 10:17, Andrea Corallo via Gcc-patches wrote: Richard Earnshaw writes: On 28/04/2022 10:48, Andrea Corallo via Gcc-patches wrote: This change add bti instructions at the beginning of arm

Re: [PATCH 9/12 V2] arm: Make libgcc bti compatible

On 21/07/2022 10:17, Andrea Corallo via Gcc-patches wrote: Richard Earnshaw writes: On 28/04/2022 10:48, Andrea Corallo via Gcc-patches wrote: This change add bti instructions at the beginning of arm specific libgcc hand written assembly routines. 2022-03-31 Andrea Corallo *

Re: [PATCH 8/12 V3] arm: Introduce multilibs for PACBTI target feature

On 21/07/2022 10:04, Andrea Corallo via Gcc-patches wrote: Richard Earnshaw writes: [...] The documentation mentions -mbranch-protection=standard+leaf, so you're missing a mapping for that. OK with that change. R. Oh, and please add some tests to

Re: [PATCH 7/12 V2] arm: Emit build attributes for PACBTI target feature

On 13/07/2022 09:58, Andrea Corallo via Gcc-patches wrote: Richard Earnshaw writes: On 28/04/2022 10:45, Andrea Corallo via Gcc-patches wrote: This patch emits assembler directives for PACBTI build attributes as defined by the ABI.

Re: [PATCH 5/12 V2] arm: Implement target feature macros for PACBTI

On 12/07/2022 16:45, Andrea Corallo via Gcc-patches wrote: Richard Earnshaw writes: On 28/04/2022 10:42, Andrea Corallo via Gcc-patches wrote: This patch implements target feature macros when PACBTI is enabled through the -march option or -mbranch-protection. The target feature macros

Re: [PATCH 4/12] arm: Add testsuite library support for PACBTI target

On 04/07/2022 15:47, Andrea Corallo wrote: Richard Earnshaw writes: On 01/07/2022 14:03, Richard Earnshaw via Gcc-patches wrote: On 28/04/2022 10:40, Andrea Corallo via Gcc-patches wrote: Add targeting-checking entities for PACBTI in testsuite framework. Pre-approved with the requested

Re: [PATCH 3/12 V2] arm: Add option -mbranch-protection

On 04/07/2022 10:27, Andrea Corallo via Gcc-patches wrote: Richard Earnshaw writes: [...] +@item +-mbranch-protection=@var{none}|@var{standard}|@var{pac-ret}[+@var{leaf}][+@var{bti}]|@var{bti}[+@var{pac-ret}[+@var{leaf}]] +@opindex mbranch-protection +Enable branch protection features

Re: [PATCH 12/12 V2] arm: implement bti injection

On 28/06/2022 10:21, Andrea Corallo via Gcc-patches wrote: Hi all, second iteration of this patch enabling Branch Target Identification Armv8.1-M Mechanism [1]. This is achieved by using the bti pass made common with Aarch64. The pass iterates through the instructions and adds the

Re: [PATCH 11/12] aarch64: Make bti pass generic so it can be used by the arm backend

On 28/04/2022 10:51, Andrea Corallo via Gcc-patches wrote: Hi all, this patch splits and restructures the aarch64 bti pass code in order to have it usable by the arm backend as well. These changes have no functional impact. Best Regards Andrea gcc/Changelog * config.gcc

Re: [PATCH 10/12 V2] arm: Implement cortex-M return signing address codegen

On 28/06/2022 10:17, Andrea Corallo via Gcc-patches wrote: Hi all, second version of this patch enabling address return signature and verification based on Armv8.1-M Pointer Authentication [1]. To sign the return address, we use the PAC R12, LR, SP instruction upon function entry. This is

Re: [PATCH 9/12] arm: Make libgcc bti compatible

On 28/04/2022 10:48, Andrea Corallo via Gcc-patches wrote: This change add bti instructions at the beginning of arm specific libgcc hand written assembly routines. 2022-03-31 Andrea Corallo * libgcc/config/arm/crti.S (FUNC_START): Add bti instruction if necessary.

Re: [PATCH 8/12 V2] arm: Introduce multilibs for PACBTI target feature

On 01/07/2022 15:54, Richard Earnshaw via Gcc-patches wrote: On 01/06/2022 13:32, Andrea Corallo via Gcc-patches wrote: Hi all, second iteration of the previous patch adding the following new multilibs: thumb/v8.1-m.main+pacbti/mbranch-protection/nofp thumb/v8.1-m.main+pacbti+dp/mbranch

Re: [PATCH 8/12 V2] arm: Introduce multilibs for PACBTI target feature

On 01/06/2022 13:32, Andrea Corallo via Gcc-patches wrote: Hi all, second iteration of the previous patch adding the following new multilibs: thumb/v8.1-m.main+pacbti/mbranch-protection/nofp thumb/v8.1-m.main+pacbti+dp/mbranch-protection/soft

Re: [PATCH 7/12] arm: Emit build attributes for PACBTI target feature

On 28/04/2022 10:45, Andrea Corallo via Gcc-patches wrote: This patch emits assembler directives for PACBTI build attributes as defined by the ABI. gcc/ChangeLog: * config/arm/arm.c (arm_file_start):

Re: [PATCH 6/12] arm: Add pointer authentication for stack-unwinding runtime

On 28/04/2022 10:44, Andrea Corallo via Gcc-patches wrote: This patch adds authentication for when the stack is unwound when an exception is taken. All the changes here are done to the runtime code in libgcc's unwinder code for Arm target. All the changes are guarded under defined

Re: [PATCH 5/12] arm: Implement target feature macros for PACBTI

On 28/04/2022 10:42, Andrea Corallo via Gcc-patches wrote: This patch implements target feature macros when PACBTI is enabled through the -march option or -mbranch-protection. The target feature macros __ARM_FEATURE_PAC_DEFAULT and __ARM_FEATURE_BTI_DEFAULT are specified in ARM ACLE

Re: [PATCH 4/12] arm: Add testsuite library support for PACBTI target

On 01/07/2022 14:03, Richard Earnshaw via Gcc-patches wrote: On 28/04/2022 10:40, Andrea Corallo via Gcc-patches wrote: Add targeting-checking entities for PACBTI in testsuite framework. Pre-approved with the requested changes here <https://gcc.gnu.org/pipermail/gcc-patches/2021-Decem

Re: [PATCH 4/12] arm: Add testsuite library support for PACBTI target

On 28/04/2022 10:40, Andrea Corallo via Gcc-patches wrote: Add targeting-checking entities for PACBTI in testsuite framework. Pre-approved with the requested changes here . gcc/testsuite/ChangeLog: *

Re: [PATCH 3/12] arm: Add option -mbranch-protection

On 28/04/2022 10:38, Andrea Corallo via Gcc-patches wrote: [PATCH 3/12] arm: Add option -mbranch-protection Add -mbranch-protection option. This option enables the code-generation of pointer signing and authentication instructions in function prologues and epilogues. gcc/ChangeLog:

  1   2   3   4   >