Patch attached.
On 13/09/2019 13:34, Sam Tebbs wrote:
> Hi all,
>
> This patch changes my email address in the MAINTAINERS file. Committed
> as r275697.
>
> 2019-09-13 Sam Tebbs
>
> gcc/ChangeLog
>
> * MAINTAINERS (Sam Tebbs): Update email address.
Hi all,
This patch changes my email address in the MAINTAINERS file. Committed
as r275697.
2019-09-13 Sam Tebbs
gcc/ChangeLog
* MAINTAINERS (Sam Tebbs): Update email address.
of binutils where it passes, and with a non-recent
version where it is unsupported.
OK for trunk?
Sam
gcc/testsuite
2019-08-02 Sam Tebbs
* lib/target-supports.exp
(check_effective_target_arm_v8_4a_bkey_directive): New proc.
* g++.target/aarch64
On 05/07/2019 11:33, Richard Earnshaw wrote:
>
> On 02/07/2019 12:00, Sam Tebbs wrote:
>> Hi all,
>>
>> This patch fixes the regression to gcc.dg/rtl/aarch64/subs_adds_sp.c that
>> r271735 caused. This was done by ensuring that the current function's
>> frame
.
OK for trunk?
Sam Tebbs
gcc/
2019-06-20 Sam Tebbs
PR target/90712
* aarch64/aarch64.c (aarch64_post_cfi_startproc): Replace thunk check
with a frame laid out check.
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index
On 07/06/2019 13:40, Christophe Lyon wrote:
> On Wed, 5 Jun 2019 at 13:07, Sam Tebbs wrote:
>> Committed as obvious as r271954.
>>
>> On 05/06/2019 11:20, Sam Tebbs wrote:
>>> Hi all,
>>>
>>> When committing my b-key patch (r271735) I didn't svn
Committed as obvious as r271954.
On 05/06/2019 11:20, Sam Tebbs wrote:
> Hi all,
>
> When committing my b-key patch (r271735) I didn't svn add the new test
> files, this patch adds them and moves the exception tests to
> g++.target/aarch64.
>
> Tested on aarch64-none-linux
Hi all,
When committing my b-key patch (r271735) I didn't svn add the new test
files, this patch adds them and moves the exception tests to
g++.target/aarch64.
Tested on aarch64-none-linux-gnu and aarch64-none-elf.
OK for trunk?
gcc/testsuite
2019-06-05 Sam Tebbs
* gcc.target/aarch64
Hi all,
Libstdc++ has been failing to build after I committed r271735. This
patch fixes
the build failure by checking if the current function is a thunk
before emitting the .cfi_b_key_frame directive.
Committed as obvious in r271780. Apologies for the failure.
2019-05-30 Sam Tebbs
The fix has been committed as r271780. Apologies for the failure everyone.
Sam
On 29/05/2019 15:22, Sam Tebbs wrote:
> Thanks for finding this Christoph, I had this failure a while ago but it
> stopped happening so I thought all was good. I have a fix ready.
>
> Sam
>
> O
Thanks for finding this Christoph, I had this failure a while ago but it
stopped happening so I thought all was good. I have a fix ready.
Sam
On 29/05/2019 12:22, Christophe Lyon wrote:
> On Wed, 29 May 2019 at 11:23, Sam Tebbs wrote:
>> The libgcc changes have been acknowledged
The libgcc changes have been acknowledged off-list. Committed as r271735.
On 01/03/2019 14:12, Sam Tebbs wrote:
> On 31/01/2019 14:54, Sam Tebbs wrote:
>>
>>> ping 3. The preceding two patches were committed a while ago but require
>>> the minor libgcc changes in thi
On 31/01/2019 14:54, Sam Tebbs wrote:
>
>> ping 3. The preceding two patches were committed a while ago but require
>> the minor libgcc changes in this patch, which are the only parts left to
>> be reviewed.
> ping 4
Attached is a rebased patch made to work on to
On 19/01/2019 23:37, Gerald Pfeifer wrote:
> On Thu, 10 Jan 2019, Sam Tebbs wrote:
>>> I believe this should also be covered in the GCC 9 release notes
>>> at https://gcc.gnu.org/gcc-9/changes.html ?
>> Sorry for the late reply. My email filters seem to have stumble
On 23/01/2019 10:22, Sam Tebbs wrote:
> On 14/01/2019 10:43, Kyrill Tkachov wrote:
>
>> On 08/01/19 11:38, Sam Tebbs wrote:
>>
>>
>>
>> On 1/7/19 6:28 PM, James Greenhalgh wrote:
>>
>> > On Fri, Dec 21, 2018 at 09:00:10AM -0600, Sam Tebbs w
On 14/01/2019 10:43, Kyrill Tkachov wrote:
>
> On 08/01/19 11:38, Sam Tebbs wrote:
>>
>> On 1/7/19 6:28 PM, James Greenhalgh wrote:
>> > On Fri, Dec 21, 2018 at 09:00:10AM -0600, Sam Tebbs wrote:
>> >> On 11/9/18 11:04 AM, Sam Tebbs wrote:
>> >
On 12/27/18 12:54 AM, Gerald Pfeifer wrote:
> On Fri, 23 Nov 2018, Sam Tebbs wrote:
>> The mtune= documentation in doc/invoke.texi contains some obsolete CPU names
>> that have been removed from the Arm and AArch64 backends. This patch removes
>> them.
> I believe thi
On 1/7/19 6:28 PM, James Greenhalgh wrote:
> On Fri, Dec 21, 2018 at 09:00:10AM -0600, Sam Tebbs wrote:
>> On 11/9/18 11:04 AM, Sam Tebbs wrote:
>
>
>
>> Attached is an improved patch with "hint" removed from the test scans,
>> pauth_hint_num_a and pau
On 1/7/19 6:11 PM, James Greenhalgh wrote:
> On Thu, Dec 20, 2018 at 10:38:42AM -0600, Sam Tebbs wrote:
>> On 11/22/18 4:54 PM, Sam Tebbs wrote:
>
>
>> Hi all,
>>
>> Attached is an updated patch with branch_protec_type renamed to
>> branch_protect_typ
On 12/20/18 4:38 PM, Sam Tebbs wrote:
> On 11/22/18 4:54 PM, Sam Tebbs wrote:
>> On 11/12/18 6:24 PM, Sudakshina Das wrote:
>>> Hi Sam
>>>
>>> On 02/11/18 17:31, Sam Tebbs wrote:
>>>> Hi all,
>>>>
>>>> The -mbranch-pr
On 12/21/18 3:00 PM, Sam Tebbs wrote:
> On 11/9/18 11:04 AM, Sam Tebbs wrote:
>> On 11/02/2018 06:01 PM, Sam Tebbs wrote:
>>
>>> On 11/02/2018 05:35 PM, Sam Tebbs wrote:
>>>
>>>> Hi all,
>>>>
>>>> This patch adds support for
On 1/4/19 4:19 PM, Wilco Dijkstra wrote:
> Hi Sam,
>
> This is a trivial test fix, so it falls under the obvious rule and can be
> committed without approval - https://www.gnu.org/software/gcc/svnwrite.html
>
> Cheers,
> Wilco
Hi Wilco,
Thanks, committed as r267579.
On 1/4/19 3:49 PM, Sudakshina Das wrote:
> Hi Sam
>
> On 04/01/19 10:26, Sam Tebbs wrote:
>> On 12/19/18 4:47 PM, Sam Tebbs wrote:
>>
>>> Hi all,
>>>
>>> Since r265398 (combine: Do not combine moves from hard registers), the bfxil
>>> sc
On 12/19/18 4:47 PM, Sam Tebbs wrote:
> Hi all,
>
> Since r265398 (combine: Do not combine moves from hard registers), the bfxil
> scan in gcc.target/aarch64/combine_bfxil.c has been failing.
>
> FAIL: gcc.target/aarch64/combine_bfxil.c scan-assembler-times bfxil\\t 13
>
On 11/9/18 11:04 AM, Sam Tebbs wrote:
> On 11/02/2018 06:01 PM, Sam Tebbs wrote:
>
>> On 11/02/2018 05:35 PM, Sam Tebbs wrote:
>>
>>> Hi all,
>>>
>>> This patch adds support for the Armv8.3-A pointer authentication
>>> instructions
>>&g
On 11/22/18 4:54 PM, Sam Tebbs wrote:
> On 11/12/18 6:24 PM, Sudakshina Das wrote:
>> Hi Sam
>>
>> On 02/11/18 17:31, Sam Tebbs wrote:
>>> Hi all,
>>>
>>> The -mbranch-protection option combines the functionality of
>>> -msign-return-addr
On 12/20/18 10:38 AM, Sam Tebbs wrote:
> On 11/24/18 11:29 AM, Christophe Lyon wrote:
>
>> On Thu, 22 Nov 2018 at 18:30, Vladimir Makarov
>> wrote:
>>> The following patch fixes
>>>
>>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87718
>>
On 11/24/18 11:29 AM, Christophe Lyon wrote:
> On Thu, 22 Nov 2018 at 18:30, Vladimir Makarov
> wrote:
>> The following patch fixes
>>
>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87718
>>
>> The patch adds a special treatment for moves with a hard register in
>> register cost and class
.
OK for trunk?
gcc/testsuite/Changelog:
2018-12-19 Sam Tebbs
* gcc.target/aarch64/combine_bfxil.c: Change
scan-assembler-times bfxil count to 18.
diff --git a/gcc/testsuite/gcc.target/aarch64/combine_bfxil.c
b/gcc/testsuite/gcc.target/aarch64/combine_bfxil.c
index
On 12/13/18 7:03 PM, Jason Merrill wrote:
> And this seems consistent with the other stuff in
> dwarf2out_do_cfi_startproc. You might amend the documentation to
> mention that the expected use is to add more .cfi_* directives. OK
> with that change.
>
> Jason
Hi Jason,
Thanks for the
On 11/5/18 10:18 AM, Sam Tebbs wrote:
> On 11/05/2018 07:54 AM, Richard Biener wrote:
>> On Fri, 2 Nov 2018, Sam Tebbs wrote:
>>
>>> On 11/02/2018 05:28 PM, Sam Tebbs wrote:
>>>
>>>> Hi all,
>>>>
>>>> This patch ad
On 11/23/18 5:01 PM, Sam Tebbs wrote:
> Hi all,
>
> Currently on AArch32, invoking with -march=armv8.2-a+dotprod -mfpu=neon
> incorrectly enables armv7 dotproduct. This patch restricts dotproduct to armv8
> to correct the issue.
>
> When using a float ABI different from that
On 11/21/18 4:40 PM, Sam Tebbs wrote:
> On 11/2/18 6:07 PM, Sam Tebbs wrote:
>> On 11/02/2018 05:28 PM, Sam Tebbs wrote:
>>
>>> Hi all,
>>>
>>> This patch adds a new target hook called "asm_post_cfi_startproc". This
>>> hook is
>&
On 11/26/18 7:50 PM, Christoph Muellner wrote:
> The aarch64 ISA specification allows a left shift amount to be applied
> after extension in the range of 0 to 4 (encoded in the imm3 field).
>
> This is true for at least the following instructions:
>
> * ADD (extend register)
> * ADDS (extended
.
OK for trunk?
gcc/ChangeLog:
2018-11-23 Sam Tebbs
* config/arm/arm.h (TARGET_DOTPROD): Add TARGET_VFP5 constraint.
gcc/testsuite/ChangeLog:
2018-11-23 Sam Tebbs
* gcc.target/arm/neon-dotprod-restriction.c: New file.
* lib/target-supports.exp
been bootstrapped and
regression tested on aarch64-none-elf.
OK for trunk?
gcc/ChangeLog:
2018-11-23 Sam Tebbs
* doc/invoke.texi (-mtune=): Remove obsolete CPU names.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index
d46ebd02c4e0fee7b1c93a9e96d80113f6af93a7
. This patch
replaces calls to strtok with strtok_r to avoid these problems when
adding/modifying attribute behaviour in the future.
Bootstrapped and regression tested on aarch64-none-elf with no regressions.
OK for trunk?
gcc/ChangeLog:
2018-11-23 Sam Tebbs
* config/aarch64/aarch64.c
On 11/12/18 6:24 PM, Sudakshina Das wrote:
> Hi Sam
>
> On 02/11/18 17:31, Sam Tebbs wrote:
>> Hi all,
>>
>> The -mbranch-protection option combines the functionality of
>> -msign-return-address and the BTI features new in Armv8.5 to better reflect
>> their
On 11/2/18 6:07 PM, Sam Tebbs wrote:
> On 11/02/2018 05:28 PM, Sam Tebbs wrote:
>
>> Hi all,
>>
>> This patch adds a new target hook called "asm_post_cfi_startproc". This hook
>> is
>> intended to be used by the aarch64 backend to emit a directiv
On 11/08/2018 08:34 PM, Segher Boessenkool wrote:
> On Thu, Nov 08, 2018 at 03:44:44PM +0000, Sam Tebbs wrote:
>> Does your patch fix the incorrect generation of "scvtf s1, s1"? I was
>> looking at the issue as well and don't want to do any overlapping wo
On 11/02/2018 05:31 PM, Sam Tebbs wrote:
> Hi all,
>
> The -mbranch-protection option combines the functionality of
> -msign-return-address and the BTI features new in Armv8.5 to better reflect
> their relationship. This new option therefore supersedes and deprecates the
> exis
On 11/02/2018 06:01 PM, Sam Tebbs wrote:
> On 11/02/2018 05:35 PM, Sam Tebbs wrote:
>
>> Hi all,
>>
>> This patch adds support for the Armv8.3-A pointer authentication instructions
>> that use the B-key (pacib*, autib* and retab). This required adding builtins
>
On 11/05/2018 07:54 AM, Richard Biener wrote:
> On Fri, 2 Nov 2018, Sam Tebbs wrote:
>
>> On 11/02/2018 05:28 PM, Sam Tebbs wrote:
>>
>>> Hi all,
>>>
>>> This patch adds a new target hook called "asm_post_cfi_startproc". This
>>>
On 11/02/2018 05:28 PM, Sam Tebbs wrote:
> Hi all,
>
> This patch adds a new target hook called "asm_post_cfi_startproc". This hook
> is
> intended to be used by the aarch64 backend to emit a directive that enables
> support for unwinding frames signed with the
On 11/02/2018 05:35 PM, Sam Tebbs wrote:
> Hi all,
>
> This patch adds support for the Armv8.3-A pointer authentication instructions
> that use the B-key (pacib*, autib* and retab). This required adding builtins
> for
> pacib1716 and autib1716, adding the "b-key&q
with the B key when the function has been signed with the B key.
The previous patch in this series is here:
https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00104.html
Bootstrapped successfully and regression tested on aarch64-none-elf.
OK for trunk?
gcc/
2018-11-02 Sam Tebbs
* co
this series is here:
https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00103.html
Bootstrapped successfully and tested on aarch64-none-elf with no regressions.
OK for trunk?
gcc/ChangeLog:
2018-11-02 Sam Tebbs
* config/aarch64/aarch64.c (BRANCH_PROTEC_STR_MAX,
aarc
;.cfi_startproc" directive is emitted in
gcc/dwarf2out.c.
Bootstrapped on aarch64-none-linux-gnu and tested on aarch64-none-elf with no
regressions.
Ok for trunk?
gcc/
2018-11-02 Sam Tebbs
* doc/tm.texi (TARGET_ASM_POST_CFI_STARTPROC): Define.
* doc/tm.texi.in (TARGET_ASM_POST_CF
On 11/01/2018 11:56 AM, Sam Tebbs wrote:
> Hi all,
>
> Armv8.3-A has another key used in pointer authentication called the B-key
> (other
> than the A-key that is already supported). In order for stack unwinders to
> work
> it is necessary to be able to identify frames
one-elf, and tested on aarch64-none-elf
with no regressions. This patch has been tested with the corresponding patch
that enables B-key support in GCC.
OK for trunk?
bfd/
2018-11-01 Sam Tebbs
* elf-eh-frame.c (_bfd_elf_parse_eh_frame): Add check for 'B'.
gas/
2018-11-01 Sam Tebbs
On 10/23/2018 02:50 PM, Richard Earnshaw (lists) wrote:
> On 22/10/2018 10:02, Sam Tebbs wrote:
>> diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
>> index
>> d7473418a8eb62b2757017cd1675493f86e41ef4..77e6f75cc15f06733df7b47906ee00580bea8d29
&g
On 10/24/2018 03:26 PM, Sam Tebbs wrote:
> On 10/05/2018 01:11 PM, Sam Tebbs wrote:
>
>> Hi all,
>>
>> I recently found what seems to be an error in the options documentation
>> (gcc/doc/options.texi) where a list describing how _var_ is set (referring to
>> t
On 10/05/2018 01:11 PM, Sam Tebbs wrote:
> Hi all,
>
> I recently found what seems to be an error in the options documentation
> (gcc/doc/options.texi) where a list describing how _var_ is set (referring to
> the Var attribute) is written beneath the _Deprecated_ attribute instea
:
fmov d0, x0
cnt v0.8b, v0.8b
addv b0, v0.8b
fmov w0, s0
ret
Bootstrapped successfully and tested on aarch64-none-elf and
aarch64_be-none-elf with no regressions.
OK for trunk?
gcc/
2018-10-22 Sam Tebbs
* config/aarch64/aarch64.md (popcount2): Replaced zero_extend
On 10/12/2018 07:43 PM, Olivier Hainque wrote:
On 12 Oct 2018, at 05:50, Kyrill Tkachov wrote:
CC'ing the aarch64 maintainers as they'll have to approve it.
I'm guessing you've tested this in the usual way (bootstrap and test)?
Sorry, I failed to mention the testing indeed. We don't
have a
Sam Tebbs
* options.texi (Deprecated): Move list to Var section.
diff --git a/gcc/doc/options.texi b/gcc/doc/options.texi
index
f887d16f88f8e22d280d0ab20a6fde05eb86e3d8..e618b9543511fa102a45c521fe6bd7759c73ef8d
100644
--- a/gcc/doc/options.texi
+++ b/gcc/doc/options.texi
@@ -314,6
On 08/28/2018 11:54 PM, James Greenhalgh wrote:
OK once the other one is approved, with the obvious rebase over the renamed
function.
James
Here is the rebased patch. Still OK for me to commit to trunk now that
the other patch has been committed?
Sam
gcc/
2018-07-31 Sam Tebbs
On 09/11/2018 04:20 PM, James Greenhalgh wrote:
On Tue, Sep 04, 2018 at 10:13:43AM -0500, Sam Tebbs wrote:
Hi James,
Thanks for the feedback. Here is an update with the changes you proposed
and an updated changelog.
gcc/
2018-09-04 Sam Tebbs
PR target/85628
* config
Hi James,
Thanks for the feedback. Here is an update with the changes you proposed
and an updated changelog.
gcc/
2018-09-04 Sam Tebbs
PR target/85628
* config/aarch64/aarch64.md (*aarch64_bfxil):
Define.
* config/aarch64/constraints.md (Ulc): Define
On 08/28/2018 11:53 PM, James Greenhalgh wrote:
On Wed, Aug 01, 2018 at 10:07:23AM -0500, Sam Tebbs wrote:
+ ones from the MSB. */
+bool
+aarch64_is_left_consecutive (HOST_WIDE_INT i)
+{
+ return (i | (i - 1)) == HOST_WIDE_INT_M1;
exact_log2(-i) != HOST_WIDE_INT_M1?
I could change
On 08/31/2018 11:59 AM, Kyrill Tkachov wrote:
On 30/08/18 16:53, Sam Tebbs wrote:
On 08/28/2018 11:53 PM, James Greenhalgh wrote:
> Hm, I'm not very sure about the naming here; "left consecutive"
isn't a
> common phrase to denote the mask you're looking for (exact_log2
(-i
On 08/28/2018 11:53 PM, James Greenhalgh wrote:
Hm, I'm not very sure about the naming here; "left consecutive" isn't a
common phrase to denote the mask you're looking for (exact_log2 (-i) != -1
if I'm reading right), and is misleading 0x is 'left consecutive'
too, just with zeroes
ping
https://gcc.gnu.org/ml/gcc-patches/2018-08/msg00108.html
On 08/01/2018 04:07 PM, Sam Tebbs wrote:
Hi all,
This patch adds an optimisation that exploits the AArch64 BFXIL
instruction when or-ing the result of two bitwise and operations
with non-overlapping bitmasks
(e.g. (a & 0x
On 08/16/2018 10:46 AM, Richard Earnshaw (lists) wrote:
I've fixed this up and applied.
R.
PS, if you can use hard tabs for indenting your ChangeLog text it will
make my life a lot easier, as I don't have to fix it up manually.
Thanks for the tips and for committing.
Sam
someone commit it on my behalf? I don't have
commit rights.
gcc/
2018-08-16 Sam Tebbs
* config/aarch64/aarch64.opt (mlow-precision-recip-sqrt,
mlow-precision-sqrt, mlow-precision-div, mverbose-cost-dump): Replace
"Common" with "Target".
diff --git a/gcc
0
orr x4, x4, x5
str x4, [x2]
ret
But with this patch results in:
read:
mov x4, x0
bfxil x4, x1, 0, 32
str x4, [x2]
ret
Bootstrapped and regtested on aarch64-none-linux-gnu and
aarch64-none-elf with no regressions.
gcc/
2018-08-01 Sam Tebbs
On 07/31/2018 11:16 PM, James Greenhalgh wrote:
On Thu, Jul 26, 2018 at 11:52:15AM -0500, Sam Tebbs wrote:
Thanks for making the changes and adding more test cases. I do however
see that you are only covering 2 out of 4 new
*aarch64_get_lane_zero_extenddi<> pa
bfxil w0, w1, 0, 16
ret
Bootstrapped on aarch64-none-linux-gnu and regtested on aarch64-none-elf
with
no regressions.
gcc/
2018-07-31 Sam Tebbs
PR target/85628
* config/aarch64/aarch64.md (*aarch64_bfxilsi_uxtw): Define.
gcc/testsuite
2018-07-31 Sam Tebbs
and causing the issue described above. The changelog and
description from before still apply.
Thanks,
Sam
On 07/24/2018 05:23 PM, Sam Tebbs wrote:
On 07/23/2018 02:14 PM, Sam Tebbs wrote:
On 07/23/2018 12:38 PM, Renlin Li wrote:
+(define_insn "*aarch64_bfxil"
+ [(set (match_ope
On 07/25/2018 07:08 PM, Sudakshina Das wrote:
Hi Sam
On 25/07/18 14:08, Sam Tebbs wrote:
On 07/23/2018 05:01 PM, Sudakshina Das wrote:
Hi Sam
On Monday 23 July 2018 11:39 AM, Sam Tebbs wrote:
Hi all,
This patch extends the aarch64_get_lane_zero_extendsi instruction
definition to
also
On 07/23/2018 05:01 PM, Sudakshina Das wrote:
Hi Sam
On Monday 23 July 2018 11:39 AM, Sam Tebbs wrote:
Hi all,
This patch extends the aarch64_get_lane_zero_extendsi instruction
definition to
also cover DI mode. This prevents a redundant AND instruction from being
generated due
On 07/23/2018 02:14 PM, Sam Tebbs wrote:
On 07/23/2018 12:38 PM, Renlin Li wrote:
+(define_insn "*aarch64_bfxil"
+ [(set (match_operand:GPI 0 "register_operand" "=r,r")
+ (ior:GPI (and:GPI (match_operand:GPI 1 "register_operand"
think you have found an edge-case that I didn't think of and that the
code would fail under. I have added a check for this situation and will
send the updated patch soon.
Thanks,
Sam
On 07/20/2018 10:33 AM, Sam Tebbs wrote:
Please disregard the original patch and see this updated version.
/
2018-07-23 Sam Tebbs
* config/aarch64/aarch64-simd.md
(*aarch64_get_lane_zero_extendsi):
Rename to...
(*aarch64_get_lane_zero_extend): ... This.
Use GPI iterator instead of SI mode.
gcc/testsuite
2018-07-23 Sam Tebbs
* gcc.target/aarch64
Please disregard the original patch and see this updated version.
On 07/20/2018 10:31 AM, Sam Tebbs wrote:
Hi all,
Here is an updated patch that does the following:
* Adds a new constraint in config/aarch64/constraints.md to check for
a constant integer that is left consecutive
mov x4, x0
bfxil x4, x1, 0, 32
str x4, [x2]
ret
Bootstrapped and regtested on aarch64-none-linux-gnu and
aarch64-none-elf with no regressions.
gcc/
2018-07-11 Sam Tebbs
PR target/85628
* config/aarch64/aarch64.md (*aarch64_bfxil):
Define.
it though if that is the consensus.
I have addressed your point about just returning the string instead of
using output_asm_insn and have changed it locally. I'll send an updated
patch soon.
On 07/17/2018 02:33 AM, Richard Henderson wrote:
On 07/16/2018 10:10 AM, Sam Tebbs wrote:
+++ b/gcc/config/aarch64
et
Bootstrapped and regtested on aarch64-none-linux-gnu and
aarch64-none-elf with no regressions.
gcc/
2018-07-11 Sam Tebbs
* config/aarch64/aarch64.md (*aarch64_bfxil, *aarch64_bfxil_alt):
Define.
* config/aarch64/aarch64-protos.h (aarch64_is_left_consecutive)
il x0, x1, 0, 32
str x0, [x3]
ret
Bootstrapped and regtested on aarch64-none-linux-gnu and aarch64-none-elf with
no regressions.
gcc/
2018-07-11 Sam Tebbs
* config/aarch64/aarch64.md (*aarch64_bfxil, *aarch64_bfxil_alt):
Define.
* config/aarch64/
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