[RFC] [aarch64] Add HiSilicon tsv110 CPU support

2018-05-22 Thread Shaokun Zhang
tsv110 is designed by HiSilicon and supports v8_4A, it also optimizes L1 Icache which can access L1 Dcache. Therefore, DC CVAU is not necessary in __aarch64_sync_cache_range for tsv110, is there any good idea to skip DC CVAU operation for tsv110. Any thoughts and ideas are welcome. Shaokun Zhang

[RFC] [aarch64] Add HiSilicon tsv110 CPU support.

2018-05-22 Thread Shaokun Zhang
This patch adds HiSilicon's an mcpu: tsv110. --- gcc/ChangeLog| 9 +++ gcc/config/aarch64/aarch64-cores.def | 5 ++ gcc/config/aarch64/aarch64-cost-tables.h | 103 +++ gcc/config/aarch64/aarch64-tune.md | 2 +- gcc/config/aar

Re: [RFC] [aarch64] Add HiSilicon tsv110 CPU support

2018-05-22 Thread Ramana Radhakrishnan
On Tue, May 22, 2018 at 9:40 AM, Shaokun Zhang wrote: > tsv110 is designed by HiSilicon and supports v8_4A, it also optimizes > L1 Icache which can access L1 Dcache. > Therefore, DC CVAU is not necessary in __aarch64_sync_cache_range for > tsv110, is there any good idea to skip DC CVAU operation f

Re: [RFC] [aarch64] Add HiSilicon tsv110 CPU support.

2018-05-22 Thread Kyrill Tkachov
Hi Shaokun, On 22/05/18 09:40, Shaokun Zhang wrote: This patch adds HiSilicon's an mcpu: tsv110. --- gcc/ChangeLog| 9 +++ gcc/config/aarch64/aarch64-cores.def | 5 ++ gcc/config/aarch64/aarch64-cost-tables.h | 103 +++ gcc/config

Re: [RFC] [aarch64] Add HiSilicon tsv110 CPU support

2018-05-22 Thread Zhangshaokun
Hi Ramana, On 2018/5/22 18:28, Ramana Radhakrishnan wrote: > On Tue, May 22, 2018 at 9:40 AM, Shaokun Zhang > wrote: >> tsv110 is designed by HiSilicon and supports v8_4A, it also optimizes >> L1 Icache which can access L1 Dcache. >> Therefore, DC CVAU is not necessary in __aarch64_sync_cache_ran

Re: [RFC] [aarch64] Add HiSilicon tsv110 CPU support.

2018-05-22 Thread Zhangshaokun
Hi Kyrill, On 2018/5/22 18:52, Kyrill Tkachov wrote: > Hi Shaokun, > > On 22/05/18 09:40, Shaokun Zhang wrote: >> This patch adds HiSilicon's an mcpu: tsv110. >> >> --- >> gcc/ChangeLog| 9 +++ >> gcc/config/aarch64/aarch64-cores.def | 5 ++ >> gcc/config/aar

Re: [RFC] [aarch64] Add HiSilicon tsv110 CPU support.

2018-05-23 Thread Kyrill Tkachov
On 23/05/18 05:54, Zhangshaokun wrote: Hi Kyrill, On 2018/5/22 18:52, Kyrill Tkachov wrote: Hi Shaokun, On 22/05/18 09:40, Shaokun Zhang wrote: This patch adds HiSilicon's an mcpu: tsv110. --- gcc/ChangeLog| 9 +++ gcc/config/aarch64/aarch64-cores.def |

Re: [RFC] [aarch64] Add HiSilicon tsv110 CPU support.

2018-05-23 Thread Zhangshaokun
Hi Kyrill, On 2018/5/23 16:08, Kyrill Tkachov wrote: > > On 23/05/18 05:54, Zhangshaokun wrote: >> Hi Kyrill, >> >> On 2018/5/22 18:52, Kyrill Tkachov wrote: >>> Hi Shaokun, >>> >>> On 22/05/18 09:40, Shaokun Zhang wrote: This patch adds HiSilicon's an mcpu: tsv110. --- gcc/

Re: [RFC] [aarch64] Add HiSilicon tsv110 CPU support

2018-05-23 Thread Ramana Radhakrishnan
On 23/05/2018 03:50, Zhangshaokun wrote: Hi Ramana, On 2018/5/22 18:28, Ramana Radhakrishnan wrote: On Tue, May 22, 2018 at 9:40 AM, Shaokun Zhang wrote: tsv110 is designed by HiSilicon and supports v8_4A, it also optimizes L1 Icache which can access L1 Dcache. Therefore, DC CVAU is not nec

Re: [RFC] [aarch64] Add HiSilicon tsv110 CPU support

2018-06-01 Thread Zhangshaokun
Hi Ramana, Sorry to reply so later because of short leave. On 2018/5/23 18:41, Ramana Radhakrishnan wrote: > > > On 23/05/2018 03:50, Zhangshaokun wrote: >> Hi Ramana, >> >> On 2018/5/22 18:28, Ramana Radhakrishnan wrote: >>> On Tue, May 22, 2018 at 9:40 AM, Shaokun Zhang >>> wrote: tsv11

Re: [RFC] [aarch64] Add HiSilicon tsv110 CPU support

2018-06-06 Thread Kyrill Tkachov
Hi Shaokun, On 01/06/18 10:56, Zhangshaokun wrote: Hi Ramana, Sorry to reply so later because of short leave. On 2018/5/23 18:41, Ramana Radhakrishnan wrote: On 23/05/2018 03:50, Zhangshaokun wrote: Hi Ramana, On 2018/5/22 18:28, Ramana Radhakrishnan wrote: On Tue, May 22, 2018 at 9:40 AM

Re: [RFC] [aarch64] Add HiSilicon tsv110 CPU support

2018-06-07 Thread Zhangshaokun
Hi Kyrill, On 2018/6/6 22:51, Kyrill Tkachov wrote: > Hi Shaokun, > > On 01/06/18 10:56, Zhangshaokun wrote: >> Hi Ramana, >> >> Sorry to reply so later because of short leave. >> >> On 2018/5/23 18:41, Ramana Radhakrishnan wrote: >>> >>> On 23/05/2018 03:50, Zhangshaokun wrote: Hi Ramana, >