Re: [PATCH v2] RISC-V: Implement TLS Descriptors.

> On Nov 16, 2023, at 14:33, Fangrui Song wrote: > > On Wed, Nov 15, 2023 at 9:23 PM Jeff Law wrote: >> >> >> >> On 11/15/23 18:51, Tatsuyuki Ishi wrote: On Nov 16, 2023, at 10:07, Jeff Law wrote: >> >>> >>> Based on what I have read in the AArch64 backend, there are two ways to >>> d

Re: [PATCH v2] RISC-V: Implement TLS Descriptors.

On 11/15/23 22:33, Fangrui Song wrote: I have used this to check rtld and linker behavior. I think we need some `scan-assembler`. To make it a runnable test, some assembler feature check may be needed. Perhaps Jeff can make some suggestion or contribute code! TLS isn't really on my radar yet

Re: [PATCH v2] RISC-V: Implement TLS Descriptors.

On Wed, Nov 15, 2023 at 9:23 PM Jeff Law wrote: > > > > On 11/15/23 18:51, Tatsuyuki Ishi wrote: > >> On Nov 16, 2023, at 10:07, Jeff Law wrote: > > > > > Based on what I have read in the AArch64 backend, there are two ways to > > do this: introduce a custom calling convention, or put in a RTX in

Re: [PATCH v2] RISC-V: Implement TLS Descriptors.

On 11/15/23 18:51, Tatsuyuki Ishi wrote: On Nov 16, 2023, at 10:07, Jeff Law wrote: Based on what I have read in the AArch64 backend, there are two ways to do this: introduce a custom calling convention, or put in a RTX insn that covers the whole sequence. Ideally we should do the first

Re: [PATCH v2] RISC-V: Implement TLS Descriptors.

On 11/15/23 18:39, Tatsuyuki Ishi wrote: As mentioned in the commit message, the use of relaxation-only labels does not seem well supported in current GCC. Creating a label seems to force a basic block and I’m not sure how we can avoid it. If there’s a better way to implement this I’m ha

Re: [PATCH v2] RISC-V: Implement TLS Descriptors.

On 11/15/23 18:17, Fangrui Song wrote: It seems that x86-64 supports non-adjacent code sequence. Writing the pattern this way does not allow interleaving, but I assume interleaving doesn't enable much. It's of marginal benefit. We could always split them before scheduling if it turned out

Re: [PATCH v2] RISC-V: Implement TLS Descriptors.

> On Nov 16, 2023, at 10:07, Jeff Law wrote: > > > > On 9/8/23 04:49, Tatsuyuki Ishi via Gcc-patches wrote: >> This implements TLS Descriptors (TLSDESC) as specified in [1]. >> In TLSDESC instruction sequence, the first instruction relocates against >> the target TLS variable, while subsequent

Re: [PATCH v2] RISC-V: Implement TLS Descriptors.

> On Nov 16, 2023, at 10:17, Fangrui Song wrote: > > On Mon, Oct 2, 2023 at 7:10 AM Kito Cheng > wrote: >> >> Just one nit and one more comment for doc: >> >> Could you add some doc something like that? mostly I grab from other >> target, so you can just included i

Re: [PATCH v2] RISC-V: Implement TLS Descriptors.

On Mon, Oct 2, 2023 at 7:10 AM Kito Cheng wrote: > > Just one nit and one more comment for doc: > > Could you add some doc something like that? mostly I grab from other > target, so you can just included in the patch. > > diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi > index 31f2234640f

Re: [PATCH v2] RISC-V: Implement TLS Descriptors.

On 9/8/23 04:49, Tatsuyuki Ishi via Gcc-patches wrote: This implements TLS Descriptors (TLSDESC) as specified in [1]. In TLSDESC instruction sequence, the first instruction relocates against the target TLS variable, while subsequent instructions relocates against the address of the first. Suc

Re: [PATCH v2] RISC-V: Implement TLS Descriptors.

Just one nit and one more comment for doc: Could you add some doc something like that? mostly I grab from other target, so you can just included in the patch. diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi index 31f2234640f..39396668da2 100644 --- a/gcc/doc/install.texi +++ b/gcc/doc/in