Re: gEDA-user: Light? Heavy? Reuse...

2009-01-21 Thread Stephan Boettcher
How about a new application, gbom, similar to gattrib, that allows entry of a BOM. gbom would import attributes from a schematic and the engineer could fill all the remaining fields, with the help of matches in a database. gnetlist shall merge the bom with the schematic. The database defines

Re: gEDA-user: Light? Heavy? Reuse...

2009-01-21 Thread John Doty
On Jan 21, 2009, at 6:19 AM, Stephan Boettcher wrote: How about a new application, gbom, similar to gattrib, that allows entry of a BOM. Please, let's not turn a clean flow into a tangle. There are two entities here: the BOM, which is output, and should hardly ever be edited directly

gEDA-user: pcb bug: EPS output omits pads

2009-01-21 Thread Kai-Martin Knaak
The eps output of pcb does not contain pads if the option --as-shown is active. Pins are drawn correctly. ---(kaimartin)--- -- Kai-Martin Knaak tel: +49-511-762-2895 Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211 Welfengarten 1, 30167

gEDA-user: pcb feature request: Better control on ps output

2009-01-21 Thread Kai-Martin Knaak
pcb does a decent job with the set of prints produced by ps output. However, this is no flexibility in this approach. I wish, there was an interface to define a set of prints according to the local preferences. E.g., if I populate the board myself, I like to print assembly prints with refdes

Re: gEDA-user: Light? Heavy? Reuse...

2009-01-21 Thread John Doty
On Jan 21, 2009, at 12:43 AM, DJ Delorie wrote: It seems to me you're arguing for a plugin mechanism for gnetlist, too. Perhaps, or something more global. I.e. it would be nice if you *could* query these extra databases from within gschem or gattrib, for example, to see what the inferred

Re: gEDA-user: gEDA build broken on Fedora 10 due to pkgconfig patches

2009-01-21 Thread Chitlesh GOORAH
On Sun, Jan 18, 2009 at 2:48 AM, Peter TB Brett pe...@peter-b.co.uk wrote: Although Peter has followed the pkgconfig specification, the build currently breaks on Fedora due to a non-standard patch the Fedora packagers have applied to pkgconfig. Already fixed on rawhide(F-11): * Mon Dec 08

Re: gEDA-user: pcb bug: EPS output omits pads

2009-01-21 Thread Kai-Martin Knaak
On Wed, 21 Jan 2009 11:56:41 -0500, DJ Delorie wrote: The eps output of pcb does not contain pads if the option --as-shown is active. Pins are drawn correctly. Could you be more specific? Like, the entire command line? Option --as-shown is only meaningful, if some layers are switched off.

Re: gEDA-user: Light? Heavy? Reuse...

2009-01-21 Thread DJ Delorie
Certainly a good idea, except that it doesn't offer a way to feed-back to gschem for things that the user *must* (in their opinion) select. For example, what resistor values are available? In what tolerances? If you pick a 10uF capacitor at 10v, what's the smallest package it comes in?

Re: gEDA-user: pcb bug: EPS output omits pads

2009-01-21 Thread DJ Delorie
Option --as-shown is only meaningful, if some layers are switched off.However, I don't see a way to switch off layers with the command line. The option --action-string ToggleView(1) does not seem to have an effect on pcb. (Yet another bug?) That's what the --layer-stack option is for. To

Re: gEDA-user: What is wrong

2009-01-21 Thread Steven Michalske
I think that pcb should look for a part with the refdes U1a first before dropping the a to match U1. it should also spit out a little blurb about what it did. that way when someone does name a part Tm and wants it to be called Tm, pcb sees that part Tm exists and that no part T exists. we

Re: gEDA-user: Light? Heavy? Reuse...

2009-01-21 Thread Steven Michalske
So to take this adding too much complexity argument to street and shoot it. if we have plugins, this is simplified. if a plugin can register a hook on a component place, this can call an interface to the Data On Materials (DOM) database. annoyed For those who only think of mySQL when

Re: gEDA-user: pcb bug: EPS output omits pads

2009-01-21 Thread Kai-Martin Knaak
On Wed, 21 Jan 2009 13:14:04 -0500, DJ Delorie wrote: line. The option --action-string ToggleView(1) does not seem to have an effect on pcb. (Yet another bug?) That's what the --layer-stack option is for. How would I use this option? What is the syntax of a layer stack? I can't find

Re: gEDA-user: pcb bug: EPS output omits pads

2009-01-21 Thread DJ Delorie
How would I use this option? What is the syntax of a layer stack? I can't find neither in the manual. ( http://pcb.sourceforge.net/pcb-20081128/pcb.html ) Seems like the description of options is completely out of date in the manual. By the way, where can I access your shiny new pcb HOWTO?

gEDA-user: duplique

2009-01-21 Thread Patrick Dupre
Hello, After I made a pcb, can I duplicate it on the same silk ? Then I go get several at the same time. Thank -- --- == Patrick DUPRÉ | | Department of Chemistry| |Phone:

Re: gEDA-user: inductor footprint advise

2009-01-21 Thread Peter TB Brett
On Wednesday 21 January 2009 21:06:56 Rob Butts wrote: Hi Everyone, Can someone please take a look at the attached datasheet and suggest how you would name and number the pads for this inductor? I'm just not sure how to handle four pads that are actually two pads (aside from doing the

Re: gEDA-user: inductor footprint advise

2009-01-21 Thread John Luciani
On Wed, Jan 21, 2009 at 4:06 PM, Rob Butts r.but...@gmail.com wrote: Hi Everyone, Can someone please take a look at the attached datasheet and suggest how you would name and number the pads for this inductor? I'm just not sure how to handle four pads that are actually two pads (aside

Re: gEDA-user: duplique

2009-01-21 Thread DJ Delorie
After I made a pcb, can I duplicate it on the same silk ? Then I go get several at the same time. Are you asking if you can panelize? If so, sure, multiple ways. The easiest way is to expand your board size and copy/paste the design (making sure unique refdes is NOT checked)

Re: gEDA-user: duplique

2009-01-21 Thread John Luciani
On Wed, Jan 21, 2009 at 4:09 PM, Patrick Dupre pd...@york.ac.uk wrote: Hello, After I made a pcb, can I duplicate it on the same silk ? Then I go get several at the same time. Are you asking about panelizing -- multiple copies of the same layout on a single board? I panelize all the time. I

Re: gEDA-user: Light? Heavy? Reuse...

2009-01-21 Thread John Doty
On Jan 21, 2009, at 10:58 AM, DJ Delorie wrote: Certainly a good idea, except that it doesn't offer a way to feed- back to gschem for things that the user *must* (in their opinion) select. For example, what resistor values are available? In what tolerances? If you pick a 10uF

Re: gEDA-user: duplique

2009-01-21 Thread Gene Heskett
On Wednesday 21 January 2009, Patrick Dupre wrote: Hello, After I made a pcb, can I duplicate it on the same silk ? Then I go get several at the same time. Thank If you mean making another pcb by using the same silk, yes. We used to do that 40 some years ago at a tv station, where such things

gEDA-user: gnetlist -g verilog questions

2009-01-21 Thread John Griessen
I'm using Mike Jarabeck's gnetlist plugin and studying verilog ams with creating gnucap compatible netlists in mind. When I run: gnetlist -g verilog verilog_io.sch I get unknown in one slot... /* Package instantiations */ unknown X2 ( /* IO1 */ B, /* IO2 */ C ); What is that

Re: gEDA-user: inductor footprint advise

2009-01-21 Thread Steven Michalske
On Jan 21, 2009, at 1:10 PM, Peter TB Brett wrote: On Wednesday 21 January 2009 21:06:56 Rob Butts wrote: Hi Everyone, Can someone please take a look at the attached datasheet and suggest how you would name and number the pads for this inductor? I'm just not sure how to handle four

Re: gEDA-user: gnetlist -g verilog questions

2009-01-21 Thread Mike Jarabek
John Griessen wrote: I'm using Mike Jarabeck's gnetlist plugin and studying verilog ams with creating gnucap compatible netlists in mind. When I run: gnetlist -g verilog verilog_io.sch That would be the right way to run it. I get unknown in one slot... /* Package instantiations */

Re: gEDA-user: gnetlist -g verilog questions

2009-01-21 Thread John Griessen
Mike Jarabek wrote: Interesting... The name is supposed to come from one of the attributes inside the symbol. It also looks like the symbol has the positional ports attribute set on there, I've found that isn't usually what you want to do. I found your example schematic in the