On 4/5/2011 7:46 PM, John Griessen wrote:
On 04/05/2011 09:04 AM, Patrick Doyle wrote:
Hi Rick,
The GA144 sounds quite interesting for a very specific
application that may be coming down the pike pretty soon, but I don't
have any good killer app ideas for it.
On Tue, Apr 5, 2011 at 9:47 A
Thanks, pushed.
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On my FreeBSD laptop I've got tk-8.5.8_1 installed, and it provides
wish8.5. I made the following change to configure.ac to get it to work:
diff --git a/configure.ac b/configure.ac
index 87814cd..ab6986f 100644
--- a/configure.ac
+++ b/configure.ac
@@ -534,7 +534,7 @@ else
fi
-AC_PATH_PROGS(W
> > gattrib_csv also correctly handles slotted components by including
> > the position of the component in its reference when the refdes is
> > not specific enough.
>
> Wouldn't it be desirable to somehow treat slotted and split symbols
> as one entity? E.g. there should be just one footprint at
Joshua wrote:
> gattrib_csv
> also correctly handles slotted components by including
> the position of the component in its reference when the
> refdes is not specific enough.
Wouldn't it be desirable to somehow treat slotted and split symbols
as one entity? E.g. there should be just one footp
I just want to throw my opinion out there. I have been using geda
(gschem and pcb) for years and I have yet to find a satisfactory
waveform viewer, simulation gui, and netlister.
Kudos to someone who wants try to make a legitimate waveform viewer,
the open source EDA community needs one. I for one
Andrzej wrote:
> and
> that I don't consider ngscope "yet another waveform viewer".
I didn't want to discourage anybody from anything. It was just the
feeling that the bottle neck with simulation in the context of geda
is somewhere else. Specifically, the suite misses a way for fast
turnaround
>> The common way to track common ground planes seems to be to place a
>> jumper between the planes so that the netlist can be sane. This
>> requires a component to be placed on one of the outer layers of the
>> board, which is a bit of an annoyance. Is there any other way of doing
>> this? Maybe s
On Tue, 5 Apr 2011 13:11:25 -0700
Russell Dill wrote:
> Perhaps I'll go with a solder blob jumper. A "drawbridge" component in
> PCB that is just a special type of trace would be really nice.
Yeah. I miss the concept of the "star point".
--
Levente Kovacs
http://levente.logonex.eu
On Tue, Apr 5, 2011 at 1:53 AM, Kovacs Levente wrote:
> On Mon, 4 Apr 2011 23:30:21 -0700
> Russell Dill wrote:
>
>> The common way to track common ground planes seems to be to place a
>> jumper between the planes so that the netlist can be sane. This
>> requires a component to be placed on one o
I used gedit. I'm working in Ubuntu.
~Abhijit
On Tue, Apr 5, 2011 at 22:48, Bob Paddock wrote:
>> I created the netlist using gschem2pcb and then edited it using a text
>> editor,
>
> Did the text editor change the end of line format? I've seen that
> error when editing the netlist with Win
> I created the netlist using gschem2pcb and then edited it using a text
> editor,
Did the text editor change the end of line format? I've seen that
error when editing the netlist with Windows Text Editors,
or text editors that adapt. If you use EMACS on Windows make sure it
is a unix format fil
I managed to edit the netlist file manually (in gedit) and added the
word 'Power'. Seems it is case sensitive _and_ tab sensitive. To
summarize, the syntax of the style allocation should be:
netname style_name pin pin pin
where stylename is Case sensitive. e.g. "Power" worked; "power" did not..
The syntax allows a net style there, but nothing in gschem produces it
so nothing in pcb uses it.
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What is the syntax for allotting a routing style to a net?
I saw the syntax here:
http://pcb.gpleda.org/pcb-cvs/pcb.html#Netlist-File and
http://archives.seul.org/geda/dev/May-2008/msg00120.html
I created the netlist using gschem2pcb and then edited it using a text
editor, adding the word "power"
Thanks very much!
The first two are almost exactly what I had posted, so thats resolved.
In the case of the third,
(https://bugs.launchpad.net/geda/+bug/698570), I was curious to see
what gnetlist was doing, so I ran it on the schematics with the
options -g geda (Netlist format = geda) and -v (ver
On 4/5/11 9:47 AM, rickman wrote:
I also have an interest in testing the Green Arrays GA144
multiprocessor. This device has 144 processors running at 666 MIPS each
consuming less than a Watt with all running full bore. They are async
processors and stop on a dime when waiting for input dropping p
Hi Rick,
I'm still collecting information. So far, the Balloon board sounds
the most like what I need: a currently shipping and supported
processor + FPGA board. But the "currently shipping" part is
negotiable, as it will be at least a month or two before I can do
anything at all with the board (
On 3/26/2011 8:50 PM, Patrick Doyle wrote:
Hi Folks,
I'm looking for a US distributor for a Balloon Board
(http://www.balloonboard.org/) or it's equivalent -- perhaps one of
you may have designed and sell your own equivalent. Basically, I'm
looking for a standalone board with a processor (with i
> On Fri, Apr 1, 2011 at 2:19 PM, Joshua
> > laserlinc.com> wrote:
> > Hey guys. I wrote a tool which exports and imports
> > the properties from a
> > project to and to a csv file.
> > http://public.laserlinc.com/Joshua/gattrib_csv.java
> >
> > The following command compiles it to exe.
> >
>
2011/4/5 Abhijit Kshirsagar :
> I have multi-page schematics with a number of off-page connectors
> (realised using the symbols input-1.sym and input-2.sym) as described
> in the howto:
> [1]http://www.geda.seul.org/wiki/geda:na_howto#what_is_the_net_attribut
> e_used_for
> I noticed t
Hi
I have multi-page schematics with a number of off-page connectors
(realised using the symbols input-1.sym and input-2.sym) as described
in the howto:
[1]http://www.geda.seul.org/wiki/geda:na_howto#what_is_the_net_attribut
e_used_for
I noticed that if multiple net attributes
On Mon, 4 Apr 2011 23:30:21 -0700
Russell Dill wrote:
> The common way to track common ground planes seems to be to place a
> jumper between the planes so that the netlist can be sane. This
> requires a component to be placed on one of the outer layers of the
> board, which is a bit of an annoyan
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